[USRP-users] Re: No module named 'uhd'
Hi I am getting the same error when i am trying to run “rfnoc_image_builder” command. could you please tell me how to resolve this issue. as i am new researcher in this feild ___ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le...@lists.ettus.com
[USRP-users] Re: Error while running command "rfnoc_image_builder -y ./e310_rfnoc_image_core.yml"
Dear Wade, Thank you very much for your response. The YAML was modified by ettus research (Jonathon). He added replay block and sent me via email. I replaced that file in following folder (uhd/fpga/usrp3/top/e31x) and then run command. I also installed vivado 2021.1 according to his instructions ___ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le...@lists.ettus.com
[USRP-users] Re: Error while running command "rfnoc_image_builder -y ./e310_rfnoc_image_core.yml"
Could you please tell me how can solve this issue? As I am using GNU radio, when I increase sample rate beyond 2MS/s it misses samples. So, Ettus suggested me to use RFNoC replay Block. They also provided me with YAML file. I have two E313 USRPs and I have to use them for outdoor channel modelling. Could you please help me with that? ___ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le...@lists.ettus.com
[USRP-users] Re: Error while running command "rfnoc_image_builder -y ./e310_rfnoc_image_core.yml"
Hi Wade & Rob, Thank you for your help. I am a new user, so I do not know much about Linux and FPGA. My aim is to use my usrp with high sampling rate so I was recommended to use RFNoC replay block. For this purpose, I received YML file from Ettus (from Jonathon). I replaced that file (e310_rfnoc_image_core.yml) with the already existing file to the location (/uhd/fpga/usrp3/top/e31x) and from this folder I executed the command “rfnoc_image_builder -y\ ./e310_rfnoc_image_core.yml “. I am not sure whether I did it correctly or not. regards Hassan ___ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le...@lists.ettus.com
[USRP-users] Error: RuntimeError: Failure to create rfnoc_graph.
Hi All, I am trying to run this command “uhd_image_loader --args type=e3xx,adr=192.168.10.2 --fpga-path=/home/grcusrp/uhd/fpga/usrp3/top/e31x/build-E310_SG3/e31x.bit” But I get error which is “Error: RuntimeError: Failure to create rfnoc_graph”. the whole output is “\[INFO\] \[UHD\] linux; GNU C++ version 9.4.0; Boost_107100; UHD_4.4.0.HEAD-0-g5fac246b \[INFO\] \[MPMD\] Initializing 1 device(s) in parallel with args: mgmt_addr=192.168.10.2,type=e3xx,product=e310_sg3,serial=31370FC,name=ni-e31x-31370FC,fpga=n/a,claimed=False,addr=192.168.10.2,skip_init=1 \[INFO\] \[MPMD\] Claimed device without full initialization. \[INFO\] \[MPMD IMAGE LOADER\] Starting update. This may take a while. \[INFO\] \[MPM.PeriphManager\] Installing component \`fpga' \[INFO\] \[MPM.PeriphManager\] Installing component \`dts' \[INFO\] \[MPMD IMAGE LOADER\] Update component function succeeded. \[INFO\] \[MPM.RPCServer\] Resetting peripheral manager. \[WARNING\] \[MPM.PeriphManager\] Skipping HW/SW compatibility check! \[INFO\] \[MPM.PeriphManager\] Device serial number: 31370FC \[WARNING\] \[MPM.PeriphManager\] Found more EEPROM paths than daughterboards. Ignoring some of them. \[INFO\] \[MPMD\] Initializing 1 device(s) in parallel with args: mgmt_addr=192.168.10.2,type=e3xx,product=e310_sg3,serial=31370FC,name=ni-e31x-31370FC,fpga=n/a,claimed=False,addr=192.168.10.2,adr=192.168.10.2,find_all=1 \[WARNING\] \[MPM.PeriphManager\] Cannot run deinit(), device was never fully initialized! \[INFO\] \[MPM.PeriphManager\] init() called with device args \`adr=192.168.10.2,find_all=1,fpga=n/a,mgmt_addr=192.168.10.2,name=ni-e31x-31370FC,product=e310_sg3'. \[WARNING\] \[RFNOC::GRAPH\] One or more blocks timed out during flush! \[INFO\] \[0/Radio#0\] Performing CODEC loopback test on channel 0 ... \[INFO\] \[0/Radio#0\] CODEC loopback test passed \[INFO\] \[0/Radio#0\] Performing CODEC loopback test on channel 1 ... \[INFO\] \[0/Radio#0\] CODEC loopback test passed \[ERROR\] \[RFNOC::GRAPH\] Error during initialization of block 0/Replay#0! \[ERROR\] \[RFNOC::GRAPH\] Caught exception while initializing graph: RfnocError: OpTimeout: Control operation timed out waiting for ACK Error: RuntimeError: Failure to create rfnoc_graph.” I am trying to build an fpga image with RFNoC. I have YML file which includes replay block which I copied to the folder (uhd/fpga/usrp3/top/e31x) I have executed this command “rfnoc_image_builder -y ./e310_rfnoc_image_core.yml -t E310_SG3 --fpga-dir \~/uhd/fpga/”. After this command I got no errors but warnings. result is Warnings: 1073 Critical Warnings: 125 Errors: 0 make\[1\]: Leaving directory '/home/grcusrp/uhd/fpga/usrp3/top/e31x' Exporting bitstream file... Exporting build report... Build DONE ... E310_SG3” ___ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le...@lists.ettus.com
[USRP-users] Re: Error: RuntimeError: Failure to create rfnoc_graph.
Dear Rob,
Sorry for the wrong command. I executed following command “uhd_image_loader
--args type=e3xx,adr=192.168.10.2
--fpga-path=/home/grcusrp/uhd/fpga/usrp3/top/e31x/build/usrp_e310_sg3_fpga.bit”.
Please also find the attached YML file.
# General parameters
# -
schema: rfnoc_imagebuilder_args # Identifier for the schema used to
validate this file
copyright: >- # Copyright information used in file
headers
Copyright 2023 Ettus Research, a National Instruments Brand
license: >- # License information used in file
headers
SPDX-License-Identifier: LGPL-3.0-or-later
version: '1.0' # File version
chdr_width: 64 # Bit width of the CHDR bus for this
image
device: 'e310' # USRP type
image_core_name: 'e310' # Name to use for the RFNoC Image Core
files
default_target: 'DRAM=1 E310_SG3'
# A list of all stream endpoints in design
#
stream_endpoints:
ep0: # Stream endpoint name
ctrl: True # Endpoint passes control traffic
data: True # Endpoint passes data traffic
buff_size: 4096 # Ingress buffer size for data
ep1:
ctrl: False
data: True
buff_size: 4096
ep2:
ctrl: False
data: True
buff_size: 4096
ep3:
ctrl: False
data: True
buff_size: 4096
# A list of all NoC blocks in design
# --
noc_blocks:
radio0: # NoC block name
block_desc: 'radio.yml' # Block device descriptor
parameters:
NUM_PORTS: 2
replay0:
block_desc: 'replay.yml'
parameters:
NUM_PORTS: 2
MEM_DATA_W: 64
MEM_ADDR_W: 30
# A list of all static connections in design
# --
# Format: A list of connection maps (list of key-value pairs) with the
following keys
# - srcblk = Source block to connect
# - srcport = Port on the source block to connect
# - dstblk = Destination block to connect
# - dstport = Port on the destination block to connect
connections:
# TX A
- { srcblk: ep0,srcport: out0, dstblk: radio0, dstport: in_0 }
# RX A
- { srcblk: radio0, srcport: out_0, dstblk: ep0,dstport: in0 }
# TX B
- { srcblk: ep1,srcport: out0, dstblk: radio0, dstport: in_1 }
# RX B
- { srcblk: radio0, srcport: out_1, dstblk: ep1,dstport: in0 }
#
# Replay Connections
- { srcblk: ep2, srcport: out0, dstblk: replay0, dstport: in_0 }
- { srcblk: replay0, srcport: out_0, dstblk: ep2, dstport: in0 }
- { srcblk: ep3, srcport: out0, dstblk: replay0, dstport: in_1 }
- { srcblk: replay0, srcport: out_1, dstblk: ep3, dstport: in0 }
# BSP Connections
- { srcblk: radio0, srcport: ctrlport, dstblk: _device_, dstport: ctrlport }
- { srcblk: replay0, srcport: axi_ram, dstblk: _device_, dstport: dram }
- { srcblk: _device_, srcport: radio,dstblk: radio0, dstport: radio}
- { srcblk: _device_, srcport: time, dstblk: radio0, dstport: time }
# A list of all clock domain connections in design
#
# Format: A list of connection maps (list of key-value pairs) with the
following keys
# - srcblk = Source block to connect (Always "_device"_)
# - srcport = Clock domain on the source block to connect
# - dstblk = Destination block to connect
# - dstport = Clock domain on the destination block to connect
clk_domains:
- { srcblk: _device_, srcport: radio, dstblk: radio0, dstport: radio }
- { srcblk: _device_, srcport: dram, dstblk: replay0, dstport: mem }
___
USRP-users mailing list -- usrp-users@lists.ettus.com
To unsubscribe send an email to usrp-users-le...@lists.ettus.com
[USRP-users] Re: Error: RuntimeError: Failure to create rfnoc_graph.
Dear Rob, I have following bit files generated at the same time. 1. named “usrp_e310_sg3_fpga.bit”. this file is in build folder 2. named “e31x.bit”. which is in “build-E310_SG3” build-E310_SG3 folder and build folder, both are in e31x folder. I tried to run both these files and get same error. the commands are. 1. uhd_image_loader --args type=e3xx,adr=192.168.10.2 --fpga-path=/home/grcusrp/uhd/fpga/usrp3/top/e31x/build-E310_SG3/e31x.bit 2. uhd_image_loader --args type=e3xx,adr=192.168.10.2 --fpga-path=/home/grcusrp/uhd/fpga/usrp3/top/e31x/build/usrp_e310_sg3_fpga.bit ___ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le...@lists.ettus.com
[USRP-users] Re: Error: RuntimeError: Failure to create rfnoc_graph.
Dear Rob, You are right, when I try to run this command “rfnoc_image_builder -y ./e310_rfnoc_image_core.yml”, **it fails**. **I also tried to use your given YML file**, it was not successful because of the different UHD version. The only command which worked for me is “rfnoc_image_builder -y ./e310_rfnoc_image_core.yml -t E310_SG3 --fpga-dir \~/uhd/fpga/”. Moreover I noticed that the bit file from the build folder is the actual file which I have to use. But I get error which I discussed earlier. ___ USRP-users mailing list -- usrp-users@lists.ettus.com To unsubscribe send an email to usrp-users-le...@lists.ettus.com
[USRP-users] Re: Error: RuntimeError: Failure to create rfnoc_graph.
these are the further results. In which now I can see that there is replay block after executing uhd_usrp_probe. I am really thankful to your help. grcusrp@grcusrp-ThinkPad-T470:\~/uhd/fpga/usrp3/top/e31x$ uhd_image_loader --args type=e3xx,adr=192.168.10.2 --fpga-path=/home/grcusrp/uhd/fpga/usrp3/top/e31x/build/usrp_e310_sg3_fpga.bit \[INFO\] \[UHD\] linux; GNU C++ version 9.4.0; Boost_107100; UHD_4.4.0.HEAD-0-g5fac246b \[INFO\] \[MPMD\] Initializing 1 device(s) in parallel with args: mgmt_addr=192.168.10.2,type=e3xx,product=e310_sg3,serial=31370FC,name=ni-e31x-31370FC,fpga=n/a,claimed=False,addr=192.168.10.2,skip_init=1 \[INFO\] \[MPMD\] Claimed device without full initialization. \[INFO\] \[MPMD IMAGE LOADER\] Starting update. This may take a while. \[INFO\] \[MPM.PeriphManager\] Installing component \`fpga' \[INFO\] \[MPM.PeriphManager\] Installing component \`dts' \[INFO\] \[MPMD IMAGE LOADER\] Update component function succeeded. \[INFO\] \[MPM.RPCServer\] Resetting peripheral manager. \[WARNING\] \[MPM.PeriphManager\] Skipping HW/SW compatibility check! \[INFO\] \[MPM.PeriphManager\] Device serial number: 31370FC \[WARNING\] \[MPM.PeriphManager\] Found more EEPROM paths than daughterboards. Ignoring some of them. \[INFO\] \[MPMD\] Initializing 1 device(s) in parallel with args: mgmt_addr=192.168.10.2,type=e3xx,product=e310_sg3,serial=31370FC,name=ni-e31x-31370FC,fpga=n/a,claimed=False,addr=192.168.10.2,adr=192.168.10.2,find_all=1 \[WARNING\] \[MPM.PeriphManager\] Cannot run deinit(), device was never fully initialized! \[INFO\] \[MPM.PeriphManager\] init() called with device args \`adr=192.168.10.2,find_all=1,fpga=n/a,mgmt_addr=192.168.10.2,name=ni-e31x-31370FC,product=e310_sg3'. \[INFO\] \[0/Radio#0\] Performing CODEC loopback test on channel 0 ... \[INFO\] \[0/Radio#0\] CODEC loopback test passed \[INFO\] \[0/Radio#0\] Performing CODEC loopback test on channel 1 ... \[INFO\] \[0/Radio#0\] CODEC loopback test passed grcusrp@grcusrp-ThinkPad-T470:\~/uhd/fpga/usrp3/top/e31x$ uhd_usrp_probe \[INFO\] \[UHD\] linux; GNU C++ version 9.4.0; Boost_107100; UHD_4.4.0.HEAD-0-g5fac246b \[INFO\] \[MPMD\] Initializing 1 device(s) in parallel with args: mgmt_addr=192.168.10.2,type=e3xx,product=e310_sg3,serial=31370FC,name=ni-e31x-31370FC,fpga=n/a,claimed=False,addr=192.168.10.2 \[INFO\] \[MPM.PeriphManager\] init() called with device args \`fpga=n/a,mgmt_addr=192.168.10.2,name=ni-e31x-31370FC,product=e310_sg3'. \[INFO\] \[0/Radio#0\] Performing CODEC loopback test on channel 0 ... \[INFO\] \[0/Radio#0\] CODEC loopback test passed \[INFO\] \[0/Radio#0\] Performing CODEC loopback test on channel 1 ... \[INFO\] \[0/Radio#0\] CODEC loopback test passed _ / | Device: E300-Series Device | _ |/ | | Mboard: ni-e31x-31370FC | | dboard_0_pid: 272 | | dboard_0_serial: 312CB29 | | fs_version: 20230131233832 | | mender_artifact: v4.4.0.0_e310_sg3 | | mpm_sw_version: 4.4.0.0-g5fac246b | | pid: 30675 | | product: e310_sg3 | | rev: 7 | | rpc_connection: remote | | serial: 31370FC | | type: e3xx | | MPM Version: 4.4 | | FPGA Version: 6.0 | | FPGA git hash: 5fac246.dirty | | RFNoC capable: Yes | | | | Time sources: internal, external, gpsdo | | Clock sources: internal | | Sensors: ref_locked, gps_locked, temp_fpga, temp_mb, gps_gpgga, gps_sky, gps_time, gps_tpv | _ |/ | | RFNoC blocks on this device: | | | | \* 0/Radio#0 | | \* 0/Replay#0 | _ |/ | | Static connections on this device: | | | | \* 0/SEP#0:0==>0/Replay#0:0 | | \* 0/SEP#1:0==>0/Replay#0:1 | | \* 0/Replay#0:0==>0/Radio#0:0 | | \* 0/Replay#0:1==>0/Radio#0:1 | | \* 0/Radio#0:0==>0/SEP#0:0 | | \* 0/Radio#0:1==>0/SEP#1:0 | _ |/ | | TX Dboard: 0/Radio#0 | | _ | |/ | | | TX Frontend: 0 | | | Name: E3xx | | | Antennas: TX/RX | | | Freq range: 47.000 to 6000.000 MHz | | | Gain range PGA: 0.0 to 89.8 step 0.2 dB | | | Bandwidth range: 2000.0 to 4000.0 step 0.0 Hz | | | Connection Type: IQ | | | Uses LO offset: No | | _ | |/ | | | TX Frontend: 1 | | | Name: E3xx | | | Antennas: TX/RX | | | Freq range: 47.000 to 6000.000 MHz | | | Gain range PGA: 0.0 to 89.8 step 0.2 dB | | | Bandwidth range: 2000.0 to 4000.0 step 0.0 Hz | | | Connection Type: IQ | | | Uses LO offset: No | _
