from:"Xingjian Chen via USRP\-users"

[USRP-users] How to writing to user settings register for B200mini

2017-08-26 Thread Xingjian Chen via USRP-users

Hi,
I am trying to set up a user register for a B200mini. There are several posts 
related to this. Such as
1. 
http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2017-April/024739.html
2. 
http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2017-April/024739.html
Are there any clear instructions about how to implement it? Thank you.

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[USRP-users] Performance Consistency of B200mini

2017-08-28 Thread Xingjian Chen via USRP-users

Hi,

How consistent is B200mini can be in terms of signal amplitude if I restart the 
board? I am sending and getting chirp pulses at the same time by a B200mini.  I 
found that if I restart the board every time before the loopback measurement, 
and comparing pulses between measurements, the amplitude changed more than 
amplitude changes in a single measurement. It seems the gain changed even if I 
have the same settings in controlling software. What device in the hardware of 
B200mini can lead to this variation? Thank you.
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[USRP-users] How to disable a E312 channel properly

2017-10-09 Thread Xingjian Chen via USRP-users

Hi,

I added some IP cores in E312 FPGA codes and have to delete one radio channel 
for saving some resources such as block RAMs. I notice that the UHD cpp files 
always checking both radio channels. What is the proper way to stop it if only 
one channel is used? I was trying to modify e300_impl.cpp but having no luck...
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[USRP-users] How to setup Digital Loopback in host computer?

2018-01-02 Thread Xingjian Chen via USRP-users

Hi,

I am trying to utilize the digital loopback to check transmitted signal before 
DAC in my E312. May I know what is the C++ command to enable the digital 
loopback? How to set the SR_LOOPBACK register?  In the radio.v, it says,


   // Set this register to loop TX data directly to RX data.
   setting_reg #(.my_addr(SR_LOOPBACK), .awidth(8), .width(1)) sr_loopback
 (.clk(radio_clk), .rst(radio_rst), .strobe(set_stb), .addr(set_addr), 
.in(set_data),
  .out(loopback), .changed());
..
   // Digital Loopback TX -> RX (Pipeline immediately inside rx_frontend).
   wire [31:0]rx_fe = loopback ? tx : rx;

I know it is possible to change FPGA code to achieve digital loopback. But it 
will be handy if I can set it in controlling computer. I cannot find any clue 
in txrx_loopback_to_file.cpp. I think it is used for looping back analog 
waveforms. Thank you.
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[USRP-users] IQ imbalance calibration for E312

2018-01-05 Thread Xingjian Chen via USRP-users

Hi,

Is there any way for E312 to self-calibrate? I found there is IQ imbalance in 
amplitude and dc offset showing in the recorded signal's real and imaginary 
part. But it seems that its daughter board is not supported for 
self-calibration. Any idea to solve this? Thank you very much.
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[USRP-users] Control LO frequency by FPGA

2018-02-13 Thread Xingjian Chen via USRP-users

Hi,

I am interested in controlling LO frequency using E312 in such a way that timed 
command must be used. However, as far as I know, E312 doesn't support timed 
command for RF front end. So I am thinking if I could write some simple modules 
in Verilog HDL setting up LO frequency. I am wondering if anyone could give me 
a hint how to start. What is the best way to program LO center frequency in 
FPGA for E312? Thank you.
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[USRP-users] make noc_block_gain_tb error

2018-03-30 Thread Xingjian Chen via USRP-users

Hi,

When I follow the instruction from "Getting Started with RFNoC Development" web
and youtube video "RFNoC Getting Started Video Tutorial", everything was smooth
until making the gain block testbench. Here is the error I got after the step
"make noc_block_gain_tb":

"/bin/sh: 1: source: not found
CMakeFiles/noc_block_gain_tb.dir/build.make:57: recipe for target
'CMakeFiles/noc_block_gain_tb' failed
make[3]: *** [CMakeFiles/noc_block_gain_tb] Error 127
CMakeFiles/Makefile2:131: recipe for target
'CMakeFiles/noc_block_gain_tb.dir/all' failed
make[2]: *** [CMakeFiles/noc_block_gain_tb.dir/all] Error 2
CMakeFiles/Makefile2:138: recipe for target
'CMakeFiles/noc_block_gain_tb.dir/rule' failed
make[1]: *** [CMakeFiles/noc_block_gain_tb.dir/rule] Error 2
Makefile:201: recipe for target 'noc_block_gain_tb' failed
make: *** [noc_block_gain_tb] Error 2"

I know I am using bash as my default shell by "echo $0"
I have added the block gain.
I think there might be something wrong with cmake. I see some warning when I do
"cmake ../" in the ~/rfnoc/src/rfnoc-tutorial/build directory. It shows this:
"...
Checking for GNU Radio Module: RUNTIME
-- Checking for module 'gnuradio-runtime'
-- Found gnuradio-runtime, version 3.7.12git
* INCLUDES=/root/rfnoc/include
*
LIBS=/root/rfnoc/lib/libgnuradio-runtime.so;/root/rfnoc/lib/libgnuradio-pmt.so;/usr/lib/liblog4cpp.so
-- Found GNURADIO_RUNTIME:
/root/rfnoc/lib/libgnuradio-runtime.so;/root/rfnoc/lib/libgnuradio-pmt.so;/usr/lib/liblog4cpp.so
GNURADIO_RUNTIME_FOUND = TRUE
-- Checking for module 'ettus'
-- No package 'ettus' found
-- Found ETTUS: /root/rfnoc/lib/libgnuradio-ettus.so
* INCLUDES = /root/rfnoc/include
* LIBS = /root/rfnoc/lib/libgnuradio-ettus.so
-- Checking for module 'fpga'
-- No package 'fpga' found
-- Found FPGA: /root/rfnoc/src/uhd-fpga
CMake Warning (dev) at cmake/Modules/GrTest.cmake:45 (get_target_property):
Policy CMP0026 is not set: Disallow use of the LOCATION target property.
Run "cmake --help-policy CMP0026" for policy details. Use the cmake_policy
command to set the policy and suppress this warning.

The LOCATION property should not be read from target "test-tutorial". Use
the target name directly with add_custom_command, or use the generator
expression $, as appropriate.

Call Stack (most recent call first):
lib/CMakeLists.txt:85 (GR_ADD_TEST)
This warning is for project developers. Use -Wno-dev to suppress it.
..."

I find that there is another uhd-fpga folder in
/~/rfnoc/src/rfnoc-tutorial/rfnoc. Is this the actual location I should provide
for the fpga repository? Please give me some ideas. Thank you in advance!

Chen

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Re: [USRP-users] make noc_block_gain_tb error

2018-03-31 Thread Xingjian Chen via USRP-users

Beautiful! You are right.

From: Nicolas Cuervo 
Sent: Saturday, March 31, 2018 2:45:40 PM
To: Xingjian Chen
Cc: usrp-users@lists.ettus.com
Subject: Re: [USRP-users] make noc_block_gain_tb error

Hello Chen,

what is the output of this command?:

   $ ls -l /bin/sh

The commands "echo $0" and "ls -l /bin/sh" are not fundamentally 
interchangeable. "echo $0" will return the process $0, which, when run in a 
shell, will tell you the name of the shell. However, if you run this command 
inside a script, then it will return the name of the script.

On the other hand, "ls -l /bin/sh" returns the *default* shell that the system 
uses. It will show as a symlink and should point to bash for the testbenches to 
work. This is what you modify when running "sudo dpkg-reconfigure dash" and 
choose "no" in order to have "bash" as default.

As an additional example, when I run "echo $0" in my shell it returns "zsh", 
because that is the shell that I'm am running in my terminal, and the 
testbenches run just fine, because my default shell is bash (as seen with ls -l 
/bin/sh).

Cheers,
- Nicolas

On Fri, Mar 30, 2018 at 10:28 PM, Xingjian Chen via USRP-users 
mailto:usrp-users@lists.ettus.com>> wrote:

Hi,

When I follow the instruction from "Getting Started with RFNoC Development" web 
and youtube video "RFNoC Getting Started Video Tutorial", everything was smooth 
until making the gain block testbench. Here is the error I got after the step 
"make noc_block_gain_tb":

"/bin/sh: 1: source: not found
CMakeFiles/noc_block_gain_tb.dir/build.make:57: recipe for target 
'CMakeFiles/noc_block_gain_tb' failed
make[3]: *** [CMakeFiles/noc_block_gain_tb] Error 127
CMakeFiles/Makefile2:131: recipe for target 
'CMakeFiles/noc_block_gain_tb.dir/all' failed
make[2]: *** [CMakeFiles/noc_block_gain_tb.dir/all] Error 2
CMakeFiles/Makefile2:138: recipe for target 
'CMakeFiles/noc_block_gain_tb.dir/rule' failed
make[1]: *** [CMakeFiles/noc_block_gain_tb.dir/rule] Error 2
Makefile:201: recipe for target 'noc_block_gain_tb' failed
make: *** [noc_block_gain_tb] Error 2"

I know I am using bash as my default shell by "echo $0"
I have added the block gain.
I think there might be something wrong with cmake. I see some warning when I do 
"cmake ../" in the ~/rfnoc/src/rfnoc-tutorial/build directory. It shows this:
"...
Checking for GNU Radio Module: RUNTIME
-- Checking for module 'gnuradio-runtime'
--   Found gnuradio-runtime, version 3.7.12git
 * INCLUDES=/root/rfnoc/include
 * 
LIBS=/root/rfnoc/lib/libgnuradio-runtime.so;/root/rfnoc/lib/libgnuradio-pmt.so;/usr/lib/liblog4cpp.so
-- Found GNURADIO_RUNTIME: 
/root/rfnoc/lib/libgnuradio-runtime.so;/root/rfnoc/lib/libgnuradio-pmt.so;/usr/lib/liblog4cpp.so
GNURADIO_RUNTIME_FOUND = TRUE
-- Checking for module 'ettus'
--   No package 'ettus' found
-- Found ETTUS: /root/rfnoc/lib/libgnuradio-ettus.so
 * INCLUDES = /root/rfnoc/include
 * LIBS = /root/rfnoc/lib/libgnuradio-ettus.so
-- Checking for module 'fpga'
--   No package 'fpga' found
-- Found FPGA: /root/rfnoc/src/uhd-fpga
CMake Warning (dev) at cmake/Modules/GrTest.cmake:45 (get_target_property):
  Policy CMP0026 is not set: Disallow use of the LOCATION target property.
  Run "cmake --help-policy CMP0026" for policy details.  Use the cmake_policy
  command to set the policy and suppress this warning.

  The LOCATION property should not be read from target "test-tutorial".  Use
  the target name directly with add_custom_command, or use the generator
  expression $, as appropriate.

Call Stack (most recent call first):
  lib/CMakeLists.txt:85 (GR_ADD_TEST)
This warning is for project developers.  Use -Wno-dev to suppress it.
..."

I find that there is another uhd-fpga folder in 
/~/rfnoc/src/rfnoc-tutorial/rfnoc. Is this the actual location I should provide 
for the fpga repository? Please give me some ideas. Thank you in advance!

Chen

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[USRP-users] file_souce block for RFNoC

2018-04-04 Thread Xingjian Chen via USRP-users

Hi there,

I find the "file_source" block in RFNoC for X310. Is there any example or 
tutorial how to use it by either UHD C++ or GNURadio? I am new to RFNoC and 
trying to get started with transmitting a waveform from a source file in a host 
computer. Thank you!
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[USRP-users] E312 RFNOC timed command for setup gain

2020-01-22 Thread Xingjian Chen via USRP-users

Hi,
Is there a way to use timed command for E312 rfnoc siggen module for setup gain?
I am trying something like below. Is this the right way? Thank you.

uhd::time_spec_t cmd_time = time_ref + 
uhd::time_spec_t(i*256/28e6*10*2000*10);
ctrl_siggen_ch0->set_command_time(cmd_time);
ctrl_siggen_ch0->set_arg("gain", 3086) ;


James
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[USRP-users] How does recv() stops siggen?

2020-11-25 Thread Xingjian Chen via USRP-users

Dear all,
I combined noc_block_siggen and noc_block_fir_filter to transmit pulses with 
its samples can be updated using a E312. I borrowed some code from the 
axi_fir_filter.v for sample update. The updated samples are stored in block 
memory. The transmitter works well for both channels.  However, after I added 
receiver blocks it gave me a strange error:

"Uterminate called after throwing an instance of 'uhd::io_error'
  what():  EnvironmentError: IOError: Block ctrl (CE_00_Port_10) packet parse 
error - EnvironmentError: IOError: Expected packet index: 983 Received index: 
982
s: line 14:  1820 Aborted"
Here are some questions:

  1.  I guess "CE_00_Port_10" is  one of the noc_block_siggen  port, but not 
sure...
  2.  This error happens when I start transmitting and update tx channel 2. My 
tx channel 1 works fine with the receiver with no error. I have tried to find 
any the difference between the codes in verilog and c++ for the two tx 
channels. I used the same rfnoc module(same verilog .v files) in e310_core. 
Just not sure where the difference could be...
  3.  I also find that rx_stream->recv() stops the transmission and triggers 
the error. For example, after start transmitting and update tx channel 2 
samples, tx channel 2 can transmit updated waveform. As long as 
rx_stream->recv() started after the sample update, the transmission is killed. 
Then after several samples received, the whole program exited with the error.
My first thought was to manage my transmit and receive threads in order to let 
receive thread wait for the tx sample update. However, no mater how long 
receiver wait for the update, the next rx_stream->recv() will stop the program.
  4.  I don't know how the receiver stream could related to the transmitter. I 
used set_taps() for tx sample update. Since set_taps() related to writing 
register (sr_write(SR_RELOAD, uint32_t(taps[i]));), I have checked 
clear_tx_stream in axi_wrapper but it is not related to this issue in my case. 
I also checked EOB for the transmitter, it seems not related to this issue too.
http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2018-May/056462.html
http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2017-June/053210.html

Any ideas and comments about this question are welcome. Thank you in advance!!!



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[USRP-users] Fw: E312 rfnoc_radio_loopback.cpp FPGA image

2019-01-09 Thread Xingjian Chen via USRP-users

Dear all,

I am working on the rfnoc_radio_loopback.cpp example in the latest UHD 
repository on my E312. This loopback example seems requires two radio blocks. 
May I know how to build the FPGA image to have two radios blocks on the device 
such as Radio_0 and Radio_1? Currently, I can build an image with only one 
radio by the following common:

 ./uhd_image_builder.py window fft -d e310 -t E310_RFNOC_sg3 -m 5 
--fill-with-fifos

Is there any existed image I should download for this rfnoc_radio_loopback 
example for E312? Thank you.


James
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Re: [USRP-users] E312 rfnoc_radio_loopback.cpp FPGA image

2019-01-10 Thread Xingjian Chen via USRP-users

It works by setting tx-blockid to 0/Radio_0 and tx-chan to 1.  I think there is 
only one radio in E312 but two channels for tx and two channels for rx. Here is 
a reference below.

http://ettus.80997.x6.nabble.com/USRP-users-RFNoC-Radio-Select-B-E312-E310-and-GPSDO-td8395.html


James


From: USRP-users  on behalf of Xingjian 
Chen via USRP-users 
Sent: Wednesday, January 9, 2019 10:37:20 PM
To: USRP-users@lists.ettus.com
Subject: [USRP-users] Fw: E312 rfnoc_radio_loopback.cpp FPGA image


Dear all,

I am working on the rfnoc_radio_loopback.cpp example in the latest UHD 
repository on my E312. This loopback example seems requires two radio blocks. 
May I know how to build the FPGA image to have two radios blocks on the device 
such as Radio_0 and Radio_1? Currently, I can build an image with only one 
radio by the following common:

 ./uhd_image_builder.py window fft -d e310 -t E310_RFNOC_sg3 -m 5 
--fill-with-fifos

Is there any existed image I should download for this rfnoc_radio_loopback 
example for E312? Thank you.


James
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[USRP-users] X310 Replay Block and receiver timming

2019-02-05 Thread Xingjian Chen via USRP-users

Hi,
Is there any method can control the timing for the RFNOC Replay Block in X310?
I tried adding time spec but the transmitter failed to start. In fact, as long 
as I set "stream_cmd.stream_now = false;"  then, the transmitter will not turn 
on unless set it back to true and power restart the X310.

stream_cmd.time_spec = tx_radio_ctrl->get_time_now() + uhd::time_spec_t(2.0 );
replay_ctrl->issue_stream_cmd(stream_cmd, replay_chan);

Also, I tried using timed command, but no luck.
The goal of the project is to transmit and receive pulses at the same time and 
get the timing well controlled. We succeeded in doing so by having a clock 
trigger in the Verilog file. I am wondering if it is possible by just using UHD 
command in c++ level to align transmitter and receiver in time. Thank you for 
your time.

James
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[USRP-users] Two receive channels simultaneously for E312

2019-03-26 Thread Xingjian Chen via USRP-users

Dear all,
Good morning. What is the right way to use two receive channels simultaneously 
for E312 with RFNOC radio and UHD cpp control? Thank you in advance.

There is only a receiver radio block and I have set up the rx streamer:

rx_radio_ctrl->set_rx_streamer(true, rx_chan);
rx_radio_ctrl->set_rx_streamer(true, rx_chan_1);
std::cout << "Samples per packet: " << spp << std::endl;
uhd::stream_args_t stream_args(format, "sc16");
stream_args.args = streamer_args;
stream_args.args["spp"] = boost::lexical_cast(spp);
stream_args.args["block_id0"] = "0/Radio_0";
stream_args.args["block_id1"] = "0/Radio_0";
stream_args.args["block_port0"] = "0";
stream_args.args["block_port1"] = "1";
stream_args.channels.push_back(0);
stream_args.channels.push_back(1);
std::cout << "Using streamer args: " << stream_args.args.to_string() << 
std::endl;
uhd::rx_streamer::sptr rx_stream = dev->get_rx_stream(stream_args);

I have set up the buffer for two channels in "recv_to_file" template according 
to rx_multi_samples.cpp:

std::vector> 
buff(2,std::vector(samps_per_buff) );
//create a vector of pointers to point to each of the channel buffers
std::vector buff_ptrs;
for (size_t i = 0; i < buff.size(); i++) 
buff_ptrs.push_back(&buff[i].front());

I am not sure if I miss anything up to this point. Where I get stuck is I 
cannot receive any sample from the radio. I don't know if that is caused by the 
stream_cmd. If using the following code for stream_cmd, then timeout while 
streaming...

// This code gives me "Timeout while streaming" error.
uhd::stream_cmd_t 
stream_cmd(uhd::stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_DONE);
stream_cmd.num_samps = size_t(num_requested_samples);
stream_cmd.stream_now = true;
stream_cmd.time_spec = uhd::time_spec_t();
std::cout << "Issueing stream cmd" << std::endl;
rx_stream->issue_stream_cmd(stream_cmd);
size_t num_rx_samps = rx_stream->recv(buff_ptrs, samps_per_buff, md, 3.0, 
enable_size_map);

If using the following code for stream_cmd, then num_rx_samps = 0.

// This code gives me num_rx_samps = 0
uhd::stream_cmd_t 
stream_cmd(uhd::stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_DONE);
stream_cmd.num_samps = total_num_samps;
stream_cmd.stream_now = false;
stream_cmd.time_spec = uhd::time_spec_t(seconds_in_future);
std::cout << "Issueing stream cmd" << std::endl;
rx_stream->issue_stream_cmd(stream_cmd);
size_t num_rx_samps = rx_stream->recv(buff_ptrs, samps_per_buff, md, 3.0, 
enable_size_map);
std::cout << "num_rx_samps = "

Re: [USRP-users] Two receive channels simultaneously for E312

2019-03-26 Thread Xingjian Chen via USRP-users

I made it worked by modifying the second code for stream_cmd by passing a time 
reference to stream_cmd.time_spec.

uhd::time_spec_t time_ref = rx_radio_ctrl->get_time_now();
stream_cmd.time_spec = time_ref + uhd::time_spec_t(seconds_in_future);



From: USRP-users  on behalf of Xingjian 
Chen via USRP-users 
Sent: Tuesday, March 26, 2019 11:25:05 AM
To: USRP-users@lists.ettus.com
Cc: usrp-users-boun...@lists.ettus.com
Subject: [USRP-users] Two receive channels simultaneously for E312

Dear all,
Good morning. What is the right way to use two receive channels simultaneously 
for E312 with RFNOC radio and UHD cpp control? Thank you in advance.

There is only a receiver radio block and I have set up the rx streamer:

rx_radio_ctrl->set_rx_streamer(true, rx_chan);
rx_radio_ctrl->set_rx_streamer(true, rx_chan_1);
std::cout << "Samples per packet: " << spp << std::endl;
uhd::stream_args_t stream_args(format, "sc16");
stream_args.args = streamer_args;
stream_args.args["spp"] = boost::lexical_cast(spp);
stream_args.args["block_id0"] = "0/Radio_0";
stream_args.args["block_id1"] = "0/Radio_0";
stream_args.args["block_port0"] = "0";
stream_args.args["block_port1"] = "1";
stream_args.channels.push_back(0);
stream_args.channels.push_back(1);
std::cout << "Using streamer args: " << stream_args.args.to_string() << 
std::endl;
uhd::rx_streamer::sptr rx_stream = dev->get_rx_stream(stream_args);

I have set up the buffer for two channels in "recv_to_file" template according 
to rx_multi_samples.cpp:

std::vector> 
buff(2,std::vector(samps_per_buff) );
//create a vector of pointers to point to each of the channel buffers
std::vector buff_ptrs;
for (size_t i = 0; i < buff.size(); i++) 
buff_ptrs.push_back(&buff[i].front());

I am not sure if I miss anything up to this point. Where I get stuck is I 
cannot receive any sample from the radio. I don't know if that is caused by the 
stream_cmd. If using the following code for stream_cmd, then timeout while 
streaming...

// This code gives me "Timeout while streaming" error.
uhd::stream_cmd_t 
stream_cmd(uhd::stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_DONE);
stream_cmd.num_samps = size_t(num_requested_samples);
stream_cmd.stream_now = true;
stream_cmd.time_spec = uhd::time_spec_t();
std::cout << "Issueing stream cmd" << std::endl;
rx_stream->issue_stream_cmd(stream_cmd);
size_t num_rx_samps = rx_stream->recv(buff_ptrs, samps_per_buff, md, 3.0, 
enable_size_map);

If using the following code for stream_cmd, then num_rx_samps = 0.

// This code gives me num_rx_samps = 0
uhd::stream_cmd_t 
stream_cmd(uhd::stream_cmd_t::STREAM_MODE_NUM_SAMPS_AND_DONE);
stream_cmd.num_samps = total_num_samps;
stream_cmd.stream_now = false;
stream_cmd.time_spec = uhd::time_spec_t(seconds_in_future);
std::cout << "Issueing stream cmd" << std::endl;
rx_stream->issue_stream_cmd(stream_cmd);
size_t num_rx_samps = rx_stream->recv(buff_ptrs, samps_per_buff, md, 3.0, 
enable_size_map);
std::cout << "num_rx_samps = "<https://files.ettus.com/manual/structuhd_1_1stream__args__t.html
2. https://github.com/manuts/uhd-examples/blob/master/rx_multi_samples.cpp




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[USRP-users] What is the best way to trigger rfnoc receiver radio?

2019-04-03 Thread Xingjian Chen via USRP-users

Dear all,
I have some questions about how to trigger RFNOC receiver. I have a module 
detecting the rising edge of a fixed clock. I used that clock to trigger Tx and 
Rx modules. Now the transmit RFNOC module is working properly but the receive 
module gives me non-deterministic m_axis_data_tvalid such that I cannot 
determine when the Rx radio started recording. I am wondering if anyone know 
how to use a clock or any trigger to let RFNOC Rx radio starting to record 
signal? The USRP I am using now is E312. Thank you!

James
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[USRP-users] Two RFNOC tx blocks timing and Bus

2019-04-08 Thread Xingjian Chen via USRP-users

Dear All,
I am doing FPGA debugging with an E312. I have two exactly same signal 
generation RFNOC modules run simultaneously. The waveform is triggered by a 
reference clock generated in Verilog at the same time. What I found is that 
when the waveform went from RFNOC module to noc_block_radio_core in 
tx_control_gen3.v, the initial phase relative to the reference clock changed, 
the waveform in one tx channel is delayed by half cycle than the other tx 
channel. And when I tested and recorded one of the channels' timing by 
chipscope ila tool. There is a roughly 50% chance that I get a right initial 
phase and 50% chance that I get the half cycle delayed version.
I think this is due to competition between two tx modules when both were 
sending packets to the bus, the AXI Wrapper or the NOC shell randomly picked 
one of them to go first and then alternating the data transferring.
What I would like to do is to transmit two fixed initial phase waveforms 
relative to a reference clock. Could you please give me some hint that how to 
deal with this problem?
I think maybe I can make two different RFNOC modules such that the first tx 
module always waiting for the second module at the starting moment. Maybe I 
should play with the "s_axis_data_tvalid". But I don't know how to set this up 
with AXI Wrapper and NOC shell. Thank you for your help!
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Re: [USRP-users] Two RFNOC tx blocks timing and Bus

2019-04-08 Thread Xingjian Chen via USRP-users

Hi Leo,

I get your idea. Thank you.


references:

http://ettus.80997.x6.nabble.com/USRP-users-vita-time-td9675.html
https://conferences.sigcomm.org/sigcomm/2013/papers/srif/p45.pdf

https://corvid.io/2017/04/22/stupid-rfnoc-tricks-loopback/

https://files.ettus.com/manual/page_rtp.html

https://static1.squarespace.com/static/543ae9afe4b0c3b808d72acd/t/55f85bc2e4b067b8c2af4eaf/1442339778410/3-pendlum_jonathon-rfnoc_tutorial_fpga.pdf

https://github.com/EttusResearch/fpga/blob/rfnoc-devel/usrp3/vita_chdr.txt

http://lists.ettus.com/pipermail/usrp-users_lists.ettus.com/2017-March/051998.html

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[USRP-users] vita_time in noc_shell and axi_wrapper

2019-04-09 Thread Xingjian Chen via USRP-users

Dear all,
 What is the difference for vita_time between the vita_time in noc_shell and 
axi_wrapper in a RFNOC module?
I noticed that there is vita_time input for noc_shell, but also a vita_time can 
be included in the axi_wrapper input s_axis_data_tuser. I guess that for 
noc_shell, the vita_time input is for the universal synchronization time 
between modules. And the vita_time in the axi_wrapper input s_axis_data_tuser 
is for schedule a future command. For example, I can add a delay time for 
transmission in the header in s_axis_data_tuser in siggen rfnoc example.
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[USRP-users] E312 RFNOC time update

2019-04-18 Thread Xingjian Chen via USRP-users

Dear All,

For E312 RFNOC, I have a question about updating time for both tx and rx chain. 
I would like to send and receive pulses at a certain time simultaneously(As 
long as they happen at the same time, it is fine).


I have already set this up by playing with vita time in FPGA and time_spec in 
C++. However, there is an additional requirement in my application. I need to 
update the transmitted waveform frequently, but which breaks my timing. Long 
story short, I think the problem is that when I send an updated waveform into 
block memory in the RFNOC module through a register similar to "set_taps()" in 
FIR example, the new pulses only transmitted whenever it finished the update 
rather than following the initial time spec. I think the initial timing for the 
transmit module is fixed when my tx stream is defined:

auto tx_stream = dev->get_tx_stream(stream_args_tx) ;


Because I set up the initial time information in vita time code in my transmit 
RFNOC Verilog code by using "cvita_hdr_modify", I cannot update the time 
information.


So, my preliminary idea is to set the FPGA system time to 
zero(set_time_next_pps(0)) if the waveform is updated. But it is hard to set 
the time right at the C++ level for both tx and rx after this time reset. I 
always get late command error from the receiving radio.


My question is that how do you usually update or reset the vita time if the 
timing is broken? Any ideas and commons are welcome.



James
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[USRP-users] How to insert an EOB for rfnoc transmission?

2019-04-24 Thread Xingjian Chen via USRP-users

Hi Guys,
Good morning. I am wondering how to insert an EOB in Verilog code to the radio. 
 What I have tried is cvita_hdr_modify as below. I think just change EOB bit 
should put the tx radio into the idle state. However, when the EOB changed, my 
E312 returned an error as below.  There is a register I used for updating 
coefficients in FPGA, but it should not be related to EOB. Thank you.

  wire [63:0] future_vita_time ;
  wire eob;
  wire has_time;
  cvita_hdr_modify cvita_hdr_modify_data (
   .header_in(m_axis_data_tuser),
   .header_out(s_axis_data_tuser),
   .use_pkt_type(1'b0), .pkt_type(),
   .use_has_time(1'b1), .has_time(has_time),
   .use_eob(1'b1), .eob(eob),
   .use_seqnum(1'b0), .seqnum(),
   .use_length(1'b1), .length(payload_length),
   .use_src_sid(1'b1), .src_sid(src_sid),
   .use_dst_sid(1'b1), .dst_sid(next_dst_sid),
   .use_vita_time(1'b1), .vita_time(future_vita_time));

Returned Error:
sr_write() failed: EnvironmentError: IOError: Block ctrl (CE_01_Port_20) no 
response packet
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Re: [USRP-users] How to insert an EOB for rfnoc transmission?