Dear All, For E312 RFNOC, I have a question about updating time for both tx and rx chain. I would like to send and receive pulses at a certain time simultaneously(As long as they happen at the same time, it is fine).
I have already set this up by playing with vita time in FPGA and time_spec in C++. However, there is an additional requirement in my application. I need to update the transmitted waveform frequently, but which breaks my timing. Long story short, I think the problem is that when I send an updated waveform into block memory in the RFNOC module through a register similar to "set_taps()" in FIR example, the new pulses only transmitted whenever it finished the update rather than following the initial time spec. I think the initial timing for the transmit module is fixed when my tx stream is defined: auto tx_stream = dev->get_tx_stream(stream_args_tx) ; Because I set up the initial time information in vita time code in my transmit RFNOC Verilog code by using "cvita_hdr_modify", I cannot update the time information. So, my preliminary idea is to set the FPGA system time to zero(set_time_next_pps(0)) if the waveform is updated. But it is hard to set the time right at the C++ level for both tx and rx after this time reset. I always get late command error from the receiving radio. My question is that how do you usually update or reset the vita time if the timing is broken? Any ideas and commons are welcome. James
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