[U-Boot] [PATCH 1/7] system halt when we enable bucks of PMIC rk808
From: "eric.gao" if we enable PMIC rk808,the system will halt at very early stage ,log is shown as bellow. INFO:plat_rockchip_pmu_init(1211): pd status 3e INFO:BL31: Initializing runtime services INFO:BL31: Preparing for EL3 exit to normal world INFO:Entry point address = 0x20 INFO:SPSR = 0x3c9 time 44561b, 0 (<compatible) { <<-- if (!strcmp(of_match->compatible, compat)) { *of_idp = of_match; return 0; } of_match++; } Signed-off-by: eric.gao --- arch/arm/mach-rockchip/rk3399/syscon_rk3399.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c index d32985b..74d4552 100644 --- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c @@ -14,6 +14,7 @@ static const struct udevice_id rk3399_syscon_ids[] = { { .compatible = "rockchip,rk3399-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF }, { .compatible = "rockchip,rk3399-pmusgrf", .data = ROCKCHIP_SYSCON_PMUSGRF }, { .compatible = "rockchip,rk3399-cic", .data = ROCKCHIP_SYSCON_CIC }, + { } }; U_BOOT_DRIVER(syscon_rk3399) = { -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 0/7] Enable MIPI dsi display for rk3399
From: "eric.gao" This serial patchs enable mipi dsi display for rk3399,and let the system log print to lcd. The function of each patch is decribe in the following.Thank you. Patch 1: Fix system halt when we enable bucks of PMIC rk808. Patch 2: Enable i2c for rk3399. Patch 3: Enable PMIC rk808 for display system using. Patch 4: Enable rkclk init,prepare aclk dclk for vop. Patch 5: Add mipi display,panel driver and so on. Patch 6: Enable print log to lcd. Patch 7: Fix crash when scrolling screen. eric.gao (7): system halt when we enable bucks of PMIC rk808 Enable i2c for rk3399 Enable RK808 for rk3399 evb Enable rkclk init function Add mipi display support for rk3399 && rk3288 Enable print log file to lcd crash when scroll screen arch/arm/dts/rk3399-evb.dts | 141 + arch/arm/dts/rk3399.dtsi | 88 ++ arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 2 +- arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 203 + arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + arch/arm/mach-rockchip/rk3399/syscon_rk3399.c| 1 + configs/evb-rk3399_defconfig | 11 + drivers/clk/rockchip/clk_rk3399.c| 4 + drivers/i2c/rk_i2c.c | 1 + drivers/video/Kconfig| 2 + drivers/video/console_normal.c | 2 +- drivers/video/rockchip/Kconfig | 44 +++ drivers/video/rockchip/Makefile | 7 +- drivers/video/rockchip/panel.c | 81 + drivers/video/rockchip/rk_mipi.c | 371 +++ drivers/video/rockchip/rk_vop.c | 12 +- include/configs/rk3399_common.h | 5 +- 17 files changed, 969 insertions(+), 7 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h create mode 100644 drivers/video/rockchip/Kconfig create mode 100644 drivers/video/rockchip/panel.c create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 3/7] Enable RK808 for rk3399 evb
From: "eric.gao"
Signed-off-by: eric.gao
---
arch/arm/dts/rk3399-evb.dts | 108 +++
configs/evb-rk3399_defconfig | 5 ++
2 files changed, 113 insertions(+)
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index a959989..7a889c7 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -51,6 +51,22 @@
regulator-name = "vcc5v0_host";
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
};
+
+ vccsys: vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vccsys";
+ regulator-boot-on;
+ regulator-always-on;
+ };
+ vcc33_sys: vcc33-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc33_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ vin-supply = <&vccsys>;
+ };
};
&emmc_phy {
@@ -110,6 +126,98 @@
status = "okay";
};
+&i2c0 {
+ status = "okay";
+
+ clock-frequency = <40>;
+ i2c-scl-falling-time-ns = <50>;
+ i2c-scl-rising-time-ns = <100>;
+ u-boot,dm-pre-reloc;
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ clock-output-names = "xin32k", "wifibt_32kin";
+ interrupt-parent = <&gpio0>;
+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ reg = <0x1b>;
+ rockchip,system-power-controller;
+ #clock-cells = <1>;
+ u-boot,dm-pre-reloc;
+ status = "okay";
+
+ vcc1-supply = <&vcc33_sys>;
+ vcc2-supply = <&vcc33_sys>;
+ vcc3-supply = <&vcc33_sys>;
+ vcc4-supply = <&vcc33_sys>;
+ vcc6-supply = <&vcc33_sys>;
+ vcc7-supply = <&vcc33_sys>;
+ vcc11-supply = <&vcc33_sys>;
+ vcc12-supply = <&vcc33_sys>;
+ vddio-supply = <&vcc1v8>;
+ regulators {
+ vdd_cpu_b: DCDC_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <75>;
+ regulator-max-microvolt = <145>;
+ regulator-name = "vdd_cpu_b";
+ };
+
+ vdd_cpu_l: DCDC_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <75>;
+ regulator-max-microvolt = <145>;
+ regulator-name = "vdd_cpu_l";
+ };
+
+ vcc135_ddr: DCDC_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc135_ddr";
+ };
+
+ vcc18: DCDC_REG4 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-name = "vcc_18";
+ };
+
+ vcc1v8_dvp: LDO_REG1 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-name = "vcc18_dvp";
+ };
+
+ vcc1v8: LDO_REG3 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <180>;
+ regulator-max-microvolt = <180>;
+ regulator-name = "vdd_18";
+ };
+
+ vcc3v0: LDO_REG8 {
+ regulator-min-microvolt = <300>;
+ regulator-max-microvolt = <300>;
+ regulator-name = "vcc3v0";
+ };
+
+ vcc33_lcd: SWITCH_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc33_lcd";
+ };
+ };
+ };
+};
+
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
diff --git
[U-Boot] [PATCH 0/7] Enable MIPI dsi display for rk3399
From: "eric.gao" This serial patchs enable mipi dsi display for rk3399,and let the system log print to lcd. The function of each patch is decribe in the following.Thank you. Patch 1: Fix system halt when we enable bucks of PMIC rk808. Patch 2: Enable i2c for rk3399. Patch 3: Enable PMIC rk808 for display system using. Patch 4: Enable rkclk init,prepare aclk dclk for vop. Patch 5: Add mipi display,panel driver and so on. Patch 6: Enable print log to lcd. Patch 7: Fix crash when scrolling screen. eric.gao (7): system halt when we enable bucks of PMIC rk808 Enable i2c for rk3399 Enable RK808 for rk3399 evb Enable rkclk init function Add mipi display support for rk3399 && rk3288 Enable print log file to lcd crash when scroll screen arch/arm/dts/rk3399-evb.dts | 141 + arch/arm/dts/rk3399.dtsi | 88 ++ arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 2 +- arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 203 + arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + arch/arm/mach-rockchip/rk3399/syscon_rk3399.c| 1 + configs/evb-rk3399_defconfig | 11 + drivers/clk/rockchip/clk_rk3399.c| 4 + drivers/i2c/rk_i2c.c | 1 + drivers/video/Kconfig| 2 + drivers/video/console_normal.c | 2 +- drivers/video/rockchip/Kconfig | 44 +++ drivers/video/rockchip/Makefile | 7 +- drivers/video/rockchip/panel.c | 81 + drivers/video/rockchip/rk_mipi.c | 371 +++ drivers/video/rockchip/rk_vop.c | 12 +- include/configs/rk3399_common.h | 5 +- 17 files changed, 969 insertions(+), 7 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h create mode 100644 drivers/video/rockchip/Kconfig create mode 100644 drivers/video/rockchip/panel.c create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 4/7] Enable rkclk init function
From: "eric.gao"
Signed-off-by: eric.gao
---
drivers/clk/rockchip/clk_rk3399.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3399.c
b/drivers/clk/rockchip/clk_rk3399.c
index 922ce7e..cfcd1e4 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -20,6 +20,10 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_SPL_BUILD
+#endif
+
#if CONFIG_IS_ENABLED(OF_PLATDATA)
struct rk3399_clk_plat {
struct dtd_rockchip_rk3399_cru dtd;
--
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[U-Boot] [PATCH 6/7] Enable print log file to lcd
From: "eric.gao" Signed-off-by: eric.gao --- configs/evb-rk3399_defconfig| 1 + include/configs/rk3399_common.h | 5 - 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index b9cb0e8..89b2e17 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -68,3 +68,4 @@ CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_MIPI=y +CONFIG_VIDCONSOLE_AS_LCD=y diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index 4ba81ac..6183f4e 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -69,7 +69,10 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \ "partitions=" PARTS_DEFAULT \ - BOOTENV + BOOTENV \ + "stdin=serial,cros-ec-keyb\0" \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" #endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/7] Enable i2c for rk3399
From: "eric.gao"
Signed-off-by: eric.gao
---
arch/arm/dts/rk3399.dtsi | 16
configs/evb-rk3399_defconfig | 1 +
drivers/i2c/rk_i2c.c | 1 +
3 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 456fdb6..93e3bf4 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -26,6 +26,7 @@
serial4 = &uart4;
mmc0 = &sdhci;
mmc1 = &sdmmc;
+ i2c0 = &i2c0;
};
cpus {
@@ -651,6 +652,21 @@
status = "disabled";
};
+ i2c0: i2c@ff3c {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x0 0xff3c 0x0 0x1000>;
+ assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
+ assigned-clock-rates = <2>;
+ clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
+ clock-names = "i2c", "pclk";
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_xfer>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pinctrl";
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index bedc1fd..2e2f9a8 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -58,3 +58,4 @@ CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_I2C_ROCKCHIP=y
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 7c701cb..a4c8c2ba 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -381,6 +381,7 @@ static const struct dm_i2c_ops rockchip_i2c_ops = {
static const struct udevice_id rockchip_i2c_ids[] = {
{ .compatible = "rockchip,rk3288-i2c" },
+ { .compatible = "rockchip,rk3399-i2c" },
{ }
};
--
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[U-Boot] [PATCH 1/7] system halt when we enable bucks of PMIC rk808
From: "eric.gao" if we enable PMIC rk808,the system will halt at very early stage ,log is shown as bellow. INFO:plat_rockchip_pmu_init(1211): pd status 3e INFO:BL31: Initializing runtime services INFO:BL31: Preparing for EL3 exit to normal world INFO:Entry point address = 0x20 INFO:SPSR = 0x3c9 time 44561b, 0 (<compatible) { <<-- if (!strcmp(of_match->compatible, compat)) { *of_idp = of_match; return 0; } of_match++; } Signed-off-by: eric.gao --- arch/arm/mach-rockchip/rk3399/syscon_rk3399.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c index d32985b..74d4552 100644 --- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c +++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c @@ -14,6 +14,7 @@ static const struct udevice_id rk3399_syscon_ids[] = { { .compatible = "rockchip,rk3399-pmugrf", .data = ROCKCHIP_SYSCON_PMUGRF }, { .compatible = "rockchip,rk3399-pmusgrf", .data = ROCKCHIP_SYSCON_PMUSGRF }, { .compatible = "rockchip,rk3399-cic", .data = ROCKCHIP_SYSCON_CIC }, + { } }; U_BOOT_DRIVER(syscon_rk3399) = { -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 5/7] Add mipi display support for rk3399 && rk3288
From: "eric.gao"
Signed-off-by: eric.gao
---
arch/arm/dts/rk3399-evb.dts | 33 ++
arch/arm/dts/rk3399.dtsi | 72 +
arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 2 +-
arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 203 +
arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 +
configs/evb-rk3399_defconfig | 4 +
drivers/video/Kconfig| 2 +
drivers/video/rockchip/Kconfig | 44 +++
drivers/video/rockchip/Makefile | 7 +-
drivers/video/rockchip/panel.c | 81 +
drivers/video/rockchip/rk_mipi.c | 371 +++
drivers/video/rockchip/rk_vop.c | 12 +-
12 files changed, 827 insertions(+), 5 deletions(-)
create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
create mode 100644 drivers/video/rockchip/Kconfig
create mode 100644 drivers/video/rockchip/panel.c
create mode 100644 drivers/video/rockchip/rk_mipi.c
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 7a889c7..abb00e8 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -52,6 +52,10 @@
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
};
+ panel:panel {
+ compatible = "BOE,TV080WUM";
+ status = "disabled";
+ };
vccsys: vccsys {
compatible = "regulator-fixed";
regulator-name = "vccsys";
@@ -218,6 +222,35 @@
};
};
+&panel {
+ backlight_en = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+ backlight_pwm = <&gpio4 18 GPIO_ACTIVE_HIGH>;
+ power-supply = <&vcc33_lcd>;
+ status = "okay";
+};
+
+&mipi_dsi {
+ status = "okay";
+ display-timings {
+ timing0 {
+ bits-per-pixel = <24>;
+ clock-frequency = <16000>;
+ hfront-porch = <120>;
+ hsync-len = <20>;
+ hback-porch = <21>;
+ hactive = <1200>;
+ vfront-porch = <21>;
+ vsync-len = <3>;
+ vback-porch = <18>;
+ vactive = <1920>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+};
+
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 93e3bf4..c82e674 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -667,6 +667,78 @@
status = "disabled";
};
+ vopl: vop@ff8f {
+ u-boot,dm-pre-reloc;
+ compatible = "rockchip,rk3399-vop-lit";
+ reg = <0x0 0xff8f 0x0 0x3efc>;
+ interrupts = ;
+ clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+ resets = <&cru SRST_A_VOP1>, <&cru SRST_H_VOP1>, <&cru
SRST_D_VOP1>;
+ reset-names = "axi", "ahb", "dclk";
+ status = "okay";
+ vopl_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ vopl_out_mipi: endpoint@0 {
+ reg = <3>;
+ remote-endpoint = <&mipi_in_vopl>;
+ };
+ };
+ };
+
+ vopb: vop@ff90 {
+ u-boot,dm-pre-reloc;
+ compatible = "rockchip,rk3399-vop-big";
+ reg = <0x0 0xff90 0x0 0x3efc>;
+ interrupts = ;
+ clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
+ #clock-cells = <0>;
+ clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+ resets = <&cru SRST_A_VOP0>, <&cru SRST_H_VOP0>, <&cru
SRST_D_VOP0>;
+ reset-names = "axi", "ahb", "dclk";
+ /*power-domains = <&power RK3399_PD_VOPB>;*/
+ status = "okay";
+ vopb_out: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ vopb_out_mipi: endpoint@0 {
+ reg = <3>;
+ remote-endpoint = <&mipi_in_vopb>;
+ };
+ };
+ };
+
+ mipi_dsi: mipi@ff96 {
+ compatible = "rockchip,rk3399_mipi_dsi";
+ reg = <0x0 0xff96 0x0 0x8000>;
+ interrupts = ;
+ clocks = <&cru SCLK_MIPIDPHY_REF>, <&cru PCLK_MIPI_DSI0>,
+<&cru SCLK_DPHY_TX0_CFG>;
+ clock-names = "ref", "pclk", "phy_cfg";
+ rockchip,grf = <&grf>;
+ #address-cells = <1>;
+ #size-cells = <0
[U-Boot] [PATCH 7/7] crash when scroll screen
From: "eric.gao"
After enable log printing to lcd,when the screen start scroll,the
system crash.And the log is shown as bellow.
"Synchronous Abort" handler, esr 0x9645
"Synchronous Abort" handler, esr 0x9645
Checking the source code, we found that the variate "pixels"
get a wrong value.
int pixels = VIDEO_FONT_HEIGHT * vid_priv->line_length;
"pixels" here means the value of pixels for a character,rather than
the byte for a character. so the variate "pixels" is 4 times bigger
than it's exact value. which will cause the memory overflow when the
cpu run the following code.
for (i = 0; i < pixels; i++)
*dst++ = clr; <<
Signed-off-by: eric.gao
---
drivers/video/console_normal.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c
index 89a55dd..b627d48 100644
--- a/drivers/video/console_normal.c
+++ b/drivers/video/console_normal.c
@@ -18,7 +18,7 @@ static int console_normal_set_row(struct udevice *dev, uint
row, int clr)
{
struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent);
void *line;
- int pixels = VIDEO_FONT_HEIGHT * vid_priv->line_length;
+ int pixels = VIDEO_FONT_HEIGHT * vid_priv->xsize;
int i;
line = vid_priv->fb + row * VIDEO_FONT_HEIGHT * vid_priv->line_length;
--
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[U-Boot] [PATCH] rockchip: arm: halt when enable bucks of PMIC rk808
From: "Eric Gao"
when enable PMIC rk808,the system will halt at very
early stage,log is shown as bellow.
INFO:plat_rockchip_pmu_init(1211): pd status 3e
INFO:BL31: Initializing runtime services
INFO:BL31: Preparing for EL3 exit to normal world
INFO:Entry point address = 0x20
INFO:SPSR = 0x3c9
time 44561b, 0 (<<Just stop here)
It's caused by the absence of "{ }" in syscon_rk3399.c
,which will lead to memory overflow like below.According
to Sysmap file ,we can find the function buck_get_value
of rk808 is just follow the compatible struct,the pointer
"of_match" point to "buck_get_value",but it is not a
struct and don't have member of compatible, In this case,
system crash. So,on the face, it looks like that rk808 is
guilty.but he is really innocent.
while (of_match->compatible) { <<--
if (!strcmp(of_match->compatible, compat)) {
*of_idp = of_match;
return 0;
}
of_match++;
}
Signed-off-by: eric.gao
Signed-off-by: Eric Gao
---
arch/arm/mach-rockchip/rk3399/syscon_rk3399.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
index d32985b..74d4552 100644
--- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
@@ -14,6 +14,7 @@ static const struct udevice_id rk3399_syscon_ids[] = {
{ .compatible = "rockchip,rk3399-pmugrf", .data =
ROCKCHIP_SYSCON_PMUGRF },
{ .compatible = "rockchip,rk3399-pmusgrf", .data =
ROCKCHIP_SYSCON_PMUSGRF },
{ .compatible = "rockchip,rk3399-cic", .data = ROCKCHIP_SYSCON_CIC },
+ { }
};
U_BOOT_DRIVER(syscon_rk3399) = {
--
1.9.1
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[U-Boot] [PATCH] video: Crash when scroll screen
After enable log printing to lcd,when
the screen start scroll,system crash,
log is shown as bellow.
"Synchronous Abort" handler, esr 0x9645
"Synchronous Abort" handler, esr 0x9645
Checking the source code, we found that the
variate "pixels" get a wrong value.
int pixels = VIDEO_FONT_HEIGHT * vid_priv->line_length;
"pixels" here means the value of pixels for
a character,rather than the byte for a
character. so the variate "pixels" is 4 times
bigger than it's exact value. which will cause
the memory overflow when the cpu run the
following code.
for (i = 0; i < pixels; i++)
*dst++ = clr; <<
Signed-off-by: Eric Gao
---
drivers/video/console_normal.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c
index 89a55dd..b627d48 100644
--- a/drivers/video/console_normal.c
+++ b/drivers/video/console_normal.c
@@ -18,7 +18,7 @@ static int console_normal_set_row(struct udevice *dev, uint
row, int clr)
{
struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent);
void *line;
- int pixels = VIDEO_FONT_HEIGHT * vid_priv->line_length;
+ int pixels = VIDEO_FONT_HEIGHT * vid_priv->xsize;
int i;
line = vid_priv->fb + row * VIDEO_FONT_HEIGHT * vid_priv->line_length;
--
1.9.1
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[U-Boot] [PATCH 1/5] rockchip: i2c: enable i2c for rk3399
From: "eric.gao"
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: eric.gao
eric@rock-chips.com
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399.dtsi | 16
configs/evb-rk3399_defconfig | 1 +
drivers/i2c/rk_i2c.c | 1 +
3 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 456fdb6..93e3bf4 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -26,6 +26,7 @@
serial4 = &uart4;
mmc0 = &sdhci;
mmc1 = &sdmmc;
+ i2c0 = &i2c0;
};
cpus {
@@ -651,6 +652,21 @@
status = "disabled";
};
+ i2c0: i2c@ff3c {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x0 0xff3c 0x0 0x1000>;
+ assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
+ assigned-clock-rates = <2>;
+ clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
+ clock-names = "i2c", "pclk";
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_xfer>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pinctrl";
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index bedc1fd..2e2f9a8 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -58,3 +58,4 @@ CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_I2C_ROCKCHIP=y
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 7c701cb..a4c8c2ba 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -381,6 +381,7 @@ static const struct dm_i2c_ops rockchip_i2c_ops = {
static const struct udevice_id rockchip_i2c_ids[] = {
{ .compatible = "rockchip,rk3288-i2c" },
+ { .compatible = "rockchip,rk3399-i2c" },
{ }
};
--
1.9.1
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[U-Boot] [PATCH 0/5]
This serials patches add mipi dsi support for rk3399. Except the basic mipi driver, we need also enable pmic rk808 for lcd power and enable i2c for rk808 communication. what's more, the needed clk and pwm for backlight is init in spl stage, make sure spl work first. Eric Gao (3): rockchip: video: Add mipi dsi driver rockchip: Add dts config for mipi dsi rockchip: Enable mipi dsi configs eric.gao (2): rockchip: i2c: Enable i2c for rk3399 rockchip: pmic: Enable RK808 for rk3399 evb arch/arm/dts/rk3399-evb.dts | 123 ++ arch/arm/dts/rk3399.dtsi | 88 + arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 1 + arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++ arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 189 + arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + configs/evb-rk3399_defconfig | 12 + drivers/i2c/rk_i2c.c | 1 + drivers/video/Kconfig| 2 + drivers/video/rockchip/Kconfig | 47 +++ drivers/video/rockchip/Makefile | 6 +- drivers/video/rockchip/rk_mipi.c | 465 +++ drivers/video/rockchip/rk_vop.c | 39 +- 13 files changed, 992 insertions(+), 7 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h create mode 100644 drivers/video/rockchip/Kconfig create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/5] rockchip: i2c: enable i2c for rk3399
From: "eric.gao"
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: eric.gao
eric@rock-chips.com
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399.dtsi | 16
configs/evb-rk3399_defconfig | 1 +
drivers/i2c/rk_i2c.c | 1 +
3 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 456fdb6..93e3bf4 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -26,6 +26,7 @@
serial4 = &uart4;
mmc0 = &sdhci;
mmc1 = &sdmmc;
+ i2c0 = &i2c0;
};
cpus {
@@ -651,6 +652,21 @@
status = "disabled";
};
+ i2c0: i2c@ff3c {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x0 0xff3c 0x0 0x1000>;
+ assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
+ assigned-clock-rates = <2>;
+ clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
+ clock-names = "i2c", "pclk";
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_xfer>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pinctrl";
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index bedc1fd..2e2f9a8 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -58,3 +58,4 @@ CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_I2C_ROCKCHIP=y
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 7c701cb..a4c8c2ba 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -381,6 +381,7 @@ static const struct dm_i2c_ops rockchip_i2c_ops = {
static const struct udevice_id rockchip_i2c_ids[] = {
{ .compatible = "rockchip,rk3288-i2c" },
+ { .compatible = "rockchip,rk3399-i2c" },
{ }
};
--
1.9.1
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[U-Boot] [PATCH 0/5]
This serials patches add mipi dsi support for rk3399. Except the basic mipi driver, we need also enable pmic rk808 for lcd power and enable i2c for rk808 communication. what's more, the needed clk and pwm for backlight is init in spl stage, make sure spl work first. Eric Gao (3): rockchip: video: Add mipi dsi driver rockchip: Add dts config for mipi dsi rockchip: Enable mipi dsi configs eric.gao (2): rockchip: i2c: enable i2c for rk3399 rockchip: pmic: Enable RK808 for rk3399 evb arch/arm/dts/rk3399-evb.dts | 123 ++ arch/arm/dts/rk3399.dtsi | 88 + arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 1 + arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++ arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 189 + arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + configs/evb-rk3399_defconfig | 12 + drivers/i2c/rk_i2c.c | 1 + drivers/video/Kconfig| 2 + drivers/video/rockchip/Kconfig | 47 +++ drivers/video/rockchip/Makefile | 6 +- drivers/video/rockchip/rk_mipi.c | 465 +++ drivers/video/rockchip/rk_vop.c | 39 +- 13 files changed, 992 insertions(+), 7 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h create mode 100644 drivers/video/rockchip/Kconfig create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 0/5]
This serials patches add mipi dsi support for rk3399. Except the basic mipi driver, we need also enable pmic rk808 for lcd power and enable i2c for rk808 communication. what's more, the needed clk and pwm for backlight is init in spl stage, make sure spl work first. Eric Gao (3): rockchip: video: Add mipi dsi driver rockchip: Add dts config for mipi dsi rockchip: Enable mipi dsi configs eric.gao (2): rockchip: i2c: enable i2c for rk3399 rockchip: pmic: Enable RK808 for rk3399 evb arch/arm/dts/rk3399-evb.dts | 123 ++ arch/arm/dts/rk3399.dtsi | 88 + arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 1 + arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++ arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 189 + arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + configs/evb-rk3399_defconfig | 12 + drivers/i2c/rk_i2c.c | 1 + drivers/video/Kconfig| 2 + drivers/video/rockchip/Kconfig | 47 +++ drivers/video/rockchip/Makefile | 6 +- drivers/video/rockchip/rk_mipi.c | 465 +++ drivers/video/rockchip/rk_vop.c | 39 +- 13 files changed, 992 insertions(+), 7 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h create mode 100644 drivers/video/rockchip/Kconfig create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/5] rockchip: i2c: enable i2c for rk3399
From: "eric.gao"
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: eric.gao
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399.dtsi | 16
configs/evb-rk3399_defconfig | 1 +
drivers/i2c/rk_i2c.c | 1 +
3 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 456fdb6..93e3bf4 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -26,6 +26,7 @@
serial4 = &uart4;
mmc0 = &sdhci;
mmc1 = &sdmmc;
+ i2c0 = &i2c0;
};
cpus {
@@ -651,6 +652,21 @@
status = "disabled";
};
+ i2c0: i2c@ff3c {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x0 0xff3c 0x0 0x1000>;
+ assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
+ assigned-clock-rates = <2>;
+ clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
+ clock-names = "i2c", "pclk";
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_xfer>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pinctrl";
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index bedc1fd..2e2f9a8 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -58,3 +58,4 @@ CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_I2C_ROCKCHIP=y
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 7c701cb..a4c8c2ba 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -381,6 +381,7 @@ static const struct dm_i2c_ops rockchip_i2c_ops = {
static const struct udevice_id rockchip_i2c_ids[] = {
{ .compatible = "rockchip,rk3288-i2c" },
+ { .compatible = "rockchip,rk3399-i2c" },
{ }
};
--
1.9.1
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[U-Boot] [PATCH 0/5]
This serials patches add mipi dsi support for rk3399. Except the basic mipi driver, we need also enable pmic rk808 for lcd power and enable i2c for rk808 communication. what's more, the needed clk and pwm for backlight is init in spl stage, make sure spl work first. Eric Gao (3): rockchip: video: Add mipi dsi driver rockchip: Add dts config for mipi dsi rockchip: Enable mipi dsi configs eric.gao (2): rockchip: i2c: enable i2c for rk3399 rockchip: pmic: Enable RK808 for rk3399 evb arch/arm/dts/rk3399-evb.dts | 123 ++ arch/arm/dts/rk3399.dtsi | 88 + arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 1 + arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++ arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 189 + arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + configs/evb-rk3399_defconfig | 12 + drivers/i2c/rk_i2c.c | 1 + drivers/video/Kconfig| 2 + drivers/video/rockchip/Kconfig | 47 +++ drivers/video/rockchip/Makefile | 6 +- drivers/video/rockchip/rk_mipi.c | 465 +++ drivers/video/rockchip/rk_vop.c | 39 +- 13 files changed, 992 insertions(+), 7 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h create mode 100644 drivers/video/rockchip/Kconfig create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/5] rockchip: i2c: enable i2c for rk3399
From: "eric.gao"
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: eric.gao
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399.dtsi | 16
configs/evb-rk3399_defconfig | 1 +
drivers/i2c/rk_i2c.c | 1 +
3 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 456fdb6..93e3bf4 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -26,6 +26,7 @@
serial4 = &uart4;
mmc0 = &sdhci;
mmc1 = &sdmmc;
+ i2c0 = &i2c0;
};
cpus {
@@ -651,6 +652,21 @@
status = "disabled";
};
+ i2c0: i2c@ff3c {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x0 0xff3c 0x0 0x1000>;
+ assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
+ assigned-clock-rates = <2>;
+ clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
+ clock-names = "i2c", "pclk";
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_xfer>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pinctrl";
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index bedc1fd..2e2f9a8 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -58,3 +58,4 @@ CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_I2C_ROCKCHIP=y
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 7c701cb..a4c8c2ba 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -381,6 +381,7 @@ static const struct dm_i2c_ops rockchip_i2c_ops = {
static const struct udevice_id rockchip_i2c_ids[] = {
{ .compatible = "rockchip,rk3288-i2c" },
+ { .compatible = "rockchip,rk3399-i2c" },
{ }
};
--
1.9.1
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[U-Boot] [PATCH 0/5]
This serials patches add mipi dsi support for rk3399. Except the basic mipi driver, we need also enable pmic rk808 for lcd power and enable i2c for rk808 communication. what's more, the needed clk and pwm for backlight is init in spl stage, make sure spl work first. Eric Gao (3): rockchip: video: Add mipi dsi driver rockchip: Add dts config for mipi dsi rockchip: Enable mipi dsi configs eric.gao (2): rockchip: i2c: enable i2c for rk3399 rockchip: pmic: Enable RK808 for rk3399 evb arch/arm/dts/rk3399-evb.dts | 123 ++ arch/arm/dts/rk3399.dtsi | 88 + arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 1 + arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++ arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 189 + arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + configs/evb-rk3399_defconfig | 12 + drivers/i2c/rk_i2c.c | 1 + drivers/video/Kconfig| 2 + drivers/video/rockchip/Kconfig | 47 +++ drivers/video/rockchip/Makefile | 6 +- drivers/video/rockchip/rk_mipi.c | 465 +++ drivers/video/rockchip/rk_vop.c | 39 +- 13 files changed, 992 insertions(+), 7 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h create mode 100644 drivers/video/rockchip/Kconfig create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/5] rockchip: i2c: enable i2c for rk3399
From: "eric.gao"
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: eric.gao
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399.dtsi | 16
configs/evb-rk3399_defconfig | 1 +
drivers/i2c/rk_i2c.c | 1 +
3 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 456fdb6..93e3bf4 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -26,6 +26,7 @@
serial4 = &uart4;
mmc0 = &sdhci;
mmc1 = &sdmmc;
+ i2c0 = &i2c0;
};
cpus {
@@ -651,6 +652,21 @@
status = "disabled";
};
+ i2c0: i2c@ff3c {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x0 0xff3c 0x0 0x1000>;
+ assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
+ assigned-clock-rates = <2>;
+ clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
+ clock-names = "i2c", "pclk";
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_xfer>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pinctrl";
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index bedc1fd..2e2f9a8 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -58,3 +58,4 @@ CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_I2C_ROCKCHIP=y
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 7c701cb..a4c8c2ba 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -381,6 +381,7 @@ static const struct dm_i2c_ops rockchip_i2c_ops = {
static const struct udevice_id rockchip_i2c_ids[] = {
{ .compatible = "rockchip,rk3288-i2c" },
+ { .compatible = "rockchip,rk3399-i2c" },
{ }
};
--
1.9.1
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[U-Boot] [PATCH 0/5]
This serials patches add mipi dsi support for rk3399. Except the basic mipi driver, we need also enable pmic rk808 for lcd power and enable i2c for rk808 communication. what's more, the needed clk and pwm for backlight is init in spl stage, make sure spl work first. Eric Gao (3): rockchip: video: Add mipi dsi driver rockchip: Add dts config for mipi dsi rockchip: Enable mipi dsi configs eric.gao (2): rockchip: i2c: enable i2c for rk3399 rockchip: pmic: Enable RK808 for rk3399 evb arch/arm/dts/rk3399-evb.dts | 123 ++ arch/arm/dts/rk3399.dtsi | 88 + arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 1 + arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++ arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 189 + arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + configs/evb-rk3399_defconfig | 12 + drivers/i2c/rk_i2c.c | 1 + drivers/video/Kconfig| 2 + drivers/video/rockchip/Kconfig | 47 +++ drivers/video/rockchip/Makefile | 6 +- drivers/video/rockchip/rk_mipi.c | 465 +++ drivers/video/rockchip/rk_vop.c | 39 +- 13 files changed, 992 insertions(+), 7 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h create mode 100644 drivers/video/rockchip/Kconfig create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/5] rockchip: i2c: enable i2c for rk3399
From: "eric.gao"
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: eric.gao
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399.dtsi | 16
configs/evb-rk3399_defconfig | 1 +
drivers/i2c/rk_i2c.c | 1 +
3 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 456fdb6..93e3bf4 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -26,6 +26,7 @@
serial4 = &uart4;
mmc0 = &sdhci;
mmc1 = &sdmmc;
+ i2c0 = &i2c0;
};
cpus {
@@ -651,6 +652,21 @@
status = "disabled";
};
+ i2c0: i2c@ff3c {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x0 0xff3c 0x0 0x1000>;
+ assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
+ assigned-clock-rates = <2>;
+ clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
+ clock-names = "i2c", "pclk";
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_xfer>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pinctrl";
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index bedc1fd..2e2f9a8 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -58,3 +58,4 @@ CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_I2C_ROCKCHIP=y
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 7c701cb..a4c8c2ba 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -381,6 +381,7 @@ static const struct dm_i2c_ops rockchip_i2c_ops = {
static const struct udevice_id rockchip_i2c_ids[] = {
{ .compatible = "rockchip,rk3288-i2c" },
+ { .compatible = "rockchip,rk3399-i2c" },
{ }
};
--
1.9.1
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[U-Boot] [PATCH 0/5]
This serials patches add mipi dsi support for rk3399. Except the basic mipi driver, we need also enable pmic rk808 for lcd power and enable i2c for rk808 communication. what's more, the needed clk and pwm for backlight is init in spl stage, make sure spl work first. Eric Gao (3): rockchip: video: Add mipi dsi driver rockchip: Add dts config for mipi dsi rockchip: Enable mipi dsi configs eric.gao (2): rockchip: i2c: enable i2c for rk3399 rockchip: pmic: Enable RK808 for rk3399 evb arch/arm/dts/rk3399-evb.dts | 123 ++ arch/arm/dts/rk3399.dtsi | 88 + arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 1 + arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++ arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 189 + arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + configs/evb-rk3399_defconfig | 12 + drivers/i2c/rk_i2c.c | 1 + drivers/video/Kconfig| 2 + drivers/video/rockchip/Kconfig | 47 +++ drivers/video/rockchip/Makefile | 6 +- drivers/video/rockchip/rk_mipi.c | 465 +++ drivers/video/rockchip/rk_vop.c | 39 +- 13 files changed, 992 insertions(+), 7 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h create mode 100644 drivers/video/rockchip/Kconfig create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/5] rockchip: i2c: enable i2c for rk3399
From: "eric.gao"
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: eric.gao
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399.dtsi | 16
configs/evb-rk3399_defconfig | 1 +
drivers/i2c/rk_i2c.c | 1 +
3 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 456fdb6..93e3bf4 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -26,6 +26,7 @@
serial4 = &uart4;
mmc0 = &sdhci;
mmc1 = &sdmmc;
+ i2c0 = &i2c0;
};
cpus {
@@ -651,6 +652,21 @@
status = "disabled";
};
+ i2c0: i2c@ff3c {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x0 0xff3c 0x0 0x1000>;
+ assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
+ assigned-clock-rates = <2>;
+ clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
+ clock-names = "i2c", "pclk";
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_xfer>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pinctrl";
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index bedc1fd..2e2f9a8 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -58,3 +58,4 @@ CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_I2C_ROCKCHIP=y
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 7c701cb..a4c8c2ba 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -381,6 +381,7 @@ static const struct dm_i2c_ops rockchip_i2c_ops = {
static const struct udevice_id rockchip_i2c_ids[] = {
{ .compatible = "rockchip,rk3288-i2c" },
+ { .compatible = "rockchip,rk3399-i2c" },
{ }
};
--
1.9.1
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[U-Boot] [PATCH 1/5] rockchip: i2c: enable i2c for rk3399
From: "eric.gao"
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: eric.gao
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399.dtsi | 16
configs/evb-rk3399_defconfig | 1 +
drivers/i2c/rk_i2c.c | 1 +
3 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 456fdb6..93e3bf4 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -26,6 +26,7 @@
serial4 = &uart4;
mmc0 = &sdhci;
mmc1 = &sdmmc;
+ i2c0 = &i2c0;
};
cpus {
@@ -651,6 +652,21 @@
status = "disabled";
};
+ i2c0: i2c@ff3c {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x0 0xff3c 0x0 0x1000>;
+ assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
+ assigned-clock-rates = <2>;
+ clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
+ clock-names = "i2c", "pclk";
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_xfer>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pinctrl";
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index bedc1fd..2e2f9a8 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -58,3 +58,4 @@ CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_I2C_ROCKCHIP=y
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 7c701cb..a4c8c2ba 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -381,6 +381,7 @@ static const struct dm_i2c_ops rockchip_i2c_ops = {
static const struct udevice_id rockchip_i2c_ids[] = {
{ .compatible = "rockchip,rk3288-i2c" },
+ { .compatible = "rockchip,rk3399-i2c" },
{ }
};
--
1.9.1
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[U-Boot] [PATCH 0/5]
This serials patches add mipi dsi support for rk3399. Except the basic mipi driver, we need also enable pmic rk808 for lcd power and enable i2c for rk808 communication. what's more, the needed clk and pwm for backlight is init in spl stage, make sure spl work first. Eric Gao (3): rockchip: video: Add mipi dsi driver rockchip: Add dts config for mipi dsi rockchip: Enable mipi dsi configs eric.gao (2): rockchip: i2c: enable i2c for rk3399 rockchip: pmic: Enable RK808 for rk3399 evb arch/arm/dts/rk3399-evb.dts | 123 ++ arch/arm/dts/rk3399.dtsi | 88 + arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 1 + arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++ arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 189 + arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + configs/evb-rk3399_defconfig | 12 + drivers/i2c/rk_i2c.c | 1 + drivers/video/Kconfig| 2 + drivers/video/rockchip/Kconfig | 47 +++ drivers/video/rockchip/Makefile | 6 +- drivers/video/rockchip/rk_mipi.c | 465 +++ drivers/video/rockchip/rk_vop.c | 39 +- 13 files changed, 992 insertions(+), 7 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h create mode 100644 drivers/video/rockchip/Kconfig create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] rockchip: rk3399: Add missing sentinel in syscon
when enable PMIC rk808,the system will halt at very
early stage,log is shown as bellow.
INFO:plat_rockchip_pmu_init(1211): pd status 3e
INFO:BL31: Initializing runtime services
INFO:BL31: Preparing for EL3 exit to normal world
INFO:Entry point address = 0x20
INFO:SPSR = 0x3c9
time 44561b, 0 (<<Just stop here)
It's caused by the absence of "{ }" in syscon_rk3399.c
,which will lead to memory overflow like below.According
to Sysmap file ,we can find the function buck_get_value
of rk808 is just follow the compatible struct,the pointer
"of_match" point to "buck_get_value",but it is not a
struct and don't have member of compatible, In this case,
system crash. So,on the face, it looks like that rk808 is
guilty.but he is really innocent.
while (of_match->compatible) { <<--
if (!strcmp(of_match->compatible, compat)) {
*of_idp = of_match;
return 0;
}
of_match++;
}
Signed-off-by: Eric Gao
---
arch/arm/mach-rockchip/rk3399/syscon_rk3399.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
index d32985b..74d4552 100644
--- a/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
+++ b/arch/arm/mach-rockchip/rk3399/syscon_rk3399.c
@@ -14,6 +14,7 @@ static const struct udevice_id rk3399_syscon_ids[] = {
{ .compatible = "rockchip,rk3399-pmugrf", .data =
ROCKCHIP_SYSCON_PMUGRF },
{ .compatible = "rockchip,rk3399-pmusgrf", .data =
ROCKCHIP_SYSCON_PMUSGRF },
{ .compatible = "rockchip,rk3399-cic", .data = ROCKCHIP_SYSCON_CIC },
+ { }
};
U_BOOT_DRIVER(syscon_rk3399) = {
--
1.9.1
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[U-Boot] [PATCH] video: Fix crash when scroll screen
After enable log printing to lcd,when
the screen start scroll,system crash,
log is shown as bellow.
"Synchronous Abort" handler, esr 0x9645
"Synchronous Abort" handler, esr 0x9645
Checking the source code, we found that the
variate "pixels" get a wrong value.
int pixels = VIDEO_FONT_HEIGHT * vid_priv->line_length;
"pixels" here means the value of pixels for
a character,rather than the byte for a
character. so the variate "pixels" is 4 times
bigger than it's exact value. which will cause
the memory overflow when the cpu run the
following code.
for (i = 0; i < pixels; i++)
*dst++ = clr; <<
Signed-off-by: Eric Gao
---
drivers/video/console_normal.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/console_normal.c b/drivers/video/console_normal.c
index 89a55dd..b627d48 100644
--- a/drivers/video/console_normal.c
+++ b/drivers/video/console_normal.c
@@ -18,7 +18,7 @@ static int console_normal_set_row(struct udevice *dev, uint
row, int clr)
{
struct video_priv *vid_priv = dev_get_uclass_priv(dev->parent);
void *line;
- int pixels = VIDEO_FONT_HEIGHT * vid_priv->line_length;
+ int pixels = VIDEO_FONT_HEIGHT * vid_priv->xsize;
int i;
line = vid_priv->fb + row * VIDEO_FONT_HEIGHT * vid_priv->line_length;
--
1.9.1
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[U-Boot] [PATCH 0/5]
This serials patches add mipi dsi support for rk3399. Except the basic mipi driver, we need also enable pmic rk808 for lcd power and enable i2c for rk808 communication. what's more, the needed clk and pwm for backlight is init in spl stage, make sure spl work first. Eric Gao (5): rockchip: i2c: Enable i2c for rk3399 rockchip: pmic: Enable RK808 for rk3399 evb rockchip: video: Add mipi dsi driver for rk3399 rockchip: dts: Add mipi dsi support for rk3399 rockchip: configs: Enable mipi dsi for rk3399 arch/arm/dts/rk3399-evb.dts | 123 ++ arch/arm/dts/rk3399.dtsi | 88 + arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 1 + arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++ arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 189 + arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + configs/evb-rk3399_defconfig | 12 + drivers/i2c/rk_i2c.c | 1 + drivers/video/Kconfig| 2 + drivers/video/rockchip/Kconfig | 47 +++ drivers/video/rockchip/Makefile | 6 +- drivers/video/rockchip/rk_mipi.c | 465 +++ drivers/video/rockchip/rk_vop.c | 39 +- 13 files changed, 992 insertions(+), 7 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h create mode 100644 drivers/video/rockchip/Kconfig create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/5] rockchip: i2c: Enable i2c for rk3399
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399.dtsi | 16
configs/evb-rk3399_defconfig | 1 +
drivers/i2c/rk_i2c.c | 1 +
3 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 456fdb6..93e3bf4 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -26,6 +26,7 @@
serial4 = &uart4;
mmc0 = &sdhci;
mmc1 = &sdmmc;
+ i2c0 = &i2c0;
};
cpus {
@@ -651,6 +652,21 @@
status = "disabled";
};
+ i2c0: i2c@ff3c {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x0 0xff3c 0x0 0x1000>;
+ assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
+ assigned-clock-rates = <2>;
+ clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
+ clock-names = "i2c", "pclk";
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_xfer>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pinctrl";
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index bedc1fd..2e2f9a8 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -58,3 +58,4 @@ CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_I2C_ROCKCHIP=y
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 7c701cb..a4c8c2ba 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -381,6 +381,7 @@ static const struct dm_i2c_ops rockchip_i2c_ops = {
static const struct udevice_id rockchip_i2c_ids[] = {
{ .compatible = "rockchip,rk3288-i2c" },
+ { .compatible = "rockchip,rk3399-i2c" },
{ }
};
--
1.9.1
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[U-Boot] [PATCH 0/5]
This serials patches add mipi dsi support for rk3399. Except the basic mipi driver, we need also enable pmic rk808 for lcd power and enable i2c for rk808 communication. what's more, the needed clk and pwm for backlight is init in spl stage, make sure spl work first. Eric Gao (5): rockchip: i2c: Enable i2c for rk3399 rockchip: pmic: Enable RK808 for rk3399 evb rockchip: video: Add mipi dsi driver for rk3399 rockchip: dts: Add mipi dsi support for rk3399 rockchip: configs: Enable mipi dsi for rk3399 arch/arm/dts/rk3399-evb.dts | 123 ++ arch/arm/dts/rk3399.dtsi | 88 + arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 1 + arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++ arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 189 + arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + configs/evb-rk3399_defconfig | 12 + drivers/i2c/rk_i2c.c | 1 + drivers/video/Kconfig| 2 + drivers/video/rockchip/Kconfig | 47 +++ drivers/video/rockchip/Makefile | 6 +- drivers/video/rockchip/rk_mipi.c | 465 +++ drivers/video/rockchip/rk_vop.c | 39 +- 13 files changed, 992 insertions(+), 7 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h create mode 100644 drivers/video/rockchip/Kconfig create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/5] rockchip: i2c: Enable i2c for rk3399
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399.dtsi | 16
configs/evb-rk3399_defconfig | 1 +
drivers/i2c/rk_i2c.c | 1 +
3 files changed, 18 insertions(+)
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 456fdb6..93e3bf4 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -26,6 +26,7 @@
serial4 = &uart4;
mmc0 = &sdhci;
mmc1 = &sdmmc;
+ i2c0 = &i2c0;
};
cpus {
@@ -651,6 +652,21 @@
status = "disabled";
};
+ i2c0: i2c@ff3c {
+ compatible = "rockchip,rk3399-i2c";
+ reg = <0x0 0xff3c 0x0 0x1000>;
+ assigned-clocks = <&pmucru SCLK_I2C0_PMU>;
+ assigned-clock-rates = <2>;
+ clocks = <&pmucru SCLK_I2C0_PMU>, <&pmucru PCLK_I2C0_PMU>;
+ clock-names = "i2c", "pclk";
+ interrupts = ;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_xfer>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
pinctrl: pinctrl {
u-boot,dm-pre-reloc;
compatible = "rockchip,rk3399-pinctrl";
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index bedc1fd..2e2f9a8 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -58,3 +58,4 @@ CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
+CONFIG_SYS_I2C_ROCKCHIP=y
diff --git a/drivers/i2c/rk_i2c.c b/drivers/i2c/rk_i2c.c
index 7c701cb..a4c8c2ba 100644
--- a/drivers/i2c/rk_i2c.c
+++ b/drivers/i2c/rk_i2c.c
@@ -381,6 +381,7 @@ static const struct dm_i2c_ops rockchip_i2c_ops = {
static const struct udevice_id rockchip_i2c_ids[] = {
{ .compatible = "rockchip,rk3288-i2c" },
+ { .compatible = "rockchip,rk3399-i2c" },
{ }
};
--
1.9.1
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[U-Boot] [PATCH 2/5] rockchip: pmic: Enable RK808 for rk3399 evb
For using mipi display, we need to enable lcd3v3
which supplied by rk808,so enable rk808 first.
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399-evb.dts | 39 +++
configs/evb-rk3399_defconfig | 5 +
2 files changed, 44 insertions(+)
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index a959989..7bf805a 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -30,6 +30,13 @@
status = "okay";
};
+ vccsys: vccsys {
+ compatible = "regulator-fixed";
+ regulator-name = "vccsys";
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
vcc3v3_sys: vcc3v3-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
@@ -51,6 +58,7 @@
regulator-name = "vcc5v0_host";
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
};
+
};
&emmc_phy {
@@ -110,6 +118,37 @@
status = "okay";
};
+&i2c0 {
+ status = "okay";
+ clock-frequency = <40>;
+ i2c-scl-falling-time-ns = <50>;
+ i2c-scl-rising-time-ns = <100>;
+ u-boot,dm-pre-reloc;
+
+ rk808: pmic@1b {
+ compatible = "rockchip,rk808";
+ clock-output-names = "xin32k", "wifibt_32kin";
+ interrupt-parent = <&gpio0>;
+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_int_l>;
+ reg = <0x1b>;
+ rockchip,system-power-controller;
+ #clock-cells = <1>;
+ u-boot,dm-pre-reloc;
+ status = "okay";
+
+ vcc12-supply = <&vcc3v3_sys>;
+ regulators {
+ vcc33_lcd: SWITCH_REG2 {
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-name = "vcc33_lcd";
+ };
+ };
+ };
+};
+
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig
index 2e2f9a8..aac6d2d 100644
--- a/configs/evb-rk3399_defconfig
+++ b/configs/evb-rk3399_defconfig
@@ -59,3 +59,8 @@ CONFIG_USB_STORAGE=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_ERRNO_STR=y
CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_CHILDREN=y
+CONFIG_SPL_PMIC_CHILDREN=y
+CONFIG_PMIC_RK808=y
+CONFIG_REGULATOR_RK808=y
--
1.9.1
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[U-Boot] [PATCH 3/5] rockchip: video: Add mipi dsi driver for rk3399
Add mipi dsi driver for rk chip, To enable this
you need to enable DM, DM_VIDEO, DM_ROCKCHIP_VIDEO,
DISPLAY_MIPI in menuconfig. And enable rk808,and it's
corresponding i2c.
Signed-off-by: Eric Gao
---
arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 1 +
arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++
arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 189 +
arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 +
drivers/video/Kconfig| 2 +
drivers/video/rockchip/Kconfig | 47 +++
drivers/video/rockchip/Makefile | 6 +-
drivers/video/rockchip/rk_mipi.c | 465 +++
drivers/video/rockchip/rk_vop.c | 39 +-
9 files changed, 768 insertions(+), 7 deletions(-)
create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
create mode 100644 drivers/video/rockchip/Kconfig
create mode 100644 drivers/video/rockchip/rk_mipi.c
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index cf830d0..e9e5810 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -70,6 +70,7 @@ struct rk3399_cru {
};
check_member(rk3399_cru, sdio1_con[1], 0x594);
#define MHz100
+#define MHZ100
#define KHz1000
#define OSC_HZ (24*MHz)
#define APLL_HZ(600*MHz)
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
index 62d8496..2bf58da 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -399,6 +399,31 @@ enum {
GRF_UART_DBG_SEL_MASK = 3 << GRF_UART_DBG_SEL_SHIFT,
GRF_UART_DBG_SEL_C = 2,
+ /* GRF_SOC_CON20 */
+ GRF_DSI0_VOP_SEL_SHIFT = 0,
+ GRF_DSI0_VOP_SEL_MASK = 1 << GRF_DSI0_VOP_SEL_SHIFT,
+ GRF_DSI0_VOP_SEL_B = 0,
+ GRF_DSI0_VOP_SEL_L,
+
+ /* GRF_SOC_CON22 */
+ GRF_DPHY_TX0_RXMODE_SHIFT = 0,
+ GRF_DPHY_TX0_RXMODE_MASK =
+ 0xf << GRF_DPHY_TX0_RXMODE_SHIFT,
+ GRF_DPHY_TX0_RXMODE_EN = 0xb,
+ GRF_DPHY_TX0_RXMODE_DIS = 0,
+
+ GRF_DPHY_TX0_TXSTOPMODE_SHIFT = 4,
+ GRF_DPHY_TX0_TXSTOPMODE_MASK =
+ 0xf0 << GRF_DPHY_TX0_TXSTOPMODE_SHIFT,
+ GRF_DPHY_TX0_TXSTOPMODE_EN = 0xc,
+ GRF_DPHY_TX0_TXSTOPMODE_DIS = 0,
+
+ GRF_DPHY_TX0_TURNREQUEST_SHIFT = 12,
+ GRF_DPHY_TX0_TURNREQUEST_MASK =
+ 0xf000 << GRF_DPHY_TX0_TURNREQUEST_SHIFT,
+ GRF_DPHY_TX0_TURNREQUEST_EN = 0x1,
+ GRF_DPHY_TX0_TURNREQUEST_DIS = 0,
+
/* PMUGRF_GPIO0A_IOMUX */
PMUGRF_GPIO0A6_SEL_SHIFT= 12,
PMUGRF_GPIO0A6_SEL_MASK = 3 << PMUGRF_GPIO0A6_SEL_SHIFT,
diff --git a/arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
b/arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
new file mode 100644
index 000..9a1fffb
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
@@ -0,0 +1,189 @@
+/*
+ * Copyright (C) 2017-2025 Fuzhou Rockchip Electronics Co., Ltd
+ * author: eric@rock-chips.com
+ * create date: 2017-03-31
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef RK33_MIPI_DSI_H
+#define RK33_MIPI_DSI_H
+
+/*
+ * All these mipi controller register declaration provide
+ * reg address offset, bits width, bit offset for a
+ * specified register bits. With these message, we can
+ * set or clear every bits individually for a 32bit width
+ * register. We use DSI_HOST_BITS macro definition to
+ * combinat these message using the following format:
+ * val(32bit) = addr(16bit) | width(8bit) | offest(8bit)
+ * for example:
+ * #define SHUTDOWNZ DSI_HOST_BITS(0X004, 1, 0)
+ * means SHUTDOWNZ is a signal reg bit with bit offset
+ * qual 0,and it's reg addr offset is 0x004.The conbinat
+ * result = (0x004 << 16) | (1 << 8) | 0
+ */
+#define DSI_HOST_BITS(addr, bits, bit_offset) \
+ ((addr<<16) | (bits<<8) | (bit_offset))
+
+/* DWC_DSI_VERSION_0X3133302A */
+#define VERSIONDSI_HOST_BITS(0X000, 32, 0)
+#define SHUTDOWNZ DSI_HOST_BITS(0X004, 1, 0)
+#define TO_CLK_DIVISIONDSI_HOST_BITS(0X008, 8, 8)
+#define TX_ESC_CLK_DIVISIONDSI_HOST_BITS(0X008, 8, 0)
+#define DPI_VCID DSI_HOST_BITS(0X00C, 2, 0)
+#define EN18_LOOSELY DSI_HOST_BITS(0X010, 1, 8)
+#define DPI_COLOR_CODING DSI_HOST_BITS(0X010, 4, 0)
+#define COLORM_ACTIVE_LOW DSI_HOST_BITS(0X014, 1, 4)
+#define SHUTD_ACTIVE_LOW DSI_HOST_BITS(0X014, 1, 3)
+#define HSYNC_ACTIVE_LOW DSI_HOST_BITS(0X014, 1, 2)
+#define VSYNC_ACTIVE_LOW DSI_HOST_BITS(0X014, 1, 1)
+#define DATAEN_ACTIVE_LOW DSI_HOST_BITS(0X014, 1, 0)
+#define OUTVACT
[U-Boot] [PATCH 4/5] rockchip: dts: Add mipi dsi support for rk3399
Add dts config for mipi display, include vop,
mipi controller, panel, backlight.And Enable rk808
for lcd_3v3 in another patch.
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399-evb.dts | 84 +
arch/arm/dts/rk3399.dtsi| 72 ++
2 files changed, 156 insertions(+)
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 7bf805a..709d66d 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -59,6 +59,15 @@
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ status = "disabled";
+ };
+
+ panel:panel {
+ compatible = "simple-panel";
+ status = "disabled";
+ };
};
&emmc_phy {
@@ -139,6 +148,7 @@
status = "okay";
vcc12-supply = <&vcc3v3_sys>;
+
regulators {
vcc33_lcd: SWITCH_REG2 {
regulator-always-on;
@@ -149,6 +159,80 @@
};
};
+&backlight {
+ power-supply = <&vccsys>;
+ enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7
+ 8 9 10 11 12 13 14 15
+16 17 18 19 20 21 22 23
+24 25 26 27 28 29 30 31
+32 33 34 35 36 37 38 39
+40 41 42 43 44 45 46 47
+48 49 50 51 52 53 54 55
+56 57 58 59 60 61 62 63
+64 65 66 67 68 69 70 71
+72 73 74 75 76 77 78 79
+80 81 82 83 84 85 86 87
+88 89 90 91 92 93 94 95
+96 97 98 99 100 101 102 103
+ 104 105 106 107 108 109 110 111
+ 112 113 114 115 116 117 118 119
+ 120 121 122 123 124 125 126 127
+ 128 129 130 131 132 133 134 135
+ 136 137 138 139 140 141 142 143
+ 144 145 146 147 148 149 150 151
+ 152 153 154 155 156 157 158 159
+ 160 161 162 163 164 165 166 167
+ 168 169 170 171 172 173 174 175
+ 176 177 178 179 180 181 182 183
+ 184 185 186 187 188 189 190 191
+ 192 193 194 195 196 197 198 199
+ 200 201 202 203 204 205 206 207
+ 208 209 210 211 212 213 214 215
+ 216 217 218 219 220 221 222 223
+ 224 225 226 227 228 229 230 231
+ 232 233 234 235 236 237 238 239
+ 240 241 242 243 244 245 246 247
+ 248 249 250 251 252 253 254 255>;
+ default-brightness-level = <200>;
+ pwms = <&pwm0 0 25000 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ pwm-delay-us = <1>;
+ status = "okay";
+ };
+
+&panel {
+ power-supply = <&vcc33_lcd>;
+ backlight = <&backlight>;
+ /*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
+ status = "okay";
+};
+
+&mipi_dsi {
+ status = "okay";
+ rockchip,panel = <&panel>;
+ display-timings {
+ timing0 {
+ bits-per-pixel = <24>;
+ clock-frequency = <16000>;
+ hfront-porch = <120>;
+ hsync-len = <20>;
+ hback-porch = <21>;
+ hactive = <1200>;
+ vfront-porch = <21>;
+ vsync-len = <3>;
+ vback-porch = <18>;
+ vactive = <1920>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+};
+
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 93e3bf4..c82e674 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -667,6 +667,78 @@
status = "disabled";
};
+ vopl: vop@ff8f {
+ u-boot,dm-pre-reloc;
+ compatible = "rockchip,rk3399-vop-lit";
+ reg = <0x0 0xff8f 0x0 0x3efc>
[U-Boot] [PATCH 5/5] rockchip: configs: Enable mipi dsi for rk3399
Enable mipi dsi by default for rk3399-evb board Signed-off-by: Eric Gao --- configs/evb-rk3399_defconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index aac6d2d..f41cbf9 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -64,3 +64,9 @@ CONFIG_PMIC_CHILDREN=y CONFIG_SPL_PMIC_CHILDREN=y CONFIG_PMIC_RK808=y CONFIG_REGULATOR_RK808=y +CONFIG_DM_VIDEO=y +CONFIG_DM_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_DISPLAY=y +CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_MIPI=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 0/3]
rockchip: video: Add mipi display support for rk3399 This serials patches add mipi dsi support for rk3399. Except the basic mipi driver, we need also enable pmic rk808 for lcd power and enable i2c for rk808 communication. what's more, the needed clk and pwm for backlight is init in spl stage, make sure spl work first. Eric Gao (3): rockchip: video: Add mipi dsi driver for rk3399 rockchip: dts: Add mipi dsi support for rk3399 rockchip: configs: Enable mipi dsi for rk3399 arch/arm/dts/rk3399-evb.dts | 84 arch/arm/dts/rk3399.dtsi | 72 arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 1 + arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++ arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 195 ++ arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + board/rockchip/evb_rk3399/evb-rk3399.c | 6 + configs/evb-rk3399_defconfig | 6 + drivers/video/Kconfig| 2 + drivers/video/rockchip/Kconfig | 38 ++ drivers/video/rockchip/Makefile | 6 +- drivers/video/rockchip/rk_mipi.c | 464 +++ drivers/video/rockchip/rk_vop.c | 38 +- 13 files changed, 931 insertions(+), 7 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h create mode 100644 drivers/video/rockchip/Kconfig create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 1/3] rockchip: video: Add mipi dsi driver for rk3399
Add mipi dsi driver for rk chip. To enable this you need to enable DM, DM_VIDEO
DM_ROCKCHIP_VIDEO, DISPLAY_MIPI in menuconfig. And enable rk808 and it's i2c.
Signed-off-by: Eric Gao
---
arch/arm/include/asm/arch-rockchip/cru_rk3399.h | 1 +
arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++
arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 195 ++
arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 +
board/rockchip/evb_rk3399/evb-rk3399.c | 6 +
drivers/video/Kconfig| 2 +
drivers/video/rockchip/Kconfig | 38 ++
drivers/video/rockchip/Makefile | 6 +-
drivers/video/rockchip/rk_mipi.c | 464 +++
drivers/video/rockchip/rk_vop.c | 38 +-
10 files changed, 769 insertions(+), 7 deletions(-)
create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
create mode 100644 drivers/video/rockchip/Kconfig
create mode 100644 drivers/video/rockchip/rk_mipi.c
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
index cf830d0..e9e5810 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3399.h
@@ -70,6 +70,7 @@ struct rk3399_cru {
};
check_member(rk3399_cru, sdio1_con[1], 0x594);
#define MHz100
+#define MHZ100
#define KHz1000
#define OSC_HZ (24*MHz)
#define APLL_HZ(600*MHz)
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
index 62d8496..2bf58da 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -399,6 +399,31 @@ enum {
GRF_UART_DBG_SEL_MASK = 3 << GRF_UART_DBG_SEL_SHIFT,
GRF_UART_DBG_SEL_C = 2,
+ /* GRF_SOC_CON20 */
+ GRF_DSI0_VOP_SEL_SHIFT = 0,
+ GRF_DSI0_VOP_SEL_MASK = 1 << GRF_DSI0_VOP_SEL_SHIFT,
+ GRF_DSI0_VOP_SEL_B = 0,
+ GRF_DSI0_VOP_SEL_L,
+
+ /* GRF_SOC_CON22 */
+ GRF_DPHY_TX0_RXMODE_SHIFT = 0,
+ GRF_DPHY_TX0_RXMODE_MASK =
+ 0xf << GRF_DPHY_TX0_RXMODE_SHIFT,
+ GRF_DPHY_TX0_RXMODE_EN = 0xb,
+ GRF_DPHY_TX0_RXMODE_DIS = 0,
+
+ GRF_DPHY_TX0_TXSTOPMODE_SHIFT = 4,
+ GRF_DPHY_TX0_TXSTOPMODE_MASK =
+ 0xf0 << GRF_DPHY_TX0_TXSTOPMODE_SHIFT,
+ GRF_DPHY_TX0_TXSTOPMODE_EN = 0xc,
+ GRF_DPHY_TX0_TXSTOPMODE_DIS = 0,
+
+ GRF_DPHY_TX0_TURNREQUEST_SHIFT = 12,
+ GRF_DPHY_TX0_TURNREQUEST_MASK =
+ 0xf000 << GRF_DPHY_TX0_TURNREQUEST_SHIFT,
+ GRF_DPHY_TX0_TURNREQUEST_EN = 0x1,
+ GRF_DPHY_TX0_TURNREQUEST_DIS = 0,
+
/* PMUGRF_GPIO0A_IOMUX */
PMUGRF_GPIO0A6_SEL_SHIFT= 12,
PMUGRF_GPIO0A6_SEL_MASK = 3 << PMUGRF_GPIO0A6_SEL_SHIFT,
diff --git a/arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
b/arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
new file mode 100644
index 000..f55ffb6
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
@@ -0,0 +1,195 @@
+/*
+ * Copyright (C) 2017-2025 Fuzhou Rockchip Electronics Co., Ltd
+ * author: Eric Gao
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef RK33_MIPI_DSI_H
+#define RK33_MIPI_DSI_H
+
+/*
+ * All these mipi controller register declaration provide reg address offset,
+ * bits width, bit offset for a specified register bits. With these message, we
+ * can set or clear every bits individually for a 32bit widthregister. We use
+ * DSI_HOST_BITS macro definition to combinat these message using the following
+ * format: val(32bit) = addr(16bit) | width(8bit) | offest(8bit)
+ * For example:
+ *#define SHUTDOWNZ DSI_HOST_BITS(0x004, 1, 0)
+ * means SHUTDOWNZ is a signal reg bit with bit offset qual 0,and it's reg addr
+ * offset is 0x004.The conbinat result = (0x004 << 16) | (1 << 8) | 0
+ */
+#define ADDR_SHIFT 16
+#define BITS_SHIFT 8
+#define OFFSET_SHIFT 0
+#define DSI_HOST_BITS(addr, bits, bit_offset) \
+((addr << ADDR_SHIFT) | (bits << BITS_SHIFT) | (bit_offset << OFFSET_SHIFT))
+
+/* DWC_DSI_VERSION_0x3133302A */
+#define VERSIONDSI_HOST_BITS(0x000, 32, 0)
+#define SHUTDOWNZ DSI_HOST_BITS(0x004, 1, 0)
+#define TO_CLK_DIVISIONDSI_HOST_BITS(0x008, 8, 8)
+#define TX_ESC_CLK_DIVISIONDSI_HOST_BITS(0x008, 8, 0)
+#define DPI_VCID DSI_HOST_BITS(0x00c, 2, 0)
+#define EN18_LOOSELY DSI_HOST_BITS(0x010, 1, 8)
+#define DPI_COLOR_CODING DSI_HOST_BITS(0x010, 4, 0)
+#define COLORM_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 4)
+#define SHUTD_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 3)
+#define HSYNC_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 2)
+#define VSYNC_ACTIVE_LOW DSI_HOST_BITS(0x01
[U-Boot] [PATCH v2 2/3] rockchip: dts: Add mipi dsi support for rk3399
Add dts config for mipi display, include vop, mipi controller, panel,
backlight.And Enable rk808 for lcd_3v3 in another patch.
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399-evb.dts | 84 +
arch/arm/dts/rk3399.dtsi| 72 ++
2 files changed, 156 insertions(+)
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index 7bf805a..709d66d 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -59,6 +59,15 @@
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ status = "disabled";
+ };
+
+ panel:panel {
+ compatible = "simple-panel";
+ status = "disabled";
+ };
};
&emmc_phy {
@@ -139,6 +148,7 @@
status = "okay";
vcc12-supply = <&vcc3v3_sys>;
+
regulators {
vcc33_lcd: SWITCH_REG2 {
regulator-always-on;
@@ -149,6 +159,80 @@
};
};
+&backlight {
+ power-supply = <&vccsys>;
+ enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7
+ 8 9 10 11 12 13 14 15
+16 17 18 19 20 21 22 23
+24 25 26 27 28 29 30 31
+32 33 34 35 36 37 38 39
+40 41 42 43 44 45 46 47
+48 49 50 51 52 53 54 55
+56 57 58 59 60 61 62 63
+64 65 66 67 68 69 70 71
+72 73 74 75 76 77 78 79
+80 81 82 83 84 85 86 87
+88 89 90 91 92 93 94 95
+96 97 98 99 100 101 102 103
+ 104 105 106 107 108 109 110 111
+ 112 113 114 115 116 117 118 119
+ 120 121 122 123 124 125 126 127
+ 128 129 130 131 132 133 134 135
+ 136 137 138 139 140 141 142 143
+ 144 145 146 147 148 149 150 151
+ 152 153 154 155 156 157 158 159
+ 160 161 162 163 164 165 166 167
+ 168 169 170 171 172 173 174 175
+ 176 177 178 179 180 181 182 183
+ 184 185 186 187 188 189 190 191
+ 192 193 194 195 196 197 198 199
+ 200 201 202 203 204 205 206 207
+ 208 209 210 211 212 213 214 215
+ 216 217 218 219 220 221 222 223
+ 224 225 226 227 228 229 230 231
+ 232 233 234 235 236 237 238 239
+ 240 241 242 243 244 245 246 247
+ 248 249 250 251 252 253 254 255>;
+ default-brightness-level = <200>;
+ pwms = <&pwm0 0 25000 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ pwm-delay-us = <1>;
+ status = "okay";
+ };
+
+&panel {
+ power-supply = <&vcc33_lcd>;
+ backlight = <&backlight>;
+ /*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
+ status = "okay";
+};
+
+&mipi_dsi {
+ status = "okay";
+ rockchip,panel = <&panel>;
+ display-timings {
+ timing0 {
+ bits-per-pixel = <24>;
+ clock-frequency = <16000>;
+ hfront-porch = <120>;
+ hsync-len = <20>;
+ hback-porch = <21>;
+ hactive = <1200>;
+ vfront-porch = <21>;
+ vsync-len = <3>;
+ vback-porch = <18>;
+ vactive = <1920>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+};
+
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index 93e3bf4..c82e674 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -667,6 +667,78 @@
status = "disabled";
};
+ vopl: vop@ff8f {
+ u-boot,dm-pre-reloc;
+ compatible = "rockchip,rk3399-vop-lit";
+ reg = <0x0
[U-Boot] [PATCH v2 3/3] rockchip: configs: Enable mipi dsi for rk3399
Enable mipi dsi by default for rk3399-evb board Signed-off-by: Eric Gao --- configs/evb-rk3399_defconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index aac6d2d..f41cbf9 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -64,3 +64,9 @@ CONFIG_PMIC_CHILDREN=y CONFIG_SPL_PMIC_CHILDREN=y CONFIG_PMIC_RK808=y CONFIG_REGULATOR_RK808=y +CONFIG_DM_VIDEO=y +CONFIG_DM_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_DISPLAY=y +CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_MIPI=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 0/2] Add Kconfig for rockchip video driver.
Eric Gao (2): rockchip: video: Kconfig: Add Kconfig for rockchip video driver rockchip: video: Makefile: Modify Makefile for rockchip video driver configs/chromebit_mickey_defconfig | 1 + configs/chromebook_jerry_defconfig | 2 ++ configs/chromebook_minnie_defconfig | 2 ++ configs/firefly-rk3288_defconfig| 1 + configs/miqi-rk3288_defconfig | 1 + configs/rock2_defconfig | 1 + drivers/video/Kconfig | 10 + drivers/video/rockchip/Kconfig | 43 + drivers/video/rockchip/Makefile | 8 ++- 9 files changed, 59 insertions(+), 10 deletions(-) create mode 100644 drivers/video/rockchip/Kconfig -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/2] rockchip: video: Kconfig: Add Kconfig for rockchip video driver
1. add Kconfig for rockchip video driver, so that video port can be selected as needed. 2. move VIDEO_ROCKCHIP option to new Kconfig for concision. Signed-off-by: Eric Gao --- configs/chromebit_mickey_defconfig | 1 + configs/chromebook_jerry_defconfig | 2 ++ configs/chromebook_minnie_defconfig | 2 ++ configs/firefly-rk3288_defconfig| 1 + configs/miqi-rk3288_defconfig | 1 + configs/rock2_defconfig | 1 + drivers/video/Kconfig | 10 + drivers/video/rockchip/Kconfig | 43 + 8 files changed, 52 insertions(+), 9 deletions(-) create mode 100644 drivers/video/rockchip/Kconfig diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index a29e4e5..f04ecb4 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -72,6 +72,7 @@ CONFIG_SYSRESET=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index e642b8d..dd0476b 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -72,6 +72,8 @@ CONFIG_SYSRESET=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_EDP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 1812362..cecae5f 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -72,6 +72,8 @@ CONFIG_SYSRESET=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_DISPLAY_ROCKCHIP_EDP=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index b0741d7..b975383 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -70,6 +70,7 @@ CONFIG_USB_STORAGE=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index 203824b..71e4db7 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -67,6 +67,7 @@ CONFIG_USB_STORAGE=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index e9a32a9..5ddca5a 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -64,6 +64,7 @@ CONFIG_SYSRESET=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 19e9745..818f738 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -416,15 +416,7 @@ config VIDEO_FSL_DCU_MAX_FB_SIZE_MB Set maximum framebuffer size to be used for Freescale Display Controller Unit (DCU4). -config VIDEO_ROCKCHIP - bool "Enable Rockchip video support" - depends on DM_VIDEO - help - Rockchip SoCs provide video output capabilities for High-Definition - Multimedia Interface (HDMI), Low-voltage Differential Signalling - (LVDS), embedded DisplayPort (eDP) and Display Serial Interface - (DSI). This driver supports the on-chip video output device, and - targets the Rockchip RK3288. +source "drivers/video/rockchip/Kconfig" config VIDEO_SANDBOX_SDL bool "Enable sandbox video console using SDL" diff --git a/drivers/video/rockchip/Kconfig b/drivers/video/rockchip/Kconfig new file mode 100644 index 000..529288d --- /dev/null +++ b/drivers/video/rockchip/Kconfig @@ -0,0 +1,43 @@ +# +# Video drivers selection for rockchip soc. These configs only impact the +# compile process. You can surely check all the options. In this case, all the +# display driver will be compiled, but which drivers finally will be used is +# decided by device tree configuration. What's more, enable needed power for +# display by configure the device tree, and the vop driver will do the rest. +# +# Author: Eric Gao +# + +#menuconfig VIDEO_ROCKCHIP + bool "Enable Rockchip Video Support" + depends on DM_VIDEO + help + Rockchip SoCs provide video output capabilities for High-Definition + Multimedia Interface (HDMI), Low-voltage Differential Signalling + (LVDS), embedded D
[U-Boot] [PATCH 2/2] rockchip: video: Makefile: Modify Makefile for rockchip video driver
Modify Makefile for rockchip video driver according to Kconfig, so that source code will not be compiled if not needed. Signed-off-by: Eric Gao --- drivers/video/rockchip/Makefile | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile index 755350b..cd850a6 100644 --- a/drivers/video/rockchip/Makefile +++ b/drivers/video/rockchip/Makefile @@ -5,4 +5,10 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += rk_edp.o rk_hdmi.o rk_vop.o rk_lvds.o ../dw_hdmi.o +ifdef CONFIG_VIDEO_ROCKCHIP +obj-y += rk_vop.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o ../dw_hdmi.o +endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 1/2] rockchip: video: Kconfig: Add Kconfig for rockchip video driver
1. add Kconfig for rockchip video driver, so that video port can be selected as needed. 2. move VIDEO_ROCKCHIP option to new Kconfig for concision. Signed-off-by: Eric Gao --- configs/chromebit_mickey_defconfig | 1 + configs/chromebook_jerry_defconfig | 2 ++ configs/chromebook_minnie_defconfig | 2 ++ configs/firefly-rk3288_defconfig| 1 + configs/miqi-rk3288_defconfig | 1 + configs/rock2_defconfig | 1 + drivers/video/Kconfig | 10 + drivers/video/rockchip/Kconfig | 43 + 8 files changed, 52 insertions(+), 9 deletions(-) create mode 100644 drivers/video/rockchip/Kconfig diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index a29e4e5..f04ecb4 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -72,6 +72,7 @@ CONFIG_SYSRESET=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index e642b8d..dd0476b 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -72,6 +72,8 @@ CONFIG_SYSRESET=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_EDP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 1812362..cecae5f 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -72,6 +72,8 @@ CONFIG_SYSRESET=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_DISPLAY_ROCKCHIP_EDP=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index b0741d7..b975383 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -70,6 +70,7 @@ CONFIG_USB_STORAGE=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index 203824b..71e4db7 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -67,6 +67,7 @@ CONFIG_USB_STORAGE=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index e9a32a9..5ddca5a 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -64,6 +64,7 @@ CONFIG_SYSRESET=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 19e9745..818f738 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -416,15 +416,7 @@ config VIDEO_FSL_DCU_MAX_FB_SIZE_MB Set maximum framebuffer size to be used for Freescale Display Controller Unit (DCU4). -config VIDEO_ROCKCHIP - bool "Enable Rockchip video support" - depends on DM_VIDEO - help - Rockchip SoCs provide video output capabilities for High-Definition - Multimedia Interface (HDMI), Low-voltage Differential Signalling - (LVDS), embedded DisplayPort (eDP) and Display Serial Interface - (DSI). This driver supports the on-chip video output device, and - targets the Rockchip RK3288. +source "drivers/video/rockchip/Kconfig" config VIDEO_SANDBOX_SDL bool "Enable sandbox video console using SDL" diff --git a/drivers/video/rockchip/Kconfig b/drivers/video/rockchip/Kconfig new file mode 100644 index 000..529288d --- /dev/null +++ b/drivers/video/rockchip/Kconfig @@ -0,0 +1,43 @@ +# +# Video drivers selection for rockchip soc. These configs only impact the +# compile process. You can surely check all the options. In this case, all the +# display driver will be compiled, but which drivers finally will be used is +# decided by device tree configuration. What's more, enable needed power for +# display by configure the device tree, and the vop driver will do the rest. +# +# Author: Eric Gao +# + +#menuconfig VIDEO_ROCKCHIP + bool "Enable Rockchip Video Support" + depends on DM_VIDEO + help + Rockchip SoCs provide video output capabilities for High-Definition + Multimedia Interface (HDMI), Low-voltage Differential Signalling + (LVDS), embedded D
[U-Boot] [PATCH v2 0/2] Add Kconfig for rockchip video driver.
patch 1: add Kconfig file rockchip video driver. patch 2: modify Makefile according to the new Kconfig. Eric Gao (2): rockchip: video: Kconfig: Add Kconfig for rockchip video driver rockchip: video: Makefile: Modify Makefile for rockchip video driver configs/chromebit_mickey_defconfig | 1 + configs/chromebook_jerry_defconfig | 2 ++ configs/chromebook_minnie_defconfig | 2 ++ configs/firefly-rk3288_defconfig| 1 + configs/miqi-rk3288_defconfig | 1 + configs/rock2_defconfig | 1 + drivers/video/Kconfig | 10 + drivers/video/rockchip/Kconfig | 43 + drivers/video/rockchip/Makefile | 7 +- 9 files changed, 58 insertions(+), 10 deletions(-) create mode 100644 drivers/video/rockchip/Kconfig -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 2/2] rockchip: video: Makefile: Modify Makefile for rockchip video driver
Modify Makefile for rockchip video driver according to Kconfig, so that source code will not be compiled if not needed. Signed-off-by: Eric Gao --- drivers/video/rockchip/Makefile | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile index 755350b..3bb0519 100644 --- a/drivers/video/rockchip/Makefile +++ b/drivers/video/rockchip/Makefile @@ -5,4 +5,9 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += rk_edp.o rk_hdmi.o rk_vop.o rk_lvds.o ../dw_hdmi.o +ifdef CONFIG_VIDEO_ROCKCHIP +obj-y += rk_vop.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o ../dw_hdmi.o +endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 0/8] Add mipi display support for rk3399
Eric Gao (8): rockchip: video: Add mipi dsi driver for rk3399 rockchip: video: vop: Add mipi display mode for rk3399 rockchip: video: vop: Set different bitwidth for different display mode rockchip: video: vop: Reserve enough space for mipi dispaly rockchip: board: evb_rk3399: initialize pwm0 for dispaly backlight rockchip: dts: Add mipi dsi support for rk3399 rockchip: configs: Enable mipi dsi for rk3399 rockchip: video: vop: Fix clk_set_rate() return error arch/arm/dts/rk3399-evb.dts | 84 arch/arm/dts/rk3399.dtsi | 72 arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++ arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 195 + arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + board/rockchip/evb_rk3399/evb-rk3399.c | 7 + configs/evb-rk3399_defconfig | 6 + drivers/video/rockchip/Kconfig | 11 +- drivers/video/rockchip/Makefile | 1 + drivers/video/rockchip/rk_mipi.c | 484 +++ drivers/video/rockchip/rk_vop.c | 30 +- 11 files changed, 908 insertions(+), 8 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/8] rockchip: video: Add mipi dsi driver for rk3399
Signed-off-by: Eric Gao
---
arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++
arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 195 +
drivers/video/rockchip/Kconfig | 11 +-
drivers/video/rockchip/Makefile | 1 +
drivers/video/rockchip/rk_mipi.c | 484 +++
5 files changed, 714 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
create mode 100644 drivers/video/rockchip/rk_mipi.c
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
index b340b05..b4ba436 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -440,6 +440,31 @@ enum {
GRF_UART_DBG_SEL_MASK = 3 << GRF_UART_DBG_SEL_SHIFT,
GRF_UART_DBG_SEL_C = 2,
+ /* GRF_SOC_CON20 */
+ GRF_DSI0_VOP_SEL_SHIFT = 0,
+ GRF_DSI0_VOP_SEL_MASK = 1 << GRF_DSI0_VOP_SEL_SHIFT,
+ GRF_DSI0_VOP_SEL_B = 0,
+ GRF_DSI0_VOP_SEL_L,
+
+ /* GRF_SOC_CON22 */
+ GRF_DPHY_TX0_RXMODE_SHIFT = 0,
+ GRF_DPHY_TX0_RXMODE_MASK =
+ 0xf << GRF_DPHY_TX0_RXMODE_SHIFT,
+ GRF_DPHY_TX0_RXMODE_EN = 0xb,
+ GRF_DPHY_TX0_RXMODE_DIS = 0,
+
+ GRF_DPHY_TX0_TXSTOPMODE_SHIFT = 4,
+ GRF_DPHY_TX0_TXSTOPMODE_MASK =
+ 0xf0 << GRF_DPHY_TX0_TXSTOPMODE_SHIFT,
+ GRF_DPHY_TX0_TXSTOPMODE_EN = 0xc,
+ GRF_DPHY_TX0_TXSTOPMODE_DIS = 0,
+
+ GRF_DPHY_TX0_TURNREQUEST_SHIFT = 12,
+ GRF_DPHY_TX0_TURNREQUEST_MASK =
+ 0xf000 << GRF_DPHY_TX0_TURNREQUEST_SHIFT,
+ GRF_DPHY_TX0_TURNREQUEST_EN = 0x1,
+ GRF_DPHY_TX0_TURNREQUEST_DIS = 0,
+
/* PMUGRF_GPIO0A_IOMUX */
PMUGRF_GPIO0A6_SEL_SHIFT= 12,
PMUGRF_GPIO0A6_SEL_MASK = 3 << PMUGRF_GPIO0A6_SEL_SHIFT,
diff --git a/arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
b/arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
new file mode 100644
index 000..f55ffb6
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
@@ -0,0 +1,195 @@
+/*
+ * Copyright (C) 2017-2025 Fuzhou Rockchip Electronics Co., Ltd
+ * author: Eric Gao
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef RK33_MIPI_DSI_H
+#define RK33_MIPI_DSI_H
+
+/*
+ * All these mipi controller register declaration provide reg address offset,
+ * bits width, bit offset for a specified register bits. With these message, we
+ * can set or clear every bits individually for a 32bit widthregister. We use
+ * DSI_HOST_BITS macro definition to combinat these message using the following
+ * format: val(32bit) = addr(16bit) | width(8bit) | offest(8bit)
+ * For example:
+ *#define SHUTDOWNZ DSI_HOST_BITS(0x004, 1, 0)
+ * means SHUTDOWNZ is a signal reg bit with bit offset qual 0,and it's reg addr
+ * offset is 0x004.The conbinat result = (0x004 << 16) | (1 << 8) | 0
+ */
+#define ADDR_SHIFT 16
+#define BITS_SHIFT 8
+#define OFFSET_SHIFT 0
+#define DSI_HOST_BITS(addr, bits, bit_offset) \
+((addr << ADDR_SHIFT) | (bits << BITS_SHIFT) | (bit_offset << OFFSET_SHIFT))
+
+/* DWC_DSI_VERSION_0x3133302A */
+#define VERSIONDSI_HOST_BITS(0x000, 32, 0)
+#define SHUTDOWNZ DSI_HOST_BITS(0x004, 1, 0)
+#define TO_CLK_DIVISIONDSI_HOST_BITS(0x008, 8, 8)
+#define TX_ESC_CLK_DIVISIONDSI_HOST_BITS(0x008, 8, 0)
+#define DPI_VCID DSI_HOST_BITS(0x00c, 2, 0)
+#define EN18_LOOSELY DSI_HOST_BITS(0x010, 1, 8)
+#define DPI_COLOR_CODING DSI_HOST_BITS(0x010, 4, 0)
+#define COLORM_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 4)
+#define SHUTD_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 3)
+#define HSYNC_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 2)
+#define VSYNC_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 1)
+#define DATAEN_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 0)
+#define OUTVACT_LPCMD_TIME DSI_HOST_BITS(0x018, 8, 16)
+#define INVACT_LPCMD_TIME DSI_HOST_BITS(0x018, 8, 0)
+#define CRC_RX_EN DSI_HOST_BITS(0x02c, 1, 4)
+#define ECC_RX_EN DSI_HOST_BITS(0x02c, 1, 3)
+#define BTA_EN DSI_HOST_BITS(0x02c, 1, 2)
+#define EOTP_RX_EN DSI_HOST_BITS(0x02c, 1, 1)
+#define EOTP_TX_EN DSI_HOST_BITS(0x02c, 1, 0)
+#define GEN_VID_RX DSI_HOST_BITS(0x030, 2, 0)
+#define CMD_VIDEO_MODE DSI_HOST_BITS(0x034, 1, 0)
+#define VPG_ORIENTATIONDSI_HOST_BITS(0x038, 1, 24)
+#define VPG_MODE DSI_HOST_BITS(0x038, 1, 20)
+#define VPG_EN DSI_HOST_BITS(0x038, 1, 16)
+#define LP_CMD_EN DSI_HOST_BITS(0x038, 1, 15)
+#define FRAME_BTA_ACK_EN DSI_HOST_BITS(0x038, 1, 14)
+#define LP_HFP
[U-Boot] [PATCH 2/8] rockchip: video: vop: Add mipi display mode for rk3399
Add mipi display mode for rk3399 vop, so that we can use mipi panel
for display.
Signed-off-by: Eric Gao
---
arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 +
drivers/video/rockchip/rk_vop.c | 6 ++
2 files changed, 7 insertions(+)
diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
index 0ce3d67..d5599ec 100644
--- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
@@ -90,6 +90,7 @@ enum vop_modes {
VOP_MODE_EDP = 0,
VOP_MODE_HDMI,
VOP_MODE_LVDS,
+ VOP_MODE_MIPI,
VOP_MODE_NONE,
VOP_MODE_AUTO_DETECT,
VOP_MODE_UNKNOWN,
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index bc02f80..84d6627 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -117,6 +117,10 @@ void rkvop_mode_set(struct rk3288_vop *regs,
clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN,
V_RGB_OUT_EN(1));
break;
+ case VOP_MODE_MIPI:
+ clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN,
+ V_MIPI_OUT_EN(1));
+break;
}
if (mode == VOP_MODE_HDMI || mode == VOP_MODE_EDP)
@@ -350,6 +354,8 @@ static const struct video_ops rk_vop_ops = {
};
static const struct udevice_id rk_vop_ids[] = {
+ { .compatible = "rockchip,rk3399-vop-big" },
+ { .compatible = "rockchip,rk3399-vop-lit" },
{ .compatible = "rockchip,rk3288-vop" },
{ }
};
--
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[U-Boot] [PATCH 3/8] rockchip: video: vop: Set different bitwidth for different display mode
Because the bitwidth is different for different display mode, so we need
to set them according to demand.
Signed-off-by: Eric Gao
---
drivers/video/rockchip/rk_vop.c | 20
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index 84d6627..a637f7d 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -181,13 +181,11 @@ void rkvop_mode_set(struct rk3288_vop *regs,
*
* @dev: VOP device that we want to connect to the display
* @fbbase:Frame buffer address
- * @l2bpp Log2 of bits-per-pixels for the display
* @ep_node: Device tree node to process - this is the offset of an endpoint
* node within the VOP's 'port' list.
* @return 0 if OK, -ve if something went wrong
*/
-int rk_display_init(struct udevice *dev, ulong fbbase,
- enum video_log2_bpp l2bpp, int ep_node)
+int rk_display_init(struct udevice *dev, ulong fbbase, int ep_node)
{
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
const void *blob = gd->fdt_blob;
@@ -199,6 +197,7 @@ int rk_display_init(struct udevice *dev, ulong fbbase,
int ret, remote, i, offset;
struct display_plat *disp_uc_plat;
struct clk clk;
+ enum video_log2_bpp l2bpp;
vop_id = fdtdec_get_int(blob, ep_node, "reg", -1);
debug("vop_id=%d\n", vop_id);
@@ -253,6 +252,19 @@ int rk_display_init(struct udevice *dev, ulong fbbase,
return ret;
}
+ /* Set bitwidth for vop display according to vop mode */
+ switch (vop_id) {
+ case VOP_MODE_EDP:
+ case VOP_MODE_HDMI:
+ case VOP_MODE_LVDS:
+ l2bpp = VIDEO_BPP16;
+ break;
+ case VOP_MODE_MIPI:
+ l2bpp = VIDEO_BPP32;
+ break;
+ default:
+ l2bpp = VIDEO_BPP16;
+ }
rkvop_mode_set(regs, &timing, vop_id);
rkvop_enable(regs, fbbase, 1 << l2bpp, &timing);
@@ -330,7 +342,7 @@ static int rk_vop_probe(struct udevice *dev)
for (node = fdt_first_subnode(blob, port);
node > 0;
node = fdt_next_subnode(blob, node)) {
- ret = rk_display_init(dev, plat->base, VIDEO_BPP16, node);
+ ret = rk_display_init(dev, plat->base, node);
if (ret)
debug("Device failed: ret=%d\n", ret);
if (!ret)
--
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[U-Boot] [PATCH 4/8] rockchip: video: vop: Reserve enough space for mipi dispaly
plat->size here is used to reserve enough frame buffer space befor relocation.
our mipi display mode need more space, so reset it.
Signed-off-by: Eric Gao
---
drivers/video/rockchip/rk_vop.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index a637f7d..ac9e7db 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -357,7 +357,7 @@ static int rk_vop_bind(struct udevice *dev)
{
struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
- plat->size = 1920 * 1080 * 2;
+ plat->size = 1920 * 1200 * 4;
return 0;
}
--
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[U-Boot] [PATCH 5/8] rockchip: board: evb_rk3399: initialize pwm0 for dispaly backlight
Signed-off-by: Eric Gao
---
board/rockchip/evb_rk3399/evb-rk3399.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c
b/board/rockchip/evb_rk3399/evb-rk3399.c
index 362fa0b..76ab467 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -28,6 +28,13 @@ int board_init(void)
goto out;
}
+ /* Enable pwm0 for panel backlight */
+ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM0);
+ if (ret) {
+ debug("%s PWM0 pinctrl init fail!\n", __func__);
+ goto out;
+ }
+
ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2);
if (ret) {
debug("%s PWM2 pinctrl init fail!\n", __func__);
--
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[U-Boot] [PATCH v3 0/2] Add Kconfig for rockchip video driver.
patch 1: add Kconfig file rockchip video driver. patch 2: modify Makefile according to the new Kconfig. Eric Gao (2): rockchip: video: Kconfig: Add Kconfig for rockchip video driver rockchip: video: Makefile: Modify Makefile for rockchip video driver configs/chromebit_mickey_defconfig | 1 + configs/chromebook_jerry_defconfig | 2 ++ configs/chromebook_minnie_defconfig | 2 ++ configs/firefly-rk3288_defconfig| 1 + configs/miqi-rk3288_defconfig | 1 + configs/rock2_defconfig | 1 + drivers/video/Kconfig | 10 + drivers/video/rockchip/Kconfig | 43 + drivers/video/rockchip/Makefile | 7 +- 9 files changed, 58 insertions(+), 10 deletions(-) create mode 100644 drivers/video/rockchip/Kconfig -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 6/8] rockchip: dts: Add mipi dsi support for rk3399
Add dts config for mipi display, include vop, mipi controller, panel, backlight
. And Enable rk808 for lcd_3v3 in another patch.
Signed-off-by: Eric Gao
---
arch/arm/dts/rk3399-evb.dts | 84 +
arch/arm/dts/rk3399.dtsi| 72 ++
2 files changed, 156 insertions(+)
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index e1f867b..3d6f3ce 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -59,6 +59,15 @@
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ status = "disabled";
+ };
+
+ panel:panel {
+ compatible = "simple-panel";
+ status = "disabled";
+ };
};
&emmc_phy {
@@ -141,6 +150,7 @@
status = "okay";
vcc12-supply = <&vcc3v3_sys>;
+
regulators {
vcc33_lcd: SWITCH_REG2 {
regulator-always-on;
@@ -151,6 +161,80 @@
};
};
+&backlight {
+ power-supply = <&vccsys>;
+ enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7
+ 8 9 10 11 12 13 14 15
+16 17 18 19 20 21 22 23
+24 25 26 27 28 29 30 31
+32 33 34 35 36 37 38 39
+40 41 42 43 44 45 46 47
+48 49 50 51 52 53 54 55
+56 57 58 59 60 61 62 63
+64 65 66 67 68 69 70 71
+72 73 74 75 76 77 78 79
+80 81 82 83 84 85 86 87
+88 89 90 91 92 93 94 95
+96 97 98 99 100 101 102 103
+ 104 105 106 107 108 109 110 111
+ 112 113 114 115 116 117 118 119
+ 120 121 122 123 124 125 126 127
+ 128 129 130 131 132 133 134 135
+ 136 137 138 139 140 141 142 143
+ 144 145 146 147 148 149 150 151
+ 152 153 154 155 156 157 158 159
+ 160 161 162 163 164 165 166 167
+ 168 169 170 171 172 173 174 175
+ 176 177 178 179 180 181 182 183
+ 184 185 186 187 188 189 190 191
+ 192 193 194 195 196 197 198 199
+ 200 201 202 203 204 205 206 207
+ 208 209 210 211 212 213 214 215
+ 216 217 218 219 220 221 222 223
+ 224 225 226 227 228 229 230 231
+ 232 233 234 235 236 237 238 239
+ 240 241 242 243 244 245 246 247
+ 248 249 250 251 252 253 254 255>;
+ default-brightness-level = <200>;
+ pwms = <&pwm0 0 25000 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ pwm-delay-us = <1>;
+ status = "okay";
+ };
+
+&panel {
+ power-supply = <&vcc33_lcd>;
+ backlight = <&backlight>;
+ /*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
+ status = "okay";
+};
+
+&mipi_dsi {
+ status = "okay";
+ rockchip,panel = <&panel>;
+ display-timings {
+ timing0 {
+ bits-per-pixel = <24>;
+ clock-frequency = <16000>;
+ hfront-porch = <120>;
+ hsync-len = <20>;
+ hback-porch = <21>;
+ hactive = <1200>;
+ vfront-porch = <21>;
+ vsync-len = <3>;
+ vback-porch = <18>;
+ vactive = <1920>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+};
+
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index d94d780..9344a43 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -684,6 +684,78 @@
status = "disabled";
};
+ vopl: vop@ff8f {
+ u-boot,dm-pre-reloc;
+ compatible = "rockchip,rk3399-vop-lit";
+ reg = <0x0 0xff8f 0x0 0x3efc>
[U-Boot] [PATCH 8/8] rockchip: video: vop: Fix clk_set_rate() return error
The function clk_set_rate() will return it's input parameter, so it's return
value in normal condition is nonzero. In this case, we should report an error
when it return zero rather than return a nonzero value.
Signed-off-by: Eric Gao
---
drivers/video/rockchip/rk_vop.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index ac9e7db..e8fa177 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -247,7 +247,7 @@ int rk_display_init(struct udevice *dev, ulong fbbase, int
ep_node)
ret = clk_get_by_index(dev, 1, &clk);
if (!ret)
ret = clk_set_rate(&clk, timing.pixelclock.typ);
- if (ret) {
+ if (!ret) {
debug("%s: Failed to set pixel clock: ret=%d\n", __func__, ret);
return ret;
}
--
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[U-Boot] [PATCH 7/8] rockchip: configs: Enable mipi dsi for rk3399
Enable mipi dsi by default for rk3399-evb board Signed-off-by: Eric Gao --- configs/evb-rk3399_defconfig| 6 ++ drivers/video/rockchip/Kconfig | 2 +- drivers/video/rockchip/Makefile | 2 +- 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index cef8506..3405857 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -66,3 +66,9 @@ CONFIG_PMIC_CHILDREN=y CONFIG_SPL_PMIC_CHILDREN=y CONFIG_PMIC_RK808=y CONFIG_REGULATOR_RK808=y +CONFIG_DM_VIDEO=y +CONFIG_DM_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_DISPLAY=y +CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_MIPI=y diff --git a/drivers/video/rockchip/Kconfig b/drivers/video/rockchip/Kconfig index 3f57d5c..1383efa 100644 --- a/drivers/video/rockchip/Kconfig +++ b/drivers/video/rockchip/Kconfig @@ -40,7 +40,7 @@ if VIDEO_ROCKCHIP This enable High-Definition Multimedia Interface(HDMI) display support. - config DISPLAY_MIPI + config DISPLAY_ROCKCHIP_MIPI bool "MIPI Port" depends on VIDEO_ROCKCHIP help diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile index f9d1abf..c742902 100644 --- a/drivers/video/rockchip/Makefile +++ b/drivers/video/rockchip/Makefile @@ -10,5 +10,5 @@ obj-y += rk_vop.o obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o ../dw_hdmi.o -obj-$(CONFIG_DISPLAY_MIPI) += rk_mipi.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 2/2] rockchip: video: Makefile: Modify Makefile for rockchip video driver
Modify Makefile for rockchip video driver according to Kconfig, so that source code will not be compiled if not needed. Signed-off-by: Eric Gao --- drivers/video/rockchip/Makefile | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile index 755350b..3bb0519 100644 --- a/drivers/video/rockchip/Makefile +++ b/drivers/video/rockchip/Makefile @@ -5,4 +5,9 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += rk_edp.o rk_hdmi.o rk_vop.o rk_lvds.o ../dw_hdmi.o +ifdef CONFIG_VIDEO_ROCKCHIP +obj-y += rk_vop.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o ../dw_hdmi.o +endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 1/2] rockchip: video: Kconfig: Add Kconfig for rockchip video driver
1. add Kconfig for rockchip video driver, so that video port can be selected as needed. 2. move VIDEO_ROCKCHIP option to new Kconfig for concision. Signed-off-by: Eric Gao --- configs/chromebit_mickey_defconfig | 1 + configs/chromebook_jerry_defconfig | 2 ++ configs/chromebook_minnie_defconfig | 2 ++ configs/firefly-rk3288_defconfig| 1 + configs/miqi-rk3288_defconfig | 1 + configs/rock2_defconfig | 1 + drivers/video/Kconfig | 10 + drivers/video/rockchip/Kconfig | 43 + 8 files changed, 52 insertions(+), 9 deletions(-) create mode 100644 drivers/video/rockchip/Kconfig diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index a29e4e5..f04ecb4 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -72,6 +72,7 @@ CONFIG_SYSRESET=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index e642b8d..dd0476b 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -72,6 +72,8 @@ CONFIG_SYSRESET=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_EDP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 1812362..cecae5f 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -72,6 +72,8 @@ CONFIG_SYSRESET=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_DISPLAY_ROCKCHIP_EDP=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index b0741d7..b975383 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -70,6 +70,7 @@ CONFIG_USB_STORAGE=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index 203824b..71e4db7 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -67,6 +67,7 @@ CONFIG_USB_STORAGE=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index e9a32a9..5ddca5a 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -64,6 +64,7 @@ CONFIG_SYSRESET=y CONFIG_DM_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_HDMI=y CONFIG_CONSOLE_SCROLL_LINES=10 CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 19e9745..818f738 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -416,15 +416,7 @@ config VIDEO_FSL_DCU_MAX_FB_SIZE_MB Set maximum framebuffer size to be used for Freescale Display Controller Unit (DCU4). -config VIDEO_ROCKCHIP - bool "Enable Rockchip video support" - depends on DM_VIDEO - help - Rockchip SoCs provide video output capabilities for High-Definition - Multimedia Interface (HDMI), Low-voltage Differential Signalling - (LVDS), embedded DisplayPort (eDP) and Display Serial Interface - (DSI). This driver supports the on-chip video output device, and - targets the Rockchip RK3288. +source "drivers/video/rockchip/Kconfig" config VIDEO_SANDBOX_SDL bool "Enable sandbox video console using SDL" diff --git a/drivers/video/rockchip/Kconfig b/drivers/video/rockchip/Kconfig new file mode 100644 index 000..09c4ea2 --- /dev/null +++ b/drivers/video/rockchip/Kconfig @@ -0,0 +1,43 @@ +# +# Video drivers selection for rockchip soc. These configs only impact the +# compile process. You can surely check all the options. In this case, all the +# display driver will be compiled, but which drivers finally will be used is +# decided by device tree configuration. What's more, enable needed power for +# display by configure the device tree, and the vop driver will do the rest. +# +# Author: Eric Gao +# + +menuconfig VIDEO_ROCKCHIP + bool "Enable Rockchip Video Support" + depends on DM_VIDEO + help + Rockchip SoCs provide video output capabilities for High-Definition + Multimedia Interface (HDMI), Low-voltage Differential Signalling + (LVDS), embedded D
[U-Boot] [PATCH v2 0/8] Add mipi display support for rk3399
Changes in v2: -Add mipi driver and it's header file -Add Kconfig and Makefile additions for mipi driver. -Add necessary Grf declaration for mipi driver. -Add mipi display mode for vop. -Add compatible items for rk3399 vop. -Change the bitwidth for different display mode. -Extend frame buffer size for mipi display -Add pwm0 pinctrl init for lcd backlight. -Add dts config for mipi display. -Add defconfigs for mipi display, so that it can be enabled by default. -Fix rk_display_init() function report error(err:-19). Eric Gao (8): rockchip: video: Add mipi dsi driver for rk3399 rockchip: video: vop: Add mipi display mode for rk3399 rockchip: video: vop: Set different bitwidth for different display mode rockchip: video: vop: Reserve enough space for mipi dispaly rockchip: board: evb_rk3399: initialize pwm0 for dispaly backlight rockchip: dts: Add mipi dsi support for rk3399 rockchip: configs: Enable mipi dsi for rk3399 rockchip: video: vop: Fix rk_display_init() return error arch/arm/dts/rk3399-evb.dts | 84 arch/arm/dts/rk3399.dtsi | 72 arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++ arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 195 + arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 + board/rockchip/evb_rk3399/evb-rk3399.c | 7 + configs/evb-rk3399_defconfig | 6 + drivers/video/rockchip/Kconfig | 11 +- drivers/video/rockchip/Makefile | 1 + drivers/video/rockchip/rk_mipi.c | 484 +++ drivers/video/rockchip/rk_vop.c | 30 +- 11 files changed, 908 insertions(+), 8 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 1/8] rockchip: video: Add mipi dsi driver for rk3399
Signed-off-by: Eric Gao
---
Changes in v2:
-Add mipi driver and it's header file
-Add Kconfig and Makefile additions for mipi driver.
-Add necessary Grf declaration for mipi driver.
arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 25 ++
arch/arm/include/asm/arch-rockchip/mipi_rk3399.h | 195 +
drivers/video/rockchip/Kconfig | 11 +-
drivers/video/rockchip/Makefile | 1 +
drivers/video/rockchip/rk_mipi.c | 484 +++
5 files changed, 714 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
create mode 100644 drivers/video/rockchip/rk_mipi.c
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
index b340b05..b4ba436 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -440,6 +440,31 @@ enum {
GRF_UART_DBG_SEL_MASK = 3 << GRF_UART_DBG_SEL_SHIFT,
GRF_UART_DBG_SEL_C = 2,
+ /* GRF_SOC_CON20 */
+ GRF_DSI0_VOP_SEL_SHIFT = 0,
+ GRF_DSI0_VOP_SEL_MASK = 1 << GRF_DSI0_VOP_SEL_SHIFT,
+ GRF_DSI0_VOP_SEL_B = 0,
+ GRF_DSI0_VOP_SEL_L,
+
+ /* GRF_SOC_CON22 */
+ GRF_DPHY_TX0_RXMODE_SHIFT = 0,
+ GRF_DPHY_TX0_RXMODE_MASK =
+ 0xf << GRF_DPHY_TX0_RXMODE_SHIFT,
+ GRF_DPHY_TX0_RXMODE_EN = 0xb,
+ GRF_DPHY_TX0_RXMODE_DIS = 0,
+
+ GRF_DPHY_TX0_TXSTOPMODE_SHIFT = 4,
+ GRF_DPHY_TX0_TXSTOPMODE_MASK =
+ 0xf0 << GRF_DPHY_TX0_TXSTOPMODE_SHIFT,
+ GRF_DPHY_TX0_TXSTOPMODE_EN = 0xc,
+ GRF_DPHY_TX0_TXSTOPMODE_DIS = 0,
+
+ GRF_DPHY_TX0_TURNREQUEST_SHIFT = 12,
+ GRF_DPHY_TX0_TURNREQUEST_MASK =
+ 0xf000 << GRF_DPHY_TX0_TURNREQUEST_SHIFT,
+ GRF_DPHY_TX0_TURNREQUEST_EN = 0x1,
+ GRF_DPHY_TX0_TURNREQUEST_DIS = 0,
+
/* PMUGRF_GPIO0A_IOMUX */
PMUGRF_GPIO0A6_SEL_SHIFT= 12,
PMUGRF_GPIO0A6_SEL_MASK = 3 << PMUGRF_GPIO0A6_SEL_SHIFT,
diff --git a/arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
b/arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
new file mode 100644
index 000..f55ffb6
--- /dev/null
+++ b/arch/arm/include/asm/arch-rockchip/mipi_rk3399.h
@@ -0,0 +1,195 @@
+/*
+ * Copyright (C) 2017-2025 Fuzhou Rockchip Electronics Co., Ltd
+ * author: Eric Gao
+ *
+ * SPDX-License-Identifier:GPL-2.0+
+ */
+
+#ifndef RK33_MIPI_DSI_H
+#define RK33_MIPI_DSI_H
+
+/*
+ * All these mipi controller register declaration provide reg address offset,
+ * bits width, bit offset for a specified register bits. With these message, we
+ * can set or clear every bits individually for a 32bit widthregister. We use
+ * DSI_HOST_BITS macro definition to combinat these message using the following
+ * format: val(32bit) = addr(16bit) | width(8bit) | offest(8bit)
+ * For example:
+ *#define SHUTDOWNZ DSI_HOST_BITS(0x004, 1, 0)
+ * means SHUTDOWNZ is a signal reg bit with bit offset qual 0,and it's reg addr
+ * offset is 0x004.The conbinat result = (0x004 << 16) | (1 << 8) | 0
+ */
+#define ADDR_SHIFT 16
+#define BITS_SHIFT 8
+#define OFFSET_SHIFT 0
+#define DSI_HOST_BITS(addr, bits, bit_offset) \
+((addr << ADDR_SHIFT) | (bits << BITS_SHIFT) | (bit_offset << OFFSET_SHIFT))
+
+/* DWC_DSI_VERSION_0x3133302A */
+#define VERSIONDSI_HOST_BITS(0x000, 32, 0)
+#define SHUTDOWNZ DSI_HOST_BITS(0x004, 1, 0)
+#define TO_CLK_DIVISIONDSI_HOST_BITS(0x008, 8, 8)
+#define TX_ESC_CLK_DIVISIONDSI_HOST_BITS(0x008, 8, 0)
+#define DPI_VCID DSI_HOST_BITS(0x00c, 2, 0)
+#define EN18_LOOSELY DSI_HOST_BITS(0x010, 1, 8)
+#define DPI_COLOR_CODING DSI_HOST_BITS(0x010, 4, 0)
+#define COLORM_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 4)
+#define SHUTD_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 3)
+#define HSYNC_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 2)
+#define VSYNC_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 1)
+#define DATAEN_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 0)
+#define OUTVACT_LPCMD_TIME DSI_HOST_BITS(0x018, 8, 16)
+#define INVACT_LPCMD_TIME DSI_HOST_BITS(0x018, 8, 0)
+#define CRC_RX_EN DSI_HOST_BITS(0x02c, 1, 4)
+#define ECC_RX_EN DSI_HOST_BITS(0x02c, 1, 3)
+#define BTA_EN DSI_HOST_BITS(0x02c, 1, 2)
+#define EOTP_RX_EN DSI_HOST_BITS(0x02c, 1, 1)
+#define EOTP_TX_EN DSI_HOST_BITS(0x02c, 1, 0)
+#define GEN_VID_RX DSI_HOST_BITS(0x030, 2, 0)
+#define CMD_VIDEO_MODE DSI_HOST_BITS(0x034, 1, 0)
+#define VPG_ORIENTATIONDSI_HOST_BITS(0x038, 1, 24)
+#define VPG_MODE DSI_HOST_BITS(0x038, 1, 20)
+#define VPG_EN DSI_HOST_BITS(0x038, 1, 16)
[U-Boot] [PATCH v2 2/8] rockchip: video: vop: Add mipi display mode for rk3399
Add mipi display mode for rk3399 vop, so that we can use mipi panel
for display.
Signed-off-by: Eric Gao
---
Changes in v2:
-Add mipi display mode for vop.
-Add compatible items for rk3399 vop.
arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 +
drivers/video/rockchip/rk_vop.c | 6 ++
2 files changed, 7 insertions(+)
diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
index 0ce3d67..d5599ec 100644
--- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
@@ -90,6 +90,7 @@ enum vop_modes {
VOP_MODE_EDP = 0,
VOP_MODE_HDMI,
VOP_MODE_LVDS,
+ VOP_MODE_MIPI,
VOP_MODE_NONE,
VOP_MODE_AUTO_DETECT,
VOP_MODE_UNKNOWN,
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index bc02f80..84d6627 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -117,6 +117,10 @@ void rkvop_mode_set(struct rk3288_vop *regs,
clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN,
V_RGB_OUT_EN(1));
break;
+ case VOP_MODE_MIPI:
+ clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN,
+ V_MIPI_OUT_EN(1));
+break;
}
if (mode == VOP_MODE_HDMI || mode == VOP_MODE_EDP)
@@ -350,6 +354,8 @@ static const struct video_ops rk_vop_ops = {
};
static const struct udevice_id rk_vop_ids[] = {
+ { .compatible = "rockchip,rk3399-vop-big" },
+ { .compatible = "rockchip,rk3399-vop-lit" },
{ .compatible = "rockchip,rk3288-vop" },
{ }
};
--
1.9.1
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[U-Boot] [PATCH v2 5/8] rockchip: board: evb_rk3399: initialize pwm0 for dispaly backlight
Signed-off-by: Eric Gao
---
Changes in v2:
-Add pwm0 pinctrl init for lcd backlight.
board/rockchip/evb_rk3399/evb-rk3399.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c
b/board/rockchip/evb_rk3399/evb-rk3399.c
index 362fa0b..76ab467 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -28,6 +28,13 @@ int board_init(void)
goto out;
}
+ /* Enable pwm0 for panel backlight */
+ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM0);
+ if (ret) {
+ debug("%s PWM0 pinctrl init fail!\n", __func__);
+ goto out;
+ }
+
ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2);
if (ret) {
debug("%s PWM2 pinctrl init fail!\n", __func__);
--
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[U-Boot] [PATCH v2 4/8] rockchip: video: vop: Reserve enough space for mipi dispaly
plat->size here is used to reserve enough frame buffer space befor relocation.
our mipi display mode need more space, so reset it.
Signed-off-by: Eric Gao
---
Changes in v2:
-Extend frame buffer size for mipi display
drivers/video/rockchip/rk_vop.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index a637f7d..ac9e7db 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -357,7 +357,7 @@ static int rk_vop_bind(struct udevice *dev)
{
struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
- plat->size = 1920 * 1080 * 2;
+ plat->size = 1920 * 1200 * 4;
return 0;
}
--
1.9.1
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[U-Boot] [PATCH v2 3/8] rockchip: video: vop: Set different bitwidth for different display mode
Because the bitwidth is different for different display mode, so we need
to set them according to demand.
Signed-off-by: Eric Gao
---
Changes in v2:
-Change the bitwidth for different display mode.
drivers/video/rockchip/rk_vop.c | 20
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index 84d6627..a637f7d 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -181,13 +181,11 @@ void rkvop_mode_set(struct rk3288_vop *regs,
*
* @dev: VOP device that we want to connect to the display
* @fbbase:Frame buffer address
- * @l2bpp Log2 of bits-per-pixels for the display
* @ep_node: Device tree node to process - this is the offset of an endpoint
* node within the VOP's 'port' list.
* @return 0 if OK, -ve if something went wrong
*/
-int rk_display_init(struct udevice *dev, ulong fbbase,
- enum video_log2_bpp l2bpp, int ep_node)
+int rk_display_init(struct udevice *dev, ulong fbbase, int ep_node)
{
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
const void *blob = gd->fdt_blob;
@@ -199,6 +197,7 @@ int rk_display_init(struct udevice *dev, ulong fbbase,
int ret, remote, i, offset;
struct display_plat *disp_uc_plat;
struct clk clk;
+ enum video_log2_bpp l2bpp;
vop_id = fdtdec_get_int(blob, ep_node, "reg", -1);
debug("vop_id=%d\n", vop_id);
@@ -253,6 +252,19 @@ int rk_display_init(struct udevice *dev, ulong fbbase,
return ret;
}
+ /* Set bitwidth for vop display according to vop mode */
+ switch (vop_id) {
+ case VOP_MODE_EDP:
+ case VOP_MODE_HDMI:
+ case VOP_MODE_LVDS:
+ l2bpp = VIDEO_BPP16;
+ break;
+ case VOP_MODE_MIPI:
+ l2bpp = VIDEO_BPP32;
+ break;
+ default:
+ l2bpp = VIDEO_BPP16;
+ }
rkvop_mode_set(regs, &timing, vop_id);
rkvop_enable(regs, fbbase, 1 << l2bpp, &timing);
@@ -330,7 +342,7 @@ static int rk_vop_probe(struct udevice *dev)
for (node = fdt_first_subnode(blob, port);
node > 0;
node = fdt_next_subnode(blob, node)) {
- ret = rk_display_init(dev, plat->base, VIDEO_BPP16, node);
+ ret = rk_display_init(dev, plat->base, node);
if (ret)
debug("Device failed: ret=%d\n", ret);
if (!ret)
--
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[U-Boot] [PATCH v2 6/8] rockchip: dts: Add mipi dsi support for rk3399
Add dts config for mipi display, include vop, mipi controller, panel, backlight
. And Enable rk808 for lcd_3v3 in another patch.
Signed-off-by: Eric Gao
---
Changes in v2:
-Add dts config for mipi display.
arch/arm/dts/rk3399-evb.dts | 84 +
arch/arm/dts/rk3399.dtsi| 72 ++
2 files changed, 156 insertions(+)
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index e1f867b..3d6f3ce 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -59,6 +59,15 @@
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ status = "disabled";
+ };
+
+ panel:panel {
+ compatible = "simple-panel";
+ status = "disabled";
+ };
};
&emmc_phy {
@@ -141,6 +150,7 @@
status = "okay";
vcc12-supply = <&vcc3v3_sys>;
+
regulators {
vcc33_lcd: SWITCH_REG2 {
regulator-always-on;
@@ -151,6 +161,80 @@
};
};
+&backlight {
+ power-supply = <&vccsys>;
+ enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7
+ 8 9 10 11 12 13 14 15
+16 17 18 19 20 21 22 23
+24 25 26 27 28 29 30 31
+32 33 34 35 36 37 38 39
+40 41 42 43 44 45 46 47
+48 49 50 51 52 53 54 55
+56 57 58 59 60 61 62 63
+64 65 66 67 68 69 70 71
+72 73 74 75 76 77 78 79
+80 81 82 83 84 85 86 87
+88 89 90 91 92 93 94 95
+96 97 98 99 100 101 102 103
+ 104 105 106 107 108 109 110 111
+ 112 113 114 115 116 117 118 119
+ 120 121 122 123 124 125 126 127
+ 128 129 130 131 132 133 134 135
+ 136 137 138 139 140 141 142 143
+ 144 145 146 147 148 149 150 151
+ 152 153 154 155 156 157 158 159
+ 160 161 162 163 164 165 166 167
+ 168 169 170 171 172 173 174 175
+ 176 177 178 179 180 181 182 183
+ 184 185 186 187 188 189 190 191
+ 192 193 194 195 196 197 198 199
+ 200 201 202 203 204 205 206 207
+ 208 209 210 211 212 213 214 215
+ 216 217 218 219 220 221 222 223
+ 224 225 226 227 228 229 230 231
+ 232 233 234 235 236 237 238 239
+ 240 241 242 243 244 245 246 247
+ 248 249 250 251 252 253 254 255>;
+ default-brightness-level = <200>;
+ pwms = <&pwm0 0 25000 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ pwm-delay-us = <1>;
+ status = "okay";
+ };
+
+&panel {
+ power-supply = <&vcc33_lcd>;
+ backlight = <&backlight>;
+ /*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
+ status = "okay";
+};
+
+&mipi_dsi {
+ status = "okay";
+ rockchip,panel = <&panel>;
+ display-timings {
+ timing0 {
+ bits-per-pixel = <24>;
+ clock-frequency = <16000>;
+ hfront-porch = <120>;
+ hsync-len = <20>;
+ hback-porch = <21>;
+ hactive = <1200>;
+ vfront-porch = <21>;
+ vsync-len = <3>;
+ vback-porch = <18>;
+ vactive = <1920>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+};
+
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index d94d780..9344a43 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -684,6 +684,78 @@
status = "disabled";
};
+ vopl: vop@ff8f {
+ u-boot,dm-pre-reloc;
+ compatible = "rockchip,rk3399-vop-lit";
+
[U-Boot] [PATCH v2 8/8] rockchip: video: vop: Fix rk_display_init() return error
The function clk_set_rate() will return it's input parameter, so it's return
value in normal condition is nonzero. In this case, we should report an error
when it return zero rather than return a nonzero value.
Signed-off-by: Eric Gao
---
Changes in v2:
-Fix rk_display_init() function report error(err:-19).
drivers/video/rockchip/rk_vop.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index ac9e7db..e8fa177 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -247,7 +247,7 @@ int rk_display_init(struct udevice *dev, ulong fbbase, int
ep_node)
ret = clk_get_by_index(dev, 1, &clk);
if (!ret)
ret = clk_set_rate(&clk, timing.pixelclock.typ);
- if (ret) {
+ if (!ret) {
debug("%s: Failed to set pixel clock: ret=%d\n", __func__, ret);
return ret;
}
--
1.9.1
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[U-Boot] [PATCH v2 7/8] rockchip: configs: Enable mipi dsi for rk3399
Enable mipi dsi by default for rk3399-evb board Signed-off-by: Eric Gao --- Changes in v2: -Add defconfigs for mipi display, so that it can be enabled by default. configs/evb-rk3399_defconfig| 6 ++ drivers/video/rockchip/Kconfig | 2 +- drivers/video/rockchip/Makefile | 2 +- 3 files changed, 8 insertions(+), 2 deletions(-) diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index cef8506..3405857 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -66,3 +66,9 @@ CONFIG_PMIC_CHILDREN=y CONFIG_SPL_PMIC_CHILDREN=y CONFIG_PMIC_RK808=y CONFIG_REGULATOR_RK808=y +CONFIG_DM_VIDEO=y +CONFIG_DM_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_DISPLAY=y +CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_MIPI=y diff --git a/drivers/video/rockchip/Kconfig b/drivers/video/rockchip/Kconfig index 3f57d5c..1383efa 100644 --- a/drivers/video/rockchip/Kconfig +++ b/drivers/video/rockchip/Kconfig @@ -40,7 +40,7 @@ if VIDEO_ROCKCHIP This enable High-Definition Multimedia Interface(HDMI) display support. - config DISPLAY_MIPI + config DISPLAY_ROCKCHIP_MIPI bool "MIPI Port" depends on VIDEO_ROCKCHIP help diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile index f9d1abf..c742902 100644 --- a/drivers/video/rockchip/Makefile +++ b/drivers/video/rockchip/Makefile @@ -10,5 +10,5 @@ obj-y += rk_vop.o obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o ../dw_hdmi.o -obj-$(CONFIG_DISPLAY_MIPI) += rk_mipi.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v1 0/2]
Add bmp logo display support for evb-rk3399 Changes in v1: -Add bmp logo display support. -Enable logo display for evb-rk3399 Eric Gao (2): board: rockchip: common: Add bmp logo support rockchip: include: Enable logo display for evb-rk3399 board/rockchip/common/Makefile |9 + board/rockchip/common/common.c | 20 + board/rockchip/common/misc.c | 85 + include/configs/evb_rk3399.h |7 + include/rockchip/misc.h |9 + include/rockchip/rockchip_logo.h | 9613 ++ tools/logos/rockchip_24bit.bmp | Bin 0 -> 115322 bytes 7 files changed, 9743 insertions(+) create mode 100644 board/rockchip/common/Makefile create mode 100644 board/rockchip/common/common.c create mode 100644 board/rockchip/common/misc.c create mode 100644 include/rockchip/misc.h create mode 100644 include/rockchip/rockchip_logo.h create mode 100644 tools/logos/rockchip_24bit.bmp -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v1 0/2]
Add bmp logo display support for evb-rk3399 Changes in v1: -Add bmp logo display support. -Enable logo display for evb-rk3399 Eric Gao (2): board: rockchip: common: Add bmp logo support rockchip: include: Enable logo display for evb-rk3399 board/rockchip/common/Makefile |9 + board/rockchip/common/common.c | 20 + board/rockchip/common/misc.c | 85 + include/configs/evb_rk3399.h |7 + include/rockchip/misc.h |9 + include/rockchip/rockchip_logo.h | 9613 ++ tools/logos/rockchip_24bit.bmp | Bin 0 -> 115322 bytes 7 files changed, 9743 insertions(+) create mode 100644 board/rockchip/common/Makefile create mode 100644 board/rockchip/common/common.c create mode 100644 board/rockchip/common/misc.c create mode 100644 include/rockchip/misc.h create mode 100644 include/rockchip/rockchip_logo.h create mode 100644 tools/logos/rockchip_24bit.bmp -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v1 2/2] rockchip: include: Enable logo display for evb-rk3399
Signed-off-by: Eric Gao --- Changes in v1: -Enable logo display for evb-rk3399 include/configs/evb_rk3399.h | 7 +++ 1 file changed, 7 insertions(+) diff --git a/include/configs/evb_rk3399.h b/include/configs/evb_rk3399.h index 8fdefa2..af44e45 100644 --- a/include/configs/evb_rk3399.h +++ b/include/configs/evb_rk3399.h @@ -22,4 +22,11 @@ #define CONFIG_SYS_WHITE_ON_BLACK +/* Enable Misc to show logo */ +#define CONFIG_BOARD_COMMON +#define CONFIG_MISC_COMMON +#define CONFIG_MISC_INIT_R +#define CONFIG_CMD_BMP +#define CONFIG_BMP_24BMP + #endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 02/11] rockchip: video: Add mipi driver for rockchip soc
Signed-off-by: Eric Gao --- Changes in v3: -Split mipi dsi driver file and header as a single patch. Changes in v2: None .../include/asm/arch-rockchip/rockchip_mipi_dsi.h | 195 drivers/video/rockchip/rk_mipi.c | 491 + 2 files changed, 686 insertions(+) create mode 100644 arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h create mode 100644 drivers/video/rockchip/rk_mipi.c diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h b/arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h new file mode 100644 index 000..d7f79c5 --- /dev/null +++ b/arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h @@ -0,0 +1,195 @@ +/* + * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd + * author: Eric Gao + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef ROCKCHIP_MIPI_DSI_H +#define ROCKCHIP_MIPI_DSI_H + +/* + * All these mipi controller register declaration provide reg address offset, + * bits width, bit offset for a specified register bits. With these message, we + * can set or clear every bits individually for a 32bit widthregister. We use + * DSI_HOST_BITS macro definition to combinat these message using the following + * format: val(32bit) = addr(16bit) | width(8bit) | offest(8bit) + * For example: + *#define SHUTDOWNZ DSI_HOST_BITS(0x004, 1, 0) + * means SHUTDOWNZ is a signal reg bit with bit offset qual 0,and it's reg addr + * offset is 0x004.The conbinat result = (0x004 << 16) | (1 << 8) | 0 + */ +#define ADDR_SHIFT 16 +#define BITS_SHIFT 8 +#define OFFSET_SHIFT 0 +#define DSI_HOST_BITS(addr, bits, bit_offset) \ +((addr << ADDR_SHIFT) | (bits << BITS_SHIFT) | (bit_offset << OFFSET_SHIFT)) + +/* DWC_DSI_VERSION_0x3133302A */ +#define VERSIONDSI_HOST_BITS(0x000, 32, 0) +#define SHUTDOWNZ DSI_HOST_BITS(0x004, 1, 0) +#define TO_CLK_DIVISIONDSI_HOST_BITS(0x008, 8, 8) +#define TX_ESC_CLK_DIVISIONDSI_HOST_BITS(0x008, 8, 0) +#define DPI_VCID DSI_HOST_BITS(0x00c, 2, 0) +#define EN18_LOOSELY DSI_HOST_BITS(0x010, 1, 8) +#define DPI_COLOR_CODING DSI_HOST_BITS(0x010, 4, 0) +#define COLORM_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 4) +#define SHUTD_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 3) +#define HSYNC_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 2) +#define VSYNC_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 1) +#define DATAEN_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 0) +#define OUTVACT_LPCMD_TIME DSI_HOST_BITS(0x018, 8, 16) +#define INVACT_LPCMD_TIME DSI_HOST_BITS(0x018, 8, 0) +#define CRC_RX_EN DSI_HOST_BITS(0x02c, 1, 4) +#define ECC_RX_EN DSI_HOST_BITS(0x02c, 1, 3) +#define BTA_EN DSI_HOST_BITS(0x02c, 1, 2) +#define EOTP_RX_EN DSI_HOST_BITS(0x02c, 1, 1) +#define EOTP_TX_EN DSI_HOST_BITS(0x02c, 1, 0) +#define GEN_VID_RX DSI_HOST_BITS(0x030, 2, 0) +#define CMD_VIDEO_MODE DSI_HOST_BITS(0x034, 1, 0) +#define VPG_ORIENTATIONDSI_HOST_BITS(0x038, 1, 24) +#define VPG_MODE DSI_HOST_BITS(0x038, 1, 20) +#define VPG_EN DSI_HOST_BITS(0x038, 1, 16) +#define LP_CMD_EN DSI_HOST_BITS(0x038, 1, 15) +#define FRAME_BTA_ACK_EN DSI_HOST_BITS(0x038, 1, 14) +#define LP_HFP_EN DSI_HOST_BITS(0x038, 1, 13) +#define LP_HBP_EN DSI_HOST_BITS(0x038, 1, 12) +#define LP_VACT_EN DSI_HOST_BITS(0x038, 1, 11) +#define LP_VFP_EN DSI_HOST_BITS(0x038, 1, 10) +#define LP_VBP_EN DSI_HOST_BITS(0x038, 1, 9) +#define LP_VSA_EN DSI_HOST_BITS(0x038, 1, 8) +#define VID_MODE_TYPE DSI_HOST_BITS(0x038, 2, 0) +#define VID_PKT_SIZE DSI_HOST_BITS(0x03c, 14, 0) +#define NUM_CHUNKS DSI_HOST_BITS(0x040, 13, 0) +#define NULL_PKT_SIZE DSI_HOST_BITS(0x044, 13, 0) +#define VID_HSA_TIME DSI_HOST_BITS(0x048, 12, 0) +#define VID_HBP_TIME DSI_HOST_BITS(0x04c, 12, 0) +#define VID_HLINE_TIME DSI_HOST_BITS(0x050, 15, 0) +#define VID_VSA_LINES DSI_HOST_BITS(0x054, 10, 0) +#define VID_VBP_LINES DSI_HOST_BITS(0x058, 10, 0) +#define VID_VFP_LINES DSI_HOST_BITS(0x05c, 10, 0) +#define VID_ACTIVE_LINES DSI_HOST_BITS(0x060, 14, 0) +#define EDPI_CMD_SIZE DSI_HOST_BITS(0x064, 16, 0) +#define MAX_RD_PKT_SIZEDSI_HOST_BITS(0x068, 1, 24) +#define DCS_LW_TX DSI_HOST_BITS(0x068, 1, 19) +#define DCS_SR_0P_TX DSI_HOST_BITS(0x068, 1, 18) +#define DCS_SW_1P_TX DSI_HOST_BITS(0x068, 1, 17) +#define DCS_SW_0P_TX DSI_HOST_BITS(0x068, 1, 16) +#define GEN_LW_TX DSI_HOST_BITS(0x068, 1, 14) +#define GEN_SR_2P_TX
[U-Boot] [PATCH v3 01/11] rockchip: include: grf: Add GRF register declaration for mipi dsi
Signed-off-by: Eric Gao
---
Changes in v3:
-Split GRF changes as a single patch
Changes in v2: None
arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
index b340b05..63b3b94 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -440,6 +440,29 @@ enum {
GRF_UART_DBG_SEL_MASK = 3 << GRF_UART_DBG_SEL_SHIFT,
GRF_UART_DBG_SEL_C = 2,
+ /* GRF_SOC_CON20 */
+ GRF_DSI0_VOP_SEL_SHIFT = 0,
+ GRF_DSI0_VOP_SEL_MASK = 1 << GRF_DSI0_VOP_SEL_SHIFT,
+ GRF_DSI0_VOP_SEL_B = 0,
+ GRF_DSI0_VOP_SEL_L,
+
+ /* GRF_SOC_CON22 */
+ GRF_DPHY_TX0_RXMODE_SHIFT = 0,
+ GRF_DPHY_TX0_RXMODE_MASK = 0xf << GRF_DPHY_TX0_RXMODE_SHIFT,
+ GRF_DPHY_TX0_RXMODE_EN = 0xb,
+ GRF_DPHY_TX0_RXMODE_DIS = 0,
+
+ GRF_DPHY_TX0_TXSTOPMODE_SHIFT = 4,
+ GRF_DPHY_TX0_TXSTOPMODE_MASK = 0xf0 << GRF_DPHY_TX0_TXSTOPMODE_SHIFT,
+ GRF_DPHY_TX0_TXSTOPMODE_EN = 0xc,
+ GRF_DPHY_TX0_TXSTOPMODE_DIS = 0,
+
+ GRF_DPHY_TX0_TURNREQUEST_SHIFT = 12,
+ GRF_DPHY_TX0_TURNREQUEST_MASK = 0xf000
+ << GRF_DPHY_TX0_TURNREQUEST_SHIFT,
+ GRF_DPHY_TX0_TURNREQUEST_EN = 0x1,
+ GRF_DPHY_TX0_TURNREQUEST_DIS = 0,
+
/* PMUGRF_GPIO0A_IOMUX */
PMUGRF_GPIO0A6_SEL_SHIFT= 12,
PMUGRF_GPIO0A6_SEL_MASK = 3 << PMUGRF_GPIO0A6_SEL_SHIFT,
--
1.9.1
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[U-Boot] [PATCH v3 00/11] Add mipi dsi display support for rockchip soc.
Changes in v3: -Split GRF changes as a single patch -Split mipi dsi driver file and header as a single patch. -Split Makefile changes to a single patch. -Split Kconfig changes to a single patch. -Add more description in the commit message -Add ret value in debug message. -Improve indentation relationship Changes in v2: -Add mipi display mode for vop. -Add compatible items for rk3399 vop. -Change the bitwidth for different display mode. -Extend frame buffer size for mipi display -Add pwm0 pinctrl init for lcd backlight. -Add dts config for mipi display. -Add defconfigs for mipi display, so that it can be enabled by default. Eric Gao (11): rockchip: include: grf: Add GRF register declaration for mipi dsi rockchip: video: Add mipi driver for rockchip soc rockchip: video: Makefile: Add mipi driver addition. rockchip: video: Kconfig: Add mipi driver addition. rockchip: video: vop: Add mipi display mode for rk3399 rockchip: video: vop: Set different bitwidth for different display mode rockchip: video: vop: Reserve enough space for mipi dispaly rockchip: board: evb_rk3399: initialize pwm0 for dispaly backlight rockchip: dts: Add mipi dsi support for rk3399 rockchip: configs: Enable mipi dsi for rk3399 rockchip: video: vop: Fix rk_display_init() return error arch/arm/dts/rk3399-evb.dts| 84 arch/arm/dts/rk3399.dtsi | 72 +++ arch/arm/include/asm/arch-rockchip/grf_rk3399.h| 23 + .../include/asm/arch-rockchip/rockchip_mipi_dsi.h | 195 arch/arm/include/asm/arch-rockchip/vop_rk3288.h| 1 + board/rockchip/evb_rk3399/evb-rk3399.c | 7 + configs/evb-rk3399_defconfig | 6 + drivers/video/rockchip/Kconfig | 11 +- drivers/video/rockchip/Makefile| 5 +- drivers/video/rockchip/rk_mipi.c | 491 + drivers/video/rockchip/rk_vop.c| 38 +- 11 files changed, 919 insertions(+), 14 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 04/11] rockchip: video: Kconfig: Add mipi driver addition.
Signed-off-by: Eric Gao --- Changes in v3: -Split Kconfig changes to a single patch. Changes in v2: None drivers/video/rockchip/Kconfig | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/drivers/video/rockchip/Kconfig b/drivers/video/rockchip/Kconfig index 09c4ea2..1383efa 100644 --- a/drivers/video/rockchip/Kconfig +++ b/drivers/video/rockchip/Kconfig @@ -37,7 +37,14 @@ if VIDEO_ROCKCHIP bool "HDMI port" depends on VIDEO_ROCKCHIP help - This enable High-Definition Multimedia Interface display support. + This enable High-Definition Multimedia Interface(HDMI) display + support. + config DISPLAY_ROCKCHIP_MIPI + bool "MIPI Port" + depends on VIDEO_ROCKCHIP + help + This enables Mobile Industry Processor Interface(MIPI) display + support. The mipi controller and dphy on rk3288& rk3399 support + 16,18, 24 bits per pixel with upto 2k resolution ratio. endif - -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 08/11] rockchip: board: evb_rk3399: initialize pwm0 for dispaly backlight
Signed-off-by: Eric Gao
---
Changes in v3:
-Add ret value in debug message.
Changes in v2:
-Add pwm0 pinctrl init for lcd backlight.
board/rockchip/evb_rk3399/evb-rk3399.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c
b/board/rockchip/evb_rk3399/evb-rk3399.c
index 362fa0b..4753a76 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -28,6 +28,13 @@ int board_init(void)
goto out;
}
+ /* Enable pwm0 for panel backlight */
+ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM0);
+ if (ret) {
+ debug("%s PWM0 pinctrl init fail! (ret=%d)\n", __func__, ret);
+ goto out;
+ }
+
ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2);
if (ret) {
debug("%s PWM2 pinctrl init fail!\n", __func__);
--
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[U-Boot] [PATCH v3 06/11] rockchip: video: vop: Set different bitwidth for different display mode
Because the bitwidth is different for different display mode, so we need
to set them according to demand.
Signed-off-by: Eric Gao
---
Changes in v3: None
Changes in v2:
-Change the bitwidth for different display mode.
drivers/video/rockchip/rk_vop.c | 20
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index 84d6627..a637f7d 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -181,13 +181,11 @@ void rkvop_mode_set(struct rk3288_vop *regs,
*
* @dev: VOP device that we want to connect to the display
* @fbbase:Frame buffer address
- * @l2bpp Log2 of bits-per-pixels for the display
* @ep_node: Device tree node to process - this is the offset of an endpoint
* node within the VOP's 'port' list.
* @return 0 if OK, -ve if something went wrong
*/
-int rk_display_init(struct udevice *dev, ulong fbbase,
- enum video_log2_bpp l2bpp, int ep_node)
+int rk_display_init(struct udevice *dev, ulong fbbase, int ep_node)
{
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
const void *blob = gd->fdt_blob;
@@ -199,6 +197,7 @@ int rk_display_init(struct udevice *dev, ulong fbbase,
int ret, remote, i, offset;
struct display_plat *disp_uc_plat;
struct clk clk;
+ enum video_log2_bpp l2bpp;
vop_id = fdtdec_get_int(blob, ep_node, "reg", -1);
debug("vop_id=%d\n", vop_id);
@@ -253,6 +252,19 @@ int rk_display_init(struct udevice *dev, ulong fbbase,
return ret;
}
+ /* Set bitwidth for vop display according to vop mode */
+ switch (vop_id) {
+ case VOP_MODE_EDP:
+ case VOP_MODE_HDMI:
+ case VOP_MODE_LVDS:
+ l2bpp = VIDEO_BPP16;
+ break;
+ case VOP_MODE_MIPI:
+ l2bpp = VIDEO_BPP32;
+ break;
+ default:
+ l2bpp = VIDEO_BPP16;
+ }
rkvop_mode_set(regs, &timing, vop_id);
rkvop_enable(regs, fbbase, 1 << l2bpp, &timing);
@@ -330,7 +342,7 @@ static int rk_vop_probe(struct udevice *dev)
for (node = fdt_first_subnode(blob, port);
node > 0;
node = fdt_next_subnode(blob, node)) {
- ret = rk_display_init(dev, plat->base, VIDEO_BPP16, node);
+ ret = rk_display_init(dev, plat->base, node);
if (ret)
debug("Device failed: ret=%d\n", ret);
if (!ret)
--
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[U-Boot] [PATCH v3 10/11] rockchip: configs: Enable mipi dsi for rk3399
Enable mipi dsi by default for rk3399-evb board Signed-off-by: Eric Gao --- Changes in v3: None Changes in v2: -Add defconfigs for mipi display, so that it can be enabled by default. configs/evb-rk3399_defconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index cef8506..3405857 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -66,3 +66,9 @@ CONFIG_PMIC_CHILDREN=y CONFIG_SPL_PMIC_CHILDREN=y CONFIG_PMIC_RK808=y CONFIG_REGULATOR_RK808=y +CONFIG_DM_VIDEO=y +CONFIG_DM_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_DISPLAY=y +CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_MIPI=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 09/11] rockchip: dts: Add mipi dsi support for rk3399
Add dts config for mipi display, include vop, mipi controller, panel, backlight
. And Enable rk808 for lcd_3v3 in another patch.
Signed-off-by: Eric Gao
---
Changes in v3: None
Changes in v2:
-Add dts config for mipi display.
arch/arm/dts/rk3399-evb.dts | 84 +
arch/arm/dts/rk3399.dtsi| 72 ++
2 files changed, 156 insertions(+)
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index e1f867b..3d6f3ce 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -59,6 +59,15 @@
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ status = "disabled";
+ };
+
+ panel:panel {
+ compatible = "simple-panel";
+ status = "disabled";
+ };
};
&emmc_phy {
@@ -141,6 +150,7 @@
status = "okay";
vcc12-supply = <&vcc3v3_sys>;
+
regulators {
vcc33_lcd: SWITCH_REG2 {
regulator-always-on;
@@ -151,6 +161,80 @@
};
};
+&backlight {
+ power-supply = <&vccsys>;
+ enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7
+ 8 9 10 11 12 13 14 15
+16 17 18 19 20 21 22 23
+24 25 26 27 28 29 30 31
+32 33 34 35 36 37 38 39
+40 41 42 43 44 45 46 47
+48 49 50 51 52 53 54 55
+56 57 58 59 60 61 62 63
+64 65 66 67 68 69 70 71
+72 73 74 75 76 77 78 79
+80 81 82 83 84 85 86 87
+88 89 90 91 92 93 94 95
+96 97 98 99 100 101 102 103
+ 104 105 106 107 108 109 110 111
+ 112 113 114 115 116 117 118 119
+ 120 121 122 123 124 125 126 127
+ 128 129 130 131 132 133 134 135
+ 136 137 138 139 140 141 142 143
+ 144 145 146 147 148 149 150 151
+ 152 153 154 155 156 157 158 159
+ 160 161 162 163 164 165 166 167
+ 168 169 170 171 172 173 174 175
+ 176 177 178 179 180 181 182 183
+ 184 185 186 187 188 189 190 191
+ 192 193 194 195 196 197 198 199
+ 200 201 202 203 204 205 206 207
+ 208 209 210 211 212 213 214 215
+ 216 217 218 219 220 221 222 223
+ 224 225 226 227 228 229 230 231
+ 232 233 234 235 236 237 238 239
+ 240 241 242 243 244 245 246 247
+ 248 249 250 251 252 253 254 255>;
+ default-brightness-level = <200>;
+ pwms = <&pwm0 0 25000 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ pwm-delay-us = <1>;
+ status = "okay";
+ };
+
+&panel {
+ power-supply = <&vcc33_lcd>;
+ backlight = <&backlight>;
+ /*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
+ status = "okay";
+};
+
+&mipi_dsi {
+ status = "okay";
+ rockchip,panel = <&panel>;
+ display-timings {
+ timing0 {
+ bits-per-pixel = <24>;
+ clock-frequency = <16000>;
+ hfront-porch = <120>;
+ hsync-len = <20>;
+ hback-porch = <21>;
+ hactive = <1200>;
+ vfront-porch = <21>;
+ vsync-len = <3>;
+ vback-porch = <18>;
+ vactive = <1920>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+};
+
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index d94d780..9344a43 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -684,6 +684,78 @@
status = "disabled";
};
+ vopl: vop@ff8f {
+ u-boot,dm-pre-reloc;
+ compatible = "rockchip,
[U-Boot] [PATCH v3 05/11] rockchip: video: vop: Add mipi display mode for rk3399
Add mipi display mode for rk3399 vop, so that we can use mipi panel
for display.
Signed-off-by: Eric Gao
---
Changes in v3: None
Changes in v2:
-Add mipi display mode for vop.
-Add compatible items for rk3399 vop.
arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 +
drivers/video/rockchip/rk_vop.c | 6 ++
2 files changed, 7 insertions(+)
diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
index 0ce3d67..d5599ec 100644
--- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
@@ -90,6 +90,7 @@ enum vop_modes {
VOP_MODE_EDP = 0,
VOP_MODE_HDMI,
VOP_MODE_LVDS,
+ VOP_MODE_MIPI,
VOP_MODE_NONE,
VOP_MODE_AUTO_DETECT,
VOP_MODE_UNKNOWN,
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index bc02f80..84d6627 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -117,6 +117,10 @@ void rkvop_mode_set(struct rk3288_vop *regs,
clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN,
V_RGB_OUT_EN(1));
break;
+ case VOP_MODE_MIPI:
+ clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN,
+ V_MIPI_OUT_EN(1));
+break;
}
if (mode == VOP_MODE_HDMI || mode == VOP_MODE_EDP)
@@ -350,6 +354,8 @@ static const struct video_ops rk_vop_ops = {
};
static const struct udevice_id rk_vop_ids[] = {
+ { .compatible = "rockchip,rk3399-vop-big" },
+ { .compatible = "rockchip,rk3399-vop-lit" },
{ .compatible = "rockchip,rk3288-vop" },
{ }
};
--
1.9.1
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[U-Boot] [PATCH v3 11/11] rockchip: video: vop: Fix rk_display_init() return error
The function clk_set_rate() will return it's input parameter, so it's return
value in normal condition is nonzero. In this case, we should report error
when it return zero rather than return a nonzero value.
Signed-off-by: Eric Gao
-Fix rk_display_init() function report error(err:-19).
---
Changes in v3:
-Improve indentation relationship
Changes in v2: None
drivers/video/rockchip/rk_vop.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index ac9e7db..bd80b1b 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -245,13 +245,13 @@ int rk_display_init(struct udevice *dev, ulong fbbase,
int ep_node)
}
ret = clk_get_by_index(dev, 1, &clk);
- if (!ret)
+ if (!ret) {
ret = clk_set_rate(&clk, timing.pixelclock.typ);
- if (ret) {
- debug("%s: Failed to set pixel clock: ret=%d\n", __func__, ret);
- return ret;
+ if (!ret) {
+ debug("%s: Failed to set pixel clock: ret=%d\n",
__func__, ret);
+ return ret;
+ }
}
-
/* Set bitwidth for vop display according to vop mode */
switch (vop_id) {
case VOP_MODE_EDP:
--
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[U-Boot] [PATCH v3 03/11] rockchip: video: Makefile: Add mipi driver addition.
Signed-off-by: Eric Gao --- Changes in v3: -Split Makefile changes to a single patch. Changes in v2: None drivers/video/rockchip/Makefile | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile index 3bb0519..2937e27 100644 --- a/drivers/video/rockchip/Makefile +++ b/drivers/video/rockchip/Makefile @@ -1,7 +1,7 @@ # -# (C) Copyright 2000-2007 +# (C) Copyright 2017 # Wolfgang Denk, DENX Software Engineering, w...@denx.de. -# +# Eric Gao # SPDX-License-Identifier: GPL-2.0+ # @@ -10,4 +10,5 @@ obj-y += rk_vop.o obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o ../dw_hdmi.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 07/11] rockchip: video: vop: Reserve enough space for mipi dispaly
plat->size here is used to reserve frame buffer space befor relocation.
our mipi panel use 24 bitwidth, and vop require 32bit align. So the frame
buffer size should be at least 1920*1200*32/8.
Signed-off-by: Eric Gao
---
Changes in v3:
-Add more description in the commit message
Changes in v2:
-Extend frame buffer size for mipi display
drivers/video/rockchip/rk_vop.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index a637f7d..ac9e7db 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -357,7 +357,7 @@ static int rk_vop_bind(struct udevice *dev)
{
struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
- plat->size = 1920 * 1080 * 2;
+ plat->size = 1920 * 1200 * 4;
return 0;
}
--
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[U-Boot] [PATCH v4 00/11] Add mipi dsi display support for rockchip soc.
Add mipi dsi display support for rockchip soc. Changes in v4: -Clear irrelevant change -Clear irrelevant change. -Move this patch to an early stage. Changes in v3: -Split GRF changes as a single patch -Split mipi dsi driver file and header as a single patch. -Split Makefile changes to a single patch. -Split Kconfig changes to a single patch. -Improve indentation relationship -Add more description in the commit message -Add ret value in debug message. Changes in v2: -Fix rk_display_init() function report error(err:-19). -Add mipi display mode for vop. -Add compatible items for rk3399 vop. -Change the bitwidth for different display mode. -Extend frame buffer size for mipi display -Add pwm0 pinctrl init for lcd backlight. -Add dts config for mipi display. -Add defconfigs for mipi display, so that it can be enabled by default. Eric Gao (11): rockchip: include: grf: Add GRF register declaration for mipi dsi rockchip: video: Add mipi driver for rockchip soc rockchip: video: Makefile: Add mipi driver addition. rockchip: video: Kconfig: Add mipi driver addition. rockchip: video: vop: Fix rk_display_init() return error rockchip: video: vop: Add mipi display mode for rk3399 rockchip: video: vop: Set different bitwidth for different display mode rockchip: video: vop: Reserve enough space for mipi dispaly rockchip: board: evb_rk3399: initialize pwm0 for dispaly backlight rockchip: dts: Add mipi dsi support for rk3399 rockchip: configs: Enable mipi dsi for rk3399 arch/arm/dts/rk3399-evb.dts| 84 arch/arm/dts/rk3399.dtsi | 72 +++ arch/arm/include/asm/arch-rockchip/grf_rk3399.h| 23 + .../include/asm/arch-rockchip/rockchip_mipi_dsi.h | 195 arch/arm/include/asm/arch-rockchip/vop_rk3288.h| 1 + board/rockchip/evb_rk3399/evb-rk3399.c | 7 + configs/evb-rk3399_defconfig | 6 + drivers/video/rockchip/Kconfig | 8 +- drivers/video/rockchip/Makefile| 1 + drivers/video/rockchip/rk_mipi.c | 491 + drivers/video/rockchip/rk_vop.c| 38 +- 11 files changed, 916 insertions(+), 10 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 01/11] rockchip: include: grf: Add GRF register declaration for mipi dsi
Signed-off-by: Eric Gao
---
Changes in v4: None
Changes in v3:
-Split GRF changes as a single patch
Changes in v2: None
arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
index b340b05..63b3b94 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -440,6 +440,29 @@ enum {
GRF_UART_DBG_SEL_MASK = 3 << GRF_UART_DBG_SEL_SHIFT,
GRF_UART_DBG_SEL_C = 2,
+ /* GRF_SOC_CON20 */
+ GRF_DSI0_VOP_SEL_SHIFT = 0,
+ GRF_DSI0_VOP_SEL_MASK = 1 << GRF_DSI0_VOP_SEL_SHIFT,
+ GRF_DSI0_VOP_SEL_B = 0,
+ GRF_DSI0_VOP_SEL_L,
+
+ /* GRF_SOC_CON22 */
+ GRF_DPHY_TX0_RXMODE_SHIFT = 0,
+ GRF_DPHY_TX0_RXMODE_MASK = 0xf << GRF_DPHY_TX0_RXMODE_SHIFT,
+ GRF_DPHY_TX0_RXMODE_EN = 0xb,
+ GRF_DPHY_TX0_RXMODE_DIS = 0,
+
+ GRF_DPHY_TX0_TXSTOPMODE_SHIFT = 4,
+ GRF_DPHY_TX0_TXSTOPMODE_MASK = 0xf0 << GRF_DPHY_TX0_TXSTOPMODE_SHIFT,
+ GRF_DPHY_TX0_TXSTOPMODE_EN = 0xc,
+ GRF_DPHY_TX0_TXSTOPMODE_DIS = 0,
+
+ GRF_DPHY_TX0_TURNREQUEST_SHIFT = 12,
+ GRF_DPHY_TX0_TURNREQUEST_MASK = 0xf000
+ << GRF_DPHY_TX0_TURNREQUEST_SHIFT,
+ GRF_DPHY_TX0_TURNREQUEST_EN = 0x1,
+ GRF_DPHY_TX0_TURNREQUEST_DIS = 0,
+
/* PMUGRF_GPIO0A_IOMUX */
PMUGRF_GPIO0A6_SEL_SHIFT= 12,
PMUGRF_GPIO0A6_SEL_MASK = 3 << PMUGRF_GPIO0A6_SEL_SHIFT,
--
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[U-Boot] [PATCH v4 02/11] rockchip: video: Add mipi driver for rockchip soc
Signed-off-by: Eric Gao --- Changes in v4: None Changes in v3: -Split mipi dsi driver file and header as a single patch. Changes in v2: None .../include/asm/arch-rockchip/rockchip_mipi_dsi.h | 195 drivers/video/rockchip/rk_mipi.c | 491 + 2 files changed, 686 insertions(+) create mode 100644 arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h create mode 100644 drivers/video/rockchip/rk_mipi.c diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h b/arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h new file mode 100644 index 000..d7f79c5 --- /dev/null +++ b/arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h @@ -0,0 +1,195 @@ +/* + * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd + * author: Eric Gao + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef ROCKCHIP_MIPI_DSI_H +#define ROCKCHIP_MIPI_DSI_H + +/* + * All these mipi controller register declaration provide reg address offset, + * bits width, bit offset for a specified register bits. With these message, we + * can set or clear every bits individually for a 32bit widthregister. We use + * DSI_HOST_BITS macro definition to combinat these message using the following + * format: val(32bit) = addr(16bit) | width(8bit) | offest(8bit) + * For example: + *#define SHUTDOWNZ DSI_HOST_BITS(0x004, 1, 0) + * means SHUTDOWNZ is a signal reg bit with bit offset qual 0,and it's reg addr + * offset is 0x004.The conbinat result = (0x004 << 16) | (1 << 8) | 0 + */ +#define ADDR_SHIFT 16 +#define BITS_SHIFT 8 +#define OFFSET_SHIFT 0 +#define DSI_HOST_BITS(addr, bits, bit_offset) \ +((addr << ADDR_SHIFT) | (bits << BITS_SHIFT) | (bit_offset << OFFSET_SHIFT)) + +/* DWC_DSI_VERSION_0x3133302A */ +#define VERSIONDSI_HOST_BITS(0x000, 32, 0) +#define SHUTDOWNZ DSI_HOST_BITS(0x004, 1, 0) +#define TO_CLK_DIVISIONDSI_HOST_BITS(0x008, 8, 8) +#define TX_ESC_CLK_DIVISIONDSI_HOST_BITS(0x008, 8, 0) +#define DPI_VCID DSI_HOST_BITS(0x00c, 2, 0) +#define EN18_LOOSELY DSI_HOST_BITS(0x010, 1, 8) +#define DPI_COLOR_CODING DSI_HOST_BITS(0x010, 4, 0) +#define COLORM_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 4) +#define SHUTD_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 3) +#define HSYNC_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 2) +#define VSYNC_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 1) +#define DATAEN_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 0) +#define OUTVACT_LPCMD_TIME DSI_HOST_BITS(0x018, 8, 16) +#define INVACT_LPCMD_TIME DSI_HOST_BITS(0x018, 8, 0) +#define CRC_RX_EN DSI_HOST_BITS(0x02c, 1, 4) +#define ECC_RX_EN DSI_HOST_BITS(0x02c, 1, 3) +#define BTA_EN DSI_HOST_BITS(0x02c, 1, 2) +#define EOTP_RX_EN DSI_HOST_BITS(0x02c, 1, 1) +#define EOTP_TX_EN DSI_HOST_BITS(0x02c, 1, 0) +#define GEN_VID_RX DSI_HOST_BITS(0x030, 2, 0) +#define CMD_VIDEO_MODE DSI_HOST_BITS(0x034, 1, 0) +#define VPG_ORIENTATIONDSI_HOST_BITS(0x038, 1, 24) +#define VPG_MODE DSI_HOST_BITS(0x038, 1, 20) +#define VPG_EN DSI_HOST_BITS(0x038, 1, 16) +#define LP_CMD_EN DSI_HOST_BITS(0x038, 1, 15) +#define FRAME_BTA_ACK_EN DSI_HOST_BITS(0x038, 1, 14) +#define LP_HFP_EN DSI_HOST_BITS(0x038, 1, 13) +#define LP_HBP_EN DSI_HOST_BITS(0x038, 1, 12) +#define LP_VACT_EN DSI_HOST_BITS(0x038, 1, 11) +#define LP_VFP_EN DSI_HOST_BITS(0x038, 1, 10) +#define LP_VBP_EN DSI_HOST_BITS(0x038, 1, 9) +#define LP_VSA_EN DSI_HOST_BITS(0x038, 1, 8) +#define VID_MODE_TYPE DSI_HOST_BITS(0x038, 2, 0) +#define VID_PKT_SIZE DSI_HOST_BITS(0x03c, 14, 0) +#define NUM_CHUNKS DSI_HOST_BITS(0x040, 13, 0) +#define NULL_PKT_SIZE DSI_HOST_BITS(0x044, 13, 0) +#define VID_HSA_TIME DSI_HOST_BITS(0x048, 12, 0) +#define VID_HBP_TIME DSI_HOST_BITS(0x04c, 12, 0) +#define VID_HLINE_TIME DSI_HOST_BITS(0x050, 15, 0) +#define VID_VSA_LINES DSI_HOST_BITS(0x054, 10, 0) +#define VID_VBP_LINES DSI_HOST_BITS(0x058, 10, 0) +#define VID_VFP_LINES DSI_HOST_BITS(0x05c, 10, 0) +#define VID_ACTIVE_LINES DSI_HOST_BITS(0x060, 14, 0) +#define EDPI_CMD_SIZE DSI_HOST_BITS(0x064, 16, 0) +#define MAX_RD_PKT_SIZEDSI_HOST_BITS(0x068, 1, 24) +#define DCS_LW_TX DSI_HOST_BITS(0x068, 1, 19) +#define DCS_SR_0P_TX DSI_HOST_BITS(0x068, 1, 18) +#define DCS_SW_1P_TX DSI_HOST_BITS(0x068, 1, 17) +#define DCS_SW_0P_TX DSI_HOST_BITS(0x068, 1, 16) +#define GEN_LW_TX DSI_HOST_BITS(
[U-Boot] [PATCH v4 03/11] rockchip: video: Makefile: Add mipi driver addition.
Signed-off-by: Eric Gao --- Changes in v4: -Clear irrelevant change Changes in v3: -Split Makefile changes to a single patch. Changes in v2: None drivers/video/rockchip/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/video/rockchip/Makefile b/drivers/video/rockchip/Makefile index 3bb0519..c742902 100644 --- a/drivers/video/rockchip/Makefile +++ b/drivers/video/rockchip/Makefile @@ -10,4 +10,5 @@ obj-y += rk_vop.o obj-$(CONFIG_DISPLAY_ROCKCHIP_EDP) += rk_edp.o obj-$(CONFIG_DISPLAY_ROCKCHIP_LVDS) += rk_lvds.o obj-$(CONFIG_DISPLAY_ROCKCHIP_HDMI) += rk_hdmi.o ../dw_hdmi.o +obj-$(CONFIG_DISPLAY_ROCKCHIP_MIPI) += rk_mipi.o endif -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 09/11] rockchip: board: evb_rk3399: initialize pwm0 for dispaly backlight
Signed-off-by: Eric Gao
---
Changes in v4: None
Changes in v3:
-Add ret value in debug message.
Changes in v2:
-Add pwm0 pinctrl init for lcd backlight.
board/rockchip/evb_rk3399/evb-rk3399.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/board/rockchip/evb_rk3399/evb-rk3399.c
b/board/rockchip/evb_rk3399/evb-rk3399.c
index 362fa0b..4753a76 100644
--- a/board/rockchip/evb_rk3399/evb-rk3399.c
+++ b/board/rockchip/evb_rk3399/evb-rk3399.c
@@ -28,6 +28,13 @@ int board_init(void)
goto out;
}
+ /* Enable pwm0 for panel backlight */
+ ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM0);
+ if (ret) {
+ debug("%s PWM0 pinctrl init fail! (ret=%d)\n", __func__, ret);
+ goto out;
+ }
+
ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM2);
if (ret) {
debug("%s PWM2 pinctrl init fail!\n", __func__);
--
1.9.1
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[U-Boot] [PATCH v4 04/11] rockchip: video: Kconfig: Add mipi driver addition.
Signed-off-by: Eric Gao --- Changes in v4: -Clear irrelevant change. Changes in v3: -Split Kconfig changes to a single patch. Changes in v2: None drivers/video/rockchip/Kconfig | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/video/rockchip/Kconfig b/drivers/video/rockchip/Kconfig index 09c4ea2..d7631b8 100644 --- a/drivers/video/rockchip/Kconfig +++ b/drivers/video/rockchip/Kconfig @@ -39,5 +39,11 @@ if VIDEO_ROCKCHIP help This enable High-Definition Multimedia Interface display support. + config DISPLAY_ROCKCHIP_MIPI + bool "MIPI Port" + depends on VIDEO_ROCKCHIP + help + This enables Mobile Industry Processor Interface(MIPI) display + support. The mipi controller and dphy on rk3288& rk3399 support + 16,18, 24 bits per pixel with upto 2k resolution ratio. endif - -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 05/11] rockchip: video: vop: Fix rk_display_init() return error
The function clk_set_rate() will return it's input parameter, so it's return
value in normal condition is nonzero. In this case, we should report error
when it return zero rather than return a nonzero value.
Signed-off-by: Eric Gao
---
Changes in v4:
-Move this patch to an early stage.
Changes in v3:
-Improve indentation relationship
Changes in v2:
-Fix rk_display_init() function report error(err:-19).
drivers/video/rockchip/rk_vop.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index bc02f80..0691fdf 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -242,11 +242,13 @@ int rk_display_init(struct udevice *dev, ulong fbbase,
}
ret = clk_get_by_index(dev, 1, &clk);
- if (!ret)
+ if (!ret) {
ret = clk_set_rate(&clk, timing.pixelclock.typ);
- if (ret) {
- debug("%s: Failed to set pixel clock: ret=%d\n", __func__, ret);
- return ret;
+ if (!ret) {
+ debug("%s: Failed to set pixel clock: ret=%d\n",
+ __func__, ret);
+ return ret;
+ }
}
rkvop_mode_set(regs, &timing, vop_id);
--
1.9.1
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[U-Boot] [PATCH v4 07/11] rockchip: video: vop: Set different bitwidth for different display mode
Because the bitwidth is different for different display mode, so we need
to set them according to demand.
Signed-off-by: Eric Gao
---
Changes in v4: None
Changes in v3: None
Changes in v2:
-Change the bitwidth for different display mode.
drivers/video/rockchip/rk_vop.c | 20
1 file changed, 16 insertions(+), 4 deletions(-)
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index e6c4ea8..5f5db9e 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -181,13 +181,11 @@ void rkvop_mode_set(struct rk3288_vop *regs,
*
* @dev: VOP device that we want to connect to the display
* @fbbase:Frame buffer address
- * @l2bpp Log2 of bits-per-pixels for the display
* @ep_node: Device tree node to process - this is the offset of an endpoint
* node within the VOP's 'port' list.
* @return 0 if OK, -ve if something went wrong
*/
-int rk_display_init(struct udevice *dev, ulong fbbase,
- enum video_log2_bpp l2bpp, int ep_node)
+int rk_display_init(struct udevice *dev, ulong fbbase, int ep_node)
{
struct video_priv *uc_priv = dev_get_uclass_priv(dev);
const void *blob = gd->fdt_blob;
@@ -199,6 +197,7 @@ int rk_display_init(struct udevice *dev, ulong fbbase,
int ret, remote, i, offset;
struct display_plat *disp_uc_plat;
struct clk clk;
+ enum video_log2_bpp l2bpp;
vop_id = fdtdec_get_int(blob, ep_node, "reg", -1);
debug("vop_id=%d\n", vop_id);
@@ -255,6 +254,19 @@ int rk_display_init(struct udevice *dev, ulong fbbase,
}
}
+ /* Set bitwidth for vop display according to vop mode */
+ switch (vop_id) {
+ case VOP_MODE_EDP:
+ case VOP_MODE_HDMI:
+ case VOP_MODE_LVDS:
+ l2bpp = VIDEO_BPP16;
+ break;
+ case VOP_MODE_MIPI:
+ l2bpp = VIDEO_BPP32;
+ break;
+ default:
+ l2bpp = VIDEO_BPP16;
+ }
rkvop_mode_set(regs, &timing, vop_id);
rkvop_enable(regs, fbbase, 1 << l2bpp, &timing);
@@ -332,7 +344,7 @@ static int rk_vop_probe(struct udevice *dev)
for (node = fdt_first_subnode(blob, port);
node > 0;
node = fdt_next_subnode(blob, node)) {
- ret = rk_display_init(dev, plat->base, VIDEO_BPP16, node);
+ ret = rk_display_init(dev, plat->base, node);
if (ret)
debug("Device failed: ret=%d\n", ret);
if (!ret)
--
1.9.1
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[U-Boot] [PATCH v4 11/11] rockchip: configs: Enable mipi dsi for rk3399
Enable mipi dsi by default for rk3399-evb board Signed-off-by: Eric Gao --- Changes in v4: None Changes in v3: None Changes in v2: -Add defconfigs for mipi display, so that it can be enabled by default. configs/evb-rk3399_defconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index cef8506..3405857 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -66,3 +66,9 @@ CONFIG_PMIC_CHILDREN=y CONFIG_SPL_PMIC_CHILDREN=y CONFIG_PMIC_RK808=y CONFIG_REGULATOR_RK808=y +CONFIG_DM_VIDEO=y +CONFIG_DM_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_DISPLAY=y +CONFIG_VIDEO_ROCKCHIP=y +CONFIG_DISPLAY_ROCKCHIP_MIPI=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 06/11] rockchip: video: vop: Add mipi display mode for rk3399
Add mipi display mode for rk3399 vop, so that we can use mipi panel
for display.
Signed-off-by: Eric Gao
---
Changes in v4: None
Changes in v3: None
Changes in v2:
-Add mipi display mode for vop.
-Add compatible items for rk3399 vop.
arch/arm/include/asm/arch-rockchip/vop_rk3288.h | 1 +
drivers/video/rockchip/rk_vop.c | 6 ++
2 files changed, 7 insertions(+)
diff --git a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
index 0ce3d67..d5599ec 100644
--- a/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
+++ b/arch/arm/include/asm/arch-rockchip/vop_rk3288.h
@@ -90,6 +90,7 @@ enum vop_modes {
VOP_MODE_EDP = 0,
VOP_MODE_HDMI,
VOP_MODE_LVDS,
+ VOP_MODE_MIPI,
VOP_MODE_NONE,
VOP_MODE_AUTO_DETECT,
VOP_MODE_UNKNOWN,
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index 0691fdf..e6c4ea8 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -117,6 +117,10 @@ void rkvop_mode_set(struct rk3288_vop *regs,
clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN,
V_RGB_OUT_EN(1));
break;
+ case VOP_MODE_MIPI:
+ clrsetbits_le32(®s->sys_ctrl, M_ALL_OUT_EN,
+ V_MIPI_OUT_EN(1));
+break;
}
if (mode == VOP_MODE_HDMI || mode == VOP_MODE_EDP)
@@ -352,6 +356,8 @@ static const struct video_ops rk_vop_ops = {
};
static const struct udevice_id rk_vop_ids[] = {
+ { .compatible = "rockchip,rk3399-vop-big" },
+ { .compatible = "rockchip,rk3399-vop-lit" },
{ .compatible = "rockchip,rk3288-vop" },
{ }
};
--
1.9.1
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[U-Boot] [PATCH v4 08/11] rockchip: video: vop: Reserve enough space for mipi dispaly
plat->size here is used to reserve frame buffer space befor relocation.
our mipi panel use 24 bitwidth, and vop require 32bit align. So the frame
buffer size should be at least 1920*1200*32/8.
Signed-off-by: Eric Gao
---
Changes in v4: None
Changes in v3:
-Add more description in the commit message
Changes in v2:
-Extend frame buffer size for mipi display
drivers/video/rockchip/rk_vop.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/rockchip/rk_vop.c b/drivers/video/rockchip/rk_vop.c
index 5f5db9e..f1c6030 100644
--- a/drivers/video/rockchip/rk_vop.c
+++ b/drivers/video/rockchip/rk_vop.c
@@ -359,7 +359,7 @@ static int rk_vop_bind(struct udevice *dev)
{
struct video_uc_platdata *plat = dev_get_uclass_platdata(dev);
- plat->size = 1920 * 1080 * 2;
+ plat->size = 1920 * 1200 * 4;
return 0;
}
--
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[U-Boot] [PATCH v4 10/11] rockchip: dts: Add mipi dsi support for rk3399
Add dts config for mipi display, include vop, mipi controller, panel, backlight
. And Enable rk808 for lcd_3v3 in another patch.
Signed-off-by: Eric Gao
---
Changes in v4: None
Changes in v3: None
Changes in v2:
-Add dts config for mipi display.
arch/arm/dts/rk3399-evb.dts | 84 +
arch/arm/dts/rk3399.dtsi| 72 ++
2 files changed, 156 insertions(+)
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts
index e1f867b..3d6f3ce 100644
--- a/arch/arm/dts/rk3399-evb.dts
+++ b/arch/arm/dts/rk3399-evb.dts
@@ -59,6 +59,15 @@
gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
};
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ status = "disabled";
+ };
+
+ panel:panel {
+ compatible = "simple-panel";
+ status = "disabled";
+ };
};
&emmc_phy {
@@ -141,6 +150,7 @@
status = "okay";
vcc12-supply = <&vcc3v3_sys>;
+
regulators {
vcc33_lcd: SWITCH_REG2 {
regulator-always-on;
@@ -151,6 +161,80 @@
};
};
+&backlight {
+ power-supply = <&vccsys>;
+ enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+ brightness-levels = <
+ 0 1 2 3 4 5 6 7
+ 8 9 10 11 12 13 14 15
+16 17 18 19 20 21 22 23
+24 25 26 27 28 29 30 31
+32 33 34 35 36 37 38 39
+40 41 42 43 44 45 46 47
+48 49 50 51 52 53 54 55
+56 57 58 59 60 61 62 63
+64 65 66 67 68 69 70 71
+72 73 74 75 76 77 78 79
+80 81 82 83 84 85 86 87
+88 89 90 91 92 93 94 95
+96 97 98 99 100 101 102 103
+ 104 105 106 107 108 109 110 111
+ 112 113 114 115 116 117 118 119
+ 120 121 122 123 124 125 126 127
+ 128 129 130 131 132 133 134 135
+ 136 137 138 139 140 141 142 143
+ 144 145 146 147 148 149 150 151
+ 152 153 154 155 156 157 158 159
+ 160 161 162 163 164 165 166 167
+ 168 169 170 171 172 173 174 175
+ 176 177 178 179 180 181 182 183
+ 184 185 186 187 188 189 190 191
+ 192 193 194 195 196 197 198 199
+ 200 201 202 203 204 205 206 207
+ 208 209 210 211 212 213 214 215
+ 216 217 218 219 220 221 222 223
+ 224 225 226 227 228 229 230 231
+ 232 233 234 235 236 237 238 239
+ 240 241 242 243 244 245 246 247
+ 248 249 250 251 252 253 254 255>;
+ default-brightness-level = <200>;
+ pwms = <&pwm0 0 25000 0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ pwm-delay-us = <1>;
+ status = "okay";
+ };
+
+&panel {
+ power-supply = <&vcc33_lcd>;
+ backlight = <&backlight>;
+ /*enable-gpios = <&gpio4 18 GPIO_ACTIVE_HIGH>;*/
+ status = "okay";
+};
+
+&mipi_dsi {
+ status = "okay";
+ rockchip,panel = <&panel>;
+ display-timings {
+ timing0 {
+ bits-per-pixel = <24>;
+ clock-frequency = <16000>;
+ hfront-porch = <120>;
+ hsync-len = <20>;
+ hback-porch = <21>;
+ hactive = <1200>;
+ vfront-porch = <21>;
+ vsync-len = <3>;
+ vback-porch = <18>;
+ vactive = <1920>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <1>;
+ pixelclk-active = <0>;
+ };
+ };
+};
+
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
diff --git a/arch/arm/dts/rk3399.dtsi b/arch/arm/dts/rk3399.dtsi
index d94d780..9344a43 100644
--- a/arch/arm/dts/rk3399.dtsi
+++ b/arch/arm/dts/rk3399.dtsi
@@ -684,6 +684,78 @@
status = "disabled";
};
+ vopl: vop@ff8f {
+ u-boot,dm-pre-reloc;
+ compatible = &q
[U-Boot] [PATCH v5 01/10] rockchip: include: grf: Add GRF register declaration for mipi dsi
Signed-off-by: Eric Gao
---
Changes in v5:
-Modify indentation for better readability.
-Make all enum variate have explicit value.
Changes in v4: None
Changes in v3:
-Split GRF changes as a single patch
Changes in v2: None
arch/arm/include/asm/arch-rockchip/grf_rk3399.h | 29 ++---
1 file changed, 26 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
index c424753..c047345 100644
--- a/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
+++ b/arch/arm/include/asm/arch-rockchip/grf_rk3399.h
@@ -444,9 +444,32 @@ enum {
GRF_PWM_1 = 1,
/* GRF_SOC_CON7 */
- GRF_UART_DBG_SEL_SHIFT = 10,
- GRF_UART_DBG_SEL_MASK = 3 << GRF_UART_DBG_SEL_SHIFT,
- GRF_UART_DBG_SEL_C = 2,
+ GRF_UART_DBG_SEL_SHIFT = 10,
+ GRF_UART_DBG_SEL_MASK = 3 << GRF_UART_DBG_SEL_SHIFT,
+ GRF_UART_DBG_SEL_C = 2,
+
+ /* GRF_SOC_CON20 */
+ GRF_DSI0_VOP_SEL_SHIFT = 0,
+ GRF_DSI0_VOP_SEL_MASK = 1 << GRF_DSI0_VOP_SEL_SHIFT,
+ GRF_DSI0_VOP_SEL_B = 0,
+ GRF_DSI0_VOP_SEL_L = 1,
+
+ /* GRF_SOC_CON22 */
+ GRF_DPHY_TX0_RXMODE_SHIFT = 0,
+ GRF_DPHY_TX0_RXMODE_MASK = 0xf << GRF_DPHY_TX0_RXMODE_SHIFT,
+ GRF_DPHY_TX0_RXMODE_EN= 0xb,
+ GRF_DPHY_TX0_RXMODE_DIS = 0,
+
+ GRF_DPHY_TX0_TXSTOPMODE_SHIFT = 4,
+ GRF_DPHY_TX0_TXSTOPMODE_MASK = 0xf0 << GRF_DPHY_TX0_TXSTOPMODE_SHIFT,
+ GRF_DPHY_TX0_TXSTOPMODE_EN= 0xc,
+ GRF_DPHY_TX0_TXSTOPMODE_DIS = 0,
+
+ GRF_DPHY_TX0_TURNREQUEST_SHIFT = 12,
+ GRF_DPHY_TX0_TURNREQUEST_MASK =
+ 0xf000 << GRF_DPHY_TX0_TURNREQUEST_SHIFT,
+ GRF_DPHY_TX0_TURNREQUEST_EN= 0x1,
+ GRF_DPHY_TX0_TURNREQUEST_DIS = 0,
/* PMUGRF_GPIO0A_IOMUX */
PMUGRF_GPIO0A6_SEL_SHIFT= 12,
--
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[U-Boot] [PATCH v5 00/10] Add mipi dsi display support for rockchip soc.
Changes in v5: -Modify indentation for better readability. -Make all enum variate have explicit value. -Merge Kconfig and Makefile changes into this patch. -Drop previous change, and modify clk_set_rate implement in rk3399. -Regenerate defconfig file using "make savedefconfig" Changes in v4: -Move this patch to an early stage. Changes in v3: -Split GRF changes as a single patch -Split mipi dsi driver file and header as a single patch. -Improve indentation relationship -Add more description in the commit message -Add ret value in debug message. Changes in v2: -Fix rk_display_init() function report error(err:-19). -Add mipi display mode for vop. -Add compatible items for rk3399 vop. -Change the bitwidth for different display mode. -Extend frame buffer size for mipi display -Add pwm0 pinctrl init for lcd backlight. -Add dts config for mipi display. -Add defconfigs for mipi display, so that it can be enabled by default. Eric Gao (10): rockchip: include: grf: Add GRF register declaration for mipi dsi rockchip: video: Add mipi driver support for rockchip soc rockchip: video: vop: Fix rk_display_init() return error rockchip: video: vop: Add mipi display mode for rk3399 rockchip: video: vop: Set different bitwidth for different display mode rockchip: video: vop: Reserve enough space for mipi dispaly rockchip: board: evb_rk3399: initialize pwm0 for dispaly backlight rockchip: dts: Add mipi dsi support for rk3399 rockchip: configs: rk3399_conmmon: Add vidconsole environment variable rockchip: defconfigs: Enable mipi dsi for rk3399 arch/arm/dts/rk3399-evb.dts| 84 arch/arm/dts/rk3399.dtsi | 72 +++ arch/arm/include/asm/arch-rockchip/grf_rk3399.h| 29 +- .../include/asm/arch-rockchip/rockchip_mipi_dsi.h | 195 arch/arm/include/asm/arch-rockchip/vop_rk3288.h| 1 + board/rockchip/evb_rk3399/evb-rk3399.c | 7 + configs/evb-rk3399_defconfig | 14 +- drivers/clk/rockchip/clk_rk3399.c | 2 +- drivers/video/rockchip/Kconfig | 49 ++ drivers/video/rockchip/Makefile| 8 +- drivers/video/rockchip/rk_mipi.c | 491 + drivers/video/rockchip/rk_vop.c| 28 +- include/configs/rk3399_common.h| 5 +- 13 files changed, 968 insertions(+), 17 deletions(-) create mode 100644 arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h create mode 100644 drivers/video/rockchip/Kconfig create mode 100644 drivers/video/rockchip/rk_mipi.c -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v5 02/10] rockchip: video: Add mipi driver support for rockchip soc
Signed-off-by: Eric Gao --- Changes in v5: -Merge Kconfig and Makefile changes into this patch. Changes in v4: None Changes in v3: -Split mipi dsi driver file and header as a single patch. Changes in v2: None .../include/asm/arch-rockchip/rockchip_mipi_dsi.h | 195 drivers/video/rockchip/Kconfig | 49 ++ drivers/video/rockchip/Makefile| 8 +- drivers/video/rockchip/rk_mipi.c | 491 + 4 files changed, 742 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h create mode 100644 drivers/video/rockchip/Kconfig create mode 100644 drivers/video/rockchip/rk_mipi.c diff --git a/arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h b/arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h new file mode 100644 index 000..d7f79c5 --- /dev/null +++ b/arch/arm/include/asm/arch-rockchip/rockchip_mipi_dsi.h @@ -0,0 +1,195 @@ +/* + * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd + * author: Eric Gao + * + * SPDX-License-Identifier:GPL-2.0+ + */ + +#ifndef ROCKCHIP_MIPI_DSI_H +#define ROCKCHIP_MIPI_DSI_H + +/* + * All these mipi controller register declaration provide reg address offset, + * bits width, bit offset for a specified register bits. With these message, we + * can set or clear every bits individually for a 32bit widthregister. We use + * DSI_HOST_BITS macro definition to combinat these message using the following + * format: val(32bit) = addr(16bit) | width(8bit) | offest(8bit) + * For example: + *#define SHUTDOWNZ DSI_HOST_BITS(0x004, 1, 0) + * means SHUTDOWNZ is a signal reg bit with bit offset qual 0,and it's reg addr + * offset is 0x004.The conbinat result = (0x004 << 16) | (1 << 8) | 0 + */ +#define ADDR_SHIFT 16 +#define BITS_SHIFT 8 +#define OFFSET_SHIFT 0 +#define DSI_HOST_BITS(addr, bits, bit_offset) \ +((addr << ADDR_SHIFT) | (bits << BITS_SHIFT) | (bit_offset << OFFSET_SHIFT)) + +/* DWC_DSI_VERSION_0x3133302A */ +#define VERSIONDSI_HOST_BITS(0x000, 32, 0) +#define SHUTDOWNZ DSI_HOST_BITS(0x004, 1, 0) +#define TO_CLK_DIVISIONDSI_HOST_BITS(0x008, 8, 8) +#define TX_ESC_CLK_DIVISIONDSI_HOST_BITS(0x008, 8, 0) +#define DPI_VCID DSI_HOST_BITS(0x00c, 2, 0) +#define EN18_LOOSELY DSI_HOST_BITS(0x010, 1, 8) +#define DPI_COLOR_CODING DSI_HOST_BITS(0x010, 4, 0) +#define COLORM_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 4) +#define SHUTD_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 3) +#define HSYNC_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 2) +#define VSYNC_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 1) +#define DATAEN_ACTIVE_LOW DSI_HOST_BITS(0x014, 1, 0) +#define OUTVACT_LPCMD_TIME DSI_HOST_BITS(0x018, 8, 16) +#define INVACT_LPCMD_TIME DSI_HOST_BITS(0x018, 8, 0) +#define CRC_RX_EN DSI_HOST_BITS(0x02c, 1, 4) +#define ECC_RX_EN DSI_HOST_BITS(0x02c, 1, 3) +#define BTA_EN DSI_HOST_BITS(0x02c, 1, 2) +#define EOTP_RX_EN DSI_HOST_BITS(0x02c, 1, 1) +#define EOTP_TX_EN DSI_HOST_BITS(0x02c, 1, 0) +#define GEN_VID_RX DSI_HOST_BITS(0x030, 2, 0) +#define CMD_VIDEO_MODE DSI_HOST_BITS(0x034, 1, 0) +#define VPG_ORIENTATIONDSI_HOST_BITS(0x038, 1, 24) +#define VPG_MODE DSI_HOST_BITS(0x038, 1, 20) +#define VPG_EN DSI_HOST_BITS(0x038, 1, 16) +#define LP_CMD_EN DSI_HOST_BITS(0x038, 1, 15) +#define FRAME_BTA_ACK_EN DSI_HOST_BITS(0x038, 1, 14) +#define LP_HFP_EN DSI_HOST_BITS(0x038, 1, 13) +#define LP_HBP_EN DSI_HOST_BITS(0x038, 1, 12) +#define LP_VACT_EN DSI_HOST_BITS(0x038, 1, 11) +#define LP_VFP_EN DSI_HOST_BITS(0x038, 1, 10) +#define LP_VBP_EN DSI_HOST_BITS(0x038, 1, 9) +#define LP_VSA_EN DSI_HOST_BITS(0x038, 1, 8) +#define VID_MODE_TYPE DSI_HOST_BITS(0x038, 2, 0) +#define VID_PKT_SIZE DSI_HOST_BITS(0x03c, 14, 0) +#define NUM_CHUNKS DSI_HOST_BITS(0x040, 13, 0) +#define NULL_PKT_SIZE DSI_HOST_BITS(0x044, 13, 0) +#define VID_HSA_TIME DSI_HOST_BITS(0x048, 12, 0) +#define VID_HBP_TIME DSI_HOST_BITS(0x04c, 12, 0) +#define VID_HLINE_TIME DSI_HOST_BITS(0x050, 15, 0) +#define VID_VSA_LINES DSI_HOST_BITS(0x054, 10, 0) +#define VID_VBP_LINES DSI_HOST_BITS(0x058, 10, 0) +#define VID_VFP_LINES DSI_HOST_BITS(0x05c, 10, 0) +#define VID_ACTIVE_LINES DSI_HOST_BITS(0x060, 14, 0) +#define EDPI_CMD_SIZE DSI_HOST_BITS(0x064, 16, 0) +#define MAX_RD_PKT_SIZEDSI_HOST_BITS(0x068, 1, 24) +#define DCS_LW_TX DSI_HOST_BITS(
[U-Boot] [PATCH v5 03/10] rockchip: video: vop: Fix rk_display_init() return error
It's caused by the difference of clk_set_rate function implement between rk3288 andd rk3399. clk_set_rate() of rk3288 return 0 in normal condition. clk_set_rate() of rk3399 return input parameter in normal condition. So modify clk_set_rate's return value of rk3399 in keeping with rk3288. Signed-off-by: Eric Gao --- Changes in v5: -Drop previous change, and modify clk_set_rate implement in rk3399. Changes in v4: -Move this patch to an early stage. Changes in v3: -Improve indentation relationship Changes in v2: -Fix rk_display_init() function report error(err:-19). drivers/clk/rockchip/clk_rk3399.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index ff3cc37..03ea435 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -646,7 +646,7 @@ static ulong rk3399_vop_set_clk(struct rk3399_cru *cru, ulong clk_id, u32 hz) DCLK_VOP_PLL_SEL_VPLL << DCLK_VOP_PLL_SEL_SHIFT | (1 - 1) << DCLK_VOP_DIV_CON_SHIFT); - return hz; + return 0; } static ulong rk3399_mmc_get_clk(struct rk3399_cru *cru, uint clk_id) -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
