It's caused by the difference of clk_set_rate function implement between
rk3288 andd rk3399.
clk_set_rate() of rk3288 return 0 in normal condition.
clk_set_rate() of rk3399 return input parameter in normal condition.
So modify clk_set_rate's return value of rk3399 in keeping with rk3288.
Signed-off-by: Eric Gao <eric....@rock-chips.com>
---
Changes in v5:
-Drop previous change, and modify clk_set_rate implement in rk3399.
Changes in v4:
-Move this patch to an early stage.
Changes in v3:
-Improve indentation relationship
Changes in v2:
-Fix rk_display_init() function report error(err:-19).
drivers/clk/rockchip/clk_rk3399.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk_rk3399.c
b/drivers/clk/rockchip/clk_rk3399.c
index ff3cc37..03ea435 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -646,7 +646,7 @@ static ulong rk3399_vop_set_clk(struct rk3399_cru *cru,
ulong clk_id, u32 hz)
DCLK_VOP_PLL_SEL_VPLL << DCLK_VOP_PLL_SEL_SHIFT |
(1 - 1) << DCLK_VOP_DIV_CON_SHIFT);
- return hz;
+ return 0;
}
static ulong rk3399_mmc_get_clk(struct rk3399_cru *cru, uint clk_id)
--
1.9.1
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