[PATCH 0/2] arm64: ti: k3-j7: Add the ESM nodes
Hi Tom, https://lore.kernel.org/linux-arm-kernel/5187c590-ee9a-4c46-b326-655f4c371...@linaro.org/T/#me178708007a6b3b9695ae0ff84475fa4f49f283c I have posted the ESM patches to the linux kernel device tree mailing list. These are neeeded in R5 SPL to enable watchdog support. Keerthy (2): arm64: dts: ti: k3-j721s2: Add ESM instances arm64: dts: ti: k3-j7200: Add MCU domain ESM instance arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 7 +++ arch/arm/dts/k3-j721s2-main.dtsi | 7 +++ arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi | 14 ++ 3 files changed, 28 insertions(+) -- 2.17.1
[PATCH 1/2] arm64: dts: ti: k3-j721s2: Add ESM instances
Patch adds the ESM instances for j721s2. It has 3 instances.
One in the main domain and two in the mcu-wakeup domian.
Signed-off-by: Keerthy
---
arch/arm/dts/k3-j721s2-main.dtsi | 7 +++
arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi | 14 ++
2 files changed, 21 insertions(+)
diff --git a/arch/arm/dts/k3-j721s2-main.dtsi b/arch/arm/dts/k3-j721s2-main.dtsi
index 976ba1e95a..859b5124ae 100644
--- a/arch/arm/dts/k3-j721s2-main.dtsi
+++ b/arch/arm/dts/k3-j721s2-main.dtsi
@@ -934,4 +934,11 @@
interrupt-names = "int0", "int1";
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
};
+
+ main_esm: esm@70 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x70 0x00 0x1000>;
+ ti,esm-pins = <688>, <689>;
+ bootph-pre-ram;
+ };
};
diff --git a/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
b/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
index 7521963719..f28cf7df50 100644
--- a/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
@@ -299,4 +299,18 @@
ti,cpts-periodic-outputs = <2>;
};
};
+
+ mcu_esm: esm@4080 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x4080 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
+
+ wkup_esm: esm@4208 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x4208 0x00 0x1000>;
+ ti,esm-pins = <63>;
+ bootph-pre-ram;
+ };
};
--
2.17.1
[PATCH 2/2] arm64: dts: ti: k3-j7200: Add MCU domain ESM instance
Patch adds the ESM instance for MCU domian of j7200.
Signed-off-by: Keerthy
---
arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
index 1044ec6c4b..2b185fa350 100644
--- a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
@@ -375,4 +375,11 @@
ti,loczrama = <1>;
};
};
+
+ mcu_esm: esm@4080 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x4080 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
};
--
2.17.1
[PATCH RFC 00/10] arm: dts: j7200/j721s2: Enable the ESM and PMIC ESM
This patch series is RFC. This is enabling ESM/PMIC_ESM modules needed for watchdog functionality. Keerthy (10): arm64: dts: ti: k3-j721s2: Add ESM instances arm64: dts: ti: k3-j7200: Add MCU domain ESM instance arm: dts: k3-j721s2-r5-common-proc-board: Add ESM PMIC and dependent nodes arm64: dts: ti: k3-j721e: Add MCU domain ESM instance board: ti: j721e: Initialize MCU ESM board: ti: j721s2: Initialize the ESM & PMIC ESM configs: j721s2_evm_r5_defconfig: Enable ESM & PMIC ESM configs arm: dts: k3-j7200-r5-common-proc-board: Add PMIC ESM node configs: j7200_evm_r5_defconfig: Enable the ESM configs board: ti: j721e: Enable ESM initialization for J7200 arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 7 .../arm/dts/k3-j7200-r5-common-proc-board.dts | 14 +++ arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 7 arch/arm/dts/k3-j721s2-main.dtsi | 7 arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi| 14 +++ .../dts/k3-j721s2-r5-common-proc-board.dts| 39 +++ board/ti/j721e/evm.c | 11 +- board/ti/j721s2/evm.c | 27 + configs/j7200_evm_r5_defconfig| 2 + configs/j721s2_evm_r5_defconfig | 7 10 files changed, 133 insertions(+), 2 deletions(-) -- 2.17.1
[PATCH RFC 01/10] arm64: dts: ti: k3-j721s2: Add ESM instances
Patch adds the ESM instances for j721s2. It has 3 instances.
One in the main domain and two in the mcu-wakeup domian.
Signed-off-by: Keerthy
---
arch/arm/dts/k3-j721s2-main.dtsi | 7 +++
arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi | 14 ++
2 files changed, 21 insertions(+)
diff --git a/arch/arm/dts/k3-j721s2-main.dtsi b/arch/arm/dts/k3-j721s2-main.dtsi
index 976ba1e95a..859b5124ae 100644
--- a/arch/arm/dts/k3-j721s2-main.dtsi
+++ b/arch/arm/dts/k3-j721s2-main.dtsi
@@ -934,4 +934,11 @@
interrupt-names = "int0", "int1";
bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
};
+
+ main_esm: esm@70 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x70 0x00 0x1000>;
+ ti,esm-pins = <688>, <689>;
+ bootph-pre-ram;
+ };
};
diff --git a/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
b/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
index 7521963719..f28cf7df50 100644
--- a/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j721s2-mcu-wakeup.dtsi
@@ -299,4 +299,18 @@
ti,cpts-periodic-outputs = <2>;
};
};
+
+ mcu_esm: esm@4080 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x4080 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
+
+ wkup_esm: esm@4208 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x4208 0x00 0x1000>;
+ ti,esm-pins = <63>;
+ bootph-pre-ram;
+ };
};
--
2.17.1
[PATCH RFC 02/10] arm64: dts: ti: k3-j7200: Add MCU domain ESM instance
Patch adds the ESM instance for MCU domian of j7200.
Signed-off-by: Keerthy
---
arch/arm/dts/k3-j7200-mcu-wakeup.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
index 1044ec6c4b..2b185fa350 100644
--- a/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j7200-mcu-wakeup.dtsi
@@ -375,4 +375,11 @@
ti,loczrama = <1>;
};
};
+
+ mcu_esm: esm@4080 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x4080 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
};
--
2.17.1
[PATCH RFC 03/10] arm: dts: k3-j721s2-r5-common-proc-board: Add ESM PMIC and dependent nodes
PMIC ESM is part of tps6594x PMIC and connected to WKUP_I2C instance.
Signed-off-by: Keerthy
---
.../dts/k3-j721s2-r5-common-proc-board.dts| 39 +++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
index c74e8e58ae..629706aaf1 100644
--- a/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721s2-r5-common-proc-board.dts
@@ -142,6 +142,14 @@
J721S2_WKUP_IOPAD(0x0b4, PIN_OUTPUT, 0) /* (D27)
WKUP_UART0_TXD */
>;
};
+
+ wkup_i2c0_pins_default: wkup-i2c0-pins-default {
+ bootph-pre-ram;
+ pinctrl-single,pins = <
+ J721S2_WKUP_IOPAD(0x100, PIN_INPUT, 0) /* (H24)
WKUP_I2C0_SCL */
+ J721S2_WKUP_IOPAD(0x104, PIN_INPUT, 0) /* (H27)
WKUP_I2C0_SDA */
+ >;
+ };
};
&sms {
@@ -197,4 +205,35 @@
ti,sci = <&dm_tifs>;
};
+&wkup_i2c0 {
+ bootph-pre-ram;
+ pinctrl-names = "default";
+ pinctrl-0 = <&wkup_i2c0_pins_default>;
+ clock-frequency = <40>;
+
+ tps659413: tps659413@48 {
+ compatible = "ti,tps659413";
+ reg = <0x48>;
+ bootph-pre-ram;
+
+ regulators: regulators {
+ bootph-pre-ram;
+ buck1234_reg: buck1234 {
+ /*VDD_CPU_AVS*/
+ regulator-name = "buck1234";
+ regulator-min-microvolt = <60>;
+ regulator-max-microvolt = <90>;
+ regulator-always-on;
+ regulator-boot-on;
+ bootph-pre-ram;
+ };
+ };
+
+ esm: esm {
+ compatible = "ti,tps659413-esm";
+ bootph-pre-ram;
+ };
+ };
+};
+
#include "k3-j721s2-common-proc-board-u-boot.dtsi"
--
2.17.1
[PATCH RFC 04/10] arm64: dts: ti: k3-j721e: Add MCU domain ESM instance
Patch adds the ESM instance for MCU domian of j721e.
Signed-off-by: Keerthy
---
arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
index 22166c7942..66fdd6443f 100644
--- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
@@ -408,4 +408,11 @@
ti,loczrama = <1>;
};
};
+
+ mcu_esm: esm@4080 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x4080 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
};
--
2.17.1
[PATCH RFC 05/10] board: ti: j721e: Initialize MCU ESM
Initialize MCU ESM. This is needed to propagate MAIN domain
events to the PMIC.
Signed-off-by: Keerthy
---
board/ti/j721e/evm.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index 38fe447d8f..42fa94b7a5 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -548,7 +548,12 @@ void spl_board_init(void)
DM_DRIVER_GET(k3_esm), &dev);
if (ret)
printf("ESM init failed: %d\n", ret);
+
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@4080",
&dev);
+ if (ret)
+ printf("MISC init for esm@4080 failed: %d\n", ret);
}
+
#endif
#ifdef CONFIG_ESM_PMIC
--
2.17.1
[PATCH RFC 06/10] board: ti: j721s2: Initialize the ESM & PMIC ESM
Initialize the ESM & PMIC ESM
Signed-off-by: Keerthy
---
board/ti/j721s2/evm.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/board/ti/j721s2/evm.c b/board/ti/j721s2/evm.c
index 7795300abc..effa52ff5a 100644
--- a/board/ti/j721s2/evm.c
+++ b/board/ti/j721s2/evm.c
@@ -319,4 +319,31 @@ int board_late_init(void)
void spl_board_init(void)
{
+ struct udevice *dev;
+ int ret;
+
+ if (IS_ENABLED(CONFIG_ESM_K3)) {
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@70",
+ &dev);
+ if (ret)
+ printf("MISC init for esm@70 failed: %d\n", ret);
+
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@4080",
+ &dev);
+ if (ret)
+ printf("MISC init for esm@4080 failed: %d\n", ret);
+
+ ret = uclass_get_device_by_name(UCLASS_MISC, "esm@4208",
+ &dev);
+ if (ret)
+ printf("MISC init for esm@4208 failed: %d\n", ret);
+ }
+
+ if (IS_ENABLED(CONFIG_ESM_PMIC)) {
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_DRIVER_GET(pmic_esm),
+ &dev);
+ if (ret)
+ printf("ESM PMIC init failed: %d\n", ret);
+ }
}
--
2.17.1
[PATCH RFC 07/10] configs: j721s2_evm_r5_defconfig: Enable ESM & PMIC ESM configs
Enable ESM & PMIC ESM configs Signed-off-by: Keerthy --- configs/j721s2_evm_r5_defconfig | 7 +++ 1 file changed, 7 insertions(+) diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 1e66ac23d0..b9ac56f34d 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -112,6 +112,8 @@ CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y CONFIG_FS_LOADER=y CONFIG_SPL_FS_LOADER=y +CONFIG_ESM_K3=y +CONFIG_ESM_PMIC=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPL_MMC_HS400_SUPPORT=y CONFIG_MMC_SDHCI=y @@ -142,6 +144,11 @@ CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_POWER_DOMAIN=y CONFIG_K3_SYSTEM_CONTROLLER=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_TPS65941=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_TPS65941=y CONFIG_REMOTEPROC_TI_K3_ARM64=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y -- 2.17.1
[PATCH RFC 08/10] arm: dts: k3-j7200-r5-common-proc-board: Add PMIC ESM node
Enable the TPS659413 has the ESM PMIC.
Signed-off-by: Keerthy
---
arch/arm/dts/k3-j7200-r5-common-proc-board.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
index e62f9218e8..4e5e4a08f8 100644
--- a/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j7200-r5-common-proc-board.dts
@@ -271,6 +271,20 @@
};
};
+ tps659413: tps659413@48 {
+ compatible = "ti,tps659413";
+ reg = <0x48>;
+ bootph-pre-ram;
+
+ regulators_a: regulators {
+ bootph-pre-ram;
+ };
+
+ esm: esm {
+ compatible = "ti,tps659413-esm";
+ bootph-pre-ram;
+ };
+ };
};
&wkup_vtm0 {
--
2.17.1
[PATCH RFC 09/10] configs: j7200_evm_r5_defconfig: Enable the ESM configs
Enable the ESM configs. Signed-off-by: Keerthy --- configs/j7200_evm_r5_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index c4dd33627b..7adc230fc1 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -101,6 +101,8 @@ CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y CONFIG_FS_LOADER=y CONFIG_SPL_FS_LOADER=y +CONFIG_ESM_K3=y +CONFIG_ESM_PMIC=y CONFIG_K3_AVS0=y CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_SPL_MMC_HS400_SUPPORT=y -- 2.17.1
[PATCH RFC 10/10] board: ti: j721e: Enable ESM initialization for J7200
Enable ESM initialization for J7200
Signed-off-by: Keerthy
---
board/ti/j721e/evm.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c
index 42fa94b7a5..070b28326f 100644
--- a/board/ti/j721e/evm.c
+++ b/board/ti/j721e/evm.c
@@ -543,7 +543,8 @@ void spl_board_init(void)
}
#ifdef CONFIG_ESM_K3
- if (board_ti_k3_is("J721EX-PM2-SOM")) {
+ if ((board_ti_k3_is("J721EX-PM2-SOM")) ||
+ IS_ENABLED(CONFIG_TARGET_J7200_R5_EVM)) {
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(k3_esm), &dev);
if (ret)
@@ -557,7 +558,8 @@ void spl_board_init(void)
#endif
#ifdef CONFIG_ESM_PMIC
- if (board_ti_k3_is("J721EX-PM2-SOM")) {
+ if ((board_ti_k3_is("J721EX-PM2-SOM")) ||
+ IS_ENABLED(CONFIG_TARGET_J7200_R5_EVM)) {
ret = uclass_get_device_by_driver(UCLASS_MISC,
DM_DRIVER_GET(pmic_esm),
&dev);
--
2.17.1
[PATCH] power: regulator: tps6287x: Add driver for TPS6287x step down convertors
Add driver for TPS6287x step down convertors
Data sheet: https://www.ti.com/lit/ds/slvsgc5a/slvsgc5a.pdf
Signed-off-by: Keerthy
---
drivers/power/regulator/Kconfig | 18 ++
drivers/power/regulator/Makefile | 1 +
drivers/power/regulator/tps6287x_regulator.c | 172 +++
3 files changed, 191 insertions(+)
create mode 100644 drivers/power/regulator/tps6287x_regulator.c
diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index 102ec7bc5f..db4b40c35e 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -375,6 +375,15 @@ config DM_REGULATOR_TPS80031
features for TPS80031/TPS80032 PMICs. The driver implements
get/set api for: value and enable.
+config DM_REGULATOR_TPS6287X
+ bool "Enable driver for TPS6287x Power Regulator"
+ depends on DM_REGULATOR
+ help
+ The TPS6287X is a step down converter with a fast transient
+ response. This driver supports all four variants of the chip
+ (TPS62870, TPS62871, TPS62872, TPS62873). It implements the
+ get/set api for value only, as the power line is always on.
+
config DM_REGULATOR_STPMIC1
bool "Enable driver for STPMIC1 regulators"
depends on DM_REGULATOR && PMIC_STPMIC1
@@ -394,6 +403,15 @@ config DM_REGULATOR_ANATOP
regulators. It is recommended that this option be enabled on
i.MX6 platform.
+config SPL_DM_REGULATOR_TPS6287X
+ bool "Enable driver for TPS6287x Power Regulator"
+ depends on SPL_DM_REGULATOR
+ help
+ The TPS6287X is a step down converter with a fast transient
+ response. This driver supports all four variants of the chip
+ (TPS62870, TPS62871, TPS62872, TPS62873). It implements the
+ get/set api for value only, as the power line is always on.
+
config SPL_DM_REGULATOR_STPMIC1
bool "Enable driver for STPMIC1 regulators in SPL"
depends on SPL_DM_REGULATOR && PMIC_STPMIC1
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
index f79932d833..6335e5566d 100644
--- a/drivers/power/regulator/Makefile
+++ b/drivers/power/regulator/Makefile
@@ -34,6 +34,7 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_STM32_VREFBUF) +=
stm32-vrefbuf.o
obj-$(CONFIG_DM_REGULATOR_TPS65910) += tps65910_regulator.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_TPS65911) += tps65911_regulator.o
obj-$(CONFIG_DM_REGULATOR_TPS62360) += tps62360_regulator.o
+obj-$(CONFIG_$(SPL_)DM_REGULATOR_TPS6287X) += tps6287x_regulator.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_TPS80031) += tps80031_regulator.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMIC1) += stpmic1.o
obj-$(CONFIG_DM_REGULATOR_TPS65941) += tps65941_regulator.o
diff --git a/drivers/power/regulator/tps6287x_regulator.c
b/drivers/power/regulator/tps6287x_regulator.c
new file mode 100644
index 00..6d18571919
--- /dev/null
+++ b/drivers/power/regulator/tps6287x_regulator.c
@@ -0,0 +1,172 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2024 Texas Instruments Incorporated - http://www.ti.com/
+ * Keerthy
+ */
+
+#include
+#include
+#include
+#include
+
+#define TPS6287X_REG_VSET 0x0
+#define TPS6287X_REG_CONTROL1 0x1
+#define TPS6287X_REG_CONTROL2 0x2
+#define TPS6287X_REG_CONTROL3 0x3
+#define TPS6287X_REG_STATUS0x4
+#define TPS6287X_REG_VSET_VSET_MASK0xff
+#define TPS6287X_REG_CONTROL2_VRANGE_MASK 0xc
+
+struct tps6287x_regulator_config {
+ u32 vmin;
+ u32 vmax;
+};
+
+struct tps6287x_regulator_pdata {
+ u8 vsel_offset;
+ struct udevice *i2c;
+ struct tps6287x_regulator_config *config;
+};
+
+static struct tps6287x_regulator_config tps6287x_data = {
+ .vmin = 40,
+ .vmax = 335,
+};
+
+static int tps6287x_regulator_set_value(struct udevice *dev, int uV)
+{
+ struct tps6287x_regulator_pdata *pdata = dev_get_plat(dev);
+ u8 regval, vset;
+ int ret;
+
+ if (uV < pdata->config->vmin || uV > pdata->config->vmax)
+ return -EINVAL;
+ /*
+* Based on the value of VRANGE bit field of CONTROL2 reg the range
+* varies.
+*/
+ ret = dm_i2c_read(pdata->i2c, TPS6287X_REG_CONTROL2, ®val, 1);
+ if (ret) {
+ dev_err(dev, "CTRL2 reg read failed: %d\n", ret);
+ return ret;
+ }
+
+ regval &= TPS6287X_REG_CONTROL2_VRANGE_MASK;
+ regval >>= ffs(TPS6287X_REG_CONTROL2_VRANGE_MASK) - 1;
+
+ /*
+* VRANGE = 0. Increment step 1250 uV starting with 0 --> 40 uV
+* VRANGE = 1. Increment step 2500 uV starting with 0 --> 40 uV
+* VRANGE = 2. Increment step 5000 uV starting with 0 --> 40 uV
+* VRANGE = 3. Increment step 1 uV starting with 0 -->
Re: [PATCH] misc: k3_avs: Fix possible NULL pointer deference
On 14/02/20 5:52 pm, Vignesh Raghavendra wrote:
Its possible that k3_avs_priv is NULL because the driver may not have
been probed yet. Therefore check if pointer is valid before
dereferencing it.
Reviewed-by: Keerthy
Signed-off-by: Vignesh Raghavendra
---
drivers/misc/k3_avs.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c
index c19c3c0646b7..adaf75b7165d 100644
--- a/drivers/misc/k3_avs.c
+++ b/drivers/misc/k3_avs.c
@@ -190,6 +190,10 @@ int k3_avs_notify_freq(int dev_id, int clk_id, u32 freq)
struct k3_avs_privdata *priv = k3_avs_priv;
struct vd_data *vd;
+ /* Driver may not be probed yet */
+ if (!priv)
+ return -EINVAL;
+
for (vd = priv->vd_config->vds; vd->id >= 0; vd++) {
if (vd->dev_id != dev_id || vd->clk_id != clk_id)
continue;
[PATCH v2 03/10] remoteproc: pruss: add PRU remoteproc driver
The Programmable Real-Time Unit Subsystem (PRUSS) consists of
dual 32-bit RISC cores (Programmable Real-Time Units, or PRUs)
for program execution. This patch adds a remoteproc platform
driver for managing the individual PRU RISC cores life cycle.
The driver currently supports the AM65xx SoC
Signed-off-by: Keerthy
---
drivers/remoteproc/Kconfig | 11 +
drivers/remoteproc/Makefile| 1 +
drivers/remoteproc/pru_rproc.c | 405 +
3 files changed, 417 insertions(+)
create mode 100644 drivers/remoteproc/pru_rproc.c
diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig
index 7c2e4804b5..24e536463b 100644
--- a/drivers/remoteproc/Kconfig
+++ b/drivers/remoteproc/Kconfig
@@ -81,4 +81,15 @@ config REMOTEPROC_TI_POWER
help
Say 'y' here to add support for TI power processors such as those
found on certain TI keystone and OMAP generation SoCs.
+
+config REMOTEPROC_TI_PRU
+ bool "Support for TI's K3 based PRU remoteproc driver"
+ select REMOTEPROC
+ depends on DM
+ depends on TI_PRUSS
+ depends on ARCH_K3
+ depends on OF_CONTROL
+ help
+ Say 'y' here to add support for TI' K3 remoteproc driver.
+
endmenu
diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile
index 69ae7bd1e8..f0e83451d6 100644
--- a/drivers/remoteproc/Makefile
+++ b/drivers/remoteproc/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_REMOTEPROC_TI_K3_ARM64) += ti_k3_arm64_rproc.o
obj-$(CONFIG_REMOTEPROC_TI_K3_DSP) += ti_k3_dsp_rproc.o
obj-$(CONFIG_REMOTEPROC_TI_K3_R5F) += ti_k3_r5f_rproc.o
obj-$(CONFIG_REMOTEPROC_TI_POWER) += ti_power_proc.o
+obj-$(CONFIG_REMOTEPROC_TI_PRU) += pru_rproc.o
diff --git a/drivers/remoteproc/pru_rproc.c b/drivers/remoteproc/pru_rproc.c
new file mode 100644
index 00..832cffb1a0
--- /dev/null
+++ b/drivers/remoteproc/pru_rproc.c
@@ -0,0 +1,405 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * PRU-RTU remoteproc driver for various SoCs
+ *
+ * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
+ * Keerthy
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* PRU_ICSS_PRU_CTRL registers */
+#define PRU_CTRL_CTRL 0x
+#define PRU_CTRL_STS 0x0004
+#define PRU_CTRL_WAKEUP_EN 0x0008
+#define PRU_CTRL_CYCLE 0x000C
+#define PRU_CTRL_STALL 0x0010
+#define PRU_CTRL_CTBIR00x0020
+#define PRU_CTRL_CTBIR10x0024
+#define PRU_CTRL_CTPPR00x0028
+#define PRU_CTRL_CTPPR10x002C
+
+/* CTRL register bit-fields */
+#define CTRL_CTRL_SOFT_RST_N BIT(0)
+#define CTRL_CTRL_EN BIT(1)
+#define CTRL_CTRL_SLEEPING BIT(2)
+#define CTRL_CTRL_CTR_EN BIT(3)
+#define CTRL_CTRL_SINGLE_STEP BIT(8)
+#define CTRL_CTRL_RUNSTATE BIT(15)
+
+#define RPROC_FLAGS_SHIFT 16
+#define RPROC_FLAGS_NONE 0
+#define RPROC_FLAGS_ELF_PHDR BIT(0 + RPROC_FLAGS_SHIFT)
+#define RPROC_FLAGS_ELF_SHDR BIT(1 + RPROC_FLAGS_SHIFT)
+
+/**
+ * enum pru_mem - PRU core memory range identifiers
+ */
+enum pru_mem {
+ PRU_MEM_IRAM = 0,
+ PRU_MEM_CTRL,
+ PRU_MEM_DEBUG,
+ PRU_MEM_MAX,
+};
+
+struct pru_privdata {
+ phys_addr_t pru_iram;
+ phys_addr_t pru_ctrl;
+ phys_addr_t pru_debug;
+ fdt_size_t pru_iramsz;
+ fdt_size_t pru_ctrlsz;
+ fdt_size_t pru_debugsz;
+ const char *fw_name;
+ u32 iram_da;
+ u32 pdram_da;
+ u32 sdram_da;
+ u32 shrdram_da;
+ u32 bootaddr;
+ int id;
+ struct pruss *prusspriv;
+};
+
+/**
+ * pru_start() - start the pru processor
+ * @dev: corresponding k3 remote processor device
+ *
+ * Return: 0 if all goes good, else appropriate error message.
+ */
+static int pru_start(struct udevice *dev)
+{
+ struct pru_privdata *priv;
+ int val = 0;
+
+ priv = dev_get_priv(dev);
+
+ val = CTRL_CTRL_EN | ((priv->bootaddr >> 2) << 16);
+ writel(val, priv->pru_ctrl + PRU_CTRL_CTRL);
+
+ return 0;
+}
+
+/**
+ * pru_stop() - Stop pru processor
+ * @dev: corresponding k3 remote processor device
+ *
+ * Return: 0 if all goes good, else appropriate error message.
+ */
+static int pru_stop(struct udevice *dev)
+{
+ struct pru_privdata *priv;
+ int val = 0;
+
+ priv = dev_get_priv(dev);
+
+ val = readl(priv->pru_ctrl + PRU_CTRL_CTRL);
+ val &= ~CTRL_CTRL_EN;
+ writel(val, priv->pru_ctrl + PRU_CTRL_CTRL);
+
+ return 0;
+}
+
+/**
+ * pru_init() - Initialize the remote processor
+ * @dev: rproc device pointer
+ *
+ * Return: 0 if all went ok, else return appropriate error
+ */
+static int pru_init(struct udevice *dev)
+{
+ return 0;
+}
+
+/*
+ * Convert PRU device address (data spaces onl
[PATCH v2 00/10] net: ti: icssg: Add prueth support
The series adds support for icssg_prueth functionality on u-boot. This series is based on top of master branch. rproc init needs to be done from uboot command prompt. The pru/rtu firmware loading is done by prueth driver soon after config paramters are setup. Currently only slice0/1 of icssg2 instance on am6-evm is supported. i.e Both slices of icssg2 instance are supported. Prebuilt firmware can be obtained from AM65 procSDK [1] rootfs at /lib/firmware/ti-pruss/am65x*.elf [1] http://software-dl.ti.com/processor-sdk-linux/esd/AM65X/latest/index_FDS.html This tests tftp on prueth. Note: Uboot ethernet driver architecture supports once instance per probe. So only one of the ports are supported per instance. So DT of prueth node should have either ethernet-mii0 or ethernet-mii1. Changes in v2: It has been a while since v1 was posted. Here are the changes: * Removed the usage of misc_init_by_ofnode instead used uclass_get_device_by_ofnode. * Introduced started variable to keep track of the status of the prueth device. * Build Tested on Travis: https://travis-ci.org/Keerthyj/u-boot/builds/651449684 Keerthy (10): net: eth-uclass: eth_get_dev based on SEQ_ALIAS instead of probe order soc: ti: pruss: add a misc driver for PRUSS in TI SoCs remoteproc: pruss: add PRU remoteproc driver net: ti: icssg-prueth: Add ICSSG ethernet driver arm: dts: k3-am65-main: Add msmc_ram node arm: dts: k3-am654-base-board-u-boot: Add icssg specific msmc_ram carveout nodes arm: dts: k3-am65-main: Add scm_conf node arm: dts: k3-am65-main: Add pruss nodes for ICSSG2 arm64: dts: ti: am654-base-board: add ICSSG2 Ethernet support configs: am65x_evm_a53_defconfig: Enable CONFIG_TI_AM64_ICSSG_PRUETH arch/arm/dts/k3-am65-main.dtsi | 191 ++ arch/arm/dts/k3-am65.dtsi| 4 +- arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 129 configs/am65x_evm_a53_defconfig | 3 + drivers/net/ti/Kconfig | 8 + drivers/net/ti/Makefile | 1 + drivers/net/ti/icssg-prueth.c| 652 +++ drivers/net/ti/icssg.h | 36 + drivers/net/ti/icssg_classifier.c| 396 +++ drivers/remoteproc/Kconfig | 11 + drivers/remoteproc/Makefile | 1 + drivers/remoteproc/pru_rproc.c | 405 drivers/soc/ti/Kconfig | 12 + drivers/soc/ti/Makefile | 1 + drivers/soc/ti/pruss.c | 152 + include/ti-pruss.h | 17 + net/eth-uclass.c | 12 +- 17 files changed, 2027 insertions(+), 4 deletions(-) create mode 100644 drivers/net/ti/icssg-prueth.c create mode 100644 drivers/net/ti/icssg.h create mode 100644 drivers/net/ti/icssg_classifier.c create mode 100644 drivers/remoteproc/pru_rproc.c create mode 100644 drivers/soc/ti/pruss.c create mode 100644 include/ti-pruss.h -- 2.17.1
[PATCH v2 02/10] soc: ti: pruss: add a misc driver for PRUSS in TI SoCs
The Programmable Real-Time Unit - Industrial Communication
Subsystem (PRU-ICSS) is present of various TI SoCs such as
AM335x or AM437x or the AM654x family. Each SoC can have
one or more PRUSS instances that may or may not be identical.
The PRUSS consists of dual 32-bit RISC cores called the
Programmable Real-Time Units (PRUs), some shared, data and
instruction memories, some internal peripheral modules, and
an interrupt controller. The programmable nature of the PRUs
provide flexibility to implement custom peripheral interfaces,
fast real-time responses, or specialized data handling.
Add support for pruss driver. Currently am654x family
is supported.
Signed-off-by: Keerthy
---
Changes in v2:
* Fixed multiple comments from Andreas w.r.t header file define guards
and Kconfig help typos.
drivers/soc/ti/Kconfig | 12
drivers/soc/ti/Makefile | 1 +
drivers/soc/ti/pruss.c | 152
include/ti-pruss.h | 17 +
4 files changed, 182 insertions(+)
create mode 100644 drivers/soc/ti/pruss.c
create mode 100644 include/ti-pruss.h
diff --git a/drivers/soc/ti/Kconfig b/drivers/soc/ti/Kconfig
index e4f8834448..19bce14c05 100644
--- a/drivers/soc/ti/Kconfig
+++ b/drivers/soc/ti/Kconfig
@@ -23,4 +23,16 @@ config TI_KEYSTONE_SERDES
SerDes driver for Keystone SoC used for ethernet support on TI
K2 platforms.
+config TI_PRUSS
+ bool "Support for TI's K3 based Pruss driver"
+ depends on DM
+ depends on ARCH_K3
+ depends on OF_CONTROL
+ depends on SYSCON
+ help
+ Support for TI PRU-ICSSG subsystem.
+
+ Currently supported on AM65xx SoCs. Say Y here to support the
+ Programmable Realtime Unit (PRU).
+
endif # SOC_TI
diff --git a/drivers/soc/ti/Makefile b/drivers/soc/ti/Makefile
index 4ec04ee125..34f80aad29 100644
--- a/drivers/soc/ti/Makefile
+++ b/drivers/soc/ti/Makefile
@@ -2,3 +2,4 @@
obj-$(CONFIG_TI_K3_NAVSS_RINGACC) += k3-navss-ringacc.o
obj-$(CONFIG_TI_KEYSTONE_SERDES) += keystone_serdes.o
+obj-$(CONFIG_TI_PRUSS) += pruss.o
diff --git a/drivers/soc/ti/pruss.c b/drivers/soc/ti/pruss.c
new file mode 100644
index 00..059ae11805
--- /dev/null
+++ b/drivers/soc/ti/pruss.c
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * PRU-ICSS platform driver for various TI SoCs
+ *
+ * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
+ * Keerthy
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define PRUSS_CFG_IEPCLK 0x30
+#define ICSSG_CFG_CORE_SYNC0x3c
+
+#define ICSSG_TASK_MGR_OFFSET 0x2a000
+
+/* PRUSS_IEPCLK register bits */
+#define PRUSS_IEPCLK_IEP_OCP_CLK_ENBIT(0)
+
+/* ICSSG CORE_SYNC register bits */
+#define ICSSG_CORE_VBUSP_SYNC_EN BIT(0)
+
+/**
+ * enum pruss_mem - PRUSS memory range identifiers
+ */
+enum pruss_mem {
+ PRUSS_MEM_DRAM0 = 0,
+ PRUSS_MEM_DRAM1,
+ PRUSS_MEM_SHRD_RAM2,
+ PRUSS_MEM_MAX,
+};
+
+/*
+ * pruss_request_tm_region() - Request pruss for task manager region
+ * @dev: corresponding k3 device
+ * @loc: the task manager physical address
+ *
+ * Return: 0 if all goes good, else appropriate error message.
+ */
+int pruss_request_tm_region(struct udevice *dev, phys_addr_t *loc)
+{
+ struct pruss *priv;
+
+ priv = dev_get_priv(dev);
+ if (!priv || !priv->pruss_dram0)
+ return -EINVAL;
+
+ *loc = priv->pruss_dram0 + ICSSG_TASK_MGR_OFFSET;
+
+ return 0;
+}
+
+/*
+ * pruss_request_shrmem_region() - Request pruss for shared memory region
+ * @dev: corresponding k3 device
+ * @loc: the shared memory physical address
+ *
+ * Return: 0 if all goes good, else appropriate error message.
+ */
+int pruss_request_shrmem_region(struct udevice *dev, phys_addr_t *loc)
+{
+ struct pruss *priv;
+
+ priv = dev_get_priv(dev);
+ if (!priv || !priv->pruss_shrdram2)
+ return -EINVAL;
+
+ *loc = priv->pruss_shrdram2;
+
+ return 0;
+}
+
+/**
+ * pruss_probe() - Basic probe
+ * @dev: corresponding k3 device
+ *
+ * Return: 0 if all goes good, else appropriate error message.
+ */
+static int pruss_probe(struct udevice *dev)
+{
+ struct pruss *priv;
+ int ret, idx;
+ ofnode sub_node, node, memories;
+ struct regmap *regmap_cfg;
+ struct udevice *syscon;
+
+ priv = dev_get_priv(dev);
+ node = dev_ofnode(dev);
+ sub_node = ofnode_find_subnode(node, "cfg");
+ memories = ofnode_find_subnode(node, "memories");
+
+ idx = ofnode_stringlist_search(memories, "reg-names", "dram0");
+ priv->pruss_dram0 = ofnode_get_addr_size_index(memories, idx,
+ (u64
*)&priv->pruss_d
[PATCH v2 01/10] net: eth-uclass: eth_get_dev based on SEQ_ALIAS instead of probe order
In case of multiple eth interfaces currently eth_get_dev
fetches the device based on the probe order which can be
random hence try with the alias.
Signed-off-by: Keerthy
---
Changes in v2:
* Fixed comments from Tom & Lokesh as per:
https://patchwork.ozlabs.org/patch/1142697/
net/eth-uclass.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index ed81cbd537..93855e933b 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -68,9 +68,15 @@ struct udevice *eth_get_dev(void)
struct eth_uclass_priv *uc_priv;
uc_priv = eth_get_uclass_priv();
- if (!uc_priv->current)
- eth_errno = uclass_first_device(UCLASS_ETH,
- &uc_priv->current);
+
+ if (!uc_priv->current) {
+ eth_errno = uclass_get_device_by_seq(UCLASS_ETH, 0,
+&uc_priv->current);
+ if (eth_errno || !uc_priv->current)
+eth_errno = uclass_first_device(UCLASS_ETH,
+&uc_priv->current);
+ }
+
return uc_priv->current;
}
--
2.17.1
[PATCH v2 08/10] arm: dts: k3-am65-main: Add pruss nodes for ICSSG2
Add pruss nodes. This is based 4.19 DT with interrupt properties
removed from pur/rtu nodes.
Signed-off-by: Keerthy
---
arch/arm/dts/k3-am65-main.dtsi | 162 +
1 file changed, 162 insertions(+)
diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi
index 71a540376f..7499bab309 100644
--- a/arch/arm/dts/k3-am65-main.dtsi
+++ b/arch/arm/dts/k3-am65-main.dtsi
@@ -8,6 +8,8 @@
#include
#include
+#include
+
&cbass_main {
msmc_ram: sram@7000 {
compatible = "mmio-sram";
@@ -358,4 +360,164 @@
#phy-cells = <0>;
ti,dis-chg-det-quirk;
};
+
+ icssg2: icssg@b20 {
+ compatible = "ti,am654-icssg";
+ power-domains = <&k3_pds 64 TI_SCI_PD_EXCLUSIVE>;
+ reg = <0xb20 0x8>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ dma-ranges;
+ ti,psil-base = <0x4300>;/* ICSSG2 PSIL thread start */
+
+ ti,psil-config0 {
+ linux,udma-mode = ;
+ statictr-type = ;
+ ti,needs-epib;
+ ti,psd-size = <16>;
+ };
+
+ ti,psil-config1 {
+ linux,udma-mode = ;
+ statictr-type = ;
+ ti,needs-epib;
+ ti,psd-size = <16>;
+ };
+
+ ti,psil-config2 {
+ linux,udma-mode = ;
+ statictr-type = ;
+ ti,needs-epib;
+ ti,psd-size = <16>;
+ };
+
+ ti,psil-config3 {
+ linux,udma-mode = ;
+ statictr-type = ;
+ ti,needs-epib;
+ ti,psd-size = <16>;
+ };
+
+ ti,psil-config4 {
+ linux,udma-mode = ;
+ statictr-type = ;
+ ti,needs-epib;
+ ti,psd-size = <16>;
+ };
+
+ ti,psil-config5 {
+ linux,udma-mode = ;
+ statictr-type = ;
+ ti,needs-epib;
+ ti,psd-size = <16>;
+ };
+
+ ti,psil-config6 {
+ linux,udma-mode = ;
+ statictr-type = ;
+ ti,needs-epib;
+ ti,psd-size = <16>;
+ };
+
+ ti,psil-config7 {
+ linux,udma-mode = ;
+ statictr-type = ;
+ ti,needs-epib;
+ ti,psd-size = <16>;
+ };
+
+ icssg2_mem: memories@b20 {
+ reg = <0xb20 0x2000>,
+ <0xb202000 0x2000>,
+ <0xb21 0x1>;
+ reg-names = "dram0", "dram1",
+ "shrdram2";
+ };
+
+ icssg2_cfg: cfg@b226000 {
+ compatible = "syscon";
+ reg = <0xb226000 0x200>;
+ };
+
+ icssg2_iep: iep@b22e000 {
+ compatible = "syscon";
+ reg = <0xb22e000 0x1000>;
+ };
+
+ icssg2_mii_rt: mii-rt@b232000 {
+ compatible = "syscon";
+ reg = <0xb232000 0x100>;
+ };
+
+ icssg2_mii_g_rt: mii-g-rt@b233000 {
+ compatible = "syscon";
+ reg = <0xb233000 0x1000>;
+ };
+
+ icssg2_intc: interrupt-controller@b22 {
+ compatible = "ti,am654-icssg-intc";
+ reg = <0xb22 0x2000>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ interrupts = ,
+,
+,
+,
+,
+,
+,
+;
+ interrupt-names = "host2", "host3", "host4",
+ "host5", "host6", "host7",
+ "host8", "host9";
+ };
+
+ pru2_0: pru@b2340
[PATCH v2 06/10] arm: dts: k3-am654-base-board-u-boot: Add icssg specific msmc_ram carveout nodes
Add icssg specific msmc_ram carveout nodes
Signed-off-by: Keerthy
---
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index a349edcfa5..a5aee02eb8 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -365,3 +365,15 @@
&usb1 {
dr_mode = "peripheral";
};
+
+&msmc_ram {
+ icssg0_sram: icssg0-sram@4 {
+ reg = <0x4 0x1>;
+ };
+ icssg1_sram: icssg1-sram@5 {
+ reg = <0x5 0x1>;
+ };
+ icssg2_sram: icssg2-sram@6 {
+ reg = <0x6 0x1>;
+ };
+};
--
2.17.1
[PATCH v2 05/10] arm: dts: k3-am65-main: Add msmc_ram node
Add msmc_ram node needed for prueth
Signed-off-by: Keerthy
---
Changes in v2:
* Aligned trailing 0s for consistency.
arch/arm/dts/k3-am65-main.dtsi | 21 +
arch/arm/dts/k3-am65.dtsi | 4 +++-
2 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi
index ab40dafceb..631134cd65 100644
--- a/arch/arm/dts/k3-am65-main.dtsi
+++ b/arch/arm/dts/k3-am65-main.dtsi
@@ -9,6 +9,27 @@
#include
&cbass_main {
+ msmc_ram: sram@7000 {
+ compatible = "mmio-sram";
+ reg = <0x0 0x7000 0x0 0x20>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x7000 0x20>;
+ u-boot,dm-spl;
+
+ atf-sram@0 {
+ reg = <0x0 0x2>;
+ };
+
+ sysfw-sram@f {
+ reg = <0xf 0x1>;
+ };
+
+ l3cache-sram@10 {
+ reg = <0x10 0x10>;
+ };
+ };
+
gic500: interrupt-controller@180 {
compatible = "arm,gic-v3";
#address-cells = <2>;
diff --git a/arch/arm/dts/k3-am65.dtsi b/arch/arm/dts/k3-am65.dtsi
index 3ead944640..b2e967aaf7 100644
--- a/arch/arm/dts/k3-am65.dtsi
+++ b/arch/arm/dts/k3-am65.dtsi
@@ -79,7 +79,9 @@
<0x00 0x4204 0x00 0x4204 0x00 0x03ac2400>,
<0x00 0x4510 0x00 0x4510 0x00 0x00c24000>,
<0x00 0x4600 0x00 0x4600 0x00 0x0020>,
-<0x00 0x4700 0x00 0x4700 0x00 0x00068400>;
+<0x00 0x4700 0x00 0x4700 0x00 0x00068400>,
+<0x07 0x 0x07 0x 0x01 0x>,
+<0x00 0x7000 0x00 0x7000 0x00 0x0020>;
cbass_mcu: interconnect@2838 {
compatible = "simple-bus";
--
2.17.1
[PATCH v2 07/10] arm: dts: k3-am65-main: Add scm_conf node
Add scm_conf node needed for prueth.
Signed-off-by: Keerthy
---
arch/arm/dts/k3-am65-main.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi
index 631134cd65..71a540376f 100644
--- a/arch/arm/dts/k3-am65-main.dtsi
+++ b/arch/arm/dts/k3-am65-main.dtsi
@@ -53,6 +53,14 @@
};
};
+ scm_conf: scm_conf@10 {
+ compatible = "syscon", "simple-mfd";
+ reg = <0 0x0010 0 0x1c000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x0010 0x1c000>;
+ };
+
secure_proxy_main: mailbox@32c0 {
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
--
2.17.1
[PATCH v2 10/10] configs: am65x_evm_a53_defconfig: Enable CONFIG_TI_AM64_ICSSG_PRUETH
Enable ICSSG_PRUETH & related configs. This enables ethernet functionality on PRU. Signed-off-by: Keerthy --- configs/am65x_evm_a53_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index 079cd912ba..1b0bfe6444 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -84,6 +84,7 @@ CONFIG_DM_ETH=y CONFIG_E1000=y CONFIG_CMD_E1000=y CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_TI_AM64_ICSSG_PRUETH=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_PCI_KEYSTONE=y @@ -98,10 +99,12 @@ CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y CONFIG_REMOTEPROC_TI_K3_R5F=y +CONFIG_REMOTEPROC_TI_PRU=y CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_TI=y +CONFIG_TI_PRUSS=y CONFIG_SYSRESET=y CONFIG_SPL_SYSRESET=y CONFIG_SYSRESET_TI_SCI=y -- 2.17.1
[PATCH v2 04/10] net: ti: icssg-prueth: Add ICSSG ethernet driver
This is the Ethernet driver for TI SoCs with the
ICSSG PRU Sub-system running EMAC firmware.
This driver caters to either of the slices(pru/rtu pair)
of the icssg subsystem.
Following are the firmwares needed to run cores:
am65x-pru0-prueth-fw.elf for pru0 of slice0
am65x-rtu0-prueth-fw.elf for rtu0 of slice0
am65x-pru1-prueth-fw.elf for pru1 of slice1
am65x-rtu1-prueth-fw.elf for rtu1 of slice1
One and exactly one of the slices is supported
as the u-boot ethernet supports probing one interface
at a time.
Signed-off-by: Keerthy
---
Changes in v2:
* Added guards defines for icssg.h
* returning errors which were missed in v1
* Removed unused prueth_print_buf function.
* Removed usage misc_of_init and used uclass_get_device_by_ofnode
in place of that.
* Introduced started variable to keep track of the status of the
prueth device.
drivers/net/ti/Kconfig| 8 +
drivers/net/ti/Makefile | 1 +
drivers/net/ti/icssg-prueth.c | 652 ++
drivers/net/ti/icssg.h| 36 ++
drivers/net/ti/icssg_classifier.c | 396 ++
5 files changed, 1093 insertions(+)
create mode 100644 drivers/net/ti/icssg-prueth.c
create mode 100644 drivers/net/ti/icssg.h
create mode 100644 drivers/net/ti/icssg_classifier.c
diff --git a/drivers/net/ti/Kconfig b/drivers/net/ti/Kconfig
index ecf642de10..1b6285709f 100644
--- a/drivers/net/ti/Kconfig
+++ b/drivers/net/ti/Kconfig
@@ -26,3 +26,11 @@ config TI_AM65_CPSW_NUSS
help
This driver supports TI K3 MCU CPSW Nuss Ethernet controller
in Texas Instruments K3 AM65x SoCs.
+
+config TI_AM64_ICSSG_PRUETH
+ bool "TI Gigabit PRU Ethernet driver"
+ depends on ARCH_K3
+ select PHYLIB
+ help
+ Support Gigabit Ethernet ports over the ICSSG PRU Subsystem
+ This subsystem is available starting with the AM65 platform.
diff --git a/drivers/net/ti/Makefile b/drivers/net/ti/Makefile
index 8d3808bb4b..b486498909 100644
--- a/drivers/net/ti/Makefile
+++ b/drivers/net/ti/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_DRIVER_TI_CPSW) += cpsw.o cpsw-common.o cpsw_mdio.o
obj-$(CONFIG_DRIVER_TI_EMAC) += davinci_emac.o
obj-$(CONFIG_DRIVER_TI_KEYSTONE_NET) += keystone_net.o cpsw_mdio.o
obj-$(CONFIG_TI_AM65_CPSW_NUSS) += am65-cpsw-nuss.o cpsw_mdio.o
+obj-$(CONFIG_TI_AM64_ICSSG_PRUETH) += icssg-prueth.o cpsw_mdio.o
icssg_classifier.o
diff --git a/drivers/net/ti/icssg-prueth.c b/drivers/net/ti/icssg-prueth.c
new file mode 100644
index 00..0a85ca3ab5
--- /dev/null
+++ b/drivers/net/ti/icssg-prueth.c
@@ -0,0 +1,652 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Texas Instruments PRU Ethernet Driver
+ *
+ * Copyright (C) 2020, Texas Instruments, Incorporated
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "cpsw_mdio.h"
+#include "icssg.h"
+
+#define ICSS_SLICE0 0
+#define ICSS_SLICE1 1
+
+#ifdef PKTSIZE_ALIGN
+#define UDMA_RX_BUF_SIZE PKTSIZE_ALIGN
+#else
+#define UDMA_RX_BUF_SIZE ALIGN(1522, ARCH_DMA_MINALIGN)
+#endif
+
+#ifdef PKTBUFSRX
+#define UDMA_RX_DESC_NUM PKTBUFSRX
+#else
+#define UDMA_RX_DESC_NUM 4
+#endif
+
+enum prueth_mac {
+ PRUETH_MAC0 = 0,
+ PRUETH_MAC1,
+ PRUETH_NUM_MACS,
+};
+
+enum prueth_port {
+ PRUETH_PORT_HOST = 0, /* host side port */
+ PRUETH_PORT_MII0, /* physical port MII 0 */
+ PRUETH_PORT_MII1, /* physical port MII 1 */
+};
+
+/* Config region lies in shared RAM */
+#define ICSS_CONFIG_OFFSET_SLICE0 0
+#define ICSS_CONFIG_OFFSET_SLICE1 0x8000
+
+/* Firmware flags */
+#define ICSS_SET_RUN_FLAG_VLAN_ENABLE BIT(0) /* switch only */
+#define ICSS_SET_RUN_FLAG_FLOOD_UNICASTBIT(1) /* switch only
*/
+#define ICSS_SET_RUN_FLAG_PROMISC BIT(2) /* MAC only */
+#define ICSS_SET_RUN_FLAG_MULTICAST_PROMISCBIT(3) /* MAC only */
+
+/* CTRLMMR_ICSSG_RGMII_CTRL register bits */
+#define ICSSG_CTRL_RGMII_ID_MODE BIT(24)
+
+/**
+ * enum pruss_pru_id - PRU core identifiers
+ */
+enum pruss_pru_id {
+ PRUSS_PRU0 = 0,
+ PRUSS_PRU1,
+ PRUSS_NUM_PRUS,
+};
+
+struct prueth {
+ struct udevice *dev;
+ struct regmap *miig_rt;
+ struct regmap *mii_rt;
+ fdt_addr_t mdio_base;
+ phys_addr_t pruss_shrdram2;
+ phys_addr_t tmaddr;
+ struct mii_dev *bus;
+ u32 port_id;
+ u32 sram_pa;
+ struct phy_device *phydev;
+ boolhas_phy;
+ ofnode phy_node;
+ u32 phy_addr;
+ ofnode eth_node[PRUETH_NUM_MACS];
+
[PATCH v2 09/10] arm64: dts: ti: am654-base-board: add ICSSG2 Ethernet support
ICSSG2 provide dual Gigabit Ethernet support.
Currently mdio clock is part of this node and also
the icssg2_rgmii_pins_default pinmux node has the
mdio pins as there is no davinci mdio driver.
Currently icssg2 instances are supported.
Either mii0 or mii1 can be enabled at a time.
Signed-off-by: Keerthy
---
Changes in v2:
* Removed a bunch of inconsistent white space in pins definition.
arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 117 +++
1 file changed, 117 insertions(+)
diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index a5aee02eb8..31038b7802 100644
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -16,6 +16,64 @@
serial2 = &main_uart0;
ethernet0 = &cpsw_port1;
};
+
+ /* Dual Ethernet application node on PRU-ICSSG2 */
+ pruss2_eth: pruss2_eth {
+ compatible = "ti,am654-icssg-prueth";
+ pinctrl-names = "default";
+ pinctrl-0 = <&icssg2_rgmii_pins_default>;
+ sram = <&icssg2_sram>;
+ clocks = <&k3_clks 64 3>;
+ clock-names = "mdio_fck";
+ u-boot,dm-spl;
+
+ prus = <&pru2_0>, <&rtu2_0>, <&pru2_1>, <&rtu2_1>;
+ firmware-name = "ti-pruss/am65x-pru0-prueth-fw.elf",
+ "ti-pruss/am65x-rtu0-prueth-fw.elf",
+ "ti-pruss/am65x-pru1-prueth-fw.elf",
+ "ti-pruss/am65x-rtu1-prueth-fw.elf";
+ mii-g-rt = <&icssg2_mii_g_rt>;
+ mii-rt = <&icssg2_mii_rt>;
+ dma-coherent;
+ dmas = <&mcu_udmap &icssg2 0 UDMA_DIR_TX>, /* egress slice
0 */
+ <&mcu_udmap &icssg2 1 UDMA_DIR_TX>, /* egress slice 0 */
+ <&mcu_udmap &icssg2 2 UDMA_DIR_TX>, /* egress slice 0 */
+ <&mcu_udmap &icssg2 3 UDMA_DIR_TX>, /* mgmnt cmd slice 0
*/
+ <&mcu_udmap &icssg2 4 UDMA_DIR_TX>, /* egress slice 1 */
+ <&mcu_udmap &icssg2 5 UDMA_DIR_TX>, /* egress slice 1 */
+ <&mcu_udmap &icssg2 6 UDMA_DIR_TX>, /* egress slice 1 */
+ <&mcu_udmap &icssg2 7 UDMA_DIR_TX>, /* mgmnt cmd slice 1
*/
+
+ <&mcu_udmap &icssg2 0 UDMA_DIR_RX>, /* ingress slice 0 */
+ <&mcu_udmap &icssg2 1 UDMA_DIR_RX>, /* ingress slice 1 */
+ <&mcu_udmap &icssg2 2 UDMA_DIR_RX>, /* mgmnt rsp slice 0
*/
+ <&mcu_udmap &icssg2 3 UDMA_DIR_RX>; /* mgmnt rsp slice 1
*/
+ dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
+ "tx1-0", "tx1-1", "tx1-2", "tx1-3",
+ "rx0", "rx1",
+ "rxmgm0", "rxmgm1";
+
+ pruss2_emac0: ethernet-mii0 {
+ phy-handle = <&pruss2_eth0_phy>;
+ phy-mode = "rgmii-rxid";
+ syscon-rgmii-delay = <&scm_conf 0x4120>;
+ /* Filled in by bootloader */
+ local-mac-address = [00 00 00 00 00 00];
+ };
+
+/*
+ * Commenting out the second mii interface as the framework
+ * supports one interface in a single probe
+ * So either mii1 or mii2 can be used. In case mii1 is needed
+ * uncomment mii1 and comment out mii0
+ pruss2_emac1: ethernet-mii1 {
+ phy-handle = <&pruss2_eth1_phy>;
+ phy-mode = "rgmii-rxid";
+ syscon-rgmii-delay = <&scm_conf 0x4124>;
+ local-mac-address = [00 00 00 00 00 00];
+ };
+*/
+ };
};
&cbass_main{
@@ -275,6 +333,47 @@
u-boot,dm-spl;
};
+ icssg2_rgmii_pins_default: icssg2_rgmii_pins_default {
+ pinctrl-single,pins = <
+ AM65X_IOPAD(0x00ac, PIN_INPUT, 2) /* (AH15)
PRG2_PRU1_GPO0.PRG2_RGMII2_RD0 */
+ AM65X_IOPAD(0x00b0, PIN_INPUT, 2) /* (AC16)
PRG2_PRU1_GPO1.PRG2_RGMII2_RD1 */
+ AM65X_IOPAD(0x00b4, PIN_INPUT, 2) /* (AD17)
PRG2_PRU1_GPO2.PRG2_RGMII2_RD2 */
+ AM65X_IOPAD(0x00b8, PIN_INPUT, 2) /* (AH14)
PRG2_PRU1_GPO3.PRG2_RGMII2_RD3 */
+ AM65X_IOPAD(0x00cc, PIN_OUTPUT,
Re: [PATCH v2 00/10] net: ti: icssg: Add prueth support
On 18/02/20 10:39 am, Keerthy wrote: The series adds support for icssg_prueth functionality on u-boot. This series is based on top of master branch. rproc init needs to be done from uboot command prompt. The pru/rtu firmware loading is done by prueth driver soon after config paramters are setup. A quick update on this series. It seems newer version of this hardware needs more modifications to this series. Hence please ignore v2. Best Regards, Keerthy Currently only slice0/1 of icssg2 instance on am6-evm is supported. i.e Both slices of icssg2 instance are supported. Prebuilt firmware can be obtained from AM65 procSDK [1] rootfs at /lib/firmware/ti-pruss/am65x*.elf [1] http://software-dl.ti.com/processor-sdk-linux/esd/AM65X/latest/index_FDS.html This tests tftp on prueth. Note: Uboot ethernet driver architecture supports once instance per probe. So only one of the ports are supported per instance. So DT of prueth node should have either ethernet-mii0 or ethernet-mii1. Changes in v2: It has been a while since v1 was posted. Here are the changes: * Removed the usage of misc_init_by_ofnode instead used uclass_get_device_by_ofnode. * Introduced started variable to keep track of the status of the prueth device. * Build Tested on Travis: https://travis-ci.org/Keerthyj/u-boot/builds/651449684 Keerthy (10): net: eth-uclass: eth_get_dev based on SEQ_ALIAS instead of probe order soc: ti: pruss: add a misc driver for PRUSS in TI SoCs remoteproc: pruss: add PRU remoteproc driver net: ti: icssg-prueth: Add ICSSG ethernet driver arm: dts: k3-am65-main: Add msmc_ram node arm: dts: k3-am654-base-board-u-boot: Add icssg specific msmc_ram carveout nodes arm: dts: k3-am65-main: Add scm_conf node arm: dts: k3-am65-main: Add pruss nodes for ICSSG2 arm64: dts: ti: am654-base-board: add ICSSG2 Ethernet support configs: am65x_evm_a53_defconfig: Enable CONFIG_TI_AM64_ICSSG_PRUETH arch/arm/dts/k3-am65-main.dtsi | 191 ++ arch/arm/dts/k3-am65.dtsi| 4 +- arch/arm/dts/k3-am654-base-board-u-boot.dtsi | 129 configs/am65x_evm_a53_defconfig | 3 + drivers/net/ti/Kconfig | 8 + drivers/net/ti/Makefile | 1 + drivers/net/ti/icssg-prueth.c| 652 +++ drivers/net/ti/icssg.h | 36 + drivers/net/ti/icssg_classifier.c| 396 +++ drivers/remoteproc/Kconfig | 11 + drivers/remoteproc/Makefile | 1 + drivers/remoteproc/pru_rproc.c | 405 drivers/soc/ti/Kconfig | 12 + drivers/soc/ti/Makefile | 1 + drivers/soc/ti/pruss.c | 152 + include/ti-pruss.h | 17 + net/eth-uclass.c | 12 +- 17 files changed, 2027 insertions(+), 4 deletions(-) create mode 100644 drivers/net/ti/icssg-prueth.c create mode 100644 drivers/net/ti/icssg.h create mode 100644 drivers/net/ti/icssg_classifier.c create mode 100644 drivers/remoteproc/pru_rproc.c create mode 100644 drivers/soc/ti/pruss.c create mode 100644 include/ti-pruss.h
[PATCH 1/3] arm: dts: k3-j721e-common-proc-board-u-boot: Enable ospi1/qspi
Enable the ospi1/qspi module while at it move the corresponding
pins to common u-boot.dtsi file.
Signed-off-by: Keerthy
---
.../k3-j721e-common-proc-board-u-boot.dtsi| 23 +++
arch/arm/dts/k3-j721e-common-proc-board.dts | 13 ---
2 files changed, 23 insertions(+), 13 deletions(-)
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index d422100d42..d15b5181f4 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -260,6 +260,20 @@
J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4)
MCU_MDIO0_MDIO */
>;
};
+
+ mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22)
MCU_OSPI1_CLK */
+ J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22)
MCU_OSPI1_CSn0 */
+ J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22)
MCU_OSPI1_D0 */
+ J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22)
MCU_OSPI1_D1 */
+ J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23)
MCU_OSPI1_D2 */
+ J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23)
MCU_OSPI1_D3 */
+ J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23)
MCU_OSPI1_DQS */
+ J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23)
MCU_OSPI1_LBCLKO */
+ >;
+ u-boot,dm-spl;
+ };
};
&main_pmx0 {
@@ -365,3 +379,12 @@
u-boot,dm-spl;
};
};
+
+&ospi1 {
+ status = "okay";
+ u-boot,dm-spl;
+
+ flash@0 {
+ u-boot,dm-spl;
+ };
+};
diff --git a/arch/arm/dts/k3-j721e-common-proc-board.dts
b/arch/arm/dts/k3-j721e-common-proc-board.dts
index 496a15e1d1..d02422ed25 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-common-proc-board.dts
@@ -123,19 +123,6 @@
J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24)
WKUP_I2C0_SDA */
>;
};
-
- mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
- pinctrl-single,pins = <
- J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22)
MCU_OSPI1_CLK */
- J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22)
MCU_OSPI1_CSn0 */
- J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22)
MCU_OSPI1_D0 */
- J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22)
MCU_OSPI1_D1 */
- J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23)
MCU_OSPI1_D2 */
- J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23)
MCU_OSPI1_D3 */
- J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23)
MCU_OSPI1_DQS */
- J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23)
MCU_OSPI1_LBCLKO */
- >;
- };
};
&usbss0 {
--
2.17.1
[PATCH 0/3] arm: dts: k3-j721e: Enable OSPI1/QSPI
The patch series enables he OSPI1 aka QSPI node. This is a precursor for enabling QSPI boot on j721e. Keerthy (3): arm: dts: k3-j721e-common-proc-board-u-boot: Enable ospi1/qspi arm: dts: k3-j721e-mcu-wakeup: Add assigned-clocks/rates properties for ospi1/qspi arm: dts: k3-j721e-r5-common-proc-board: Add ospi1 flash node .../k3-j721e-common-proc-board-u-boot.dtsi| 23 + arch/arm/dts/k3-j721e-common-proc-board.dts | 13 -- arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 2 ++ .../arm/dts/k3-j721e-r5-common-proc-board.dts | 25 +++ 4 files changed, 50 insertions(+), 13 deletions(-) -- 2.17.1
[PATCH 3/3] arm: dts: k3-j721e-r5-common-proc-board: Add ospi1 flash node
Add ospi1 flash node required for QSPI boot.
Signed-off-by: Keerthy
---
.../arm/dts/k3-j721e-r5-common-proc-board.dts | 25 +++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index ebea9efa58..cb98e4ba33 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -306,4 +306,29 @@
};
};
+&ospi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
+ u-boot,dm-spl;
+
+ reg = <0x0 0x4705 0x0 0x100>,
+ <0x0 0x5800 0x0 0x800>;
+
+ flash@0{
+ compatible = "jedec,spi-nor";
+ reg = <0x0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <4000>;
+ cdns,tshsl-ns = <60>;
+ cdns,tsd2d-ns = <60>;
+ cdns,tchsh-ns = <60>;
+ cdns,tslch-ns = <60>;
+ cdns,read-delay = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-spl;
+ };
+};
+
#include "k3-j721e-common-proc-board-u-boot.dtsi"
--
2.17.1
[PATCH 2/3] arm: dts: k3-j721e-mcu-wakeup: Add assigned-clocks/rates properties for ospi1/qspi
Add assigned-clocks/rates properties for ospi1/qspi. This is the expected rate as per ROM configuration. Signed-off-by: Keerthy --- arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi index a9e97f219b..2eed50aa5a 100644 --- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi @@ -170,6 +170,8 @@ cdns,fifo-width = <4>; cdns,trigger-address = <0x0>; clocks = <&k3_clks 104 0>; + assigned-clocks = <&k3_clks 104 0>; + assigned-clock-rates = <1>; power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>; #address-cells = <1>; #size-cells = <0>; -- 2.17.1
[PATCH v2 0/3] arm: dts: k3-j721e: Enable OSPI1/QSPI
The patch series enables he OSPI1 aka QSPI node. This is a precursor for enabling QSPI boot on j721e. Changes in v2: * Moved the pin definitions out of u-boot.dtsi to r5 and a72 based dts files. Keerthy (3): arm: dts: k3-j721e: Enable ospi1/qspi arm: dts: k3-j721e-mcu-wakeup: Add assigned-clocks/rates properties for ospi1/qspi arm: dts: k3-j721e-r5-common-proc-board: Add ospi1 flash node .../k3-j721e-common-proc-board-u-boot.dtsi| 12 ++ arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 2 + .../arm/dts/k3-j721e-r5-common-proc-board.dts | 39 +++ 3 files changed, 53 insertions(+) -- 2.17.1
[PATCH v2 3/3] arm: dts: k3-j721e-r5-common-proc-board: Add ospi1 flash node
Add ospi1 flash node required for QSPI boot.
Signed-off-by: Keerthy
---
.../arm/dts/k3-j721e-r5-common-proc-board.dts | 25 +++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index 44da8eabc2..84bfb1025e 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -320,4 +320,29 @@
};
};
+&ospi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
+ u-boot,dm-spl;
+
+ reg = <0x0 0x4705 0x0 0x100>,
+ <0x0 0x5800 0x0 0x800>;
+
+ flash@0{
+ compatible = "jedec,spi-nor";
+ reg = <0x0>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ spi-max-frequency = <4000>;
+ cdns,tshsl-ns = <60>;
+ cdns,tsd2d-ns = <60>;
+ cdns,tchsh-ns = <60>;
+ cdns,tslch-ns = <60>;
+ cdns,read-delay = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ u-boot,dm-spl;
+ };
+};
+
#include "k3-j721e-common-proc-board-u-boot.dtsi"
--
2.17.1
[PATCH v2 1/3] arm: dts: k3-j721e: Enable ospi1/qspi
Enable the ospi1/qspi for both r5 and a72 configurations.
Signed-off-by: Keerthy
---
Changes in v2:
* Moved the pin definitions out of u-boot.dtsi to r5 and a72
based dts files.
.../arm/dts/k3-j721e-common-proc-board-u-boot.dtsi | 12
arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 14 ++
2 files changed, 26 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
index d422100d42..7b01e4204f 100644
--- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
@@ -365,3 +365,15 @@
u-boot,dm-spl;
};
};
+
+&ospi1 {
+ u-boot,dm-spl;
+
+ flash@0 {
+ u-boot,dm-spl;
+ };
+};
+
+&mcu_fss0_ospi1_pins_default {
+ u-boot,dm-spl;
+};
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index ebea9efa58..44da8eabc2 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -134,6 +134,20 @@
J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /*
MCU_OSPI0_CSn0 */
>;
};
+
+ mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
+ u-boot,dm-spl;
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22)
MCU_OSPI1_CLK */
+ J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22)
MCU_OSPI1_CSn0 */
+ J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22)
MCU_OSPI1_D0 */
+ J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22)
MCU_OSPI1_D1 */
+ J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23)
MCU_OSPI1_D2 */
+ J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23)
MCU_OSPI1_D3 */
+ J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23)
MCU_OSPI1_DQS */
+ J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23)
MCU_OSPI1_LBCLKO */
+ >;
+ };
};
&main_pmx0 {
--
2.17.1
[PATCH v2 2/3] arm: dts: k3-j721e-mcu-wakeup: Add assigned-clocks/rates properties for ospi1/qspi
Add assigned-clocks/rates properties for ospi1/qspi. This is the expected rate as per ROM configuration. Signed-off-by: Keerthy --- arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi index a9e97f219b..2eed50aa5a 100644 --- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi @@ -170,6 +170,8 @@ cdns,fifo-width = <4>; cdns,trigger-address = <0x0>; clocks = <&k3_clks 104 0>; + assigned-clocks = <&k3_clks 104 0>; + assigned-clock-rates = <1>; power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>; #address-cells = <1>; #size-cells = <0>; -- 2.17.1
Re: [PATCH v2 0/3] arm: dts: k3-j721e: Enable OSPI1/QSPI
On 04/03/20 10:10 am, Lokesh Vutla wrote: On 04/03/20 10:09 AM, Keerthy wrote: The patch series enables he OSPI1 aka QSPI node. This is a precursor for enabling QSPI boot on j721e. How did you test this using R5 defconig? #define CONFIG_SF_DEFAULT_BUS 1 So as to force SPI boot to OSPI1/QSPI. Booted using OSPI boot probed sf probe 1:0 & burnt all the boot images on to QSPI. Then booted from QSPI. - Keerthy Thanks and regards, Lokesh
Re: [U-Boot] [PATCH v3 00/18] misc: Add AVS class 0 support for AM6
On 24/10/19 3:45 PM, Lokesh Vutla wrote: On 24/10/19 3:00 PM, Keerthy wrote: Adaptive Voltage Scaling is a technology used in TI SoCs to optimize the operating voltage based on characterization data written to efuse during production. Add support for Adaptive Voltage scaling class 0 support for AM6 family of devices. Adaptive voltage scaling class 0 implies that optimized voltage values for a particular OPP of a particular voltage domain are read from Efuse and programmed on the pmic/regulator. Tested on AM654-EVM for MPU @800 MHz. Tested on J721e-evm for MPU. For the entire series: Reviewed-by: Lokesh Vutla Thanks and regards, Lokesh Tom, If no further comments can this series be pulled in? - Keerthy The series is based on top of the branch: https://github.com/lokeshvutla/u-boot/tree/devel/j721e-full-boot Changes in v3: * Extended the support for j721e-evm. * Moved vtm node under r5-board dts. Changes in v2: * Avoided creation of new uclass. AVS driver is now under misc. Keerthy (11): clk: clk-ti-sci: Notify AVS driver upon setting clock rate misc: k3_avs: Add j721e support power: pmic: tps65941: Add support for tps65941 family of PMICs power: regulator: tps65941: add regulator support arm: mach-k3: am6_init: Initialize AVS class 0 arm: mach-k3: j721e_init: Initialize avs class 0 arm: dts: k3-am654-r5-base-board: Add VTM node arm: dts: k3-j721e-r5-common-proc-board: Add VTM node arm: dts: k3-j721e-r5-common: Add tps65941 node and dependent wkup_i2c0 node arm: dts: k3-j721e-r5-common-proc-board: Hook buck12_reg to vtm supply configs: j721e_evm_r5_defconfig: Enable AVS Class 0 & dependent configs Tero Kristo (7): misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0 power: regulator: tps6236x: add support for tps6236x regulators arm: dts: k3-am654-r5-base-board: enable wkup_i2c0 driver for spl arm: dts: k3-am654-r5-base-board: add supply rail for MPU arm: dts: k3-am654-r5-base-board: enable wkup_vtm0 node and link in supplies configs: am65x_evm_r5_defconfig: Enable TPS62363 regulator support configs: am65x_evm_r5_defconfig: Enable AVS class 0 support arch/arm/dts/k3-am654-r5-base-board.dts | 27 ++ arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 11 + .../arm/dts/k3-j721e-r5-common-proc-board.dts | 44 ++ arch/arm/mach-k3/am6_init.c | 7 + arch/arm/mach-k3/j721e_init.c | 7 + configs/am65x_evm_r5_defconfig| 2 + configs/j721e_evm_r5_defconfig| 9 + drivers/clk/clk-ti-sci.c | 5 + drivers/misc/Kconfig | 9 + drivers/misc/Makefile | 1 + drivers/misc/k3_avs.c | 388 + drivers/power/pmic/Kconfig| 7 + drivers/power/pmic/Makefile | 1 + drivers/power/pmic/tps65941.c | 83 drivers/power/regulator/Kconfig | 20 + drivers/power/regulator/Makefile | 2 + drivers/power/regulator/tps62360_regulator.c | 123 ++ drivers/power/regulator/tps65941_regulator.c | 407 ++ include/k3-avs.h | 30 ++ include/power/tps65941.h | 26 ++ 20 files changed, 1209 insertions(+) create mode 100644 drivers/misc/k3_avs.c create mode 100644 drivers/power/pmic/tps65941.c create mode 100644 drivers/power/regulator/tps62360_regulator.c create mode 100644 drivers/power/regulator/tps65941_regulator.c create mode 100644 include/k3-avs.h create mode 100644 include/power/tps65941.h ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 00/10] power: Add AVS class 0 support for AM6
Adaptive Voltage Scaling is a technology used in TI SoCs to optimize the operating voltage based on characterization data written to efuse during production. Add support for Adaptive Voltage scaling class 0 support for AM6 family of devices. Adaptive voltage scaling class 0 implies that optimized voltage values for a particular OPP of a particular voltage domain are read from Efuse and programmed on the pmic/regulator. Tested on AM654-EVM for MPU @800 MHz. Keerthy (2): arm: mach-k3: am6_init: Initialize AVS class 0 clk: clk-ti-sci: Notify AVS driver upon setting clock rate Tero Kristo (8): power: add driver for K3 Adaptive Voltage Scaling Class 0 power: regulator: tps6236x: add support for tps6236x regulators arm: dts: k3-am65: Add VTM node arm: dts: k3-am654-r5-base-board: enable wkup_i2c0 driver for spl arm: dts: k3-am654-r5-base-board: add supply rail for MPU arm: dts: k3-am654-r5-base-board: enable wkup_vtm0 node and link in supplies configs: am65x_evm_r5_defconfig: Enable TPS62363 regulator support configs: am65x_evm_r5_defconfig: Enable AVS class 0 support arch/arm/dts/k3-am65-wakeup.dtsi | 7 + arch/arm/dts/k3-am654-r5-base-board.dts | 20 + arch/arm/mach-k3/am6_init.c | 6 + configs/am65x_evm_r5_defconfig | 2 + drivers/Makefile | 2 +- drivers/clk/clk-ti-sci.c | 5 + drivers/power/Kconfig| 9 + drivers/power/mfd/Makefile | 1 + drivers/power/mfd/k3_avs.c | 371 +++ drivers/power/regulator/Kconfig | 10 + drivers/power/regulator/Makefile | 1 + drivers/power/regulator/tps62360_regulator.c | 124 +++ include/dm/uclass-id.h | 1 + include/k3-avs.h | 28 ++ 14 files changed, 586 insertions(+), 1 deletion(-) create mode 100644 drivers/power/mfd/k3_avs.c create mode 100644 drivers/power/regulator/tps62360_regulator.c create mode 100644 include/k3-avs.h -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 01/10] power: add driver for K3 Adaptive Voltage Scaling Class 0
From: Tero Kristo
Adaptive Voltage Scaling is a technology used in TI SoCs to optimize
the operating voltage based on characterization data written to efuse
during production. Add a driver to support this feature for K3 line of
SoCs, initially for AM65x.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
drivers/Makefile | 2 +-
drivers/power/Kconfig | 9 +
drivers/power/mfd/Makefile | 1 +
drivers/power/mfd/k3_avs.c | 371 +
include/dm/uclass-id.h | 1 +
include/k3-avs.h | 28 +++
6 files changed, 411 insertions(+), 1 deletion(-)
create mode 100644 drivers/power/mfd/k3_avs.c
create mode 100644 include/k3-avs.h
diff --git a/drivers/Makefile b/drivers/Makefile
index a4bb5e4975..4e2de903d3 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -38,7 +38,7 @@ obj-$(CONFIG_ARMADA_38X) += ddr/marvell/a38x/
obj-$(CONFIG_ARMADA_XP) += ddr/marvell/axp/
obj-$(CONFIG_$(SPL_)ALTERA_SDRAM) += ddr/altera/
obj-$(CONFIG_ARCH_IMX8M) += ddr/imx/imx8m/
-obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/
+obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/ power/mfd/
obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/
obj-$(CONFIG_SPL_POWER_DOMAIN) += power/domain/
obj-$(CONFIG_SPL_DM_RESET) += reset/
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 9495dca33b..8e1c957e22 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -364,4 +364,13 @@ config TWL4030_POWER
The TWL4030 in a combination audio CODEC/power management with
GPIO and it is commonly used with the OMAP3 family of processors
+config K3_AVS0
+ depends on ARCH_K3 && SPL_DM_REGULATOR
+ bool "AVS class 0 support for K3 devices"
+ help
+ K3 devices have the optimized voltage values for the main voltage
+ domains stored in efuse within the VTM IP. This driver reads the
+ optimized voltage from the efuse, so that it can be programmed
+ to the PMIC on board.
+
endmenu
diff --git a/drivers/power/mfd/Makefile b/drivers/power/mfd/Makefile
index a8eb7f81e7..54caed3f9c 100644
--- a/drivers/power/mfd/Makefile
+++ b/drivers/power/mfd/Makefile
@@ -6,3 +6,4 @@
obj-$(CONFIG_POWER_PMIC_MAX77693) += pmic_max77693.o
obj-$(CONFIG_POWER_MUIC_MAX77693) += muic_max77693.o
obj-$(CONFIG_POWER_FG_MAX77693) += fg_max77693.o
+obj-$(CONFIG_K3_AVS0) += k3_avs.o
diff --git a/drivers/power/mfd/k3_avs.c b/drivers/power/mfd/k3_avs.c
new file mode 100644
index 00..b3b704517a
--- /dev/null
+++ b/drivers/power/mfd/k3_avs.c
@@ -0,0 +1,371 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Texas Instruments' K3 Clas 0 Adaptive Voltage Scaling driver
+ *
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ * Tero Kristo
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define AM6_VTM_DEVINFO(i) (priv->base + 0x100 + 0x20 * (i))
+#define AM6_VTM_OPPVID_VD(i) (priv->base + 0x104 + 0x20 * (i))
+
+#define AM6_VTM_AVS0_SUPPORTED BIT(12)
+
+#define AM6_VTM_OPP_SHIFT(opp) (8 * (opp))
+#define AM6_VTM_OPP_MASK 0xff
+
+#define VD_FLAG_INIT_DONE BIT(0)
+
+struct k3_avs_privdata {
+ void *base;
+ struct vd_config *vd_config;
+};
+
+struct opp {
+ u32 freq;
+ u32 volt;
+};
+
+struct vd_data {
+ int id;
+ u8 opp;
+ u8 flags;
+ int dev_id;
+ int clk_id;
+ struct opp opps[NUM_OPPS];
+ struct udevice *supply;
+};
+
+struct vd_config {
+ struct vd_data *vds;
+ u32 (*efuse_xlate)(struct k3_avs_privdata *priv, int idx, int opp);
+};
+
+static struct k3_avs_privdata *k3_avs_priv;
+
+/**
+ * am6_efuse_voltage: read efuse voltage from VTM
+ * @priv: driver private data
+ * @idx: VD to read efuse for
+ * @opp: opp id to read
+ *
+ * Reads efuse value for the specified OPP, and converts the register
+ * value to a voltage. Returns the voltage in uV, or 0 if nominal voltage
+ * should be used.
+ *
+ * Efuse val to volt conversion logic:
+ *
+ * val > 171 volt increments in 20mV steps with base 171 => 1.66V
+ * val between 115 to 11 increments in 10mV steps with base 115 => 1.1V
+ * val between 15 to 115 increments in 5mV steps with base 15 => .6V
+ * val between 1 to 15 increments in 20mv steps with base 0 => .3V
+ * val 0 is invalid
+ */
+static u32 am6_efuse_xlate(struct k3_avs_privdata *priv, int idx, int opp)
+{
+ u32 val = readl(AM6_VTM_OPPVID_VD(idx));
+
+ val >>= AM6_VTM_OPP_SHIFT(opp);
+ val &= AM6_VTM_OPP_MASK;
+
+ if (!val)
+ return 0;
+
+ if (val > 171)
+ return 166 + 2 * (val - 171);
+
+ if (val > 115)
+ return 110 + 1 * (val - 115);
+
+ if (val > 15)
+ return 60 + 5000 * (val - 15);
+
+ return 30 + 2 * val;
+}
+
+static int k3_avs_program_voltage(struct k3_avs_privd
[U-Boot] [PATCH 03/10] clk: clk-ti-sci: Notify AVS driver upon setting clock rate
Notify AVS driver upon setting clock rate so that voltage
is changed accordingly.
Signed-off-by: Keerthy
---
drivers/clk/clk-ti-sci.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/clk-ti-sci.c b/drivers/clk/clk-ti-sci.c
index c25415d410..478349f22f 100644
--- a/drivers/clk/clk-ti-sci.c
+++ b/drivers/clk/clk-ti-sci.c
@@ -13,6 +13,7 @@
#include
#include
#include
+#include
/**
* struct ti_sci_clk_data - clock controller information structure
@@ -101,6 +102,10 @@ static ulong ti_sci_clk_set_rate(struct clk *clk, ulong
rate)
debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
+#ifdef CONFIG_K3_AVS0
+ k3_avs_notify_freq(clk->id, clk->data, rate);
+#endif
+
/* Ask for exact frequency by using same value for min/target/max */
ret = cops->set_freq(sci, clk->id, clk->data, rate, rate, rate);
if (ret)
--
2.17.1
___
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[U-Boot] [PATCH 04/10] power: regulator: tps6236x: add support for tps6236x regulators
From: Tero Kristo
TPS6236x is a family of step down DC-DC converters optimized for battery
powered portable applications for a small solution size. Add a regulator
driver for supporting these devices.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
drivers/power/regulator/Kconfig | 10 ++
drivers/power/regulator/Makefile | 1 +
drivers/power/regulator/tps62360_regulator.c | 123 +++
3 files changed, 134 insertions(+)
create mode 100644 drivers/power/regulator/tps62360_regulator.c
diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index 9aa00fad42..56d68ee40e 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -273,6 +273,16 @@ config DM_REGULATOR_TPS65910
regulator types of the TPS65910 (BUCK, BOOST and LDO). It implements
the get/set api for value and enable.
+config DM_REGULATOR_TPS62360
+ bool "Enable driver for TPS6236x Power Regulator"
+ depends on DM_REGULATOR
+ help
+ The TPS6236X DC/DC step down converter provides a single output
+ power line peaking at 3A current. This driver supports all four
+ variants of the chip (TPS62360, TPS62361, TPS62362, TPS62363). It
+ implements the get/set api for value only, as the power line is
+ always on.
+
config DM_REGULATOR_STPMIC1
bool "Enable driver for STPMIC1 regulators"
depends on DM_REGULATOR && PMIC_STPMIC1
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
index 6a3d4bbee4..9198841b4f 100644
--- a/drivers/power/regulator/Makefile
+++ b/drivers/power/regulator/Makefile
@@ -26,4 +26,5 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP873X) += lp873x_regulator.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP87565) += lp87565_regulator.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_STM32_VREFBUF) += stm32-vrefbuf.o
obj-$(CONFIG_DM_REGULATOR_TPS65910) += tps65910_regulator.o
+obj-$(CONFIG_DM_REGULATOR_TPS62360) += tps62360_regulator.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMIC1) += stpmic1.o
diff --git a/drivers/power/regulator/tps62360_regulator.c
b/drivers/power/regulator/tps62360_regulator.c
new file mode 100644
index 00..3b123f503c
--- /dev/null
+++ b/drivers/power/regulator/tps62360_regulator.c
@@ -0,0 +1,123 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ * Tero Kristo
+ */
+
+#include
+#include
+#include
+#include
+
+#define TPS62360_REG_SET0 0
+
+#define TPS62360_I2C_CHIP 0x60
+
+#define TPS62360_VSEL_STEPSIZE 1 /* In uV */
+
+struct tps62360_regulator_config {
+ u32 vmin;
+ u32 vmax;
+};
+
+struct tps62360_regulator_pdata {
+ u8 vsel_offset;
+ struct udevice *i2c;
+ struct tps62360_regulator_config *config;
+};
+
+/*
+ * TPS62362/TPS62363 are just re-using these values for now, their preset
+ * voltage values are just different compared to TPS62360/TPS62361.
+ */
+static struct tps62360_regulator_config tps62360_data = {
+ .vmin = 77,
+ .vmax = 140,
+};
+
+static struct tps62360_regulator_config tps62361_data = {
+ .vmin = 50,
+ .vmax = 177,
+};
+
+static int tps62360_regulator_set_value(struct udevice *dev, int uV)
+{
+ struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
+ u8 regval;
+
+ if (uV < pdata->config->vmin || uV > pdata->config->vmax)
+ return -EINVAL;
+
+ uV -= pdata->config->vmin;
+
+ uV = DIV_ROUND_UP(uV, TPS62360_VSEL_STEPSIZE);
+
+ if (uV > U8_MAX)
+ return -EINVAL;
+
+ regval = (u8)uV;
+
+ return dm_i2c_write(pdata->i2c, TPS62360_REG_SET0 + pdata->vsel_offset,
+ ®val, 1);
+}
+
+static int tps62360_regulator_get_value(struct udevice *dev)
+{
+ u8 regval;
+ int ret;
+ struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
+
+ ret = dm_i2c_read(pdata->i2c, TPS62360_REG_SET0 + pdata->vsel_offset,
+ ®val, 1);
+ if (ret) {
+ dev_err(dev, "i2c read failed: %d\n", ret);
+ return ret;
+ }
+
+ return (u32)regval * TPS62360_VSEL_STEPSIZE + pdata->config->vmin;
+}
+
+static int tps62360_regulator_ofdata_to_platdata(struct udevice *dev)
+{
+ struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
+ u8 vsel0;
+ u8 vsel1;
+ int ret;
+
+ pdata->config = (void *)dev_get_driver_data(dev);
+
+ vsel0 = dev_read_bool(dev, "ti,vsel0-state-high");
+ vsel1 = dev_read_bool(dev, "ti,vsel1-state-high");
+
+ pdata->vsel_offset = vsel0 + vsel1 * 2;
+
+ ret = i2c_get_chip(dev->parent, TPS62360_I2C_CHIP, 1, &pdata->i2c);
+ if (ret) {
+ dev_err(dev, "i2c dev get failed.\n&qu
[U-Boot] [PATCH 02/10] arm: mach-k3: am6_init: Initialize AVS class 0
Initialize AVS class 0 so that mpu voltage rail is
programmed to the AVS class 0 compensated value.
Signed-off-by: Keerthy
---
arch/arm/mach-k3/am6_init.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c
index 0b564f7bd1..86395a72b9 100644
--- a/arch/arm/mach-k3/am6_init.c
+++ b/arch/arm/mach-k3/am6_init.c
@@ -116,6 +116,12 @@ void board_init_f(ulong dummy)
/* Perform EEPROM-based board detection */
do_board_detect();
+#if defined(CONFIG_CPU_V7R) && defined(CONFIG_K3_AVS0)
+ ret = uclass_get_device(UCLASS_AVS, 0, &dev);
+ if (ret)
+ printf("AVS init failed: %d\n", ret);
+#endif
+
#ifdef CONFIG_K3_AM654_DDRSS
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret)
--
2.17.1
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[U-Boot] [PATCH 07/10] arm: dts: k3-am654-r5-base-board: add supply rail for MPU
From: Tero Kristo
MPU voltage on AM65x-evm is controlled via the TPS62363 chip attached
to i2c0 bus. Add device node for this so that it can be controlled via
a regulator driver.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
arch/arm/dts/k3-am654-r5-base-board.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index a2c6c5a49d..d6bd5def59 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -212,4 +212,17 @@
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <40>;
u-boot,dm-spl;
+
+ vdd_mpu: tps62363@60 {
+ compatible = "ti,tps62363";
+ reg = <0x60>;
+ regulator-name = "VDD_MPU";
+ regulator-min-microvolt = <50>;
+ regulator-max-microvolt = <177>;
+ regulator-always-on;
+ regulator-boot-on;
+ ti,vsel0-state-high;
+ ti,vsel1-state-high;
+ u-boot,dm-spl;
+ };
};
--
2.17.1
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[U-Boot] [PATCH 05/10] arm: dts: k3-am65: Add VTM node
From: Tero Kristo
Add VTM node for voltage and thermal management. For u-boot, this is needed
for supporting AVS class 0, as the efuse values for the OPPs are stored
under the VTM.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
arch/arm/dts/k3-am65-wakeup.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/k3-am65-wakeup.dtsi b/arch/arm/dts/k3-am65-wakeup.dtsi
index 2676d6035b..5d050c6fd8 100644
--- a/arch/arm/dts/k3-am65-wakeup.dtsi
+++ b/arch/arm/dts/k3-am65-wakeup.dtsi
@@ -62,4 +62,11 @@
clocks = <&k3_clks 115 1>;
power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
};
+
+ wkup_vtm0: wkup_vtm@4205 {
+ compatible = "ti,am654-vtm", "ti,am654-avs";
+ reg = <0x4205 0x25c>;
+ power-domains = <&k3_pds 80>;
+ #thermal-sensor-cells = <1>;
+ };
};
--
2.17.1
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[U-Boot] [PATCH 06/10] arm: dts: k3-am654-r5-base-board: enable wkup_i2c0 driver for spl
From: Tero Kristo Enable wkup_i2c0 as this is needed for voltage control. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- arch/arm/dts/k3-am654-r5-base-board.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index e31ed4fe64..a2c6c5a49d 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -211,4 +211,5 @@ pinctrl-names = "default"; pinctrl-0 = <&wkup_i2c0_pins_default>; clock-frequency = <40>; + u-boot,dm-spl; }; -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 10/10] configs: am65x_evm_r5_defconfig: Enable AVS class 0 support
From: Tero Kristo Enable AVS class 0 support for the R5 SPL bootloader. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- configs/am65x_evm_r5_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index a721b24ba4..4f122808de 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -99,3 +99,4 @@ CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_OMAP_TIMER=y CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 +CONFIG_K3_AVS0=y -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 08/10] arm: dts: k3-am654-r5-base-board: enable wkup_vtm0 node and link in supplies
From: Tero Kristo
Link the vdd-supplies for the voltage domains under the VTM node. Also,
enable the node under SPL. This will enable the AVS class 0 support on
am65x-evm board.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
arch/arm/dts/k3-am654-r5-base-board.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index d6bd5def59..0d924d0aae 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -131,6 +131,12 @@
power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
};
+&wkup_vtm0 {
+ vdd-supply-3 = <&vdd_mpu>;
+ vdd-supply-4 = <&vdd_mpu>;
+ u-boot,dm-spl;
+};
+
&wkup_pmx0 {
u-boot,dm-spl;
wkup_uart0_pins_default: wkup_uart0_pins_default {
--
2.17.1
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[U-Boot] [PATCH 09/10] configs: am65x_evm_r5_defconfig: Enable TPS62363 regulator support
From: Tero Kristo TPS62363 is used to control the MPU_VDD voltage, so enable the driver for this. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- configs/am65x_evm_r5_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index d0619e9b7a..a721b24ba4 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -84,6 +84,7 @@ CONFIG_DM_REGULATOR=y CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPL_DM_REGULATOR_GPIO=y +CONFIG_DM_REGULATOR_TPS62360=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_K3_SYSTEM_CONTROLLER=y -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 01/10] power: add driver for K3 Adaptive Voltage Scaling Class 0
On 15/10/19 12:27 PM, Lokesh Vutla wrote:
[..snip..]
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index f431f3bf29..605b52905e 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -31,6 +31,7 @@ enum uclass_id {
UCLASS_ADC, /* Analog-to-digital converter */
UCLASS_AHCI,/* SATA disk controller */
UCLASS_AUDIO_CODEC, /* Audio codec with control and data path */
+ UCLASS_AVS, /* Adaptive voltage scaling */
In general there should be sandbox tests written for adding any such new UCLASS.
Tero,
This is not a generic UCLASS driver. This is a K3 specific driver. So
should this be really introducing a new UCLASS?
- Keerthy
Thanks and regards,
Lokesh
UCLASS_AXI, /* AXI bus */
UCLASS_BLK, /* Block device */
UCLASS_BOARD, /* Device information from hardware */
diff --git a/include/k3-avs.h b/include/k3-avs.h
new file mode 100644
index 00..9867481617
--- /dev/null
+++ b/include/k3-avs.h
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Texas Instruments' K3 Adaptive Voltage Scaling driver
+ *
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ * Tero Kristo
+ *
+ */
+
+#ifndef _K3_AVS0_
+#define _K3_AVS0_
+
+#define AM6_VDD_WKUP 0
+#define AM6_VDD_MCU1
+#define AM6_VDD_CORE 2
+#define AM6_VDD_MPU0 3
+#define AM6_VDD_MPU1 4
+
+#define NUM_OPPS 4
+
+#define AM6_OPP_NOM1
+#define AM6_OPP_OD 2
+#define AM6_OPP_TURBO 3
+
+int k3_avs_set_opp(struct udevice *dev, int vdd_id, int opp_id);
+int k3_avs_notify_freq(int dev_id, int clk_id, u32 freq);
+
+#endif
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[U-Boot] [PATCH v2 01/10] misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0
From: Tero Kristo
Adaptive Voltage Scaling is a technology used in TI SoCs to optimize
the operating voltage based on characterization data written to efuse
during production. Add a driver to support this feature for K3 line of
SoCs, initially for AM65x.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
Changes in v2:
* Avoided creation of new UCLASS & placed the driver under misc.
drivers/misc/Kconfig | 9 ++
drivers/misc/Makefile | 1 +
drivers/misc/k3_avs.c | 366 ++
include/k3-avs.h | 28
4 files changed, 404 insertions(+)
create mode 100644 drivers/misc/k3_avs.c
create mode 100644 include/k3-avs.h
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index ba50893b43..f6147238a4 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -412,4 +412,13 @@ config IHS_FPGA
by the devices. This driver supports both CON and CPU variants of the
devices, depending on the device tree entry.
+config K3_AVS0
+ depends on ARCH_K3 && SPL_DM_REGULATOR
+ bool "AVS class 0 support for K3 devices"
+ help
+ K3 devices have the optimized voltage values for the main voltage
+ domains stored in efuse within the VTM IP. This driver reads the
+ optimized voltage from the efuse, so that it can be programmed
+ to the PMIC on board.
+
endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 0001d105ba..74d01ef392 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -65,3 +65,4 @@ obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress_config.o
obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
obj-$(CONFIG_JZ4780_EFUSE) += jz4780_efuse.o
+obj-$(CONFIG_K3_AVS0) += k3_avs.o
diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c
new file mode 100644
index 00..dd7fc3d585
--- /dev/null
+++ b/drivers/misc/k3_avs.c
@@ -0,0 +1,366 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Texas Instruments' K3 Clas 0 Adaptive Voltage Scaling driver
+ *
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ * Tero Kristo
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define AM6_VTM_DEVINFO(i) (priv->base + 0x100 + 0x20 * (i))
+#define AM6_VTM_OPPVID_VD(i) (priv->base + 0x104 + 0x20 * (i))
+
+#define AM6_VTM_AVS0_SUPPORTED BIT(12)
+
+#define AM6_VTM_OPP_SHIFT(opp) (8 * (opp))
+#define AM6_VTM_OPP_MASK 0xff
+
+#define VD_FLAG_INIT_DONE BIT(0)
+
+struct k3_avs_privdata {
+ void *base;
+ struct vd_config *vd_config;
+};
+
+struct opp {
+ u32 freq;
+ u32 volt;
+};
+
+struct vd_data {
+ int id;
+ u8 opp;
+ u8 flags;
+ int dev_id;
+ int clk_id;
+ struct opp opps[NUM_OPPS];
+ struct udevice *supply;
+};
+
+struct vd_config {
+ struct vd_data *vds;
+ u32 (*efuse_xlate)(struct k3_avs_privdata *priv, int idx, int opp);
+};
+
+static struct k3_avs_privdata *k3_avs_priv;
+
+/**
+ * am6_efuse_voltage: read efuse voltage from VTM
+ * @priv: driver private data
+ * @idx: VD to read efuse for
+ * @opp: opp id to read
+ *
+ * Reads efuse value for the specified OPP, and converts the register
+ * value to a voltage. Returns the voltage in uV, or 0 if nominal voltage
+ * should be used.
+ *
+ * Efuse val to volt conversion logic:
+ *
+ * val > 171 volt increments in 20mV steps with base 171 => 1.66V
+ * val between 115 to 11 increments in 10mV steps with base 115 => 1.1V
+ * val between 15 to 115 increments in 5mV steps with base 15 => .6V
+ * val between 1 to 15 increments in 20mv steps with base 0 => .3V
+ * val 0 is invalid
+ */
+static u32 am6_efuse_xlate(struct k3_avs_privdata *priv, int idx, int opp)
+{
+ u32 val = readl(AM6_VTM_OPPVID_VD(idx));
+
+ val >>= AM6_VTM_OPP_SHIFT(opp);
+ val &= AM6_VTM_OPP_MASK;
+
+ if (!val)
+ return 0;
+
+ if (val > 171)
+ return 166 + 2 * (val - 171);
+
+ if (val > 115)
+ return 110 + 1 * (val - 115);
+
+ if (val > 15)
+ return 60 + 5000 * (val - 15);
+
+ return 30 + 2 * val;
+}
+
+static int k3_avs_program_voltage(struct k3_avs_privdata *priv,
+ struct vd_data *vd,
+ int opp_id)
+{
+ u32 volt = vd->opps[opp_id].volt;
+ struct vd_data *vd2;
+
+ if (!vd->supply)
+ return -ENODEV;
+
+ vd->opp = opp_id;
+ vd->flags |= VD_FLAG_INIT_DONE;
+
+ /* Take care of ganged rails and pick the Max amongst them*/
+ for (vd2 = priv->vd_config->vds; vd2->id >= 0; vd2++) {
+ if (vd == vd2)
+ continue;
+
+ if (vd2->supply != vd->supply)
+ co
[U-Boot] [PATCH v2 00/10] misc: Add AVS class 0 support for AM6
Adaptive Voltage Scaling is a technology used in TI SoCs to optimize the operating voltage based on characterization data written to efuse during production. Add support for Adaptive Voltage scaling class 0 support for AM6 family of devices. Adaptive voltage scaling class 0 implies that optimized voltage values for a particular OPP of a particular voltage domain are read from Efuse and programmed on the pmic/regulator. Tested on AM654-EVM for MPU @800 MHz. Changes in v2: * Avoided creation of new uclass. AVS driver is now under misc. Keerthy (2): arm: mach-k3: am6_init: Initialize AVS class 0 clk: clk-ti-sci: Notify AVS driver upon setting clock rate Tero Kristo (8): misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0 power: regulator: tps6236x: add support for tps6236x regulators arm: dts: k3-am65: Add VTM node arm: dts: k3-am654-r5-base-board: enable wkup_i2c0 driver for spl arm: dts: k3-am654-r5-base-board: add supply rail for MPU arm: dts: k3-am654-r5-base-board: enable wkup_vtm0 node and link in supplies configs: am65x_evm_r5_defconfig: Enable TPS62363 regulator support configs: am65x_evm_r5_defconfig: Enable AVS class 0 support arch/arm/dts/k3-am65-wakeup.dtsi | 7 + arch/arm/dts/k3-am654-r5-base-board.dts | 20 + arch/arm/mach-k3/am6_init.c | 7 + configs/am65x_evm_r5_defconfig | 2 + drivers/clk/clk-ti-sci.c | 5 + drivers/misc/Kconfig | 9 + drivers/misc/Makefile| 1 + drivers/misc/k3_avs.c| 366 +++ drivers/power/regulator/Kconfig | 10 + drivers/power/regulator/Makefile | 1 + drivers/power/regulator/tps62360_regulator.c | 123 +++ include/k3-avs.h | 28 ++ 12 files changed, 579 insertions(+) create mode 100644 drivers/misc/k3_avs.c create mode 100644 drivers/power/regulator/tps62360_regulator.c create mode 100644 include/k3-avs.h -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 03/10] clk: clk-ti-sci: Notify AVS driver upon setting clock rate
Notify AVS driver upon setting clock rate so that voltage
is changed accordingly.
Signed-off-by: Keerthy
---
drivers/clk/clk-ti-sci.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/clk-ti-sci.c b/drivers/clk/clk-ti-sci.c
index c25415d410..478349f22f 100644
--- a/drivers/clk/clk-ti-sci.c
+++ b/drivers/clk/clk-ti-sci.c
@@ -13,6 +13,7 @@
#include
#include
#include
+#include
/**
* struct ti_sci_clk_data - clock controller information structure
@@ -101,6 +102,10 @@ static ulong ti_sci_clk_set_rate(struct clk *clk, ulong
rate)
debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
+#ifdef CONFIG_K3_AVS0
+ k3_avs_notify_freq(clk->id, clk->data, rate);
+#endif
+
/* Ask for exact frequency by using same value for min/target/max */
ret = cops->set_freq(sci, clk->id, clk->data, rate, rate, rate);
if (ret)
--
2.17.1
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[U-Boot] [PATCH v2 05/10] arm: dts: k3-am65: Add VTM node
From: Tero Kristo
Add VTM node for voltage and thermal management. For u-boot, this is needed
for supporting AVS class 0, as the efuse values for the OPPs are stored
under the VTM.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
arch/arm/dts/k3-am65-wakeup.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/k3-am65-wakeup.dtsi b/arch/arm/dts/k3-am65-wakeup.dtsi
index 2676d6035b..5d050c6fd8 100644
--- a/arch/arm/dts/k3-am65-wakeup.dtsi
+++ b/arch/arm/dts/k3-am65-wakeup.dtsi
@@ -62,4 +62,11 @@
clocks = <&k3_clks 115 1>;
power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
};
+
+ wkup_vtm0: wkup_vtm@4205 {
+ compatible = "ti,am654-vtm", "ti,am654-avs";
+ reg = <0x4205 0x25c>;
+ power-domains = <&k3_pds 80>;
+ #thermal-sensor-cells = <1>;
+ };
};
--
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[U-Boot] [PATCH v2 08/10] arm: dts: k3-am654-r5-base-board: enable wkup_vtm0 node and link in supplies
From: Tero Kristo
Link the vdd-supplies for the voltage domains under the VTM node. Also,
enable the node under SPL. This will enable the AVS class 0 support on
am65x-evm board.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
arch/arm/dts/k3-am654-r5-base-board.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index d6bd5def59..0d924d0aae 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -131,6 +131,12 @@
power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
};
+&wkup_vtm0 {
+ vdd-supply-3 = <&vdd_mpu>;
+ vdd-supply-4 = <&vdd_mpu>;
+ u-boot,dm-spl;
+};
+
&wkup_pmx0 {
u-boot,dm-spl;
wkup_uart0_pins_default: wkup_uart0_pins_default {
--
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[U-Boot] [PATCH v2 09/10] configs: am65x_evm_r5_defconfig: Enable TPS62363 regulator support
From: Tero Kristo TPS62363 is used to control the MPU_VDD voltage, so enable the driver for this. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- configs/am65x_evm_r5_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index d0619e9b7a..a721b24ba4 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -84,6 +84,7 @@ CONFIG_DM_REGULATOR=y CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPL_DM_REGULATOR_GPIO=y +CONFIG_DM_REGULATOR_TPS62360=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_K3_SYSTEM_CONTROLLER=y -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 02/10] arm: mach-k3: am6_init: Initialize AVS class 0
Initialize AVS class 0 so that mpu voltage rail is
programmed to the AVS class 0 compensated value.
Signed-off-by: Keerthy
---
Changes in v2:
* Now that AVS is misc device do not go by default ID 0
and rely on uclass_get_device_by_driver to get the right device.
arch/arm/mach-k3/am6_init.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c
index 0b564f7bd1..99edcd9a24 100644
--- a/arch/arm/mach-k3/am6_init.c
+++ b/arch/arm/mach-k3/am6_init.c
@@ -116,6 +116,13 @@ void board_init_f(ulong dummy)
/* Perform EEPROM-based board detection */
do_board_detect();
+#if defined(CONFIG_CPU_V7R) && defined(CONFIG_K3_AVS0)
+ ret = uclass_get_device_by_driver(UCLASS_MISC, DM_GET_DRIVER(k3_avs),
+ &dev);
+ if (ret)
+ printf("AVS init failed: %d\n", ret);
+#endif
+
#ifdef CONFIG_K3_AM654_DDRSS
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret)
--
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[U-Boot] [PATCH v2 04/10] power: regulator: tps6236x: add support for tps6236x regulators
From: Tero Kristo
TPS6236x is a family of step down DC-DC converters optimized for battery
powered portable applications for a small solution size. Add a regulator
driver for supporting these devices.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
drivers/power/regulator/Kconfig | 10 ++
drivers/power/regulator/Makefile | 1 +
drivers/power/regulator/tps62360_regulator.c | 123 +++
3 files changed, 134 insertions(+)
create mode 100644 drivers/power/regulator/tps62360_regulator.c
diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index 9aa00fad42..56d68ee40e 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -273,6 +273,16 @@ config DM_REGULATOR_TPS65910
regulator types of the TPS65910 (BUCK, BOOST and LDO). It implements
the get/set api for value and enable.
+config DM_REGULATOR_TPS62360
+ bool "Enable driver for TPS6236x Power Regulator"
+ depends on DM_REGULATOR
+ help
+ The TPS6236X DC/DC step down converter provides a single output
+ power line peaking at 3A current. This driver supports all four
+ variants of the chip (TPS62360, TPS62361, TPS62362, TPS62363). It
+ implements the get/set api for value only, as the power line is
+ always on.
+
config DM_REGULATOR_STPMIC1
bool "Enable driver for STPMIC1 regulators"
depends on DM_REGULATOR && PMIC_STPMIC1
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
index 6a3d4bbee4..9198841b4f 100644
--- a/drivers/power/regulator/Makefile
+++ b/drivers/power/regulator/Makefile
@@ -26,4 +26,5 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP873X) += lp873x_regulator.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP87565) += lp87565_regulator.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_STM32_VREFBUF) += stm32-vrefbuf.o
obj-$(CONFIG_DM_REGULATOR_TPS65910) += tps65910_regulator.o
+obj-$(CONFIG_DM_REGULATOR_TPS62360) += tps62360_regulator.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMIC1) += stpmic1.o
diff --git a/drivers/power/regulator/tps62360_regulator.c
b/drivers/power/regulator/tps62360_regulator.c
new file mode 100644
index 00..3b123f503c
--- /dev/null
+++ b/drivers/power/regulator/tps62360_regulator.c
@@ -0,0 +1,123 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ * Tero Kristo
+ */
+
+#include
+#include
+#include
+#include
+
+#define TPS62360_REG_SET0 0
+
+#define TPS62360_I2C_CHIP 0x60
+
+#define TPS62360_VSEL_STEPSIZE 1 /* In uV */
+
+struct tps62360_regulator_config {
+ u32 vmin;
+ u32 vmax;
+};
+
+struct tps62360_regulator_pdata {
+ u8 vsel_offset;
+ struct udevice *i2c;
+ struct tps62360_regulator_config *config;
+};
+
+/*
+ * TPS62362/TPS62363 are just re-using these values for now, their preset
+ * voltage values are just different compared to TPS62360/TPS62361.
+ */
+static struct tps62360_regulator_config tps62360_data = {
+ .vmin = 77,
+ .vmax = 140,
+};
+
+static struct tps62360_regulator_config tps62361_data = {
+ .vmin = 50,
+ .vmax = 177,
+};
+
+static int tps62360_regulator_set_value(struct udevice *dev, int uV)
+{
+ struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
+ u8 regval;
+
+ if (uV < pdata->config->vmin || uV > pdata->config->vmax)
+ return -EINVAL;
+
+ uV -= pdata->config->vmin;
+
+ uV = DIV_ROUND_UP(uV, TPS62360_VSEL_STEPSIZE);
+
+ if (uV > U8_MAX)
+ return -EINVAL;
+
+ regval = (u8)uV;
+
+ return dm_i2c_write(pdata->i2c, TPS62360_REG_SET0 + pdata->vsel_offset,
+ ®val, 1);
+}
+
+static int tps62360_regulator_get_value(struct udevice *dev)
+{
+ u8 regval;
+ int ret;
+ struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
+
+ ret = dm_i2c_read(pdata->i2c, TPS62360_REG_SET0 + pdata->vsel_offset,
+ ®val, 1);
+ if (ret) {
+ dev_err(dev, "i2c read failed: %d\n", ret);
+ return ret;
+ }
+
+ return (u32)regval * TPS62360_VSEL_STEPSIZE + pdata->config->vmin;
+}
+
+static int tps62360_regulator_ofdata_to_platdata(struct udevice *dev)
+{
+ struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
+ u8 vsel0;
+ u8 vsel1;
+ int ret;
+
+ pdata->config = (void *)dev_get_driver_data(dev);
+
+ vsel0 = dev_read_bool(dev, "ti,vsel0-state-high");
+ vsel1 = dev_read_bool(dev, "ti,vsel1-state-high");
+
+ pdata->vsel_offset = vsel0 + vsel1 * 2;
+
+ ret = i2c_get_chip(dev->parent, TPS62360_I2C_CHIP, 1, &pdata->i2c);
+ if (ret) {
+ dev_err(dev, "i2c dev get failed.\n&qu
[U-Boot] [PATCH v2 10/10] configs: am65x_evm_r5_defconfig: Enable AVS class 0 support
From: Tero Kristo Enable AVS class 0 support for the R5 SPL bootloader. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- configs/am65x_evm_r5_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index a721b24ba4..4f122808de 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -99,3 +99,4 @@ CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_OMAP_TIMER=y CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 +CONFIG_K3_AVS0=y -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 06/10] arm: dts: k3-am654-r5-base-board: enable wkup_i2c0 driver for spl
From: Tero Kristo Enable wkup_i2c0 as this is needed for voltage control. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- arch/arm/dts/k3-am654-r5-base-board.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index e31ed4fe64..a2c6c5a49d 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -211,4 +211,5 @@ pinctrl-names = "default"; pinctrl-0 = <&wkup_i2c0_pins_default>; clock-frequency = <40>; + u-boot,dm-spl; }; -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 07/10] arm: dts: k3-am654-r5-base-board: add supply rail for MPU
From: Tero Kristo
MPU voltage on AM65x-evm is controlled via the TPS62363 chip attached
to i2c0 bus. Add device node for this so that it can be controlled via
a regulator driver.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
arch/arm/dts/k3-am654-r5-base-board.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index a2c6c5a49d..d6bd5def59 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -212,4 +212,17 @@
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <40>;
u-boot,dm-spl;
+
+ vdd_mpu: tps62363@60 {
+ compatible = "ti,tps62363";
+ reg = <0x60>;
+ regulator-name = "VDD_MPU";
+ regulator-min-microvolt = <50>;
+ regulator-max-microvolt = <177>;
+ regulator-always-on;
+ regulator-boot-on;
+ ti,vsel0-state-high;
+ ti,vsel1-state-high;
+ u-boot,dm-spl;
+ };
};
--
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Re: [U-Boot] [PATCH v2 05/10] arm: dts: k3-am65: Add VTM node
On 24/10/19 12:12 PM, Lokesh Vutla wrote:
On 21/10/19 2:55 PM, Keerthy wrote:
From: Tero Kristo
Add VTM node for voltage and thermal management. For u-boot, this is needed
for supporting AVS class 0, as the efuse values for the OPPs are stored
under the VTM.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
arch/arm/dts/k3-am65-wakeup.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/k3-am65-wakeup.dtsi b/arch/arm/dts/k3-am65-wakeup.dtsi
index 2676d6035b..5d050c6fd8 100644
--- a/arch/arm/dts/k3-am65-wakeup.dtsi
+++ b/arch/arm/dts/k3-am65-wakeup.dtsi
@@ -62,4 +62,11 @@
clocks = <&k3_clks 115 1>;
power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
};
+
+ wkup_vtm0: wkup_vtm@4205 {
+ compatible = "ti,am654-vtm", "ti,am654-avs";
+ reg = <0x4205 0x25c>;
+ power-domains = <&k3_pds 80>;
+ #thermal-sensor-cells = <1>;
+ };
Is this going to be used in kernel? If not can you move this to r5-base board?
This could be potentially used for thermal in kernel. As of now this is
not. So yes i will move this to r5-base board.
Thanks,
Keerthy
Thanks and regards,
Lokesh
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[U-Boot] [PATCH] gpio: da8xx_gpio: Fix the _gpio_direction_output function
_gpio_direction_output function currently calls gpio_set_value
with the wrong gpio number. gpio_set_value in the uclass driver
expects a different gpio number and the _gpio_direction_output
is currently providing the number specific to the bank.
Hence fix it by calling the _gpio_set_value function instead.
Reported-by: Faiz Abbas
Fixes: 8e51c0f254 ("dm: gpio: Add DM compatibility to GPIO driver for Davinci")
Signed-off-by: Keerthy
---
drivers/gpio/da8xx_gpio.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c
index 0deb034504..86203307db 100644
--- a/drivers/gpio/da8xx_gpio.c
+++ b/drivers/gpio/da8xx_gpio.c
@@ -342,13 +342,6 @@ int gpio_free(unsigned int gpio)
}
#endif
-static int _gpio_direction_output(struct davinci_gpio *bank, unsigned int
gpio, int value)
-{
- clrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));
- gpio_set_value(gpio, value);
- return 0;
-}
-
static int _gpio_direction_input(struct davinci_gpio *bank, unsigned int gpio)
{
setbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));
@@ -377,6 +370,13 @@ static int _gpio_get_dir(struct davinci_gpio *bank,
unsigned int gpio)
return in_le32(&bank->dir) & (1U << GPIO_BIT(gpio));
}
+static int _gpio_direction_output(struct davinci_gpio *bank, unsigned int gpio,
+ int value)
+{
+ clrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));
+ _gpio_set_value(bank, gpio, value);
+ return 0;
+}
#ifndef CONFIG_DM_GPIO
void gpio_info(void)
--
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[U-Boot] [PATCH v3 01/18] misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0
From: Tero Kristo
Adaptive Voltage Scaling is a technology used in TI SoCs to optimize
the operating voltage based on characterization data written to efuse
during production. Add a driver to support this feature for K3 line of
SoCs, initially for AM65x.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
Changes in v3:
* No change
Changes in v2:
* Moved under drivers/misc.
drivers/misc/Kconfig | 9 ++
drivers/misc/Makefile | 1 +
drivers/misc/k3_avs.c | 366 ++
include/k3-avs.h | 28
4 files changed, 404 insertions(+)
create mode 100644 drivers/misc/k3_avs.c
create mode 100644 include/k3-avs.h
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index ba50893b43..f6147238a4 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -412,4 +412,13 @@ config IHS_FPGA
by the devices. This driver supports both CON and CPU variants of the
devices, depending on the device tree entry.
+config K3_AVS0
+ depends on ARCH_K3 && SPL_DM_REGULATOR
+ bool "AVS class 0 support for K3 devices"
+ help
+ K3 devices have the optimized voltage values for the main voltage
+ domains stored in efuse within the VTM IP. This driver reads the
+ optimized voltage from the efuse, so that it can be programmed
+ to the PMIC on board.
+
endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 0001d105ba..74d01ef392 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -65,3 +65,4 @@ obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
obj-$(CONFIG_VEXPRESS_CONFIG) += vexpress_config.o
obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
obj-$(CONFIG_JZ4780_EFUSE) += jz4780_efuse.o
+obj-$(CONFIG_K3_AVS0) += k3_avs.o
diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c
new file mode 100644
index 00..dd7fc3d585
--- /dev/null
+++ b/drivers/misc/k3_avs.c
@@ -0,0 +1,366 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Texas Instruments' K3 Clas 0 Adaptive Voltage Scaling driver
+ *
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ * Tero Kristo
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define AM6_VTM_DEVINFO(i) (priv->base + 0x100 + 0x20 * (i))
+#define AM6_VTM_OPPVID_VD(i) (priv->base + 0x104 + 0x20 * (i))
+
+#define AM6_VTM_AVS0_SUPPORTED BIT(12)
+
+#define AM6_VTM_OPP_SHIFT(opp) (8 * (opp))
+#define AM6_VTM_OPP_MASK 0xff
+
+#define VD_FLAG_INIT_DONE BIT(0)
+
+struct k3_avs_privdata {
+ void *base;
+ struct vd_config *vd_config;
+};
+
+struct opp {
+ u32 freq;
+ u32 volt;
+};
+
+struct vd_data {
+ int id;
+ u8 opp;
+ u8 flags;
+ int dev_id;
+ int clk_id;
+ struct opp opps[NUM_OPPS];
+ struct udevice *supply;
+};
+
+struct vd_config {
+ struct vd_data *vds;
+ u32 (*efuse_xlate)(struct k3_avs_privdata *priv, int idx, int opp);
+};
+
+static struct k3_avs_privdata *k3_avs_priv;
+
+/**
+ * am6_efuse_voltage: read efuse voltage from VTM
+ * @priv: driver private data
+ * @idx: VD to read efuse for
+ * @opp: opp id to read
+ *
+ * Reads efuse value for the specified OPP, and converts the register
+ * value to a voltage. Returns the voltage in uV, or 0 if nominal voltage
+ * should be used.
+ *
+ * Efuse val to volt conversion logic:
+ *
+ * val > 171 volt increments in 20mV steps with base 171 => 1.66V
+ * val between 115 to 11 increments in 10mV steps with base 115 => 1.1V
+ * val between 15 to 115 increments in 5mV steps with base 15 => .6V
+ * val between 1 to 15 increments in 20mv steps with base 0 => .3V
+ * val 0 is invalid
+ */
+static u32 am6_efuse_xlate(struct k3_avs_privdata *priv, int idx, int opp)
+{
+ u32 val = readl(AM6_VTM_OPPVID_VD(idx));
+
+ val >>= AM6_VTM_OPP_SHIFT(opp);
+ val &= AM6_VTM_OPP_MASK;
+
+ if (!val)
+ return 0;
+
+ if (val > 171)
+ return 166 + 2 * (val - 171);
+
+ if (val > 115)
+ return 110 + 1 * (val - 115);
+
+ if (val > 15)
+ return 60 + 5000 * (val - 15);
+
+ return 30 + 2 * val;
+}
+
+static int k3_avs_program_voltage(struct k3_avs_privdata *priv,
+ struct vd_data *vd,
+ int opp_id)
+{
+ u32 volt = vd->opps[opp_id].volt;
+ struct vd_data *vd2;
+
+ if (!vd->supply)
+ return -ENODEV;
+
+ vd->opp = opp_id;
+ vd->flags |= VD_FLAG_INIT_DONE;
+
+ /* Take care of ganged rails and pick the Max amongst them*/
+ for (vd2 = priv->vd_config->vds; vd2->id >= 0; vd2++) {
+ if (vd == vd2)
+ continue;
+
+ if (vd2->supply != vd->supply)
+ continue;
+
+
[U-Boot] [PATCH v3 00/18] misc: Add AVS class 0 support for AM6
Adaptive Voltage Scaling is a technology used in TI SoCs to optimize the operating voltage based on characterization data written to efuse during production. Add support for Adaptive Voltage scaling class 0 support for AM6 family of devices. Adaptive voltage scaling class 0 implies that optimized voltage values for a particular OPP of a particular voltage domain are read from Efuse and programmed on the pmic/regulator. Tested on AM654-EVM for MPU @800 MHz. Tested on J721e-evm for MPU. The series is based on top of the branch: https://github.com/lokeshvutla/u-boot/tree/devel/j721e-full-boot Changes in v3: * Extended the support for j721e-evm. * Moved vtm node under r5-board dts. Changes in v2: * Avoided creation of new uclass. AVS driver is now under misc. Keerthy (11): clk: clk-ti-sci: Notify AVS driver upon setting clock rate misc: k3_avs: Add j721e support power: pmic: tps65941: Add support for tps65941 family of PMICs power: regulator: tps65941: add regulator support arm: mach-k3: am6_init: Initialize AVS class 0 arm: mach-k3: j721e_init: Initialize avs class 0 arm: dts: k3-am654-r5-base-board: Add VTM node arm: dts: k3-j721e-r5-common-proc-board: Add VTM node arm: dts: k3-j721e-r5-common: Add tps65941 node and dependent wkup_i2c0 node arm: dts: k3-j721e-r5-common-proc-board: Hook buck12_reg to vtm supply configs: j721e_evm_r5_defconfig: Enable AVS Class 0 & dependent configs Tero Kristo (7): misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0 power: regulator: tps6236x: add support for tps6236x regulators arm: dts: k3-am654-r5-base-board: enable wkup_i2c0 driver for spl arm: dts: k3-am654-r5-base-board: add supply rail for MPU arm: dts: k3-am654-r5-base-board: enable wkup_vtm0 node and link in supplies configs: am65x_evm_r5_defconfig: Enable TPS62363 regulator support configs: am65x_evm_r5_defconfig: Enable AVS class 0 support arch/arm/dts/k3-am654-r5-base-board.dts | 27 ++ arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 11 + .../arm/dts/k3-j721e-r5-common-proc-board.dts | 44 ++ arch/arm/mach-k3/am6_init.c | 7 + arch/arm/mach-k3/j721e_init.c | 7 + configs/am65x_evm_r5_defconfig| 2 + configs/j721e_evm_r5_defconfig| 9 + drivers/clk/clk-ti-sci.c | 5 + drivers/misc/Kconfig | 9 + drivers/misc/Makefile | 1 + drivers/misc/k3_avs.c | 388 + drivers/power/pmic/Kconfig| 7 + drivers/power/pmic/Makefile | 1 + drivers/power/pmic/tps65941.c | 83 drivers/power/regulator/Kconfig | 20 + drivers/power/regulator/Makefile | 2 + drivers/power/regulator/tps62360_regulator.c | 123 ++ drivers/power/regulator/tps65941_regulator.c | 407 ++ include/k3-avs.h | 30 ++ include/power/tps65941.h | 26 ++ 20 files changed, 1209 insertions(+) create mode 100644 drivers/misc/k3_avs.c create mode 100644 drivers/power/pmic/tps65941.c create mode 100644 drivers/power/regulator/tps62360_regulator.c create mode 100644 drivers/power/regulator/tps65941_regulator.c create mode 100644 include/k3-avs.h create mode 100644 include/power/tps65941.h -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 02/18] clk: clk-ti-sci: Notify AVS driver upon setting clock rate
Notify AVS driver upon setting clock rate so that voltage
is changed accordingly.
Signed-off-by: Keerthy
---
Changes in v3:
* No change
Changes in v2:
* No change
drivers/clk/clk-ti-sci.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/clk-ti-sci.c b/drivers/clk/clk-ti-sci.c
index c25415d410..478349f22f 100644
--- a/drivers/clk/clk-ti-sci.c
+++ b/drivers/clk/clk-ti-sci.c
@@ -13,6 +13,7 @@
#include
#include
#include
+#include
/**
* struct ti_sci_clk_data - clock controller information structure
@@ -101,6 +102,10 @@ static ulong ti_sci_clk_set_rate(struct clk *clk, ulong
rate)
debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
+#ifdef CONFIG_K3_AVS0
+ k3_avs_notify_freq(clk->id, clk->data, rate);
+#endif
+
/* Ask for exact frequency by using same value for min/target/max */
ret = cops->set_freq(sci, clk->id, clk->data, rate, rate, rate);
if (ret)
--
2.17.1
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 06/18] power: regulator: tps65941: add regulator support
The driver provides regulator set/get voltage
enable/disable functions for tps65941 family of PMICs.
Signed-off-by: Keerthy
---
Changes in v3:
* No change
Changes in v2:
* No change
drivers/power/regulator/Kconfig | 10 +
drivers/power/regulator/Makefile | 1 +
drivers/power/regulator/tps65941_regulator.c | 407 +++
3 files changed, 418 insertions(+)
create mode 100644 drivers/power/regulator/tps65941_regulator.c
diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index 56d68ee40e..25fc787a29 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -323,3 +323,13 @@ config SPL_DM_REGULATOR_LP873X
This enables implementation of driver-model regulator uclass
features for REGULATOR LP873X and the family of LP873X PMICs.
The driver implements get/set api for: value and enable in SPL.
+
+config DM_REGULATOR_TPS65941
+ bool "Enable driver for TPS65941 PMIC regulators"
+depends on PMIC_TPS65941
+ help
+ This enables implementation of driver-model regulator uclass
+ features for REGULATOR TPS65941 and the family of TPS65941 PMICs.
+ TPS65941 series of PMICs have 5 single phase BUCKs that can also
+ be configured in multi phase modes & 4 LDOs. The driver implements
+ get/set api for value and enable.
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
index 9198841b4f..b611c901ba 100644
--- a/drivers/power/regulator/Makefile
+++ b/drivers/power/regulator/Makefile
@@ -28,3 +28,4 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_STM32_VREFBUF) +=
stm32-vrefbuf.o
obj-$(CONFIG_DM_REGULATOR_TPS65910) += tps65910_regulator.o
obj-$(CONFIG_DM_REGULATOR_TPS62360) += tps62360_regulator.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMIC1) += stpmic1.o
+obj-$(CONFIG_DM_REGULATOR_TPS65941) += tps65941_regulator.o
diff --git a/drivers/power/regulator/tps65941_regulator.c
b/drivers/power/regulator/tps65941_regulator.c
new file mode 100644
index 00..a00ef58129
--- /dev/null
+++ b/drivers/power/regulator/tps65941_regulator.c
@@ -0,0 +1,407 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019
+ * Texas Instruments Incorporated,
+ *
+ * Keerthy
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static const char tps65941_buck_ctrl[TPS65941_BUCK_NUM] = {0x4, 0x6, 0x8, 0xA,
+ 0xC};
+static const char tps65941_buck_vout[TPS65941_BUCK_NUM] = {0xE, 0x10, 0x12,
+ 0x14, 0x16};
+static const char tps65941_ldo_ctrl[TPS65941_BUCK_NUM] = {0x1D, 0x1E, 0x1F,
+ 0x20};
+static const char tps65941_ldo_vout[TPS65941_BUCK_NUM] = {0x23, 0x24, 0x25,
+ 0x26};
+
+static int tps65941_buck_enable(struct udevice *dev, int op, bool *enable)
+{
+ int ret;
+ unsigned int adr;
+ struct dm_regulator_uclass_platdata *uc_pdata;
+
+ uc_pdata = dev_get_uclass_platdata(dev);
+ adr = uc_pdata->ctrl_reg;
+
+ ret = pmic_reg_read(dev->parent, adr);
+ if (ret < 0)
+ return ret;
+
+ if (op == PMIC_OP_GET) {
+ ret &= TPS65941_BUCK_MODE_MASK;
+
+ if (ret)
+ *enable = true;
+ else
+ *enable = false;
+
+ return 0;
+ } else if (op == PMIC_OP_SET) {
+ if (*enable)
+ ret |= TPS65941_BUCK_MODE_MASK;
+ else
+ ret &= ~TPS65941_BUCK_MODE_MASK;
+ ret = pmic_reg_write(dev->parent, adr, ret);
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+
+static int tps65941_buck_volt2val(int uV)
+{
+ if (uV > TPS65941_BUCK_VOLT_MAX)
+ return -EINVAL;
+ else if (uV > 165)
+ return (uV - 166) / 2 + 0xAB;
+ else if (uV > 111)
+ return (uV - 111) / 1 + 0x73;
+ else if (uV > 60)
+ return (uV - 60) / 5000 + 0x0F;
+ else if (uV >= 30)
+ return (uV - 30) / 2 + 0x00;
+ else
+ return -EINVAL;
+}
+
+static int tps65941_buck_val2volt(int val)
+{
+ if (val > TPS65941_BUCK_VOLT_MAX_HEX)
+ return -EINVAL;
+ else if (val > 0xAB)
+ return 166 + (val - 0xAB) * 2;
+ else if (val > 0x73)
+ return 110 + (val - 0x73) * 1;
+ else if (val > 0xF)
+ return 60 + (val - 0xF) * 5000;
+ else if (val >= 0x0)
+ return 30 + val * 5000;
+ else
+ return -EINV
[U-Boot] [PATCH v3 03/18] power: regulator: tps6236x: add support for tps6236x regulators
From: Tero Kristo
TPS6236x is a family of step down DC-DC converters optimized for battery
powered portable applications for a small solution size. Add a regulator
driver for supporting these devices.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
Changes in v3:
* No change
Changes in v2:
* No change
drivers/power/regulator/Kconfig | 10 ++
drivers/power/regulator/Makefile | 1 +
drivers/power/regulator/tps62360_regulator.c | 123 +++
3 files changed, 134 insertions(+)
create mode 100644 drivers/power/regulator/tps62360_regulator.c
diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index 9aa00fad42..56d68ee40e 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -273,6 +273,16 @@ config DM_REGULATOR_TPS65910
regulator types of the TPS65910 (BUCK, BOOST and LDO). It implements
the get/set api for value and enable.
+config DM_REGULATOR_TPS62360
+ bool "Enable driver for TPS6236x Power Regulator"
+ depends on DM_REGULATOR
+ help
+ The TPS6236X DC/DC step down converter provides a single output
+ power line peaking at 3A current. This driver supports all four
+ variants of the chip (TPS62360, TPS62361, TPS62362, TPS62363). It
+ implements the get/set api for value only, as the power line is
+ always on.
+
config DM_REGULATOR_STPMIC1
bool "Enable driver for STPMIC1 regulators"
depends on DM_REGULATOR && PMIC_STPMIC1
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
index 6a3d4bbee4..9198841b4f 100644
--- a/drivers/power/regulator/Makefile
+++ b/drivers/power/regulator/Makefile
@@ -26,4 +26,5 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP873X) += lp873x_regulator.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP87565) += lp87565_regulator.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_STM32_VREFBUF) += stm32-vrefbuf.o
obj-$(CONFIG_DM_REGULATOR_TPS65910) += tps65910_regulator.o
+obj-$(CONFIG_DM_REGULATOR_TPS62360) += tps62360_regulator.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMIC1) += stpmic1.o
diff --git a/drivers/power/regulator/tps62360_regulator.c
b/drivers/power/regulator/tps62360_regulator.c
new file mode 100644
index 00..3b123f503c
--- /dev/null
+++ b/drivers/power/regulator/tps62360_regulator.c
@@ -0,0 +1,123 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ * Tero Kristo
+ */
+
+#include
+#include
+#include
+#include
+
+#define TPS62360_REG_SET0 0
+
+#define TPS62360_I2C_CHIP 0x60
+
+#define TPS62360_VSEL_STEPSIZE 1 /* In uV */
+
+struct tps62360_regulator_config {
+ u32 vmin;
+ u32 vmax;
+};
+
+struct tps62360_regulator_pdata {
+ u8 vsel_offset;
+ struct udevice *i2c;
+ struct tps62360_regulator_config *config;
+};
+
+/*
+ * TPS62362/TPS62363 are just re-using these values for now, their preset
+ * voltage values are just different compared to TPS62360/TPS62361.
+ */
+static struct tps62360_regulator_config tps62360_data = {
+ .vmin = 77,
+ .vmax = 140,
+};
+
+static struct tps62360_regulator_config tps62361_data = {
+ .vmin = 50,
+ .vmax = 177,
+};
+
+static int tps62360_regulator_set_value(struct udevice *dev, int uV)
+{
+ struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
+ u8 regval;
+
+ if (uV < pdata->config->vmin || uV > pdata->config->vmax)
+ return -EINVAL;
+
+ uV -= pdata->config->vmin;
+
+ uV = DIV_ROUND_UP(uV, TPS62360_VSEL_STEPSIZE);
+
+ if (uV > U8_MAX)
+ return -EINVAL;
+
+ regval = (u8)uV;
+
+ return dm_i2c_write(pdata->i2c, TPS62360_REG_SET0 + pdata->vsel_offset,
+ ®val, 1);
+}
+
+static int tps62360_regulator_get_value(struct udevice *dev)
+{
+ u8 regval;
+ int ret;
+ struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
+
+ ret = dm_i2c_read(pdata->i2c, TPS62360_REG_SET0 + pdata->vsel_offset,
+ ®val, 1);
+ if (ret) {
+ dev_err(dev, "i2c read failed: %d\n", ret);
+ return ret;
+ }
+
+ return (u32)regval * TPS62360_VSEL_STEPSIZE + pdata->config->vmin;
+}
+
+static int tps62360_regulator_ofdata_to_platdata(struct udevice *dev)
+{
+ struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
+ u8 vsel0;
+ u8 vsel1;
+ int ret;
+
+ pdata->config = (void *)dev_get_driver_data(dev);
+
+ vsel0 = dev_read_bool(dev, "ti,vsel0-state-high");
+ vsel1 = dev_read_bool(dev, "ti,vsel1-state-high");
+
+ pdata->vsel_offset = vsel0 + vsel1 * 2;
+
+ ret = i2c_get_chip(dev->parent, TPS62360_I2C_CHIP, 1, &pdata->i2c);
+ if
[U-Boot] [PATCH v3 05/18] power: pmic: tps65941: Add support for tps65941 family of PMICs
Add support to bind the regulators/child nodes with the pmic.
Signed-off-by: Keerthy
---
Changes in v3:
* No change
Changes in v2:
* No change
drivers/power/pmic/Kconfig| 7 +++
drivers/power/pmic/Makefile | 1 +
drivers/power/pmic/tps65941.c | 83 +++
include/power/tps65941.h | 26 +++
4 files changed, 117 insertions(+)
create mode 100644 drivers/power/pmic/tps65941.c
create mode 100644 include/power/tps65941.h
diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index 586772fdec..9d3667a867 100644
--- a/drivers/power/pmic/Kconfig
+++ b/drivers/power/pmic/Kconfig
@@ -267,3 +267,10 @@ config SPL_PMIC_LP87565
help
The LP87565 is a PMIC containing a bunch of SMPS.
This driver binds the pmic children in SPL.
+
+config PMIC_TPS65941
+ bool "Enable driver for Texas Instruments TPS65941 PMIC"
+ depends on DM_PMIC
+ help
+ The TPS65941 is a PMIC containing a bunch of SMPS & LDOs.
+ This driver binds the pmic children.
diff --git a/drivers/power/pmic/Makefile b/drivers/power/pmic/Makefile
index 888dbb2857..ec64327805 100644
--- a/drivers/power/pmic/Makefile
+++ b/drivers/power/pmic/Makefile
@@ -39,3 +39,4 @@ obj-$(CONFIG_POWER_TPS65218) += pmic_tps65218.o
obj-$(CONFIG_POWER_TPS65910) += pmic_tps65910.o
obj-$(CONFIG_POWER_HI6553) += pmic_hi6553.o
obj-$(CONFIG_POWER_MC34VR500) += pmic_mc34vr500.o
+obj-$(CONFIG_PMIC_TPS65941) += tps65941.o
diff --git a/drivers/power/pmic/tps65941.c b/drivers/power/pmic/tps65941.c
new file mode 100644
index 00..e8f3c950bd
--- /dev/null
+++ b/drivers/power/pmic/tps65941.c
@@ -0,0 +1,83 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019 Texas Instruments Incorporated,
+ * Keerthy
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static const struct pmic_child_info pmic_children_info[] = {
+ { .prefix = "ldo", .driver = TPS65941_LDO_DRIVER },
+ { .prefix = "buck", .driver = TPS65941_BUCK_DRIVER },
+ { },
+};
+
+static int tps65941_write(struct udevice *dev, uint reg, const uint8_t *buff,
+ int len)
+{
+ if (dm_i2c_write(dev, reg, buff, len)) {
+ pr_err("write error to device: %p register: %#x!\n", dev, reg);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int tps65941_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
+{
+ if (dm_i2c_read(dev, reg, buff, len)) {
+ pr_err("read error from device: %p register: %#x!\n", dev, reg);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int tps65941_bind(struct udevice *dev)
+{
+ ofnode regulators_node;
+ int children;
+
+ regulators_node = dev_read_subnode(dev, "regulators");
+ if (!ofnode_valid(regulators_node)) {
+ debug("%s: %s regulators subnode not found!\n", __func__,
+ dev->name);
+ return -ENXIO;
+ }
+
+ debug("%s: '%s' - found regulators subnode\n", __func__, dev->name);
+
+ children = pmic_bind_children(dev, regulators_node, pmic_children_info);
+ if (!children)
+ printf("%s: %s - no child found\n", __func__, dev->name);
+
+ /* Always return success for this device */
+ return 0;
+}
+
+static struct dm_pmic_ops tps65941_ops = {
+ .read = tps65941_read,
+ .write = tps65941_write,
+};
+
+static const struct udevice_id tps65941_ids[] = {
+ { .compatible = "ti,tps659411", .data = TPS659411 },
+ { .compatible = "ti,tps659413", .data = TPS659413 },
+ { }
+};
+
+U_BOOT_DRIVER(pmic_tps65941) = {
+ .name = "tps65941_pmic",
+ .id = UCLASS_PMIC,
+ .of_match = tps65941_ids,
+ .bind = tps65941_bind,
+ .ops = &tps65941_ops,
+};
diff --git a/include/power/tps65941.h b/include/power/tps65941.h
new file mode 100644
index 00..2d48b31ae3
--- /dev/null
+++ b/include/power/tps65941.h
@@ -0,0 +1,26 @@
+#defineTPS659411 0x0
+#define TPS659412 0x1
+#define TPS659413 0x2
+#define TPS659414 0x3
+
+/* I2C device address for pmic tps65941 */
+#define TPS65941_I2C_ADDR (0x12 >> 1)
+#define TPS65941_LDO_NUM 4
+#define TPS65941_BUCK_NUM 5
+
+/* Drivers name */
+#define TPS65941_LDO_DRIVER"tps65941_ldo"
+#define TPS65941_BUCK_DRIVER "tps65941_buck"
+
+#define TPS65941_BUCK_VOLT_MASK0xFF
+#define TPS65941_BUCK_VOLT_MAX_HEX 0xFF
+#define TPS65941_BUCK_VOLT_MAX 334
+#define TPS65941_BUCK_MODE_MASK0x1
+
+#define TPS65941_LDO_VOLT_MASK 0x3E
+#define TPS65941_LDO_VOLT_MAX_HEX 0x3A
+#defin
[U-Boot] [PATCH v3 04/18] misc: k3_avs: Add j721e support
j721e SoCs have different OPP tables. Add support for the same.
Note: DM Still has lot of voltages TBD hence the correct
values need to be programmed once they are published.
Signed-off-by: Keerthy
---
Changes in v3:
* No change
Changes in v2:
* No change
drivers/misc/k3_avs.c | 22 ++
include/k3-avs.h | 2 ++
2 files changed, 24 insertions(+)
diff --git a/drivers/misc/k3_avs.c b/drivers/misc/k3_avs.c
index dd7fc3d585..c19c3c0646 100644
--- a/drivers/misc/k3_avs.c
+++ b/drivers/misc/k3_avs.c
@@ -347,6 +347,27 @@ static struct vd_data am654_vd_data[] = {
{ .id = -1 },
};
+static struct vd_data j721e_vd_data[] = {
+ {
+ .id = J721E_VDD_MPU,
+ .opp = AM6_OPP_NOM,
+ .dev_id = 202, /* J721E_DEV_A72SS0_CORE0 */
+ .clk_id = 2, /* ARM clock */
+ .opps = {
+ [AM6_OPP_NOM] = {
+ .volt = 88, /* TBD in DM */
+ .freq = 20,
+ },
+ },
+ },
+ { .id = -1 },
+};
+
+static struct vd_config j721e_vd_config = {
+ .efuse_xlate = am6_efuse_xlate,
+ .vds = j721e_vd_data,
+};
+
static struct vd_config am654_vd_config = {
.efuse_xlate = am6_efuse_xlate,
.vds = am654_vd_data,
@@ -354,6 +375,7 @@ static struct vd_config am654_vd_config = {
static const struct udevice_id k3_avs_ids[] = {
{ .compatible = "ti,am654-avs", .data = (ulong)&am654_vd_config },
+ { .compatible = "ti,j721e-avs", .data = (ulong)&j721e_vd_config },
{}
};
diff --git a/include/k3-avs.h b/include/k3-avs.h
index 9867481617..e3c3cafbb9 100644
--- a/include/k3-avs.h
+++ b/include/k3-avs.h
@@ -16,6 +16,8 @@
#define AM6_VDD_MPU0 3
#define AM6_VDD_MPU1 4
+#define J721E_VDD_MPU 2
+
#define NUM_OPPS 4
#define AM6_OPP_NOM1
--
2.17.1
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[U-Boot] [PATCH v3 07/18] arm: mach-k3: am6_init: Initialize AVS class 0
Initialize AVS class 0 so that mpu voltage rail is
programmed to the AVS class 0 compensated value.
Signed-off-by: Keerthy
---
Changes in v3:
* No change
Changes in v2:
* uclass_get_device_by_driver used in place getting the first uclass
Instance.
arch/arm/mach-k3/am6_init.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c
index 0b564f7bd1..99edcd9a24 100644
--- a/arch/arm/mach-k3/am6_init.c
+++ b/arch/arm/mach-k3/am6_init.c
@@ -116,6 +116,13 @@ void board_init_f(ulong dummy)
/* Perform EEPROM-based board detection */
do_board_detect();
+#if defined(CONFIG_CPU_V7R) && defined(CONFIG_K3_AVS0)
+ ret = uclass_get_device_by_driver(UCLASS_MISC, DM_GET_DRIVER(k3_avs),
+ &dev);
+ if (ret)
+ printf("AVS init failed: %d\n", ret);
+#endif
+
#ifdef CONFIG_K3_AM654_DDRSS
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret)
--
2.17.1
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[U-Boot] [PATCH v3 15/18] arm: dts: k3-j721e-r5-common-proc-board: Hook buck12_reg to vtm supply
Hook buck12_reg to vtm avs supply
Signed-off-by: Keerthy
---
Changes in v3:
* No change
Changes in v2:
* No change
arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index 165c38da4b..41af48214f 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -179,4 +179,9 @@
};
};
+&wkup_vtm0 {
+ vdd-supply-2 = <&buck12_reg>;
+ u-boot,dm-spl;
+};
+
#include "k3-j721e-common-proc-board-u-boot.dtsi"
--
2.17.1
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[U-Boot] [PATCH v3 08/18] arm: mach-k3: j721e_init: Initialize avs class 0
Initialize avs class 0
Signed-off-by: Keerthy
---
Changes in v3:
* No change
Changes in v2:
* No change
arch/arm/mach-k3/j721e_init.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c
index 5e3813252b..d0bf86abeb 100644
--- a/arch/arm/mach-k3/j721e_init.c
+++ b/arch/arm/mach-k3/j721e_init.c
@@ -118,6 +118,13 @@ void board_init_f(ulong dummy)
preloader_console_init();
#endif
+#if defined(CONFIG_CPU_V7R) && defined(CONFIG_K3_AVS0)
+ ret = uclass_get_device_by_driver(UCLASS_MISC, DM_GET_DRIVER(k3_avs),
+ &dev);
+ if (ret)
+ printf("AVS init failed: %d\n", ret);
+#endif
+
#if defined(CONFIG_K3_J721E_DDRSS)
ret = uclass_get_device(UCLASS_RAM, 0, &dev);
if (ret)
--
2.17.1
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[U-Boot] [PATCH v3 16/18] configs: am65x_evm_r5_defconfig: Enable TPS62363 regulator support
From: Tero Kristo TPS62363 is used to control the MPU_VDD voltage, so enable the driver for this. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change configs/am65x_evm_r5_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index d0619e9b7a..a721b24ba4 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -84,6 +84,7 @@ CONFIG_DM_REGULATOR=y CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPL_DM_REGULATOR_GPIO=y +CONFIG_DM_REGULATOR_TPS62360=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_K3_SYSTEM_CONTROLLER=y -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 13/18] arm: dts: k3-j721e-r5-common-proc-board: Add VTM node
Add VTM node for voltage and thermal management. For u-boot, this is needed
for supporting AVS class 0, as the efuse values for the OPPs are stored
under the VTM.
Signed-off-by: Keerthy
---
Changes in v3:
* No change
Changes in v2:
* No change
arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index 54d7998d27..e569809fcb 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -59,6 +59,13 @@
mboxes= <&mcu_secproxy 4>, <&mcu_secproxy 5>;
mbox-names = "tx", "rx";
};
+
+ wkup_vtm0: wkup_vtm@4204 {
+ compatible = "ti,am654-vtm", "ti,j721e-avs";
+ reg = <0x0 0x4204 0x0 0x330>;
+ power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
+ #thermal-sensor-cells = <1>;
+ };
};
&dmsc {
--
2.17.1
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[U-Boot] [PATCH v3 11/18] arm: dts: k3-am654-r5-base-board: add supply rail for MPU
From: Tero Kristo
MPU voltage on AM65x-evm is controlled via the TPS62363 chip attached
to i2c0 bus. Add device node for this so that it can be controlled via
a regulator driver.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
Changes in v3:
* No change
Changes in v2:
* No change
arch/arm/dts/k3-am654-r5-base-board.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index 98868afd9c..baa3a2c9e7 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -219,4 +219,17 @@
pinctrl-0 = <&wkup_i2c0_pins_default>;
clock-frequency = <40>;
u-boot,dm-spl;
+
+ vdd_mpu: tps62363@60 {
+ compatible = "ti,tps62363";
+ reg = <0x60>;
+ regulator-name = "VDD_MPU";
+ regulator-min-microvolt = <50>;
+ regulator-max-microvolt = <177>;
+ regulator-always-on;
+ regulator-boot-on;
+ ti,vsel0-state-high;
+ ti,vsel1-state-high;
+ u-boot,dm-spl;
+ };
};
--
2.17.1
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[U-Boot] [PATCH v3 14/18] arm: dts: k3-j721e-r5-common: Add tps65941 node and dependent wkup_i2c0 node
Add tps65941 node and dependent wkup_i2c0 node needed for AVS class 0 support
Signed-off-by: Keerthy
---
Changes in v3:
* No change
Changes in v2:
* No change
arch/arm/dts/k3-j721e-mcu-wakeup.dtsi | 11 +++
.../arm/dts/k3-j721e-r5-common-proc-board.dts | 32 +++
2 files changed, 43 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
index b958b5b3c1..0ed09e469f 100644
--- a/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm/dts/k3-j721e-mcu-wakeup.dtsi
@@ -57,6 +57,17 @@
clock-names = "fclk";
};
+ wkup_i2c0: i2c@4212 {
+ compatible = "ti,j721e-i2c", "ti,omap4-i2c";
+ reg = <0x0 0x4212 0x0 0x100>;
+ interrupts = ;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clock-names = "fck";
+ clocks = <&k3_clks 197 0>;
+ power-domains = <&k3_pds 197 TI_SCI_PD_EXCLUSIVE>;
+ };
+
mcu_uart0: serial@40a0 {
compatible = "ti,j721e-uart", "ti,am654-uart";
reg = <0x00 0x40a0 0x00 0x100>;
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index e569809fcb..165c38da4b 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -93,6 +93,13 @@
J721E_WKUP_IOPAD(0xe0, PIN_OUTPUT, 0) /* (G29)
WKUP_GPIO0_12.MCU_UART0_TXD */
>;
};
+
+ wkup_i2c0_pins_default: wkup-i2c0-pins-default {
+ pinctrl-single,pins = <
+ J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25)
WKUP_I2C0_SCL */
+ J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24)
WKUP_I2C0_SDA */
+ >;
+ };
};
&main_pmx0 {
@@ -147,4 +154,29 @@
ti,driver-strength-ohm = <50>;
};
+&wkup_i2c0 {
+ u-boot,dm-spl;
+ tps659413a: tps659413a@48 {
+ reg = <0x48>;
+ compatible = "ti,tps659413";
+ u-boot,dm-spl;
+ pinctrl-names = "default";
+ pinctrl-0 = <&wkup_i2c0_pins_default>;
+ clock-frequency = <40>;
+
+ regulators: regulators {
+ u-boot,dm-spl;
+ buck12_reg: buck12 {
+ /*VDD_MPU*/
+ regulator-name = "buck12";
+ regulator-min-microvolt = <80>;
+ regulator-max-microvolt = <125>;
+ regulator-always-on;
+ regulator-boot-on;
+ u-boot,dm-spl;
+ };
+ };
+ };
+};
+
#include "k3-j721e-common-proc-board-u-boot.dtsi"
--
2.17.1
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[U-Boot] [PATCH v3 12/18] arm: dts: k3-am654-r5-base-board: enable wkup_vtm0 node and link in supplies
From: Tero Kristo
Link the vdd-supplies for the voltage domains under the VTM node. Also,
enable the node under SPL. This will enable the AVS class 0 support on
am65x-evm board.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
Changes in v3:
* No change
Changes in v2:
* No change
arch/arm/dts/k3-am654-r5-base-board.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index baa3a2c9e7..5c110ef9dd 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -138,6 +138,12 @@
power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
};
+&wkup_vtm0 {
+ vdd-supply-3 = <&vdd_mpu>;
+ vdd-supply-4 = <&vdd_mpu>;
+ u-boot,dm-spl;
+};
+
&wkup_pmx0 {
u-boot,dm-spl;
wkup_uart0_pins_default: wkup_uart0_pins_default {
--
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[U-Boot] [PATCH v3 10/18] arm: dts: k3-am654-r5-base-board: enable wkup_i2c0 driver for spl
From: Tero Kristo Enable wkup_i2c0 as this is needed for voltage control. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change arch/arm/dts/k3-am654-r5-base-board.dts | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts index 6ab0f4af10..98868afd9c 100644 --- a/arch/arm/dts/k3-am654-r5-base-board.dts +++ b/arch/arm/dts/k3-am654-r5-base-board.dts @@ -218,4 +218,5 @@ pinctrl-names = "default"; pinctrl-0 = <&wkup_i2c0_pins_default>; clock-frequency = <40>; + u-boot,dm-spl; }; -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 18/18] configs: j721e_evm_r5_defconfig: Enable AVS Class 0 & dependent configs
Enable AVS Class 0 & dependent config options. Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change configs/j721e_evm_r5_defconfig | 9 + 1 file changed, 9 insertions(+) diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index b7168eceb4..2b6dbf5a49 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -59,10 +59,14 @@ CONFIG_CLK_TI_SCI=y CONFIG_TI_SCI_PROTOCOL=y CONFIG_DM_GPIO=y CONFIG_DA8XX_GPIO=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_SYS_I2C_OMAP24XX=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y CONFIG_MISC=y CONFIG_FS_LOADER=y +CONFIG_K3_AVS0=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_AM654=y @@ -76,6 +80,11 @@ CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_TPS65941=y +CONFIG_DM_REGULATOR=y +CONFIG_SPL_DM_REGULATOR=y +CONFIG_DM_REGULATOR_TPS65941=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y CONFIG_DM_RESET=y -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 17/18] configs: am65x_evm_r5_defconfig: Enable AVS class 0 support
From: Tero Kristo Enable AVS class 0 support for the R5 SPL bootloader. Signed-off-by: Tero Kristo Signed-off-by: Keerthy --- Changes in v3: * No change Changes in v2: * No change configs/am65x_evm_r5_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index a721b24ba4..4f122808de 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -99,3 +99,4 @@ CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_OMAP_TIMER=y CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 +CONFIG_K3_AVS0=y -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v3 09/18] arm: dts: k3-am654-r5-base-board: Add VTM node
Add VTM node for voltage and thermal management. For u-boot, this is needed
for supporting AVS class 0, as the efuse values for the OPPs are stored
under the VTM.
Signed-off-by: Tero Kristo
Signed-off-by: Keerthy
---
Changes in v3:
* Moved from generic wakeup.dtsi to r5 board file.
Changes in v2:
* No change
arch/arm/dts/k3-am654-r5-base-board.dts | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts
b/arch/arm/dts/k3-am654-r5-base-board.dts
index 174d202306..6ab0f4af10 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -97,6 +97,13 @@
u-boot,dm-spl;
};
+ wkup_vtm0: wkup_vtm@4205 {
+ compatible = "ti,am654-vtm", "ti,am654-avs";
+ reg = <0x4205 0x25c>;
+ power-domains = <&k3_pds 80>;
+ #thermal-sensor-cells = <1>;
+ };
+
clk_200mhz: dummy_clock {
compatible = "fixed-clock";
#clock-cells = <0>;
--
2.17.1
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Re: [U-Boot] [PATCH 01/14] net: eth-uclass: eth_get_dev based on SEQ_ALIAS instead of probe order
On 10/25/2019 5:35 PM, Tom Rini wrote: On Tue, Aug 06, 2019 at 04:08:31PM +0530, Keerthy wrote: In case of multiple eth interfaces currently eth_get_dev fetches the device based on the probe order which can be random hence try with the alias. Signed-off-by: Keerthy --- net/eth-uclass.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/net/eth-uclass.c b/net/eth-uclass.c index 031d558625..f11c307b8c 100644 --- a/net/eth-uclass.c +++ b/net/eth-uclass.c @@ -68,8 +68,8 @@ struct udevice *eth_get_dev(void) uc_priv = eth_get_uclass_priv(); if (!uc_priv->current) - eth_errno = uclass_first_device(UCLASS_ETH, - &uc_priv->current); + eth_errno = uclass_get_device_by_seq(UCLASS_ETH, +0, &uc_priv->current); return uc_priv->current; } This breaks networking on qemu_arm / qemu_arm64 and no networking device is found. Okay. That is pretty strange. So seems like uclass_get_device_by_seq is failing for some reason. ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 01/14] net: eth-uclass: eth_get_dev based on SEQ_ALIAS instead of probe order
On 10/29/2019 2:33 PM, Lokesh Vutla wrote: On 25/10/19 10:23 PM, keerthy wrote: On 10/25/2019 5:35 PM, Tom Rini wrote: On Tue, Aug 06, 2019 at 04:08:31PM +0530, Keerthy wrote: In case of multiple eth interfaces currently eth_get_dev fetches the device based on the probe order which can be random hence try with the alias. Signed-off-by: Keerthy --- net/eth-uclass.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/net/eth-uclass.c b/net/eth-uclass.c index 031d558625..f11c307b8c 100644 --- a/net/eth-uclass.c +++ b/net/eth-uclass.c @@ -68,8 +68,8 @@ struct udevice *eth_get_dev(void) uc_priv = eth_get_uclass_priv(); if (!uc_priv->current) - eth_errno = uclass_first_device(UCLASS_ETH, - &uc_priv->current); + eth_errno = uclass_get_device_by_seq(UCLASS_ETH, + 0, &uc_priv->current); return uc_priv->current; } This breaks networking on qemu_arm / qemu_arm64 and no networking device is found. Okay. That is pretty strange. So seems like uclass_get_device_by_seq is failing for some reason. because not everyone populates aliases. You can do something like below: eth_errno = uclass_get_device_by_seq(UCLASS_ETH, 0, &uc_priv->current); if (eth_errno || !uc_priv->current) eth_errno = uclass_first_device(UCLASS_ETH, &uc_priv->current); Thanks Lokesh. I will add that check. Thanks and regards, Lokesh ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[PATCH v3 01/10] lib: elf: Move the generic elf loading/validating functions to lib
Move the generic elf loading/validating functions to lib/
so that they can be re-used and accessed by code existing
outside cmd.
Signed-off-by: Keerthy
Suggested-by: Simon Goldschmidt
Reviewed-by: Simon Goldschmidt
---
cmd/Kconfig | 1 +
cmd/elf.c | 229
include/elf.h | 4 +
lib/Kconfig | 3 +
lib/Makefile | 1 +
lib/elf.c | 256 ++
6 files changed, 265 insertions(+), 229 deletions(-)
create mode 100644 lib/elf.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 298feae24d..6f4f08d02a 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -375,6 +375,7 @@ config CMD_ADTIMG
config CMD_ELF
bool "bootelf, bootvx"
default y
+ select ELF
help
Boot an ELF/vxWorks image from the memory.
diff --git a/cmd/elf.c b/cmd/elf.c
index 32f12a72b9..23cc17aebc 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -26,211 +26,6 @@
#include
#endif
-/*
- * A very simple ELF64 loader, assumes the image is valid, returns the
- * entry point address.
- *
- * Note if U-Boot is 32-bit, the loader assumes the to segment's
- * physical address and size is within the lower 32-bit address space.
- */
-static unsigned long load_elf64_image_phdr(unsigned long addr)
-{
- Elf64_Ehdr *ehdr; /* Elf header structure pointer */
- Elf64_Phdr *phdr; /* Program header structure pointer */
- int i;
-
- ehdr = (Elf64_Ehdr *)addr;
- phdr = (Elf64_Phdr *)(addr + (ulong)ehdr->e_phoff);
-
- /* Load each program header */
- for (i = 0; i < ehdr->e_phnum; ++i) {
- void *dst = (void *)(ulong)phdr->p_paddr;
- void *src = (void *)addr + phdr->p_offset;
-
- debug("Loading phdr %i to 0x%p (%lu bytes)\n",
- i, dst, (ulong)phdr->p_filesz);
- if (phdr->p_filesz)
- memcpy(dst, src, phdr->p_filesz);
- if (phdr->p_filesz != phdr->p_memsz)
- memset(dst + phdr->p_filesz, 0x00,
- phdr->p_memsz - phdr->p_filesz);
- flush_cache(rounddown((unsigned long)dst, ARCH_DMA_MINALIGN),
- roundup(phdr->p_memsz, ARCH_DMA_MINALIGN));
- ++phdr;
- }
-
- if (ehdr->e_machine == EM_PPC64 && (ehdr->e_flags &
- EF_PPC64_ELFV1_ABI)) {
- /*
-* For the 64-bit PowerPC ELF V1 ABI, e_entry is a function
-* descriptor pointer with the first double word being the
-* address of the entry point of the function.
-*/
- uintptr_t addr = ehdr->e_entry;
-
- return *(Elf64_Addr *)addr;
- }
-
- return ehdr->e_entry;
-}
-
-static unsigned long load_elf64_image_shdr(unsigned long addr)
-{
- Elf64_Ehdr *ehdr; /* Elf header structure pointer */
- Elf64_Shdr *shdr; /* Section header structure pointer */
- unsigned char *strtab = 0; /* String table pointer */
- unsigned char *image; /* Binary image pointer */
- int i; /* Loop counter */
-
- ehdr = (Elf64_Ehdr *)addr;
-
- /* Find the section header string table for output info */
- shdr = (Elf64_Shdr *)(addr + (ulong)ehdr->e_shoff +
-(ehdr->e_shstrndx * sizeof(Elf64_Shdr)));
-
- if (shdr->sh_type == SHT_STRTAB)
- strtab = (unsigned char *)(addr + (ulong)shdr->sh_offset);
-
- /* Load each appropriate section */
- for (i = 0; i < ehdr->e_shnum; ++i) {
- shdr = (Elf64_Shdr *)(addr + (ulong)ehdr->e_shoff +
-(i * sizeof(Elf64_Shdr)));
-
- if (!(shdr->sh_flags & SHF_ALLOC) ||
- shdr->sh_addr == 0 || shdr->sh_size == 0) {
- continue;
- }
-
- if (strtab) {
- debug("%sing %s @ 0x%08lx (%ld bytes)\n",
- (shdr->sh_type == SHT_NOBITS) ? "Clear" : "Load",
- &strtab[shdr->sh_name],
- (unsigned long)shdr->sh_addr,
- (long)shdr->sh_size);
- }
-
- if (shdr->sh_type == SHT_NOBITS) {
- memset((void *)(uintptr_t)shdr->sh_addr, 0,
- shdr->sh_size);
- } else {
- image = (unsigned char *)addr + (ulong)shdr->sh_offset;
- memcpy((void *)(uintptr_t)shdr->sh_addr,
- (const void *)image, shdr->sh_size);
- }
- flush_cache(rounddown(shdr->sh_addr, ARCH_DMA_MINAL
[PATCH v3 04/10] armv7R: K3: Add support for jumping to firmware
MCU Domain rf50 is currently shutting down after loading the ATF.
Load elf firmware and jump to firmware post loading ATF.
ROM doesn't enable ATCM memory, so make sure that firmware that
is being loaded doesn't use ATCM memory or override SPL.
Signed-off-by: Keerthy
Signed-off-by: Lokesh Vutla
---
arch/arm/mach-k3/common.c | 22 --
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index f0ac0c39f1..809e23bb86 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -131,8 +131,10 @@ __weak void start_non_linux_remote_cores(void)
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
{
+ typedef void __noreturn (*image_entry_noargs_t)(void);
struct ti_sci_handle *ti_sci = get_ti_sci_handle();
- int ret;
+ u32 loadaddr = 0;
+ int ret, size;
/* Release all the exclusive devices held by SPL before starting ATF */
ti_sci->ops.dev_ops.release_exclusive_devices(ti_sci);
@@ -143,6 +145,9 @@ void __noreturn jump_to_image_no_args(struct spl_image_info
*spl_image)
init_env();
start_non_linux_remote_cores();
+ size = load_firmware("mcur5f0_0fwname", "mcur5f0_0loadaddr",
+&loadaddr);
+
/*
* It is assumed that remoteproc device 1 is the corresponding
@@ -158,13 +163,18 @@ void __noreturn jump_to_image_no_args(struct
spl_image_info *spl_image)
ret = rproc_start(1);
if (ret)
panic("%s: ATF failed to start on rproc (%d)\n", __func__, ret);
+ if (!(size > 0 && valid_elf_image(loadaddr))) {
+ debug("Shutting down...\n");
+ release_resources_for_core_shutdown();
+
+ while (1)
+ asm volatile("wfe");
+ }
- debug("Releasing resources...\n");
- release_resources_for_core_shutdown();
+ image_entry_noargs_t image_entry =
+ (image_entry_noargs_t)load_elf_image_phdr(loadaddr);
- debug("Finalizing core shutdown...\n");
- while (1)
- asm volatile("wfe");
+ image_entry();
}
#endif
--
2.17.1
[PATCH v3 03/10] armv7R: K3: r5_mpu: Enable execute permission for MCU0 BTCM
Enable execute permission for mcu_r5fss0_core0 BTCM so that we can jump
to a firmware directly from SPL.
Signed-off-by: Keerthy
---
arch/arm/mach-k3/r5_mpu.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-k3/r5_mpu.c b/arch/arm/mach-k3/r5_mpu.c
index ee076ed877..3d2ff6775a 100644
--- a/arch/arm/mach-k3/r5_mpu.c
+++ b/arch/arm/mach-k3/r5_mpu.c
@@ -26,7 +26,9 @@ struct mpu_region_config k3_mpu_regions[16] = {
/* U-Boot's code area marking it as WB and Write allocate */
{CONFIG_SYS_SDRAM_BASE, REGION_2, XN_DIS, PRIV_RW_USR_RW,
O_I_WB_RD_WR_ALLOC, REGION_2GB},
- {0x0, 3, 0x0, 0x0, 0x0, 0x0},
+ /* mcu_r5fss0_core0 BTCM area marking it as WB and Write allocate. */
+ {0x4101, 3, XN_DIS, PRIV_RW_USR_RW, O_I_WB_RD_WR_ALLOC,
+REGION_8MB},
{0x0, 4, 0x0, 0x0, 0x0, 0x0},
{0x0, 5, 0x0, 0x0, 0x0, 0x0},
{0x0, 6, 0x0, 0x0, 0x0, 0x0},
--
2.17.1
[PATCH v3 00/10] Add support for loading main_r5fss0_core0
This patch series enables mcu_r5fss0_core0 & main_r5fss0_core0. Tested for firmware loading and execution on J721e. Changes in v3: * Removed saving env in MMC and fixed env saving in SPL when nowhere option is set. Changes in v2: * Factored out all the generic elf handling functions under lib/elf.c Keerthy (10): lib: elf: Move the generic elf loading/validating functions to lib arm: k3: Add support for loading non linux remote cores armv7R: K3: r5_mpu: Enable execute permission for MCU0 BTCM armv7R: K3: Add support for jumping to firmware arm: dts: k3-j721e-r5: Add fs_loader node arm: dts: k3-j721e-r5: Enable r5fss0 cluster in SPL include: configs: j721e_evm: Add env variables for mcu_r5fss0_core0 & main_r5fss0_core0 configs: j721e_evm_r5: Enable R5F remoteproc support configs: j721e_evm_r5_defconfig: Remove saving ENV in eMMC env: nowhere: set default enviroment .../arm/dts/k3-j721e-r5-common-proc-board.dts | 20 ++ arch/arm/mach-k3/common.c | 106 +++- arch/arm/mach-k3/common.h | 2 + arch/arm/mach-k3/j721e_init.c | 34 +++ arch/arm/mach-k3/r5_mpu.c | 4 +- cmd/Kconfig | 1 + cmd/elf.c | 229 configs/j721e_evm_r5_defconfig| 6 +- env/nowhere.c | 1 + include/configs/j721e_evm.h | 4 + include/elf.h | 4 + lib/Kconfig | 3 + lib/Makefile | 1 + lib/elf.c | 256 ++ 14 files changed, 426 insertions(+), 245 deletions(-) create mode 100644 lib/elf.c -- 2.17.1
[PATCH v3 02/10] arm: k3: Add support for loading non linux remote cores
Add MAIN domain R5FSS0 remoteproc support from spl. This enables
loading the elf firmware in SPL and starting the remotecore.
In order to start the core, there should be a file with path
"/lib/firmware/j7-main-r5f0_0-fw" under filesystem
of respective boot mode.
Signed-off-by: Keerthy
Signed-off-by: Lokesh Vutla
[Guard start_non_linux_remote_cores under CONFIG_FS_LOADER]
Signed-off-by: Andreas Dannenberg
---
arch/arm/mach-k3/common.c | 84 ---
arch/arm/mach-k3/common.h | 2 +
arch/arm/mach-k3/j721e_init.c | 34 ++
3 files changed, 115 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index 8d1529062d..f0ac0c39f1 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -16,6 +16,10 @@
#include
#include
#include
+#include
+#include
+#include
+#include
struct ti_sci_handle *get_ti_sci_handle(void)
{
@@ -57,6 +61,74 @@ int early_console_init(void)
#endif
#ifdef CONFIG_SYS_K3_SPL_ATF
+
+void init_env(void)
+{
+#ifdef CONFIG_SPL_ENV_SUPPORT
+ char *part;
+
+ env_init();
+ env_load();
+ switch (spl_boot_device()) {
+ case BOOT_DEVICE_MMC2:
+ part = env_get("bootpart");
+ env_set("storage_interface", "mmc");
+ env_set("fw_dev_part", part);
+ break;
+ case BOOT_DEVICE_SPI:
+ env_set("storage_interface", "ubi");
+ env_set("fw_ubi_mtdpart", "UBI");
+ env_set("fw_ubi_volume", "UBI0");
+ break;
+ default:
+ printf("%s from device %u not supported!\n",
+ __func__, spl_boot_device());
+ return;
+ }
+#endif
+}
+
+#ifdef CONFIG_FS_LOADER
+int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
+{
+ struct udevice *fsdev;
+ char *name = NULL;
+ int size = 0;
+
+ *loadaddr = 0;
+#ifdef CONFIG_SPL_ENV_SUPPORT
+ switch (spl_boot_device()) {
+ case BOOT_DEVICE_MMC2:
+ name = env_get(name_fw);
+ *loadaddr = env_get_hex(name_loadaddr, *loadaddr);
+ break;
+ default:
+ printf("Loading rproc fw image from device %u not supported!\n",
+ spl_boot_device());
+ return 0;
+ }
+#endif
+ if (!*loadaddr)
+ return 0;
+
+ if (!uclass_get_device(UCLASS_FS_FIRMWARE_LOADER, 0, &fsdev)) {
+ size = request_firmware_into_buf(fsdev, name, (void *)*loadaddr,
+0, 0);
+ }
+
+ return size;
+}
+#else
+int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
+{
+ return 0;
+}
+#endif
+
+__weak void start_non_linux_remote_cores(void)
+{
+}
+
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
{
struct ti_sci_handle *ti_sci = get_ti_sci_handle();
@@ -65,15 +137,17 @@ void __noreturn jump_to_image_no_args(struct
spl_image_info *spl_image)
/* Release all the exclusive devices held by SPL before starting ATF */
ti_sci->ops.dev_ops.release_exclusive_devices(ti_sci);
+ ret = rproc_init();
+ if (ret)
+ panic("rproc failed to be initialized (%d)\n", ret);
+
+ init_env();
+ start_non_linux_remote_cores();
+
/*
* It is assumed that remoteproc device 1 is the corresponding
* Cortex-A core which runs ATF. Make sure DT reflects the same.
*/
- ret = rproc_dev_init(1);
- if (ret)
- panic("%s: ATF failed to initialize on rproc (%d)\n", __func__,
- ret);
-
ret = rproc_load(1, spl_image->entry_point, 0x200);
if (ret)
panic("%s: ATF failed to load on rproc (%d)\n", __func__, ret);
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
index d8b34fe060..42fb8ee6e7 100644
--- a/arch/arm/mach-k3/common.h
+++ b/arch/arm/mach-k3/common.h
@@ -24,3 +24,5 @@ void setup_k3_mpu_regions(void);
int early_console_init(void);
void disable_linefill_optimization(void);
void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size);
+void start_non_linux_remote_cores(void);
+int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr);
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c
index f7f7398081..c5f8ede1a0 100644
--- a/arch/arm/mach-k3/j721e_init.c
+++ b/arch/arm/mach-k3/j721e_init.c
@@ -18,6 +18,7 @@
#include
#include
#include
+#include
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_K3_LOAD_SYSFW
@@ -295,3 +296,36 @@ void release_resources_for_core_shutdown(void)
}
}
#endif
+
+#ifdef CONFIG_SYS_K3_SPL_A
[PATCH v3 07/10] include: configs: j721e_evm: Add env variables for mcu_r5fss0_core0 & main_r5fss0_core0
Add env variables for mcu_r5fss0_core0 & main_r5fss0_core0 firmware
loadaddr and name.
Signed-off-by: Keerthy
---
include/configs/j721e_evm.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index eaed520e6b..265239e32a 100644
--- a/include/configs/j721e_evm.h
+++ b/include/configs/j721e_evm.h
@@ -84,6 +84,10 @@
"mmcdev=1\0"\
"bootpart=1:2\0"\
"bootdir=/boot\0" \
+ "mainr5f0_0loadaddr=8800\0" \
+ "mainr5f0_0fwname=/lib/firmware/j7-main-r5f0_0-fw\0"\
+ "mcur5f0_0loadaddr=8900\0" \
+ "mcur5f0_0fwname=/lib/firmware/j7-mcu-r5f0_0-fw\0" \
"rd_spec=-\0" \
"init_mmc=run args_all args_mmc\0" \
"get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
--
2.17.1
[PATCH v3 05/10] arm: dts: k3-j721e-r5: Add fs_loader node
Add fs_loader node which will be needed for loading firmwares
from the boot media/filesystem.
Signed-off-by: Keerthy
Signed-off-by: Lokesh Vutla
---
arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index 28a355d49c..caeee8defe 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -18,6 +18,12 @@
chosen {
stdout-path = "serial2:115200n8";
tick-timer = &timer1;
+ firmware-loader = &fs_loader0;
+ };
+
+ fs_loader0: fs_loader@0 {
+ u-boot,dm-pre-reloc;
+ compatible = "u-boot,fs-loader";
};
a72_0: a72@0 {
--
2.17.1
[PATCH v3 08/10] configs: j721e_evm_r5: Enable R5F remoteproc support
Enable r5f remoteproc support in r5 defconfig so that r5s can be started in spl. Signed-off-by: Keerthy Signed-off-by: Lokesh Vutla --- configs/j721e_evm_r5_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index cb6c74d7bf..0925690e10 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -25,6 +25,7 @@ CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y CONFIG_SPL_EARLY_BSS=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_EXT4=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_DM_MAILBOX=y CONFIG_SPL_DM_RESET=y @@ -92,6 +93,7 @@ CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_TPS65941=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y +CONFIG_REMOTEPROC_TI_K3_R5F=y CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y -- 2.17.1
[PATCH v3 09/10] configs: j721e_evm_r5_defconfig: Remove saving ENV in eMMC
Remove saving ENV in eMMC in r5 as the power domains are not setup. Environment in eMMC cannot be read if we do not boot from eMMC. Signed-off-by: Keerthy --- configs/j721e_evm_r5_defconfig | 4 1 file changed, 4 deletions(-) diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 0925690e10..0f391ff98e 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -7,7 +7,6 @@ CONFIG_SYS_MALLOC_F_LEN=0x55000 CONFIG_SOC_K3_J721E=y CONFIG_TARGET_J721E_R5_EVM=y CONFIG_ENV_SIZE=0x2 -CONFIG_ENV_OFFSET=0x68 CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_DRIVERS_MISC_SUPPORT=y @@ -48,9 +47,6 @@ CONFIG_CMD_FAT=y CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board" -CONFIG_ENV_IS_IN_MMC=y -CONFIG_SYS_REDUNDAND_ENVIRONMENT=y -CONFIG_ENV_OFFSET_REDUND=0x70 CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM=y CONFIG_SPL_DM=y -- 2.17.1
[PATCH v3 06/10] arm: dts: k3-j721e-r5: Enable r5fss0 cluster in SPL
Enable MAIN domain r5fss0 cluster and its core0 in R5 spl.
Signed-off-by: Keerthy
Signed-off-by: Lokesh Vutla
---
arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
index caeee8defe..d9f33bf4a4 100644
--- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
+++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts
@@ -13,6 +13,8 @@
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a72_0;
+ remoteproc2 = &main_r5fss0_core0;
+ remoteproc3 = &main_r5fss0_core1;
};
chosen {
@@ -213,4 +215,16 @@
u-boot,dm-spl;
};
+&main_r5fss0 {
+ u-boot,dm-spl;
+};
+
+&main_r5fss0_core0 {
+ u-boot,dm-spl;
+};
+
+&main_r5fss0_core1 {
+ u-boot,dm-spl;
+};
+
#include "k3-j721e-common-proc-board-u-boot.dtsi"
--
2.17.1
[PATCH v3 10/10] env: nowhere: set default enviroment
set default enviroment so that set_env calls succeed
when ENV_IS_NOWHERE is alone set.
Signed-off-by: Keerthy
---
env/nowhere.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/env/nowhere.c b/env/nowhere.c
index f5b0a17652..70c3b3e011 100644
--- a/env/nowhere.c
+++ b/env/nowhere.c
@@ -23,6 +23,7 @@ static int env_nowhere_init(void)
{
gd->env_addr= (ulong)&default_environment[0];
gd->env_valid = ENV_INVALID;
+ env_set_default(NULL, 0);
return 0;
}
--
2.17.1
Re: [PATCH v3 02/10] arm: k3: Add support for loading non linux remote cores
On 1/21/2020 6:26 PM, Andrew F. Davis wrote:
On 1/21/20 6:07 AM, Keerthy wrote:
Add MAIN domain R5FSS0 remoteproc support from spl. This enables
loading the elf firmware in SPL and starting the remotecore.
In order to start the core, there should be a file with path
"/lib/firmware/j7-main-r5f0_0-fw" under filesystem
of respective boot mode.
Signed-off-by: Keerthy
Signed-off-by: Lokesh Vutla
[Guard start_non_linux_remote_cores under CONFIG_FS_LOADER]
Signed-off-by: Andreas Dannenberg
---
arch/arm/mach-k3/common.c | 84 ---
arch/arm/mach-k3/common.h | 2 +
arch/arm/mach-k3/j721e_init.c | 34 ++
3 files changed, 115 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index 8d1529062d..f0ac0c39f1 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -16,6 +16,10 @@
#include
#include
#include
+#include
+#include
+#include
+#include
struct ti_sci_handle *get_ti_sci_handle(void)
{
@@ -57,6 +61,74 @@ int early_console_init(void)
#endif
#ifdef CONFIG_SYS_K3_SPL_ATF
+
+void init_env(void)
+{
+#ifdef CONFIG_SPL_ENV_SUPPORT
+ char *part;
+
+ env_init();
+ env_load();
+ switch (spl_boot_device()) {
+ case BOOT_DEVICE_MMC2:
+ part = env_get("bootpart");
+ env_set("storage_interface", "mmc");
+ env_set("fw_dev_part", part);
+ break;
+ case BOOT_DEVICE_SPI:
+ env_set("storage_interface", "ubi");
+ env_set("fw_ubi_mtdpart", "UBI");
+ env_set("fw_ubi_volume", "UBI0");
+ break;
+ default:
+ printf("%s from device %u not supported!\n",
+ __func__, spl_boot_device());
This will print for almost every boot mode..
I can keep this under debug.
+ return;
+ }
+#endif
+}
+
+#ifdef CONFIG_FS_LOADER
+int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
+{
+ struct udevice *fsdev;
+ char *name = NULL;
+ int size = 0;
+
+ *loadaddr = 0;
+#ifdef CONFIG_SPL_ENV_SUPPORT
+ switch (spl_boot_device()) {
+ case BOOT_DEVICE_MMC2:
+ name = env_get(name_fw);
+ *loadaddr = env_get_hex(name_loadaddr, *loadaddr);
+ break;
+ default:
+ printf("Loading rproc fw image from device %u not supported!\n",
+ spl_boot_device());
This whole thing seems very MMC specific, if early firmware loading is
important it should work for all boot modes. Find a way to include it in
the next boot stage FIT image (tispl.bin) so it works for all modes.
That was not NAKd. We are going with fs_loader approach.
+ return 0;
+ }
+#endif
+ if (!*loadaddr)
+ return 0;
+
+ if (!uclass_get_device(UCLASS_FS_FIRMWARE_LOADER, 0, &fsdev)) {
+ size = request_firmware_into_buf(fsdev, name, (void *)*loadaddr,
+0, 0);
+ }
+
+ return size;
+}
+#else
+int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
+{
+ return 0;
+}
+#endif
+
+__weak void start_non_linux_remote_cores(void)
+{
+}
+
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
{
struct ti_sci_handle *ti_sci = get_ti_sci_handle();
@@ -65,15 +137,17 @@ void __noreturn jump_to_image_no_args(struct
spl_image_info *spl_image)
/* Release all the exclusive devices held by SPL before starting ATF */
ti_sci->ops.dev_ops.release_exclusive_devices(ti_sci);
+ ret = rproc_init();
+ if (ret)
+ panic("rproc failed to be initialized (%d)\n", ret);
+
+ init_env();
+ start_non_linux_remote_cores();
+
/*
* It is assumed that remoteproc device 1 is the corresponding
* Cortex-A core which runs ATF. Make sure DT reflects the same.
*/
- ret = rproc_dev_init(1);
- if (ret)
- panic("%s: ATF failed to initialize on rproc (%d)\n", __func__,
- ret);
-
Where did this code go?
rproc_init takes care of that.
ret = rproc_load(1, spl_image->entry_point, 0x200);
if (ret)
panic("%s: ATF failed to load on rproc (%d)\n", __func__, ret);
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
index d8b34fe060..42fb8ee6e7 100644
--- a/arch/arm/mach-k3/common.h
+++ b/arch/arm/mach-k3/common.h
@@ -24,3 +24,5 @@ void setup_k3_mpu_regions(void);
int early_console_init(void);
void disable_linefill_optimization(void);
void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size);
+void start_non_linux_remote_cores
[PATCH v4 02/10] lib: elf: Move the generic elf loading/validating functions to lib
Move the generic elf loading/validating functions to lib/
so that they can be re-used and accessed by code existing
outside cmd.
Signed-off-by: Keerthy
Suggested-by: Simon Goldschmidt
Reviewed-by: Simon Goldschmidt
---
Changes in v4:
* /s/ELF/LIB_ELF config option name
cmd/Kconfig | 1 +
cmd/elf.c | 229
include/elf.h | 4 +
lib/Kconfig | 3 +
lib/Makefile | 1 +
lib/elf.c | 256 ++
6 files changed, 265 insertions(+), 229 deletions(-)
create mode 100644 lib/elf.c
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 298feae24d..ac0a985596 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -375,6 +375,7 @@ config CMD_ADTIMG
config CMD_ELF
bool "bootelf, bootvx"
default y
+ select LIB_ELF
help
Boot an ELF/vxWorks image from the memory.
diff --git a/cmd/elf.c b/cmd/elf.c
index 32f12a72b9..23cc17aebc 100644
--- a/cmd/elf.c
+++ b/cmd/elf.c
@@ -26,211 +26,6 @@
#include
#endif
-/*
- * A very simple ELF64 loader, assumes the image is valid, returns the
- * entry point address.
- *
- * Note if U-Boot is 32-bit, the loader assumes the to segment's
- * physical address and size is within the lower 32-bit address space.
- */
-static unsigned long load_elf64_image_phdr(unsigned long addr)
-{
- Elf64_Ehdr *ehdr; /* Elf header structure pointer */
- Elf64_Phdr *phdr; /* Program header structure pointer */
- int i;
-
- ehdr = (Elf64_Ehdr *)addr;
- phdr = (Elf64_Phdr *)(addr + (ulong)ehdr->e_phoff);
-
- /* Load each program header */
- for (i = 0; i < ehdr->e_phnum; ++i) {
- void *dst = (void *)(ulong)phdr->p_paddr;
- void *src = (void *)addr + phdr->p_offset;
-
- debug("Loading phdr %i to 0x%p (%lu bytes)\n",
- i, dst, (ulong)phdr->p_filesz);
- if (phdr->p_filesz)
- memcpy(dst, src, phdr->p_filesz);
- if (phdr->p_filesz != phdr->p_memsz)
- memset(dst + phdr->p_filesz, 0x00,
- phdr->p_memsz - phdr->p_filesz);
- flush_cache(rounddown((unsigned long)dst, ARCH_DMA_MINALIGN),
- roundup(phdr->p_memsz, ARCH_DMA_MINALIGN));
- ++phdr;
- }
-
- if (ehdr->e_machine == EM_PPC64 && (ehdr->e_flags &
- EF_PPC64_ELFV1_ABI)) {
- /*
-* For the 64-bit PowerPC ELF V1 ABI, e_entry is a function
-* descriptor pointer with the first double word being the
-* address of the entry point of the function.
-*/
- uintptr_t addr = ehdr->e_entry;
-
- return *(Elf64_Addr *)addr;
- }
-
- return ehdr->e_entry;
-}
-
-static unsigned long load_elf64_image_shdr(unsigned long addr)
-{
- Elf64_Ehdr *ehdr; /* Elf header structure pointer */
- Elf64_Shdr *shdr; /* Section header structure pointer */
- unsigned char *strtab = 0; /* String table pointer */
- unsigned char *image; /* Binary image pointer */
- int i; /* Loop counter */
-
- ehdr = (Elf64_Ehdr *)addr;
-
- /* Find the section header string table for output info */
- shdr = (Elf64_Shdr *)(addr + (ulong)ehdr->e_shoff +
-(ehdr->e_shstrndx * sizeof(Elf64_Shdr)));
-
- if (shdr->sh_type == SHT_STRTAB)
- strtab = (unsigned char *)(addr + (ulong)shdr->sh_offset);
-
- /* Load each appropriate section */
- for (i = 0; i < ehdr->e_shnum; ++i) {
- shdr = (Elf64_Shdr *)(addr + (ulong)ehdr->e_shoff +
-(i * sizeof(Elf64_Shdr)));
-
- if (!(shdr->sh_flags & SHF_ALLOC) ||
- shdr->sh_addr == 0 || shdr->sh_size == 0) {
- continue;
- }
-
- if (strtab) {
- debug("%sing %s @ 0x%08lx (%ld bytes)\n",
- (shdr->sh_type == SHT_NOBITS) ? "Clear" : "Load",
- &strtab[shdr->sh_name],
- (unsigned long)shdr->sh_addr,
- (long)shdr->sh_size);
- }
-
- if (shdr->sh_type == SHT_NOBITS) {
- memset((void *)(uintptr_t)shdr->sh_addr, 0,
- shdr->sh_size);
- } else {
- image = (unsigned char *)addr + (ulong)shdr->sh_offset;
- memcpy((void *)(uintptr_t)shdr->sh_addr,
- (const void *)image, shdr->sh_size);
- }
-
[PATCH v4 00/10] Add support for loading main_r5fss0_core0
This patch series enables mcu_r5fss0_core0 & main_r5fss0_core0. Tested for firmware loading and execution on J721e. Changes in v4: * Changed env variable names, config names and enhanced commit logs. Changes in v3: * Removed saving env in MMC and fixed env saving in SPL when nowhere option is set. Changes in v2: * Factored out all the generic elf handling functions under lib/elf.c Keerthy (10): env: nowhere: set default enviroment lib: elf: Move the generic elf loading/validating functions to lib arm: k3: Add support for loading non linux remote cores armv7R: K3: r5_mpu: Enable execute permission for MCU0 BTCM armv7R: K3: Add support for jumping to firmware arm: dts: k3-j721e-r5: Add fs_loader node arm: dts: k3-j721e-r5: Enable r5fss0 cluster in SPL include: configs: j721e_evm: Add env variables for mcu_r5fss0_core0 & main_r5fss0_core0 configs: j721e_evm_r5: Enable R5F remoteproc support configs: j721e_evm_r5_defconfig: Remove saving ENV in eMMC .../arm/dts/k3-j721e-r5-common-proc-board.dts | 20 ++ arch/arm/mach-k3/common.c | 106 +++- arch/arm/mach-k3/common.h | 2 + arch/arm/mach-k3/j721e_init.c | 34 +++ arch/arm/mach-k3/r5_mpu.c | 4 +- cmd/Kconfig | 1 + cmd/elf.c | 229 configs/j721e_evm_r5_defconfig| 6 +- env/nowhere.c | 1 + include/configs/j721e_evm.h | 4 + include/elf.h | 4 + lib/Kconfig | 3 + lib/Makefile | 1 + lib/elf.c | 256 ++ 14 files changed, 426 insertions(+), 245 deletions(-) create mode 100644 lib/elf.c -- 2.17.1
[PATCH v4 03/10] arm: k3: Add support for loading non linux remote cores
Add MAIN domain R5FSS0 remoteproc support from spl. This enables
loading the elf firmware in SPL and starting the remotecore.
In order to start the core, there should be a file with path
"/lib/firmware/j7-main-r5f0_0-fw" under filesystem
of respective boot mode.
Signed-off-by: Keerthy
Signed-off-by: Lokesh Vutla
[Guard start_non_linux_remote_cores under CONFIG_FS_LOADER]
Signed-off-by: Andreas Dannenberg
---
Changes in v4:
* Env variable names changed.
arch/arm/mach-k3/common.c | 84 ---
arch/arm/mach-k3/common.h | 2 +
arch/arm/mach-k3/j721e_init.c | 34 ++
3 files changed, 115 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-k3/common.c b/arch/arm/mach-k3/common.c
index 8d1529062d..f0ac0c39f1 100644
--- a/arch/arm/mach-k3/common.c
+++ b/arch/arm/mach-k3/common.c
@@ -16,6 +16,10 @@
#include
#include
#include
+#include
+#include
+#include
+#include
struct ti_sci_handle *get_ti_sci_handle(void)
{
@@ -57,6 +61,74 @@ int early_console_init(void)
#endif
#ifdef CONFIG_SYS_K3_SPL_ATF
+
+void init_env(void)
+{
+#ifdef CONFIG_SPL_ENV_SUPPORT
+ char *part;
+
+ env_init();
+ env_load();
+ switch (spl_boot_device()) {
+ case BOOT_DEVICE_MMC2:
+ part = env_get("bootpart");
+ env_set("storage_interface", "mmc");
+ env_set("fw_dev_part", part);
+ break;
+ case BOOT_DEVICE_SPI:
+ env_set("storage_interface", "ubi");
+ env_set("fw_ubi_mtdpart", "UBI");
+ env_set("fw_ubi_volume", "UBI0");
+ break;
+ default:
+ printf("%s from device %u not supported!\n",
+ __func__, spl_boot_device());
+ return;
+ }
+#endif
+}
+
+#ifdef CONFIG_FS_LOADER
+int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
+{
+ struct udevice *fsdev;
+ char *name = NULL;
+ int size = 0;
+
+ *loadaddr = 0;
+#ifdef CONFIG_SPL_ENV_SUPPORT
+ switch (spl_boot_device()) {
+ case BOOT_DEVICE_MMC2:
+ name = env_get(name_fw);
+ *loadaddr = env_get_hex(name_loadaddr, *loadaddr);
+ break;
+ default:
+ printf("Loading rproc fw image from device %u not supported!\n",
+ spl_boot_device());
+ return 0;
+ }
+#endif
+ if (!*loadaddr)
+ return 0;
+
+ if (!uclass_get_device(UCLASS_FS_FIRMWARE_LOADER, 0, &fsdev)) {
+ size = request_firmware_into_buf(fsdev, name, (void *)*loadaddr,
+0, 0);
+ }
+
+ return size;
+}
+#else
+int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr)
+{
+ return 0;
+}
+#endif
+
+__weak void start_non_linux_remote_cores(void)
+{
+}
+
void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
{
struct ti_sci_handle *ti_sci = get_ti_sci_handle();
@@ -65,15 +137,17 @@ void __noreturn jump_to_image_no_args(struct
spl_image_info *spl_image)
/* Release all the exclusive devices held by SPL before starting ATF */
ti_sci->ops.dev_ops.release_exclusive_devices(ti_sci);
+ ret = rproc_init();
+ if (ret)
+ panic("rproc failed to be initialized (%d)\n", ret);
+
+ init_env();
+ start_non_linux_remote_cores();
+
/*
* It is assumed that remoteproc device 1 is the corresponding
* Cortex-A core which runs ATF. Make sure DT reflects the same.
*/
- ret = rproc_dev_init(1);
- if (ret)
- panic("%s: ATF failed to initialize on rproc (%d)\n", __func__,
- ret);
-
ret = rproc_load(1, spl_image->entry_point, 0x200);
if (ret)
panic("%s: ATF failed to load on rproc (%d)\n", __func__, ret);
diff --git a/arch/arm/mach-k3/common.h b/arch/arm/mach-k3/common.h
index d8b34fe060..42fb8ee6e7 100644
--- a/arch/arm/mach-k3/common.h
+++ b/arch/arm/mach-k3/common.h
@@ -24,3 +24,5 @@ void setup_k3_mpu_regions(void);
int early_console_init(void);
void disable_linefill_optimization(void);
void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size);
+void start_non_linux_remote_cores(void);
+int load_firmware(char *name_fw, char *name_loadaddr, u32 *loadaddr);
diff --git a/arch/arm/mach-k3/j721e_init.c b/arch/arm/mach-k3/j721e_init.c
index f7f7398081..13f3791823 100644
--- a/arch/arm/mach-k3/j721e_init.c
+++ b/arch/arm/mach-k3/j721e_init.c
@@ -18,6 +18,7 @@
#include
#include
#include
+#include
#ifdef CONFIG_SPL_BUILD
#ifdef CONFIG_K3_LOAD_SYSFW
@@ -295,3 +296,36 @@ void release_resources_for_core_shutdown(void)
}
}
#endif
+
+#ifde
[PATCH v4 01/10] env: nowhere: set default enviroment
Set default enviroment so that set_env calls succeed when only
ENV_IS_NOWHERE set.
Signed-off-by: Keerthy
---
Changes in v4:
* Reworded commit log
env/nowhere.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/env/nowhere.c b/env/nowhere.c
index f5b0a17652..70c3b3e011 100644
--- a/env/nowhere.c
+++ b/env/nowhere.c
@@ -23,6 +23,7 @@ static int env_nowhere_init(void)
{
gd->env_addr= (ulong)&default_environment[0];
gd->env_valid = ENV_INVALID;
+ env_set_default(NULL, 0);
return 0;
}
--
2.17.1
