[PATCH v2 2/2] drivers: spi: add commands for micron SPI
Add commands for dual and quad SPI transfers on Micon SPI.
Signed-off-by: Rayagonda Kokatanur
---
include/spi.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/spi.h b/include/spi.h
index 2b4929fc79..491f1f805c 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -150,6 +150,8 @@ struct spi_slave {
#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
#define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */
#define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */
+#define SPI_XFER_DUAL BIT(30)
+#define SPI_XFER_QUAD BIT(31)
};
/**
--
2.17.1
[PATCH v2 0/2] add broadcom spi driver
This patchset, -adds Broadcom SPI driver for iproc-based platforms and -extends Micron SPI commands for dual and quad SPI transfers on Micon SPI. Changes from v1: -Address review comments from Jagan Teki, Remove flash opcode from driver and use include/linux/mtd/spi-nor.h, Remove CONFIG_BCM_IPROC_USE_BSPI, handle via driver data -Address self review comments, Remove REG_WR, REG_RD, REG_SET, REG_CLR and use writel, readl, setbits_le32 and clrbits_le32 respectively, Rename priv data struct variables mspi_hw. bspi_hw, bspi_hw_raf to mspi, bspi, baspi_raf respectively, Remove struct bcmspi_platdata. Rayagonda Kokatanur (2): driver: spi: add brcm iproc qspi support. drivers: spi: add commands for micron SPI drivers/spi/Kconfig | 6 + drivers/spi/Makefile | 1 + drivers/spi/iproc_qspi.c | 808 +++ drivers/spi/iproc_qspi.h | 18 + drivers/spi/iproc_spi.c | 71 include/spi.h| 2 + 6 files changed, 906 insertions(+) create mode 100644 drivers/spi/iproc_qspi.c create mode 100644 drivers/spi/iproc_qspi.h create mode 100644 drivers/spi/iproc_spi.c -- 2.17.1
[PATCH v2 1/2] driver: spi: add brcm iproc qspi support.
Add brcm iproc qspi support. Signed-off-by: Rayagonda Kokatanur --- Changes from v1: -Address review comments from Jagan Teki, Remove flash opcode from driver and use include/linux/mtd/spi-nor.h, Remove CONFIG_BCM_IPROC_USE_BSPI, handle via driver data -Address self review comments, Remove REG_WR, REG_RD, REG_SET, REG_CLR and use writel, readl, setbits_le32 and clrbits_le32 respectively, Rename priv data struct variables mspi_hw. bspi_hw, bspi_hw_raf to mspi, bspi, baspi_raf respectively, Remove struct bcmspi_platdata. drivers/spi/Kconfig | 6 + drivers/spi/Makefile | 1 + drivers/spi/iproc_qspi.c | 808 +++ drivers/spi/iproc_qspi.h | 18 + drivers/spi/iproc_spi.c | 71 5 files changed, 904 insertions(+) create mode 100644 drivers/spi/iproc_qspi.c create mode 100644 drivers/spi/iproc_qspi.h create mode 100644 drivers/spi/iproc_spi.c diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 4166c6104e..3b827b3346 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -148,6 +148,12 @@ config ICH_SPI access the SPI NOR flash on platforms embedding this Intel ICH IP core. +config IPROC_QSPI + bool "QSPI driver for BCM iProc QSPI Controller" + help + This selects the BCM iProc QSPI controller. + This driver support spi flash single, quad and memory reads. + config MESON_SPIFC bool "Amlogic Meson SPI Flash Controller driver" depends on ARCH_MESON diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 52462e19a3..359f6a87cb 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -32,6 +32,7 @@ obj-$(CONFIG_FSL_DSPI) += fsl_dspi.o obj-$(CONFIG_FSL_ESPI) += fsl_espi.o obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o obj-$(CONFIG_ICH_SPI) += ich.o +obj-$(CONFIG_IPROC_QSPI) += iproc_qspi.o obj-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o obj-$(CONFIG_LPC32XX_SSP) += lpc32xx_ssp.o obj-$(CONFIG_MESON_SPIFC) += meson_spifc.o diff --git a/drivers/spi/iproc_qspi.c b/drivers/spi/iproc_qspi.c new file mode 100644 index 00..037f5be315 --- /dev/null +++ b/drivers/spi/iproc_qspi.c @@ -0,0 +1,808 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2020 Broadcom + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "iproc_qspi.h" + +/* 175MHz */ +#define QSPI_AXI_CLK 17500 +#define QSPI_DEF_SCK_FREQ 5000 +#define QSPI_WAIT_TIMEOUT_MS 200U +#define DWORD_ALIGNED(a) (!(((ulong)(a)) & 3)) + +/* Chip attributes */ +#define SPBR_MIN 8U +#define SPBR_MAX 255U +#define NUM_CDRAM 16U + +#define CDRAM_PCS0 2 +#define CDRAM_CONT BIT(7) +#define CDRAM_BITS_EN BIT(6) +#define CDRAM_QUAD_MODEBIT(8) +#define CDRAM_RBIT_INPUT BIT(10) +#define MSPI_SPE BIT(6) +#define MSPI_CONT_AFTER_CMDBIT(7) + +/* Register fields */ +#define MSPI_SPCR0_MSB_BITS_8 0x0020 +#define BSPI_RAF_CONTROL_START_MASK0x0001 +#define BSPI_RAF_STATUS_SESSION_BUSY_MASK 0x0001 +#define BSPI_RAF_STATUS_FIFO_EMPTY_MASK0x0002 +#define BSPI_BITS_PER_PHASE_ADDR_MARK 0x0001 +#define BSPI_BITS_PER_CYCLE_DATA_SHIFT 0 +#define BSPI_BITS_PER_CYCLE_ADDR_SHIFT 16 +#define BSPI_STRAP_OVERRIDE_DATA_QUAD_SHIFT3 +#define BSPI_STRAP_OVERRIDE_DATA_DUAL_SHIFT1 +#define BSPI_STRAP_OVERRIDE_SHIFT 0 + +/* MSPI registers */ +#define MSPI_SPCR0_LSB_REG 0x000 +#define MSPI_SPCR0_MSB_REG 0x004 +#define MSPI_SPCR1_LSB_REG 0x008 +#define MSPI_SPCR1_MSB_REG 0x00c +#define MSPI_NEWQP_REG 0x010 +#define MSPI_ENDQP_REG 0x014 +#define MSPI_SPCR2_REG 0x018 +#define MSPI_STATUS_REG0x020 +#define MSPI_CPTQP_REG 0x024 +#define MSPI_TXRAM_REG 0x040 +#define MSPI_RXRAM_REG 0x0c0 +#define MSPI_CDRAM_REG 0x140 +#define MSPI_WRITE_LOCK_REG0x180 +#define MSPI_DISABLE_FLUSH_GEN_REG 0x184 + +/* BSPI registers */ +#define BSPI_REVISION_ID_REG 0x000 +#define BSPI_SCRATCH_REG 0x004 +#define BSPI_MAST_N_BOOT_CTRL_REG 0x008 +#define BSPI_BUSY_STATUS_REG 0x00c +#define BSPI_INTR_STATUS_REG 0x010 +#define BSPI_B0_STATUS_REG 0x014 +#define BSPI_B0_CTRL_REG 0x018 +#define BSPI_B1_STATUS_RE
Re: [PATCH 02/10] efi_loader: add option to initialise EFI subsystem early
On 4/28/20 2:16 AM, AKASHI Takahiro wrote:
> Heinrich,
>
> On Mon, Apr 27, 2020 at 10:09:11PM +0200, Heinrich Schuchardt wrote:
>> On 4/27/20 11:48 AM, AKASHI Takahiro wrote:
>>> If this option is enabled, the initialisation of UEFI subsystem will be
>>> done as part of U-Boot initialisation.
>>>
>>> This feature will be utilised in implementing capsule-on-disk feature.
>>
>> This would mean that we allow unaligned access very early. Something
>> Siarhei was against:
>
> ?
> Even with CONFIG_EFI_CAPSULE_ON_DISK_EARLY enabled,
> efi_init_obj_list() is called at the last of "init" list
> and efi_launch_capsules() is called just before the main
> command loop.
> So "unalignment" issue won't happen.
efi_init_obj_list() is even called when booting via booti and therefore
before a lot of other code.
Best regards
Heinrich
>
>> https://lists.denx.de/pipermail/u-boot/2018-March/324242.html
>> https://patchwork.ozlabs.org/project/uboot/patch/20180329213350.7868-1-xypron.g...@gmx.de/
>>
>> Why can't you wait with the capsule update until any command initializes
>> the UEFI sub-system.
>
> This topic is the one the I mentioned in RFC's cover letter
> and asked you for comments several time.
> Anyway, there are a couple of reasons:
> 1. Updated firmware may have some effects on not only UEFI
>subsystem but also U-Boot's other features.
> 2. Firmware update should surely take place after reboot
>as UEFI specification expects.
> 3. Firmware update should not rely on user's interactions
>or whatever "bootcmd" is set to.
> 4. In case of failure of firmware update, some recovery should
>be automatically taken "before" the command line is handed over
>to users. (The feature is not implemented yet though.)
>
> -Takahiro Akashi
>
>
>> Best regards
>>
>> Heinrich
>>
>>>
>>> Signed-off-by: AKASHI Takahiro
>>> ---
>>> common/board_r.c | 6 ++
>>> lib/efi_loader/Kconfig | 4
>>> 2 files changed, 10 insertions(+)
>>>
>>> diff --git a/common/board_r.c b/common/board_r.c
>>> index 0bbeaa7594c6..7cf21a6078f9 100644
>>> --- a/common/board_r.c
>>> +++ b/common/board_r.c
>>> @@ -64,6 +64,9 @@
>>> #if defined(CONFIG_GPIO_HOG)
>>> #include
>>> #endif
>>> +#ifdef CONFIG_EFI_SETUP_EARLY
>>> +#include
>>> +#endif
>>>
>>> DECLARE_GLOBAL_DATA_PTR;
>>>
>>> @@ -867,6 +870,9 @@ static init_fnc_t init_sequence_r[] = {
>>> #endif
>>> #if defined(CONFIG_M68K) && defined(CONFIG_BLOCK_CACHE)
>>> blkcache_init,
>>> +#endif
>>> +#ifdef CONFIG_EFI_SETUP_EARLY
>>> + (init_fnc_t)efi_init_obj_list,
>>> #endif
>>> run_main_loop,
>>> };
>>> diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
>>> index 1cfa24ffcf72..7cc2d940f848 100644
>>> --- a/lib/efi_loader/Kconfig
>>> +++ b/lib/efi_loader/Kconfig
>>> @@ -25,6 +25,10 @@ config EFI_LOADER
>>>
>>> if EFI_LOADER
>>>
>>> +config EFI_SETUP_EARLY
>>> + bool
>>> + default n
>>> +
>>> config EFI_GET_TIME
>>> bool "GetTime() runtime service"
>>> depends on DM_RTC
>>>
>>
Re: [PATCH 03/10] efi_loader: define UpdateCapsule api
On 4/27/20 11:48 AM, AKASHI Takahiro wrote:
> In this commit, skeleton functions for capsule-related API's are
> added under CONFIG_EFI_UPDATE_CAPSULE configuration.
> Detailed implementation for a specific capsule type will be added
> in the succeeding patches.
>
> Signed-off-by: AKASHI Takahiro
> ---
> include/efi_api.h| 12 +++
> include/efi_loader.h | 15
> lib/efi_loader/Kconfig | 11 +++
> lib/efi_loader/Makefile | 1 +
> lib/efi_loader/efi_capsule.c | 153 +++
> lib/efi_loader/efi_runtime.c | 104 ++--
> lib/efi_loader/efi_setup.c | 31 +--
> 7 files changed, 276 insertions(+), 51 deletions(-)
> create mode 100644 lib/efi_loader/efi_capsule.c
>
> diff --git a/include/efi_api.h b/include/efi_api.h
> index 77d6bf2660b9..6fa3f4a887d2 100644
> --- a/include/efi_api.h
> +++ b/include/efi_api.h
> @@ -217,6 +217,10 @@ enum efi_reset_type {
> #define CAPSULE_FLAGS_POPULATE_SYSTEM_TABLE 0x0002
> #define CAPSULE_FLAGS_INITIATE_RESET 0x0004
>
> +#define EFI_CAPSULE_REPORT_GUID \
> + EFI_GUID(0x39b68c46, 0xf7fb, 0x441b, 0xb6, 0xec, \
> + 0x16, 0xb0, 0xf6, 0x98, 0x21, 0xf3)
> +
> struct efi_capsule_header {
> efi_guid_t capsule_guid;
> u32 header_size;
> @@ -224,6 +228,14 @@ struct efi_capsule_header {
> u32 capsule_image_size;
> } __packed;
>
> +struct efi_capsule_result_variable_header {
> + u32 variable_total_size;
> + u32 reserved;
> + efi_guid_t capsule_guid;
> + struct efi_time capsule_processed;
> + efi_status_t capsule_status;
> +} __packed;
> +
> #define EFI_RT_SUPPORTED_GET_TIME0x0001
> #define EFI_RT_SUPPORTED_SET_TIME0x0002
> #define EFI_RT_SUPPORTED_GET_WAKEUP_TIME 0x0004
> diff --git a/include/efi_loader.h b/include/efi_loader.h
> index d4510462d616..19ffc027c171 100644
> --- a/include/efi_loader.h
> +++ b/include/efi_loader.h
> @@ -196,6 +196,8 @@ extern const efi_guid_t efi_guid_cert_type_pkcs7;
>
> /* GUID of RNG protocol */
> extern const efi_guid_t efi_guid_rng_protocol;
> +/* GUID of capsule update result */
> +extern const efi_guid_t efi_guid_capsule_report;
>
> extern unsigned int __efi_runtime_start, __efi_runtime_stop;
> extern unsigned int __efi_runtime_rel_start, __efi_runtime_rel_stop;
> @@ -778,6 +780,19 @@ bool efi_image_parse(void *efi, size_t len, struct
> efi_image_regions **regp,
>WIN_CERTIFICATE **auth, size_t *auth_len);
> #endif /* CONFIG_EFI_SECURE_BOOT */
This line does not exist in upstream. Instead we have:
bool efi_image_parse(void *efi, size_t len, struct efi_image_regions **regp,
WIN_CERTIFICATE **auth, size_t *auth_len);
#else /* CONFIG_IS_ENABLED(EFI_LOADER) */
Am I missing patches? Or do you have to rebase your series?
>
> +#ifdef CONFIG_EFI_HAVE_CAPSULE_SUPPORT
> +/* Capsule update */
> +efi_status_t EFIAPI efi_update_capsule(
> + struct efi_capsule_header **capsule_header_array,
> + efi_uintn_t capsule_count,
> + u64 scatter_gather_list);
> +efi_status_t EFIAPI efi_query_capsule_caps(
> + efi_capsule_header **capsule_header_array,
> + efi_uintn_t capsule_count,
> + u64 *maximum_capsule_size,
> + u32 *reset_type);
> +#endif /* CONFIG_EFI_HAVE_CAPSULE_SUPPORT */
> +
> #else /* CONFIG_IS_ENABLED(EFI_LOADER) */
>
> /* Without CONFIG_EFI_LOADER we don't have a runtime section, stub it out */
> diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
> index 7cc2d940f848..e2b08251f26a 100644
> --- a/lib/efi_loader/Kconfig
> +++ b/lib/efi_loader/Kconfig
> @@ -45,6 +45,17 @@ config EFI_SET_TIME
> Provide the SetTime() runtime service at boottime. This service
> can be used by an EFI application to adjust the real time clock.
>
> +config EFI_HAVE_CAPSULE_SUPPORT
> + bool
> +
> +config EFI_RUNTIME_UPDATE_CAPSULE
> + bool "UpdateCapsule() runtime service"
> + default n
> + select EFI_HAVE_CAPSULE_SUPPORT
> + help
> + Select this option if you want to use UpdateCapsule and
> + QueryCapsuleCapabilities API's.
> +
> config EFI_DEVICE_PATH_TO_TEXT
> bool "Device path to text protocol"
> default y
> diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
> index eff3c25ec301..2ee1e683d9c5 100644
> --- a/lib/efi_loader/Makefile
> +++ b/lib/efi_loader/Makefile
> @@ -22,6 +22,7 @@ endif
> obj-$(CONFIG_CMD_BOOTEFI_HELLO) += helloworld_efi.o
> obj-y += efi_bootmgr.o
> obj-y += efi_boottime.o
> +obj-$(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) += efi_capsule.o
> obj-y += efi_console.o
> obj-y += efi_device_path.o
> obj-$(CONFIG_EFI_DEVICE_PATH_TO_TEXT) += efi_device_path_to_text.o
> diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c
> new file mode 100644
> index ..fb104bb92a6c
> --- /dev/null
> +++ b/lib/efi_loader/efi_capsule.
[PATCH v1 00/15] add basic driver support for broadcom NS3 soc
This is the second patch set series prepared on top of the
first patch set ("add initial support for broadcom NS3 soc").
This patch set will add following,
-dt nodes and defconfig options for basic device like pinctrl,
gpio, mmc, qspi, wdt, i2c and pcie.
-start wdt service
-Enable GPT commands
-Enable EXT4 and FAT fs support
Pramod Kumar (2):
arm: dts: ns3: add emmc node
arm: dts: ns3: add sp805 watchdog node
Rayagonda Kokatanur (12):
configs: ns3: enable pinctrl driver
dt-bindings: pinctrl: add ns3 pads definition
arm: dts: ns3: add pinctrl node
arm: dts: ns3: add gpio node
configs: ns3: enable BCM IPROC mmc driver
configs: ns3: enable mmc commands
arm: dts: ns3: add qspi node
arm: dts: ns3: add i2c node
configs: ns3: enable gpt commands
configs: ns3: enable EXT4 and FAT fs support
configs: ns3: enable sp805 watchdog driver
board: ns3: start sp805 watchdog service
Srinath Mannam (1):
arm: dts: ns3: add PAXB PCIe host and phy node
arch/arm/dts/ns3-board.dts| 58
arch/arm/dts/ns3-pinctrl.dtsi | 321 ++
arch/arm/dts/ns3.dtsi | 224
board/broadcom/bcmns3/ns3.c | 56 +++
configs/bcm_ns3_defconfig | 19 ++
.../dt-bindings/pinctrl/brcm,pinctrl-ns3.h| 41 +++
6 files changed, 719 insertions(+)
create mode 100644 arch/arm/dts/ns3-pinctrl.dtsi
create mode 100644 include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h
--
2.17.1
[PATCH v1 03/15] arm: dts: ns3: add pinctrl node
Add pinctrl dt node for ns3.
Signed-off-by: Rayagonda Kokatanur
---
arch/arm/dts/ns3-pinctrl.dtsi | 321 ++
arch/arm/dts/ns3.dtsi | 2 +
2 files changed, 323 insertions(+)
create mode 100644 arch/arm/dts/ns3-pinctrl.dtsi
diff --git a/arch/arm/dts/ns3-pinctrl.dtsi b/arch/arm/dts/ns3-pinctrl.dtsi
new file mode 100644
index 00..dfc13c7014
--- /dev/null
+++ b/arch/arm/dts/ns3-pinctrl.dtsi
@@ -0,0 +1,321 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2020 Broadcom
+ */
+
+#include
+
+ pinconf: pinconf@14 {
+ compatible = "pinconf-single";
+ reg = <0x0014 0x250>;
+ pinctrl-single,register-width = <32>;
+
+ /* pinconf functions */
+ };
+
+ pinmux: pinmux@14029c {
+ ranges;
+ compatible = "pinctrl-single";
+ reg = <0x0014029c 0x250>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ pinctrl-single,register-width = <32>;
+ pinctrl-single,function-mask = <0xf>;
+
+ pinctrl-single,gpio-range = <
+ &range 0 91 MODE_GPIO
+ &range 95 60 MODE_GPIO
+ >;
+ range: gpio-range {
+ #pinctrl-single,gpio-range-cells = <3>;
+ };
+
+ /* pinctrl functions */
+ tsio_pins: pinmux_gpio_14 {
+ pinctrl-single,pins = <
+ 0x038 MODE_NITRO /* tsio_0 */
+ 0x03c MODE_NITRO /* tsio_1 */
+ >;
+ };
+
+ nor_pins: pinmux_pnor_adv_n {
+ pinctrl-single,pins = <
+ 0x0ac MODE_PNOR /* nand_ce1_n */
+ 0x0b0 MODE_PNOR /* nand_ce0_n */
+ 0x0b4 MODE_PNOR /* nand_we_n */
+ 0x0b8 MODE_PNOR /* nand_wp_n */
+ 0x0bc MODE_PNOR /* nand_re_n */
+ 0x0c0 MODE_PNOR /* nand_rdy_bsy_n */
+ 0x0c4 MODE_PNOR /* nand_io0_0 */
+ 0x0c8 MODE_PNOR /* nand_io1_0 */
+ 0x0cc MODE_PNOR /* nand_io2_0 */
+ 0x0d0 MODE_PNOR /* nand_io3_0 */
+ 0x0d4 MODE_PNOR /* nand_io4_0 */
+ 0x0d8 MODE_PNOR /* nand_io5_0 */
+ 0x0dc MODE_PNOR /* nand_io6_0 */
+ 0x0e0 MODE_PNOR /* nand_io7_0 */
+ 0x0e4 MODE_PNOR /* nand_io8_0 */
+ 0x0e8 MODE_PNOR /* nand_io9_0 */
+ 0x0ec MODE_PNOR /* nand_io10_0 */
+ 0x0f0 MODE_PNOR /* nand_io11_0 */
+ 0x0f4 MODE_PNOR /* nand_io12_0 */
+ 0x0f8 MODE_PNOR /* nand_io13_0 */
+ 0x0fc MODE_PNOR /* nand_io14_0 */
+ 0x100 MODE_PNOR /* nand_io15_0 */
+ 0x104 MODE_PNOR /* nand_ale_0 */
+ 0x108 MODE_PNOR /* nand_cle_0 */
+ 0x040 MODE_PNOR /* pnor_adv_n */
+ 0x044 MODE_PNOR /* pnor_baa_n */
+ 0x048 MODE_PNOR /* pnor_bls_0_n */
+ 0x04c MODE_PNOR /* pnor_bls_1_n */
+ 0x050 MODE_PNOR /* pnor_cre */
+ 0x054 MODE_PNOR /* pnor_cs_2_n */
+ 0x058 MODE_PNOR /* pnor_cs_1_n */
+ 0x05c MODE_PNOR /* pnor_cs_0_n */
+ 0x060 MODE_PNOR /* pnor_we_n */
+ 0x064 MODE_PNOR /* pnor_oe_n */
+ 0x068 MODE_PNOR /* pnor_intr */
+ 0x06c MODE_PNOR /* pnor_dat_0 */
+ 0x070 MODE_PNOR /* pnor_dat_1 */
+ 0x074 MODE_PNOR /* pnor_dat_2 */
+ 0x078 MODE_PNOR /* pnor_dat_3 */
+ 0x07c MODE_PNOR /* pnor_dat_4 */
+
[PATCH v1 02/15] dt-bindings: pinctrl: add ns3 pads definition
Add NS3 pads definitions. Signed-off-by: Rayagonda Kokatanur --- .../dt-bindings/pinctrl/brcm,pinctrl-ns3.h| 41 +++ 1 file changed, 41 insertions(+) create mode 100644 include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h diff --git a/include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h b/include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h new file mode 100644 index 00..81ebd58ca5 --- /dev/null +++ b/include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2020 Broadcom. + */ + +#ifndef __DT_BINDINGS_PINCTRL_BRCM_STINGRAY_H__ +#define __DT_BINDINGS_PINCTRL_BRCM_STINGRAY_H__ + +/* Alternate functions available in MUX controller */ +#define MODE_NITRO 0 +#define MODE_NAND 1 +#define MODE_PNOR 2 +#define MODE_GPIO 3 + +/* Pad configuration attribute */ +#define PAD_SLEW_RATE_ENA BIT(0) +#define PAD_SLEW_RATE_ENA_MASK BIT(0) + +#define PAD_DRIVE_STRENGTH_2_MA(0 << 1) +#define PAD_DRIVE_STRENGTH_4_MABIT(1) +#define PAD_DRIVE_STRENGTH_6_MA(2 << 1) +#define PAD_DRIVE_STRENGTH_8_MA(3 << 1) +#define PAD_DRIVE_STRENGTH_10_MA (4 << 1) +#define PAD_DRIVE_STRENGTH_12_MA (5 << 1) +#define PAD_DRIVE_STRENGTH_14_MA (6 << 1) +#define PAD_DRIVE_STRENGTH_16_MA (7 << 1) +#define PAD_DRIVE_STRENGTH_MASK(7 << 1) + +#define PAD_PULL_UP_ENABIT(4) +#define PAD_PULL_UP_ENA_MASK BIT(4) + +#define PAD_PULL_DOWN_ENA BIT(5) +#define PAD_PULL_DOWN_ENA_MASK BIT(5) + +#define PAD_INPUT_PATH_DIS BIT(6) +#define PAD_INPUT_PATH_DIS_MASKBIT(6) + +#define PAD_HYSTERESIS_ENA BIT(7) +#define PAD_HYSTERESIS_ENA_MASKBIT(7) + +#endif -- 2.17.1
[PATCH v1 01/15] configs: ns3: enable pinctrl driver
Enable pinctrl driver for ns3. Signed-off-by: Rayagonda Kokatanur --- configs/bcm_ns3_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 9adb44cb51..328b0e2b4e 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -14,12 +14,15 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot> " CONFIG_SYS_XTRACE="n" +# CONFIG_CMD_PINMUX is not set # CONFIG_CMD_SOURCE is not set CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="ns3-board" CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_CCF=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_SINGLE=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPL_OF_LIBFDT=y -- 2.17.1
[PATCH v1 04/15] arm: dts: ns3: add gpio node
Add IPROC GPIO node for NS3.
Signed-off-by: Rayagonda Kokatanur
---
arch/arm/dts/ns3-board.dts | 1 +
arch/arm/dts/ns3.dtsi | 23 +++
2 files changed, 24 insertions(+)
diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts
index c660e74dc8..5926123379 100644
--- a/arch/arm/dts/ns3-board.dts
+++ b/arch/arm/dts/ns3-board.dts
@@ -35,6 +35,7 @@
aliases {
serial0 = &uart1;
+ gpio0 = &gpio_hsls;
};
chosen {
diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
index a21455515d..84464add9a 100644
--- a/arch/arm/dts/ns3.dtsi
+++ b/arch/arm/dts/ns3.dtsi
@@ -32,5 +32,28 @@
clock-frequency = <2500>;
status = "disabled";
};
+
+ gpio_hsls: gpio@d {
+ compatible = "brcm,iproc-gpio";
+ reg = <0x000d 0x864>;
+ ngpios = <151>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pinmux 0 0 16>,
+ <&pinmux 16 71 2>,
+ <&pinmux 18 131 8>,
+ <&pinmux 26 83 6>,
+ <&pinmux 32 123 4>,
+ <&pinmux 36 43 24>,
+ <&pinmux 60 89 2>,
+ <&pinmux 62 73 4>,
+ <&pinmux 66 95 28>,
+ <&pinmux 94 127 4>,
+ <&pinmux 98 139 10>,
+ <&pinmux 108 16 27>,
+ <&pinmux 135 77 6>,
+ <&pinmux 141 67 4>,
+ <&pinmux 145 149 6>;
+ };
};
};
--
2.17.1
[PATCH v1 05/15] configs: ns3: enable BCM IPROC mmc driver
Enable BCM IPROC mmc driver ns3. Enable DMA for MMC Host to have better reads and writes. Signed-off-by: Rayagonda Kokatanur --- configs/bcm_ns3_defconfig | 4 1 file changed, 4 insertions(+) diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 328b0e2b4e..432237b56d 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -21,6 +21,10 @@ CONFIG_DEFAULT_DEVICE_TREE="ns3-board" CONFIG_DM=y CONFIG_CLK=y CONFIG_CLK_CCF=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_IPROC=y CONFIG_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_DM_SERIAL=y -- 2.17.1
[PATCH v1 07/15] configs: ns3: enable mmc commands
Enable mmc commands for NS3. Signed-off-by: Rayagonda Kokatanur --- configs/bcm_ns3_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 432237b56d..a1ee866e54 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -14,6 +14,8 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot> " CONFIG_SYS_XTRACE="n" +CONFIG_CMD_MMC=y +CONFIG_CMD_MMC_SWRITE=y # CONFIG_CMD_PINMUX is not set # CONFIG_CMD_SOURCE is not set CONFIG_OF_CONTROL=y -- 2.17.1
[PATCH v1 08/15] arm: dts: ns3: add qspi node
Add QSPI node and qspi NOR flash node for NS3.
Signed-off-by: Rayagonda Kokatanur
---
arch/arm/dts/ns3-board.dts | 16
arch/arm/dts/ns3.dtsi | 9 +
2 files changed, 25 insertions(+)
diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts
index 45565c9c73..78a69ac3f9 100644
--- a/arch/arm/dts/ns3-board.dts
+++ b/arch/arm/dts/ns3-board.dts
@@ -35,6 +35,7 @@
aliases {
serial0 = &uart1;
+ spi0 = &qspi;
gpio0 = &gpio_hsls;
};
@@ -47,6 +48,21 @@
status = "okay";
};
+&qspi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+ spi_nor_flash: spi_flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <1250>;
+ spi-cpol;
+ spi-cpha;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <4>;
+ };
+};
+
&sdio0 {
status = "okay";
};
diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
index 7f94b922fc..7681bbc673 100644
--- a/arch/arm/dts/ns3.dtsi
+++ b/arch/arm/dts/ns3.dtsi
@@ -33,6 +33,15 @@
status = "disabled";
};
+ qspi: spi@37 {
+ compatible = "brcm,iproc-qspi";
+ reg = <0x0037 0x100>,
+ <0x00370100 0x100>,
+ <0x00370200 0x200>;
+ reg-names = "bspi", "bspi_raf", "mspi";
+ status = "disabled";
+ };
+
sdio0: sdhci@3f1000 {
compatible = "brcm,iproc-sdhci";
reg = <0x003f1000 0x100>;
--
2.17.1
[PATCH v1 06/15] arm: dts: ns3: add emmc node
From: Pramod Kumar
Add emmc dt nodes for ns3.
Signed-off-by: Pramod Kumar
Signed-off-by: Rayagonda Kokatanur
---
arch/arm/dts/ns3-board.dts | 4
arch/arm/dts/ns3.dtsi | 18 ++
2 files changed, 22 insertions(+)
diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts
index 5926123379..45565c9c73 100644
--- a/arch/arm/dts/ns3-board.dts
+++ b/arch/arm/dts/ns3-board.dts
@@ -46,3 +46,7 @@
&uart1 {
status = "okay";
};
+
+&sdio0 {
+ status = "okay";
+};
diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
index 84464add9a..7f94b922fc 100644
--- a/arch/arm/dts/ns3.dtsi
+++ b/arch/arm/dts/ns3.dtsi
@@ -33,6 +33,24 @@
status = "disabled";
};
+ sdio0: sdhci@3f1000 {
+ compatible = "brcm,iproc-sdhci";
+ reg = <0x003f1000 0x100>;
+ bus-width = <8>;
+ clock-freq-min-max = <40 2>;
+ index = <0>;
+ status = "disabled";
+ };
+
+ sdio1: sdhci@3f2000 {
+ compatible = "brcm,iproc-sdhci";
+ reg = <0x003f2000 0x100>;
+ bus-width = <8>;
+ clock-freq-min-max = <40 2>;
+ index = <1>;
+ status = "disabled";
+ };
+
gpio_hsls: gpio@d {
compatible = "brcm,iproc-gpio";
reg = <0x000d 0x864>;
--
2.17.1
[PATCH v1 09/15] arm: dts: ns3: add i2c node
Add IPROC I2C node for NS3.
Signed-off-by: Rayagonda Kokatanur
---
arch/arm/dts/ns3-board.dts | 1 +
arch/arm/dts/ns3.dtsi | 6 ++
2 files changed, 7 insertions(+)
diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts
index 78a69ac3f9..f8e501c225 100644
--- a/arch/arm/dts/ns3-board.dts
+++ b/arch/arm/dts/ns3-board.dts
@@ -36,6 +36,7 @@
aliases {
serial0 = &uart1;
spi0 = &qspi;
+ i2c0 = &i2c0;
gpio0 = &gpio_hsls;
};
diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
index 7681bbc673..adb1277471 100644
--- a/arch/arm/dts/ns3.dtsi
+++ b/arch/arm/dts/ns3.dtsi
@@ -60,6 +60,12 @@
status = "disabled";
};
+ i2c0:i2c@b {
+ compatible = "brcm,iproc-i2c";
+ reg = <0xb 0x100>;
+ bus-frequency = <10>;
+ };
+
gpio_hsls: gpio@d {
compatible = "brcm,iproc-gpio";
reg = <0x000d 0x864>;
--
2.17.1
[PATCH v1 10/15] arm: dts: ns3: add PAXB PCIe host and phy node
From: Srinath Mannam
Add PAXB PCIe host controller and phy node for NS3.
Signed-off-by: Srinath Mannam
Signed-off-by: Rayagonda Kokatanur
---
arch/arm/dts/ns3-board.dts | 36 +
arch/arm/dts/ns3.dtsi | 158 +
2 files changed, 194 insertions(+)
diff --git a/arch/arm/dts/ns3-board.dts b/arch/arm/dts/ns3-board.dts
index f8e501c225..460ed39132 100644
--- a/arch/arm/dts/ns3-board.dts
+++ b/arch/arm/dts/ns3-board.dts
@@ -67,3 +67,39 @@
&sdio0 {
status = "okay";
};
+
+&pcie0 {
+ status = "okay";
+};
+
+&pcie1 {
+ status = "okay";
+};
+
+&pcie2 {
+ status = "okay";
+};
+
+&pcie3 {
+ status = "okay";
+};
+
+&pcie4 {
+ status = "okay";
+};
+
+&pcie5 {
+ status = "okay";
+};
+
+&pcie6 {
+ status = "okay";
+};
+
+&pcie7 {
+ status = "okay";
+};
+
+&pcie8 {
+ status = "okay";
+};
diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
index adb1277471..9fd59a855e 100644
--- a/arch/arm/dts/ns3.dtsi
+++ b/arch/arm/dts/ns3.dtsi
@@ -5,6 +5,11 @@
#include "skeleton64.dtsi"
+#define PCIE_DMA_RANGES dma-ranges = < \
+ 0x4300 0x00 0x8000 0x00 0x8000 0x00 0x8000 \
+ 0x4300 0x08 0x 0x08 0x 0x08 0x \
+ 0x4300 0x80 0x 0x80 0x 0x80 0x>
+
/ {
compatible = "brcm,ns3";
#address-cells = <2>;
@@ -89,4 +94,157 @@
<&pinmux 145 149 6>;
};
};
+
+ pcie0: pcie@4800 {
+ compatible = "brcm,iproc-pcie-paxb-v2";
+ reg = <0 0x4800 0 0x4000>;
+ bus-range = <0x0 0xff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x8300 0x0 0x4200 0x0 0x4200 0 0x200>,
+ <0x4300 0x4 0x 0x4 0x 0 0x8000>;
+ brcm,pcie-ob;
+ PCIE_DMA_RANGES;
+ phys = <&pcie_phy 0>;
+ phy-names = "pcie-phy";
+ status = "disabled";
+ };
+
+ pcie1: pcie@48004000 {
+ compatible = "brcm,iproc-pcie-paxb-v2";
+ reg = <0 0x48004000 0 0x4000>;
+ bus-range = <0x0 0xff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x8300 0x0 0x4400 0x0 0x4400 0 0x200>,
+ <0x4300 0x4 0x8000 0x4 0x8000 0 0x8000>;
+ brcm,pcie-ob;
+ PCIE_DMA_RANGES;
+ phys = <&pcie_phy 1>;
+ phy-names = "pcie-phy";
+ status = "disabled";
+ };
+
+ pcie2: pcie@48008000 {
+ compatible = "brcm,iproc-pcie-paxb-v2";
+ reg = <0 0x48008000 0 0x4000>;
+ bus-range = <0x0 0xff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x8300 0x0 0x4a00 0x0 0x4a00 0 0x200>,
+ <0x4300 0x5 0x 0x5 0x 0 0x8000>;
+ brcm,pcie-ob;
+ PCIE_DMA_RANGES;
+ phys = <&pcie_phy 2>;
+ phy-names = "pcie-phy";
+ status = "disabled";
+ };
+
+ pcie3: pcie@4800c000 {
+ compatible = "brcm,iproc-pcie-paxb-v2";
+ reg = <0 0x4800c000 0 0x4000>;
+ bus-range = <0x0 0xff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ brcm,pcie-ob;
+ ranges = <0x8300 0x0 0x4c00 0x0 0x4c00 0 0x200>,
+ <0x4300 0x5 0x8000 0x5 0x8000 0 0x8000>;
+ PCIE_DMA_RANGES;
+ phys = <&pcie_phy 3>;
+ phy-names = "pcie-phy";
+ status = "disabled";
+ };
+
+ pcie4: pcie@4801 {
+ compatible = "brcm,iproc-pcie-paxb-v2";
+ reg = <0 0x4801 0 0x4000>;
+ bus-range = <0x0 0xff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ brcm,pcie-ob;
+ ranges = <0x8300 0x0 0x5200 0x0 0x5200 0 0x200>,
+ <0x4300 0x6 0x 0x6 0x 0 0x8000>;
+ PCIE_DMA_RANGES;
+ phys = <&pcie_phy 4>;
+ phy-names = "pcie-phy";
+ status = "disabled";
+ };
+
+ pcie5: pcie@48014000 {
+ compatible = "brcm,iproc-pcie-paxb-v2";
+ reg = <0 0x48014000 0 0x4000>;
+ bus-range = <0x0 0xff>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+
[PATCH v1 12/15] configs: ns3: enable EXT4 and FAT fs support
Enable EXT4 and FAT fs support for ns3. Signed-off-by: Rayagonda Kokatanur --- configs/bcm_ns3_defconfig | 5 + 1 file changed, 5 insertions(+) diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 0f23f30db2..66fbdb20d6 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -20,6 +20,10 @@ CONFIG_CMD_MMC=y CONFIG_CMD_MMC_SWRITE=y # CONFIG_CMD_PINMUX is not set # CONFIG_CMD_SOURCE is not set +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +# CONFIG_DOS_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="ns3-board" CONFIG_DM=y @@ -33,4 +37,5 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y +CONFIG_FAT_WRITE=y CONFIG_SPL_OF_LIBFDT=y -- 2.17.1
[PATCH v1 14/15] arm: dts: ns3: add sp805 watchdog node
From: Pramod Kumar
Add sp805 watchdog dts node for ns3.
Signed-off-by: Pramod Kumar
Signed-off-by: Rayagonda Kokatanur
---
arch/arm/dts/ns3.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
index 9fd59a855e..6962e658d3 100644
--- a/arch/arm/dts/ns3.dtsi
+++ b/arch/arm/dts/ns3.dtsi
@@ -29,6 +29,14 @@
ranges = <0x0 0x0 0x6890 0x1770>;
#include "ns3-pinctrl.dtsi"
+ #include "ns3-clock.dtsi"
+
+ wdt0: watchdog@c {
+ compatible = "arm,sp805-wdt";
+ reg = <0x000c 0x1000>;
+ timeout-sec = <60>;
+ clocks = <&hsls_25m_div2_clk>;
+ };
uart1: uart@11 {
compatible = "snps,dw-apb-uart";
--
2.17.1
[PATCH v1 13/15] configs: ns3: enable sp805 watchdog driver
Enable sp805 watchdog driver for ns3. Signed-off-by: Rayagonda Kokatanur --- configs/bcm_ns3_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 66fbdb20d6..3cb69eff9d 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -37,5 +37,8 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y +# CONFIG_WATCHDOG is not set +CONFIG_WDT=y +CONFIG_WDT_SP805=y CONFIG_FAT_WRITE=y CONFIG_SPL_OF_LIBFDT=y -- 2.17.1
[PATCH v1 15/15] board: ns3: start sp805 watchdog service
Start sp805 watchdog service.
Parse wdt timeout from env and dts, give precedence to env
timeout if defined. Set default timeout to 60s if both env
and dts doesn't specifiy timeout.
Stop the WDT in board late init and start the
WDT service before giving control to Linux.
Signed-off-by: Rayagonda Kokatanur
Signed-off-by: Bharat Kumar Reddy Gooty
Signed-off-by: Pramod Kumar
---
board/broadcom/bcmns3/ns3.c | 56 +
1 file changed, 56 insertions(+)
diff --git a/board/broadcom/bcmns3/ns3.c b/board/broadcom/bcmns3/ns3.c
index 51cab1aad3..37a3cf9d14 100644
--- a/board/broadcom/bcmns3/ns3.c
+++ b/board/broadcom/bcmns3/ns3.c
@@ -11,9 +11,12 @@
#include
#include
#include
+#include
+#include
#include
#include
#include
+#include
#define BANK_OFFSET(bank) ((u64)BCM_NS3_DDR_INFO_BASE + 8 + ((bank) * 16))
@@ -134,6 +137,14 @@ int board_init(void)
int board_late_init(void)
{
+#if CONFIG_IS_ENABLED(WDT)
+ /*
+* Default WDT service is started with 60 sec time out.
+* Disable it and start before giving control to Linux.
+*/
+ wdt_stop(gd->watchdog_dev);
+#endif
+
return 0;
}
@@ -185,12 +196,57 @@ void reset_cpu(ulong level)
}
#ifdef CONFIG_OF_BOARD_SETUP
+#if CONFIG_IS_ENABLED(WDT)
+
+#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
+#define CONFIG_WATCHDOG_TIMEOUT_MSECS (60 * 1000)
+#endif
+#define DEF_TIMEOUT_SEC(CONFIG_WATCHDOG_TIMEOUT_MSECS / 1000)
+
+static int start_wdt(void)
+{
+ u32 timeout = DEF_TIMEOUT_SEC;
+ struct udevice *udev;
+ int rc = 0;
+ u32 wdt_enable;
+
+ wdt_enable = env_get_ulong("wdt_enable", 16, 0);
+ printf("wdt_enable :%u\n", wdt_enable);
+ if (!wdt_enable)
+ return rc;
+
+ rc = uclass_get_device(UCLASS_WDT, 0, &udev);
+ if (rc) {
+ printf("Failed to get wdt rc:%d\n", rc);
+ } else {
+ timeout = env_get_ulong("wdt_timeout_sec", 10, 0);
+ if (!timeout) {
+ if (CONFIG_IS_ENABLED(OF_CONTROL))
+ timeout = dev_read_u32_default(gd->watchdog_dev,
+ "timeout-sec",
+ DEF_TIMEOUT_SEC);
+ }
+ wdt_start(udev, timeout * 1000, 0);
+ printf("Started wdt (%ds timeout)\n", timeout);
+ }
+
+ return rc;
+}
+#else
+static int start_wdt(void)
+{
+ return 0;
+}
+#endif /* CONFIG_WDT */
+
int ft_board_setup(void *fdt, bd_t *bd)
{
gic_lpi_tables_init(BCM_NS3_GIC_LPI_BASE, MAX_GIC_REDISTRIBUTORS);
mem_info_parse_fixup(fdt);
+ start_wdt();
+
return 0;
}
#endif /* CONFIG_OF_BOARD_SETUP */
--
2.17.1
[PATCH v1 11/15] configs: ns3: enable gpt commands
Enable gpt commands for ns3. Signed-off-by: Rayagonda Kokatanur --- configs/bcm_ns3_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index a1ee866e54..0f23f30db2 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -14,6 +14,8 @@ CONFIG_SUPPORT_RAW_INITRD=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="u-boot> " CONFIG_SYS_XTRACE="n" +CONFIG_CMD_GPT=y +CONFIG_CMD_GPT_RENAME=y CONFIG_CMD_MMC=y CONFIG_CMD_MMC_SWRITE=y # CONFIG_CMD_PINMUX is not set -- 2.17.1
[PATCH v1 2/3] board: ns3: add FIT image its file
From: Pramod Kumar
Add FIT image its file.
Signed-off-by: Pramod Kumar
Signed-off-by: Rayagonda Kokatanur
---
board/broadcom/bcmns3/fit/multi.its | 59 +
1 file changed, 59 insertions(+)
create mode 100644 board/broadcom/bcmns3/fit/multi.its
diff --git a/board/broadcom/bcmns3/fit/multi.its
b/board/broadcom/bcmns3/fit/multi.its
new file mode 100644
index 00..a0ff4bc908
--- /dev/null
+++ b/board/broadcom/bcmns3/fit/multi.its
@@ -0,0 +1,59 @@
+/*
+ * U-Boot uImage source file with multiple kernels, ramdisks and FDT blobs
+ */
+
+/dts-v1/;
+
+/ {
+ description = "Various kernels, ramdisks and FDT blobs";
+ #address-cells = <1>;
+
+ images {
+ kernel {
+ description = "Linux kernel Image";
+ data = /incbin/("./Image");
+ type = "kernel";
+ arch = "arm64";
+ os = "linux";
+ compression = "none";
+ load = <0x8008>;
+ entry = <0x8008>;
+ hash-1 {
+ algo = "sha1";
+ };
+ signature {
+ algo = "sha1,rsa2048";
+ key-name-hint = "dev";
+ };
+ };
+
+ fdt-ns3 {
+ description = "FDT Blob";
+ data = /incbin/("./dt-blob.bin");
+ type = "flat_dt";
+ arch = "arm64";
+ compression = "none";
+ hash-1 {
+ algo = "sha1";
+ };
+ signature {
+ algo = "sha1,rsa2048";
+ key-name-hint = "dev";
+ };
+ };
+ };
+
+ configurations {
+ default = "config-ns3";
+ config-ns3 {
+ description = "FIT1 configuration";
+ kernel = "kernel";
+ fdt = "fdt-ns3";
+ signature {
+ algo = "sha1,rsa2048";
+ key-name-hint = "dev";
+ sign-images = "fdt", "kernel";
+ };
+ };
+ };
+};
--
2.17.1
[PATCH v1 0/3] add FIT image support for broadcom NS3 soc
This is third patch set series prepared on top of second
patch set ("add basic driver support for broadcom NS3 soc").
This patch set enables FIT config and add FIT image its
files and keys.
Pramod Kumar (2):
board: ns3: add FIT image its file
board: ns3: add development keys used in FIT
Rayagonda Kokatanur (1):
configs: ns3: enable FIT config
board/broadcom/bcmns3/fit/keys/dev.crt | 21 +
board/broadcom/bcmns3/fit/keys/dev.key | 28
board/broadcom/bcmns3/fit/multi.its| 59 ++
configs/bcm_ns3_defconfig | 5 +++
4 files changed, 113 insertions(+)
create mode 100644 board/broadcom/bcmns3/fit/keys/dev.crt
create mode 100644 board/broadcom/bcmns3/fit/keys/dev.key
create mode 100644 board/broadcom/bcmns3/fit/multi.its
--
2.17.1
[PATCH v1 1/3] configs: ns3: enable FIT config
Enable FIT config for NS3. Signed-off-by: Rayagonda Kokatanur --- configs/bcm_ns3_defconfig | 5 + 1 file changed, 5 insertions(+) diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 3cb69eff9d..b52c6d7d93 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -5,6 +5,11 @@ CONFIG_SYS_TEXT_BASE=0xFF00 CONFIG_ENV_SIZE=0x8 CONFIG_NR_DRAM_BANKS=2 CONFIG_OF_BOARD_SETUP=y +CONFIG_FIT=y +CONFIG_FIT_SIGNATURE=y +CONFIG_FIT_SIGNATURE_MAX_SIZE=0x2000 +CONFIG_FIT_VERBOSE=y +CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_LOGLEVEL=7 CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_U_BOOT_ONLY=y -- 2.17.1
[PATCH v1 3/3] board: ns3: add development keys used in FIT
From: Pramod Kumar Add development keys used in FIT. Signed-off-by: Pramod Kumar Signed-off-by: Rayagonda Kokatanur --- board/broadcom/bcmns3/fit/keys/dev.crt | 21 +++ board/broadcom/bcmns3/fit/keys/dev.key | 28 ++ 2 files changed, 49 insertions(+) create mode 100644 board/broadcom/bcmns3/fit/keys/dev.crt create mode 100644 board/broadcom/bcmns3/fit/keys/dev.key diff --git a/board/broadcom/bcmns3/fit/keys/dev.crt b/board/broadcom/bcmns3/fit/keys/dev.crt new file mode 100644 index 00..75b75db95c --- /dev/null +++ b/board/broadcom/bcmns3/fit/keys/dev.crt @@ -0,0 +1,21 @@ +-BEGIN CERTIFICATE- +MIIDXTCCAkWgAwIBAgIJAJgq/5aiJttEMA0GCSqGSIb3DQEBCwUAMEUxCzAJBgNV +BAYTAkFVMRMwEQYDVQQIDApTb21lLVN0YXRlMSEwHwYDVQQKDBhJbnRlcm5ldCBX +aWRnaXRzIFB0eSBMdGQwHhcNMTgwOTE5MDkzMzEwWhcNMTgxMDE5MDkzMzEwWjBF +MQswCQYDVQQGEwJBVTETMBEGA1UECAwKU29tZS1TdGF0ZTEhMB8GA1UECgwYSW50 +ZXJuZXQgV2lkZ2l0cyBQdHkgTHRkMIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIB +CgKCAQEAzeMQ92YqrejtMCfxjDyHvDW34ATozXSlWsudR+AyCSuJVAIoHEenVh+/ +PuT0+/EMiwsUnLXYBeOsIXDW3k3eHgm88ccb+0g9J6mlHqMaN0tXP+Ua2GFEk2Wv +5Bj5QynorOPoaWL/ecWus2Bvkmyt2pvIpaTjmkUKZ9al3z8WyS6wFlFitXyOWFcK +7Xkl43cOHxYAfbny5loWYDCgpkV+dgYZOoCEmL+Y9HfrQ+uBKGducpzNKeQjX9bn +UT9cleCtHZx0uY4wSGNgfmUMy7oUyVZhFpmjlcfjcfNFcBcoVF6StluoL6v1KRbH +4xJDD/UCn2Uk0S6Zpd7TRc26faOtfwIDAQABo1AwTjAdBgNVHQ4EFgQUZk/KKaWG +p4BtksPdQ8FLzWL/gAIwHwYDVR0jBBgwFoAUZk/KKaWGp4BtksPdQ8FLzWL/gAIw +DAYDVR0TBAUwAwEB/zANBgkqhkiG9w0BAQsFAAOCAQEAPNveTvOC2bw91cUN1e+B +95qFp2Xd5XGiV35F10dT3VN/Iv2dzHlThq7xaJGkA53lHIXgLUUfnDTHJmoluw+t +UCpG8OWCxM0FbT8ZnXR4SmHK8k4yb7iZa7iu+Ey5B6F3247gJpEl+1iYxus0lqQW +E9dTwMf1YP9Jdf+dRoLKAAI0n5J1PMuseQkGdlRBNUcEg+kXqBSz5hq0xkuPRtey +GiAvpg3G93ft84Q4ov7IjAhJkY7whm6WktisU8mFPru3e9EouxjVtAvu6s9gQThm +pvn6hSL2/3gEOP3v9yBsH6//SOgNdVBGZIdX+HkvD8NZLftbIrDaeL/IfKUm/zXB +zA== +-END CERTIFICATE- diff --git a/board/broadcom/bcmns3/fit/keys/dev.key b/board/broadcom/bcmns3/fit/keys/dev.key new file mode 100644 index 00..55b7033e9f --- /dev/null +++ b/board/broadcom/bcmns3/fit/keys/dev.key @@ -0,0 +1,28 @@ +-BEGIN PRIVATE KEY- +MIIEvwIBADANBgkqhkiG9w0BAQEFAASCBKkwggSlAgEAAoIBAQDN4xD3Ziqt6O0w +J/GMPIe8NbfgBOjNdKVay51H4DIJK4lUAigcR6dWH78+5PT78QyLCxSctdgF46wh +cNbeTd4eCbzxxxv7SD0nqaUeoxo3S1c/5RrYYUSTZa/kGPlDKeis4+hpYv95xa6z +YG+SbK3am8ilpOOaRQpn1qXfPxbJLrAWUWK1fI5YVwrteSXjdw4fFgB9ufLmWhZg +MKCmRX52Bhk6gISYv5j0d+tD64EoZ25ynM0p5CNf1udRP1yV4K0dnHS5jjBIY2B+ +ZQzLuhTJVmEWmaOVx+Nx80VwFyhUXpK2W6gvq/UpFsfjEkMP9QKfZSTRLpml3tNF +zbp9o61/AgMBAAECggEBAJ/TZClZk0ob5nyalWVS29/cJ5hs1zgfE/nu1HKmdNEv +jdS8M9z4Nsuhq3msjQ1Da4RInsCkXUT9H3N6QCKkeggBcT6TXYJs6qRuijLFVKWW +A+4i8PsGTxDJQIimZmGgF/KWnaWp5z7lmZ+//fzCBxgMFO+Zl+H7NH+1XmB2fj6/ +bfgnxLbiIqq/2oVJfdjA1Zs2ie3SE5U2hPNiE6TIajFS0PxUOGrojsSQ8z+gfqs3 +hyqo9msAqNQciT79vyXp+3HsxZo9rq5Tk5OtCEfgu0GED/d4/FHbDrZT3TorVYXr +Z3dADxvnnJfBdlQIMetCy/X8z2vKRRXaoWpqg1aiFVECgYEA7Ap5D4nvOie2NXgI +gMPzuYtpH4uF/cZMLGxTKZ3NG4RH6oVUdd4whETXfzBJdnJbIXDTphoHxjUhpGh8 +Ga+U1iqjp9c6Nd8ueVp/c5T1bD8/2RG0QM4iWgPbZDKtj1MqRg7vwAfpJ3kOIc/5 +bKJ4jAopNJMChL6vAZ9+ShPsRqkCgYEA30vbj6K7/giclJnyWkluQTqS8X/XjdAf +F5PkCBHGJnYxkDSzWPq7O5E1wYqTAou1U6nNNoUvZZdpRvo39NSrMCaagQ7GE+xA +j/h7tinD/lPlvoW9N4f4ddqWzsmf7I8OGZtP4IwVi9Pms+zPtrQ7TvuPT4UHTH2E +eE1hlJtic+cCgYEA6oKdNGr+WvEJfqX7DLOiej2f+89LGI7jL1+QYFB/b09FhCNj +fpd57G/ZCmyXEC8di2PlY6mI/8vZ2NZWNc7UONO0NRUIqG1MZxUae2MLUrikXq3Q +QHKMfpJGbo5LEZK29VPxrwAtDSKgf8d5MA1bZwbRWYKVhf1NMnebqU2R+cECgYEA +kOTKXhP85MR1xj928XtAnfcCLs8D8jOgWU5P46SU7ZQ4aRipYA2ivO5m8WWYK0i4 +qsc+MCiQLt3nJHVtJeNyCdai3yfVBEyDQGi+7d+AHGIYbF6f/46tfNwQi7JtobTa +M2eCl3SO7qLbytjZl/avnXrC7Zimuc2gzed4cFO7uPUCgYAo66MLtRWLdHqPDTaa +WhSQZkdKfZxlWNP6XIpBgHnYDIQGZddrjv+zZVFRxLCduh1v8xybbSDKwRkGuXVb +eTQHP2Nc5XsOopCSsDP0v0dUxaOu14C0jJJG2E+EhJsWJ2Eua7o40LEIX2WY7N7f +UqR3bLO5Qh/1OOwJj5WbpzkMwA== +-END PRIVATE KEY- -- 2.17.1
[PATCH v1 0/3] add optee support for broadcom NS3 soc
This is fourth patch set series prepared on top of third
patch set ("add FIT image support for broadcom NS3 soc").
This patch adds optee support.
Vikas Gupta (3):
board: ns3: add optee based bnxt fw load driver
configs: ns3: enable tee and optee driver
arm: dts: ns3: add optee node
arch/arm/dts/ns3.dtsi | 7 ++
board/broadcom/bcmns3/Kconfig | 5 +
board/broadcom/bcmns3/Makefile | 1 +
board/broadcom/bcmns3/chimp_optee.c | 154
configs/bcm_ns3_defconfig | 5 +-
include/brcm/chimp.h| 40
6 files changed, 211 insertions(+), 1 deletion(-)
create mode 100644 board/broadcom/bcmns3/chimp_optee.c
create mode 100644 include/brcm/chimp.h
--
2.17.1
[PATCH v1 3/3] arm: dts: ns3: add optee node
From: Vikas Gupta
Add support for optee
Signed-off-by: Vikas Gupta
Signed-off-by: Rayagonda Kokatanur
---
arch/arm/dts/ns3.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/ns3.dtsi b/arch/arm/dts/ns3.dtsi
index 6962e658d3..509818e23e 100644
--- a/arch/arm/dts/ns3.dtsi
+++ b/arch/arm/dts/ns3.dtsi
@@ -21,6 +21,13 @@
<0x8 0x8000 0x1 0x8000>;
};
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
+
hsls {
compatible = "simple-bus";
dma-ranges;
--
2.17.1
[PATCH v1 2/3] configs: ns3: enable tee and optee driver
From: Vikas Gupta Enable tee and optee drivers. Signed-off-by: Vikas Gupta Signed-off-by: Rayagonda Kokatanur --- configs/bcm_ns3_defconfig | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index b52c6d7d93..13fe9d439e 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -4,12 +4,12 @@ CONFIG_TARGET_BCMNS3=y CONFIG_SYS_TEXT_BASE=0xFF00 CONFIG_ENV_SIZE=0x8 CONFIG_NR_DRAM_BANKS=2 -CONFIG_OF_BOARD_SETUP=y CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_SIGNATURE_MAX_SIZE=0x2000 CONFIG_FIT_VERBOSE=y CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_OF_BOARD_SETUP=y CONFIG_LOGLEVEL=7 CONFIG_SILENT_CONSOLE=y CONFIG_SILENT_U_BOOT_ONLY=y @@ -42,6 +42,9 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y +CONFIG_TEE=y +CONFIG_OPTEE=y +# CONFIG_OPTEE_TA_AVB is not set # CONFIG_WATCHDOG is not set CONFIG_WDT=y CONFIG_WDT_SP805=y -- 2.17.1
[PATCH v1 1/3] board: ns3: add optee based bnxt fw load driver
From: Vikas Gupta
Add optee based bnxt fw load driver.
Signed-off-by: Vikas Gupta
Signed-off-by: Rayagonda Kokatanur
---
board/broadcom/bcmns3/Kconfig | 5 +
board/broadcom/bcmns3/Makefile | 1 +
board/broadcom/bcmns3/chimp_optee.c | 154
include/brcm/chimp.h| 40
4 files changed, 200 insertions(+)
create mode 100644 board/broadcom/bcmns3/chimp_optee.c
create mode 100644 include/brcm/chimp.h
diff --git a/board/broadcom/bcmns3/Kconfig b/board/broadcom/bcmns3/Kconfig
index 8ce21f980d..84daad9415 100644
--- a/board/broadcom/bcmns3/Kconfig
+++ b/board/broadcom/bcmns3/Kconfig
@@ -12,4 +12,9 @@ config SYS_SOC
config SYS_CONFIG_NAME
default "bcm_ns3"
+config CHIMP_OPTEE
+ bool "Enable secure ChiMP firmware loading"
+ depends on OPTEE
+ default y
+
endif
diff --git a/board/broadcom/bcmns3/Makefile b/board/broadcom/bcmns3/Makefile
index 3404260148..08e1d7203b 100644
--- a/board/broadcom/bcmns3/Makefile
+++ b/board/broadcom/bcmns3/Makefile
@@ -3,3 +3,4 @@
# Copyright 2020 Broadcom.
obj-y := ns3.o
+obj-$(CONFIG_CHIMP_OPTEE) += chimp_optee.o
diff --git a/board/broadcom/bcmns3/chimp_optee.c
b/board/broadcom/bcmns3/chimp_optee.c
new file mode 100644
index 00..edbb7afd91
--- /dev/null
+++ b/board/broadcom/bcmns3/chimp_optee.c
@@ -0,0 +1,154 @@
+// SPDX-License-Identifier: BSD-2-Clause
+/*
+ * Copyright 2020 Broadcom.
+ */
+
+#include
+#include
+#include
+
+#define CHMIP_BOOT_UUID { 0x6272636D, 0x2019, 0x0716, \
+ { 0x42, 0x43, 0x4D, 0x5F, 0x53, 0x43, 0x48, 0x49 } }
+
+enum {
+ TEE_CHIMP_FASTBOOT = 0,
+ TEE_CHIMP_HEALTH_STATUS,
+ TEE_CHIMP_HANDSHAKE_STATUS,
+} tee_chmip_cmd;
+
+struct bcm_chimp_data {
+ struct udevice *tee;
+ u32 session;
+} chimp_data;
+
+static int get_open_session(struct bcm_chimp_data *b_data)
+{
+ struct udevice *tee = NULL;
+
+ while (!b_data->tee) {
+ const struct tee_optee_ta_uuid uuid = CHMIP_BOOT_UUID;
+ struct tee_open_session_arg arg;
+ int rc;
+
+ tee = tee_find_device(tee, NULL, NULL, NULL);
+ if (!tee)
+ return -ENODEV;
+
+ memset(&arg, 0, sizeof(arg));
+ tee_optee_ta_uuid_to_octets(arg.uuid, &uuid);
+ rc = tee_open_session(tee, &arg, 0, NULL);
+ if (!rc) {
+ b_data->tee = tee;
+ b_data->session = arg.session;
+ }
+ }
+
+ return 0;
+}
+
+int chimp_handshake_status_optee(u32 timeout, u32 *hs)
+{
+ struct tee_invoke_arg arg;
+ struct tee_param param[1];
+ int ret;
+
+ if (get_open_session(&chimp_data))
+ return BCM_CHIMP_FAILURE;
+
+ memset(&arg, 0, sizeof(arg));
+ arg.func = TEE_CHIMP_HANDSHAKE_STATUS;
+ arg.session = chimp_data.session;
+
+ param[0].attr = TEE_PARAM_ATTR_TYPE_VALUE_INOUT;
+ param[0].u.value.a = timeout;
+
+ if (tee_invoke_func(chimp_data.tee, &arg,
+ ARRAY_SIZE(param), param)) {
+ printf("Handshake status command failed\n");
+ ret = BCM_CHIMP_FAILURE;
+ goto out;
+ }
+ switch (arg.ret) {
+ case TEE_SUCCESS:
+ *hs = param[0].u.value.a;
+ ret = BCM_CHIMP_SUCCESS;
+ break;
+ default:
+ ret = BCM_CHIMP_FAILURE;
+ break;
+ }
+out:
+ tee_close_session(chimp_data.tee, chimp_data.session);
+ chimp_data.tee = NULL;
+
+ return ret;
+}
+
+int chimp_health_status_optee(u32 *health)
+{
+ struct tee_invoke_arg arg;
+ struct tee_param param[1];
+ int ret;
+
+ if (get_open_session(&chimp_data))
+ return BCM_CHIMP_FAILURE;
+
+ memset(&arg, 0, sizeof(arg));
+ arg.func = TEE_CHIMP_HEALTH_STATUS;
+ arg.session = chimp_data.session;
+
+ param[0].attr = TEE_PARAM_ATTR_TYPE_VALUE_OUTPUT;
+
+ if (tee_invoke_func(chimp_data.tee, &arg,
+ ARRAY_SIZE(param), param)) {
+ printf("Helath status command failed\n");
+ ret = BCM_CHIMP_FAILURE;
+ goto out;
+ }
+ switch (arg.ret) {
+ case TEE_SUCCESS:
+ *health = param[0].u.value.a;
+ ret = BCM_CHIMP_SUCCESS;
+ break;
+ default:
+ ret = BCM_CHIMP_FAILURE;
+ break;
+ }
+out:
+ tee_close_session(chimp_data.tee, chimp_data.session);
+ chimp_data.tee = NULL;
+
+ return ret;
+}
+
+int chimp_fastboot_optee(void)
+{
+ struct tee_invoke_arg arg;
+ int ret;
+
+ if (get_open_session(&chimp_data))
+ return BCM_CHIMP_FAILURE;
+
+ memset(&arg, 0, sizeof(arg));
+ arg.func = TEE_CHIMP_FASTBOOT;
+ arg.session = chimp_data.s
[PATCH v1 0/3] add elog support for broadcom NS3 soc
This is fifth patch set series prepared on top of fourth
patch set ("add optee support for broadcom NS3 soc").
This patch adds support for error logging and corresponding command.
Sheetal Tigadoli (1):
common: ns3: add error logging support
Vladimir Olovyannikov (2):
board: ns3: kconfig: extend board kconfig with specific commands
cmd: bcm: add broadcom error log setup command
board/broadcom/bcmns3/Kconfig | 5 +
cmd/Kconfig | 2 +
cmd/Makefile | 2 +
cmd/bcm/Kconfig | 12 +
cmd/bcm/Makefile | 4 +
cmd/bcm/elog.h| 64 +
cmd/bcm/logsetup.c| 432 ++
common/Kconfig| 8 +
common/Makefile | 1 +
common/bcm_elog.c | 49
common/console.c | 22 ++
configs/bcm_ns3_defconfig | 1 +
include/bcm_elog.h| 37 +++
13 files changed, 639 insertions(+)
create mode 100644 cmd/bcm/Kconfig
create mode 100644 cmd/bcm/Makefile
create mode 100644 cmd/bcm/elog.h
create mode 100644 cmd/bcm/logsetup.c
create mode 100644 common/bcm_elog.c
create mode 100644 include/bcm_elog.h
--
2.17.1
[PATCH v1 1/3] common: ns3: add error logging support
From: Sheetal Tigadoli
Add error logging support in uboot for ns3 platform.
We log the bootup msgs from all bootstages(BL2, BL31, BL33, and Linux)
on to DDR. When a watchdog is triggered from any of the bootstages,
CRMU copies these logs to QSPI error logging space.
Later when doing the post-mortem analysis, we parse the QSPI error
log space.
Signed-off-by: Sheetal Tigadoli
Signed-off-by: Rayagonda Kokatanur
---
common/Kconfig| 8 +++
common/Makefile | 1 +
common/bcm_elog.c | 49 +++
common/console.c | 22 ++
configs/bcm_ns3_defconfig | 1 +
include/bcm_elog.h| 37 +
6 files changed, 118 insertions(+)
create mode 100644 common/bcm_elog.c
create mode 100644 include/bcm_elog.h
diff --git a/common/Kconfig b/common/Kconfig
index 30cba15948..3980ba31e0 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -634,6 +634,14 @@ config SYS_STDIO_DEREGISTER
removed (for example a USB keyboard) then this option can be
enabled to ensure this is handled correctly.
+config BCM_ELOG
+ bool "Broadcom error logging support"
+ default n
+ help
+ Enables broadcom error logging support to be used with brcm
+ platforms, say Y to this option to enable the logging support.
+ If unsure, say N.
+
endmenu
menu "Logging"
diff --git a/common/Makefile b/common/Makefile
index 2e7a090588..dced769dcf 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -95,6 +95,7 @@ else
obj-$(CONFIG_SPL_SERIAL_SUPPORT) += console.o
endif
else
+obj-$(CONFIG_BCM_ELOG) += bcm_elog.o
obj-y += console.o
endif # CONFIG_SPL_BUILD
diff --git a/common/bcm_elog.c b/common/bcm_elog.c
new file mode 100644
index 00..8e89a500b9
--- /dev/null
+++ b/common/bcm_elog.c
@@ -0,0 +1,49 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Broadcom.
+ */
+
+#include
+
+/* Log one character */
+int log2ddr(const char ch)
+{
+ u32 offset, len;
+ uintptr_t base = BCM_ELOG_UBOOT_BASE;
+
+ offset = readl(base + BCM_ELOG_OFF_OFFSET);
+ len = readl(base + BCM_ELOG_LEN_OFFSET);
+ writeb(ch, base + offset);
+ offset++;
+
+ /* log buffer is now full and need to wrap around */
+ if (offset >= BCM_ELOG_UBOOT_SIZE)
+ offset = BCM_ELOG_HEADER_LEN;
+
+ /* only increment length when log buffer is not full */
+ if (len < BCM_ELOG_UBOOT_SIZE - BCM_ELOG_HEADER_LEN)
+ len++;
+
+ writel(offset, base + BCM_ELOG_OFF_OFFSET);
+ writel(len, base + BCM_ELOG_LEN_OFFSET);
+
+ return 0;
+}
+
+/* Routine to initialize error logging */
+void bcm_elog_init(uintptr_t base, uint32_t size)
+{
+ u32 val;
+
+ /*
+* If a valid signature is found, it means logging is already
+* initialize. In this case, we should not re-initialize the entry
+* header in the designated memory
+*/
+ val = readl(base + BCM_ELOG_SIG_OFFSET);
+ if (val != BCM_ELOG_SIG_VAL) {
+ writel(base + BCM_ELOG_SIG_OFFSET, BCM_ELOG_SIG_VAL);
+ writel(base + BCM_ELOG_OFF_OFFSET, BCM_ELOG_HEADER_LEN);
+ writel(base + BCM_ELOG_LEN_OFFSET, 0);
+ }
+}
diff --git a/common/console.c b/common/console.c
index e398530a13..a65fdc16c2 100644
--- a/common/console.c
+++ b/common/console.c
@@ -20,6 +20,10 @@
#include
#include
+#ifdef CONFIG_BCM_ELOG
+#include
+#endif
+
DECLARE_GLOBAL_DATA_PTR;
static int on_console(const char *name, const char *value, enum env_op op,
@@ -536,6 +540,9 @@ void putc(const char c)
if (!gd->have_console)
return pre_console_putc(c);
+#ifdef CONFIG_BCM_ELOG
+ log2ddr(c);
+#endif
if (gd->flags & GD_FLG_DEVINIT) {
/* Send to the standard output */
fputc(stdout, c);
@@ -587,6 +594,17 @@ void puts(const char *s)
if (!gd->have_console)
return pre_console_puts(s);
+#ifdef CONFIG_BCM_ELOG
+ {
+ const char *tmp = s;
+
+ while (*tmp) {
+ int c = *tmp++;
+
+ log2ddr(c);
+ }
+ }
+#endif
if (gd->flags & GD_FLG_DEVINIT) {
/* Send to the standard output */
fputs(stdout, s);
@@ -790,6 +808,10 @@ int console_init_f(void)
print_pre_console_buffer(PRE_CONSOLE_FLUSHPOINT1_SERIAL);
+#ifdef CONFIG_BCM_ELOG
+ bcm_elog_init(BCM_ELOG_UBOOT_BASE, BCM_ELOG_UBOOT_SIZE);
+#endif
+
return 0;
}
diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig
index 13fe9d439e..a2201bf0c9 100644
--- a/configs/bcm_ns3_defconfig
+++ b/configs/bcm_ns3_defconfig
@@ -14,6 +14,7 @@ CONFIG_LOGLEVEL=7
CONFIG_SILENT_CONSOLE=y
CONFIG_SILENT_U_BOOT_ONLY=y
# CONFIG_SILENT_CONSOLE_UPDATE_ON_SET is not set
+CONFIG_BCM_ELOG=y
CONFIG_SUPPORT_RAW_INITRD=y
# CONFIG_D
[PATCH v1 3/3] cmd: bcm: add broadcom error log setup command
From: Vladimir Olovyannikov
Add broadcom error log setup command.
Some Broadcom platforms have ability to record event logs by SCP.
- Add a logsetup command which is used to perform initial configuration
of this log.
Move this command to bcm/ directory to be used for Broadcom-specific
U-boot commands.
- Add support for Broadcom-specific commands to Kconfig and to Makefile
in cmd/.
Signed-off-by: Vladimir Olovyannikov
Signed-off-by: Rayagonda Kokatanur
---
board/broadcom/bcmns3/Kconfig | 1 +
cmd/Kconfig | 2 +
cmd/Makefile | 2 +
cmd/bcm/Kconfig | 12 +
cmd/bcm/Makefile | 4 +
cmd/bcm/elog.h| 64 +
cmd/bcm/logsetup.c| 432 ++
7 files changed, 517 insertions(+)
create mode 100644 cmd/bcm/Kconfig
create mode 100644 cmd/bcm/Makefile
create mode 100644 cmd/bcm/elog.h
create mode 100644 cmd/bcm/logsetup.c
diff --git a/board/broadcom/bcmns3/Kconfig b/board/broadcom/bcmns3/Kconfig
index 10547f71de..6a8c7bc7db 100644
--- a/board/broadcom/bcmns3/Kconfig
+++ b/board/broadcom/bcmns3/Kconfig
@@ -15,6 +15,7 @@ config SYS_CONFIG_NAME
config CMD_BCM_EXT_UTILS
bool "Enable Broadcom-specific u-boot commands"
default y
+ select CMD_BCM_LOGSETUP
config CHIMP_OPTEE
bool "Enable secure ChiMP firmware loading"
diff --git a/cmd/Kconfig b/cmd/Kconfig
index 157a33081f..d7b34828fa 100644
--- a/cmd/Kconfig
+++ b/cmd/Kconfig
@@ -2214,4 +2214,6 @@ config CMD_UBIFS
help
UBIFS is a file system for flash devices which works on top of UBI.
+source cmd/bcm/Kconfig
+
endmenu
diff --git a/cmd/Makefile b/cmd/Makefile
index 974ad48b0a..f9925e3a34 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -191,6 +191,8 @@ obj-$(CONFIG_$(SPL_)CMD_TLV_EEPROM) += tlv_eeprom.o
# core command
obj-y += nvedit.o
+obj-$(CONFIG_CMD_BCM_EXT_UTILS) += bcm/
+
obj-$(CONFIG_TI_COMMON_CMD_OPTIONS) += ti/
filechk_data_gz = (echo "static const char data_gz[] ="; cat $< |
scripts/bin2c; echo ";")
diff --git a/cmd/bcm/Kconfig b/cmd/bcm/Kconfig
new file mode 100644
index 00..189a45004e
--- /dev/null
+++ b/cmd/bcm/Kconfig
@@ -0,0 +1,12 @@
+menu "Broadcom Extended Utilities"
+
+config CMD_BCM_LOGSETUP
+ bool "Command to setup logging on Broadcom boards"
+ depends on TARGET_BCMNS3
+ default n
+ help
+ Support specific log setup on Broadcom SoCs. This command
+ allows checking if logging support is present, and update
+ log sections.
+
+endmenu
diff --git a/cmd/bcm/Makefile b/cmd/bcm/Makefile
new file mode 100644
index 00..96dc8f7ad7
--- /dev/null
+++ b/cmd/bcm/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright 2020 Broadcom
+
+obj-$(CONFIG_CMD_BCM_LOGSETUP) += logsetup.o
diff --git a/cmd/bcm/elog.h b/cmd/bcm/elog.h
new file mode 100644
index 00..cc36d8739a
--- /dev/null
+++ b/cmd/bcm/elog.h
@@ -0,0 +1,64 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Broadcom
+ */
+
+#ifndef __ELOG_H__
+#define __ELOG_H__
+
+#define GLOBAL_META_HDR_SIG0x45524c47
+#define MAX_REC_COUNT 13
+#define MAX_REC_FORMAT 1
+#define MAX_SRC_TYPE 3
+#define MAX_NVM_TYPE 3
+/* A special type. Use defaults specified in CRMU config */
+#define NVM_DEFAULT0xff
+
+/* Max. number of cmd parameters per elog spec */
+#define PARAM_COUNT3
+
+#define REC_DESC_LENGTH8
+
+enum {
+ LOG_SETUP_CMD_VALIDATE_META,
+ LOG_SETUP_CMD_WRITE_META,
+ LOG_SETUP_CMD_ERASE,
+ LOG_SETUP_CMD_READ,
+ LOG_SETUP_CMD_CHECK
+};
+
+#pragma pack(push, 1)
+
+struct meta_record {
+ u8 record_type;
+ u8 record_format;
+ u8 src_mem_type;
+ u8 alt_src_mem_type;
+ u8 nvm_type;
+ char rec_desc[REC_DESC_LENGTH];
+ u64 src_mem_addr;
+ u64 alt_src_mem_addr;
+ u64 rec_addr;
+ u32 rec_size;
+ u32 sector_size;
+ u8 padding[3];
+};
+
+struct global_header {
+ u32 signature;
+ u32 sector_size;
+ u8 revision;
+ u8 rec_count;
+ u16 padding;
+};
+
+struct log_setup {
+ u32 cmd;
+ u32 params[PARAM_COUNT];
+ u32 result;
+ u32 ret_code;
+};
+
+#pragma pack(pop)
+
+#endif
diff --git a/cmd/bcm/logsetup.c b/cmd/bcm/logsetup.c
new file mode 100644
index 00..271462311d
--- /dev/null
+++ b/cmd/bcm/logsetup.c
@@ -0,0 +1,432 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Broadcom
+ */
+
+/*
+ * Create a binary file ready to be flashed
+ * as a global meta for logging, from a source file.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include "elog.h"
+
+#define FILE_LINE_BUF_SIZE 1024
+#define GLOBAL_PARAM_COUNT 3
+#define REC_PARAM_COUNT11
+
+#define GLOBAL_NAME"GLOBAL"
+#define RECORD_NAME"R
[PATCH v1 2/3] board: ns3: kconfig: extend board kconfig with specific commands
From: Vladimir Olovyannikov Extend Kconfig for the board with board-specific commands selection. Signed-off-by: Vladimir Olovyannikov Signed-off-by: Rayagonda Kokatanur --- board/broadcom/bcmns3/Kconfig | 4 1 file changed, 4 insertions(+) diff --git a/board/broadcom/bcmns3/Kconfig b/board/broadcom/bcmns3/Kconfig index 84daad9415..10547f71de 100644 --- a/board/broadcom/bcmns3/Kconfig +++ b/board/broadcom/bcmns3/Kconfig @@ -12,6 +12,10 @@ config SYS_SOC config SYS_CONFIG_NAME default "bcm_ns3" +config CMD_BCM_EXT_UTILS + bool "Enable Broadcom-specific u-boot commands" + default y + config CHIMP_OPTEE bool "Enable secure ChiMP firmware loading" depends on OPTEE -- 2.17.1
[PATCH v1 0/3] add custome commands for broadcom NS3 soc
This is sixth patch set series prepared on top of fifth
patch set ("add elog support for broadcom NS3 soc").
This patch set adds commands specific to broadcom NS3 soc.
Bharat Kumar Reddy Gooty (1):
cmd: bcm: add command for chimp hand shake
Trac Hoang (1):
cmd: bcm: add nitro boot command
Vikas Gupta (1):
cmd: bcm: add nitro image load commands
cmd/bcm/Makefile | 3 ++
cmd/bcm/chimp_boot.c | 36 ++
cmd/bcm/chimp_handshake.c | 32
cmd/bcm/nitro_image_load.c | 99 ++
include/brcm/chimp.h | 8 +++
5 files changed, 178 insertions(+)
create mode 100644 cmd/bcm/chimp_boot.c
create mode 100644 cmd/bcm/chimp_handshake.c
create mode 100644 cmd/bcm/nitro_image_load.c
--
2.17.1
[PATCH v1 2/3] cmd: bcm: add nitro image load commands
From: Vikas Gupta
Add nitro image load commands.
Signed-off-by: Vikas Gupta
Signed-off-by: Rayagonda Kokatanur
---
cmd/bcm/Makefile | 1 +
cmd/bcm/nitro_image_load.c | 99 ++
2 files changed, 100 insertions(+)
create mode 100644 cmd/bcm/nitro_image_load.c
diff --git a/cmd/bcm/Makefile b/cmd/bcm/Makefile
index dc274f6b96..671c0fbd43 100644
--- a/cmd/bcm/Makefile
+++ b/cmd/bcm/Makefile
@@ -3,3 +3,4 @@
obj-$(CONFIG_CMD_BCM_LOGSETUP) += logsetup.o
obj-y += chimp_boot.o
+obj-y += nitro_image_load.o
diff --git a/cmd/bcm/nitro_image_load.c b/cmd/bcm/nitro_image_load.c
new file mode 100644
index 00..e460b91338
--- /dev/null
+++ b/cmd/bcm/nitro_image_load.c
@@ -0,0 +1,99 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Broadcom
+ */
+
+#include
+#include
+
+#define NITRO_FW_IMAGE_SIG 0xFF123456
+#define NITRO_NS3_CFG_IMAGE_SIG 0xCF54321A
+
+/*structure for Nitro bin file
+ * signature: Nitro fw itb file
+ * size: Nitro fw itb file
+ * signature: Nitro NS3 config file
+ * size: Nitro NS3 config file
+ * Data: Nitro fw itb file
+ *
+ *
+ * Data: Nitro NS3 config file
+ *
+ *
+ */
+
+static struct nitro_img_header {
+ u32 nitro_fw_bin_sig;
+ u32 nitro_fw_bin_size;
+ u32 nitro_fw_cfg1_sig;
+ u32 nitro_fw_cfg1_size;
+ u32 nitro_fw_cfg2_sig;
+ u32 nitro_fw_cfg2_size;
+} *img_header;
+
+static int do_spi_nitro_images_addr(cmd_tbl_t *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ uintptr_t images_load_addr;
+ uintptr_t spi_load_addr;
+ u32 len;
+ u32 spi_data_offset = sizeof(struct nitro_img_header);
+
+ if (argc != 3)
+ return CMD_RET_USAGE;
+
+ /* convert command parameter to fastboot address (base 16), i.e. hex */
+ images_load_addr = (uintptr_t)simple_strtoul(argv[1], NULL, 16);
+ if (!images_load_addr) {
+ pr_err("Invalid load address\n");
+ return CMD_RET_USAGE;
+ }
+
+ spi_load_addr = (uintptr_t)simple_strtoul(argv[2], NULL, 16);
+ if (!spi_load_addr) {
+ pr_err("Invalid spi load address\n");
+ return CMD_RET_USAGE;
+ }
+
+ img_header = (struct nitro_img_header *)images_load_addr;
+
+ if (img_header->nitro_fw_bin_sig != NITRO_FW_IMAGE_SIG) {
+ pr_err("Invalid Nitro bin file\n");
+ return CMD_RET_FAILURE;
+ }
+
+ env_set_hex("spi_nitro_fw_itb_start_addr", (ulong)0);
+ env_set_hex("spi_nitro_fw_itb_len", (ulong)0);
+ env_set_hex("spi_nitro_fw_ns3_cfg_start_addr", (ulong)0);
+ env_set_hex("spi_nitro_fw_ns3_cfg_len", (ulong)0);
+
+ len = img_header->nitro_fw_bin_size;
+
+ env_set_hex("spi_nitro_fw_itb_start_addr", (ulong)
+ (spi_load_addr + spi_data_offset));
+ env_set_hex("spi_nitro_fw_itb_len", (ulong)
+ img_header->nitro_fw_bin_size);
+
+ spi_data_offset += len;
+
+ if (img_header->nitro_fw_cfg1_sig == NITRO_NS3_CFG_IMAGE_SIG) {
+ len = img_header->nitro_fw_cfg1_size;
+
+ env_set_hex("spi_nitro_fw_ns3_cfg_start_addr", (ulong)
+ (spi_load_addr + spi_data_offset));
+ env_set_hex("spi_nitro_fw_ns3_cfg_len", (ulong)len);
+
+ spi_data_offset += len;
+ }
+
+ /* disable nitro secure boot */
+ env_set_hex("nitro_fastboot_secure", (ulong)0);
+
+ return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD
+ (spi_nitro_images_addr, 3, 1, do_spi_nitro_images_addr,
+"Load the nitro bin header and sets envs ",
+"spi_nitro_images_addr \n"
+);
--
2.17.1
[PATCH v1 3/3] cmd: bcm: add command for chimp hand shake
From: Bharat Kumar Reddy Gooty
Add command for chimp handshake.
Signed-off-by: Bharat Kumar Reddy Gooty
Signed-off-by: Rayagonda Kokatanur
---
cmd/bcm/Makefile | 1 +
cmd/bcm/chimp_handshake.c | 32
include/brcm/chimp.h | 6 ++
3 files changed, 39 insertions(+)
create mode 100644 cmd/bcm/chimp_handshake.c
diff --git a/cmd/bcm/Makefile b/cmd/bcm/Makefile
index 671c0fbd43..49a3f38357 100644
--- a/cmd/bcm/Makefile
+++ b/cmd/bcm/Makefile
@@ -3,4 +3,5 @@
obj-$(CONFIG_CMD_BCM_LOGSETUP) += logsetup.o
obj-y += chimp_boot.o
+obj-y += chimp_handshake.o
obj-y += nitro_image_load.o
diff --git a/cmd/bcm/chimp_handshake.c b/cmd/bcm/chimp_handshake.c
new file mode 100644
index 00..7b9c766dd3
--- /dev/null
+++ b/cmd/bcm/chimp_handshake.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Broadcom
+ */
+
+#include
+#include
+
+/* This command should be called after loading the nitro binaries */
+static int do_chimp_hs(cmd_tbl_t *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ int ret = CMD_RET_USAGE;
+ u32 hstatus;
+
+ /* Returns 1, if handshake call is success */
+ if (chimp_handshake_status_optee(0, &hstatus) == BCM_CHIMP_SUCCESS)
+ ret = CMD_RET_SUCCESS;
+
+ if (hstatus == CHIMP_HANDSHAKE_SUCCESS)
+ printf("ChiMP Handshake successful\n");
+ else
+ printf("ERROR: ChiMP Handshake status 0x%x\n", hstatus);
+
+ return ret;
+}
+
+U_BOOT_CMD
+ (chimp_hs, 1, 1, do_chimp_hs,
+"Command to verify the Chimp hand shake",
+"chimp_hs\n"
+);
diff --git a/include/brcm/chimp.h b/include/brcm/chimp.h
index 9099a70ef5..f384603dc7 100644
--- a/include/brcm/chimp.h
+++ b/include/brcm/chimp.h
@@ -15,6 +15,12 @@
#define BCM_CHIMP_RUNNIG_GOOD 0x8000
+enum {
+ CHIMP_HANDSHAKE_SUCCESS = 0,
+ CHIMP_HANDSHAKE_WAIT_ERROR,
+ CHIMP_HANDSHAKE_WAIT_TIMEOUT,
+};
+
#ifdef CONFIG_CHIMP_OPTEE
int chimp_fastboot_optee(void);
int chimp_health_status_optee(u32 *status);
--
2.17.1
[PATCH v1 1/3] cmd: bcm: add nitro boot command
From: Trac Hoang
Add command to boot nitro.
Signed-off-by: Trac Hoang
Signed-off-by: Rayagonda Kokatanur
---
cmd/bcm/Makefile | 1 +
cmd/bcm/chimp_boot.c | 36
include/brcm/chimp.h | 2 ++
3 files changed, 39 insertions(+)
create mode 100644 cmd/bcm/chimp_boot.c
diff --git a/cmd/bcm/Makefile b/cmd/bcm/Makefile
index 96dc8f7ad7..dc274f6b96 100644
--- a/cmd/bcm/Makefile
+++ b/cmd/bcm/Makefile
@@ -2,3 +2,4 @@
# Copyright 2020 Broadcom
obj-$(CONFIG_CMD_BCM_LOGSETUP) += logsetup.o
+obj-y += chimp_boot.o
diff --git a/cmd/bcm/chimp_boot.c b/cmd/bcm/chimp_boot.c
new file mode 100644
index 00..dcab9a5bcb
--- /dev/null
+++ b/cmd/bcm/chimp_boot.c
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2020 Broadcom
+ */
+
+#include
+#include
+#include
+
+static int do_chimp_fastboot_secure(cmd_tbl_t *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ u32 health = 0;
+
+ if (chimp_health_status_optee(&health) != BCM_CHIMP_SUCCESS) {
+ pr_err("Chimp health command fail\n");
+ return CMD_RET_FAILURE;
+ }
+
+ if (health == BCM_CHIMP_RUNNIG_GOOD) {
+ printf("skip fastboot...\n");
+ return CMD_RET_SUCCESS;
+ }
+
+ if (chimp_fastboot_optee() != BCM_CHIMP_SUCCESS) {
+ pr_err("Failed to load secure ChiMP image\n");
+ return CMD_RET_FAILURE;
+ }
+ return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD
+ (chimp_ld_secure, 1, 0, do_chimp_fastboot_secure,
+"Invoke chimp fw load via optee",
+"chimp_ld_secure\n"
+);
diff --git a/include/brcm/chimp.h b/include/brcm/chimp.h
index c3d4594c4b..9099a70ef5 100644
--- a/include/brcm/chimp.h
+++ b/include/brcm/chimp.h
@@ -13,6 +13,8 @@
#define BCM_CHIMP_SUCCESS 0
#define BCM_CHIMP_FAILURE (!BCM_CHIMP_SUCCESS)
+#define BCM_CHIMP_RUNNIG_GOOD 0x8000
+
#ifdef CONFIG_CHIMP_OPTEE
int chimp_fastboot_optee(void);
int chimp_health_status_optee(u32 *status);
--
2.17.1
RE: [PATCH 1/2] cpu: imx8: fix type and rate detection
> Subject: [PATCH 1/2] cpu: imx8: fix type and rate detection
>
> CPU type and rate detection is broken, for A35 cpu we get A53:
> ...
> sc_pm_get_clock_rate: resource:0 clk:2: res:3 Could not read CPU frequency:
> -22
> CPU: NXP i.MX8QXP RevB A53 at 0 MHz at 47C
>
> Fixes: 55bc96f3b675 ("cpu: imx8: fix get core name and rate")
> Signed-off-by: Anatolij Gustschin
> ---
> drivers/cpu/imx8_cpu.c | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/cpu/imx8_cpu.c b/drivers/cpu/imx8_cpu.c index
> 95c14c98d8..896e1ac776 100644
> --- a/drivers/cpu/imx8_cpu.c
> +++ b/drivers/cpu/imx8_cpu.c
> @@ -52,11 +52,11 @@ const char *get_imx8_rev(u32 rev)
>
> const char *get_core_name(struct udevice *dev) {
> - if (!device_is_compatible(dev, "arm,cortex-a35"))
> + if (device_is_compatible(dev, "arm,cortex-a35"))
> return "A35";
> - else if (!device_is_compatible(dev, "arm,cortex-a53"))
> + else if (device_is_compatible(dev, "arm,cortex-a53"))
> return "A53";
> - else if (!device_is_compatible(dev, "arm,cortex-a72"))
> + else if (device_is_compatible(dev, "arm,cortex-a72"))
> return "A72";
> else
> return "?";
> @@ -183,11 +183,11 @@ static ulong imx8_get_cpu_rate(struct udevice
> *dev)
> ulong rate;
> int ret, type;
>
> - if (!device_is_compatible(dev, "arm,cortex-a35"))
> + if (device_is_compatible(dev, "arm,cortex-a35"))
> type = SC_R_A35;
> - else if (!device_is_compatible(dev, "arm,cortex-a53"))
> + else if (device_is_compatible(dev, "arm,cortex-a53"))
> type = SC_R_A53;
> - else if (!device_is_compatible(dev, "arm,cortex-a72"))
> + else if (device_is_compatible(dev, "arm,cortex-a72"))
> type = SC_R_A72;
> else
> return 0;
> --
> 2.17.1
Reviewed-by: Peng Fan
RE: [PATCH 2/2] thermal: imx_scu_thermal: fix getting DT alert property value
Hi Anatolij,
> Subject: [PATCH 2/2] thermal: imx_scu_thermal: fix getting DT alert property
> value
>
> Fix boot hang with endless loop outputting:
> CPU Temperature (47200C) has beyond alert (0C), close to critical (0C)
> waiting...
Could you share more info which part was broken?
Thanks,
Peng.
>
> Signed-off-by: Anatolij Gustschin
> ---
> i.MX8QXP is broken again, this should be appied ASAP!
>
> drivers/thermal/imx_scu_thermal.c | 101 --
> 1 file changed, 41 insertions(+), 60 deletions(-)
>
> diff --git a/drivers/thermal/imx_scu_thermal.c
> b/drivers/thermal/imx_scu_thermal.c
> index da13121a09..679ce4e244 100644
> --- a/drivers/thermal/imx_scu_thermal.c
> +++ b/drivers/thermal/imx_scu_thermal.c
> @@ -57,7 +57,7 @@ int imx_sc_thermal_get_temp(struct udevice *dev, int
> *temp)
> if (ret)
> return ret;
>
> - while (cpu_temp >= pdata->alert) {
> + while (cpu_temp >= pdata->alert && pdata->alert) {
> printf("CPU Temperature (%dC) has beyond alert (%dC), close to
> critical (%dC)",
> cpu_temp, pdata->alert, pdata->critical);
> puts(" waiting...\n");
> @@ -78,7 +78,47 @@ static const struct dm_thermal_ops
> imx_sc_thermal_ops = {
>
> static int imx_sc_thermal_probe(struct udevice *dev) {
> + struct imx_sc_thermal_plat *pdata = dev_get_platdata(dev);
> + struct fdtdec_phandle_args args;
> + ofnode node, trips_np;
> + int ret;
> +
> debug("%s dev name %s\n", __func__, dev->name);
> +
> + trips_np = ofnode_path("/thermal-zones/cpu-thermal0/trips");
> + node = ofnode_get_parent(trips_np);
> + ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, node.of_offset,
> + "thermal-sensors",
> + "#thermal-sensor-cells",
> + 0, 0, &args);
> + if (ret)
> + return ret;
> +
> + if (args.args_count >= 1)
> + pdata->id = args.args[0];
> + else
> + pdata->id = 0;
> +
> + debug("args.args_count %d, id %d\n", args.args_count, pdata->id);
> +
> + pdata->polling_delay = ofnode_read_u32_default(node, "polling-delay",
> +1000);
> + ofnode_for_each_subnode(trips_np, trips_np) {
> + const char *type;
> +
> + type = ofnode_get_property(trips_np, "type", NULL);
> + if (!type)
> + continue;
> + if (!strcmp(type, "critical"))
> + pdata->critical =
> + ofnode_read_u32_default(trips_np, "temperature", 85);
> + else if (!strcmp(type, "passive"))
> + pdata->alert =
> + ofnode_read_u32_default(trips_np, "temperature", 80);
> + }
> +
> + debug("id %d polling_delay %d, critical %d, alert %d\n",
> + pdata->id, pdata->polling_delay, pdata->critical, pdata->alert);
> return 0;
> }
>
> @@ -121,64 +161,6 @@ static int imx_sc_thermal_bind(struct udevice *dev)
> return 0;
> }
>
> -static int imx_sc_thermal_ofdata_to_platdata(struct udevice *dev) -{
> - struct imx_sc_thermal_plat *pdata = dev_get_platdata(dev);
> - struct fdtdec_phandle_args args;
> - const char *type;
> - int ret;
> - int trips_np;
> -
> - debug("%s dev name %s\n", __func__, dev->name);
> -
> - if (pdata->zone_node)
> - return 0;
> -
> - ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, dev_of_offset(dev),
> - "thermal-sensors",
> - "#thermal-sensor-cells",
> - 0, 0, &args);
> - if (ret)
> - return ret;
> -
> - if (args.node != dev_of_offset(dev->parent))
> - return -EFAULT;
> -
> - if (args.args_count >= 1)
> - pdata->id = args.args[0];
> - else
> - pdata->id = 0;
> -
> - debug("args.args_count %d, id %d\n", args.args_count, pdata->id);
> -
> - pdata->polling_delay = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
> - "polling-delay", 1000);
> -
> - trips_np = fdt_subnode_offset(gd->fdt_blob, dev_of_offset(dev),
> - "trips");
> - fdt_for_each_subnode(trips_np, gd->fdt_blob, trips_np) {
> - type = fdt_getprop(gd->fdt_blob, trips_np, "type", NULL);
> - if (type) {
> - if (strcmp(type, "critical") == 0) {
> - pdata->critical = fdtdec_get_int(gd->fdt_blob,
> - trips_np,
> - "temperature",
> - 85);
> - } else if (strcmp(type, "passive
[PATCH v2] efi_loader: round the memory area in efi_add_memory_map()
Virtually all callers of this function do the rounding on their own.
Some do it right, some don't. Instead of doing this in each caller,
do the rounding in efi_add_memory_map(). Change the size parameter
to bytes instead of pages and remove aligning and size calculation in
all callers.
There is no more need to make the original efi_add_memory_map() (which
takes pages as size) available outside the module. Thus rename it to
efi_add_memory_map_pg() and make it static to prevent further misuse
outside the module.
Signed-off-by: Michael Walle
---
changes since v1:
- rebased to latest master
- fixed grammar
I split off this patch of the following series because it touches
many files:
https://lists.denx.de/pipermail/u-boot/2020-May/412065.html
This patch supersede patch 2 and patch 3 of said series.
arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 10 ++---
arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 5 +--
arch/arm/mach-meson/board-common.c | 7 +---
arch/x86/lib/e820.c | 6 +--
board/raspberrypi/rpi/rpi.c | 4 +-
cmd/bootefi.c | 8 +---
drivers/video/meson/meson_vpu.c | 4 +-
drivers/video/sunxi/sunxi_de2.c | 6 +--
drivers/video/sunxi/sunxi_display.c | 6 +--
include/efi_loader.h| 3 +-
lib/efi_loader/efi_memory.c | 54 ++---
lib/efi_loader/efi_runtime.c| 3 +-
12 files changed, 62 insertions(+), 54 deletions(-)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index b3f5c2f641..2cf3f4bb98 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -1529,9 +1529,8 @@ int dram_init_banksize(void)
void efi_add_known_memory(void)
{
int i;
- phys_addr_t ram_start, start;
+ phys_addr_t ram_start;
phys_size_t ram_size;
- u64 pages;
/* Add RAM */
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
@@ -1549,11 +1548,8 @@ void efi_add_known_memory(void)
gd->arch.resv_ram < ram_start + ram_size)
ram_size = gd->arch.resv_ram - ram_start;
#endif
- start = (ram_start + EFI_PAGE_MASK) & ~EFI_PAGE_MASK;
- pages = (ram_size + EFI_PAGE_MASK) >> EFI_PAGE_SHIFT;
-
- efi_add_memory_map(start, pages, EFI_CONVENTIONAL_MEMORY,
- false);
+ efi_add_memory_map(ram_start, ram_size,
+ EFI_CONVENTIONAL_MEMORY);
}
}
#endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index 3bbad827cb..0696ea6d35 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -146,9 +146,8 @@ remove_psci_node:
fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
*boot_code_size);
#if CONFIG_IS_ENABLED(EFI_LOADER)
- efi_add_memory_map((uintptr_t)&secondary_boot_code,
- ALIGN(*boot_code_size, EFI_PAGE_SIZE) >>
EFI_PAGE_SHIFT,
- EFI_RESERVED_MEMORY_TYPE, false);
+ efi_add_memory_map((uintptr_t)&secondary_boot_code, *boot_code_size,
+ EFI_RESERVED_MEMORY_TYPE);
#endif
}
#endif
diff --git a/arch/arm/mach-meson/board-common.c
b/arch/arm/mach-meson/board-common.c
index bc4c92074c..747791b10e 100644
--- a/arch/arm/mach-meson/board-common.c
+++ b/arch/arm/mach-meson/board-common.c
@@ -69,11 +69,8 @@ void meson_board_add_reserved_memory(void *fdt, u64 start,
u64 size)
if (ret)
printf("Could not reserve zone @ 0x%llx\n", start);
- if (IS_ENABLED(CONFIG_EFI_LOADER)) {
- efi_add_memory_map(start,
- ALIGN(size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
- EFI_RESERVED_MEMORY_TYPE, false);
- }
+ if (IS_ENABLED(CONFIG_EFI_LOADER))
+ efi_add_memory_map(start, size, EFI_RESERVED_MEMORY_TYPE);
}
int meson_generate_serial_ethaddr(void)
diff --git a/arch/x86/lib/e820.c b/arch/x86/lib/e820.c
index 26da4d2f27..1f20c5c8c6 100644
--- a/arch/x86/lib/e820.c
+++ b/arch/x86/lib/e820.c
@@ -41,7 +41,7 @@ void efi_add_known_memory(void)
{
struct e820_entry e820[E820MAX];
unsigned int i, num;
- u64 start, pages, ram_top;
+ u64 start, ram_top;
int type;
num = install_e820_map(ARRAY_SIZE(e820), e820);
@@ -77,9 +77,7 @@ void efi_add_known_memory(void)
start + e820[i].size,
ram_top);
} else {
- pages = ALIGN(e820[i].size, EFI_PAGE_SIZE)
- >> EFI_PAGE_SHIFT;
- efi_add_memory_map(start, pages, type, false);
+ efi_add_memory
Re: [PATCH v2] efi_loader: round the memory area in efi_add_memory_map()
On 5/17/20 12:29 PM, Michael Walle wrote: > Virtually all callers of this function do the rounding on their own. > Some do it right, some don't. Instead of doing this in each caller, > do the rounding in efi_add_memory_map(). Change the size parameter > to bytes instead of pages and remove aligning and size calculation in > all callers. > > There is no more need to make the original efi_add_memory_map() (which > takes pages as size) available outside the module. Thus rename it to > efi_add_memory_map_pg() and make it static to prevent further misuse > outside the module. > > Signed-off-by: Michael Walle Reviewed-by: Heinrich Schuchardt > --- > changes since v1: > - rebased to latest master > - fixed grammar
Re: [PATCH 2/2] thermal: imx_scu_thermal: fix getting DT alert property value
Hi Peng, On Sun, 17 May 2020 10:04:58 + Peng Fan peng@nxp.com wrote: > Hi Anatolij, > > > Subject: [PATCH 2/2] thermal: imx_scu_thermal: fix getting DT alert property > > value > > > > Fix boot hang with endless loop outputting: > > CPU Temperature (47200C) has beyond alert (0C), close to critical (0C) > > waiting... > > Could you share more info which part was broken? I've tested i.MX8QXP based capricorn/giedi board (giedi_defconfig, imx8-giedi.dts) and it was not booting: U-Boot SPL 2020.07-rc2-00124-g515f613253 (May 16 2020 - 09:22:49 +0200) Trying to boot from MMC1 Load image from MMC/SD 0x3ec00 U-Boot 2020.07-rc2-00124-g515f613253 (May 16 2020 - 09:22:49 +0200) ##v01.07 sc_pm_get_clock_rate: resource:0 clk:2: res:3 Could not read CPU frequency: -22 CPU Temperature (34800C) has beyond alert (0C), close to critical (0C) waiting... CPU Temperature (35000C) has beyond alert (0C), close to critical (0C) waiting... CPU Temperature (35000C) has beyond alert (0C), close to critical (0C) waiting... CPU Temperature (34800C) has beyond alert (0C), close to critical (0C) waiting... CPU Temperature (34600C) has beyond alert (0C), close to critical (0C) waiting... CPU Temperature (35000C) has beyond alert (0C), close to critical (0C) waiting... ... Other i.MX8QXP based boards might be broken as well. -- Anatolij
Issue with 'ubi part' ubi_io_read: error -74 (ECC error)
Sorry for a bit recalcitrant with the issue of calling 'ubi part" error -74 -EBADMSG, is it MTD issue or u-boot issue? I used Linux kernel 4.19 to flash UBIFS volume images ubi.img to imx6ull NAND using following command in Linux: flash_erase /dev/mtd2 0 0 ubiformat /dev/mtd2 -f ubi.img The flashing image process went well, not errors, but in NAND booting (u-boot version 2018), running "ubi part" stuck following errors: ubi0 error: ubi_io_read: error -74 (ECC error) while reading 64 bytes from PEB 2 35:0, read 64 bytes ubi0 error: ubi_io_read: error -74 (ECC error) while reading 2048 bytes from PEB 235:2048, read 2048 bytes The document says "The -74 error code is -EBADMSG and means an ECC error. In other words, UBI tried to read some data from the flash, but the flash driver found that there is an uncorrectable ECC error, and returned -EBADMSG." My question for ubiformat, how does it write ECC to UBIFS volume partition when it flashed UBIFS image to NAND? In NAND booting, how does the "ubi part" read ECC (DTB) from? Thank you very much, appreciate your kind advice. - j -- "A man can fail many times, but he isn't a failure until he begins to blame somebody else." -- John Burroughs
Re: [PATCH v9 04/18] lib: Makefile: build crc7.c when CONFIG_MMC_SPI
On Wed, May 13, 2020 at 2:27 PM Pragnesh Patel wrote: > > When build U-Boot SPL, meet an issue of undefined reference to > 'crc7' for drivers/mmc/mmc_spi.c, so let's compile crc7.c when > CONFIG_MMC_SPI selected. > > Signed-off-by: Pragnesh Patel > --- > lib/Makefile | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/lib/Makefile b/lib/Makefile > index c6f862b0c2..a6812ea4a3 100644 > --- a/lib/Makefile > +++ b/lib/Makefile > @@ -30,7 +30,6 @@ obj-y += charset.o > endif > endif > obj-$(CONFIG_USB_TTY) += circbuf.o > -obj-y += crc7.o Why not change this line? > obj-y += crc8.o > obj-y += crc16.o > obj-$(CONFIG_ERRNO_STR) += errno_str.o > @@ -90,6 +89,7 @@ obj-y += errno.o > obj-y += display_options.o > CFLAGS_display_options.o := $(if $(BUILD_TAG),-DBUILD_TAG='"$(BUILD_TAG)"') > obj-$(CONFIG_BCH) += bch.o > +obj-$(CONFIG_MMC_SPI) += crc7.o but inserting the changes here? > obj-y += crc32.o > obj-$(CONFIG_CRC32C) += crc32c.o > obj-y += ctype.o > -- Regards, Bin
Re: [PATCH v10 06/18] sifive: fu540: add ddr driver
On Thu, May 14, 2020 at 7:53 PM Pragnesh Patel wrote: > > Add driver for fu540 to support ddr initialization in SPL. > This driver is based on FSBL > (https://github.com/sifive/freedom-u540-c000-bootloader.git) > > Signed-off-by: Pragnesh Patel > --- > board/sifive/fu540/Kconfig | 2 + > drivers/ram/Kconfig| 1 + > drivers/ram/Makefile | 2 + > drivers/ram/sifive/Kconfig | 13 + > drivers/ram/sifive/Makefile| 6 + > drivers/ram/sifive/fu540_ddr.c | 417 + > 6 files changed, 441 insertions(+) > create mode 100644 drivers/ram/sifive/Kconfig > create mode 100644 drivers/ram/sifive/Makefile > create mode 100644 drivers/ram/sifive/fu540_ddr.c > > diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig > index 4330ac4491..d41c305227 100644 > --- a/board/sifive/fu540/Kconfig > +++ b/board/sifive/fu540/Kconfig > @@ -19,6 +19,8 @@ config SYS_TEXT_BASE > config BOARD_SPECIFIC_OPTIONS # dummy > def_bool y > select GENERIC_RISCV > + select RAM > + select SPL_RAM if SPL > imply CMD_DHCP > imply CMD_EXT2 > imply CMD_EXT4 > diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig > index 56fea7c94c..66074d1feb 100644 > --- a/drivers/ram/Kconfig > +++ b/drivers/ram/Kconfig > @@ -75,3 +75,4 @@ config IMXRT_SDRAM > > source "drivers/ram/rockchip/Kconfig" > source "drivers/ram/stm32mp1/Kconfig" > +source "drivers/ram/sifive/Kconfig" nits: please insert this line after the rockchip one, by following the alphabetical order > diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile > index 5c897410c6..769c9d6218 100644 > --- a/drivers/ram/Makefile > +++ b/drivers/ram/Makefile > @@ -17,3 +17,5 @@ obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/ > obj-$(CONFIG_K3_J721E_DDRSS) += k3-j721e/ > > obj-$(CONFIG_IMXRT_SDRAM) += imxrt_sdram.o > + > +obj-$(CONFIG_RAM_SIFIVE) += sifive/ > diff --git a/drivers/ram/sifive/Kconfig b/drivers/ram/sifive/Kconfig > new file mode 100644 > index 00..6aca22ab2a > --- /dev/null > +++ b/drivers/ram/sifive/Kconfig > @@ -0,0 +1,13 @@ > +config RAM_SIFIVE > + bool "Ram drivers support for SiFive SoCs" > + depends on RAM && RISCV > + default y > + help > + This enables support for ram drivers of SiFive SoCs. > + > +config SIFIVE_FU540_DDR > + bool "SiFive FU540 DDR driver" > + depends on RAM_SIFIVE > + default y if TARGET_SIFIVE_FU540 > + help > + This enables DDR support for the platforms based on SiFive FU540 > SoC. > diff --git a/drivers/ram/sifive/Makefile b/drivers/ram/sifive/Makefile > new file mode 100644 > index 00..d66efec264 > --- /dev/null > +++ b/drivers/ram/sifive/Makefile > @@ -0,0 +1,6 @@ > +# SPDX-License-Identifier: GPL-2.0+ > +# > +# Copyright (c) 2020 SiFive, Inc > +# > + > +obj-$(CONFIG_SIFIVE_FU540_DDR) += fu540_ddr.o > diff --git a/drivers/ram/sifive/fu540_ddr.c b/drivers/ram/sifive/fu540_ddr.c > new file mode 100644 > index 00..7ace6447eb > --- /dev/null > +++ b/drivers/ram/sifive/fu540_ddr.c > @@ -0,0 +1,417 @@ > +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause > +/* > + * (C) Copyright 2020 SiFive, Inc. > + * > + * Authors: > + * Pragnesh Patel > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define DENALI_CTL_0 0 > +#define DENALI_CTL_21 21 > +#define DENALI_CTL_120 120 > +#define DENALI_CTL_132 132 > +#define DENALI_CTL_136 136 > +#define DENALI_CTL_170 170 > +#define DENALI_CTL_181 181 > +#define DENALI_CTL_182 182 > +#define DENALI_CTL_184 184 > +#define DENALI_CTL_208 208 > +#define DENALI_CTL_209 209 > +#define DENALI_CTL_210 210 > +#define DENALI_CTL_212 212 > +#define DENALI_CTL_214 214 > +#define DENALI_CTL_216 216 > +#define DENALI_CTL_224 224 > +#define DENALI_CTL_225 225 > +#define DENALI_CTL_260 260 > + > +#define DENALI_PHY_11521152 > +#define DENALI_PHY_12141214 > + > +#define PAYLOAD_DEST 0x8000 > +#define DDR_MEM_SIZE (8UL * 1024UL * 1024UL * 1024UL) > + > +#define DRAM_CLASS_OFFSET 8 > +#define DRAM_CLASS_DDR40xA > +#define OPTIMAL_RMODW_EN_OFFSET0 > +#define DISABLE_RD_INTERLEAVE_OFFSET 16 > +#define OUT_OF_RANGE_OFFSET1 > +#define MULTIPLE_OUT_OF_RANGE_OFFSET 2 > +#define PORT_COMMAND_CHANNEL_ERROR_OFFSET 7 > +#define MC_INIT_COMPLETE_OFFSET8 > +#define LEVELING_OPERATION_COMPLETED_OFFSET22 > +#define DFI_PHY_WRLELV_MODE_OFFSET 24 > +#define DFI_PHY_RDLVL_MODE_OFFSET 24 > +#define DFI_PHY_RDLVL_GATE_MODE_OFFSET 0 > +#define VREF_EN_OFFSET 24 > +#define PORT_ADDR_PROTECTION_EN_OFFSET 0 > +#define AXI0_ADDRESS_RANGE_ENABLE 8 > +#define AXI0_RANGE_PROT_BITS_0_OFFSET 24 > +#define RDLV
Re: [PATCH v2] Nokia RX-51: Add automated test for running RX-51 build in qemu
On Friday 15 May 2020 14:34:55 Tom Rini wrote: > On Fri, May 15, 2020 at 07:40:25PM +0200, Pali Rohár wrote: > > On Friday 15 May 2020 10:16:16 Tom Rini wrote: > > > On Fri, May 15, 2020 at 03:58:20PM +0200, Pali Rohár wrote: > > > > On Friday 15 May 2020 09:53:23 Tom Rini wrote: > > > > > On Fri, May 15, 2020 at 03:51:22PM +0200, Pali Rohár wrote: > > > > > > On Friday 15 May 2020 09:48:48 Tom Rini wrote: > > > > > > > On Fri, May 15, 2020 at 03:46:02PM +0200, Pali Rohár wrote: > > > > > > > > On Friday 15 May 2020 09:20:20 Tom Rini wrote: > > > > > > > > > On Fri, May 15, 2020 at 09:33:47AM +0200, Pali Rohár wrote: > > > > > > > > > > On Thursday 14 May 2020 20:01:19 Tom Rini wrote: > > > > > > > > > > > On Fri, May 15, 2020 at 12:41:52AM +0200, Pali Rohár > > > > > > > > > > > wrote: > > > > > > > > > > > > On Saturday 09 May 2020 16:56:10 Tom Rini wrote: > > > > > > > > > > > > > On Sat, May 09, 2020 at 06:35:40PM +0200, Pali Rohár > > > > > > > > > > > > > wrote: > > > > > > > > > > > > > > On Saturday 09 May 2020 21:58:19 Lokesh Vutla wrote: > > > > > > > > > > > > > > > On 08/05/20 6:40 PM, Tom Rini wrote: > > > > > > > > > > > > > > > > On Fri, May 08, 2020 at 02:52:55PM +0200, Pali > > > > > > > > > > > > > > > > Rohár wrote: > > > > > > > > > > > > > > > >> On Tuesday 28 April 2020 09:37:21 Pali Rohár > > > > > > > > > > > > > > > >> wrote: > > > > > > > > > > > > > > > >>> On Monday 27 April 2020 14:00:47 Tom Rini > > > > > > > > > > > > > > > >>> wrote: > > > > > > > > > > > > > > > I'll take care of that shortly. Otherwise: > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > Reviewed-by: Tom Rini > > > > > > > > > > > > > > > >>> > > > > > > > > > > > > > > > >>> Ok, thank you! > > > > > > > > > > > > > > > >> > > > > > > > > > > > > > > > >> Hello Tom! Will you take whole patch series? > > > > > > > > > > > > > > > >> Or is there anything else > > > > > > > > > > > > > > > >> needed to be done from my side for this N900 > > > > > > > > > > > > > > > >> patch series? > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > Lokesh is the custodian for the TI tree these > > > > > > > > > > > > > > > > days, so whenever it's in > > > > > > > > > > > > > > > > his next PR. Thanks! > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > I see gitlab is failing to build this patch[0]. > > > > > > > > > > > > > > > Does cross compiler needs to be > > > > > > > > > > > > > > > changed? > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > [0] > > > > > > > > > > > > > > > https://gitlab.denx.de/u-boot/custodians/u-boot-ti/-/jobs/91228 > > > > > > > > > > > > > > > > > > > > > > > > > > > > Cross compiler arm-linux-gnueabi-gcc needs to be in > > > > > > > > > > > > > > $PATH. > > > > > > > > > > > > > > > > > > > > > > > > > > > > I figured out that on Travis it is available in > > > > > > > > > > > > > > ~/.buildman-toolchains > > > > > > > > > > > > > > but not exported to $PATH. So for Travis build I > > > > > > > > > > > > > > added... > > > > > > > > > > > > > > > > > > > > > > > > > > > > export > > > > > > > > > > > > > > PATH=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/:$PATH > > > > > > > > > > > > > > > > > > > > > > > > > > > > ... as can be seen in the last patch. > > > > > > > > > > > > > > > > > > > > > > > > > > > > Do you know where is installed arm-linux-gnueabi > > > > > > > > > > > > > > toolchain on Gitlab? > > > > > > > > > > > > > > Maybe Tom knows it as he already wrote that would > > > > > > > > > > > > > > take care of updating > > > > > > > > > > > > > > Gitlab image. > > > > > > > > > > > > > > > > > > > > > > > > > > All of the buildman-fetched toolchains are always in > > > > > > > > > > > > > the same place, so > > > > > > > > > > > > > a similar change to gitlab/azure will fix those. > > > > > > > > > > > > > Thanks! > > > > > > > > > > > > > > > > > > > > > > > > I see that all patches except this one were merged, > > > > > > > > > > > > thanks. > > > > > > > > > > > > > > > > > > > > > > > > Tom, are you going to take look at this last patch? > > > > > > > > > > > > > > > > > > > > > > > > It already passed on travis [1] [2] but I do not have > > > > > > > > > > > > those gitlab and > > > > > > > > > > > > azure accounts to trigger their jobs. But I think that > > > > > > > > > > > > only correct > > > > > > > > > > > > $PATH is needed for azure and gitlab. > > > > > > > > > > > > > > > > > > > > > > > > [1] - https://github.com/u-boot/u-boot/pull/30 > > > > > > > > > > > > [2] - > > > > > > > > > > > > https://travis-ci.org/github/u-boot/u-boot/jobs/679162986 > > > > > > > > > > > > > > > > > > > > > > No, I've been waiting for you to make an attempt at > > > > > > > > > > > fixing the jobs. > > > > > > > > > > > Anyone can get Azure running and there's enough examples > > > > > > > > > > > to make a > > > > > > > > > > > reasonable attem
[PATCH v3] Nokia RX-51: Add automated test for running RX-51 build in qemu
This patch contains test/nokia_rx51_test.sh script which automatically download and compile all needed tools in local temporary directory to generate a simple MTD images for booting Maemo kernel image by U-Boot from RAM, eMMC and OneNAND. MTD images are then run in virtual n900 machine provided by qemu-linaro project. This script does not need any special privileges, so it can be run as non-root nobody user. It can be used to check that U-Boot for Nokia N900 is not broken and can be successfully booted in emulator. Script is registered to .azure-pipelines.yml, .gitlab-ci.yml and .travis.yml so it would be automatically run on those CI services. Signed-off-by: Pali Rohár --- Changes in v3: * Fix job for Azure Changes in v2: * Fix apt dependences for Travis CI * Move definition of Travis job into own section * Add definition for Azure and Gitlab CI services * Add script to MAINTAINERS file * Build U-Boot binary in test script too * Show error message when some dependency for script is missing * Fix addresses for booting kernel from OneNAND * Do all stuff in nokia_rx51_tmp temporary directory * Use upstream mformat (from mtools) for generating FAT32 MBR filesystems (instead of mkfs.fat from dosfstools with custom patches) * Show more verbose log messages * Do not use sudo, instead run parts of script under fakeroot (fakeroot just run binary with own LD_PRELOAD library which emulates mknod() function for later usage by stat() function) * So script can be now run as non-root nobody user and it put all stuff in nokia_rx51_tmp temporary directory, so can be run locally without any issue. --- .azure-pipelines.yml | 13 ++ .gitlab-ci.yml | 8 ++ .travis.yml | 7 + board/nokia/rx51/MAINTAINERS | 1 + test/nokia_rx51_test.sh | 262 +++ 5 files changed, 291 insertions(+) create mode 100755 test/nokia_rx51_test.sh diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 5d9645451d..88438e77a1 100644 --- a/.azure-pipelines.yml +++ b/.azure-pipelines.yml @@ -151,6 +151,19 @@ jobs: # seems to hang forever with pre-configured "container" environment docker run -v $PWD:$(work_dir) $(ci_runner_image) /bin/bash $(work_dir)/build.sh + - job: nokia_rx51_test +displayName: 'Run tests for Nokia RX-51 (aka N900)' +pool: + vmImage: $(ubuntu_vm) +container: + image: $(ci_runner_image) + options: $(container_option) +steps: + - script: | + ./tools/buildman/buildman --fetch-arch arm + export PATH=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/:$PATH + test/nokia_rx51_test.sh + - job: test_py displayName: 'test.py' pool: diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index beaf9b9042..badfcb4254 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -170,6 +170,14 @@ Run binman, buildman, dtoc, Kconfig and patman testsuites: ./tools/patman/patman --test; make testconfig +Run tests for Nokia RX-51 (aka N900): + tags: [ 'all' ] + stage: testsuites + script: +- ./tools/buildman/buildman --fetch-arch arm; + export PATH=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/:$PATH; + test/nokia_rx51_test.sh + # Test sandbox with test.py sandbox test.py: tags: [ 'all' ] diff --git a/.travis.yml b/.travis.yml index fbfaaaff25..bb02b6d816 100644 --- a/.travis.yml +++ b/.travis.yml @@ -50,6 +50,8 @@ addons: - mtools - openssl - sbsigntool +- fakeroot +- mtd-utils install: # Clone uboot-test-hooks @@ -492,6 +494,11 @@ matrix: script: - make tools-only_config envtools -j$(nproc) +- name: "Run tests for Nokia RX-51 (aka N900)" + script: +- export PATH=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/:$PATH +- test/nokia_rx51_test.sh + # test/py - name: "test/py sandbox" env: diff --git a/board/nokia/rx51/MAINTAINERS b/board/nokia/rx51/MAINTAINERS index f2a712620b..58b16bf9a9 100644 --- a/board/nokia/rx51/MAINTAINERS +++ b/board/nokia/rx51/MAINTAINERS @@ -5,3 +5,4 @@ F: board/nokia/rx51/ F: include/configs/nokia_rx51.h F: configs/nokia_rx51_defconfig F: doc/README.nokia_rx51 +F: test/nokia_rx51_test.sh diff --git a/test/nokia_rx51_test.sh b/test/nokia_rx51_test.sh new file mode 100755 index 00..b17542b8c1 --- /dev/null +++ b/test/nokia_rx51_test.sh @@ -0,0 +1,262 @@ +#!/bin/sh -e +# SPDX-License-Identifier: GPL-2.0+ +# (C) 2020 Pali Rohár + +# External tools needed for this test: +echo ' + wget + git + truncate + tar + dpkg + dd + make + gcc + arm-linux-gnueabi-gcc + fakeroot(homepage http://fakeroot-ng.lingnu.com/) + mcopy (from mtools, homepage http://www.gnu.org/software/mtools/) + mformat (from mtools, homepage http://www.gnu.or
Re: [PATCH v10 17/18] configs: fu540: Add config options for U-Boot SPL
Hi Pragnesh, On Thu, May 14, 2020 at 7:54 PM Pragnesh Patel wrote: > > With sifive_fu540_defconfig: > > User can use FSBL or u-boot-spl.bin anyone at a time. > > For FSBL, > fsbl->fw_payload.bin (opensbi + U-Boot) > > For u-boot-spl.bin, > u-boot-spl.bin->FIT image (opensbi + U-Boot proper + dtb) > > U-Boot SPL will be loaded by ZSBL from SD card (replace fsbl.bin with > u-boot-spl.bin) and runs in L2 LIM in machine mode and then load FIT > image u-boot.itb from SD card into RAM. > > U-Boot SPL expects u-boot.itb FIT image at the starting of SD card sector > number (0x822) of GUID type "2E54B353-1271-4842-806F-E436D6AF6985" > > Signed-off-by: Pragnesh Patel > Signed-off-by: Jagan Teki > Reviewed-by: Jagan Teki > --- > configs/sifive_fu540_defconfig | 8 ++ > doc/board/sifive/fu540.rst | 134 + > 2 files changed, 142 insertions(+) > > diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig > index f805aacc7a..8d412f8d6a 100644 > --- a/configs/sifive_fu540_defconfig > +++ b/configs/sifive_fu540_defconfig > @@ -1,6 +1,11 @@ > CONFIG_RISCV=y > +CONFIG_SPL_GPIO_SUPPORT=y > +CONFIG_SYS_MALLOC_F_LEN=0x3000 > CONFIG_ENV_SIZE=0x2 > +CONFIG_SPL_MMC_SUPPORT=y > CONFIG_NR_DRAM_BANKS=1 > +CONFIG_SPL=y > +CONFIG_SPL_SPI_SUPPORT=y > CONFIG_TARGET_SIFIVE_FU540=y > CONFIG_ARCH_RV64I=y > CONFIG_RISCV_SMODE=y > @@ -9,7 +14,10 @@ CONFIG_FIT=y > CONFIG_MISC_INIT_R=y > CONFIG_DISPLAY_CPUINFO=y > CONFIG_DISPLAY_BOARDINFO=y > +CONFIG_SPL_SEPARATE_BSS=y > +CONFIG_SPL_YMODEM_SUPPORT=y > CONFIG_OF_BOARD_FIXUP=y > CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" > CONFIG_SYS_RELOC_GD_ENV_ADDR=y > +CONFIG_SPL_CLK=y > CONFIG_DM_MTD=y > diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/fu540.rst > index 610ba87074..89e8d66c56 100644 > --- a/doc/board/sifive/fu540.rst > +++ b/doc/board/sifive/fu540.rst > @@ -31,6 +31,9 @@ TODO: > stdout-path = "/soc/serial@1001:115200"; > }; > > +Booting from MMC using FSBL > +--- > + > Building > > > @@ -421,3 +424,134 @@ as well. > > Please press Enter to activate this console. > / # > + > +Booting from MMC using U-Boot SPL > +- > + > +Building > + > + > +Before building U-Boot SPL, OpenSBI must be built first. OpenSBI can be > +cloned and built for FU540 as below: > + > +.. code-block:: console > + > + git clone https://github.com/riscv/opensbi.git > + cd opensbi > + make PLATFORM=generic FW_DYNAMIC=y > + > +Copy OpenSBI FW_DYNAMIC image > +(build/platform/generic/firmware/fw_dynamic.bin) into U-Boot > +root directory > + > +.. code-block:: console > + > + cp build/platform/generic/firmware/fw_dynamic.bin > + > +Now build the U-Boot SPL and U-Boot proper > + > +.. code-block:: console > + > + cd > + make sifive_fu540_defconfig > + make > + > +This will generate spl/u-boot-spl.bin and FIT image (u-boot.itb) > + > + > +Flashing > + > + > +ZSBL loads the U-Boot SPL (u-boot-spl.bin) from a partition with GUID type > +5B193300-FC78-40CD-8002-E86C45580B47 > + > +U-Boot SPL expects a U-Boot FIT image (u-boot.itb) from a partition with GUID > +type 2E54B353-1271-4842-806F-E436D6AF6985 > + > +FIT image (u-boot.itb) is a combination of fw_dynamic.bin, u-boot-nodtb.bin > and > +device tree blob (hifive-unleashed-a00.dtb) > + > +Format the SD card (make sure the disk has GPT, otherwise use gdisk to > switch) > + > +.. code-block:: none > + > + # sudo sgdisk --clear \ > + > --set-alignment=2 \ > + > --new=1:34:2081 --change-name=1:loader1 > --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \ > + > --new=2:2082:10273 --change-name=2:loader2 > --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ > + > --new=3:10274: --change-name=3:rootfs > --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \ The LBAs in this command do not match what is proposed in this patch: http://patchwork.ozlabs.org/project/uboot/patch/20200514115258.21042-16-pragnesh.pa...@sifive.com/ > + > /dev/sda > + > +Program the SD card > + > +.. code-block:: none > + > + sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 > + sudo dd if=u-boot.itb of=/dev/sda seek=2082 ditto Regards, Bin
Re: [PATCH v10 11/18] clk: sifive: fu540-prci: Release ethernet clock reset
On Thu, May 14, 2020 at 7:54 PM Pragnesh Patel wrote: > > Release ethernet clock reset once clock is initialized. > This is necessary to do as U-Boot proper needs ethernet > clock. > > Signed-off-by: Pragnesh Patel > --- > drivers/clk/sifive/fu540-prci.c | 20 > 1 file changed, 20 insertions(+) > Reviewed-by: Bin Meng Tested-by: Bin Meng
Re: [PATCH v10 18/18] doc: sifive: fu540: Add description for OpenSBI generic platform
On Thu, May 14, 2020 at 7:55 PM Pragnesh Patel wrote: > > OpenSBI generic platform support provides platform specific > functionality based on the FDT passed by previous booting stage. > > Depends on OpenSBI commit: > platform: Add generic FDT based platform support > (sha1: f1aa9e54e6ae70aeac638d5b75093520f65d) > > Signed-off-by: Pragnesh Patel > --- > doc/board/sifive/fu540.rst | 13 + > 1 file changed, 1 insertion(+), 12 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v10 10/18] clk: sifive: fu540-prci: Add ddr clock initialization
On Thu, May 14, 2020 at 7:54 PM Pragnesh Patel wrote: > > Release ddr clock reset once clock is initialized > > Signed-off-by: Pragnesh Patel > --- > drivers/clk/sifive/fu540-prci.c | 51 + > 1 file changed, 45 insertions(+), 6 deletions(-) > Reviewed-by: Bin Meng Tested-by: Bin Meng
Re: [PATCH v10 07/18] sifive: dts: fu540: Add DDR controller and phy register settings
On Thu, May 14, 2020 at 7:54 PM Pragnesh Patel wrote: > > Add DDR controller and phy register settings, taken from fsbl > (https://github.com/sifive/freedom-u540-c000-bootloader.git) > > Signed-off-by: Pragnesh Patel > --- > .../dts/fu540-hifive-unleashed-a00-ddr.dtsi | 1489 + > 1 file changed, 1489 insertions(+) > create mode 100644 arch/riscv/dts/fu540-hifive-unleashed-a00-ddr.dtsi > Tested-by: Bin Meng
Re: [PATCH v10 13/18] riscv: cpu: fu540: Add support for cpu fu540
On Thu, May 14, 2020 at 7:54 PM Pragnesh Patel wrote: > > Add SiFive fu540 cpu to support RISC-V arch > > Signed-off-by: Pragnesh Patel > --- > arch/riscv/Kconfig | 1 + > arch/riscv/cpu/fu540/Kconfig | 15 ++ > arch/riscv/cpu/fu540/Makefile| 7 + > arch/riscv/cpu/fu540/cpu.c | 22 ++ > arch/riscv/cpu/fu540/dram.c | 38 > arch/riscv/include/asm/arch-fu540/clk.h | 14 + > arch/riscv/include/asm/arch-fu540/gpio.h | 38 > board/sifive/fu540/Kconfig | 2 +- > 8 files changed, 136 insertions(+), 1 deletion(-) > create mode 100644 arch/riscv/cpu/fu540/Kconfig > create mode 100644 arch/riscv/cpu/fu540/Makefile > create mode 100644 arch/riscv/cpu/fu540/cpu.c > create mode 100644 arch/riscv/cpu/fu540/dram.c > create mode 100644 arch/riscv/include/asm/arch-fu540/clk.h > create mode 100644 arch/riscv/include/asm/arch-fu540/gpio.h > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index fb5fe5afff..3044609971 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -57,6 +57,7 @@ source "board/sifive/fu540/Kconfig" > # platform-specific options below > source "arch/riscv/cpu/ax25/Kconfig" > source "arch/riscv/cpu/generic/Kconfig" > +source "arch/riscv/cpu/fu540/Kconfig" nits: please insert this line after the ax25 one by following the alphabetical order > > # architecture-specific options below > Other than that, Reviewed-by: Bin Meng Tested-by: Bin Meng
Re: [PATCH] x86: mtrr: Drop the mask display when changing an mtrr
On Thu, May 7, 2020 at 10:32 PM Bin Meng wrote: > > On Thu, May 7, 2020 at 10:13 PM Simon Glass wrote: > > > > We don't need to print this information since it is shown when the MTRRs > > are displayed. Drop it. > > > > Signed-off-by: Simon Glass > > --- > > > > cmd/x86/mtrr.c | 1 - > > 1 file changed, 1 deletion(-) > > > > Reviewed-by: Bin Meng applied to u-boot-x86, thanks!
Re: patman: ImportError
Hi Simon, Am 17.05.20 um 01:03 schrieb Simon Glass: Hi Stefan, On Sat, 16 May 2020 at 05:27, Stefan Bosch wrote: Hello, recently, I updated my local repository (U-Boot master). Last commit is c693f212c5b0433b3a49a89d87cbff28bf78eb87 now. Previously it has been 4df3578119b043d76b86b50077b06898fc2a4f62 (Date: Wed Dec 18 18:25:42 2019 +0100). Now I get an "ImportError" if I call patman: u-boot_master$ ./tools/patman/patman --help Traceback (most recent call last): File "./tools/patman/patman", line 21, in from patman import checkpatch File "/home/stefan/u-boot_master/tools/patman/../patman/checkpatch.py", line 10, in from patman import command File "/home/stefan/u-boot_master/tools/patman/../patman/command.py", line 8, in from patman import tools File "/home/stefan/u-boot_master/tools/patman/../patman/tools.py", line 13, in from patman import command ImportError: cannot import name 'command' Cause of this 'ImportError' is probably that "from patman import command" has already been done before in checkpatch.py (circular dependency). I think the error has to do with your your commit bf776679a73f3b9eae37aabd2be5754483039cb2 (patman: Move to absolute imports). My Python version is 3.4.3. The circular dependency has been there for some time, but perhaps in Python 2, not Python 3. My Python is 3.6.9 or 3.7.7. I sent a patch to break the circular dependency. Can you please try it and see if it helps? Regards, Simon Thanks for your quick reply. I tried your patch, the good news is that the ImportError for 'command' has been gone. The bad news is that the same occurs for 'checkpatch' now: $ ./tools/patman/patman --help Traceback (most recent call last): File "./tools/patman/patman", line 21, in from patman import checkpatch File "/home/stefan/u-boot_master/tools/patman/../patman/checkpatch.py", line 11, in from patman import gitutil File "/home/stefan/u-boot_master/tools/patman/../patman/gitutil.py", line 10, in from patman import checkpatch ImportError: cannot import name 'checkpatch' Regards, Stefan
Re: [PATCH v2 01/39] tbs2910: Drop the 'bd' command
On Mon, May 11, 2020 at 4:17 AM Simon Glass wrote: > > This board is very close to its limit. Drop this command before the bd > refactoring, which increases the size slightly on one toolchain. > > Signed-off-by: Simon Glass > --- > > Changes in v2: > - Add a new patch to drop the 'bd' command for tbs2910 > > configs/tbs2910_defconfig | 1 + > 1 file changed, 1 insertion(+) > Reviewed-by: Bin Meng
Re: [PATCH v2 14/39] bdinfo: powerpc: Use the generic bd command
On Mon, May 11, 2020 at 4:17 AM Simon Glass wrote: > > Unfortunately PowerPC has a lot of special stuff. Move it into the generic > function for now, so we can have it all in one place. > > Signed-off-by: Simon Glass > --- > > Changes in v2: > - Fix up inadvertent merge of PowerPC/ARM/m68k/arc patches > > cmd/bdinfo.c | 89 > 1 file changed, 41 insertions(+), 48 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 15/39] bdinfo: m68k: Use the generic bd command
On Mon, May 11, 2020 at 4:17 AM Simon Glass wrote: > > Unfortunately m68k has a lot of special stuff. Move it into the generic > function for now, so we can have it all in one place. > > Signed-off-by: Simon Glass > --- > > Changes in v2: > - Fix up inadvertent merge of PowerPC/ARM/m68k/arc patches > > cmd/bdinfo.c | 49 +++-- > 1 file changed, 19 insertions(+), 30 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 16/39] bdinfo: arm: Use the generic bd command
On Mon, May 11, 2020 at 4:17 AM Simon Glass wrote: > > Unfortunately ARM has a lot of special stuff. Move it into the generic > function for now, so we can have it all in one place. > > Signed-off-by: Simon Glass > --- > > Changes in v2: > - Fix up inadvertent merge of PowerPC/ARM/m68k/arc patches > > cmd/bdinfo.c | 102 ++- > 1 file changed, 44 insertions(+), 58 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 17/39] bdinfo: arc: Use the generic bd command
On Mon, May 11, 2020 at 4:17 AM Simon Glass wrote: > > There is nothing new in the arc 'bd' command beyond what is already there. > Switch it over to use the generic code. > > Signed-off-by: Simon Glass > --- > > Changes in v2: > - Fix up inadvertent merge of PowerPC/ARM/m68k/arc patches > > cmd/bdinfo.c | 12 +--- > 1 file changed, 1 insertion(+), 11 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 26/39] bdinfo: Drop print_bi_flash()
On Mon, May 11, 2020 at 4:17 AM Simon Glass wrote: > > This function only has three lines of code in it so inline it. This helps > to put all the code in one place for future partitioning. > > Signed-off-by: Simon Glass > --- > > Changes in v2: > - Update commit message with an extra motivation > > cmd/bdinfo.c | 11 +++ > 1 file changed, 3 insertions(+), 8 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v2 30/39] bdinfo: net: Drop legacy ethernet bdinfo
On Mon, May 11, 2020 at 4:17 AM Simon Glass wrote: > > This code pre-dates driver model and the migration date is nearly upon us. > Pare the print_eths() function down and enable it for driver model, since > it works correctly. > > The IP address is already printed in print_eth_ip_addr() so we can remove > that. > > Since this results in a one-line print_eths() function, inline it. > > Signed-off-by: Simon Glass > --- > > Changes in v2: > - Squash in the next patch to inline print_eths() > > cmd/bdinfo.c | 26 ++ > 1 file changed, 2 insertions(+), 24 deletions(-) > Reviewed-by: Bin Meng
Re: [PATCH v3 1/3] arch: x86: apl: Only load VBT if CONFIG_HAVE_VBT is enabled
Hi Bernhard,
On Tue, May 12, 2020 at 3:35 PM Bernhard Messerklinger
wrote:
>
> Only load VBT if it's present in the u-boot.rom.
>
> Signed-off-by: Bernhard Messerklinger
>
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/x86/cpu/apollolake/fsp_s.c | 46 ++---
> 1 file changed, 25 insertions(+), 21 deletions(-)
>
> diff --git a/arch/x86/cpu/apollolake/fsp_s.c b/arch/x86/cpu/apollolake/fsp_s.c
> index 7ef169b147..9b13b16eaf 100644
> --- a/arch/x86/cpu/apollolake/fsp_s.c
> +++ b/arch/x86/cpu/apollolake/fsp_s.c
> @@ -327,28 +327,32 @@ int fsps_update_config(struct udevice *dev, ulong
> rom_offset,
> {
> struct fsp_s_config *cfg = &upd->config;
> struct apl_config *apl;
> - struct binman_entry vbt;
> - void *buf;
> - int ret;
> -
> - ret = binman_entry_find("intel-vbt", &vbt);
> - if (ret)
> - return log_msg_ret("Cannot find VBT", ret);
> - vbt.image_pos += rom_offset;
> - buf = malloc(vbt.size);
> - if (!buf)
> - return log_msg_ret("Alloc VBT", -ENOMEM);
>
> - /*
> -* Load VBT before devicetree-specific config. This only supports
> -* memory-mapped SPI at present.
nits: * is not aligned
> -*/
> - bootstage_start(BOOTSTAGE_ID_ACCUM_MMAP_SPI, "mmap_spi");
> - memcpy(buf, (void *)vbt.image_pos, vbt.size);
> - bootstage_accum(BOOTSTAGE_ID_ACCUM_MMAP_SPI);
> - if (*(u32 *)buf != VBT_SIGNATURE)
> - return log_msg_ret("VBT signature", -EINVAL);
> - cfg->graphics_config_ptr = (ulong)buf;
> + if (IS_ENABLED(CONFIG_HAVE_VBT)) {
> + struct binman_entry vbt;
> + void *vbt_buf;
> + int ret;
> +
> + ret = binman_entry_find("intel-vbt", &vbt);
> + if (ret)
> + return log_msg_ret("Cannot find VBT", ret);
> + vbt.image_pos += rom_offset;
> + vbt_buf = malloc(vbt.size);
> + if (!vbt_buf)
> + return log_msg_ret("Alloc VBT", -ENOMEM);
> +
> + /*
> + * Load VBT before devicetree-specific config. This only
> supports
> + * memory-mapped SPI at present.
> + */
> + bootstage_start(BOOTSTAGE_ID_ACCUM_MMAP_SPI, "mmap_spi");
> + memcpy(vbt_buf, (void *)vbt.image_pos, vbt.size);
> + bootstage_accum(BOOTSTAGE_ID_ACCUM_MMAP_SPI);
> + if (*(u32 *)vbt_buf != VBT_SIGNATURE)
> + return log_msg_ret("VBT signature", -EINVAL);
> +
> + cfg->graphics_config_ptr = (ulong)vbt_buf;
> + }
>
> apl = malloc(sizeof(*apl));
> if (!apl)
> --
Reviewed-by: Bin Meng
Regards,
Bin
Re: [PATCH v3 2/3] arch: x86: apl: Use devicetree for FSP-M configuration
Hi Simon, On Tue, May 12, 2020 at 3:35 PM Bernhard Messerklinger wrote: > > A the moment the FSP-M configuration is a mix of hard coded values and > devicetree properties. > This patch makes FSP-M full configurable from devicetree by adding > binding properties for all FSP-M parameters. > Co-developed-by: Wolfgang Wallner > Signed-off-by: Wolfgang Wallner > Signed-off-by: Bernhard Messerklinger > > > --- > > Changes in v3: > Enable fspm,dual-rank-support-enable on chromebook coral > Split patch into FSP-M and FSP-S > > Changes in v2: None > > arch/x86/cpu/apollolake/Makefile | 1 + > arch/x86/cpu/apollolake/fsp_bindings.c| 614 ++ > arch/x86/cpu/apollolake/fsp_m.c | 169 + > arch/x86/dts/chromebook_coral.dts | 38 +- > .../asm/arch-apollolake/fsp/fsp_m_upd.h | 168 + > .../asm/arch-apollolake/fsp_bindings.h| 96 +++ > .../fsp/fsp2/apollolake/fsp-m.txt | 320 + > 7 files changed, 1242 insertions(+), 164 deletions(-) > create mode 100644 arch/x86/cpu/apollolake/fsp_bindings.c > create mode 100644 arch/x86/include/asm/arch-apollolake/fsp_bindings.h > create mode 100644 doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-m.txt > Could you please give a "Reviewed-by" or "Tested-by"? Regards, Bin
Re: [PATCH v3 3/3] arch: x86: apl: Use devicetree for FSP-S configuration
Hi Simon, On Tue, May 12, 2020 at 3:35 PM Bernhard Messerklinger wrote: > > A the moment the FSP-S configuration is a mix of hard coded values and > devicetree properties. > This patch makes FSP-S full configurable from devicetree by > adding binding properties for all FSP-S parameters. > Co-developed-by: Wolfgang Wallner > Signed-off-by: Wolfgang Wallner > Signed-off-by: Bernhard Messerklinger > > > --- > > Changes in v3: > Split patch into FSP-M and FSP-S > Fix #if defined macro for FSP-S path to reduce SPL size > > Changes in v2: > Integration of the review comments > Fix swizzle size bug > > arch/x86/cpu/apollolake/fsp_bindings.c| 1189 + > arch/x86/cpu/apollolake/fsp_s.c | 386 +- > arch/x86/dts/chromebook_coral.dts | 35 +- > .../asm/arch-apollolake/fsp/fsp_s_upd.h | 202 +++ > .../asm/arch-apollolake/fsp_bindings.h| 14 + > .../fsp/fsp2/apollolake/fsp-s.txt | 483 +++ > 6 files changed, 1922 insertions(+), 387 deletions(-) > create mode 100644 doc/device-tree-bindings/fsp/fsp2/apollolake/fsp-s.txt > Could you please give a "Reviewed-by" or "Tested-by"? Regards, Bin
Re: [PATCH v9 04/18] lib: Makefile: build crc7.c when CONFIG_MMC_SPI
Am May 17, 2020 12:02:30 PM UTC schrieb Bin Meng : >On Wed, May 13, 2020 at 2:27 PM Pragnesh Patel > wrote: >> >> When build U-Boot SPL, meet an issue of undefined reference to >> 'crc7' for drivers/mmc/mmc_spi.c, so let's compile crc7.c when >> CONFIG_MMC_SPI selected. >> >> Signed-off-by: Pragnesh Patel >> --- >> lib/Makefile | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/lib/Makefile b/lib/Makefile >> index c6f862b0c2..a6812ea4a3 100644 >> --- a/lib/Makefile >> +++ b/lib/Makefile >> @@ -30,7 +30,6 @@ obj-y += charset.o >> endif >> endif >> obj-$(CONFIG_USB_TTY) += circbuf.o >> -obj-y += crc7.o > >Why not change this line? This line is inside an if statement and ignored when building SPL. The patch fixes two issues: * building crc7 when not needed in main U-Boot * not building crc7 when required in SPL > >> obj-y += crc8.o >> obj-y += crc16.o >> obj-$(CONFIG_ERRNO_STR) += errno_str.o >> @@ -90,6 +89,7 @@ obj-y += errno.o >> obj-y += display_options.o >> CFLAGS_display_options.o := $(if >$(BUILD_TAG),-DBUILD_TAG='"$(BUILD_TAG)"') >> obj-$(CONFIG_BCH) += bch.o >> +obj-$(CONFIG_MMC_SPI) += crc7.o > >but inserting the changes here? This line is after the endif. Best regards Heinrich > >> obj-y += crc32.o >> obj-$(CONFIG_CRC32C) += crc32c.o >> obj-y += ctype.o >> -- > >Regards, >Bin
Re: [PATCH] x86: coreboot: add SMBIOS cbmem entry parsing
On Thu, May 14, 2020 at 9:16 PM Christian Gmeiner wrote: > > Signed-off-by: Christian Gmeiner > --- > arch/x86/cpu/coreboot/tables.c | 14 ++ > arch/x86/include/asm/arch-coreboot/sysinfo.h | 2 ++ > arch/x86/include/asm/coreboot_tables.h | 11 +++ > 3 files changed, 27 insertions(+) > Reviewed-by: Bin Meng
Re: [PATCH v9 04/18] lib: Makefile: build crc7.c when CONFIG_MMC_SPI
On Sun, May 17, 2020 at 10:28 PM Heinrich Schuchardt wrote: > > Am May 17, 2020 12:02:30 PM UTC schrieb Bin Meng : > >On Wed, May 13, 2020 at 2:27 PM Pragnesh Patel > > wrote: > >> > >> When build U-Boot SPL, meet an issue of undefined reference to > >> 'crc7' for drivers/mmc/mmc_spi.c, so let's compile crc7.c when > >> CONFIG_MMC_SPI selected. > >> > >> Signed-off-by: Pragnesh Patel > >> --- > >> lib/Makefile | 2 +- > >> 1 file changed, 1 insertion(+), 1 deletion(-) > >> > >> diff --git a/lib/Makefile b/lib/Makefile > >> index c6f862b0c2..a6812ea4a3 100644 > >> --- a/lib/Makefile > >> +++ b/lib/Makefile > >> @@ -30,7 +30,6 @@ obj-y += charset.o > >> endif > >> endif > >> obj-$(CONFIG_USB_TTY) += circbuf.o > >> -obj-y += crc7.o > > > >Why not change this line? > > This line is inside an if statement and ignored when building SPL. > > The patch fixes two issues: > > * building crc7 when not needed in main U-Boot > * not building crc7 when required in SPL Thanks for the clarifications! Reviewed-by: Bin Meng
RE: [PATCH v10 13/18] riscv: cpu: fu540: Add support for cpu fu540
Hi Bin, >-Original Message- >From: Bin Meng >Sent: 17 May 2020 18:30 >To: Pragnesh Patel >Cc: U-Boot Mailing List ; Atish Patra >; Palmer Dabbelt ; Paul >Walmsley ; Jagan Teki >; Anup Patel ; Sagar >Kadam ; Rick Chen ; Palmer >Dabbelt ; Lukas Auer >; Simon Glass >Subject: Re: [PATCH v10 13/18] riscv: cpu: fu540: Add support for cpu fu540 > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >On Thu, May 14, 2020 at 7:54 PM Pragnesh Patel > wrote: >> >> Add SiFive fu540 cpu to support RISC-V arch >> >> Signed-off-by: Pragnesh Patel >> --- >> arch/riscv/Kconfig | 1 + >> arch/riscv/cpu/fu540/Kconfig | 15 ++ >> arch/riscv/cpu/fu540/Makefile| 7 + >> arch/riscv/cpu/fu540/cpu.c | 22 ++ >> arch/riscv/cpu/fu540/dram.c | 38 >> arch/riscv/include/asm/arch-fu540/clk.h | 14 + >> arch/riscv/include/asm/arch-fu540/gpio.h | 38 >> board/sifive/fu540/Kconfig | 2 +- >> 8 files changed, 136 insertions(+), 1 deletion(-) create mode 100644 >> arch/riscv/cpu/fu540/Kconfig create mode 100644 >> arch/riscv/cpu/fu540/Makefile create mode 100644 >> arch/riscv/cpu/fu540/cpu.c create mode 100644 >> arch/riscv/cpu/fu540/dram.c create mode 100644 >> arch/riscv/include/asm/arch-fu540/clk.h >> create mode 100644 arch/riscv/include/asm/arch-fu540/gpio.h >> >> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index >> fb5fe5afff..3044609971 100644 >> --- a/arch/riscv/Kconfig >> +++ b/arch/riscv/Kconfig >> @@ -57,6 +57,7 @@ source "board/sifive/fu540/Kconfig" >> # platform-specific options below >> source "arch/riscv/cpu/ax25/Kconfig" >> source "arch/riscv/cpu/generic/Kconfig" >> +source "arch/riscv/cpu/fu540/Kconfig" > >nits: please insert this line after the ax25 one by following the alphabetical >order Will update in v11. > >> >> # architecture-specific options below >> > >Other than that, >Reviewed-by: Bin Meng >Tested-by: Bin Meng Thanks for the review and testing.
RE: [PATCH v10 17/18] configs: fu540: Add config options for U-Boot SPL
Hi Bin, >-Original Message- >From: Bin Meng >Sent: 17 May 2020 18:28 >To: Pragnesh Patel >Cc: U-Boot Mailing List ; Atish Patra >; Palmer Dabbelt ; Paul >Walmsley ; Jagan Teki >; Anup Patel ; Sagar >Kadam ; Rick Chen ; Palmer >Dabbelt >Subject: Re: [PATCH v10 17/18] configs: fu540: Add config options for U-Boot >SPL > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >Hi Pragnesh, > >On Thu, May 14, 2020 at 7:54 PM Pragnesh Patel > wrote: >> >> With sifive_fu540_defconfig: >> >> User can use FSBL or u-boot-spl.bin anyone at a time. >> >> For FSBL, >> fsbl->fw_payload.bin (opensbi + U-Boot) >> >> For u-boot-spl.bin, >> u-boot-spl.bin->FIT image (opensbi + U-Boot proper + dtb) >> >> U-Boot SPL will be loaded by ZSBL from SD card (replace fsbl.bin with >> u-boot-spl.bin) and runs in L2 LIM in machine mode and then load FIT >> image u-boot.itb from SD card into RAM. >> >> U-Boot SPL expects u-boot.itb FIT image at the starting of SD card >> sector number (0x822) of GUID type "2E54B353-1271-4842-806F- >E436D6AF6985" >> >> Signed-off-by: Pragnesh Patel >> Signed-off-by: Jagan Teki >> Reviewed-by: Jagan Teki >> --- >> configs/sifive_fu540_defconfig | 8 ++ >> doc/board/sifive/fu540.rst | 134 + >> 2 files changed, 142 insertions(+) >> >> diff --git a/configs/sifive_fu540_defconfig >> b/configs/sifive_fu540_defconfig index f805aacc7a..8d412f8d6a 100644 >> --- a/configs/sifive_fu540_defconfig >> +++ b/configs/sifive_fu540_defconfig >> @@ -1,6 +1,11 @@ >> CONFIG_RISCV=y >> +CONFIG_SPL_GPIO_SUPPORT=y >> +CONFIG_SYS_MALLOC_F_LEN=0x3000 >> CONFIG_ENV_SIZE=0x2 >> +CONFIG_SPL_MMC_SUPPORT=y >> CONFIG_NR_DRAM_BANKS=1 >> +CONFIG_SPL=y >> +CONFIG_SPL_SPI_SUPPORT=y >> CONFIG_TARGET_SIFIVE_FU540=y >> CONFIG_ARCH_RV64I=y >> CONFIG_RISCV_SMODE=y >> @@ -9,7 +14,10 @@ CONFIG_FIT=y >> CONFIG_MISC_INIT_R=y >> CONFIG_DISPLAY_CPUINFO=y >> CONFIG_DISPLAY_BOARDINFO=y >> +CONFIG_SPL_SEPARATE_BSS=y >> +CONFIG_SPL_YMODEM_SUPPORT=y >> CONFIG_OF_BOARD_FIXUP=y >> CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" >> CONFIG_SYS_RELOC_GD_ENV_ADDR=y >> +CONFIG_SPL_CLK=y >> CONFIG_DM_MTD=y >> diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/fu540.rst >> index 610ba87074..89e8d66c56 100644 >> --- a/doc/board/sifive/fu540.rst >> +++ b/doc/board/sifive/fu540.rst >> @@ -31,6 +31,9 @@ TODO: >> stdout-path = "/soc/serial@1001:115200"; >> }; >> >> +Booting from MMC using FSBL >> +--- >> + >> Building >> >> >> @@ -421,3 +424,134 @@ as well. >> >> Please press Enter to activate this console. >> / # >> + >> +Booting from MMC using U-Boot SPL >> +- >> + >> +Building >> + >> + >> +Before building U-Boot SPL, OpenSBI must be built first. OpenSBI can >> +be cloned and built for FU540 as below: >> + >> +.. code-block:: console >> + >> + git clone https://github.com/riscv/opensbi.git >> + cd opensbi >> + make PLATFORM=generic FW_DYNAMIC=y >> + >> +Copy OpenSBI FW_DYNAMIC image >> +(build/platform/generic/firmware/fw_dynamic.bin) into U-Boot root >> +directory >> + >> +.. code-block:: console >> + >> + cp build/platform/generic/firmware/fw_dynamic.bin >> + >> +Now build the U-Boot SPL and U-Boot proper >> + >> +.. code-block:: console >> + >> + cd >> + make sifive_fu540_defconfig >> + make >> + >> +This will generate spl/u-boot-spl.bin and FIT image (u-boot.itb) >> + >> + >> +Flashing >> + >> + >> +ZSBL loads the U-Boot SPL (u-boot-spl.bin) from a partition with GUID >> +type >> +5B193300-FC78-40CD-8002-E86C45580B47 >> + >> +U-Boot SPL expects a U-Boot FIT image (u-boot.itb) from a partition >> +with GUID type 2E54B353-1271-4842-806F-E436D6AF6985 >> + >> +FIT image (u-boot.itb) is a combination of fw_dynamic.bin, >> +u-boot-nodtb.bin and device tree blob (hifive-unleashed-a00.dtb) >> + >> +Format the SD card (make sure the disk has GPT, otherwise use gdisk >> +to switch) >> + >> +.. code-block:: none >> + >> + # sudo sgdisk --clear \ >> + > --set-alignment=2 \ >> + > --new=1:34:2081 --change-name=1:loader1 --typecode=1:5B193300- >FC78-40CD-8002-E86C45580B47 \ >> + > --new=2:2082:10273 --change-name=2:loader2 -- >typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ >> + > --new=3:10274: --change-name=3:rootfs >> + --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \ > >The LBAs in this command do not match what is proposed in this patch: > >http://patchwork.ozlabs.org/project/uboot/patch/20200514115258.21042- >16-pragnesh.pa...@sifive.com/ I think the LBAs are in decimal here in this patch and hex in the proposed patch. > >> + > /dev/sda >> + >> +Program the SD card >> + >> +.. code-block:: none >> + >> + sudo dd if=spl/u-boot-spl.bin of=/dev/sda seek=34 >> + sudo dd if=u-boot.itb of=/dev/sda seek=2082 > >ditto Same as above
RE: [PATCH v10 06/18] sifive: fu540: add ddr driver
Hi Bin, >-Original Message- >From: Bin Meng >Sent: 17 May 2020 17:38 >To: Pragnesh Patel >Cc: U-Boot Mailing List ; Atish Patra >; Palmer Dabbelt ; Paul >Walmsley ; Jagan Teki >; Anup Patel ; Sagar >Kadam ; Rick Chen ; Palmer >Dabbelt ; Kever Yang ; >YouMin Chen ; Giulio Benetti >; Kevin Scholz ; >Lokesh Vutla >Subject: Re: [PATCH v10 06/18] sifive: fu540: add ddr driver > >[External Email] Do not click links or attachments unless you recognize the >sender and know the content is safe > >On Thu, May 14, 2020 at 7:53 PM Pragnesh Patel > wrote: >> >> Add driver for fu540 to support ddr initialization in SPL. >> This driver is based on FSBL >> (https://github.com/sifive/freedom-u540-c000-bootloader.git) >> >> Signed-off-by: Pragnesh Patel >> --- >> board/sifive/fu540/Kconfig | 2 + >> drivers/ram/Kconfig| 1 + >> drivers/ram/Makefile | 2 + >> drivers/ram/sifive/Kconfig | 13 + >> drivers/ram/sifive/Makefile| 6 + >> drivers/ram/sifive/fu540_ddr.c | 417 >> + >> 6 files changed, 441 insertions(+) >> create mode 100644 drivers/ram/sifive/Kconfig create mode 100644 >> drivers/ram/sifive/Makefile create mode 100644 >> drivers/ram/sifive/fu540_ddr.c >> >> diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig >> index 4330ac4491..d41c305227 100644 >> --- a/board/sifive/fu540/Kconfig >> +++ b/board/sifive/fu540/Kconfig >> @@ -19,6 +19,8 @@ config SYS_TEXT_BASE config >BOARD_SPECIFIC_OPTIONS >> # dummy >> def_bool y >> select GENERIC_RISCV >> + select RAM >> + select SPL_RAM if SPL >> imply CMD_DHCP >> imply CMD_EXT2 >> imply CMD_EXT4 >> diff --git a/drivers/ram/Kconfig b/drivers/ram/Kconfig index >> 56fea7c94c..66074d1feb 100644 >> --- a/drivers/ram/Kconfig >> +++ b/drivers/ram/Kconfig >> @@ -75,3 +75,4 @@ config IMXRT_SDRAM >> >> source "drivers/ram/rockchip/Kconfig" >> source "drivers/ram/stm32mp1/Kconfig" >> +source "drivers/ram/sifive/Kconfig" > >nits: please insert this line after the rockchip one, by following the >alphabetical >order Will update in v11. > >> diff --git a/drivers/ram/Makefile b/drivers/ram/Makefile index >> 5c897410c6..769c9d6218 100644 >> --- a/drivers/ram/Makefile >> +++ b/drivers/ram/Makefile >> @@ -17,3 +17,5 @@ obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/ >> obj-$(CONFIG_K3_J721E_DDRSS) += k3-j721e/ >> >> obj-$(CONFIG_IMXRT_SDRAM) += imxrt_sdram.o >> + >> +obj-$(CONFIG_RAM_SIFIVE) += sifive/ >> diff --git a/drivers/ram/sifive/Kconfig b/drivers/ram/sifive/Kconfig >> new file mode 100644 index 00..6aca22ab2a >> --- /dev/null >> +++ b/drivers/ram/sifive/Kconfig >> @@ -0,0 +1,13 @@ >> +config RAM_SIFIVE >> + bool "Ram drivers support for SiFive SoCs" >> + depends on RAM && RISCV >> + default y >> + help >> + This enables support for ram drivers of SiFive SoCs. >> + >> +config SIFIVE_FU540_DDR >> + bool "SiFive FU540 DDR driver" >> + depends on RAM_SIFIVE >> + default y if TARGET_SIFIVE_FU540 >> + help >> + This enables DDR support for the platforms based on SiFive FU540 >SoC. >> diff --git a/drivers/ram/sifive/Makefile b/drivers/ram/sifive/Makefile >> new file mode 100644 index 00..d66efec264 >> --- /dev/null >> +++ b/drivers/ram/sifive/Makefile >> @@ -0,0 +1,6 @@ >> +# SPDX-License-Identifier: GPL-2.0+ >> +# >> +# Copyright (c) 2020 SiFive, Inc >> +# >> + >> +obj-$(CONFIG_SIFIVE_FU540_DDR) += fu540_ddr.o >> diff --git a/drivers/ram/sifive/fu540_ddr.c >> b/drivers/ram/sifive/fu540_ddr.c new file mode 100644 index >> 00..7ace6447eb >> --- /dev/null >> +++ b/drivers/ram/sifive/fu540_ddr.c >> @@ -0,0 +1,417 @@ >> +// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause >> +/* >> + * (C) Copyright 2020 SiFive, Inc. >> + * >> + * Authors: >> + * Pragnesh Patel >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +#define DENALI_CTL_0 0 >> +#define DENALI_CTL_21 21 >> +#define DENALI_CTL_120 120 >> +#define DENALI_CTL_132 132 >> +#define DENALI_CTL_136 136 >> +#define DENALI_CTL_170 170 >> +#define DENALI_CTL_181 181 >> +#define DENALI_CTL_182 182 >> +#define DENALI_CTL_184 184 >> +#define DENALI_CTL_208 208 >> +#define DENALI_CTL_209 209 >> +#define DENALI_CTL_210 210 >> +#define DENALI_CTL_212 212 >> +#define DENALI_CTL_214 214 >> +#define DENALI_CTL_216 216 >> +#define DENALI_CTL_224 224 >> +#define DENALI_CTL_225 225 >> +#define DENALI_CTL_260 260 >> + >> +#define DENALI_PHY_11521152 >> +#define DENALI_PHY_12141214 >> + >> +#define PAYLOAD_DEST 0x8000 >> +#define DDR_MEM_SIZE (8UL * 1024UL * 1024UL * 1024UL) >> + >> +#define DRAM_CLASS_OFFSET 8 >> +#define DRAM_CLASS_DDR40xA >> +#define OPTIMAL_RMODW_EN_OFFSET0 >> +#define DISABLE_RD_INTERLEAVE_OFFSET
Re: [PATCH v2 01/35] dm: core: Add an ACPI name for the root node
On Mon, May 11, 2020 at 4:34 AM Simon Glass wrote: > > This always has a fixed ACPI name so add it as a driver function. > > Signed-off-by: Simon Glass > Reviewed-by: Wolfgang Wallner > --- > > Changes in v2: None > Changes in v1: > - Capitalise ACPI_OPS_PTR > > drivers/core/root.c | 13 + > 1 file changed, 13 insertions(+) > Reviewed-by: Bin Meng
Re: [PATCH v10 17/18] configs: fu540: Add config options for U-Boot SPL
Hi Pragnesh, On Sun, May 17, 2020 at 10:37 PM Pragnesh Patel wrote: > > Hi Bin, > > >-Original Message- > >From: Bin Meng > >Sent: 17 May 2020 18:28 > >To: Pragnesh Patel > >Cc: U-Boot Mailing List ; Atish Patra > >; Palmer Dabbelt ; Paul > >Walmsley ; Jagan Teki > >; Anup Patel ; Sagar > >Kadam ; Rick Chen ; Palmer > >Dabbelt > >Subject: Re: [PATCH v10 17/18] configs: fu540: Add config options for U-Boot > >SPL > > > >[External Email] Do not click links or attachments unless you recognize the > >sender and know the content is safe > > > >Hi Pragnesh, > > > >On Thu, May 14, 2020 at 7:54 PM Pragnesh Patel > > wrote: > >> > >> With sifive_fu540_defconfig: > >> > >> User can use FSBL or u-boot-spl.bin anyone at a time. > >> > >> For FSBL, > >> fsbl->fw_payload.bin (opensbi + U-Boot) > >> > >> For u-boot-spl.bin, > >> u-boot-spl.bin->FIT image (opensbi + U-Boot proper + dtb) > >> > >> U-Boot SPL will be loaded by ZSBL from SD card (replace fsbl.bin with > >> u-boot-spl.bin) and runs in L2 LIM in machine mode and then load FIT > >> image u-boot.itb from SD card into RAM. > >> > >> U-Boot SPL expects u-boot.itb FIT image at the starting of SD card > >> sector number (0x822) of GUID type "2E54B353-1271-4842-806F- > >E436D6AF6985" > >> > >> Signed-off-by: Pragnesh Patel > >> Signed-off-by: Jagan Teki > >> Reviewed-by: Jagan Teki > >> --- > >> configs/sifive_fu540_defconfig | 8 ++ > >> doc/board/sifive/fu540.rst | 134 + > >> 2 files changed, 142 insertions(+) > >> > >> diff --git a/configs/sifive_fu540_defconfig > >> b/configs/sifive_fu540_defconfig index f805aacc7a..8d412f8d6a 100644 > >> --- a/configs/sifive_fu540_defconfig > >> +++ b/configs/sifive_fu540_defconfig > >> @@ -1,6 +1,11 @@ > >> CONFIG_RISCV=y > >> +CONFIG_SPL_GPIO_SUPPORT=y > >> +CONFIG_SYS_MALLOC_F_LEN=0x3000 > >> CONFIG_ENV_SIZE=0x2 > >> +CONFIG_SPL_MMC_SUPPORT=y > >> CONFIG_NR_DRAM_BANKS=1 > >> +CONFIG_SPL=y > >> +CONFIG_SPL_SPI_SUPPORT=y > >> CONFIG_TARGET_SIFIVE_FU540=y > >> CONFIG_ARCH_RV64I=y > >> CONFIG_RISCV_SMODE=y > >> @@ -9,7 +14,10 @@ CONFIG_FIT=y > >> CONFIG_MISC_INIT_R=y > >> CONFIG_DISPLAY_CPUINFO=y > >> CONFIG_DISPLAY_BOARDINFO=y > >> +CONFIG_SPL_SEPARATE_BSS=y > >> +CONFIG_SPL_YMODEM_SUPPORT=y > >> CONFIG_OF_BOARD_FIXUP=y > >> CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" > >> CONFIG_SYS_RELOC_GD_ENV_ADDR=y > >> +CONFIG_SPL_CLK=y > >> CONFIG_DM_MTD=y > >> diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/fu540.rst > >> index 610ba87074..89e8d66c56 100644 > >> --- a/doc/board/sifive/fu540.rst > >> +++ b/doc/board/sifive/fu540.rst > >> @@ -31,6 +31,9 @@ TODO: > >> stdout-path = "/soc/serial@1001:115200"; > >> }; > >> > >> +Booting from MMC using FSBL > >> +--- > >> + > >> Building > >> > >> > >> @@ -421,3 +424,134 @@ as well. > >> > >> Please press Enter to activate this console. > >> / # > >> + > >> +Booting from MMC using U-Boot SPL > >> +- > >> + > >> +Building > >> + > >> + > >> +Before building U-Boot SPL, OpenSBI must be built first. OpenSBI can > >> +be cloned and built for FU540 as below: > >> + > >> +.. code-block:: console > >> + > >> + git clone https://github.com/riscv/opensbi.git > >> + cd opensbi > >> + make PLATFORM=generic FW_DYNAMIC=y > >> + > >> +Copy OpenSBI FW_DYNAMIC image > >> +(build/platform/generic/firmware/fw_dynamic.bin) into U-Boot root > >> +directory > >> + > >> +.. code-block:: console > >> + > >> + cp build/platform/generic/firmware/fw_dynamic.bin > >> + > >> +Now build the U-Boot SPL and U-Boot proper > >> + > >> +.. code-block:: console > >> + > >> + cd > >> + make sifive_fu540_defconfig > >> + make > >> + > >> +This will generate spl/u-boot-spl.bin and FIT image (u-boot.itb) > >> + > >> + > >> +Flashing > >> + > >> + > >> +ZSBL loads the U-Boot SPL (u-boot-spl.bin) from a partition with GUID > >> +type > >> +5B193300-FC78-40CD-8002-E86C45580B47 > >> + > >> +U-Boot SPL expects a U-Boot FIT image (u-boot.itb) from a partition > >> +with GUID type 2E54B353-1271-4842-806F-E436D6AF6985 > >> + > >> +FIT image (u-boot.itb) is a combination of fw_dynamic.bin, > >> +u-boot-nodtb.bin and device tree blob (hifive-unleashed-a00.dtb) > >> + > >> +Format the SD card (make sure the disk has GPT, otherwise use gdisk > >> +to switch) > >> + > >> +.. code-block:: none > >> + > >> + # sudo sgdisk --clear \ > >> + > --set-alignment=2 \ > >> + > --new=1:34:2081 --change-name=1:loader1 --typecode=1:5B193300- > >FC78-40CD-8002-E86C45580B47 \ > >> + > --new=2:2082:10273 --change-name=2:loader2 -- > >typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \ > >> + > --new=3:10274: --change-name=3:rootfs > >> + --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \ > > > >The LBAs in this command do not match what is proposed in this patch: > > > >http://patchwork.ozlabs.
RE: [PATCH 2/2] thermal: imx_scu_thermal: fix getting DT alert property value
> Subject: Re: [PATCH 2/2] thermal: imx_scu_thermal: fix getting DT alert > property value > > Hi Peng, > > On Sun, 17 May 2020 10:04:58 + > Peng Fan peng@nxp.com wrote: > > > Hi Anatolij, > > > > > Subject: [PATCH 2/2] thermal: imx_scu_thermal: fix getting DT alert > > > property value > > > > > > Fix boot hang with endless loop outputting: > > > CPU Temperature (47200C) has beyond alert (0C), close to critical > > > (0C) waiting... > > > > Could you share more info which part was broken? > > I've tested i.MX8QXP based capricorn/giedi board (giedi_defconfig, > imx8-giedi.dts) and it was not booting: > > U-Boot SPL 2020.07-rc2-00124-g515f613253 (May 16 2020 - 09:22:49 +0200) > Trying to boot from MMC1 Load image from MMC/SD 0x3ec00 > > > U-Boot 2020.07-rc2-00124-g515f613253 (May 16 2020 - 09:22:49 +0200) > ##v01.07 > > sc_pm_get_clock_rate: resource:0 clk:2: res:3 Could not read CPU frequency: > -22 CPU Temperature (34800C) has beyond alert (0C), close to critical (0C) > waiting... > CPU Temperature (35000C) has beyond alert (0C), close to critical (0C) > waiting... > CPU Temperature (35000C) has beyond alert (0C), close to critical (0C) > waiting... > CPU Temperature (34800C) has beyond alert (0C), close to critical (0C) > waiting... > CPU Temperature (34600C) has beyond alert (0C), close to critical (0C) > waiting... > CPU Temperature (35000C) has beyond alert (0C), close to critical (0C) > waiting... Sorry for not be clear, I mean which code change breaks the boot? Thanks, Peng. > ... > > Other i.MX8QXP based boards might be broken as well. > > -- > Anatolij
RE: [ANN] U-Boot v2020.07-rc2 released
> On Sat, May 16, 2020 at 08:10:04AM +, Peng Fan wrote: > > Hi Tom, > > > > > -Original Message- > > > From: U-Boot On Behalf Of Tom Rini > > > Sent: 2020年5月12日 6:29 > > > To: u-boot@lists.denx.de > > > Cc: u-boot-custodi...@lists.denx.de; > > > u-boot-board-maintain...@lists.denx.de > > > Subject: [ANN] U-Boot v2020.07-rc2 released > > > > > > Hey all, > > > > > > It's release day and I've tagged v2020.07-rc2. At this point out we > > > should be seeing stabilization, clean-up and localized new features. > > > > > > Once again, for a changelog, > > > git log --merges v2020.07-rc1..v2020.07-rc2 and as always, I ask for > > > more details in the PRs people send me so I can put them in the merge > commit. > > > > > > I'm planning to follow the every-other-week RC schedule and release > > > on July 6th. I'm also thinking about opening -next again on June > > > 8th as that will give us a bit more time to focus on stability and > > > regression > fixing. > > > > Will you automatically merge sub-maintainers next tree? Or need > > sub-maintainers to send PR to your next tree? Will your next tree rebase > master branch in time? > > So, I forget if I had talked about how I'm running -next for now before or > not. > I expect to be sent a PR for my -next branch rather than automatically > grabbing them from people, and then I take care of merging -next to master > after release. Got it. Thanks, Peng. > > -- > Tom
Re: [PATCH 2/2] thermal: imx_scu_thermal: fix getting DT alert property value
On Sun, 17 May 2020 14:43:39 +
Peng Fan peng@nxp.com wrote:
...
> > CPU Temperature (35000C) has beyond alert (0C), close to critical (0C)
> > waiting...
>
> Sorry for not be clear, I mean which code change breaks the boot?
I didn't bisect this, so I do not know exactly.
Last working revision installed on the board before was
d202f67db077 ("Merge branch '2020-04-25-master-imports'").
Will try to bisect later.
--
Anatolij
Re: [PATCH v2 02/35] acpi: Add a function to get a device path and scope
On Mon, May 11, 2020 at 4:34 AM Simon Glass wrote:
>
> Add a function to build up the ACPI path for a device and another for its
> scope.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Wolfgang Wallner
> ---
>
> Changes in v2: None
> Changes in v1:
> - Split into more patches for review
> - Add tests
> - Rebase on top of common.h series
>
> arch/sandbox/dts/test.dts | 3 ++
> include/acpi/acpi_device.h | 44 ++
> lib/acpi/Makefile | 1 +
> lib/acpi/acpi_device.c | 83 +
> test/dm/acpi.c | 95 --
> 5 files changed, 213 insertions(+), 13 deletions(-)
> create mode 100644 include/acpi/acpi_device.h
> create mode 100644 lib/acpi/acpi_device.c
>
> diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
> index 15cd2330a3..b802c1c909 100644
> --- a/arch/sandbox/dts/test.dts
> +++ b/arch/sandbox/dts/test.dts
> @@ -253,6 +253,9 @@
>
> acpi-test {
> compatible = "denx,u-boot-acpi-test";
> + child {
> + compatible = "denx,u-boot-acpi-test";
> + };
> };
>
> acpi-test2 {
> diff --git a/include/acpi/acpi_device.h b/include/acpi/acpi_device.h
> new file mode 100644
> index 00..37a675f101
> --- /dev/null
> +++ b/include/acpi/acpi_device.h
> @@ -0,0 +1,44 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Generation of tables for particular device types
> + *
> + * Copyright 2019 Google LLC
> + * Mostly taken from coreboot file of the same name
> + */
> +
> +#ifndef __ACPI_DEVICE_H
> +#define __ACPI_DEVICE_H
> +
> +struct udevice;
> +
> +/* Length of a full path to an ACPI device */
> +#define ACPI_PATH_MAX 30
> +
> +/**
> + * acpi_device_path() - Get the full path to an ACPI device
> + *
> + * This gets the full path in the form .. where is the root
> + * and is the device. All parent devices are added to the path.
> + *
> + * @dev: Device to check
> + * @buf: Buffer to place the path in (should be ACPI_PATH_MAX long)
> + * @maxlen: Size of buffer (typically ACPI_PATH_MAX)
> + * @return 0 if OK, -ve on error
> + */
> +int acpi_device_path(const struct udevice *dev, char *buf, int maxlen);
> +
> +/**
> + * acpi_device_scope() - Get the scope of an ACPI device
> + *
> + * This gets the scope which is the full path of the parent device, as per
> + * acpi_device_path().
> + *
> + * @dev: Device to check
> + * @buf: Buffer to place the path in (should be ACPI_PATH_MAX long)
> + * @maxlen: Size of buffer (typically ACPI_PATH_MAX)
> + * @return 0 if OK, -EINVAL if the device has no parent, other -ve on other
> + * error
> + */
> +int acpi_device_scope(const struct udevice *dev, char *scope, int maxlen);
> +
> +#endif
> diff --git a/lib/acpi/Makefile b/lib/acpi/Makefile
> index 660491ef71..caae6c01bd 100644
> --- a/lib/acpi/Makefile
> +++ b/lib/acpi/Makefile
> @@ -1,4 +1,5 @@
> # SPDX-License-Identifier: GPL-2.0+
> #
>
> +obj-y += acpi_device.o
> obj-y += acpi_table.o
> diff --git a/lib/acpi/acpi_device.c b/lib/acpi/acpi_device.c
> new file mode 100644
> index 00..f9af2343c1
> --- /dev/null
> +++ b/lib/acpi/acpi_device.c
> @@ -0,0 +1,83 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Generation of tables for particular device types
> + *
> + * Copyright 2019 Google LLC
> + * Mostly taken from coreboot file of the same name
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +/**
> + * acpi_device_path_fill() - Find the root device and build a path from there
> + *
> + * This recursively reaches back to the root device and progressively adds
> path
> + * elements until the device is reached.
> + *
> + * @dev: Device to return path of
> + * @buf: Buffer to hold the path
> + * @buf_len: Length of buffer
> + * @cur: Current position in the buffer
> + * @return new position in buffer after adding @dev, or -ve on error
> + */
> +static int acpi_device_path_fill(const struct udevice *dev, char *buf,
> +size_t buf_len, int cur)
> +{
> + char name[ACPI_NAME_MAX];
> + int next = 0;
> + int ret;
> +
> + ret = acpi_get_name(dev, name);
> + if (ret)
> + return ret;
> +
> + /*
> +* Make sure this name segment will fit, including the path segment
> +* separator and possible NUL terminator, if this is the last segment.
typo: NULL
> +*/
> + if (cur + strlen(name) + 2 > buf_len)
> + return -ENOSPC;
> +
> + /* Walk up the tree to the root device */
> + if (dev_get_parent(dev)) {
> + next = acpi_device_path_fill(dev_get_parent(dev), buf,
> buf_len,
> +cur);
> + if (next < 0)
> + return next;
> + }
> +
> + /* Fill in the path from the root device */
> + next += snprintf(buf + next, buf_len -
[PATCH 03/15] net: pcnet: Use PCI_DEVICE() to define PCI device compat list
Use this macro to fully fill the PCI device ID table. This is mandatory
for the DM PCI support, which checks all the fields.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Joe Hershberger
---
drivers/net/pcnet.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index 15d102d3a9..d3f3297e12 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -152,7 +152,7 @@ static inline pci_addr_t pcnet_virt_to_mem(const struct
eth_device *dev,
}
static struct pci_device_id supported[] = {
- {PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE},
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE) },
{}
};
--
2.25.1
[PATCH 01/15] net: pcnet: Drop typedef struct pcnet_priv_t
Use struct pcnet_priv all over the place instead.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Joe Hershberger
---
drivers/net/pcnet.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index f97e7f8c6a..f34fc4abbf 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -73,15 +73,15 @@ struct pcnet_uncached_priv {
struct pcnet_init_block init_block;
};
-typedef struct pcnet_priv {
+struct pcnet_priv {
struct pcnet_uncached_priv *uc;
/* Receive Buffer space */
unsigned char (*rx_buf)[RX_RING_SIZE][PKT_BUF_SZ + 4];
int cur_rx;
int cur_tx;
-} pcnet_priv_t;
+};
-static pcnet_priv_t *lp;
+static struct pcnet_priv *lp;
/* Offsets from base I/O address for WIO mode */
#define PCNET_RDP 0x10
@@ -337,9 +337,9 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
* must be aligned on 16-byte boundaries.
*/
if (lp == NULL) {
- addr = (unsigned long)malloc(sizeof(pcnet_priv_t) + 0x10);
+ addr = (unsigned long)malloc(sizeof(*lp) + 0x10);
addr = (addr + 0xf) & ~0xf;
- lp = (pcnet_priv_t *)addr;
+ lp = (struct pcnet_priv *)addr;
addr = (unsigned long)memalign(ARCH_DMA_MINALIGN,
sizeof(*lp->uc));
--
2.25.1
[PATCH 02/15] net: pcnet: Drop PCNET_HAS_PROM
All of one PCNET users has this option set, make this default
and drop this config option.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Joe Hershberger
---
drivers/net/pcnet.c | 5 -
include/configs/malta.h | 1 -
2 files changed, 6 deletions(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index f34fc4abbf..15d102d3a9 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -238,10 +238,7 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis,
int dev_nr)
{
int chip_version;
char *chipname;
-
-#ifdef PCNET_HAS_PROM
int i;
-#endif
/* Reset the PCnet controller */
pcnet_reset(dev);
@@ -276,7 +273,6 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis,
int dev_nr)
PCNET_DEBUG1("AMD %s\n", chipname);
-#ifdef PCNET_HAS_PROM
/*
* In most chips, after a chip reset, the ethernet address is read from
* the station address PROM at the base address and programmed into the
@@ -290,7 +286,6 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis,
int dev_nr)
dev->enetaddr[2 * i] = val & 0x0ff;
dev->enetaddr[2 * i + 1] = (val >> 8) & 0x0ff;
}
-#endif /* PCNET_HAS_PROM */
return 0;
}
diff --git a/include/configs/malta.h b/include/configs/malta.h
index 773d7c23ed..82c90042d9 100644
--- a/include/configs/malta.h
+++ b/include/configs/malta.h
@@ -16,7 +16,6 @@
#define CONFIG_PCI_GT64120
#define CONFIG_PCI_MSC01
#define CONFIG_PCNET
-#define PCNET_HAS_PROM
#define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0
--
2.25.1
[PATCH 06/15] net: pcnet: Move private data allocation to initialize
The private data allocation does not have to be done every time the
NIC is initialized at run time, move the allocation to initialize
function, which means it will be done only once when the driver
starts.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Joe Hershberger
---
drivers/net/pcnet.c | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index f5e14ca60d..3a9f20a7f0 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -186,6 +186,20 @@ int pcnet_initialize(bd_t *bis)
printf("pcnet: Can not allocate memory\n");
break;
}
+
+ /*
+* We only maintain one structure because the drivers will
+* never be used concurrently. In 32bit mode the RX and TX
+* ring entries must be aligned on 16-byte boundaries.
+*/
+ if (!lp) {
+ lp = malloc_cache_aligned(sizeof(*lp));
+ lp->uc = map_physmem((phys_addr_t)&lp->ucp,
+sizeof(lp->ucp), MAP_NOCACHE);
+ flush_dcache_range((unsigned long)lp,
+ (unsigned long)lp + sizeof(*lp));
+ }
+
dev->priv = (void *)(unsigned long)devbusfn;
sprintf(dev->name, "pcnet#%d", dev_nr);
@@ -327,19 +341,6 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
val |= 0x3 << 10;
pcnet_write_csr(dev, 80, val);
- /*
-* We only maintain one structure because the drivers will never
-* be used concurrently. In 32bit mode the RX and TX ring entries
-* must be aligned on 16-byte boundaries.
-*/
- if (lp == NULL) {
- lp = malloc_cache_aligned(sizeof(*lp));
- lp->uc = map_physmem((phys_addr_t)&lp->ucp,
-sizeof(lp->ucp), MAP_NOCACHE);
- flush_dcache_range((unsigned long)lp,
- (unsigned long)lp + sizeof(*lp));
- }
-
uc = lp->uc;
uc->init_block.mode = cpu_to_le16(0x);
--
2.25.1
[PATCH 07/15] net: pcnet: Move initialize function at the end
Move the function at the end of the driver, so we could drop
various forward declarations later. No functional change.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Joe Hershberger
---
drivers/net/pcnet.c | 180 ++--
1 file changed, 89 insertions(+), 91 deletions(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index 3a9f20a7f0..ec8d080794 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -158,97 +158,6 @@ static struct pci_device_id supported[] = {
{}
};
-
-int pcnet_initialize(bd_t *bis)
-{
- pci_dev_t devbusfn;
- struct eth_device *dev;
- u16 command, status;
- int dev_nr = 0;
- u32 bar;
-
- PCNET_DEBUG1("\npcnet_initialize...\n");
-
- for (dev_nr = 0;; dev_nr++) {
-
- /*
-* Find the PCnet PCI device(s).
-*/
- devbusfn = pci_find_devices(supported, dev_nr);
- if (devbusfn < 0)
- break;
-
- /*
-* Allocate and pre-fill the device structure.
-*/
- dev = calloc(1, sizeof(*dev));
- if (!dev) {
- printf("pcnet: Can not allocate memory\n");
- break;
- }
-
- /*
-* We only maintain one structure because the drivers will
-* never be used concurrently. In 32bit mode the RX and TX
-* ring entries must be aligned on 16-byte boundaries.
-*/
- if (!lp) {
- lp = malloc_cache_aligned(sizeof(*lp));
- lp->uc = map_physmem((phys_addr_t)&lp->ucp,
-sizeof(lp->ucp), MAP_NOCACHE);
- flush_dcache_range((unsigned long)lp,
- (unsigned long)lp + sizeof(*lp));
- }
-
- dev->priv = (void *)(unsigned long)devbusfn;
- sprintf(dev->name, "pcnet#%d", dev_nr);
-
- /*
-* Setup the PCI device.
-*/
- pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_1, &bar);
- dev->iobase = pci_mem_to_phys(devbusfn, bar);
- dev->iobase &= ~0xf;
-
- PCNET_DEBUG1("%s: devbusfn=0x%x iobase=0x%lx: ",
-dev->name, devbusfn, (unsigned long)dev->iobase);
-
- command = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
- pci_write_config_word(devbusfn, PCI_COMMAND, command);
- pci_read_config_word(devbusfn, PCI_COMMAND, &status);
- if ((status & command) != command) {
- printf("%s: Couldn't enable IO access or Bus
Mastering\n",
- dev->name);
- free(dev);
- continue;
- }
-
- pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER, 0x40);
-
- /*
-* Probe the PCnet chip.
-*/
- if (pcnet_probe(dev, bis, dev_nr) < 0) {
- free(dev);
- continue;
- }
-
- /*
-* Setup device structure and register the driver.
-*/
- dev->init = pcnet_init;
- dev->halt = pcnet_halt;
- dev->send = pcnet_send;
- dev->recv = pcnet_recv;
-
- eth_register(dev);
- }
-
- udelay(10 * 1000);
-
- return dev_nr;
-}
-
static int pcnet_probe(struct eth_device *dev, bd_t *bis, int dev_nr)
{
int chip_version;
@@ -545,3 +454,92 @@ static void pcnet_halt(struct eth_device *dev)
if (i <= 0)
printf("%s: TIMEOUT: controller reset failed\n", dev->name);
}
+
+int pcnet_initialize(bd_t *bis)
+{
+ pci_dev_t devbusfn;
+ struct eth_device *dev;
+ u16 command, status;
+ int dev_nr = 0;
+ u32 bar;
+
+ PCNET_DEBUG1("\npcnet_initialize...\n");
+
+ for (dev_nr = 0; ; dev_nr++) {
+ /*
+* Find the PCnet PCI device(s).
+*/
+ devbusfn = pci_find_devices(supported, dev_nr);
+ if (devbusfn < 0)
+ break;
+
+ /*
+* Allocate and pre-fill the device structure.
+*/
+ dev = calloc(1, sizeof(*dev));
+ if (!dev) {
+ printf("pcnet: Can not allocate memory\n");
+ break;
+ }
+
+ /*
+* We only maintain one structure because the drivers will
+* never be used concurrently. In 32bit mode the RX and TX
+* ring entries must be aligned on 16-byte boundaries.
+*/
+ if (!lp) {
+
[PATCH 08/15] net: pcnet: Drop useless forward declarations
Remove those as they are not needed anymore.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Joe Hershberger
---
drivers/net/pcnet.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index ec8d080794..3e04781aa4 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -138,12 +138,6 @@ static int pcnet_check(struct eth_device *dev)
return readw(base + PCNET_RAP) == 88;
}
-static int pcnet_init (struct eth_device *dev, bd_t * bis);
-static int pcnet_send(struct eth_device *dev, void *packet, int length);
-static int pcnet_recv (struct eth_device *dev);
-static void pcnet_halt (struct eth_device *dev);
-static int pcnet_probe (struct eth_device *dev, bd_t * bis, int dev_num);
-
static inline pci_addr_t pcnet_virt_to_mem(const struct eth_device *dev,
void *addr)
{
--
2.25.1
[PATCH 05/15] net: pcnet: Replace memset+malloc with calloc
This combination of functions can be replaced with calloc(),
make it so.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Joe Hershberger
---
drivers/net/pcnet.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index 5bbd290eec..f5e14ca60d 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -181,12 +181,11 @@ int pcnet_initialize(bd_t *bis)
/*
* Allocate and pre-fill the device structure.
*/
- dev = (struct eth_device *)malloc(sizeof(*dev));
+ dev = calloc(1, sizeof(*dev));
if (!dev) {
printf("pcnet: Can not allocate memory\n");
break;
}
- memset(dev, 0, sizeof(*dev));
dev->priv = (void *)(unsigned long)devbusfn;
sprintf(dev->name, "pcnet#%d", dev_nr);
--
2.25.1
[PATCH 04/15] net: pcnet: Simplify private data allocation
The current code is horribly complex. Both the RX and TX buffer
descriptors are 16 bytes in size, the init block is 32 bytes in
size, so simplify the code such that the entire private data of
the driver are allocated cache aligned and the RX and TX buffer
descriptors are part of the private data.
This removes multiple malloc calls and cache flushes.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Joe Hershberger
---
drivers/net/pcnet.c | 33 -
1 file changed, 12 insertions(+), 21 deletions(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index d3f3297e12..5bbd290eec 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -9,6 +9,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -71,12 +72,13 @@ struct pcnet_uncached_priv {
struct pcnet_rx_head rx_ring[RX_RING_SIZE];
struct pcnet_tx_head tx_ring[TX_RING_SIZE];
struct pcnet_init_block init_block;
-};
+} __aligned(ARCH_DMA_MINALIGN);
struct pcnet_priv {
- struct pcnet_uncached_priv *uc;
+ struct pcnet_uncached_priv ucp;
/* Receive Buffer space */
- unsigned char (*rx_buf)[RX_RING_SIZE][PKT_BUF_SZ + 4];
+ unsigned char rx_buf[RX_RING_SIZE][PKT_BUF_SZ + 4];
+ struct pcnet_uncached_priv *uc;
int cur_rx;
int cur_tx;
};
@@ -332,22 +334,11 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
* must be aligned on 16-byte boundaries.
*/
if (lp == NULL) {
- addr = (unsigned long)malloc(sizeof(*lp) + 0x10);
- addr = (addr + 0xf) & ~0xf;
- lp = (struct pcnet_priv *)addr;
-
- addr = (unsigned long)memalign(ARCH_DMA_MINALIGN,
- sizeof(*lp->uc));
- flush_dcache_range(addr, addr + sizeof(*lp->uc));
- addr = (unsigned long)map_physmem(addr,
- roundup(sizeof(*lp->uc), ARCH_DMA_MINALIGN),
- MAP_NOCACHE);
- lp->uc = (struct pcnet_uncached_priv *)addr;
-
- addr = (unsigned long)memalign(ARCH_DMA_MINALIGN,
- sizeof(*lp->rx_buf));
- flush_dcache_range(addr, addr + sizeof(*lp->rx_buf));
- lp->rx_buf = (void *)addr;
+ lp = malloc_cache_aligned(sizeof(*lp));
+ lp->uc = map_physmem((phys_addr_t)&lp->ucp,
+sizeof(lp->ucp), MAP_NOCACHE);
+ flush_dcache_range((unsigned long)lp,
+ (unsigned long)lp + sizeof(*lp));
}
uc = lp->uc;
@@ -361,7 +352,7 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
*/
lp->cur_rx = 0;
for (i = 0; i < RX_RING_SIZE; i++) {
- addr = pcnet_virt_to_mem(dev, (*lp->rx_buf)[i]);
+ addr = pcnet_virt_to_mem(dev, lp->rx_buf[i]);
uc->rx_ring[i].base = cpu_to_le32(addr);
uc->rx_ring[i].buf_length = cpu_to_le16(-PKT_BUF_SZ);
uc->rx_ring[i].status = cpu_to_le16(0x8000);
@@ -518,7 +509,7 @@ static int pcnet_recv (struct eth_device *dev)
printf("%s: Rx%d: invalid packet length %d\n",
dev->name, lp->cur_rx, pkt_len);
} else {
- buf = (*lp->rx_buf)[lp->cur_rx];
+ buf = lp->rx_buf[lp->cur_rx];
invalidate_dcache_range((unsigned long)buf,
(unsigned long)buf + pkt_len);
net_process_received_packet(buf, pkt_len);
--
2.25.1
[PATCH 10/15] net: pcnet: Pass private data through dev->priv
Get rid of the global point to private data, and rather pass it
thought dev->priv. Also remove the unnecessary check for lp being
non-NULL, since it is always NULL at this point.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Joe Hershberger
---
drivers/net/pcnet.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index c8f93ae2a5..ced025c1a5 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -84,8 +84,6 @@ struct pcnet_priv {
int cur_tx;
};
-static struct pcnet_priv *lp;
-
/* Offsets from base I/O address for WIO mode */
#define PCNET_RDP 0x10
#define PCNET_RAP 0x12
@@ -209,6 +207,7 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis,
int dev_nr)
static int pcnet_init(struct eth_device *dev, bd_t *bis)
{
+ struct pcnet_priv *lp = dev->priv;
struct pcnet_uncached_priv *uc;
int i, val;
unsigned long addr;
@@ -328,6 +327,7 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
static int pcnet_send(struct eth_device *dev, void *packet, int pkt_len)
{
+ struct pcnet_priv *lp = dev->priv;
int i, status;
u32 addr;
struct pcnet_tx_head *entry = &lp->uc->tx_ring[lp->cur_tx];
@@ -376,6 +376,7 @@ static int pcnet_send(struct eth_device *dev, void *packet,
int pkt_len)
static int pcnet_recv (struct eth_device *dev)
{
+ struct pcnet_priv *lp = dev->priv;
struct pcnet_rx_head *entry;
unsigned char *buf;
int pkt_len = 0;
@@ -452,6 +453,7 @@ int pcnet_initialize(bd_t *bis)
{
pci_dev_t devbusfn;
struct eth_device *dev;
+ struct pcnet_priv *lp;
u16 command, status;
int dev_nr = 0;
u32 bar;
@@ -480,15 +482,13 @@ int pcnet_initialize(bd_t *bis)
* never be used concurrently. In 32bit mode the RX and TX
* ring entries must be aligned on 16-byte boundaries.
*/
- if (!lp) {
- lp = malloc_cache_aligned(sizeof(*lp));
- lp->uc = map_physmem((phys_addr_t)&lp->ucp,
-sizeof(lp->ucp), MAP_NOCACHE);
- flush_dcache_range((unsigned long)lp,
- (unsigned long)lp + sizeof(*lp));
- }
-
+ lp = malloc_cache_aligned(sizeof(*lp));
+ lp->uc = map_physmem((phys_addr_t)&lp->ucp,
+sizeof(lp->ucp), MAP_NOCACHE);
lp->dev = devbusfn;
+ flush_dcache_range((unsigned long)lp,
+ (unsigned long)lp + sizeof(*lp));
+ dev->priv = lp;
sprintf(dev->name, "pcnet#%d", dev_nr);
/*
--
2.25.1
[PATCH 09/15] net: pcnet: Wrap devbusfn into private data
Instead of using eth_device priv for this PCI devbusfn, free it
so it could be used for driver private data, and wrap devbusfn
into those driver private data.
Note that using the name dev for the variable is a trick left for
later, when DM support is in place, so dm_pci_virt_to_mem() can be
used with minimal ifdeffery.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Joe Hershberger
---
drivers/net/pcnet.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index 3e04781aa4..c8f93ae2a5 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -79,6 +79,7 @@ struct pcnet_priv {
/* Receive Buffer space */
unsigned char rx_buf[RX_RING_SIZE][PKT_BUF_SZ + 4];
struct pcnet_uncached_priv *uc;
+ pci_dev_t dev;
int cur_rx;
int cur_tx;
};
@@ -138,13 +139,11 @@ static int pcnet_check(struct eth_device *dev)
return readw(base + PCNET_RAP) == 88;
}
-static inline pci_addr_t pcnet_virt_to_mem(const struct eth_device *dev,
- void *addr)
+static inline pci_addr_t pcnet_virt_to_mem(struct pcnet_priv *lp, void *addr)
{
- pci_dev_t devbusfn = (pci_dev_t)(unsigned long)dev->priv;
void *virt_addr = addr;
- return pci_virt_to_mem(devbusfn, virt_addr);
+ return pci_virt_to_mem(lp->dev, virt_addr);
}
static struct pci_device_id supported[] = {
@@ -255,7 +254,7 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
*/
lp->cur_rx = 0;
for (i = 0; i < RX_RING_SIZE; i++) {
- addr = pcnet_virt_to_mem(dev, lp->rx_buf[i]);
+ addr = pcnet_virt_to_mem(lp, lp->rx_buf[i]);
uc->rx_ring[i].base = cpu_to_le32(addr);
uc->rx_ring[i].buf_length = cpu_to_le16(-PKT_BUF_SZ);
uc->rx_ring[i].status = cpu_to_le16(0x8000);
@@ -287,9 +286,9 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
uc->init_block.tlen_rlen = cpu_to_le16(TX_RING_LEN_BITS |
RX_RING_LEN_BITS);
- addr = pcnet_virt_to_mem(dev, uc->rx_ring);
+ addr = pcnet_virt_to_mem(lp, uc->rx_ring);
uc->init_block.rx_ring = cpu_to_le32(addr);
- addr = pcnet_virt_to_mem(dev, uc->tx_ring);
+ addr = pcnet_virt_to_mem(lp, uc->tx_ring);
uc->init_block.tx_ring = cpu_to_le32(addr);
PCNET_DEBUG1("\ntlen_rlen=0x%x rx_ring=0x%x tx_ring=0x%x\n",
@@ -300,7 +299,7 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
* Tell the controller where the Init Block is located.
*/
barrier();
- addr = pcnet_virt_to_mem(dev, &lp->uc->init_block);
+ addr = pcnet_virt_to_mem(lp, &lp->uc->init_block);
pcnet_write_csr(dev, 1, addr & 0x);
pcnet_write_csr(dev, 2, (addr >> 16) & 0x);
@@ -358,7 +357,7 @@ static int pcnet_send(struct eth_device *dev, void *packet,
int pkt_len)
* Setup Tx ring. Caution: the write order is important here,
* set the status with the "ownership" bits last.
*/
- addr = pcnet_virt_to_mem(dev, packet);
+ addr = pcnet_virt_to_mem(lp, packet);
writew(-pkt_len, &entry->length);
writel(0, &entry->misc);
writel(addr, &entry->base);
@@ -489,7 +488,7 @@ int pcnet_initialize(bd_t *bis)
(unsigned long)lp + sizeof(*lp));
}
- dev->priv = (void *)(unsigned long)devbusfn;
+ lp->dev = devbusfn;
sprintf(dev->name, "pcnet#%d", dev_nr);
/*
--
2.25.1
[PATCH 11/15] net: pcnet: Wrap iobase into private data
Instead of using the non-DM-only iobase in struct eth_device, add
one into the private data to make DM and non-DM operation possible.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Joe Hershberger
---
drivers/net/pcnet.c | 103
1 file changed, 46 insertions(+), 57 deletions(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index ced025c1a5..fb38d3b7a3 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -80,6 +80,7 @@ struct pcnet_priv {
unsigned char rx_buf[RX_RING_SIZE][PKT_BUF_SZ + 4];
struct pcnet_uncached_priv *uc;
pci_dev_t dev;
+ void __iomem *iobase;
int cur_rx;
int cur_tx;
};
@@ -90,51 +91,39 @@ struct pcnet_priv {
#define PCNET_RESET0x14
#define PCNET_BDP 0x16
-static u16 pcnet_read_csr(struct eth_device *dev, int index)
+static u16 pcnet_read_csr(struct pcnet_priv *lp, int index)
{
- void __iomem *base = (void __iomem *)dev->iobase;
-
- writew(index, base + PCNET_RAP);
- return readw(base + PCNET_RDP);
+ writew(index, lp->iobase + PCNET_RAP);
+ return readw(lp->iobase + PCNET_RDP);
}
-static void pcnet_write_csr(struct eth_device *dev, int index, u16 val)
+static void pcnet_write_csr(struct pcnet_priv *lp, int index, u16 val)
{
- void __iomem *base = (void __iomem *)dev->iobase;
-
- writew(index, base + PCNET_RAP);
- writew(val, base + PCNET_RDP);
+ writew(index, lp->iobase + PCNET_RAP);
+ writew(val, lp->iobase + PCNET_RDP);
}
-static u16 pcnet_read_bcr(struct eth_device *dev, int index)
+static u16 pcnet_read_bcr(struct pcnet_priv *lp, int index)
{
- void __iomem *base = (void __iomem *)dev->iobase;
-
- writew(index, base + PCNET_RAP);
- return readw(base + PCNET_BDP);
+ writew(index, lp->iobase + PCNET_RAP);
+ return readw(lp->iobase + PCNET_BDP);
}
-static void pcnet_write_bcr(struct eth_device *dev, int index, u16 val)
+static void pcnet_write_bcr(struct pcnet_priv *lp, int index, u16 val)
{
- void __iomem *base = (void __iomem *)dev->iobase;
-
- writew(index, base + PCNET_RAP);
- writew(val, base + PCNET_BDP);
+ writew(index, lp->iobase + PCNET_RAP);
+ writew(val, lp->iobase + PCNET_BDP);
}
-static void pcnet_reset(struct eth_device *dev)
+static void pcnet_reset(struct pcnet_priv *lp)
{
- void __iomem *base = (void __iomem *)dev->iobase;
-
- readw(base + PCNET_RESET);
+ readw(lp->iobase + PCNET_RESET);
}
-static int pcnet_check(struct eth_device *dev)
+static int pcnet_check(struct pcnet_priv *lp)
{
- void __iomem *base = (void __iomem *)dev->iobase;
-
- writew(88, base + PCNET_RAP);
- return readw(base + PCNET_RAP) == 88;
+ writew(88, lp->iobase + PCNET_RAP);
+ return readw(lp->iobase + PCNET_RAP) == 88;
}
static inline pci_addr_t pcnet_virt_to_mem(struct pcnet_priv *lp, void *addr)
@@ -151,22 +140,22 @@ static struct pci_device_id supported[] = {
static int pcnet_probe(struct eth_device *dev, bd_t *bis, int dev_nr)
{
+ struct pcnet_priv *lp = dev->priv;
int chip_version;
char *chipname;
int i;
/* Reset the PCnet controller */
- pcnet_reset(dev);
+ pcnet_reset(lp);
/* Check if register access is working */
- if (pcnet_read_csr(dev, 0) != 4 || !pcnet_check(dev)) {
+ if (pcnet_read_csr(lp, 0) != 4 || !pcnet_check(lp)) {
printf("%s: CSR register access check failed\n", dev->name);
return -1;
}
/* Identify the chip */
- chip_version =
- pcnet_read_csr(dev, 88) | (pcnet_read_csr(dev, 89) << 16);
+ chip_version = pcnet_read_csr(lp, 88) | (pcnet_read_csr(lp, 89) << 16);
if ((chip_version & 0xfff) != 0x003)
return -1;
chip_version = (chip_version >> 12) & 0x;
@@ -196,7 +185,7 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis,
int dev_nr)
for (i = 0; i < 3; i++) {
unsigned int val;
- val = pcnet_read_csr(dev, i + 12) & 0x0;
+ val = pcnet_read_csr(lp, i + 12) & 0x0;
/* There may be endianness issues here. */
dev->enetaddr[2 * i] = val & 0x0ff;
dev->enetaddr[2 * i + 1] = (val >> 8) & 0x0ff;
@@ -215,17 +204,17 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
PCNET_DEBUG1("%s: pcnet_init...\n", dev->name);
/* Switch pcnet to 32bit mode */
- pcnet_write_bcr(dev, 20, 2);
+ pcnet_write_bcr(lp, 20, 2);
/* Set/reset autoselect bit */
- val = pcnet_read_bcr(dev, 2) & ~2;
+ val = pcnet_read_bcr(lp, 2) & ~2;
val |= 2;
- pcnet_write_bcr(dev, 2, val);
+ pcnet_write_bcr(lp, 2, val);
/* Enable auto negotiate, setup, disable fd */
- val = pcnet_read_bcr(dev, 32) & ~0x98;
+
[PATCH 12/15] net: pcnet: Wrap name and enetaddr into private data
Instead of using the non-DM-only name and enetaddr in struct eth_device,
add pointers into the private data which can either point to that non-DM
name or a DM one later on.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Joe Hershberger
---
drivers/net/pcnet.c | 34 +++---
1 file changed, 19 insertions(+), 15 deletions(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index fb38d3b7a3..8e99e41863 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -81,6 +81,8 @@ struct pcnet_priv {
struct pcnet_uncached_priv *uc;
pci_dev_t dev;
void __iomem *iobase;
+ char *name;
+ u8 *enetaddr;
int cur_rx;
int cur_tx;
};
@@ -150,7 +152,7 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis,
int dev_nr)
/* Check if register access is working */
if (pcnet_read_csr(lp, 0) != 4 || !pcnet_check(lp)) {
- printf("%s: CSR register access check failed\n", dev->name);
+ printf("%s: CSR register access check failed\n", lp->name);
return -1;
}
@@ -171,7 +173,7 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis,
int dev_nr)
break;
default:
printf("%s: PCnet version %#x not supported\n",
- dev->name, chip_version);
+ lp->name, chip_version);
return -1;
}
@@ -187,8 +189,8 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis,
int dev_nr)
val = pcnet_read_csr(lp, i + 12) & 0x0;
/* There may be endianness issues here. */
- dev->enetaddr[2 * i] = val & 0x0ff;
- dev->enetaddr[2 * i + 1] = (val >> 8) & 0x0ff;
+ lp->enetaddr[2 * i] = val & 0x0ff;
+ lp->enetaddr[2 * i + 1] = (val >> 8) & 0x0ff;
}
return 0;
@@ -201,7 +203,7 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
int i, val;
unsigned long addr;
- PCNET_DEBUG1("%s: pcnet_init...\n", dev->name);
+ PCNET_DEBUG1("%s: %s...\n", lp->name, __func__);
/* Switch pcnet to 32bit mode */
pcnet_write_bcr(lp, 20, 2);
@@ -268,7 +270,7 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
PCNET_DEBUG1("Init block at 0x%p: MAC", &lp->uc->init_block);
for (i = 0; i < 6; i++) {
- lp->uc->init_block.phys_addr[i] = dev->enetaddr[i];
+ lp->uc->init_block.phys_addr[i] = lp->enetaddr[i];
PCNET_DEBUG1(" %02x", lp->uc->init_block.phys_addr[i]);
}
@@ -301,7 +303,7 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
udelay(10);
}
if (i <= 0) {
- printf("%s: TIMEOUT: controller init failed\n", dev->name);
+ printf("%s: TIMEOUT: controller init failed\n", lp->name);
pcnet_reset(lp);
return -1;
}
@@ -337,7 +339,7 @@ static int pcnet_send(struct eth_device *dev, void *packet,
int pkt_len)
}
if (i <= 0) {
printf("%s: TIMEOUT: Tx%d failed (status = 0x%x)\n",
- dev->name, lp->cur_tx, status);
+ lp->name, lp->cur_tx, status);
pkt_len = 0;
goto failure;
}
@@ -382,7 +384,7 @@ static int pcnet_recv (struct eth_device *dev)
err_status = status >> 8;
if (err_status != 0x03) { /* There was an error. */
- printf("%s: Rx%d", dev->name, lp->cur_rx);
+ printf("%s: Rx%d", lp->name, lp->cur_rx);
PCNET_DEBUG1(" (status=0x%x)", err_status);
if (err_status & 0x20)
printf(" Frame");
@@ -399,7 +401,7 @@ static int pcnet_recv (struct eth_device *dev)
pkt_len = (readl(&entry->msg_length) & 0xfff) - 4;
if (pkt_len < 60) {
printf("%s: Rx%d: invalid packet length %d\n",
- dev->name, lp->cur_rx, pkt_len);
+ lp->name, lp->cur_rx, pkt_len);
} else {
buf = lp->rx_buf[lp->cur_rx];
invalidate_dcache_range((unsigned long)buf,
@@ -424,7 +426,7 @@ static void pcnet_halt(struct eth_device *dev)
struct pcnet_priv *lp = dev->priv;
int i;
- PCNET_DEBUG1("%s: pcnet_halt...\n", dev->name);
+ PCNET_DEBUG1("%s: %s...\n", lp->name, __func__);
/* Reset the PCnet controller */
pcnet_reset(lp);
@@ -436,7 +438,7 @@ static void pcnet_halt(struct eth_device *dev)
udelay(10);
}
if (i <= 0)
- printf("%s: TIMEOUT: controller reset failed\n", dev->name);
+ printf("%s: TIMEOUT: controller reset
[PATCH 13/15] net: pcnet: Split common and non-DM functions
Pull the common parts of functions out so they can be reused by both
DM and non-DM code paths. The recv() function had to be reworked to
fit into this scheme and this means it now only receives one packet
at a time instead of spinning in an endless loop.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Joe Hershberger
---
drivers/net/pcnet.c | 149
1 file changed, 94 insertions(+), 55 deletions(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index 8e99e41863..8292b0bacb 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -83,6 +83,7 @@ struct pcnet_priv {
void __iomem *iobase;
char *name;
u8 *enetaddr;
+ u16 status;
int cur_rx;
int cur_tx;
};
@@ -140,9 +141,8 @@ static struct pci_device_id supported[] = {
{}
};
-static int pcnet_probe(struct eth_device *dev, bd_t *bis, int dev_nr)
+static int pcnet_probe_common(struct pcnet_priv *lp)
{
- struct pcnet_priv *lp = dev->priv;
int chip_version;
char *chipname;
int i;
@@ -196,9 +196,8 @@ static int pcnet_probe(struct eth_device *dev, bd_t *bis,
int dev_nr)
return 0;
}
-static int pcnet_init(struct eth_device *dev, bd_t *bis)
+static int pcnet_init_common(struct pcnet_priv *lp)
{
- struct pcnet_priv *lp = dev->priv;
struct pcnet_uncached_priv *uc;
int i, val;
unsigned long addr;
@@ -316,9 +315,8 @@ static int pcnet_init(struct eth_device *dev, bd_t *bis)
return 0;
}
-static int pcnet_send(struct eth_device *dev, void *packet, int pkt_len)
+static int pcnet_send_common(struct pcnet_priv *lp, void *packet, int pkt_len)
{
- struct pcnet_priv *lp = dev->priv;
int i, status;
u32 addr;
struct pcnet_tx_head *entry = &lp->uc->tx_ring[lp->cur_tx];
@@ -365,65 +363,70 @@ static int pcnet_send(struct eth_device *dev, void
*packet, int pkt_len)
return pkt_len;
}
-static int pcnet_recv (struct eth_device *dev)
+static int pcnet_recv_common(struct pcnet_priv *lp, unsigned char **bufp)
{
- struct pcnet_priv *lp = dev->priv;
struct pcnet_rx_head *entry;
unsigned char *buf;
int pkt_len = 0;
- u16 status, err_status;
+ u16 err_status;
- while (1) {
- entry = &lp->uc->rx_ring[lp->cur_rx];
- /*
-* If we own the next entry, it's a new packet. Send it up.
-*/
- status = readw(&entry->status);
- if ((status & 0x8000) != 0)
- break;
- err_status = status >> 8;
-
- if (err_status != 0x03) { /* There was an error. */
- printf("%s: Rx%d", lp->name, lp->cur_rx);
- PCNET_DEBUG1(" (status=0x%x)", err_status);
- if (err_status & 0x20)
- printf(" Frame");
- if (err_status & 0x10)
- printf(" Overflow");
- if (err_status & 0x08)
- printf(" CRC");
- if (err_status & 0x04)
- printf(" Fifo");
- printf(" Error\n");
- status &= 0x03ff;
-
- } else {
- pkt_len = (readl(&entry->msg_length) & 0xfff) - 4;
- if (pkt_len < 60) {
- printf("%s: Rx%d: invalid packet length %d\n",
- lp->name, lp->cur_rx, pkt_len);
- } else {
- buf = lp->rx_buf[lp->cur_rx];
- invalidate_dcache_range((unsigned long)buf,
- (unsigned long)buf + pkt_len);
- net_process_received_packet(buf, pkt_len);
- PCNET_DEBUG2("Rx%d: %d bytes from 0x%p\n",
-lp->cur_rx, pkt_len, buf);
- }
- }
-
- status |= 0x8000;
- writew(status, &entry->status);
+ entry = &lp->uc->rx_ring[lp->cur_rx];
+ /*
+* If we own the next entry, it's a new packet. Send it up.
+*/
+ lp->status = readw(&entry->status);
+ if ((lp->status & 0x8000) != 0)
+ return 0;
+ err_status = lp->status >> 8;
+
+ if (err_status != 0x03) { /* There was an error. */
+ printf("%s: Rx%d", lp->name, lp->cur_rx);
+ PCNET_DEBUG1(" (status=0x%x)", err_status);
+ if (err_status & 0x20)
+ printf(" Frame");
+ if (err_status & 0x10)
+ printf(" Overflow");
+ if (err_status & 0x08)
+ printf(" CRC");
+ if (err_status & 0x04)
+
[PATCH 15/15] net: pcnet: Add Kconfig entries
Add Kconfig entries for the pcnet driver and convert MIPS malta to use those. Signed-off-by: Marek Vasut Cc: Daniel Schwierzeck Cc: Joe Hershberger --- configs/malta_defconfig | 1 + drivers/net/Kconfig | 6 ++ include/configs/malta.h | 1 - 3 files changed, 7 insertions(+), 1 deletion(-) diff --git a/configs/malta_defconfig b/configs/malta_defconfig index 2b43818c81..0680f595db 100644 --- a/configs/malta_defconfig +++ b/configs/malta_defconfig @@ -26,6 +26,7 @@ CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y CONFIG_SYS_FLASH_CFI=y +CONFIG_PCNET=y CONFIG_PCI=y CONFIG_RTC_MC146818=y CONFIG_SYS_NS16550=y diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index f7855c92d3..cef3b5c0de 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -377,6 +377,12 @@ config MII help Enable support of the Media-Independent Interface (MII) +config PCNET + bool "AMD PCnet series Ethernet controller driver" + help + This driver supports AMD PCnet series fast ethernet family of + PCI chipsets/adapters. + config RTL8139 bool "Realtek 8139 series Ethernet controller driver" help diff --git a/include/configs/malta.h b/include/configs/malta.h index 82c90042d9..9602773ff9 100644 --- a/include/configs/malta.h +++ b/include/configs/malta.h @@ -15,7 +15,6 @@ #define CONFIG_PCI_GT64120 #define CONFIG_PCI_MSC01 -#define CONFIG_PCNET #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 -- 2.25.1
[PATCH 14/15] net: pcnet: Add DM support
With all the changes in place, add support for DM into the
pcnet driver.
Signed-off-by: Marek Vasut
Cc: Daniel Schwierzeck
Cc: Joe Hershberger
---
drivers/net/pcnet.c | 127 +++-
1 file changed, 126 insertions(+), 1 deletion(-)
diff --git a/drivers/net/pcnet.c b/drivers/net/pcnet.c
index 8292b0bacb..0222f91a5d 100644
--- a/drivers/net/pcnet.c
+++ b/drivers/net/pcnet.c
@@ -8,6 +8,7 @@
#include
#include
+#include
#include
#include
#include
@@ -79,9 +80,14 @@ struct pcnet_priv {
/* Receive Buffer space */
unsigned char rx_buf[RX_RING_SIZE][PKT_BUF_SZ + 4];
struct pcnet_uncached_priv *uc;
+#ifdef CONFIG_DM_ETH
+ struct udevice *dev;
+ const char *name;
+#else
pci_dev_t dev;
- void __iomem *iobase;
char *name;
+#endif
+ void __iomem *iobase;
u8 *enetaddr;
u16 status;
int cur_rx;
@@ -133,7 +139,11 @@ static inline pci_addr_t pcnet_virt_to_mem(struct
pcnet_priv *lp, void *addr)
{
void *virt_addr = addr;
+#ifdef CONFIG_DM_ETH
+ return dm_pci_virt_to_mem(lp->dev, virt_addr);
+#else
return pci_virt_to_mem(lp->dev, virt_addr);
+#endif
}
static struct pci_device_id supported[] = {
@@ -444,6 +454,7 @@ static void pcnet_halt_common(struct pcnet_priv *lp)
printf("%s: TIMEOUT: controller reset failed\n", lp->name);
}
+#ifndef CONFIG_DM_ETH
static int pcnet_init(struct eth_device *dev, bd_t *bis)
{
struct pcnet_priv *lp = dev->priv;
@@ -568,3 +579,117 @@ int pcnet_initialize(bd_t *bis)
return dev_nr;
}
+#else /* DM_ETH */
+static int pcnet_start(struct udevice *dev)
+{
+ struct eth_pdata *plat = dev_get_platdata(dev);
+ struct pcnet_priv *priv = dev_get_priv(dev);
+
+ memcpy(priv->enetaddr, plat->enetaddr, sizeof(plat->enetaddr));
+
+ return pcnet_init_common(priv);
+}
+
+static void pcnet_stop(struct udevice *dev)
+{
+ struct pcnet_priv *priv = dev_get_priv(dev);
+
+ pcnet_halt_common(priv);
+}
+
+static int pcnet_send(struct udevice *dev, void *packet, int length)
+{
+ struct pcnet_priv *priv = dev_get_priv(dev);
+ int ret;
+
+ ret = pcnet_send_common(priv, packet, length);
+
+ return ret ? 0 : -ETIMEDOUT;
+}
+
+static int pcnet_recv(struct udevice *dev, int flags, uchar **packetp)
+{
+ struct pcnet_priv *priv = dev_get_priv(dev);
+
+ return pcnet_recv_common(priv, packetp);
+}
+
+static int pcnet_free_pkt(struct udevice *dev, uchar *packet, int length)
+{
+ struct pcnet_priv *priv = dev_get_priv(dev);
+
+ pcnet_free_pkt_common(priv, length);
+
+ return 0;
+}
+
+static int pcnet_bind(struct udevice *dev)
+{
+ static int card_number;
+ char name[16];
+
+ sprintf(name, "pcnet#%u", card_number++);
+
+ return device_set_name(dev, name);
+}
+
+static int pcnet_probe(struct udevice *dev)
+{
+ struct eth_pdata *plat = dev_get_platdata(dev);
+ struct pcnet_priv *lp = dev_get_priv(dev);
+ u16 command, status;
+ u32 iobase;
+ int ret;
+
+ dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase);
+ iobase &= ~0xf;
+
+ lp->uc = map_physmem((phys_addr_t)&lp->ucp,
+sizeof(lp->ucp), MAP_NOCACHE);
+ lp->dev = dev;
+ lp->name = dev->name;
+ lp->enetaddr = plat->enetaddr;
+ lp->iobase = (void *)dm_pci_mem_to_phys(dev, iobase);
+
+ flush_dcache_range((unsigned long)lp,
+ (unsigned long)lp + sizeof(*lp));
+
+ command = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
+ dm_pci_write_config16(dev, PCI_COMMAND, command);
+ dm_pci_read_config16(dev, PCI_COMMAND, &status);
+ if ((status & command) != command) {
+ printf("%s: Couldn't enable IO access or Bus Mastering\n",
+ lp->name);
+ return -EINVAL;
+ }
+
+ dm_pci_write_config8(dev, PCI_LATENCY_TIMER, 0x20);
+
+ ret = pcnet_probe_common(lp);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+
+static const struct eth_ops pcnet_ops = {
+ .start = pcnet_start,
+ .send = pcnet_send,
+ .recv = pcnet_recv,
+ .stop = pcnet_stop,
+ .free_pkt = pcnet_free_pkt,
+};
+
+U_BOOT_DRIVER(eth_pcnet) = {
+ .name = "eth_pcnet",
+ .id = UCLASS_ETH,
+ .bind = pcnet_bind,
+ .probe = pcnet_probe,
+ .ops= &pcnet_ops,
+ .priv_auto_alloc_size = sizeof(struct pcnet_priv),
+ .platdata_auto_alloc_size = sizeof(struct eth_pdata),
+ .flags = DM_UC_FLAG_ALLOC_PRIV_DMA,
+};
+
+U_BOOT_PCI_DEVICE(eth_pcnet, supported);
+#endif
--
2.25.1
Re: [PATCH v2] efi_loader: round the memory area in efi_add_memory_map()
On 5/17/20 12:29 PM, Michael Walle wrote:
> Virtually all callers of this function do the rounding on their own.
> Some do it right, some don't. Instead of doing this in each caller,
> do the rounding in efi_add_memory_map(). Change the size parameter
> to bytes instead of pages and remove aligning and size calculation in
> all callers.
>
> There is no more need to make the original efi_add_memory_map() (which
> takes pages as size) available outside the module. Thus rename it to
> efi_add_memory_map_pg() and make it static to prevent further misuse
> outside the module.
>
> Signed-off-by: Michael Walle
> ---
> changes since v1:
> - rebased to latest master
> - fixed grammar
>
> I split off this patch of the following series because it touches
> many files:
> https://lists.denx.de/pipermail/u-boot/2020-May/412065.html
>
> This patch supersede patch 2 and patch 3 of said series.
>
> arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 10 ++---
> arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 5 +--
> arch/arm/mach-meson/board-common.c | 7 +---
> arch/x86/lib/e820.c | 6 +--
> board/raspberrypi/rpi/rpi.c | 4 +-
> cmd/bootefi.c | 8 +---
> drivers/video/meson/meson_vpu.c | 4 +-
> drivers/video/sunxi/sunxi_de2.c | 6 +--
> drivers/video/sunxi/sunxi_display.c | 6 +--
> include/efi_loader.h| 3 +-
> lib/efi_loader/efi_memory.c | 54 ++---
> lib/efi_loader/efi_runtime.c| 3 +-
> 12 files changed, 62 insertions(+), 54 deletions(-)
>
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> index b3f5c2f641..2cf3f4bb98 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> @@ -1529,9 +1529,8 @@ int dram_init_banksize(void)
> void efi_add_known_memory(void)
> {
> int i;
> - phys_addr_t ram_start, start;
> + phys_addr_t ram_start;
> phys_size_t ram_size;
> - u64 pages;
>
> /* Add RAM */
> for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
> @@ -1549,11 +1548,8 @@ void efi_add_known_memory(void)
> gd->arch.resv_ram < ram_start + ram_size)
> ram_size = gd->arch.resv_ram - ram_start;
> #endif
> - start = (ram_start + EFI_PAGE_MASK) & ~EFI_PAGE_MASK;
> - pages = (ram_size + EFI_PAGE_MASK) >> EFI_PAGE_SHIFT;
> -
> - efi_add_memory_map(start, pages, EFI_CONVENTIONAL_MEMORY,
> -false);
> + efi_add_memory_map(ram_start, ram_size,
> +EFI_CONVENTIONAL_MEMORY);
> }
> }
> #endif
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> index 3bbad827cb..0696ea6d35 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> @@ -146,9 +146,8 @@ remove_psci_node:
> fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code,
> *boot_code_size);
> #if CONFIG_IS_ENABLED(EFI_LOADER)
> - efi_add_memory_map((uintptr_t)&secondary_boot_code,
> -ALIGN(*boot_code_size, EFI_PAGE_SIZE) >>
> EFI_PAGE_SHIFT,
> -EFI_RESERVED_MEMORY_TYPE, false);
> + efi_add_memory_map((uintptr_t)&secondary_boot_code, *boot_code_size,
> +EFI_RESERVED_MEMORY_TYPE);
> #endif
> }
> #endif
> diff --git a/arch/arm/mach-meson/board-common.c
> b/arch/arm/mach-meson/board-common.c
> index bc4c92074c..747791b10e 100644
> --- a/arch/arm/mach-meson/board-common.c
> +++ b/arch/arm/mach-meson/board-common.c
> @@ -69,11 +69,8 @@ void meson_board_add_reserved_memory(void *fdt, u64 start,
> u64 size)
> if (ret)
> printf("Could not reserve zone @ 0x%llx\n", start);
>
> - if (IS_ENABLED(CONFIG_EFI_LOADER)) {
> - efi_add_memory_map(start,
> -ALIGN(size, EFI_PAGE_SIZE) >> EFI_PAGE_SHIFT,
> -EFI_RESERVED_MEMORY_TYPE, false);
> - }
> + if (IS_ENABLED(CONFIG_EFI_LOADER))
> + efi_add_memory_map(start, size, EFI_RESERVED_MEMORY_TYPE);
> }
>
> int meson_generate_serial_ethaddr(void)
> diff --git a/arch/x86/lib/e820.c b/arch/x86/lib/e820.c
> index 26da4d2f27..1f20c5c8c6 100644
> --- a/arch/x86/lib/e820.c
> +++ b/arch/x86/lib/e820.c
> @@ -41,7 +41,7 @@ void efi_add_known_memory(void)
> {
> struct e820_entry e820[E820MAX];
> unsigned int i, num;
> - u64 start, pages, ram_top;
> + u64 start, ram_top;
> int type;
>
> num = install_e820_map(ARRAY_SIZE(e820), e820);
> @@ -77,9 +77,7 @@ void efi_add_known_memory(void)
> start + e820[i].size,
> ram_top);
> } else {
> - pages = ALIGN
[PATCH 0/7 v4] EFI variable support via OP-TEE
Hi! This is the v4 of the patchset adding EFI variable support via OP-TEE originally posted here [1] [2] [3] changes since v3: * patch 3: - remove the default attributes if the user doesn't specify any - print the EFI error message coming from StMM in case of failure * patch 6: - Align the defconfig with the existing lx2160ardb one * patch 7 (new patch) - Add an OP-TEE node on lx2160ardb dts [1] https://lists.denx.de/pipermail/u-boot/2020-May/410772.html [2] https://lists.denx.de/pipermail/u-boot/2020-May/411603.html [3] https://lists.denx.de/pipermail/u-boot/2020-May/412223.html Ilias Apalodimas (6): efi_loader: Implement EFI variable handling via OP-TEE cmd: efidebug: Add support for querying UEFI variable storage MAINTAINERS: Add maintainer for EFI variables via OP-TEE doc: uefi.rst: Add OP-TEE variable storage config options configs: lx2160a: Add default config for lx2160a using StMM in OP-TEE dts: nxp2160ardb: add op-tee node Sughosh Ganu (1): efi_loader: Add headers for EDK2 StandAloneMM communication MAINTAINERS | 6 + arch/arm/dts/fsl-lx2160a.dtsi | 6 + board/freescale/lx2160a/MAINTAINERS | 1 + cmd/efidebug.c| 58 ++- configs/lx2160ardb_tfa_stmm_defconfig | 85 doc/uefi/uefi.rst | 17 + include/mm_communication.h| 208 lib/efi_loader/Kconfig| 9 + lib/efi_loader/Makefile | 4 + lib/efi_loader/efi_variable_tee.c | 662 ++ 10 files changed, 1055 insertions(+), 1 deletion(-) create mode 100644 configs/lx2160ardb_tfa_stmm_defconfig create mode 100644 include/mm_communication.h create mode 100644 lib/efi_loader/efi_variable_tee.c -- 2.26.2
[PATCH 4/7 v4] MAINTAINERS: Add maintainer for EFI variables via OP-TEE
Add myself as maintainer for the OP-TEE related UEFI variable storage. Signed-off-by: Ilias Apalodimas Reviewed-by: Heinrich Schuchardt --- MAINTAINERS | 6 ++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index d67112479700..8add9d4c2ae9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -635,6 +635,12 @@ F: cmd/efidebug.c F: cmd/nvedit_efi.c F: tools/file2include.c +EFI VARIABLES VIA OP-TEE +M: Ilias Apalodimas +S: Maintained +F: lib/efi_loader/efi_variable_tee.c +F: include/mm_communication.h + ENVIRONMENT M: Joe Hershberger R: Wolfgang Denk -- 2.26.2
[PATCH 2/7 v4] efi_loader: Implement EFI variable handling via OP-TEE
In OP-TEE we can run EDK2's StandAloneMM on a secure partition.
StandAloneMM is responsible for the UEFI variable support. In
combination with OP-TEE and it's U-Boot supplicant, variables are
authenticated/validated in secure world and stored on an RPMB partition.
So let's add a new config option in U-Boot implementing the necessary
calls to OP-TEE for the variable management.
Signed-off-by: Ilias Apalodimas
Signed-off-by: Pipat Methavanitpong
Signed-off-by: Sughosh Ganu
Reviewed-by: Heinrich Schuchardt
---
lib/efi_loader/Kconfig| 9 +
lib/efi_loader/Makefile | 4 +
lib/efi_loader/efi_variable_tee.c | 662 ++
3 files changed, 675 insertions(+)
create mode 100644 lib/efi_loader/efi_variable_tee.c
diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig
index 1cfa24ffcf72..aad37b715505 100644
--- a/lib/efi_loader/Kconfig
+++ b/lib/efi_loader/Kconfig
@@ -164,4 +164,13 @@ config EFI_SECURE_BOOT
it is signed with a trusted key. To do that, you need to install,
at least, PK, KEK and db.
+config EFI_MM_COMM_TEE
+ bool "UEFI variables storage service via OP-TEE"
+ depends on OPTEE
+ default n
+ help
+ If OP-TEE is present and running StandAloneMM, dispatch all UEFI
variable
+ related operations to that. The application will verify, authenticate
and
+ store the variables on an RPMB.
+
endif
diff --git a/lib/efi_loader/Makefile b/lib/efi_loader/Makefile
index 84d61df55b93..57c7e66ea0e2 100644
--- a/lib/efi_loader/Makefile
+++ b/lib/efi_loader/Makefile
@@ -35,7 +35,11 @@ obj-y += efi_root_node.o
obj-y += efi_runtime.o
obj-y += efi_setup.o
obj-$(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2) += efi_unicode_collation.o
+ifeq ($(CONFIG_EFI_MM_COMM_TEE),y)
+obj-y += efi_variable_tee.o
+else
obj-y += efi_variable.o
+endif
obj-y += efi_watchdog.o
obj-$(CONFIG_LCD) += efi_gop.o
obj-$(CONFIG_DM_VIDEO) += efi_gop.o
diff --git a/lib/efi_loader/efi_variable_tee.c
b/lib/efi_loader/efi_variable_tee.c
new file mode 100644
index ..cacc76e23db1
--- /dev/null
+++ b/lib/efi_loader/efi_variable_tee.c
@@ -0,0 +1,662 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * EFI variable service via OP-TEE
+ *
+ * Copyright (C) 2019 Linaro Ltd.
+ * Copyright (C) 2019 Linaro Ltd.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+static efi_uintn_t max_buffer_size;/* comm + var + func + data */
+static efi_uintn_t max_payload_size; /* func + data */
+
+struct mm_connection {
+ struct udevice *tee;
+ u32 session;
+};
+
+/**
+ * get_connection() - Retrieve OP-TEE session for a specific UUID.
+ *
+ * @conn: session buffer to fill
+ * Return: status code
+ */
+static int get_connection(struct mm_connection *conn)
+{
+ static const struct tee_optee_ta_uuid uuid = PTA_STMM_UUID;
+ struct udevice *tee = NULL;
+ struct tee_open_session_arg arg;
+ int rc;
+
+ tee = tee_find_device(tee, NULL, NULL, NULL);
+ if (!tee)
+ return -ENODEV;
+
+ memset(&arg, 0, sizeof(arg));
+ tee_optee_ta_uuid_to_octets(arg.uuid, &uuid);
+ rc = tee_open_session(tee, &arg, 0, NULL);
+ if (!rc) {
+ conn->tee = tee;
+ conn->session = arg.session;
+ }
+
+ return rc;
+}
+
+/**
+ * optee_mm_communicate() - Pass a buffer to StandaloneMM running in OP-TEE
+ *
+ * @comm_buf: locally allocted communcation buffer
+ * @dsize: buffer size
+ * Return: status code
+ */
+static efi_status_t optee_mm_communicate(void *comm_buf, ulong dsize)
+{
+ ulong buf_size;
+ efi_status_t ret;
+ struct efi_mm_communicate_header *mm_hdr;
+ struct mm_connection conn = { NULL, 0 };
+ struct tee_invoke_arg arg;
+ struct tee_param param[2];
+ struct tee_shm *shm = NULL;
+ int rc;
+
+ if (!comm_buf)
+ return EFI_INVALID_PARAMETER;
+
+ mm_hdr = (struct efi_mm_communicate_header *)comm_buf;
+ buf_size = mm_hdr->message_len + sizeof(efi_guid_t) + sizeof(size_t);
+
+ if (dsize != buf_size)
+ return EFI_INVALID_PARAMETER;
+
+ rc = get_connection(&conn);
+ if (rc) {
+ log_err("Unable to open OP-TEE session (err=%d)\n", rc);
+ return EFI_UNSUPPORTED;
+ }
+
+ if (tee_shm_register(conn.tee, comm_buf, buf_size, 0, &shm)) {
+ log_err("Unable to register shared memory\n");
+ return EFI_UNSUPPORTED;
+ }
+
+ memset(&arg, 0, sizeof(arg));
+ arg.func = PTA_STMM_CMDID_COMMUNICATE;
+ arg.session = conn.session;
+
+ memset(param, 0, sizeof(param));
+ param[0].attr = TEE_PARAM_ATTR_TYPE_MEMREF_INOUT;
+ param[0].u.memref.size = buf_size;
+ param[0].u.memref.shm = shm;
+ param[1].attr = TEE_PARAM_ATTR_TYPE_VALUE_OUTPUT;
+
+ rc = tee_invoke_func(co
[PATCH 1/7 v4] efi_loader: Add headers for EDK2 StandAloneMM communication
From: Sughosh Ganu
In Arm devices OP-TEE has the ability to run StandAloneMM (from EDK2)
in a separate partition and handle UEFI variables.
A following patch introduces this functionality.
Add the headers needed for OP-TEE <--> StandAloneMM communication
Signed-off-by: Sughosh Ganu
Signed-off-by: Ilias Apalodimas
Reviewed-by: Heinrich Schuchardt
---
include/mm_communication.h | 208 +
1 file changed, 208 insertions(+)
create mode 100644 include/mm_communication.h
diff --git a/include/mm_communication.h b/include/mm_communication.h
new file mode 100644
index ..193c4d157874
--- /dev/null
+++ b/include/mm_communication.h
@@ -0,0 +1,208 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Headers for EFI variable service via StandAloneMM, EDK2 application running
+ * in OP-TEE
+ *
+ * Copyright (c) 2017, Intel Corporation. All rights reserved.
+ * Copyright (C) 2020 Linaro Ltd.
+ * Copyright (C) 2020 Linaro Ltd.
+ */
+
+#ifndef _MM_COMMUNICATION_H_
+#define _MM_COMMUNICATION_H_
+
+#include
+
+/*
+ * Interface to the pseudo Trusted Application (TA), which provides a
+ * communication channel with the Standalone MM (Management Mode)
+ * Secure Partition running at Secure-EL0
+ */
+
+#define PTA_STMM_CMDID_COMMUNICATE 0
+
+/* OP-TEE is using big endian GUIDs while UEFI uses little endian ones */
+#define PTA_STMM_UUID { 0xed32d533, 0x99e6, 0x4209, {\
+ 0x9c, 0xc0, 0x2d, 0x72, 0xcd, 0xd9, 0x98, 0xa7 } }
+
+#define EFI_MM_VARIABLE_GUID \
+ EFI_GUID(0xed32d533, 0x99e6, 0x4209, \
+0x9c, 0xc0, 0x2d, 0x72, 0xcd, 0xd9, 0x98, 0xa7)
+
+/* Defined in EDK2 MdePkg/Include/Protocol/MmCommunication.h */
+
+/**
+ * struct efi_mm_communicate_header - Header used for SMM variable
communication
+
+ * @header_guid: header use for disambiguation of content
+ * @message_len: length of the message. Does not include the size of the
+ *header
+ * @data: payload of the message
+ *
+ * Defined in EDK2 as EFI_MM_COMMUNICATE_HEADER.
+ * To avoid confusion in interpreting frames, the communication buffer should
+ * always begin with efi_mm_communicate_header.
+ */
+struct efi_mm_communicate_header {
+ efi_guid_t header_guid;
+ size_t message_len;
+ u8 data[];
+};
+
+#define MM_COMMUNICATE_HEADER_SIZE \
+ (sizeof(struct efi_mm_communicate_header))
+
+/* Defined in EDK2 ArmPkg/Include/IndustryStandard/ArmStdSmc.h */
+
+/* MM return error codes */
+#define ARM_SMC_MM_RET_SUCCESS 0
+#define ARM_SMC_MM_RET_NOT_SUPPORTED -1
+#define ARM_SMC_MM_RET_INVALID_PARAMS -2
+#define ARM_SMC_MM_RET_DENIED -3
+#define ARM_SMC_MM_RET_NO_MEMORY -4
+
+/* Defined in EDK2 MdeModulePkg/Include/Guid/SmmVariableCommon.h */
+
+#define SMM_VARIABLE_FUNCTION_GET_VARIABLE 1
+/*
+ * The payload for this function is
+ * SMM_VARIABLE_COMMUNICATE_GET_NEXT_VARIABLE_NAME.
+ */
+#define SMM_VARIABLE_FUNCTION_GET_NEXT_VARIABLE_NAME 2
+/*
+ * The payload for this function is SMM_VARIABLE_COMMUNICATE_ACCESS_VARIABLE.
+ */
+#define SMM_VARIABLE_FUNCTION_SET_VARIABLE 3
+/*
+ * The payload for this function is
+ * SMM_VARIABLE_COMMUNICATE_QUERY_VARIABLE_INFO.
+ */
+#define SMM_VARIABLE_FUNCTION_QUERY_VARIABLE_INFO 4
+/*
+ * It is a notify event, no extra payload for this function.
+ */
+#define SMM_VARIABLE_FUNCTION_READY_TO_BOOT 5
+/*
+ * It is a notify event, no extra payload for this function.
+ */
+#define SMM_VARIABLE_FUNCTION_EXIT_BOOT_SERVICE 6
+/*
+ * The payload for this function is VARIABLE_INFO_ENTRY.
+ * The GUID in EFI_SMM_COMMUNICATE_HEADER is gEfiSmmVariableProtocolGuid.
+ */
+#define SMM_VARIABLE_FUNCTION_GET_STATISTICS 7
+/*
+ * The payload for this function is SMM_VARIABLE_COMMUNICATE_LOCK_VARIABLE
+ */
+#define SMM_VARIABLE_FUNCTION_LOCK_VARIABLE 8
+
+#define SMM_VARIABLE_FUNCTION_VAR_CHECK_VARIABLE_PROPERTY_SET 9
+
+#define SMM_VARIABLE_FUNCTION_VAR_CHECK_VARIABLE_PROPERTY_GET 10
+
+#define SMM_VARIABLE_FUNCTION_GET_PAYLOAD_SIZE 11
+/*
+ * The payload for this function is
+ * SMM_VARIABLE_COMMUNICATE_RUNTIME_VARIABLE_CACHE_CONTEXT
+ */
+#define SMM_VARIABLE_FUNCTION_INIT_RUNTIME_VARIABLE_CACHE_CONTEXT 12
+
+#define SMM_VARIABLE_FUNCTION_SYNC_RUNTIME_CACHE 13
+/*
+ * The payload for this function is
+ * SMM_VARIABLE_COMMUNICATE_GET_RUNTIME_CACHE_INFO
+ */
+#define SMM_VARIABLE_FUNCTION_GET_RUNTIME_CACHE_INFO 14
+
+/**
+ * struct smm_variable_communicate_header - Used for SMM variable communication
+
+ * @function: function to call in Smm.
+ * @ret_status: return status
+ * @data: payload
+ *
+ * Defined in EDK2 as SMM_VARIABLE_COMMUNICATE_HEADER.
+ */
+struct smm_variable_communicate_header {
+ efi_uintn_t function;
+ efi_status_t ret_status;
+ u8 data[];
+};
+
+#define MM_VARIABLE_COMMUNICATE_SIZE \
+ (sizeof(struct smm_variable_communicate_header))
+
+/**
+ * struct smm_variable_access
[PATCH 6/7 v4] configs: lx2160a: Add default config for lx2160a using StMM in OP-TEE
Previous patches allow UEFI secure variables to be stored in an RPMB device using OPTEE. Add a config for the lx2160a hardware so the feature gets at least compiled. Signed-off-by: Ilias Apalodimas --- board/freescale/lx2160a/MAINTAINERS | 1 + configs/lx2160ardb_tfa_stmm_defconfig | 85 +++ 2 files changed, 86 insertions(+) create mode 100644 configs/lx2160ardb_tfa_stmm_defconfig diff --git a/board/freescale/lx2160a/MAINTAINERS b/board/freescale/lx2160a/MAINTAINERS index 47ae04c91a0d..9fe79c0ef7a6 100644 --- a/board/freescale/lx2160a/MAINTAINERS +++ b/board/freescale/lx2160a/MAINTAINERS @@ -5,6 +5,7 @@ F: board/freescale/lx2160a/ F: include/configs/lx2160a_common.h F: include/configs/lx2160ardb.h F: configs/lx2160ardb_tfa_defconfig +F: configs/lx2160ardb_tfa_stmm_defconfig F: arch/arm/dts/fsl-lx2160a-rdb.dts LX2160ARDB_SECURE_BOOT BOARD diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig new file mode 100644 index ..81a2e4696b24 --- /dev/null +++ b/configs/lx2160ardb_tfa_stmm_defconfig @@ -0,0 +1,85 @@ +CONFIG_ARM=y +CONFIG_TARGET_LX2160ARDB=y +CONFIG_TFABOOT=y +CONFIG_SYS_TEXT_BASE=0x8200 +CONFIG_SYS_MALLOC_F_LEN=0x6000 +CONFIG_ENV_SIZE=0x2000 +CONFIG_ENV_OFFSET=0x50 +CONFIG_ENV_SECT_SIZE=0x2 +CONFIG_DM_GPIO=y +CONFIG_EMC2305=y +CONFIG_FSPI_AHB_EN_4BYTE=y +CONFIG_NR_DRAM_BANKS=3 +CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y +CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y +CONFIG_AHCI=y +CONFIG_FIT_VERBOSE=y +CONFIG_OF_BOARD_SETUP=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_BOOTDELAY=10 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="console=ttyAMA0,115200 root=/dev/ram0 earlycon=pl011,mmio32,0x21c ramdisk_size=0x200 default_hugepagesz=1024m hugepagesz=1024m hugepages=2 pci=pcie_bus_perf" +# CONFIG_USE_BOOTCOMMAND is not set +CONFIG_CMD_GREPENV=y +CONFIG_CMD_NVEDIT_EFI=y +CONFIG_CMD_EEPROM=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PCI=y +CONFIG_CMD_USB=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EFIDEBUG=y +CONFIG_MP=y +CONFIG_OF_CONTROL=y +CONFIG_OF_BOARD_FIXUP=y +CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb" +CONFIG_ENV_IS_IN_MMC=y +CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_ENV_ADDR=0x2050 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_TFTP_BLOCKSIZE=512 +CONFIG_DM=y +CONFIG_SATA_CEVA=y +CONFIG_FSL_CAAM=y +CONFIG_DM_I2C=y +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y +CONFIG_I2C_DEFAULT_BUS_NUMBER=0 +CONFIG_DM_MMC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_FSL_ESDHC=y +CONFIG_MTD=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_STMICRO=y +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set +CONFIG_PHYLIB=y +CONFIG_PHY_AQUANTIA=y +CONFIG_PHY_ATHEROS=y +CONFIG_PHY_CORTINA=y +CONFIG_DM_ETH=y +CONFIG_DM_MDIO=y +CONFIG_E1000=y +CONFIG_FSL_LS_MDIO=y +CONFIG_PCI=y +CONFIG_DM_PCI=y +CONFIG_DM_PCI_COMPAT=y +CONFIG_PCIE_LAYERSCAPE=y +CONFIG_PCIE_LAYERSCAPE_GEN4=y +CONFIG_DM_RTC=y +CONFIG_RTC_PCF2127=y +CONFIG_DM_SCSI=y +CONFIG_DM_SERIAL=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_NXP_FSPI=y +CONFIG_TEE=y +CONFIG_OPTEE=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_EFI_LOADER_BOUNCE_BUFFER=y +CONFIG_EFI_MM_COMM_TEE=y +CONFIG_OPTEE_TZDRAM_SIZE=0x -- 2.26.2
[PATCH 3/7 v4] cmd: efidebug: Add support for querying UEFI variable storage
With the previous patches that use OP-TEE and StandAloneMM for UEFI
variable storage we've added functionality for efi_query_variable_info.
So let's add the relevant command to efidebug and retrieve information
about the container used to store UEFI variables
Signed-off-by: Ilias Apalodimas
---
cmd/efidebug.c | 58 +-
1 file changed, 57 insertions(+), 1 deletion(-)
diff --git a/cmd/efidebug.c b/cmd/efidebug.c
index 5cc0a41af3b4..f020d95dbb79 100644
--- a/cmd/efidebug.c
+++ b/cmd/efidebug.c
@@ -1165,6 +1165,58 @@ static int do_efi_test(cmd_tbl_t *cmdtp, int flag,
return cp->cmd(cmdtp, flag, argc, argv);
}
+/**
+ * do_efi_query_info() - QueryVariableInfo EFI service
+ *
+ * @cmdtp: Command table
+ * @flag: Command flag
+ * @argc: Number of arguments
+ * @argv: Argument array
+ * Return: CMD_RET_SUCCESS on success,
+ * CMD_RET_USAGE or CMD_RET_FAILURE on failure
+ *
+ * Implement efidebug "test" sub-command.
+ */
+
+static int do_efi_query_info(cmd_tbl_t *cmdtp, int flag,
+int argc, char * const argv[])
+{
+ efi_status_t ret;
+ u32 attr = 0;
+ u64 max_variable_storage_size;
+ u64 remain_variable_storage_size;
+ u64 max_variable_size;
+ int i;
+
+ for (i = 1; i < argc; i++) {
+ if (!strcmp(argv[i], "-bs"))
+ attr |= EFI_VARIABLE_BOOTSERVICE_ACCESS;
+ else if (!strcmp(argv[i], "-rt"))
+ attr |= EFI_VARIABLE_RUNTIME_ACCESS;
+ else if (!strcmp(argv[i], "-nv"))
+ attr |= EFI_VARIABLE_NON_VOLATILE;
+ else if (!strcmp(argv[i], "-at"))
+ attr |=
+
EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS;
+ }
+
+ ret = EFI_CALL(efi_query_variable_info(attr,
+ &max_variable_storage_size,
+ &remain_variable_storage_size,
+ &max_variable_size));
+ if (ret != EFI_SUCCESS) {
+ printf("Error: Cannot query UEFI variables, r = %lu\n",
+ ret & ~EFI_ERROR_MASK);
+ return CMD_RET_FAILURE;
+ }
+
+ printf("Max storage size %llu\n", max_variable_storage_size);
+ printf("Remaining storage size %llu\n", remain_variable_storage_size);
+ printf("Max variable size %llu\n", max_variable_size);
+
+ return CMD_RET_SUCCESS;
+}
+
static cmd_tbl_t cmd_efidebug_sub[] = {
U_BOOT_CMD_MKENT(boot, CONFIG_SYS_MAXARGS, 1, do_efi_boot_opt, "", ""),
U_BOOT_CMD_MKENT(devices, CONFIG_SYS_MAXARGS, 1, do_efi_show_devices,
@@ -1181,6 +1233,8 @@ static cmd_tbl_t cmd_efidebug_sub[] = {
"", ""),
U_BOOT_CMD_MKENT(test, CONFIG_SYS_MAXARGS, 1, do_efi_test,
"", ""),
+ U_BOOT_CMD_MKENT(query, CONFIG_SYS_MAXARGS, 1, do_efi_query_info,
+"", ""),
};
/**
@@ -1252,7 +1306,9 @@ static char efidebug_help_text[] =
"efidebug tables\n"
" - show UEFI configuration tables\n"
"efidebug test bootmgr\n"
- " - run simple bootmgr for test\n";
+ " - run simple bootmgr for test\n"
+ "efidebug query [-nv][-bs][-rt][-at]\n"
+ " - show size of UEFI variables store\n";
#endif
U_BOOT_CMD(
--
2.26.2
[PATCH 7/7 v4] dts: nxp2160ardb: add op-tee node
A defconfig is added on lx2160ardb which allows UEFI variable management
via OP-TEE. Enable the the node in the relevant DTS file.
Signed-off-by: Ilias Apalodimas
---
arch/arm/dts/fsl-lx2160a.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index 17ecdc569b37..73d04db7e402 100644
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -428,4 +428,10 @@
#size-cells = <0>;
status = "disabled";
};
+ firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+ };
};
--
2.26.2
