Re: [U-Boot] [PATCH v3 2/3] rtc: pl031: convert the driver to driver model
On Sat, Jul 21, 2018 at 06:53:16AM +0200, Heinrich Schuchardt wrote:
> On 07/11/2018 11:06 AM, AKASHI Takahiro wrote:
> > With this patch, PL031 driver is converted to driver-model-compliant
> > driver. In addition, CONFIG_SYS_RTC_PL031_BASE is no longer valid.
> >
> > Signed-off-by: AKASHI Takahiro
> > ---
> > drivers/rtc/Kconfig | 6 ++
> > drivers/rtc/pl031.c | 126 ++-
> > scripts/config_whitelist.txt | 1 -
> > 3 files changed, 86 insertions(+), 47 deletions(-)
> >
> > diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
> > index a3f8c8aecc..96c4cce410 100644
> > --- a/drivers/rtc/Kconfig
> > +++ b/drivers/rtc/Kconfig
> > @@ -55,6 +55,12 @@ config RTC_MV
> > Enable Marvell RTC driver. This driver supports the rtc that is
> > present
> > on some Marvell SoCs.
> >
> > +config RTC_PL031
> > + bool "Enable ARM PL031 driver"
> > + depends on DM_RTC
> > + help
> > + Enable ARM PL031 driver.
> > +
>
> Tom merged
> http://git.denx.de/?p=u-boot.git;a=commit;h=b19886b9469174213877ef37670ce35c55acb456
> https://patchwork.ozlabs.org/patch/936533/
> ARM: qemu-arm: enable RTC
> which is superseeded by your patch series.
>
> We should avoid duplicate entries CONFIG_RTC_PL031.
>
> Symbol CONFIG_SYS_RTC_PL031_BASE can be removed in
> include/configs/qemu-arm.h with this patch.
>
> Could you, please, respin your patch series.
I think that your patch be reverted first and my patch be
merged (in this merge window or next -rc1) as u-boot master
is still open.
-Takahiro AKASHI
> Best regards
>
> Heinrich
>
> > config RTC_S35392A
> > bool "Enable S35392A driver"
> > select BITREVERSE
> > diff --git a/drivers/rtc/pl031.c b/drivers/rtc/pl031.c
> > index 8955805e3b..b8fd944e44 100644
> > --- a/drivers/rtc/pl031.c
> > +++ b/drivers/rtc/pl031.c
> > @@ -8,13 +8,11 @@
> >
> > #include
> > #include
> > +#include
> > +#include
> > #include
> > -
> > -#if defined(CONFIG_CMD_DATE)
> > -
> > -#ifndef CONFIG_SYS_RTC_PL031_BASE
> > -#error CONFIG_SYS_RTC_PL031_BASE is not defined!
> > -#endif
> > +#include
> > +#include
> >
> > /*
> > * Register definitions
> > @@ -30,78 +28,114 @@
> >
> > #define RTC_CR_START (1 << 0)
> >
> > -#defineRTC_WRITE_REG(addr, val) \
> > - (*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE +
> > (addr)) = (val))
> > -#defineRTC_READ_REG(addr) \
> > - (*(volatile unsigned int *)(CONFIG_SYS_RTC_PL031_BASE +
> > (addr)))
> > +struct pl031_platdata {
> > + phys_addr_t base;
> > +};
> >
> > -static int pl031_initted = 0;
> > +static inline u32 pl031_read_reg(struct udevice *dev, int reg)
> > +{
> > + struct pl031_platdata *pdata = dev_get_platdata(dev);
> >
> > -/* Enable RTC Start in Control register*/
> > -void rtc_init(void)
> > + return readl(pdata->base + reg);
> > +}
> > +
> > +static inline u32 pl031_write_reg(struct udevice *dev, int reg, u32 value)
> > {
> > - RTC_WRITE_REG(RTC_CR, RTC_CR_START);
> > + struct pl031_platdata *pdata = dev_get_platdata(dev);
> >
> > - pl031_initted = 1;
> > + return writel(value, pdata->base + reg);
> > }
> >
> > /*
> > - * Reset the RTC. We set the date back to 1970-01-01.
> > + * Probe RTC device
> > + */
> > +static int pl031_probe(struct udevice *dev)
> > +{
> > + /* Enable RTC Start in Control register*/
> > + pl031_write_reg(dev, RTC_CR, RTC_CR_START);
> > +
> > + return 0;
> > +}
> > +
> > +/*
> > + * Get the current time from the RTC
> > */
> > -void rtc_reset(void)
> > +static int pl031_get(struct udevice *dev, struct rtc_time *tm)
> > {
> > - RTC_WRITE_REG(RTC_LR, 0x00);
> > - if(!pl031_initted)
> > - rtc_init();
> > + unsigned long tim;
> > +
> > + if (!tm)
> > + return -EINVAL;
> > +
> > + tim = pl031_read_reg(dev, RTC_DR);
> > +
> > + rtc_to_tm(tim, tm);
> > +
> > + debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
> > + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
> > + tm->tm_hour, tm->tm_min, tm->tm_sec);
> > +
> > + return 0;
> > }
> >
> > /*
> > * Set the RTC
> > -*/
> > -int rtc_set(struct rtc_time *tmp)
> > + */
> > +static int pl031_set(struct udevice *dev, const struct rtc_time *tm)
> > {
> > unsigned long tim;
> >
> > - if(!pl031_initted)
> > - rtc_init();
> > + if (!tm)
> > + return -EINVAL;
> >
> > - if (tmp == NULL) {
> > - puts("Error setting the date/time\n");
> > - return -1;
> > - }
> > + debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
> > + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday,
> > + tm->tm_hour, tm->tm_min, tm->tm_sec);
> >
> > /* Calculate number of seconds this incoming time represents */
> > - tim = rtc_mktime(tmp);
> > + tim = rtc_mktime(tm);
> >
> > - RTC_WRITE_REG(RTC_LR, tim);
> > + pl031_write_reg(dev, RTC_LR, tim
Re: [U-Boot] [PATCH 00/17] fs: fat: extend FAT write operations
On Sun, Jul 22, 2018 at 08:44:39AM +0200, Heinrich Schuchardt wrote: > Hello Tom, hello Alex, > > I have been testing the patches. They are working fine for ASCII file > names. To support Unicode file names extra work will be needed. But > probably we should postpone this to a later patch series. I absolutely agree. To be clear, the aim of my FAT write patchset is to successfully run SCT to evaluate and verify UEFI-related features rather than to make the implementation comply with UEFI specification. For the latter purpose, separate patches would be compiled as it might require time-consuming efforts. (I'm sure that SCT's file (media access) protocol test causes lots of test case failures.) Thanks, -Takahiro AKASHI > There are some dependencies with my work for correcting errors in > Unicode handling for the EFI branch. Should the patches be passed via > efi-next? > > Best regards > > Heinrich ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 02/17] fs: fat: handle "." and ".." of root dir correctly with fat_itr_resolve()
On Fri, Jul 20, 2018 at 08:09:00PM +0200, Heinrich Schuchardt wrote:
> On 07/20/2018 04:57 AM, AKASHI Takahiro wrote:
> > FAT's root directory does not have "." nor ".."
> > So care must be taken when scanning root directory with fat_itr_resolve().
> > Without this patch, any file path starting with "." or ".." will not be
> > resolved at all.
> >
> > Signed-off-by: AKASHI Takahiro
> > ---
> > fs/fat/fat.c | 21 +
> > 1 file changed, 21 insertions(+)
> >
> > diff --git a/fs/fat/fat.c b/fs/fat/fat.c
> > index b48f48a751..fd6523c66b 100644
> > --- a/fs/fat/fat.c
> > +++ b/fs/fat/fat.c
> > @@ -927,6 +927,27 @@ static int fat_itr_resolve(fat_itr *itr, const char
> > *path, unsigned type)
> > while (next[0] && !ISDIRDELIM(next[0]))
> > next++;
> >
> > + if (itr->is_root) {
> > + /* root dir doesn't have "." nor ".." */
>
> I understand why root has no ../ but /./ should be valid.
What I meant here is that, according to FAT specification, the root
directory has neither "." directory entry nor ".." in its associated
clusters in contrast to ordinary directories.
So when user specifies "." or ".." (and other variants), we will have to
take special care to handle them correctly.
> On Linux 'ls /./' displays the root directory.
My code works with any of the following paths:
* .
* ..
* /
* /.
* /.., or
* even any combination of above, like
./.././.././
Note that "ls /.." on linux also shows the root directory.
Please try.
-Takahiro AKASHI
> Best regards
>
> Heinrich
>
> > + if next - path) == 1) && !strncmp(path, ".", 1)) ||
> > + (((next - path) == 2) && !strncmp(path, "..", 2))) {
> > + /* point back to itself */
> > + itr->clust = itr->fsdata->root_cluster;
> > + itr->dent = NULL;
> > + itr->remaining = 0;
> > + itr->last_cluster = 0;
> > +
> > + if (next[0] == 0) {
> > + if (type & TYPE_DIR)
> > + return 0;
> > + else
> > + return -ENOENT;
> > + }
> > +
> > + return fat_itr_resolve(itr, next, type);
> > + }
> > + }
> > +
> > while (fat_itr_next(itr)) {
> > int match = 0;
> > unsigned n = max(strlen(itr->name), (size_t)(next - path));
> >
>
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[U-Boot] [PATCH v5] u-boot: remove driver lookup loop from env_save()
When called with ENVOP_SAVE, env_get_location() only returns the
gd->env_load_location variable without actually checking for
the environment location and priority.
This behaviour causes env_save() to fall into an infinite loop when
the low-level drv->save() call fails.
The env_save() function should not loop through the environment
location list but it should save the environment into the location
stored in gd->env_load_location by the last env_load() call.
Signed-off-by: Nicholas Faustini
Reviewed-by: Simon Goldschmidt
---
Changes in v5:
- Correction to 'Reviewed-by' tag
Changes in v4:
- Remove env_load_location from gd_t since it is not used anymore
Changes in v3:
- Add comment when env_load() fails and the env location is restored
- Introduce env_load_prio into gd struct. It stores the current
priority of the environment location. Refactor of env_get_location()
which acts the same on all the 'env_operation'
Changes in v2:
- Restore gd->env_load_location to the highest priority location when
env_load() fails
env/env.c | 34 --
include/asm-generic/global_data.h | 2 +-
2 files changed, 17 insertions(+), 19 deletions(-)
diff --git a/env/env.c b/env/env.c
index 5c0842a..e033b46 100644
--- a/env/env.c
+++ b/env/env.c
@@ -119,21 +119,12 @@ static void env_set_inited(enum env_location location)
*/
__weak enum env_location env_get_location(enum env_operation op, int prio)
{
- switch (op) {
- case ENVOP_GET_CHAR:
- case ENVOP_INIT:
- case ENVOP_LOAD:
- if (prio >= ARRAY_SIZE(env_locations))
- return ENVL_UNKNOWN;
-
- gd->env_load_location = env_locations[prio];
- return gd->env_load_location;
-
- case ENVOP_SAVE:
- return gd->env_load_location;
- }
+ if (prio >= ARRAY_SIZE(env_locations))
+ return ENVL_UNKNOWN;
+
+ gd->env_load_prio = prio;
- return ENVL_UNKNOWN;
+ return env_locations[prio];
}
@@ -205,22 +196,29 @@ int env_load(void)
return 0;
}
+ /*
+* In case of invalid environment, we set the 'default' env location
+* to the highest priority. In this way, next calls to env_save()
+* will restore the environment at the right place.
+*/
+ env_get_location(ENVOP_LOAD, 0);
+
return -ENODEV;
}
int env_save(void)
{
struct env_driver *drv;
- int prio;
- for (prio = 0; (drv = env_driver_lookup(ENVOP_SAVE, prio)); prio++) {
+ drv = env_driver_lookup(ENVOP_SAVE, gd->env_load_prio);
+ if (drv) {
int ret;
if (!drv->save)
- continue;
+ return -ENODEV;
if (!env_has_inited(drv->location))
- continue;
+ return -ENODEV;
printf("Saving Environment to %s... ", drv->name);
ret = drv->save();
diff --git a/include/asm-generic/global_data.h
b/include/asm-generic/global_data.h
index 0fd4900..c83fc01 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -50,7 +50,7 @@ typedef struct global_data {
unsigned long env_addr; /* Address of Environment struct */
unsigned long env_valid;/* Environment valid? enum env_valid */
unsigned long env_has_init; /* Bitmask of boolean of struct
env_location offsets */
- int env_load_location;
+ int env_load_prio; /* Priority of the loaded environment */
unsigned long ram_base; /* Base address of RAM used by U-Boot */
unsigned long ram_top; /* Top address of RAM used by U-Boot */
--
2.7.4
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Re: [U-Boot] [PATCH 03/17] fs: fat: make directory iterator global for write use
On Fri, Jul 20, 2018 at 08:02:57PM +0200, Heinrich Schuchardt wrote:
> On 07/20/2018 04:57 AM, AKASHI Takahiro wrote:
> > Directory iterator was introduced in major re-work of read operation by
> > Rob. We want to use it for write operation extensively as well.
> > This patch makes relevant functions, as well as iterator defition, visible
> > outside of fat.c.
> >
> > Signed-off-by: AKASHI Takahiro
> > ---
> > fs/fat/fat.c | 39 ++-
> > include/fat.h | 32
> > 2 files changed, 38 insertions(+), 33 deletions(-)
> >
> > diff --git a/fs/fat/fat.c b/fs/fat/fat.c
> > index fd6523c66b..0f82cbe1bd 100644
> > --- a/fs/fat/fat.c
> > +++ b/fs/fat/fat.c
> > @@ -634,25 +634,6 @@ static int get_fs_info(fsdata *mydata)
> > * For more complete example, see fat_itr_resolve()
> > */
> >
> > -typedef struct {
> > - fsdata*fsdata;/* filesystem parameters */
> > - unsigned clust; /* current cluster */
> > - intlast_cluster; /* set once we've read last cluster */
> > - intis_root; /* is iterator at root directory */
> > - intremaining; /* remaining dent's in current cluster */
> > -
> > - /* current iterator position values: */
> > - dir_entry *dent; /* current directory entry */
> > - char l_name[VFAT_MAXLEN_BYTES];/* long (vfat) name */
> > - char s_name[14];/* short 8.3 name */
> > - char *name; /* l_name if there is one, else s_name */
> > -
> > - /* storage for current cluster in memory: */
> > - u8 block[MAX_CLUSTSIZE] __aligned(ARCH_DMA_MINALIGN);
> > -} fat_itr;
> > -
> > -static int fat_itr_isdir(fat_itr *itr);
> > -
> > /**
> > * fat_itr_root() - initialize an iterator to start at the root
> > * directory
> > @@ -661,7 +642,7 @@ static int fat_itr_isdir(fat_itr *itr);
> > * @fsdata: filesystem data for the partition
> > * @return 0 on success, else -errno
> > */
> > -static int fat_itr_root(fat_itr *itr, fsdata *fsdata)
> > +int fat_itr_root(fat_itr *itr, fsdata *fsdata)
> > {
> > if (get_fs_info(fsdata))
> > return -ENXIO;
> > @@ -693,7 +674,7 @@ static int fat_itr_root(fat_itr *itr, fsdata *fsdata)
> > * @parent: the iterator pointing at a directory entry in the
> > *parent directory of the directory to iterate
> > */
> > -static void fat_itr_child(fat_itr *itr, fat_itr *parent)
> > +void fat_itr_child(fat_itr *itr, fat_itr *parent)
> > {
> > fsdata *mydata = parent->fsdata; /* for silly macros */
> > unsigned clustnum = START(parent->dent);
> > @@ -713,7 +694,7 @@ static void fat_itr_child(fat_itr *itr, fat_itr *parent)
> > itr->last_cluster = 0;
> > }
> >
> > -static void *next_cluster(fat_itr *itr)
> > +void *next_cluster(fat_itr *itr)
> > {
> > fsdata *mydata = itr->fsdata; /* for silly macros */
> > int ret;
> > @@ -834,7 +815,7 @@ static dir_entry *extract_vfat_name(fat_itr *itr)
> > * @return boolean, 1 if success or 0 if no more entries in the
> > *current directory
> > */
> > -static int fat_itr_next(fat_itr *itr)
> > +int fat_itr_next(fat_itr *itr)
> > {
> > dir_entry *dent;
> >
> > @@ -879,19 +860,11 @@ static int fat_itr_next(fat_itr *itr)
> > * @itr: the iterator
> > * @return true if cursor is at a directory
> > */
> > -static int fat_itr_isdir(fat_itr *itr)
> > +int fat_itr_isdir(fat_itr *itr)
> > {
> > return !!(itr->dent->attr & ATTR_DIR);
> > }
> >
> > -/*
> > - * Helpers:
> > - */
> > -
> > -#define TYPE_FILE 0x1
> > -#define TYPE_DIR 0x2
> > -#define TYPE_ANY (TYPE_FILE | TYPE_DIR)
> > -
> > /**
> > * fat_itr_resolve() - traverse directory structure to resolve the
> > * requested path.
> > @@ -907,7 +880,7 @@ static int fat_itr_isdir(fat_itr *itr)
> > * @type: bitmask of allowable file types
> > * @return 0 on success or -errno
> > */
> > -static int fat_itr_resolve(fat_itr *itr, const char *path, unsigned type)
> > +int fat_itr_resolve(fat_itr *itr, const char *path, unsigned type)
> > {
> > const char *next;
> >
> > diff --git a/include/fat.h b/include/fat.h
> > index 0c88b59a4a..577e6b4592 100644
> > --- a/include/fat.h
> > +++ b/include/fat.h
> > @@ -187,6 +187,38 @@ static inline u32 sect_to_clust(fsdata *fsdata, int
> > sect)
> > return (sect - fsdata->data_begin) / fsdata->clust_size;
> > }
> >
> > +/*
> > + * Directory iterator
> > + */
> > +
> > +#define TYPE_FILE 0x1
> > +#define TYPE_DIR 0x2
> > +#define TYPE_ANY (TYPE_FILE | TYPE_DIR)
>
> Please, rename these to something more specific like FS_ITER_ANY.
>
> TYPE_ANY already is defined in fs/reiserfs/reiserfs_private.h:
>
> fs/reiserfs/reiserfs_private.h:160:#define TYPE_ANY 15
Good catch though the definition above comes directly from Rob's
original patch.
Since there is only one occurrence of TYPE_ANY in fs/fat,
I'd rather expand it without introducing another definition.
Thanks,
-Takahiro AKASH
Re: [U-Boot] [PATCH] ARM: mx6ul: Apply ERR011115 errata workaround
Hi Marcin, On 19/07/2018 13:37, Marcin Niestroj wrote: > ERR05 in IMX6UL errata says to use OCRAM memory above > 0x908000 (instead of 0x907000) for silicon revision 1.2 shipped > prior date code 1740. > > As we cannot check affected targets in runtime, apply that > workaround by default for all IMX6UL platforms. Leave possibility > to disable that workaround for non-affected targets, so more OCRAM > area can be used by SPL (e.g. for featureful SPL images). > I had a project with this issue - anyway, I disagree to apply the work-around for all MX6UL. Rather, we have no possibilities to detect and solve this at runtime. SPL is already loaded. But NXP has already fixed this in later production. Companies already know if there production is affected or not, and they can enable MX6UL_ERR05 for their products. We are already fighting with the OCRAM size, specially if other features (HAB and secure boot, further filesystems) are enabled. Reducing size is ok for some products (they cannot do in other way if they have some of these broken devices), it is not ok for other ones. I will propose to not set it as default for MX6UL. > Signed-off-by: Marcin Niestroj > --- > arch/arm/mach-imx/mx6/Kconfig | 9 + > include/configs/imx6_spl.h| 11 +-- > 2 files changed, 18 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig > index 521fad74b5..61708a0526 100644 > --- a/arch/arm/mach-imx/mx6/Kconfig > +++ b/arch/arm/mach-imx/mx6/Kconfig > @@ -58,6 +58,15 @@ config MX6UL > select SYSCOUNTER_TIMER > bool > > +config MX6UL_ERR05 > + bool "Workaround for ERR05 in IMX6UL Errata" > + depends on MX6UL > + default MX6UL > + help > + Say N here if you are sure that your platform is not affected > + with ERR05. Doing so might be useful in case of featureful > + (big) SPL images. Boards Maintainer should decide themselves instead of setting this as default. > + > config MX6UL_LITESOM > bool > select MX6UL > diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h > index 720ff045a7..42d12c7503 100644 > --- a/include/configs/imx6_spl.h > +++ b/include/configs/imx6_spl.h > @@ -19,16 +19,23 @@ > *which consists of a 4K header in front of us that contains the IVT, DCD > *and some padding thus 'our' max size is really 0x00908000 - 0x00918000 > *or 64KB > + * - Use 0x00909000 as start of OCRAM Free Area as a workaround for > + *ERR05 in IMX6UL Errata > */ > +#ifdef CONFIG_MX6UL_ERR05 > +#define CONFIG_SPL_TEXT_BASE 0x00909000 > +#else > #define CONFIG_SPL_TEXT_BASE 0x00908000 > -#define CONFIG_SPL_MAX_SIZE 0x1 > +#endif > + > +#define CONFIG_SPL_MAX_SIZE (0x00918000 - CONFIG_SPL_TEXT_BASE) Sebastian has already reported that this is wrong. Anyway, even if this was correct, it would be another issue and should be fixed in a separate patch. The issue in the commit messsage is fixed just moving CONFIG_MX6UL_ERR05. > #define CONFIG_SPL_STACK 0x0091FFB8 > /* > * Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the > * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a > * boot media (given that boot media specific offset is configured properly). > */ > -#define CONFIG_SPL_PAD_TO0x11000 > +#define CONFIG_SPL_PAD_TO(CONFIG_SPL_MAX_SIZE + 0x1000) > > /* MMC support */ > #if defined(CONFIG_SPL_MMC_SUPPORT) > Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 03/17] fs: fat: make directory iterator global for write use
On Mon, Jul 23, 2018 at 05:06:46PM +0900, AKASHI Takahiro wrote:
> On Fri, Jul 20, 2018 at 08:02:57PM +0200, Heinrich Schuchardt wrote:
> > On 07/20/2018 04:57 AM, AKASHI Takahiro wrote:
> > > Directory iterator was introduced in major re-work of read operation by
> > > Rob. We want to use it for write operation extensively as well.
> > > This patch makes relevant functions, as well as iterator defition, visible
> > > outside of fat.c.
> > >
> > > Signed-off-by: AKASHI Takahiro
> > > ---
> > > fs/fat/fat.c | 39 ++-
> > > include/fat.h | 32
> > > 2 files changed, 38 insertions(+), 33 deletions(-)
> > >
> > > diff --git a/fs/fat/fat.c b/fs/fat/fat.c
> > > index fd6523c66b..0f82cbe1bd 100644
> > > --- a/fs/fat/fat.c
> > > +++ b/fs/fat/fat.c
> > > @@ -634,25 +634,6 @@ static int get_fs_info(fsdata *mydata)
> > > * For more complete example, see fat_itr_resolve()
> > > */
> > >
> > > -typedef struct {
> > > - fsdata*fsdata;/* filesystem parameters */
> > > - unsigned clust; /* current cluster */
> > > - intlast_cluster; /* set once we've read last cluster */
> > > - intis_root; /* is iterator at root directory */
> > > - intremaining; /* remaining dent's in current cluster */
> > > -
> > > - /* current iterator position values: */
> > > - dir_entry *dent; /* current directory entry */
> > > - char l_name[VFAT_MAXLEN_BYTES];/* long (vfat) name */
> > > - char s_name[14];/* short 8.3 name */
> > > - char *name; /* l_name if there is one, else s_name */
> > > -
> > > - /* storage for current cluster in memory: */
> > > - u8 block[MAX_CLUSTSIZE] __aligned(ARCH_DMA_MINALIGN);
> > > -} fat_itr;
> > > -
> > > -static int fat_itr_isdir(fat_itr *itr);
> > > -
> > > /**
> > > * fat_itr_root() - initialize an iterator to start at the root
> > > * directory
> > > @@ -661,7 +642,7 @@ static int fat_itr_isdir(fat_itr *itr);
> > > * @fsdata: filesystem data for the partition
> > > * @return 0 on success, else -errno
> > > */
> > > -static int fat_itr_root(fat_itr *itr, fsdata *fsdata)
> > > +int fat_itr_root(fat_itr *itr, fsdata *fsdata)
> > > {
> > > if (get_fs_info(fsdata))
> > > return -ENXIO;
> > > @@ -693,7 +674,7 @@ static int fat_itr_root(fat_itr *itr, fsdata *fsdata)
> > > * @parent: the iterator pointing at a directory entry in the
> > > *parent directory of the directory to iterate
> > > */
> > > -static void fat_itr_child(fat_itr *itr, fat_itr *parent)
> > > +void fat_itr_child(fat_itr *itr, fat_itr *parent)
> > > {
> > > fsdata *mydata = parent->fsdata; /* for silly macros */
> > > unsigned clustnum = START(parent->dent);
> > > @@ -713,7 +694,7 @@ static void fat_itr_child(fat_itr *itr, fat_itr
> > > *parent)
> > > itr->last_cluster = 0;
> > > }
> > >
> > > -static void *next_cluster(fat_itr *itr)
> > > +void *next_cluster(fat_itr *itr)
> > > {
> > > fsdata *mydata = itr->fsdata; /* for silly macros */
> > > int ret;
> > > @@ -834,7 +815,7 @@ static dir_entry *extract_vfat_name(fat_itr *itr)
> > > * @return boolean, 1 if success or 0 if no more entries in the
> > > *current directory
> > > */
> > > -static int fat_itr_next(fat_itr *itr)
> > > +int fat_itr_next(fat_itr *itr)
> > > {
> > > dir_entry *dent;
> > >
> > > @@ -879,19 +860,11 @@ static int fat_itr_next(fat_itr *itr)
> > > * @itr: the iterator
> > > * @return true if cursor is at a directory
> > > */
> > > -static int fat_itr_isdir(fat_itr *itr)
> > > +int fat_itr_isdir(fat_itr *itr)
> > > {
> > > return !!(itr->dent->attr & ATTR_DIR);
> > > }
> > >
> > > -/*
> > > - * Helpers:
> > > - */
> > > -
> > > -#define TYPE_FILE 0x1
> > > -#define TYPE_DIR 0x2
> > > -#define TYPE_ANY (TYPE_FILE | TYPE_DIR)
> > > -
> > > /**
> > > * fat_itr_resolve() - traverse directory structure to resolve the
> > > * requested path.
> > > @@ -907,7 +880,7 @@ static int fat_itr_isdir(fat_itr *itr)
> > > * @type: bitmask of allowable file types
> > > * @return 0 on success or -errno
> > > */
> > > -static int fat_itr_resolve(fat_itr *itr, const char *path, unsigned type)
> > > +int fat_itr_resolve(fat_itr *itr, const char *path, unsigned type)
> > > {
> > > const char *next;
> > >
> > > diff --git a/include/fat.h b/include/fat.h
> > > index 0c88b59a4a..577e6b4592 100644
> > > --- a/include/fat.h
> > > +++ b/include/fat.h
> > > @@ -187,6 +187,38 @@ static inline u32 sect_to_clust(fsdata *fsdata, int
> > > sect)
> > > return (sect - fsdata->data_begin) / fsdata->clust_size;
> > > }
> > >
> > > +/*
> > > + * Directory iterator
> > > + */
> > > +
> > > +#define TYPE_FILE 0x1
> > > +#define TYPE_DIR 0x2
> > > +#define TYPE_ANY (TYPE_FILE | TYPE_DIR)
> >
> > Please, rename these to something more specific like FS_ITER_ANY.
> >
> > TYPE_ANY already is defined in fs/reiserfs/reiserfs_private.h:
>
[U-Boot] [PATCH] ddr: altera: Add ECC DRAM scrubbing support for Stratix 10
From: Tien Fong Chee
The SDRAM must first be rewritten by zeroes if ECC is used to initialize
the ECC metadata. Make the CPU overwrite the DRAM with zeroes in such a
case. This scrubbing implementation turns the caches on temporarily, then
overwrites the whole RAM with zeroes, flushes the caches and turns them
off again. This provides satisfactory performance.
Signed-off-by: Tien Fong Chee
---
drivers/ddr/altera/sdram_s10.c | 44
1 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c
index 48f4f47..cce261f 100644
--- a/drivers/ddr/altera/sdram_s10.c
+++ b/drivers/ddr/altera/sdram_s10.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -134,6 +135,47 @@ static int poll_hmc_clock_status(void)
SYSMGR_HMC_CLK_STATUS_MSK, true, 1000, false);
}
+/* Initialize SDRAM ECC bits to avoid false DBE */
+static void sdram_init_ecc_bits(unsigned long long size)
+{
+ /* 1GB per chunk */
+ unsigned long long size_byte = SZ_1G;
+ unsigned long long remaining_size;
+ unsigned long long dst_addr = 0x8000;
+ unsigned int start = get_timer(0);
+
+ icache_enable();
+
+ memset(0, 0, dst_addr);
+ gd->arch.tlb_addr = 0x4000;
+ gd->arch.tlb_size = PGTABLE_SIZE;
+
+ dcache_enable();
+
+ remaining_size = size - dst_addr;
+ printf("DDRCAL: Scrubbing ECC RAM (%d MiB).\n", (u32)(size >> 20));
+
+ while (remaining_size) {
+ if (remaining_size <= size_byte) {
+ memset((void *)dst_addr, 0, remaining_size);
+ break;
+ } else {
+ memset((void *)dst_addr, 0, size_byte);
+ dst_addr += size_byte;
+ }
+
+ WATCHDOG_RESET();
+ remaining_size -= size_byte;
+ }
+
+ flush_dcache_all();
+ printf("DDRCAL: Scrubbing ECC RAM done.\n");
+ dcache_disable();
+
+ printf("SDRAM-ECC: Initialized success with %d ms\n",
+ (unsigned)get_timer(start));
+}
+
/**
* sdram_mmr_init_full() - Function to initialize SDRAM MMR
*
@@ -351,6 +393,8 @@ int sdram_mmr_init_full(unsigned int unused)
setbits_le32(SOCFPGA_SDR_ADDRESS + ECCCTRL2,
(DDR_HMC_ECCCTL2_RMW_EN_SET_MSK |
DDR_HMC_ECCCTL2_AWB_EN_SET_MSK));
+
+ sdram_init_ecc_bits(gd->ram_size);
} else {
clrbits_le32(SOCFPGA_SDR_ADDRESS + ECCCTRL1,
(DDR_HMC_ECCCTL_AWB_CNT_RST_SET_MSK |
--
1.7.7.4
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Re: [U-Boot] [PATCH V2] eth: dm: fec: Add gpio phy reset binding
Hi Jagan,
On 07/07/2018 13:36, Jagan Teki wrote:
> On Sun, Jun 17, 2018 at 6:52 PM, Michael Trimarchi
> wrote:
>> Add the missing gpio phy reset binding to the gpio and
>> reset time configuration
>>
>> Signed-off-by: Michael Trimarchi
>> ---
>> Changes v1 -> v2:
>> - fix commit message
>> - fix timeout property read
>> ---
>> drivers/net/fec_mxc.c | 43 +--
>> drivers/net/fec_mxc.h | 5 -
>> 2 files changed, 41 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
>> index 694a0b2..dac07b6 100644
>> --- a/drivers/net/fec_mxc.c
>> +++ b/drivers/net/fec_mxc.c
>> @@ -15,7 +15,6 @@
>> #include
>> #include
>> #include
>> -#include "fec_mxc.h"
>>
>> #include
>> #include
>> @@ -24,6 +23,9 @@
>> #include
>> #include
>> #include
>> +#include
>> +
>> +#include "fec_mxc.h"
>>
>> DECLARE_GLOBAL_DATA_PTR;
>>
>> @@ -1245,6 +1247,19 @@ static int fec_phy_init(struct fec_priv *priv, struct
>> udevice *dev)
>> return 0;
>> }
>>
>> +#ifdef CONFIG_DM_GPIO
>> +/* FEC GPIO reset */
>> +static void fec_gpio_reset(struct fec_priv *priv)
>> +{
>> + debug("fec_gpio_reset: fec_gpio_reset(dev)\n");
>> + if (dm_gpio_is_valid(&priv->phy_reset_gpio)) {
>> + dm_gpio_set_value(&priv->phy_reset_gpio, 1);
>> + udelay(priv->reset_delay);
>> + dm_gpio_set_value(&priv->phy_reset_gpio, 0);
>> + }
>> +}
>> +#endif
>> +
>> static int fecmxc_probe(struct udevice *dev)
>> {
>> struct eth_pdata *pdata = dev_get_platdata(dev);
>> @@ -1257,6 +1272,9 @@ static int fecmxc_probe(struct udevice *dev)
>> if (ret)
>> return ret;
>>
>> +#ifdef CONFIG_DM_GPIO
>> + fec_gpio_reset(priv);
>> +#endif
>> /* Reset chip. */
>> writel(readl(&priv->eth->ecntrl) | FEC_ECNTRL_RESET,
>>&priv->eth->ecntrl);
>> @@ -1314,6 +1332,7 @@ static int fecmxc_remove(struct udevice *dev)
>>
>> static int fecmxc_ofdata_to_platdata(struct udevice *dev)
>> {
>> + int ret = 0;
>> struct eth_pdata *pdata = dev_get_platdata(dev);
>> struct fec_priv *priv = dev_get_priv(dev);
>> const char *phy_mode;
>> @@ -1331,12 +1350,24 @@ static int fecmxc_ofdata_to_platdata(struct udevice
>> *dev)
>> return -EINVAL;
>> }
>>
>> - /* TODO
>> -* Need to get the reset-gpio and related properties from DT
>> -* and implemet the enet reset code on .probe call
>> -*/
>> +#ifdef CONFIG_DM_GPIO
>> + ret = gpio_request_by_name(dev, "phy-reset-gpios", 0,
>> +&priv->phy_reset_gpio, GPIOD_IS_OUT);
>> + if (ret == 0) {
>> + ret = dev_read_u32_array(dev, "phy-reset-duration",
>> +&priv->reset_delay, 1);
>
> This is return -1 if none have phy-reset-duration and function return
> -1 at the end.
Patch is landed on my desk...
I am not sure what you mind. It is also thinkable that some products
have no GPIO reset at all, and function simply ignores them. And setting
phy-reset-duration to a default value seems quite logical.
Let me know which are the issues here, I had thought I should apply this.
Best regards,
Stefano
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
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Re: [U-Boot] [PATCH 06/17] fs: fat: write returns error code instead of -1
On Fri, Jul 20, 2018 at 07:55:06PM +0200, Heinrich Schuchardt wrote:
> On 07/20/2018 04:57 AM, AKASHI Takahiro wrote:
> > It would be good that FAT write function return error code instead of
> > just returning -1 as fat_read_file() does.
> > This patch attempts to address this issue although it is 'best effort
> > (or estimate)' for now.
> >
> > Signed-off-by: AKASHI Takahiro
>
> Some of the error message are written with debug() others with printf().
Right, but as you know, there is already a mixture of debug() and
printf() in the existing code.
Here I tried to do my best to use either one so as to make the usage
consistent with existing code though I don't know the exact discipline.
> Shouldn't we switch everything to debug() so that the EFI console is not
> messed up?
Is this a different issue, isn't it?
(I suppose that one of Rob's patches tried to address this issue.)
So I'd like to listen to any opinion from other folks, too.
Thanks,
-Takahiro AKASHI
> Best regards
>
> Heinrich
>
> > ---
> > fs/fat/fat_write.c | 19 +++
> > 1 file changed, 15 insertions(+), 4 deletions(-)
> >
> > diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
> > index 6c715a70f4..1e4f5af910 100644
> > --- a/fs/fat/fat_write.c
> > +++ b/fs/fat/fat_write.c
> > @@ -956,7 +956,7 @@ static int do_fat_write(const char *filename, void
> > *buffer, loff_t size,
> >
> > if (read_bootsectandvi(&bs, &volinfo, &mydata->fatsize)) {
> > debug("error: reading boot sector\n");
> > - return -1;
> > + return -EIO;
> > }
> >
> > total_sector = bs.total_sect;
> > @@ -997,7 +997,7 @@ static int do_fat_write(const char *filename, void
> > *buffer, loff_t size,
> > mydata->fatbuf = memalign(ARCH_DMA_MINALIGN, FATBUFSIZE);
> > if (mydata->fatbuf == NULL) {
> > debug("Error: allocating memory\n");
> > - return -1;
> > + return -ENOMEM;
> > }
> >
> > if (disk_read(cursect,
> > @@ -1005,6 +1005,7 @@ static int do_fat_write(const char *filename, void
> > *buffer, loff_t size,
> > (mydata->clust_size) :
> > PREFETCH_BLOCKS, do_fat_read_at_block) < 0) {
> > debug("Error: reading rootdir block\n");
> > + ret = -EIO;
> > goto exit;
> > }
> > dentptr = (dir_entry *) do_fat_read_at_block;
> > @@ -1029,6 +1030,7 @@ static int do_fat_write(const char *filename, void
> > *buffer, loff_t size,
> > size);
> > if (ret) {
> > printf("Error: %llu overflow\n", size);
> > + ret = -ENOSPC;
> > goto exit;
> > }
> > }
> > @@ -1036,6 +1038,7 @@ static int do_fat_write(const char *filename, void
> > *buffer, loff_t size,
> > ret = clear_fatent(mydata, start_cluster);
> > if (ret) {
> > printf("Error: clearing FAT entries\n");
> > + ret = -EIO;
> > goto exit;
> > }
> >
> > @@ -1045,12 +1048,14 @@ static int do_fat_write(const char *filename, void
> > *buffer, loff_t size,
> > ret = start_cluster = find_empty_cluster(mydata);
> > if (ret < 0) {
> > printf("Error: finding empty cluster\n");
> > + ret = -ENOSPC;
> > goto exit;
> > }
> >
> > ret = check_overflow(mydata, start_cluster, size);
> > if (ret) {
> > printf("Error: %llu overflow\n", size);
> > + ret = -ENOSPC;
> > goto exit;
> > }
> >
> > @@ -1065,12 +1070,14 @@ static int do_fat_write(const char *filename, void
> > *buffer, loff_t size,
> > ret = start_cluster = find_empty_cluster(mydata);
> > if (ret < 0) {
> > printf("Error: finding empty cluster\n");
> > + ret = -ENOSPC;
> > goto exit;
> > }
> >
> > ret = check_overflow(mydata, start_cluster, size);
> > if (ret) {
> > printf("Error: %llu overflow\n", size);
> > + ret = -ENOSPC;
> > goto exit;
> > }
> > } else {
> > @@ -1087,6 +1094,7 @@ static int do_fat_write(const char *filename, void
> > *buffer, loff_t size,
> > ret = set_contents(mydata, retdent, buffer, size, actwrite);
> > if (ret < 0) {
> > printf("Error: writing contents\n");
> > + ret = -EIO;
> > goto exit;
> > }
> >
Re: [U-Boot] [PATCH 09/17] fs: fat: support write with non-zero offset
On Fri, Jul 20, 2018 at 07:46:49PM +0200, Heinrich Schuchardt wrote:
> On 07/20/2018 04:57 AM, AKASHI Takahiro wrote:
> > In this patch, all the necessary code for allowing for a file offset
> > at write is implemented. What plays a major roll here is get_set_cluster(),
> > which, in contrast to its counterpart, set_cluster(), only operates on
> > already-allocated clusters, overwriting with data.
> >
> > So, with a file offset specified, set_contents() seeks and writes data
> > with set_get_cluster() until the end of a file, and, once it reaches
> > there, continues writing with set_cluster() for the rest.
> >
> > Please note that a file will be trimmed as a result of write operation if
> > write ends before reaching file's end. This is an intended behavior
> > in order to maitain compatibility with the current interface.
>
> This does not match the EFI spec.
First, please understand my standpoint that I mentioned in a reply
to your comment on my cover letter.
> >
> > Signed-off-by: AKASHI Takahiro
>
> When testing I observed that I could not write at an offset larger than
> the file size. This does not match the EFI spec:
So this is an intended behavior.
> EFI_FILE_PROTOCOL.SetPosition():
> seeking past the end of the file is allowed (a subsequent write would
> grow the file).
Surely, this is a discussion point.
Any comment from other folks?
-Takahiro AKASHI
> Best regards
>
> Heinrich
>
>
> > ---
> > fs/fat/fat_write.c | 287 ++---
> > 1 file changed, 272 insertions(+), 15 deletions(-)
> >
> > diff --git a/fs/fat/fat_write.c b/fs/fat/fat_write.c
> > index 3a9c53e253..cc45a33876 100644
> > --- a/fs/fat/fat_write.c
> > +++ b/fs/fat/fat_write.c
> > @@ -450,6 +450,120 @@ set_cluster(fsdata *mydata, __u32 clustnum, __u8
> > *buffer,
> > return 0;
> > }
> >
> > +static __u8 tmpbuf_cluster[MAX_CLUSTSIZE] __aligned(ARCH_DMA_MINALIGN);
> > +
> > +/*
> > + * Read and modify data on existing and consecutive cluster blocks
> > + */
> > +static int
> > +get_set_cluster(fsdata *mydata, __u32 clustnum, loff_t pos, __u8 *buffer,
> > + loff_t size, loff_t *gotsize)
> > +{
> > + unsigned int bytesperclust = mydata->clust_size * mydata->sect_size;
> > + __u32 startsect;
> > + loff_t wsize;
> > + int clustcount, i, ret;
> > +
> > + *gotsize = 0;
> > + if (!size)
> > + return 0;
> > +
> > + assert(pos < bytesperclust);
> > + startsect = clust_to_sect(mydata, clustnum);
> > +
> > + debug("clustnum: %d, startsect: %d, pos: %lld\n", clustnum, startsect,
> > + pos);
> > +
> > + /* partial write at beginning */
> > + if (pos) {
> > + wsize = min(bytesperclust - pos, size);
> > + ret = disk_read(startsect, mydata->clust_size, tmpbuf_cluster);
> > + if (ret != mydata->clust_size) {
> > + debug("Error reading data (got %d)\n", ret);
> > + return -1;
> > + }
> > +
> > + memcpy(tmpbuf_cluster + pos, buffer, wsize);
> > + ret = disk_write(startsect, mydata->clust_size, tmpbuf_cluster);
> > + if (ret != mydata->clust_size) {
> > + debug("Error writing data (got %d)\n", ret);
> > + return -1;
> > + }
> > +
> > + size -= wsize;
> > + buffer += wsize;
> > + *gotsize += wsize;
> > +
> > + startsect += mydata->clust_size;
> > +
> > + if (!size)
> > + return 0;
> > + }
> > +
> > + /* full-cluster write */
> > + if (size >= bytesperclust) {
> > + clustcount = lldiv(size, bytesperclust);
> > +
> > + if (!((unsigned long)buffer & (ARCH_DMA_MINALIGN - 1))) {
> > + wsize = clustcount * bytesperclust;
> > + ret = disk_write(startsect,
> > + clustcount * mydata->clust_size,
> > + buffer);
> > + if (ret != clustcount * mydata->clust_size) {
> > + debug("Error writing data (got %d)\n", ret);
> > + return -1;
> > + }
> > +
> > + size -= wsize;
> > + buffer += wsize;
> > + *gotsize += wsize;
> > +
> > + startsect += clustcount * mydata->clust_size;
> > + } else {
> > + for (i = 0; i < clustcount; i++) {
> > + memcpy(tmpbuf_cluster, buffer, bytesperclust);
> > + ret = disk_write(startsect, mydata->clust_size,
> > + tmpbuf_cluster);
> > + if (ret != mydata->clust_size) {
> > + debug("Error writing data (got %d)\n",
> > + ret
Re: [U-Boot] [PATCH V2] eth: dm: fec: Add gpio phy reset binding
On Mon, Jul 23, 2018 at 1:57 PM, Stefano Babic wrote:
> Hi Jagan,
>
> On 07/07/2018 13:36, Jagan Teki wrote:
>> On Sun, Jun 17, 2018 at 6:52 PM, Michael Trimarchi
>> wrote:
>>> Add the missing gpio phy reset binding to the gpio and
>>> reset time configuration
>>>
>>> Signed-off-by: Michael Trimarchi
>>> ---
>>> Changes v1 -> v2:
>>> - fix commit message
>>> - fix timeout property read
>>> ---
>>> drivers/net/fec_mxc.c | 43 +--
>>> drivers/net/fec_mxc.h | 5 -
>>> 2 files changed, 41 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
>>> index 694a0b2..dac07b6 100644
>>> --- a/drivers/net/fec_mxc.c
>>> +++ b/drivers/net/fec_mxc.c
>>> @@ -15,7 +15,6 @@
>>> #include
>>> #include
>>> #include
>>> -#include "fec_mxc.h"
>>>
>>> #include
>>> #include
>>> @@ -24,6 +23,9 @@
>>> #include
>>> #include
>>> #include
>>> +#include
>>> +
>>> +#include "fec_mxc.h"
>>>
>>> DECLARE_GLOBAL_DATA_PTR;
>>>
>>> @@ -1245,6 +1247,19 @@ static int fec_phy_init(struct fec_priv *priv,
>>> struct udevice *dev)
>>> return 0;
>>> }
>>>
>>> +#ifdef CONFIG_DM_GPIO
>>> +/* FEC GPIO reset */
>>> +static void fec_gpio_reset(struct fec_priv *priv)
>>> +{
>>> + debug("fec_gpio_reset: fec_gpio_reset(dev)\n");
>>> + if (dm_gpio_is_valid(&priv->phy_reset_gpio)) {
>>> + dm_gpio_set_value(&priv->phy_reset_gpio, 1);
>>> + udelay(priv->reset_delay);
>>> + dm_gpio_set_value(&priv->phy_reset_gpio, 0);
>>> + }
>>> +}
>>> +#endif
>>> +
>>> static int fecmxc_probe(struct udevice *dev)
>>> {
>>> struct eth_pdata *pdata = dev_get_platdata(dev);
>>> @@ -1257,6 +1272,9 @@ static int fecmxc_probe(struct udevice *dev)
>>> if (ret)
>>> return ret;
>>>
>>> +#ifdef CONFIG_DM_GPIO
>>> + fec_gpio_reset(priv);
>>> +#endif
>>> /* Reset chip. */
>>> writel(readl(&priv->eth->ecntrl) | FEC_ECNTRL_RESET,
>>>&priv->eth->ecntrl);
>>> @@ -1314,6 +1332,7 @@ static int fecmxc_remove(struct udevice *dev)
>>>
>>> static int fecmxc_ofdata_to_platdata(struct udevice *dev)
>>> {
>>> + int ret = 0;
>>> struct eth_pdata *pdata = dev_get_platdata(dev);
>>> struct fec_priv *priv = dev_get_priv(dev);
>>> const char *phy_mode;
>>> @@ -1331,12 +1350,24 @@ static int fecmxc_ofdata_to_platdata(struct udevice
>>> *dev)
>>> return -EINVAL;
>>> }
>>>
>>> - /* TODO
>>> -* Need to get the reset-gpio and related properties from DT
>>> -* and implemet the enet reset code on .probe call
>>> -*/
>>> +#ifdef CONFIG_DM_GPIO
>>> + ret = gpio_request_by_name(dev, "phy-reset-gpios", 0,
>>> +&priv->phy_reset_gpio, GPIOD_IS_OUT);
>>> + if (ret == 0) {
>>> + ret = dev_read_u32_array(dev, "phy-reset-duration",
>>> +&priv->reset_delay, 1);
>>
>> This is return -1 if none have phy-reset-duration and function return
>> -1 at the end.
>
> Patch is landed on my desk...
>
> I am not sure what you mind. It is also thinkable that some products
> have no GPIO reset at all, and function simply ignores them. And setting
> phy-reset-duration to a default value seems quite logical.
>
> Let me know which are the issues here, I had thought I should apply this.
We are re-working this, will send the next version.
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Re: [U-Boot] [PATCH v2] arm, imx6: add support for SD/MMC Manufacture Mode
Hi Jay,
On 22/06/2018 07:16, Jay Carlson wrote:
> This patch adds support for booting blank i.MX6 devices in SD/MMC Manufacture
> Mode: a fallback mode which the boot ROM enters when no fuses or boot mode
> pins have been set, the USB serial downloader connection is inactive, and
> there
> is an SD card inserted into uSDHC1. The i.MX7 and i.MX8, which both have
> a Boot_SW_Info data structure which can be parsed to determine boot source, is
> unaffected by this patch.
>
> Signed-off-by: Jay Carlson
> ---
> arch/arm/mach-imx/spl.c | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
> index a20b30d154..8ecae8605c 100644
> --- a/arch/arm/mach-imx/spl.c
> +++ b/arch/arm/mach-imx/spl.c
> @@ -43,6 +43,16 @@ u32 spl_boot_device(void)
>*/
> if (is_usbotg_phy_active())
> return BOOT_DEVICE_BOARD;
> +
> + /**
> + * To support SD/MMC Manufacture Mode, we check that BOOT_MODE == 0
> + * and that BT_FUSE_SEL == 0. If this was disabled via
> + * blowing DISABLE_SDMMC_MFG, or if SDMMC MFG mode failed,
> + * we would be in USB download mode, which the previous line would
> + * have detected.
> + */
> + if (((bmode >> 24) & 0x03) == 0x00 && (bmode >> 4) == 0x00)
> + return BOOT_DEVICE_MMC1;
>
> /* BOOT_CFG1[7:4] - see IMX6DQRM Table 8-8 */
> switch ((reg & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
>
This looks to me a fix for a custom board, but it does not seem that can
be applied general for all devices. I understand that this works in your
use case, where you have soldered eMMC and in factory you install the
software via SD card. But this is one use case.
Your change goes into general code (mach-imx/spl.c), and then it can
breaks many projects. You coul write your board_boot_order() in your
boot code to set the order of the device to be booted.
Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH V2] eth: dm: fec: Add gpio phy reset binding
Hi Jagan
On Mon, Jul 23, 2018 at 10:40 AM, Jagan Teki wrote:
> On Mon, Jul 23, 2018 at 1:57 PM, Stefano Babic wrote:
>> Hi Jagan,
>>
>> On 07/07/2018 13:36, Jagan Teki wrote:
>>> On Sun, Jun 17, 2018 at 6:52 PM, Michael Trimarchi
>>> wrote:
Add the missing gpio phy reset binding to the gpio and
reset time configuration
Signed-off-by: Michael Trimarchi
---
Changes v1 -> v2:
- fix commit message
- fix timeout property read
---
drivers/net/fec_mxc.c | 43 +--
drivers/net/fec_mxc.h | 5 -
2 files changed, 41 insertions(+), 7 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index 694a0b2..dac07b6 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -15,7 +15,6 @@
#include
#include
#include
-#include "fec_mxc.h"
#include
#include
@@ -24,6 +23,9 @@
#include
#include
#include
+#include
+
+#include "fec_mxc.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -1245,6 +1247,19 @@ static int fec_phy_init(struct fec_priv *priv,
struct udevice *dev)
return 0;
}
+#ifdef CONFIG_DM_GPIO
+/* FEC GPIO reset */
+static void fec_gpio_reset(struct fec_priv *priv)
+{
+ debug("fec_gpio_reset: fec_gpio_reset(dev)\n");
+ if (dm_gpio_is_valid(&priv->phy_reset_gpio)) {
+ dm_gpio_set_value(&priv->phy_reset_gpio, 1);
+ udelay(priv->reset_delay);
+ dm_gpio_set_value(&priv->phy_reset_gpio, 0);
+ }
+}
+#endif
+
static int fecmxc_probe(struct udevice *dev)
{
struct eth_pdata *pdata = dev_get_platdata(dev);
@@ -1257,6 +1272,9 @@ static int fecmxc_probe(struct udevice *dev)
if (ret)
return ret;
+#ifdef CONFIG_DM_GPIO
+ fec_gpio_reset(priv);
+#endif
/* Reset chip. */
writel(readl(&priv->eth->ecntrl) | FEC_ECNTRL_RESET,
&priv->eth->ecntrl);
@@ -1314,6 +1332,7 @@ static int fecmxc_remove(struct udevice *dev)
static int fecmxc_ofdata_to_platdata(struct udevice *dev)
{
+ int ret = 0;
struct eth_pdata *pdata = dev_get_platdata(dev);
struct fec_priv *priv = dev_get_priv(dev);
const char *phy_mode;
@@ -1331,12 +1350,24 @@ static int fecmxc_ofdata_to_platdata(struct
udevice *dev)
return -EINVAL;
}
- /* TODO
-* Need to get the reset-gpio and related properties from DT
-* and implemet the enet reset code on .probe call
-*/
+#ifdef CONFIG_DM_GPIO
+ ret = gpio_request_by_name(dev, "phy-reset-gpios", 0,
+&priv->phy_reset_gpio, GPIOD_IS_OUT);
+ if (ret == 0) {
+ ret = dev_read_u32_array(dev, "phy-reset-duration",
+&priv->reset_delay, 1);
>>>
>>> This is return -1 if none have phy-reset-duration and function return
>>> -1 at the end.
>>
>> Patch is landed on my desk...
>>
>> I am not sure what you mind. It is also thinkable that some products
>> have no GPIO reset at all, and function simply ignores them. And setting
>> phy-reset-duration to a default value seems quite logical.
>>
>> Let me know which are the issues here, I had thought I should apply this.
>
> We are re-working this, will send the next version.
Please explain what kind of rework needs a 10 lines ;) patch. Anyway, when
is suppose to be upload it again?
Michael
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| COO - Founder Cruquiuskade 47 |
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| [`as] http://www.amarulasolutions.com |
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Re: [U-Boot] [PATCH v2] arm, imx6: fix NOR/OneNAND boot mode mix-up
Hi Jay,
On 22/06/2018 07:18, Jay Carlson wrote:
> This patch fixes the ordering of the EMI enum to match Table 8-8 in
> the i.MX6ULL Reference Manual, and has been spot-checked in two other
> i.MX reference manuals for accuracy.
>
> Signed-off-by: Jay Carlson
> ---
> arch/arm/include/asm/mach-imx/sys_proto.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h
> b/arch/arm/include/asm/mach-imx/sys_proto.h
> index d1d6cbc462..0acc3640f9 100644
> --- a/arch/arm/include/asm/mach-imx/sys_proto.h
> +++ b/arch/arm/include/asm/mach-imx/sys_proto.h
> @@ -63,8 +63,8 @@ enum imx6_bmode_serial_rom {
> };
>
> enum imx6_bmode_emi {
> - IMX6_BMODE_ONENAND,
> IMX6_BMODE_NOR,
> + IMX6_BMODE_ONENAND
> };
>
I am not understanding which is the issue. The enum are just used in
switch() section as far as I know, and then the order is not so
important. Which is the issue / error you found ?
Best regards,
Stefano babic
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Re: [U-Boot] [PATCH] Kconfig: Remove trailing whitespaces in prompt
On 23.07.2018 08:38, Michal Simek wrote: > Remove additional trailing whitespaces in prompt reported by kconfiglib: > > warning: DM_PMIC_SANDBOX (defined at drivers/power/pmic/Kconfig:133) has > leading or trailing whitespace in its prompt > warning: (defined at dts/Kconfig:204) has leading or trailing > whitespace in its prompt > > Signed-off-by: Michal Simek > --- > > drivers/power/pmic/Kconfig | 2 +- > dts/Kconfig| 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig > index d504c28b77fc..cba48e12da46 100644 > --- a/drivers/power/pmic/Kconfig > +++ b/drivers/power/pmic/Kconfig > @@ -131,7 +131,7 @@ config PMIC_S2MPS11 > Binding info: doc/device-tree-bindings/pmic/s2mps11.txt > > config DM_PMIC_SANDBOX > - bool "Enable Driver Model for emulated Sandbox PMIC " > + bool "Enable Driver Model for emulated Sandbox PMIC" > depends on DM_PMIC > ---help--- > Enable the driver for Sandbox PMIC emulation. The emulated PMIC device > diff --git a/dts/Kconfig b/dts/Kconfig > index a1a92f2bbd41..43f85c2f6f44 100644 > --- a/dts/Kconfig > +++ b/dts/Kconfig > @@ -202,7 +202,7 @@ config SPL_MULTI_DTB_FIT_NO_COMPRESSION > endchoice > > choice > - prompt "Location of uncompressed DTBs " > + prompt "Location of uncompressed DTBs" > depends on (SPL_MULTI_DTB_FIT_GZIP || SPL_MULTI_DTB_FIT_LZO) > default SPL_MULTI_DTB_FIT_DYN_ALLOC if SYS_MALLOC_F > > Reviewed-by: Felix Brack regards, Felix ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] gpio: zynq: Setup bank_name to dev->name
On 20.7.2018 21:31, Stefan Herbrechtsmeier wrote: > Hi Michal, > > Am 12.07.2018 um 16:04 schrieb Michal Simek: >> There should be proper bank name setup to distiguish between different >> gpio drivers. Use dev->name for it. >> >> Signed-off-by: Michal Simek >> --- >> >> drivers/gpio/zynq_gpio.c | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c >> index 26f69b1a713f..f793ee5754a8 100644 >> --- a/drivers/gpio/zynq_gpio.c >> +++ b/drivers/gpio/zynq_gpio.c >> @@ -337,6 +337,8 @@ static int zynq_gpio_probe(struct udevice *dev) >> struct zynq_gpio_privdata *priv = dev_get_priv(dev); >> struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); >> + uc_priv->bank_name = dev->name; >> + >> if (priv->p_data) >> uc_priv->gpio_count = priv->p_data->ngpio; >> > Does this not lead to ugly names because the gpio number is append to > the bank_name? Have you check the "gpio status -a" output? Yes I was checking it. Names are composed together but also just numbers works as before. gpio@ff0a0: input: 0 [ ] gpio@ff0a1: input: 0 [ ] gpio@ff0a2: input: 0 [ ] gpio@ff0a3: input: 0 [ ] gpio@ff0a4: input: 0 [ ] gpio@ff0a5: input: 0 [ ] gpio@ff0a6: input: 0 [ ] gpio@ff0a7: input: 0 [ ] gpio@ff0a8: input: 0 [ ] gpio@ff0a9: input: 0 [ ] If you know better way how to setup a bank name please let me know but I need to distinguish ps gpio from pl one and for pl we need to know the address. > > Other drivers use the gpio-bank-name from the device tree. I can't see this property inside Linux kernel. If this has been reviewed by dt guys please let me know. Thanks, Michal ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v1 1/5] ARM: PSCI: initialize stack pointer on secondary CPUs
On 03/07/2018 14:32, Stefan Agner wrote: > Hi Tom, Hi Stefano, > > On 02.07.2018 11:08, Patrick DELAUNAY wrote: >> Hi Stefan >> >>> From: Stefan Agner [mailto:ste...@agner.ch] >>> Sent: mercredi 27 juin 2018 10:36 >>> Subject: Re: [PATCH v1 1/5] ARM: PSCI: initialize stack pointer on >>> secondary CPUs >>> >>> On 24.06.2018 21:09, Stefan Agner wrote: From: Stefan Agner A proper stack is required to safely use C code in psci_arch_cpu_entry. >>> >>> Patrick, I prefer to have your ack on this since you introduced >>> psci_arch_cpu_entry. >>> >>> As far as I can tell STM32MP1 uses C code in psci_arch_cpu_entry. The same >>> function in i.MX 7's PSCI implementation the compiler actually pushed stuff >>> on >>> the (uninitialized) stack, which caused the newly brought up CPU to >>> immediately >>> crash. >>> >>> Not sure if in your case the stack pointer is already setup by some other >>> means >>> or your compiler does not use the stack. >>> >>> In any case, I think it is better to just setup the stack properly as done >>> in this >>> patch... >> >> I expected that the secure stack is initialized by bootROM, but after >> check on 2018.07-rc2, >> I got a crash also with the stm32mp1 platform. >> >> After code review, my behavior is clearly not safe: I don't sure that >> the initial BootROM stack >> is not overlapping the installed PSCI monitor code or data. >> So I agree: it is needed to initialize the stack in psci_cpu_entry. >> >> Moreover after your patch the crash is solved for my platform stm32mp1. > > Given that this fixes two platforms I guess it definitely should go into > v2018.07. > > Technically, for i.MX 7 only patch 1, 2 and 3 are necessary, but 4 and 5 > are fairly straight forward and seem to work fine here. > > Patch 1 is generic, so not sure through which trees the patchset should > go... Sorry for late answer, but benner late as never...;-) I have applied the whole patchset to u-boot-imx. I will push it in a couple of hours on the server. Regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 0/6] mx6cuboxi: Add support for SOMs with eMMC
On 11/06/2018 14:26, Baruch Siach wrote: > The newer rev 1.5 of the SolidRun i.MX6 SOM can optionally come with eMMC on > the SOM. This series adds support for the eMMC device on these SOMs. > > Since eMMC has card detect signal this series uses the new mmc_get_op_cond() > function that is broken out of mmc_init_start(). Successful completion of > mmc_get_op_cond() indicates that the eMMC is present. > > Finally, the last patch in this series constructs the name of the kernel > device tree to load. This name is compatible with recent mainline kernels. > > This series depends on the patches adding support for SOM rev 1.5 that were > posted earlier: > > https://patchwork.ozlabs.org/patch/926302/ > https://patchwork.ozlabs.org/patch/926301/ > > Baruch Siach (2): > mmc: drop mention of IN_PROGRESS status > mx6cuboxi: drop CONFIG_SYS_FSL_USDHC_NUM > > Jon Nettleton (4): > mmc: break out get_op_cond code to its own function > mx6cuboxi: Add support for eMMC booting > mx6cuboxi: Use mmc_get_op_cond() to check for an eMMC > mx6cuboxi: Add emmc device tree suffix > > board/solidrun/mx6cuboxi/mx6cuboxi.c | 115 +-- > drivers/mmc/mmc.c| 61 -- > include/configs/mx6cuboxi.h | 25 +++--- > include/mmc.h| 12 ++- > 4 files changed, 167 insertions(+), 46 deletions(-) > Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] imx: mx6: Fix implementantion reset_misc
On 20/06/2018 23:27, Michael Trimarchi wrote:
> lcdif_power_down should not be included in spl build to avoid build
> failure introduced by commit eb111bb31d882877e75e6b8083808dcaf6493b92
>
> Signed-off-by: Michael Trimarchi
> ---
> arch/arm/mach-imx/mx6/soc.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c
> index e8b6f77..ffc2951 100644
> --- a/arch/arm/mach-imx/mx6/soc.c
> +++ b/arch/arm/mach-imx/mx6/soc.c
> @@ -548,9 +548,11 @@ const struct boot_mode soc_boot_modes[] = {
>
> void reset_misc(void)
> {
> +#ifndef CONFIG_SPL_BUILD
> #ifdef CONFIG_VIDEO_MXS
> lcdif_power_down();
> #endif
> +#endif
> }
>
> void s_init(void)
>
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH v3] arm, imx6: add alternative PAD_CTL_DSE constants
On 28/06/2018 15:56, Mark Jonas wrote: > Not all i.MX6 pads use the same drive strength table. So far only the > 240 Ohm to 34 Ohm table was available. Because the constants used have > speaking names it can be confusing to use e.g. PAD_CTL_DSE_48ohm when > according to the reference manual 52 Ohm is the correct value. This > patch adds the 260 Ohm to 37 Ohm table. > > For example, the IOMUXC_SW_PAD_CTL_PAD_SD2_CLK register (SD-card clock) > uses the added table. > > Signed-off-by: Mark Jonas > Reviewed-by: Stefano Babic > --- > Changes in V3: > - Reviewed by Stefano Babic > > Changes in V2: > - Add missing Signed-off-by > --- > arch/arm/include/asm/mach-imx/iomux-v3.h | 8 > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h > b/arch/arm/include/asm/mach-imx/iomux-v3.h > index bb93058..63f4b33 100644 > --- a/arch/arm/include/asm/mach-imx/iomux-v3.h > +++ b/arch/arm/include/asm/mach-imx/iomux-v3.h > @@ -163,6 +163,14 @@ typedef u64 iomux_v3_cfg_t; > #define PAD_CTL_DSE_40ohm(6 << 3) > #define PAD_CTL_DSE_34ohm(7 << 3) > > +#define PAD_CTL_DSE_260ohm (1 << 3) > +#define PAD_CTL_DSE_130ohm (2 << 3) > +#define PAD_CTL_DSE_88ohm(3 << 3) > +#define PAD_CTL_DSE_65ohm(4 << 3) > +#define PAD_CTL_DSE_52ohm(5 << 3) > +#define PAD_CTL_DSE_43ohm(6 << 3) > +#define PAD_CTL_DSE_37ohm(7 << 3) > + > /* i.MX6SL/SLL */ > #define PAD_CTL_LVE (1 << 1) > #define PAD_CTL_LVE_BIT (1 << 22) > Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] arm: imx7d: cl-som-imx7: sf: support all SF types
On 24/06/2018 11:13, Yaniv Levinsky wrote: > From: Uri Mashiach > > Enable the support for all SPI flash types. > > Signed-off-by: Uri Mashiach > Signed-off-by: Yaniv Levinsky > --- > configs/cl-som-imx7_defconfig | 7 +++ > 1 file changed, 7 insertions(+) > > diff --git a/configs/cl-som-imx7_defconfig b/configs/cl-som-imx7_defconfig > index 6d403eed7a..8692241029 100644 > --- a/configs/cl-som-imx7_defconfig > +++ b/configs/cl-som-imx7_defconfig > @@ -47,7 +47,14 @@ CONFIG_CMD_FS_GENERIC=y > CONFIG_ENV_IS_IN_SPI_FLASH=y > CONFIG_FSL_ESDHC=y > CONFIG_SPI_FLASH=y > +CONFIG_SPI_FLASH_ATMEL=y > +CONFIG_SPI_FLASH_EON=y > +CONFIG_SPI_FLASH_GIGADEVICE=y > +CONFIG_SPI_FLASH_MACRONIX=y > +CONFIG_SPI_FLASH_SPANSION=y > CONFIG_SPI_FLASH_STMICRO=y > +CONFIG_SPI_FLASH_SST=y > +CONFIG_SPI_FLASH_WINBOND=y > CONFIG_SPI=y > CONFIG_MXC_SPI=y > CONFIG_USB=y > Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 00/11] Add ethernet support for phyCORE-RK3288
Unfortunately the v1-patches were only send to the maintainers and not to the official mailinglist. Am 21.07.2018 um 01:25 schrieb Grygorii Strashko: On 07/18/2018 03:46 AM, Janine Hagemann wrote: - Remove 0004-Net-phy-ti-Fix-fifo_depth-register-write.patch because of the change from 0005-net-phy-ti-Recover-from-port-mirroring- N-A-MODE4.patch it isn't needed anymore. Before, the MII_DP83867_ PHYCTRL-register wasn't write correctly without the fix-patch. I can't find v1 of this series, so above comment looks strange. What's wrong exactly with "PHYCTRL-register wasn't write correctly"? - correct commit reference format Janine Hagemann (11): arch: arm: mach-rockchip: rk3288: Enable regulators in board_init config: phycore-rk3288_defconfig: add PHY_TI net: gmac_rockchip: Fix a register write in rk3328_gmac_set_to_rgmii net: phy: ti: Add lane swapping support in the DP83867 TI's PHY driver net: phy: ti: Recover from "port mirroring" N/A MODE4 net: phy: ti: add workaround for incorrect RX_CTRL pin strap net: gmac_rockchip: Add handeling for RGMII_ID/RXID/TXID drivers: net: designware: Add reading of DT phy-handle node net: phy: ti: Add binding for the CLK_OUT pin muxing ARM: dts: rockchip: ADD dp83867 CLK_OUT muxing rockchip: rk3288-phycore: set flash1 iodomain to 1.8V arch/arm/dts/rk3288-phycore-som.dtsi | 1 + arch/arm/mach-rockchip/rk3288-board.c | 6 ++ board/phytec/phycore_rk3288/phycore-rk3288.c | 16 + configs/phycore-rk3288_defconfig | 1 + doc/device-tree-bindings/net/ti,dp83867.txt | 3 + drivers/net/designware.c | 11 ++- drivers/net/designware.h | 1 + drivers/net/gmac_rockchip.c | 80 - drivers/net/phy/ti.c | 104 ++- include/dt-bindings/net/ti-dp83867.h | 15 10 files changed, 219 insertions(+), 19 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 01/16] pico-imx7d: Convert to distro config
Hi Otavio, On 29/06/2018 20:19, Otavio Salvador wrote: > From: Fabio Estevam > > Instead of keeping a custom environment, use a more generic approach > by switching to disto config. > > Signed-off-by: Fabio Estevam > Signed-off-by: Otavio Salvador > --- > Applied (whole patchset) to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] ARM: dh_imx6: enable GigaDevice, Macronix, and Winbond SPI Flash support in Kconfig
On 06/07/2018 11:26, lz...@dh-electronics.de wrote: > From: Ludwig Zenz > > In preparation for delivery bottlenecks, enable support for GigaDevice, > Macronix, and Winbond nor flash chips. > > Signed-off-by: Ludwig Zenz > --- > configs/dh_imx6_defconfig | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig > index db1460b..8f45531 100644 > --- a/configs/dh_imx6_defconfig > +++ b/configs/dh_imx6_defconfig > @@ -39,7 +39,10 @@ CONFIG_BOOTCOUNT_LIMIT=y > CONFIG_SYS_BOOTCOUNT_ADDR=0x0090 > CONFIG_FSL_ESDHC=y > CONFIG_SPI_FLASH=y > +CONFIG_SPI_FLASH_GIGADEVICE=y > +CONFIG_SPI_FLASH_MACRONIX=y > CONFIG_SPI_FLASH_SPANSION=y > +CONFIG_SPI_FLASH_WINBOND=y > CONFIG_PHYLIB=y > CONFIG_PHY_MICREL=y > CONFIG_PHY_MICREL_KSZ90X1=y > Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] Revert "ARM: imx6: Disable DDR DRAM calibration DHCOM i.MX6 PDK"
On 05/07/2018 09:23, lz...@dh-electronics.de wrote: > From: Ludwig Zenz > > This reverts commit a637fe6f27fd4c19ef9f43a5f871c244581422ac. > > The DDR DRAM calibration was enhanced by write leveling correction code. > It can be used with T-topology now. > > Signed-off-by: Ludwig Zenz > --- > board/dhelectronics/dh_imx6/dh_imx6_spl.c | 4 > 1 file changed, 4 insertions(+) > > diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c > b/board/dhelectronics/dh_imx6/dh_imx6_spl.c > index dffe4eb..beda389 100644 > --- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c > +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c > @@ -384,6 +384,10 @@ void board_init_f(ulong dummy) > &dhcom6sdl_grp_ioregs); > mx6_dram_cfg(&dhcom_ddr_info, &dhcom_mmdc_calib, &dhcom_mem_ddr); > > + /* Perform DDR DRAM calibration */ > + udelay(100); > + mmdc_do_dqs_calibration(&dhcom_ddr_info); > + > /* Clear the BSS. */ > memset(__bss_start, 0, __bss_end - __bss_start); > > Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] ARM: imx6: configure ddrcode pins in spl DHCOM i.MX6 PDK
On 05/07/2018 09:23, lz...@dh-electronics.de wrote:
> From: Ludwig Zenz
>
> Preperation for conditional DDR3 initialization based on GPIO codes.
>
> Signed-off-by: Ludwig Zenz
> ---
> board/dhelectronics/dh_imx6/dh_imx6_spl.c | 40
> +++
> 1 file changed, 40 insertions(+)
>
> diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c
> b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
> index beda389..eafb86d 100644
> --- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c
> +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
> @@ -208,6 +208,45 @@ static void setup_iomux_boardid(void)
> SETUP_IOMUX_PADS(hwcode_pads);
> }
>
> +/* DDR Code */
> +static iomux_v3_cfg_t const ddrcode_pads[] = {
> + IOMUX_PADS(PAD_EIM_A16__GPIO2_IO22 | MUX_PAD_CTRL(GPIO_PAD_CTRL)),
> + IOMUX_PADS(PAD_EIM_A17__GPIO2_IO21 | MUX_PAD_CTRL(GPIO_PAD_CTRL)),
> +};
> +
> +static void setup_iomux_ddrcode(void)
> +{
> + /* ddr code pins */
> + SETUP_IOMUX_PADS(ddrcode_pads);
> +}
> +
> +enum dhcom_ddr3_code {
> + DH_DDR3_SIZE_256MIB = 0x00,
> + DH_DDR3_SIZE_512MIB = 0x01,
> + DH_DDR3_SIZE_1GIB = 0x02,
> + DH_DDR3_SIZE_2GIB = 0x03
> +};
> +
> +#define DDR3_CODE_BIT_0 IMX_GPIO_NR(2, 22)
> +#define DDR3_CODE_BIT_1 IMX_GPIO_NR(2, 21)
> +
> +enum dhcom_ddr3_code dhcom_get_ddr3_code(void)
> +{
> + enum dhcom_ddr3_code ddr3_code;
> +
> + gpio_request(DDR3_CODE_BIT_0, "DDR3_CODE_BIT_0");
> + gpio_request(DDR3_CODE_BIT_1, "DDR3_CODE_BIT_1");
> +
> + gpio_direction_input(DDR3_CODE_BIT_0);
> + gpio_direction_input(DDR3_CODE_BIT_1);
> +
> + /* 256MB = 0b00; 512MB = 0b01; 1GB = 0b10; 2GB = 0b11 */
> + ddr3_code = (!!gpio_get_value(DDR3_CODE_BIT_1) << 1)
> + | (!!gpio_get_value(DDR3_CODE_BIT_0));
> +
> + return ddr3_code;
> +}
> +
> /* GPIO */
> static iomux_v3_cfg_t const gpio_pads[] = {
> IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(GPIO_PAD_CTRL)),
> @@ -365,6 +404,7 @@ void board_init_f(ulong dummy)
> timer_init();
>
> setup_iomux_boardid();
> + setup_iomux_ddrcode();
> setup_iomux_gpio();
> setup_iomux_enet();
> setup_iomux_sd();
>
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
___
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Re: [U-Boot] [PATCH 3/3] ARM: imx6: DHCOM i.MX6 PDK: ddr init for 32bit bus and 4GBit chips
On 05/07/2018 09:23, lz...@dh-electronics.de wrote:
> From: Ludwig Zenz
>
> Support 1GIB + 2GIB DDR3 with 64bit bus width and 512MIB + 1GIB with 32bit
> bus width
>
> Signed-off-by: Ludwig Zenz
> ---
> board/dhelectronics/dh_imx6/dh_imx6_spl.c | 191
> +++---
> 1 file changed, 173 insertions(+), 18 deletions(-)
>
> diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c
> b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
> index eafb86d..04e9eab 100644
> --- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c
> +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
> @@ -136,7 +136,31 @@ static const struct mx6sdl_iomux_grp_regs
> dhcom6sdl_grp_ioregs = {
> .grp_b7ds = 0x0030,
> };
>
> -static const struct mx6_mmdc_calibration dhcom_mmdc_calib = {
> +static const struct mx6_mmdc_calibration dhcom_mmdc_calib_4x4g_1066 = {
> + .p0_mpwldectrl0 = 0x00150019,
> + .p0_mpwldectrl1 = 0x001C000B,
> + .p1_mpwldectrl0 = 0x00020018,
> + .p1_mpwldectrl1 = 0x0002000C,
> + .p0_mpdgctrl0 = 0x43140320,
> + .p0_mpdgctrl1 = 0x03080304,
> + .p1_mpdgctrl0 = 0x43180320,
> + .p1_mpdgctrl1 = 0x03100254,
> + .p0_mprddlctl = 0x4830383C,
> + .p1_mprddlctl = 0x3836323E,
> + .p0_mpwrdlctl = 0x3E444642,
> + .p1_mpwrdlctl = 0x4232,
> +};
> +
> +static const struct mx6_mmdc_calibration dhcom_mmdc_calib_2x4g_800 = {
> + .p0_mpwldectrl0 = 0x0040003C,
> + .p0_mpwldectrl1 = 0x0032003E,
> + .p0_mpdgctrl0 = 0x42350231,
> + .p0_mpdgctrl1 = 0x021A0218,
> + .p0_mprddlctl = 0x4B4B4E49,
> + .p0_mpwrdlctl = 0x3F3F3035,
> +};
> +
> +static const struct mx6_mmdc_calibration dhcom_mmdc_calib_4x2g_1066 = {
> .p0_mpwldectrl0 = 0x0011000E,
> .p0_mpwldectrl1 = 0x000E001B,
> .p1_mpwldectrl0 = 0x00190015,
> @@ -151,23 +175,89 @@ static const struct mx6_mmdc_calibration
> dhcom_mmdc_calib = {
> .p1_mpwrdlctl = 0x473E4A3B,
> };
>
> -static const struct mx6_ddr3_cfg dhcom_mem_ddr = {
> +static const struct mx6_mmdc_calibration dhcom_mmdc_calib_4x2g_800 = {
> + .p0_mpwldectrl0 = 0x003A003A,
> + .p0_mpwldectrl1 = 0x0030002F,
> + .p1_mpwldectrl0 = 0x002F0038,
> + .p1_mpwldectrl1 = 0x00270039,
> + .p0_mpdgctrl0 = 0x420F020F,
> + .p0_mpdgctrl1 = 0x01760175,
> + .p1_mpdgctrl0 = 0x41640171,
> + .p1_mpdgctrl1 = 0x015E0160,
> + .p0_mprddlctl = 0x45464B4A,
> + .p1_mprddlctl = 0x49484A46,
> + .p0_mpwrdlctl = 0x40402E32,
> + .p1_mpwrdlctl = 0x3A3A3231,
> +};
> +
> +static const struct mx6_mmdc_calibration dhcom_mmdc_calib_2x2g_800 = {
> + .p0_mpwldectrl0 = 0x0040003C,
> + .p0_mpwldectrl1 = 0x0032003E,
> + .p0_mpdgctrl0 = 0x42350231,
> + .p0_mpdgctrl1 = 0x021A0218,
> + .p0_mprddlctl = 0x4B4B4E49,
> + .p0_mpwrdlctl = 0x3F3F3035,
> +};
> +
> +/*
> + * 2 Gbit DDR3 memory
> + * - NANYA #NT5CC128M16IP-DII
> + * - NANYA #NT5CB128M16FP-DII
> + */
> +static const struct mx6_ddr3_cfg dhcom_mem_ddr_2g = {
> .mem_speed = 1600,
> .density= 2,
> - .width = 64,
> + .width = 16,
> .banks = 8,
> .rowaddr= 14,
> .coladdr= 10,
> .pagesz = 2,
> - .trcd = 1312,
> + .trcd = 1375,
> .trcmin = 5863,
> .trasmin= 3750,
> };
>
> -static const struct mx6_ddr_sysinfo dhcom_ddr_info = {
> +/*
> + * 4 Gbit DDR3 memory
> + * - Intelligent Memory #IM4G16D3EABG-125I
> + */
> +static const struct mx6_ddr3_cfg dhcom_mem_ddr_4g = {
> + .mem_speed = 1600,
> + .density= 4,
> + .width = 16,
> + .banks = 8,
> + .rowaddr= 15,
> + .coladdr= 10,
> + .pagesz = 2,
> + .trcd = 1375,
> + .trcmin = 4875,
> + .trasmin= 3500,
> +};
> +
> +/* DDR3 64bit */
> +static const struct mx6_ddr_sysinfo dhcom_ddr_64bit = {
> /* width of data bus:0=16,1=32,2=64 */
> .dsize = 2,
> - .cs_density = 16,
> + .cs_density = 32,
> + .ncs= 1,/* single chip select */
> + .cs1_mirror = 1,
> + .rtt_wr = 1,/* DDR3_RTT_60_OHM, RTT_Wr = RZQ/4 */
> + .rtt_nom= 1,/* DDR3_RTT_60_OHM, RTT_Nom = RZQ/4 */
> + .walat = 1,/* Write additional latency */
> + .ralat = 5,/* Read additional latency */
> + .mif3_mode = 3,/* Command prediction working mode */
> + .bi_on = 1,/* Bank interleaving enabled */
> + .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */
> + .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */
> + .refsel = 1,/* Refresh cycles at 32KHz */
> + .refr = 3,/* 4 refresh commands per refresh cycle */
> +};
> +
> +/* DDR3 32bit */
> +static const struct mx6_ddr_sysinfo dhcom_ddr_32bit =
Re: [U-Boot] [PATCH] imx: i.mx6q: imx6q_logic: Migrate to SPL and enable SDP
On 06/07/2018 03:58, Adam Ford wrote:
> Since the vast majority of i.MX6 boards are migrating to SPL,
> this patch converts im6q_logic to SPL and enables the SDP for
> loading SPL and u-boot.img over USB. The Falcon mode only
> supports NAND flash as of now due to limited space/RAM, but
> all i.MX6D/Q SOM's from Logic PD have internal NAND from which
> to boot.
>
> Signed-off-by: Adam Ford
>
> diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
> index 521fad74b5..524631b32c 100644
> --- a/arch/arm/mach-imx/mx6/Kconfig
> +++ b/arch/arm/mach-imx/mx6/Kconfig
> @@ -198,6 +198,8 @@ config TARGET_MX6CUBOXI
>
> config TARGET_MX6LOGICPD
> bool "Logic PD i.MX6 SOM"
> + select MX6Q
> + select SUPPORT_SPL
> select BOARD_EARLY_INIT_F
> select BOARD_LATE_INIT
> select DM
> @@ -206,7 +208,6 @@ config TARGET_MX6LOGICPD
> select DM_I2C
> select DM_MMC
> select DM_PMIC
> - select DM_REGULATOR
> select OF_CONTROL
>
> config TARGET_MX6MEMCAL
> diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c
> index 84405635a5..ce1c8a5d6b 100644
> --- a/board/logicpd/imx6/imx6logic.c
> +++ b/board/logicpd/imx6/imx6logic.c
> @@ -182,3 +182,144 @@ int board_late_init(void)
>
> return 0;
> }
> +
> +#ifdef CONFIG_SPL_BUILD
> +#include
> +#include
> +#include
> +#include
> +
> +#ifdef CONFIG_SPL_OS_BOOT
> +int spl_start_uboot(void)
> +{
> + /* break into full u-boot on 'c' */
> + if (serial_tstc() && serial_getc() == 'c')
> + return 1;
> +
> + return 0;
> +}
> +#endif
> +
> +static void ccgr_init(void)
> +{
> + struct mxc_ccm_reg *ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
> +
> + writel(0x00C03F3F, &ccm->CCGR0);
> + writel(0x0030FC03, &ccm->CCGR1);
> + writel(0x0FFFC000, &ccm->CCGR2);
> + writel(0x3FF0, &ccm->CCGR3);
> + writel(0xF300, &ccm->CCGR4);
> + writel(0x0FF3, &ccm->CCGR5);
> + writel(0x0FFF, &ccm->CCGR6);
> +}
> +
> +static int mx6q_dcd_table[] = {
> + MX6_IOM_GRP_DDR_TYPE, 0x000C,
> + MX6_IOM_GRP_DDRPKE, 0x,
> + MX6_IOM_DRAM_SDCLK_0, 0x0030,
> + MX6_IOM_DRAM_SDCLK_1, 0x0030,
> + MX6_IOM_DRAM_CAS, 0x0030,
> + MX6_IOM_DRAM_RAS, 0x0030,
> + MX6_IOM_GRP_ADDDS, 0x0030,
> + MX6_IOM_DRAM_RESET, 0x0030,
> + MX6_IOM_DRAM_SDBA2, 0x,
> + MX6_IOM_DRAM_SDODT0, 0x0030,
> + MX6_IOM_DRAM_SDODT1, 0x0030,
> + MX6_IOM_GRP_CTLDS, 0x0030,
> + MX6_IOM_DDRMODE_CTL, 0x0002,
> + MX6_IOM_DRAM_SDQS0, 0x0030,
> + MX6_IOM_DRAM_SDQS1, 0x0030,
> + MX6_IOM_DRAM_SDQS2, 0x0030,
> + MX6_IOM_DRAM_SDQS3, 0x0030,
> + MX6_IOM_GRP_DDRMODE, 0x0002,
> + MX6_IOM_GRP_B0DS, 0x0030,
> + MX6_IOM_GRP_B1DS, 0x0030,
> + MX6_IOM_GRP_B2DS, 0x0030,
> + MX6_IOM_GRP_B3DS, 0x0030,
> + MX6_IOM_DRAM_DQM0, 0x0030,
> + MX6_IOM_DRAM_DQM1, 0x0030,
> + MX6_IOM_DRAM_DQM2, 0x0030,
> + MX6_IOM_DRAM_DQM3, 0x0030,
> + MX6_MMDC_P0_MDSCR, 0x8000,
> + MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003,
> + MX6_MMDC_P0_MPWLDECTRL0, 0x002D003A,
> + MX6_MMDC_P0_MPWLDECTRL1, 0x0038002B,
> + MX6_MMDC_P0_MPDGCTRL0, 0x03340338,
> + MX6_MMDC_P0_MPDGCTRL1, 0x0334032C,
> + MX6_MMDC_P0_MPRDDLCTL, 0x4036383C,
> + MX6_MMDC_P0_MPWRDLCTL, 0x2E384038,
> + MX6_MMDC_P0_MPRDDQBY0DL, 0x,
> + MX6_MMDC_P0_MPRDDQBY1DL, 0x,
> + MX6_MMDC_P0_MPRDDQBY2DL, 0x,
> + MX6_MMDC_P0_MPRDDQBY3DL, 0x,
> + MX6_MMDC_P0_MPMUR0, 0x0800,
> + MX6_MMDC_P0_MDPDC, 0x00020036,
> + MX6_MMDC_P0_MDOTC, 0x09444040,
> + MX6_MMDC_P0_MDCFG0, 0xB8BE7955,
> + MX6_MMDC_P0_MDCFG1, 0xFF328F64,
> + MX6_MMDC_P0_MDCFG2, 0x01FF00DB,
> + MX6_MMDC_P0_MDMISC, 0x00011740,
> + MX6_MMDC_P0_MDSCR, 0x8000,
> + MX6_MMDC_P0_MDRWD, 0x26D2,
> + MX6_MMDC_P0_MDOR, 0x00BE1023,
> + MX6_MMDC_P0_MDASP, 0x0047,
> + MX6_MMDC_P0_MDCTL, 0x8519,
> + MX6_MMDC_P0_MDSCR, 0x00888032,
> + MX6_MMDC_P0_MDSCR, 0x8033,
> + MX6_MMDC_P0_MDSCR, 0x8031,
> + MX6_MMDC_P0_MDSCR, 0x19408030,
> + MX6_MMDC_P0_MDSCR, 0x04008040,
> + MX6_MMDC_P0_MDREF, 0x7800,
> + MX6_MMDC_P0_MPODTCTRL, 0x0007,
> + MX6_MMDC_P0_MDPDC, 0x00025576,
> + MX6_MMDC_P0_MAPSR, 0x00011006,
> + MX6_MMDC_P0_MDSCR, 0x,
> + /* enable AXI cache for VDOA/VPU/IPU */
> +
> + MX6_IOMUXC_GPR4, 0xF0CF,
> + /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
> + MX6_IOMUXC_GPR6, 0x007F007F,
> + MX6_IOMUXC_GPR7, 0x007F007F,
> +};
> +
> +static void ddr_init(int *table, int size)
> +{
> + int i;
> +
> + for (i = 0; i < size / 2 ; i++)
> + writel(table[2 * i + 1], table[2 * i]);
> +}
> +
> +static void spl_dram_init(void)
> +{
> + if (is_mx6dq())
> + ddr_init(mx6q_dcd_table, ARRA
Re: [U-Boot] [PATCH] tools/imximage: get HAB information from header
On 06/07/2018 16:10, Holger Dengler wrote:
> Signing parts of a u-boot imximage for image verification in High
> Assurance Boot (HAB) in a post-build process, requires some
> information from the imximage header. Currently, this information is
> only provided during the image build, which makes the transfer of this
> information to the post-build process harder than necessary.
>
> The i.MX HAB information (start and length) can be calculated either
> by using information from the image-configuration file, or from the
> information in the flash header of the imximage.
> The advantage of using information from flash header is, that they are
> not only available during image creation, but also available if
> existing images are processed.
>
> Example:
> $ tools/mkimage -l u-boot.imx
> Image Type: Freescale IMX Boot Image
> Image Ver:2 (i.MX53/6/7 compatible)
> Mode: DCD
> Data Size:483328 Bytes = 472.00 KiB = 0.46 MiB
> Load Address: 877ff420
> Entry Point: 8780
> HAB Blocks: 0x877ff400 0x 0x00071c00
> DCD Blocks: 0x0091 0x002c 0x0208
>
> Signed-off-by: Holger Dengler
> ---
>
> tools/imximage.c | 13 +
> 1 file changed, 9 insertions(+), 4 deletions(-)
>
> diff --git a/tools/imximage.c b/tools/imximage.c
> index 5f63bf8759..d7c0b6e883 100644
> --- a/tools/imximage.c
> +++ b/tools/imximage.c
> @@ -506,8 +506,7 @@ static void print_hdr_v2(struct imx_header *imx_hdr)
> genimg_print_size(hdr_v2->boot_data.size);
> printf("Load Address: %08x\n",
> (uint32_t)fhdr_v2->boot_data_ptr);
> printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
> - if (fhdr_v2->csf && (imximage_ivt_offset != UNDEFINED) &&
> - (imximage_csf_size != UNDEFINED)) {
> + if (fhdr_v2->csf) {
> uint16_t dcdlen;
> int offs;
>
> @@ -515,10 +514,16 @@ static void print_hdr_v2(struct imx_header *imx_hdr)
> offs = (char *)&hdr_v2->data.dcd_table
> - (char *)hdr_v2;
>
> + /*
> + * The HAB block is the first part of the image, from
> + * start of IVT header (fhdr_v2->self) to the start of
> + * the CSF block (fhdr_v2->csf). So HAB size is
> + * calculated as:
> + * HAB_size = fhdr_v2->csf - fhdr_v2->self
> + */
> printf("HAB Blocks: 0x%08x 0x%08x 0x%08x\n",
> (uint32_t)fhdr_v2->self, 0,
> -hdr_v2->boot_data.size - imximage_ivt_offset -
> -imximage_csf_size);
> +(uint32_t)(fhdr_v2->csf - fhdr_v2->self));
> printf("DCD Blocks: 0x0091 0x%08x 0x%08x\n",
> offs, be16_to_cpu(dcdlen));
> }
>
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH v3] mx25: fix the offset between the USB ports' registers
On 16/07/2018 22:11, Martin Kaiser wrote:
> From: Martin Kaiser
>
> The USBOH module on imx25 chips contains two USB controllers which are
> called USB OTG Controller and USB Host Controller. Each one has its EHCI
> root hub. The OTG Controller's EHCI registers start at offset 0, the Host
> Controller's registers start at offset 0x400.
>
> We set CONFIG_MXC_USB_PORT=0 to select the OTG Controller and 1 for the
> Host Controller. Therefore, IMX_USB_PORT_OFFSET must be 0x400. Using
> this setting, the Host Controller starts working on my imx25 board.
>
> Please note that the imx25 reference manual claims that the Host
> Controller's registers start at 0x200. This is not correct. The Linux
> Kernel uses the correct offset 0x400 in imx25.dtsi.
>
> Signed-off-by: Martin Kaiser
> Reviewed-by: Fabio Estevam
> ---
> Changes in v3:
> - reformat the multi-line comment
>
> Changes in v2:
> - add a comment about the incorrect info in the reference manual
>
> arch/arm/include/asm/arch-mx25/imx-regs.h | 7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h
> b/arch/arm/include/asm/arch-mx25/imx-regs.h
> index 1b00ed7..d64ca82 100644
> --- a/arch/arm/include/asm/arch-mx25/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx25/imx-regs.h
> @@ -360,7 +360,12 @@ struct cspi_regs {
> #define IMX_IIM_BASE (0x53FF)
> #define IIM_BASE_ADDRIMX_IIM_BASE
> #define IMX_USB_BASE (0x53FF4000)
> -#define IMX_USB_PORT_OFFSET 0x200
> +/*
> + * This is in contradiction to the imx25 reference manual, which says that
> + * port 1's registers start at 0x53FF4200. The correct base address for
> + * port 1 is 0x53FF4400. The kernel uses 0x53FF4400 as well.
> + */
> +#define IMX_USB_PORT_OFFSET 0x400
> #define IMX_CSI_BASE (0x53FF8000)
> #define IMX_DRYICE_BASE (0x53FFC000)
>
>
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
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Re: [U-Boot] [PATCH] configs: imx6q_logic: Cleanup ramdiskaddr and fdtaddr
On 20/07/2018 15:25, Adam Ford wrote:
> There are already definitions for ramdisk_addr_r and fdt_addr_r, so
> having a duplicate copy called ramdiskaddr and fdtaddr is confusing.
> This patch converts any references to ramdisk_addr_r and fdt_addr_r
> and removes the duplicates.
>
> Signed-off-by: Adam Ford
>
> diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h
> index c6a7a609be..f94e27fe09 100644
> --- a/include/configs/imx6_logic.h
> +++ b/include/configs/imx6_logic.h
> @@ -35,10 +35,8 @@
> "script=boot.scr\0" \
> "image=zImage\0" \
> "bootm_size=0x1000\0" \
> - "fdt_addr_r=0x1800\0" \
> - "fdt_addr=0x1800\0" \
> - "ramdisk_addr_r=0x1300\0" \
> - "ramdiskaddr=0x1300\0" \
> + "fdt_addr_r=0x1300\0" \
> + "ramdisk_addr_r=0x1400\0" \
> "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
> "ramdisk_file=rootfs.cpio.uboot\0" \
> "boot_fdt=try\0" \
> @@ -60,25 +58,25 @@
> " source\0" \
> "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};" \
> " setenv kernelsize ${filesize}\0" \
> - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
> - "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdiskaddr}" \
> + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdt_file}\0" \
> + "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr_r}" \
> " ${ramdisk_file}; setenv ramdisksize ${filesize}\0" \
> "mmcboot=echo Booting from mmc...; run mmcargs; run loadimage;" \
> - " run loadfdt; bootz ${loadaddr} - ${fdt_addr}\0" \
> + " run loadfdt; bootz ${loadaddr} - ${fdt_addr_r}\0" \
> "mmcramboot=run ramargs; run loadimage;" \
> " run loadfdt; run loadramdisk;" \
> - " bootz ${loadaddr} ${ramdiskaddr} ${fdt_addr}\0" \
> + " bootz ${loadaddr} ${ramdisk_addr_r} ${fdt_addr_r}\0" \
> "nandboot=echo Booting from nand ...; " \
> " run nandargs;" \
> " nand read ${loadaddr} kernel ${kernelsize};" \
> " nand read ${fdt_addr} dtb;" \
> " bootz ${loadaddr} - ${fdt_addr}\0" \
> "nandramboot=echo Booting RAMdisk from nand ...; " \
> - " nand read ${ramdiskaddr} fs ${ramdisksize};" \
> + " nand read ${ramdisk_addr_r} fs ${ramdisksize};" \
> " nand read ${loadaddr} kernel ${kernelsize};" \
> - " nand read ${fdt_addr} dtb;" \
> + " nand read ${fdt_addr_r} dtb;" \
> " run ramargs;" \
> - " bootz ${loadaddr} ${ramdiskaddr} ${fdt_addr}\0" \
> + " bootz ${loadaddr} ${ramdisk_addr_r} ${fdt_addr_r}\0" \
> "netargs=setenv bootargs console=${console},${baudrate} " \
> "root=/dev/nfs" \
> " ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
>
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
--
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[U-Boot] [PATCH v2 2/5] Revert "dm: led: auto probe() LEDs with "default-state""
This reverts commit bc882f5d5c7b4d6ed5e927bf838863af43c786e7.
Signed-off-by: Patrick Delaunay
---
Changes in v2: None
drivers/led/led_gpio.c | 9 -
1 file changed, 9 deletions(-)
diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c
index a36942b..533587d 100644
--- a/drivers/led/led_gpio.c
+++ b/drivers/led/led_gpio.c
@@ -10,7 +10,6 @@
#include
#include
#include
-#include
struct led_gpio_priv {
struct gpio_desc gpio;
@@ -118,14 +117,6 @@ static int led_gpio_bind(struct udevice *parent)
return ret;
uc_plat = dev_get_uclass_platdata(dev);
uc_plat->label = label;
-
- if (ofnode_read_bool(node, "default-state")) {
- struct udevice *devp;
-
- ret = uclass_get_device_tail(dev, 0, &devp);
- if (ret)
- return ret;
- }
}
return 0;
--
2.7.4
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[U-Boot] [PATCH v2 1/5] stm32mp1: add gpio led support
This patch add the 4 LED available on the ED1 board and activated
gpio led driver.
Reviewed-by: Simon Glass
Signed-off-by: Patrick Delaunay
---
Changes in v2: None
arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 24
configs/stm32mp15_basic_defconfig| 2 ++
2 files changed, 26 insertions(+)
diff --git a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
index 39a0ebc..4898483 100644
--- a/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi
@@ -13,6 +13,30 @@
mmc1 = &sdmmc2;
i2c3 = &i2c4;
};
+
+ led {
+ compatible = "gpio-leds";
+
+ red {
+ label = "stm32mp:red:status";
+ gpios = <&gpioa 13 GPIO_ACTIVE_LOW>;
+ default-state = "off";
+ };
+ green {
+ label = "stm32mp:green:user";
+ gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+ orange {
+ label = "stm32mp:orange:status";
+ gpios = <&gpioh 7 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ blue {
+ label = "stm32mp:blue:user";
+ gpios = <&gpiod 11 GPIO_ACTIVE_HIGH>;
+ };
+ };
};
&uart4_pins_a {
diff --git a/configs/stm32mp15_basic_defconfig
b/configs/stm32mp15_basic_defconfig
index c72a440..2cac114 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -29,6 +29,8 @@ CONFIG_CMD_EXT4_WRITE=y
# CONFIG_SPL_DOS_PARTITION is not set
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_STM32F7=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
CONFIG_DM_MMC=y
CONFIG_STM32_SDMMC2=y
# CONFIG_PINCTRL_FULL is not set
--
2.7.4
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[U-Boot] [PATCH v2 3/5] dm: led: move default state support in led uclass
This patch save common LED property "default-state" value
in post bind of LED uclass.
The configuration for this default state is only performed when
led_default_state() is called;
It can be called in your board_init()
or it could added in init_sequence_r[] in future.
Reviewed-by: Simon Glass
Signed-off-by: Patrick Delaunay
---
Changes in v2: None
drivers/led/led-uclass.c | 54
drivers/led/led_gpio.c | 8 ---
include/led.h| 23 +
3 files changed, 77 insertions(+), 8 deletions(-)
diff --git a/drivers/led/led-uclass.c b/drivers/led/led-uclass.c
index 2f4d69e..141401d 100644
--- a/drivers/led/led-uclass.c
+++ b/drivers/led/led-uclass.c
@@ -8,6 +8,7 @@
#include
#include
#include
+#include
#include
#include
@@ -63,8 +64,61 @@ int led_set_period(struct udevice *dev, int period_ms)
}
#endif
+static int led_post_bind(struct udevice *dev)
+{
+ struct led_uc_plat *uc_pdata;
+ const char *default_state;
+
+ uc_pdata = dev_get_uclass_platdata(dev);
+
+ /* common optional properties */
+ uc_pdata->default_state = LED_DEF_NO;
+ default_state = dev_read_string(dev, "default-state");
+ if (default_state) {
+ if (!strncmp(default_state, "on", 2))
+ uc_pdata->default_state = LED_DEF_ON;
+ else if (!strncmp(default_state, "off", 3))
+ uc_pdata->default_state = LED_DEF_OFF;
+ else if (!strncmp(default_state, "keep", 4))
+ uc_pdata->default_state = LED_DEF_KEEP;
+ }
+
+ return 0;
+}
+
+int led_default_state(void)
+{
+ struct udevice *dev;
+ struct uclass *uc;
+ struct led_uc_plat *uc_pdata;
+ int ret;
+
+ ret = uclass_get(UCLASS_LED, &uc);
+ if (ret)
+ return ret;
+ for (uclass_find_first_device(UCLASS_LED, &dev);
+dev;
+uclass_find_next_device(&dev)) {
+ uc_pdata = dev_get_uclass_platdata(dev);
+ if (!uc_pdata || uc_pdata->default_state == LED_DEF_NO)
+ continue;
+ ret = device_probe(dev);
+ if (ret)
+ return ret;
+ if (uc_pdata->default_state == LED_DEF_ON)
+ led_set_state(dev, LEDST_ON);
+ else if (uc_pdata->default_state == LED_DEF_OFF)
+ led_set_state(dev, LEDST_OFF);
+ printf("%s: default_state=%d\n",
+ uc_pdata->label, uc_pdata->default_state);
+ }
+
+ return ret;
+}
+
UCLASS_DRIVER(led) = {
.id = UCLASS_LED,
.name = "led",
+ .post_bind = led_post_bind,
.per_device_platdata_auto_alloc_size = sizeof(struct led_uc_plat),
};
diff --git a/drivers/led/led_gpio.c b/drivers/led/led_gpio.c
index 533587d..93f6b91 100644
--- a/drivers/led/led_gpio.c
+++ b/drivers/led/led_gpio.c
@@ -57,7 +57,6 @@ static int led_gpio_probe(struct udevice *dev)
{
struct led_uc_plat *uc_plat = dev_get_uclass_platdata(dev);
struct led_gpio_priv *priv = dev_get_priv(dev);
- const char *default_state;
int ret;
/* Ignore the top-level LED node */
@@ -68,13 +67,6 @@ static int led_gpio_probe(struct udevice *dev)
if (ret)
return ret;
- default_state = dev_read_string(dev, "default-state");
- if (default_state) {
- if (!strncmp(default_state, "on", 2))
- gpio_led_set_state(dev, LEDST_ON);
- else if (!strncmp(default_state, "off", 3))
- gpio_led_set_state(dev, LEDST_OFF);
- }
return 0;
}
diff --git a/include/led.h b/include/led.h
index 940b97f..ff45f03 100644
--- a/include/led.h
+++ b/include/led.h
@@ -8,12 +8,27 @@
#define __LED_H
/**
+ * enum led_default_state - The initial state of the LED.
+ * see Documentation/devicetree/bindings/leds/common.txt
+ */
+enum led_def_state_t {
+ LED_DEF_NO,
+ LED_DEF_ON,
+ LED_DEF_OFF,
+ LED_DEF_KEEP
+};
+
+/**
* struct led_uc_plat - Platform data the uclass stores about each device
*
* @label: LED label
+ * @default_state* - The initial state of the LED.
+ see Documentation/devicetree/bindings/leds/common.txt
+ * * - set automatically on device bind by the uclass's '.post_bind' method.
*/
struct led_uc_plat {
const char *label;
+ enum led_def_state_t default_state;
};
/**
@@ -106,4 +121,12 @@ enum led_state_t led_get_state(struct udevice *dev);
*/
int led_set_period(struct udevice *dev, int period_ms);
+/**
+ * led_default_state() - set the default state for all the LED
+ *
+ * This enables all leds which have default state.
+ *
+ */
+int led_default_state(void);
+
#endif
--
2.7.4
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[U-Boot] [PATCH v2 4/5] stm32mp1: use new function led default state
Initialize the led with the default state defined in device tree. Signed-off-by: Patrick Delaunay --- Changes in v2: None board/st/stm32mp1/stm32mp1.c | 4 1 file changed, 4 insertions(+) diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index cc39fa6..db8c805 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -22,5 +22,9 @@ int board_init(void) /* address of boot parameters */ gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100; +#ifdef CONFIG_LED + led_default_state(); +#endif /* CONFIG_LED */ + return 0; } -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] fs: ext4: Prevent erasing buffer past file size
The variable 'n' represents the number of bytes to be read from a certain
offset in a file, to a certain offset in buffer 'buf'. The variable 'len'
represents the length of the entire file, clamped correctly to avoid any
overflows.
Therefore, comparing 'n' and 'len' to determine whether clearing 'n'
bytes of the buffer 'buf' at a certain offset would clear data past
buffer 'buf' cannot lead to a correct result, since the 'n' does not
contain the offset from the beginning of the file.
This patch keeps track of the amount of data read and checks for the
buffer overflow by comparing the 'n' to the remaining amount of data
to be read instead.
Signed-off-by: Marek Vasut
Cc: Ian Ray
Cc: Martyn Welch
Cc: Stefano Babic
Cc: Tom Rini
Fixes: ecdfb4195b20 ("ext4: recover from filesystem corruption when reading")
---
fs/ext4/ext4fs.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
index 2a28031d14..537aa05eff 100644
--- a/fs/ext4/ext4fs.c
+++ b/fs/ext4/ext4fs.c
@@ -60,6 +60,7 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos,
lbaint_t delayed_extent = 0;
lbaint_t delayed_skipfirst = 0;
lbaint_t delayed_next = 0;
+ lbaint_t read_total = 0;
char *delayed_buf = NULL;
short status;
@@ -140,13 +141,14 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos,
return -1;
previous_block_number = -1;
}
- /* Zero no more than `len' bytes. */
+ /* Zero no more than 'filesize' bytes. */
n = blocksize - skipfirst;
- if (n > len)
- n = len;
+ if (n > (len - read_total))
+ n = (len - read_total);
memset(buf, 0, n);
}
buf += blocksize - skipfirst;
+ read_total += blocksize - skipfirst;
}
if (previous_block_number != -1) {
/* spill */
--
2.16.2
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[U-Boot] [PATCH v2 5/5] sandbox: led: use new function to configure default state
Initialize the led with the default state defined in device tree
in board_init and solve issue with test for led default state.
Signed-off-by: Patrick Delaunay
---
Led default-state is correctly handle in Sandbox, tested with:
./u-boot -d ./arch/sandbox/dts/test.dtb
=> led list
sandbox:red
sandbox:green
sandbox:default_on on
sandbox:default_off off
This patch solve "make tests" issue introduced by
http://patchwork.ozlabs.org/patch/943651/
Changes in v2:
- add sandbox impact and test update
board/sandbox/sandbox.c | 9 +
common/board_r.c| 3 ++-
test/dm/led.c | 3 +++
3 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/board/sandbox/sandbox.c b/board/sandbox/sandbox.c
index 195f620..66b5f24 100644
--- a/board/sandbox/sandbox.c
+++ b/board/sandbox/sandbox.c
@@ -6,6 +6,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -47,6 +48,14 @@ int dram_init(void)
return 0;
}
+int board_init(void)
+{
+#ifdef CONFIG_LED
+ led_default_state();
+#endif /* CONFIG_LED */
+ return 0;
+}
+
#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
diff --git a/common/board_r.c b/common/board_r.c
index 64f2574..9402c0e 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -690,7 +690,8 @@ static init_fnc_t init_sequence_r[] = {
#ifdef CONFIG_DM
initr_dm,
#endif
-#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
+#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV) || \
+ defined(CONFIG_SANDBOX)
board_init, /* Setup chipselects */
#endif
/*
diff --git a/test/dm/led.c b/test/dm/led.c
index 0071f21..00de7b3 100644
--- a/test/dm/led.c
+++ b/test/dm/led.c
@@ -32,6 +32,9 @@ static int dm_test_led_default_state(struct unit_test_state
*uts)
{
struct udevice *dev;
+ /* configure the default state (auto-probe) */
+ led_default_state();
+
/* Check that we handle the default-state property correctly. */
ut_assertok(led_get_by_label("sandbox:default_on", &dev));
ut_asserteq(LEDST_ON, led_get_state(dev));
--
2.7.4
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[U-Boot] [PATCH v2 0/5] dm: led: remove auto probe in binding function
Hi, The commit bc882f5d5c7b4d6ed5e927bf838863af43c786e7 introduce auto probe of LED in binding function but that cause issue on my board. This first patch of this patchset activateis the LED on my board to explain the issue, the second patch revert this commit and the third one propose an other solution. For me, this commit is a error because in README of doc/driver-model/ it is indicated: The device's bind() method is permitted to perform simple actions, but should not scan the device tree node, not initialise hardware, nor set up structures or allocate memory. All of these tasks should be left for the probe() method. And in the patch the LED driver is probed during the binding scan. When I activated the LED in my ARM target with the patch "stm32mp1: add gpio led support", I have the sequence: dm_init_and_scan() : 1/ dm_scan_fdt_node() => loop on all the node 2/ scan for LED node => probe of LED driver is forced by "default-state" detection LED1 - "red" => probe of father of "red" node A - led B - soc C - root => probe of node needed by GPIO 1 - pin-controller 2 - gpio@50002000 3 - rcc-clk@5000 4 - rcc@5000 => probe forced by default state for other led LED2 - green LED3 - orange => probe of node needed by GPIO (other bank) 5 - gpio@50009000 3/ dm_extended_scan_fdt scan continue... scan node "fixed-clock" under "/clocks" clk-hse clk-hsi clk-lse clk-lsi clk-csi 4/ probe of all the used devices after dm_extended_scan_fdt() So many driver are probed before the end of the scan binding loop ! And that cause issue in my board (boot failed) because the rcc-clk clock driver found the input frequency with these fixed-clock, which are binded only after the stm32mp1 clock driver probe. For me probe in forbidden in binding function and thus uclass_get_device_tail() is not allowed in the commit bc882f5d5c7b4d6ed5e927bf838863af43c786e7 which need to be reverted. In the third patch I proposed an other solution based on the existing solution in u-class regulator used to enable regulator with "boot on" property (see regulators_enable_boot_on function). I think that adding a function is the better solution in the driver model to force probe for some node according binding information (after dm_init_and_scan call). This new function should be called in board_init function for each board but it could be also added in init_sequence_r[] in future. Changes in v2: - add sandbox impact and test update Patrick Delaunay (5): stm32mp1: add gpio led support Revert "dm: led: auto probe() LEDs with "default-state"" dm: led: move default state support in led uclass stm32mp1: use new function led default state sandbox: led: use new function to configure default state arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi | 24 ++ board/sandbox/sandbox.c | 9 ++ board/st/stm32mp1/stm32mp1.c | 4 +++ common/board_r.c | 3 +- configs/stm32mp15_basic_defconfig| 2 ++ drivers/led/led-uclass.c | 54 drivers/led/led_gpio.c | 17 -- include/led.h| 23 ++ test/dm/led.c| 3 ++ 9 files changed, 121 insertions(+), 18 deletions(-) -- 2.7.4 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PULL] Please pull u-boot-imx
Hi Tom, please pull from u-boot-imx, thanks ! The following changes since commit 474ecd2c84d97314b8145fbe3a57887f41b2edb3: env: Simplify Makefile using $(SPL_TPL_) (2018-07-21 12:24:31 -0400) are available in the git repository at: git://www.denx.de/git/u-boot-imx.git master for you to fetch changes up to f97f167107b33fc6596561dae1309571ade39055: configs: imx6q_logic: Cleanup ramdiskaddr and fdtaddr (2018-07-23 11:05:54 +0200) Adam Ford (2): imx: i.mx6q: imx6q_logic: Migrate to SPL and enable SDP configs: imx6q_logic: Cleanup ramdiskaddr and fdtaddr Baruch Siach (2): mmc: drop mention of IN_PROGRESS status mx6cuboxi: drop CONFIG_SYS_FSL_USDHC_NUM Fabio Berton (1): pico-imx7d: Add support for update SPL using DFU Fabio Estevam (7): mx7: Remove BMODE support pico-imx7d: Convert to distro config pico-imx7d: Add fastboot support pico-imx7d: Add SPL support pico-imx7d: Add Falcon mode support pico-imx7d: Enable CONFIG_ARMV7_BOOT_SEC_DEFAULT pico-imx7d: Do not override addrmap5 Holger Dengler (1): tools/imximage: get HAB information from header Jon Nettleton (5): mmc: break out get_op_cond code to its own function mx6cuboxi: Add support for eMMC booting mx6cuboxi: Use mmc_get_op_cond() to check for an eMMC mx6cuboxi: Add emmc device tree suffix mx6cuboxi: Move the default environment for all devices Ludwig Zenz (4): Revert "ARM: imx6: Disable DDR DRAM calibration DHCOM i.MX6 PDK" ARM: imx6: configure ddrcode pins in spl DHCOM i.MX6 PDK ARM: imx6: DHCOM i.MX6 PDK: ddr init for 32bit bus and 4GBit chips ARM: dh_imx6: enable GigaDevice, Macronix, and Winbond SPI Flash support in Kconfig Mark Jonas (1): arm, imx6: add alternative PAD_CTL_DSE constants Martin Kaiser (1): mx25: fix the offset between the USB ports' registers Michael Trimarchi (4): eth: dm: fec: Add gpio phy reset binding imx: mx6: Fix implementantion reset_misc imx: imx6: Add comment to gpr_init function i.MX6: engicam: gpr_init can be called only for some architecture Otavio Salvador (9): pico-imx7d: Fix common distro configuration behavior pico-imx7d: Add GPT partitioning support pico-imx7d: Add default DFU targets pico-imx7d: Add bootmenu to choose the baseboard pico-imx7d: Allow default fdtfile to be overridden by defconfig pico-imx7d: Enable auxiliary code support pico-imx7d: README: Use dfu-util to flash U-Boot pico-imx7d: README: Drop old instructions about secure mode pico-imx7d: Add new pico-pi config Stefan Agner (12): mtd: nand: mxs_nand: add device tree support for i.MX 6 imx: add macro to detect whether USB has been initialized ARM: dts: imx6ull: use same compatible string as Linux is using board: toradex: add new and upcoming SKUs board: toradex: add Colibri iMX6ULL support ARM: PSCI: initialize stack pointer on secondary CPUs imx: mx7: psci: use C code exclusively imx: mx7: psci: provide complete PSCI 1.0 implementation imx: mx7: psci: support CPU0 on/off imx: mx7: psci: implement MIGRATE_INFO_TYPE colibri_imx7: add compatible string used in vanilla Linux colibri_imx7: improve DDR3 timing Stefano Babic (1): bootcount: flush after storing the bootcounter Uri Mashiach (1): arm: imx7d: cl-som-imx7: sf: support all SF types arch/arm/cpu/armv7/psci.S | 2 + arch/arm/dts/imx6ull-colibri.dts| 550 ++ arch/arm/dts/imx6ull.dtsi | 2 +- arch/arm/include/asm/arch-mx25/imx-regs.h | 7 +- arch/arm/include/asm/arch-mx6/imx-regs.h| 7 ++ arch/arm/include/asm/mach-imx/iomux-v3.h| 8 +++ arch/arm/mach-imx/Kconfig | 2 +- arch/arm/mach-imx/mx6/Kconfig | 11 ++- arch/arm/mach-imx/mx6/soc.c | 7 ++ arch/arm/mach-imx/mx7/Kconfig | 2 +- arch/arm/mach-imx/mx7/Makefile | 5 +- arch/arm/mach-imx/mx7/psci-mx7.c| 148 arch/arm/mach-imx/mx7/psci.S| 60 arch/arm/mach-imx/mx7/soc.c | 25 --- board/dhelectronics/dh_imx6/dh_imx6_spl.c | 227 board/engicam/common/spl.c | 3 +- board/logicpd/imx6/imx6logic.c | 141 ++ board/logicpd/imx6/mx6q_2x_MT41K512M16HA.cfg| 111 -- board/solidrun/mx6cuboxi/mx6cuboxi.c| 115 --
[U-Boot] [PATCH] imx8qxp_mek: add README
Add README file for i.MX8QXP MEK board. Signed-off-by: Peng Fan Cc: Stefano Babic Cc: Fabio Estevam Cc: Anatolij Gustschin --- This patch is for testing i.MX8QXP patchset [PATCH V2 00/32] i.MX: Add i.MX8QXP support https://lists.denx.de/pipermail/u-boot/2018-July/335079.html The board is using B0 chip, A0 chip is not being supported. Please help test if you are interested. I'll post out V3 after collecting more comments. Sadly, I do not know where to download scfw_tcm.bin in public for B0 QXP. Thanks, Peng. board/freescale/imx8qxp_mek/README | 70 ++ 1 file changed, 70 insertions(+) create mode 100644 board/freescale/imx8qxp_mek/README diff --git a/board/freescale/imx8qxp_mek/README b/board/freescale/imx8qxp_mek/README new file mode 100644 index 00..97c244543a --- /dev/null +++ b/board/freescale/imx8qxp_mek/README @@ -0,0 +1,70 @@ +U-Boot for the NXP i.MX8QXP EVK board + +Quick Start +=== + +- Build U-Boot +- Build the ARM Trusted firmware binary +- Get scfw_tcm.bin and ahab-container.img +- Get mkimage tool +- Generate flash.bin using imx-mkimage +- Flash the binary into the SD card +- Boot + +Build U-Boot + + +$ make imx8qxp_mek_defconfig +$ make + +Get and Build the ARM Trusted firmware +== + +$ git clone https://source.codeaurora.org/external/imx/imx-atf +$ cd imx-atf/ +$ git checkout origin/imx_4.9.88_imx8qxp_beta2 +$ make PLAT=imx8qxp bl31 + +Get scfw_tcm.bin and ahab-container.img +== + +$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-7.6.bin +$ chmod +x firmware-imx-7.6.bin +$ ./firmware-imx-7.6.bin + +scfw_tcm.bin [TODO] + +Get mkimage tool +== +Download the imx-mkimage tool: + +$ git clone https://source.codeaurora.org/external/imx/imx-mkimage/ +$ cd imx-mkimage/ +$ git checkout origin/imx_4.9.88_imx8qxp_beta2 + + +Generate flash.bin using imx-mkimage + + +Copy the following binaries to imx-mkimage/iMX8M folder: + +$ cp imx-atf/build/imx8qxp/release/bl31.bin imx-mkimage/iMX8QX/ +$ cp u-boot/u-boot.bin imx-mkimage/iMX8QX/ + +Copy the following firmwares to imx-mkimage/iMX8 folder : + +$ cp firmware-imx-7.6/firmware/seco/ahab-container.img imx-mkimage/iMX8QX/ + +$ cd imx-mkimage/ +$ make SOC=iMX8QX flash + +Flash the binary into the SD card += + +Burn the flash.bin binary to SD card offset 32KB: + +$ sudo dd if=iMX8QX/flash.bin of=/dev/sd[x] bs=1024 seek=32 + +Boot + +Set Boot switch SW2: 1100. -- 2.14.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/4] gpio: xilinx: Find out bank before use in xilinx_gpio_get_function()
Call xilinx_gpio_get_bank_pin() before use. Reported-by: Stefan Herbrechtsmeier Signed-off-by: Michal Simek --- drivers/gpio/xilinx_gpio.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c index 48b52c985a55..8ce08d80f491 100644 --- a/drivers/gpio/xilinx_gpio.c +++ b/drivers/gpio/xilinx_gpio.c @@ -435,6 +435,10 @@ static int xilinx_gpio_get_function(struct udevice *dev, unsigned offset) int val, ret; u32 bank, pin; + ret = xilinx_gpio_get_bank_pin(offset, &bank, &pin, dev); + if (ret) + return ret; + /* Check if all pins are inputs */ if (platdata->bank_input[bank]) return GPIOF_INPUT; @@ -443,10 +447,6 @@ static int xilinx_gpio_get_function(struct udevice *dev, unsigned offset) if (platdata->bank_output[bank]) return GPIOF_OUTPUT; - ret = xilinx_gpio_get_bank_pin(offset, &bank, &pin, dev); - if (ret) - return ret; - /* FIXME test on dual */ val = readl(&platdata->regs->gpiodir + bank * 2); val = !(val & (1 << pin)); -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 2/4] gpio: xilinx: Swap xilinx_gpio_get_function with xilinx_gpio_get_value
Exchange two functions to avoid function declaration for next patch.
Signed-off-by: Michal Simek
---
drivers/gpio/xilinx_gpio.c | 38 +++---
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
index 8ce08d80f491..4da9ae114d87 100644
--- a/drivers/gpio/xilinx_gpio.c
+++ b/drivers/gpio/xilinx_gpio.c
@@ -410,25 +410,6 @@ static int xilinx_gpio_set_value(struct udevice *dev,
unsigned offset,
return val;
};
-static int xilinx_gpio_get_value(struct udevice *dev, unsigned offset)
-{
- struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
- int val, ret;
- u32 bank, pin;
-
- ret = xilinx_gpio_get_bank_pin(offset, &bank, &pin, dev);
- if (ret)
- return ret;
-
- debug("%s: regs: %lx, gpio: %x, bank %x, pin %x\n", __func__,
- (ulong)platdata->regs, offset, bank, pin);
-
- val = readl(&platdata->regs->gpiodata + bank * 2);
- val = !!(val & (1 << pin));
-
- return val;
-};
-
static int xilinx_gpio_get_function(struct udevice *dev, unsigned offset)
{
struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
@@ -457,6 +438,25 @@ static int xilinx_gpio_get_function(struct udevice *dev,
unsigned offset)
return val;
}
+static int xilinx_gpio_get_value(struct udevice *dev, unsigned offset)
+{
+ struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
+ int val, ret;
+ u32 bank, pin;
+
+ ret = xilinx_gpio_get_bank_pin(offset, &bank, &pin, dev);
+ if (ret)
+ return ret;
+
+ debug("%s: regs: %lx, gpio: %x, bank %x, pin %x\n", __func__,
+ (ulong)platdata->regs, offset, bank, pin);
+
+ val = readl(&platdata->regs->gpiodata + bank * 2);
+ val = !!(val & (1 << pin));
+
+ return val;
+};
+
static int xilinx_gpio_direction_output(struct udevice *dev, unsigned offset,
int value)
{
--
1.9.1
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[U-Boot] [PATCH 4/4] gpio: xilinx: Remove !DM driver
There is no user for !DM driver that's why remove it.
Signed-off-by: Michal Simek
---
drivers/gpio/xilinx_gpio.c | 338 +
1 file changed, 2 insertions(+), 336 deletions(-)
diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
index 9d3e9379d0e5..2bd4cf331518 100644
--- a/drivers/gpio/xilinx_gpio.c
+++ b/drivers/gpio/xilinx_gpio.c
@@ -10,13 +10,9 @@
#include
#include
#include
+#include
-static LIST_HEAD(gpio_list);
-
-enum gpio_direction {
- GPIO_DIRECTION_OUT = 0,
- GPIO_DIRECTION_IN = 1,
-};
+#define XILINX_GPIO_MAX_BANK 2
/* Gpio simple map */
struct gpio_regs {
@@ -24,335 +20,6 @@ struct gpio_regs {
u32 gpiodir;
};
-#if !defined(CONFIG_DM_GPIO)
-
-#define GPIO_NAME_SIZE 10
-
-struct gpio_names {
- char name[GPIO_NAME_SIZE];
-};
-
-/* Initialized, rxbd_current, rx_first_buf must be 0 after init */
-struct xilinx_gpio_priv {
- struct gpio_regs *regs;
- u32 gpio_min;
- u32 gpio_max;
- u32 gpiodata_store;
- char name[GPIO_NAME_SIZE];
- struct list_head list;
- struct gpio_names *gpio_name;
-};
-
-/* Store number of allocated gpio pins */
-static u32 xilinx_gpio_max;
-
-/* Get associated gpio controller */
-static struct xilinx_gpio_priv *gpio_get_controller(unsigned gpio)
-{
- struct list_head *entry;
- struct xilinx_gpio_priv *priv = NULL;
-
- list_for_each(entry, &gpio_list) {
- priv = list_entry(entry, struct xilinx_gpio_priv, list);
- if (gpio >= priv->gpio_min && gpio <= priv->gpio_max) {
- debug("%s: reg: %x, min-max: %d-%d\n", __func__,
- (u32)priv->regs, priv->gpio_min, priv->gpio_max);
- return priv;
- }
- }
- puts("!!!Can't get gpio controller!!!\n");
- return NULL;
-}
-
-/* Get gpio pin name if used/setup */
-static char *get_name(unsigned gpio)
-{
- u32 gpio_priv;
- struct xilinx_gpio_priv *priv;
-
- debug("%s\n", __func__);
-
- priv = gpio_get_controller(gpio);
- if (priv) {
- gpio_priv = gpio - priv->gpio_min;
-
- return *priv->gpio_name[gpio_priv].name ?
- priv->gpio_name[gpio_priv].name : "UNKNOWN";
- }
- return "UNKNOWN";
-}
-
-/* Get output value */
-static int gpio_get_output_value(unsigned gpio)
-{
- u32 val, gpio_priv;
- struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
-
- if (priv) {
- gpio_priv = gpio - priv->gpio_min;
- val = !!(priv->gpiodata_store & (1 << gpio_priv));
- debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
- (u32)priv->regs, gpio_priv, val);
-
- return val;
- }
- return -1;
-}
-
-/* Get input value */
-static int gpio_get_input_value(unsigned gpio)
-{
- u32 val, gpio_priv;
- struct gpio_regs *regs;
- struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
-
- if (priv) {
- regs = priv->regs;
- gpio_priv = gpio - priv->gpio_min;
- val = readl(®s->gpiodata);
- val = !!(val & (1 << gpio_priv));
- debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
- (u32)priv->regs, gpio_priv, val);
-
- return val;
- }
- return -1;
-}
-
-/* Set gpio direction */
-static int gpio_set_direction(unsigned gpio, enum gpio_direction direction)
-{
- u32 val, gpio_priv;
- struct gpio_regs *regs;
- struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
-
- if (priv) {
- regs = priv->regs;
- val = readl(®s->gpiodir);
-
- gpio_priv = gpio - priv->gpio_min;
- if (direction == GPIO_DIRECTION_OUT)
- val &= ~(1 << gpio_priv);
- else
- val |= 1 << gpio_priv;
-
- writel(val, ®s->gpiodir);
- debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
- (u32)priv->regs, gpio_priv, val);
-
- return 0;
- }
-
- return -1;
-}
-
-/* Get gpio direction */
-static int gpio_get_direction(unsigned gpio)
-{
- u32 val, gpio_priv;
- struct gpio_regs *regs;
- struct xilinx_gpio_priv *priv = gpio_get_controller(gpio);
-
- if (priv) {
- regs = priv->regs;
- gpio_priv = gpio - priv->gpio_min;
- val = readl(®s->gpiodir);
- val = !!(val & (1 << gpio_priv));
- debug("%s: reg: %x, gpio_no: %d, dir: %d\n", __func__,
- (u32)priv->regs, gpio_priv, val);
-
- return val;
- }
-
- return -1;
-}
-
-/*
- * Get input value
- * for example gpio setup to output only can't get input value
- * which is breaking gpio toggle command
- */
-int gpio_get_
[U-Boot] [PATCH 3/4] gpio: xilinx: Not read output values via regs
Reading registers for finding out output value is not working because
input value is read instead in case of tristate.
Reported-by: Stefan Herbrechtsmeier
Signed-off-by: Michal Simek
---
drivers/gpio/xilinx_gpio.c | 38 +-
1 file changed, 33 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
index 4da9ae114d87..9d3e9379d0e5 100644
--- a/drivers/gpio/xilinx_gpio.c
+++ b/drivers/gpio/xilinx_gpio.c
@@ -358,6 +358,11 @@ struct xilinx_gpio_platdata {
int bank_max[XILINX_GPIO_MAX_BANK];
int bank_input[XILINX_GPIO_MAX_BANK];
int bank_output[XILINX_GPIO_MAX_BANK];
+ u32 dout_default[XILINX_GPIO_MAX_BANK];
+};
+
+struct xilinx_gpio_privdata {
+ u32 output_val[XILINX_GPIO_MAX_BANK];
};
static int xilinx_gpio_get_bank_pin(unsigned offset, u32 *bank_num,
@@ -387,6 +392,7 @@ static int xilinx_gpio_set_value(struct udevice *dev,
unsigned offset,
int value)
{
struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
+ struct xilinx_gpio_privdata *priv = dev_get_priv(dev);
int val, ret;
u32 bank, pin;
@@ -394,19 +400,21 @@ static int xilinx_gpio_set_value(struct udevice *dev,
unsigned offset,
if (ret)
return ret;
- debug("%s: regs: %lx, value: %x, gpio: %x, bank %x, pin %x\n",
- __func__, (ulong)platdata->regs, value, offset, bank, pin);
+ val = priv->output_val[bank];
+
+ debug("%s: regs: %lx, value: %x, gpio: %x, bank %x, pin %x, out %x\n",
+ __func__, (ulong)platdata->regs, value, offset, bank, pin, val);
if (value) {
- val = readl(&platdata->regs->gpiodata + bank * 2);
val = val | (1 << pin);
writel(val, &platdata->regs->gpiodata + bank * 2);
} else {
- val = readl(&platdata->regs->gpiodata + bank * 2);
val = val & ~(1 << pin);
writel(val, &platdata->regs->gpiodata + bank * 2);
}
+ priv->output_val[bank] = val;
+
return val;
};
@@ -441,6 +449,7 @@ static int xilinx_gpio_get_function(struct udevice *dev,
unsigned offset)
static int xilinx_gpio_get_value(struct udevice *dev, unsigned offset)
{
struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
+ struct xilinx_gpio_privdata *priv = dev_get_priv(dev);
int val, ret;
u32 bank, pin;
@@ -451,7 +460,14 @@ static int xilinx_gpio_get_value(struct udevice *dev,
unsigned offset)
debug("%s: regs: %lx, gpio: %x, bank %x, pin %x\n", __func__,
(ulong)platdata->regs, offset, bank, pin);
- val = readl(&platdata->regs->gpiodata + bank * 2);
+ if (xilinx_gpio_get_function(dev, offset) == GPIOF_INPUT) {
+ debug("%s: Read input value from reg\n", __func__);
+ val = readl(&platdata->regs->gpiodata + bank * 2);
+ } else {
+ debug("%s: Read saved output value\n", __func__);
+ val = priv->output_val[bank];
+ }
+
val = !!(val & (1 << pin));
return val;
@@ -558,11 +574,17 @@ static int xilinx_gpio_probe(struct udevice *dev)
{
struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct xilinx_gpio_privdata *priv = dev_get_priv(dev);
uc_priv->bank_name = dev->name;
uc_priv->gpio_count = platdata->bank_max[0] + platdata->bank_max[1];
+ priv->output_val[0] = platdata->dout_default[0];
+
+ if (platdata->bank_max[1])
+ priv->output_val[1] = platdata->dout_default[1];
+
return 0;
}
@@ -579,6 +601,9 @@ static int xilinx_gpio_ofdata_to_platdata(struct udevice
*dev)
"xlnx,all-inputs", 0);
platdata->bank_output[0] = dev_read_u32_default(dev,
"xlnx,all-outputs", 0);
+ platdata->dout_default[0] = dev_read_u32_default(dev,
+"xlnx,dout-default",
+0);
is_dual = dev_read_u32_default(dev, "xlnx,is-dual", 0);
if (is_dual) {
@@ -588,6 +613,8 @@ static int xilinx_gpio_ofdata_to_platdata(struct udevice
*dev)
"xlnx,all-inputs-2", 0);
platdata->bank_output[1] = dev_read_u32_default(dev,
"xlnx,all-outputs-2", 0);
+ platdata->dout_default[1] = dev_read_u32_default(dev,
+ "xlnx,dout-default-2", 0);
}
return 0;
@@ -606,5 +633,6 @@ U_BOOT_DRIVER(xilinx_gpio) = {
.ofdata_to_platdata = xilinx_gpio_ofdata_to_platdata,
.probe = xilinx_gpio_probe,
.pla
Re: [U-Boot] [PATCH v2] gpio: xilinx: Convert driver to DM
Hi,
On 20.7.2018 22:05, Stefan Herbrechtsmeier wrote:
> Hi Michal,
>
> Am 13.07.2018 um 17:20 schrieb Michal Simek:
>> This patch is enabling GPIO_DM support to have an option to use this
>> driver together with zynq gpio driver.
>> !DM part is kept there till Microblaze is cleanup which will be done
>> hopefully soon.
>>
>> Just a note:
>> There is no reason to initialize uc-priv->name because it is completely
>> unused.
>>
>> Signed-off-by: Michal Simek
>> ---
>>
>> Changes in v2:
>> - Show value in set_value when debug is enabled
>> - Implement xlate function
>> - Remove tabs from structures for alignment (to be consistent with the
>> rest of code)
>>
>> drivers/gpio/xilinx_gpio.c | 265
>> -
>> 1 file changed, 264 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
>> index 74c5be0865d1..48b52c985a55 100644
>> --- a/drivers/gpio/xilinx_gpio.c
>> +++ b/drivers/gpio/xilinx_gpio.c
>> @@ -1,6 +1,6 @@
>> // SPDX-License-Identifier: GPL-2.0+
>> /*
>> - * Copyright (c) 2013 Xilinx, Michal Simek
>> + * Copyright (c) 2013 - 2018 Xilinx, Michal Simek
>> */
>> #include
>> @@ -9,6 +9,7 @@
>> #include
>> #include
>> #include
>> +#include
>> static LIST_HEAD(gpio_list);
>> @@ -23,6 +24,8 @@ struct gpio_regs {
>> u32 gpiodir;
>> };
>> +#if !defined(CONFIG_DM_GPIO)
>> +
>> #define GPIO_NAME_SIZE 10
>> struct gpio_names {
>> @@ -345,3 +348,263 @@ int gpio_alloc_dual(u32 baseaddr, const char
>> *name, u32 gpio_no0, u32 gpio_no1)
>> /* Return the first gpio allocated for this device */
>> return ret;
>> }
>> +#else
>> +#include
>> +
>> +#define XILINX_GPIO_MAX_BANK 2
>> +
>> +struct xilinx_gpio_platdata {
>> + struct gpio_regs *regs;
>> + int bank_max[XILINX_GPIO_MAX_BANK];
>> + int bank_input[XILINX_GPIO_MAX_BANK];
>> + int bank_output[XILINX_GPIO_MAX_BANK];
>> +};
>> +
>> +static int xilinx_gpio_get_bank_pin(unsigned offset, u32 *bank_num,
>> + u32 *bank_pin_num, struct udevice *dev)
>> +{
>> + struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
>> + u32 bank, max_pins;
>> + /* the first gpio is 0 not 1 */
>> + u32 pin_num = offset;
>> +
>> + for (bank = 0; bank < XILINX_GPIO_MAX_BANK; bank++) {
>> + max_pins = platdata->bank_max[bank];
>> + if (pin_num < max_pins) {
>> + debug("%s: found at bank 0x%x pin 0x%x\n", __func__,
>> + bank, pin_num);
>> + *bank_num = bank;
>> + *bank_pin_num = pin_num;
>> + return 0;
>> + }
>> + pin_num -= max_pins;
>> + }
>> +
>> + return -EINVAL;
>> +}
>> +
>> +static int xilinx_gpio_set_value(struct udevice *dev, unsigned offset,
>> + int value)
>> +{
>> + struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
>> + int val, ret;
>> + u32 bank, pin;
>> +
>> + ret = xilinx_gpio_get_bank_pin(offset, &bank, &pin, dev);
>> + if (ret)
>> + return ret;
>> +
>> + debug("%s: regs: %lx, value: %x, gpio: %x, bank %x, pin %x\n",
>> + __func__, (ulong)platdata->regs, value, offset, bank, pin);
>> +
>> + if (value) {
>> + val = readl(&platdata->regs->gpiodata + bank * 2);
>> + val = val | (1 << pin);
>> + writel(val, &platdata->regs->gpiodata + bank * 2);
>> + } else {
>> + val = readl(&platdata->regs->gpiodata + bank * 2);
>> + val = val & ~(1 << pin);
>> + writel(val, &platdata->regs->gpiodata + bank * 2);
>> + }
>
> The old driver doesn't read the value from the register because this
> values represents the external status of the inputs and not the value of
> the outputs. This implementation doesn't works with a wired-OR.
> Additionally you could simplify the code.
ah ok. This needs to be fixed.
>
>> +
>> + return val;
>> +};
>> +
>> +static int xilinx_gpio_get_value(struct udevice *dev, unsigned offset)
>> +{
>> + struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
>> + int val, ret;
>> + u32 bank, pin;
>> +
>> + ret = xilinx_gpio_get_bank_pin(offset, &bank, &pin, dev);
>> + if (ret)
>> + return ret;
>> +
>> + debug("%s: regs: %lx, gpio: %x, bank %x, pin %x\n", __func__,
>> + (ulong)platdata->regs, offset, bank, pin);
>> +
>> + val = readl(&platdata->regs->gpiodata + bank * 2);
>> + val = !!(val & (1 << pin));
>> +
>> + return val;
>> +};
>> +
>> +static int xilinx_gpio_get_function(struct udevice *dev, unsigned
>> offset)
>> +{
>> + struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
>> + int val, ret;
>> + u32 bank, pin;
>> +
>> + /* Check if all pins are inputs */
>> + if (platdata->bank_input[bank])
>> + return GPIOF_INPUT;
>> +
>> + /* Check if all pins are outputs */
>> + if (platdata->bank_output[bank])
>> + return GPIOF_OUTPUT;
>> +
>> + ret = xilinx_gpio_get_
Re: [U-Boot] [PATCH 2/2] dm: Change CMD_DM enabling
On 20.7.2018 14:53, Tom Rini wrote: > On Fri, Jul 20, 2018 at 02:05:07PM +0200, Michal Simek wrote: > >> CMD_DM is used for debug purpose and it shouldn't be enabled by default >> via Kconfig. Unfortunately this is in the tree for quite a long time >> that's why solution is to use imply DM for all targets which are >> enabling DM. >> >> Signed-off-by: Michal Simek >> --- >> >> Based on this discussion: >> https://lists.denx.de/pipermail/u-boot/2018-July/334952.html >> >> Done by: >> for i in `git grep "select DM" | grep -v DM_ | cut -d ':' -f 1 | sort | >> uniq`; do >> sed -i 's/select DM$/select DM\n\timply CMD_DM/g' $i; >> done > > OK, I'm glad you did this, but now the (mostly) sorted lists are > un-sorted. Please update to keep them alphabetically sorted, thanks! How this should be sorted? sorted "select" list first followed by sorted "imply" list? Thanks, Michal ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Ethernet sandox driver issue
Hello there,
Sorry about this but I could use some assistance. I am trying to get the
ethernet to work under the sandbox and am having issues. I saw and applied the
patch from Joe Hershberger-2 that seemed to be relevant to my issue.
I have applied the patches on the following page to my latest master git
version w/ hash 4c6363b of u-boot:
http://u-boot.10912.n7.nabble.com/PATCH-0-5-sandbox-net-Fix-sandbox-eth-drivers-td00.html
Once complete, I compile using the python test harness with: ./test/py/test.py
--bd sandbox --build , then run the sandbox at the command line using
build-sandbox/u-boot. I see the following:
U-Boot 2018.07-00296-g474ecd2-dirty (Jul 23 2018 - 11:15:29 +0100)
DRAM: 128 MiB
MMC:
In:serial
Out: serial
Err: serial
SCSI:
Net: No ethernet found.
The "No ethernet found." is coming from function: int eth_initialize(void) on
line 400
printf("No ethernet found.\n");
in eth-uclass.c.
What is causing this and how do I get the sandbox to receive and send packets
to my local network adapter (the second one listed by ifconfig)?
Thanks,
Steven Stoner
Senior Embedded Engineer
e. mailto:ssto...@asl-control.co.uk
w. http://www.asl-control.co.uk
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Re: [U-Boot] [PATCH 2/2] dm: Change CMD_DM enabling
On Mon, Jul 23, 2018 at 08:40:51AM +0200, Michal Simek wrote: > On 20.7.2018 14:53, Tom Rini wrote: > > On Fri, Jul 20, 2018 at 02:05:07PM +0200, Michal Simek wrote: > > > >> CMD_DM is used for debug purpose and it shouldn't be enabled by default > >> via Kconfig. Unfortunately this is in the tree for quite a long time > >> that's why solution is to use imply DM for all targets which are > >> enabling DM. > >> > >> Signed-off-by: Michal Simek > >> --- > >> > >> Based on this discussion: > >> https://lists.denx.de/pipermail/u-boot/2018-July/334952.html > >> > >> Done by: > >> for i in `git grep "select DM" | grep -v DM_ | cut -d ':' -f 1 | sort | > >> uniq`; do > >>sed -i 's/select DM$/select DM\n\timply CMD_DM/g' $i; > >> done > > > > OK, I'm glad you did this, but now the (mostly) sorted lists are > > un-sorted. Please update to keep them alphabetically sorted, thanks! > > How this should be sorted? > sorted "select" list first followed by sorted "imply" list? Yes, that's approximately how I've been doing it. It won't be 100% sorted as some arches aren't, but it should be close. Thanks again! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] fs: ext4: Prevent erasing buffer past file size
Hi Marek,
On 23/07/2018 11:42, Marek Vasut wrote:
> The variable 'n' represents the number of bytes to be read from a certain
> offset in a file, to a certain offset in buffer 'buf'. The variable 'len'
> represents the length of the entire file, clamped correctly to avoid any
> overflows.
>
> Therefore, comparing 'n' and 'len' to determine whether clearing 'n'
> bytes of the buffer 'buf' at a certain offset would clear data past
> buffer 'buf' cannot lead to a correct result, since the 'n' does not
> contain the offset from the beginning of the file.
>
> This patch keeps track of the amount of data read and checks for the
> buffer overflow by comparing the 'n' to the remaining amount of data
> to be read instead.
> > Signed-off-by: Marek Vasut
> Cc: Ian Ray
> Cc: Martyn Welch
> Cc: Stefano Babic
> Cc: Tom Rini
> Fixes: ecdfb4195b20 ("ext4: recover from filesystem corruption when reading")
> ---
> fs/ext4/ext4fs.c | 8 +---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/fs/ext4/ext4fs.c b/fs/ext4/ext4fs.c
> index 2a28031d14..537aa05eff 100644
> --- a/fs/ext4/ext4fs.c
> +++ b/fs/ext4/ext4fs.c
> @@ -60,6 +60,7 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t pos,
> lbaint_t delayed_extent = 0;
> lbaint_t delayed_skipfirst = 0;
> lbaint_t delayed_next = 0;
> + lbaint_t read_total = 0;
> char *delayed_buf = NULL;
> short status;
>
> @@ -140,13 +141,14 @@ int ext4fs_read_file(struct ext2fs_node *node, loff_t
> pos,
> return -1;
> previous_block_number = -1;
> }
> - /* Zero no more than `len' bytes. */
> + /* Zero no more than 'filesize' bytes. */
> n = blocksize - skipfirst;
> - if (n > len)
> - n = len;
> + if (n > (len - read_total))
> + n = (len - read_total);
> memset(buf, 0, n);
> }
> buf += blocksize - skipfirst;
> + read_total += blocksize - skipfirst;
> }
> if (previous_block_number != -1) {
> /* spill */
>
Acked-by: Stefano Babic
Tested-by: Stefano Babic
Best regards,
Stefano Babic
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[U-Boot] [PATCH 2/6] dm: adc: uclass: get reference regulator once
device_get_supply_regulator() only needs to be called once.
But each time there's call to adc_vxx_value() for instance, it calls
adc_vxx_platdata_update() -> device_get_supply_regulator().
This also allows vdd_supply/vss_supply to be provided directly from
uc_pdata, e.g dt-binding variant like stm32-adc provide its own
'vref-supply'.
Signed-off-by: Fabrice Gasnier
---
drivers/adc/adc-uclass.c | 21 +
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/drivers/adc/adc-uclass.c b/drivers/adc/adc-uclass.c
index 17c1a4e..70f4cde 100644
--- a/drivers/adc/adc-uclass.c
+++ b/drivers/adc/adc-uclass.c
@@ -264,10 +264,13 @@ static int adc_vdd_platdata_update(struct udevice *dev)
* will bind before its supply regulator device, then the below 'get'
* will return an error.
*/
- ret = device_get_supply_regulator(dev, "vdd-supply",
- &uc_pdata->vdd_supply);
- if (ret)
- return ret;
+ if (!uc_pdata->vdd_supply) {
+ /* Only get vdd_supply once */
+ ret = device_get_supply_regulator(dev, "vdd-supply",
+ &uc_pdata->vdd_supply);
+ if (ret)
+ return ret;
+ }
ret = regulator_get_value(uc_pdata->vdd_supply);
if (ret < 0)
@@ -283,10 +286,12 @@ static int adc_vss_platdata_update(struct udevice *dev)
struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
int ret;
- ret = device_get_supply_regulator(dev, "vss-supply",
- &uc_pdata->vss_supply);
- if (ret)
- return ret;
+ if (!uc_pdata->vss_supply) {
+ ret = device_get_supply_regulator(dev, "vss-supply",
+ &uc_pdata->vss_supply);
+ if (ret)
+ return ret;
+ }
ret = regulator_get_value(uc_pdata->vss_supply);
if (ret < 0)
--
1.9.1
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[U-Boot] [PATCH 5/6] configs: stm32mp15: enable ADC
Enable ADC on stm32mp15. - CONFIG_CMD_ADC - CONFIG_STM32_ADC Signed-off-by: Fabrice Gasnier --- configs/stm32mp15_basic_defconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 3a94db5..bbb65b5 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_PROMPT="STM32MP> " # CONFIG_CMD_EXPORTENV is not set # CONFIG_CMD_IMPORTENV is not set CONFIG_CMD_MEMINFO=y +CONFIG_CMD_ADC=y CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -27,6 +28,7 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y CONFIG_CMD_EXT4_WRITE=y # CONFIG_SPL_DOS_PARTITION is not set +CONFIG_STM32_ADC=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_STM32F7=y CONFIG_DM_MMC=y @@ -35,7 +37,6 @@ CONFIG_STM32_SDMMC2=y CONFIG_DM_PMIC=y # CONFIG_SPL_PMIC_CHILDREN is not set CONFIG_PMIC_STPMU1=y -CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_DM_REGULATOR_STM32_VREFBUF=y CONFIG_DM_REGULATOR_STPMU1=y -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/6] clk: add clk_valid()
add clk_valid() to check for optional clocks are valid.
Signed-off-by: Fabrice Gasnier
---
include/clk.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/clk.h b/include/clk.h
index 9a35764..71679a9 100644
--- a/include/clk.h
+++ b/include/clk.h
@@ -294,4 +294,14 @@ int clk_disable_bulk(struct clk_bulk *bulk);
int soc_clk_dump(void);
+/**
+ * clk_valid() - check if clk is valid
+ *
+ * @clk: the clock to check
+ * @return TRUE if valid, or FALSE
+ */
+static inline bool clk_valid(struct clk *clk)
+{
+ return !!clk->dev;
+}
#endif
--
1.9.1
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[U-Boot] [PATCH 3/6] dt-bindings: Document STM32 ADC DT bindings
This patch adds documentation of device tree bindings for the STM32 ADC. It's based on linux-v4.18-rc* dt-bindings, at the time of writing: - Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt Signed-off-by: Fabrice Gasnier --- doc/device-tree-bindings/adc/st,stm32-adc.txt | 141 ++ 1 file changed, 141 insertions(+) create mode 100644 doc/device-tree-bindings/adc/st,stm32-adc.txt diff --git a/doc/device-tree-bindings/adc/st,stm32-adc.txt b/doc/device-tree-bindings/adc/st,stm32-adc.txt new file mode 100644 index 000..07fb6cd --- /dev/null +++ b/doc/device-tree-bindings/adc/st,stm32-adc.txt @@ -0,0 +1,141 @@ +STMicroelectronics STM32 ADC device + +STM32 ADC is a successive approximation analog-to-digital converter. +It has several multiplexed input channels. Conversions can be performed +in single, continuous, scan or discontinuous mode. Result of the ADC is +stored in a left-aligned or right-aligned 32-bit data register. +Conversions can be launched in software or using hardware triggers. + +The analog watchdog feature allows the application to detect if the input +voltage goes beyond the user-defined, higher or lower thresholds. + +Each STM32 ADC block can have up to 3 ADC instances. + +Each instance supports two contexts to manage conversions, each one has its +own configurable sequence and trigger: +- regular conversion can be done in sequence, running in background +- injected conversions have higher priority, and so have the ability to + interrupt regular conversion sequence (either triggered in SW or HW). + Regular sequence is resumed, in case it has been interrupted. + +Contents of a stm32 adc root node: +--- +Required properties: +- compatible: Should be one of: + "st,stm32f4-adc-core" + "st,stm32h7-adc-core" + "st,stm32mp1-adc-core" +- reg: Offset and length of the ADC block register set. +- interrupts: One or more interrupts for ADC block. Some parts like stm32f4 + and stm32h7 share a common ADC interrupt line. stm32mp1 has two separate + interrupt lines, one for each ADC within ADC block. +- clocks: Core can use up to two clocks, depending on part used: + - "adc" clock: for the analog circuitry, common to all ADCs. +It's required on stm32f4. +It's optional on stm32h7. + - "bus" clock: for registers access, common to all ADCs. +It's not present on stm32f4. +It's required on stm32h7. +- clock-names: Must be "adc" and/or "bus" depending on part used. +- interrupt-controller: Identifies the controller node as interrupt-parent +- vref-supply: Phandle to the vref input analog reference voltage. +- #interrupt-cells = <1>; +- #address-cells = <1>; +- #size-cells = <0>; + +Optional properties: +- A pinctrl state named "default" for each ADC channel may be defined to set + inX ADC pins in mode of operation for analog input on external pin. + +Contents of a stm32 adc child node: +--- +An ADC block node should contain at least one subnode, representing an +ADC instance available on the machine. + +Required properties: +- compatible: Should be one of: + "st,stm32f4-adc" + "st,stm32h7-adc" + "st,stm32mp1-adc" +- reg: Offset of ADC instance in ADC block (e.g. may be 0x0, 0x100, 0x200). +- clocks: Input clock private to this ADC instance. It's required only on + stm32f4, that has per instance clock input for registers access. +- interrupt-parent: Phandle to the parent interrupt controller. +- interrupts: IRQ Line for the ADC (e.g. may be 0 for adc@0, 1 for adc@100 or + 2 for adc@200). +- st,adc-channels: List of single-ended channels muxed for this ADC. + It can have up to 16 channels on stm32f4 or 20 channels on stm32h7, numbered + from 0 to 15 or 19 (resp. for in0..in15 or in0..in19). +- st,adc-diff-channels: List of differential channels muxed for this ADC. + Depending on part used, some channels can be configured as differential + instead of single-ended (e.g. stm32h7). List here positive and negative + inputs pairs as , ,... vinp and vinn are numbered + from 0 to 19 on stm32h7) + Note: At least one of "st,adc-channels" or "st,adc-diff-channels" is required. + Both properties can be used together. Some channels can be used as + single-ended and some other ones as differential (mixed). But channels + can't be configured both as single-ended and differential (invalid). +- #io-channel-cells = <1>: See the IIO bindings section "IIO consumers" in + Documentation/devicetree/bindings/iio/iio-bindings.txt + +Optional properties: +- dmas: Phandle to dma channel for this ADC instance. + See ../../dma/dma.txt for details. +- dma-names: Must be "rx" when dmas property is being used. +- assigned-resolution-bits: Resolution (bits) to use for conversions. Must + match device available resolutions: + * can be 6, 8, 10 or 12 on stm32f4 + * can be 8, 10, 12, 14 or 16 on stm32h7 + Default is maximum resolution if unset. +- st,min-sample-time-nsecs: Minimum sampling time in n
[U-Boot] [PATCH 6/6] ARM: dts: stm32mp157: Add ADC DT node
Add ADC device tree node. This allows to get analog conversions on
stm32mp157.
Signed-off-by: Fabrice Gasnier
---
arch/arm/dts/stm32mp157.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm/dts/stm32mp157.dtsi b/arch/arm/dts/stm32mp157.dtsi
index 2b89416..88b5460 100644
--- a/arch/arm/dts/stm32mp157.dtsi
+++ b/arch/arm/dts/stm32mp157.dtsi
@@ -86,6 +86,38 @@
status = "disabled";
};
+ adc: adc@48003000 {
+ compatible = "st,stm32mp1-adc-core";
+ reg = <0x48003000 0x400>;
+ interrupts = ,
+;
+ clocks = <&rcc_clk ADC12>, <&rcc_clk ADC12_K>;
+ clock-names = "bus", "adc";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ adc1: adc@0 {
+ compatible = "st,stm32mp1-adc";
+ #io-channel-cells = <1>;
+ reg = <0x0>;
+ interrupt-parent = <&adc>;
+ interrupts = <0>;
+ status = "disabled";
+ };
+
+ adc2: adc@100 {
+ compatible = "st,stm32mp1-adc";
+ #io-channel-cells = <1>;
+ reg = <0x100>;
+ interrupt-parent = <&adc>;
+ interrupts = <1>;
+ status = "disabled";
+ };
+ };
+
sdmmc3: sdmmc@48004000 {
compatible = "st,stm32-sdmmc2";
reg = <0x48004000 0x400>, <0x48005000 0x400>;
--
1.9.1
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[U-Boot] [PATCH 4/6] adc: Add driver for STM32 ADC
This patch adds support for STMicroelectronics STM32 ADC (analog to
digital converter). It's originally based on Linux kernel v4.18-rcs
drivers/iio/adc/stm32-adc*. It's composed of:
- core driver (UCLASS_SIMPLE_BUS) manages common resources (clk, regu).
- child drivers (UCLASS_ADC) declare each ADC, channels and handle
conversions.
This driver currently supports STM32H7 and STM32MP1 ADC.
Signed-off-by: Fabrice Gasnier
---
drivers/adc/Kconfig | 16 +++
drivers/adc/Makefile | 1 +
drivers/adc/stm32-adc-core.c | 209 +++
drivers/adc/stm32-adc-core.h | 51 +
drivers/adc/stm32-adc.c | 257 +++
5 files changed, 534 insertions(+)
create mode 100644 drivers/adc/stm32-adc-core.c
create mode 100644 drivers/adc/stm32-adc-core.h
create mode 100644 drivers/adc/stm32-adc.c
diff --git a/drivers/adc/Kconfig b/drivers/adc/Kconfig
index 93e27f1..e719c38 100644
--- a/drivers/adc/Kconfig
+++ b/drivers/adc/Kconfig
@@ -47,3 +47,19 @@ config SARADC_ROCKCHIP
- 2~6 analog input channels
- 1O or 12 bits resolution
- Up to 1MSPS of sample rate
+
+config STM32_ADC
+ bool "Enable STMicroelectronics STM32 ADC driver"
+ depends on ADC && (STM32H7 || ARCH_STM32MP)
+ help
+ This enables driver for STMicroelectronics STM32 analog-to-digital
+ converter (ADC).
+ A STM32 ADC block can be composed of several individual ADCs.
+ Each has its own private registers, but shares some resources:
+ - clock selection and prescaler
+ - voltage reference
+ - common registers area.
+ STM32 ADC driver is composed of:
+ - core driver to deal with common resources
+ - child driver to deal with individual ADC resources (declare ADC
+ device and associated channels, start/stop conversions)
diff --git a/drivers/adc/Makefile b/drivers/adc/Makefile
index 95c93d4..cca0fec 100644
--- a/drivers/adc/Makefile
+++ b/drivers/adc/Makefile
@@ -10,3 +10,4 @@ obj-$(CONFIG_ADC_EXYNOS) += exynos-adc.o
obj-$(CONFIG_ADC_SANDBOX) += sandbox.o
obj-$(CONFIG_SARADC_ROCKCHIP) += rockchip-saradc.o
obj-$(CONFIG_SARADC_MESON) += meson-saradc.o
+obj-$(CONFIG_STM32_ADC) += stm32-adc.o stm32-adc-core.o
diff --git a/drivers/adc/stm32-adc-core.c b/drivers/adc/stm32-adc-core.c
new file mode 100644
index 000..a9aa143
--- /dev/null
+++ b/drivers/adc/stm32-adc-core.c
@@ -0,0 +1,209 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ * Author: Fabrice Gasnier
+ *
+ * Originally based on the Linux kernel v4.18 drivers/iio/adc/stm32-adc-core.c.
+ */
+
+#include
+#include
+#include
+#include "stm32-adc-core.h"
+
+/* STM32H7 - common registers for all ADC instances */
+#define STM32H7_ADC_CCR(STM32_ADCX_COMN_OFFSET + 0x08)
+
+/* STM32H7_ADC_CCR - bit fields */
+#define STM32H7_PRESC_SHIFT18
+#define STM32H7_PRESC_MASK GENMASK(21, 18)
+#define STM32H7_CKMODE_SHIFT 16
+#define STM32H7_CKMODE_MASKGENMASK(17, 16)
+
+/* STM32 H7 maximum analog clock rate (from datasheet) */
+#define STM32H7_ADC_MAX_CLK_RATE 3600
+
+/**
+ * struct stm32h7_adc_ck_spec - specification for stm32h7 adc clock
+ * @ckmode: ADC clock mode, Async or sync with prescaler.
+ * @presc: prescaler bitfield for async clock mode
+ * @div: prescaler division ratio
+ */
+struct stm32h7_adc_ck_spec {
+ u32 ckmode;
+ u32 presc;
+ int div;
+};
+
+static const struct stm32h7_adc_ck_spec stm32h7_adc_ckmodes_spec[] = {
+ /* 00: CK_ADC[1..3]: Asynchronous clock modes */
+ { 0, 0, 1 },
+ { 0, 1, 2 },
+ { 0, 2, 4 },
+ { 0, 3, 6 },
+ { 0, 4, 8 },
+ { 0, 5, 10 },
+ { 0, 6, 12 },
+ { 0, 7, 16 },
+ { 0, 8, 32 },
+ { 0, 9, 64 },
+ { 0, 10, 128 },
+ { 0, 11, 256 },
+ /* HCLK used: Synchronous clock modes (1, 2 or 4 prescaler) */
+ { 1, 0, 1 },
+ { 2, 0, 2 },
+ { 3, 0, 4 },
+};
+
+static int stm32h7_adc_clk_sel(struct udevice *dev,
+ struct stm32_adc_common *common)
+{
+ u32 ckmode, presc;
+ unsigned long rate;
+ int i, div;
+
+ /* stm32h7 bus clock is common for all ADC instances (mandatory) */
+ if (!clk_valid(&common->bclk)) {
+ dev_err(dev, "No bclk clock found\n");
+ return -ENOENT;
+ }
+
+ /*
+* stm32h7 can use either 'bus' or 'adc' clock for analog circuitry.
+* So, choice is to have bus clock mandatory and adc clock optional.
+* If optional 'adc' clock has been found, then try to use it first.
+*/
+ if (clk_valid(&common->aclk)) {
+ /*
+* Asynchronous clock modes (e.g. ckmode == 0)
+* From spec: PLL output musn't exceed max rate
+*/
+
Re: [U-Boot] [PATCH] ddr: altera: Add ECC DRAM scrubbing support for Stratix 10
On 07/23/2018 10:20 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> The SDRAM must first be rewritten by zeroes if ECC is used to initialize
> the ECC metadata. Make the CPU overwrite the DRAM with zeroes in such a
> case. This scrubbing implementation turns the caches on temporarily, then
> overwrites the whole RAM with zeroes, flushes the caches and turns them
> off again. This provides satisfactory performance.
>
> Signed-off-by: Tien Fong Chee
> ---
> drivers/ddr/altera/sdram_s10.c | 44
>
> 1 files changed, 44 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/ddr/altera/sdram_s10.c b/drivers/ddr/altera/sdram_s10.c
> index 48f4f47..cce261f 100644
> --- a/drivers/ddr/altera/sdram_s10.c
> +++ b/drivers/ddr/altera/sdram_s10.c
> @@ -8,6 +8,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -134,6 +135,47 @@ static int poll_hmc_clock_status(void)
>SYSMGR_HMC_CLK_STATUS_MSK, true, 1000, false);
> }
>
> +/* Initialize SDRAM ECC bits to avoid false DBE */
> +static void sdram_init_ecc_bits(unsigned long long size)
> +{
> + /* 1GB per chunk */
> + unsigned long long size_byte = SZ_1G;
> + unsigned long long remaining_size;
> + unsigned long long dst_addr = 0x8000;
> + unsigned int start = get_timer(0);
> +
> + icache_enable();
> +
> + memset(0, 0, dst_addr);
> + gd->arch.tlb_addr = 0x4000;
> + gd->arch.tlb_size = PGTABLE_SIZE;
Are you sure this is valid on arm64 ? It looks like something copies
from arria10.
> + dcache_enable();
> +
> + remaining_size = size - dst_addr;
> + printf("DDRCAL: Scrubbing ECC RAM (%d MiB).\n", (u32)(size >> 20));
> +
> + while (remaining_size) {
> + if (remaining_size <= size_byte) {
> + memset((void *)dst_addr, 0, remaining_size);
> + break;
> + } else {
> + memset((void *)dst_addr, 0, size_byte);
> + dst_addr += size_byte;
> + }
> +
> + WATCHDOG_RESET();
> + remaining_size -= size_byte;
> + }
How long does this take ?
> + flush_dcache_all();
> + printf("DDRCAL: Scrubbing ECC RAM done.\n");
> + dcache_disable();
> +
> + printf("SDRAM-ECC: Initialized success with %d ms\n",
> + (unsigned)get_timer(start));
> +}
> +
> /**
> * sdram_mmr_init_full() - Function to initialize SDRAM MMR
> *
> @@ -351,6 +393,8 @@ int sdram_mmr_init_full(unsigned int unused)
> setbits_le32(SOCFPGA_SDR_ADDRESS + ECCCTRL2,
>(DDR_HMC_ECCCTL2_RMW_EN_SET_MSK |
> DDR_HMC_ECCCTL2_AWB_EN_SET_MSK));
> +
> + sdram_init_ecc_bits(gd->ram_size);
> } else {
> clrbits_le32(SOCFPGA_SDR_ADDRESS + ECCCTRL1,
>(DDR_HMC_ECCCTL_AWB_CNT_RST_SET_MSK |
>
--
Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] imx8qxp_mek: add README
Hi Peng, On Mon, Jul 23, 2018 at 7:00 AM, Peng Fan wrote: > Add README file for i.MX8QXP MEK board. Thanks for submitting the README file. > > Signed-off-by: Peng Fan > Cc: Stefano Babic > Cc: Fabio Estevam > Cc: Anatolij Gustschin > --- > > This patch is for testing i.MX8QXP patchset [PATCH V2 00/32] i.MX: Add > i.MX8QXP support > https://lists.denx.de/pipermail/u-boot/2018-July/335079.html > The board is using B0 chip, A0 chip is not being supported. > Please help test if you are interested. I'll post out V3 after collecting > more comments. > Sadly, I do not know where to download scfw_tcm.bin in public for B0 QXP. Could you please check how to make this binary available to the users? Users need to have access to the firmware, otherwise it is a blocking issue for upstreaming mx8qxp support. Thanks ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 1/5] common: Log should depends on DM not be selected by DM
Better use depends on instead of select. Signed-off-by: Michal Simek Reviewed-by: Tom Rini --- Changes in v2: None I found this in connection to setup imply CMD_DM and it seems to not standard that it is selecting DM which is not used anywhere else. --- common/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/Kconfig b/common/Kconfig index 81e88ea77c17..eae5d80cc71b 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -428,7 +428,7 @@ menu "Logging" config LOG bool "Enable logging support" - select DM + depends on DM help This enables support for logging of status and debug messages. These can be displayed on the console, recorded in a memory buffer, or -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 2/5] Kconfig: Replace spaces with tabs and missing newline
Trivial Kconfig cleanup. Use tabs instead of spaces and every Kconfig entry should be separated by newline. Signed-off-by: Michal Simek --- Changes in v2: - new patch - not to confuse script arch/arm/Kconfig | 10 +- arch/arm/mach-imx/mx6/Kconfig | 14 +++--- cmd/Kconfig | 5 +++-- 3 files changed, 15 insertions(+), 14 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 376851ef7aa9..ce619641b753 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -169,7 +169,7 @@ config ARM_ERRATA_833471 bool config ARM_ERRATA_845369 - bool + bool config ARM_ERRATA_852421 bool @@ -683,7 +683,7 @@ config ARCH_MX31 select CPU_ARM1136 config ARCH_MX7ULP -bool "NXP MX7ULP" + bool "NXP MX7ULP" select CPU_V7A select ROM_UNIFIED_SECTIONS imply MXC_GPIO @@ -709,7 +709,7 @@ config ARCH_MX6 if ARCH_MX6 config SPL_LDSCRIPT -default "arch/arm/mach-omap2/u-boot-spl.lds" + default "arch/arm/mach-omap2/u-boot-spl.lds" endif config ARCH_MX5 @@ -1486,8 +1486,8 @@ source "arch/arm/Kconfig.debug" endmenu config SPL_LDSCRIPT -default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK -default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136 + default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK + default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64 diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index 521fad74b5a2..b7b77cc51b97 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -293,11 +293,11 @@ config TARGET_MX6SLEVK select SUPPORT_SPL config TARGET_MX6SLLEVK -bool "mx6sll evk" + bool "mx6sll evk" select BOARD_LATE_INIT -select MX6SLL -select DM -select DM_THERMAL + select MX6SLL + select DM + select DM_THERMAL config TARGET_MX6SXSABRESD bool "mx6sxsabresd" @@ -309,11 +309,11 @@ config TARGET_MX6SXSABRESD select BOARD_EARLY_INIT_F config TARGET_MX6SXSABREAUTO -bool "mx6sxsabreauto" + bool "mx6sxsabreauto" select BOARD_LATE_INIT select MX6SX -select DM -select DM_THERMAL + select DM + select DM_THERMAL select BOARD_EARLY_INIT_F config TARGET_MX6UL_9X9_EVK diff --git a/cmd/Kconfig b/cmd/Kconfig index 2fa0829925c1..b359ac7118b0 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -1012,11 +1012,12 @@ config CMD_USB_SDP help Enables the command "sdp" which is used to have U-Boot emulating the Serial Download Protocol (SDP) via USB. + config CMD_ROCKUSB bool "rockusb" depends on USB_FUNCTION_ROCKUSB help - Rockusb protocol is widely used by Rockchip SoC based devices. It can + Rockusb protocol is widely used by Rockchip SoC based devices. It can read/write info, image to/from devices. This enable rockusb command support to communication with rockusb device. for more detail about this command, please read doc/README.rockusb. @@ -1489,7 +1490,7 @@ config CMD_BLOB the original data. Sub-commands: -blob enc - encapsulating data as a cryptgraphic blob + blob enc - encapsulating data as a cryptgraphic blob blob dec - decapsulating cryptgraphic blob to get the data Syntax: -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 3/5] Kconfig: Sort bool, default, select and imply options
Fix Kconfig bool, default, select and imply options to be alphabetically sorted. Signed-off-by: Michal Simek --- Changes in v2: - new patch I have sorted only Kconfig which I need for the next patch. --- arch/Kconfig | 54 +- arch/arm/Kconfig | 206 ++--- arch/arm/mach-at91/Kconfig | 60 +-- arch/arm/mach-imx/mx5/Kconfig | 12 +-- arch/arm/mach-imx/mx6/Kconfig | 158 ++-- arch/arm/mach-imx/mx7/Kconfig | 18 ++-- arch/arm/mach-omap2/am33xx/Kconfig | 46 - arch/arm/mach-omap2/omap3/Kconfig | 20 ++-- arch/arm/mach-rmobile/Kconfig.32 | 14 +-- arch/arm/mach-tegra/Kconfig| 8 +- arch/microblaze/Kconfig| 4 +- arch/mips/Kconfig | 50 - arch/powerpc/cpu/mpc83xx/Kconfig | 6 +- cmd/Kconfig| 14 +-- 14 files changed, 335 insertions(+), 335 deletions(-) diff --git a/arch/Kconfig b/arch/Kconfig index cbeb9f67348f..7967fa50ac22 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -10,12 +10,12 @@ choice config ARC bool "ARC architecture" - select HAVE_PRIVATE_LIBGCC - select SUPPORT_OF_CONTROL select ARCH_EARLY_INIT_R + select ARC_TIMER select CLK + select HAVE_PRIVATE_LIBGCC + select SUPPORT_OF_CONTROL select TIMER - select ARC_TIMER config ARM bool "ARM architecture" @@ -46,10 +46,10 @@ config NDS32 config NIOS2 bool "Nios II architecture" - select SUPPORT_OF_CONTROL - select OF_CONTROL - select DM select CPU + select DM + select OF_CONTROL + select SUPPORT_OF_CONTROL config PPC bool "PowerPC architecture" @@ -65,30 +65,30 @@ config RISCV config SANDBOX bool "Sandbox" select BOARD_LATE_INIT - select SUPPORT_OF_CONTROL select DM + select DM_GPIO + select DM_I2C select DM_KEYBOARD - select DM_SPI_FLASH + select DM_MMC select DM_SERIAL - select DM_I2C select DM_SPI - select DM_GPIO - select DM_MMC + select DM_SPI_FLASH select HAVE_BLOCK_DEVICE - select SPI select LZO + select SPI + select SUPPORT_OF_CONTROL imply CMD_GETTIME imply CMD_HASH imply CMD_IO imply CMD_IOTRACE imply CMD_LZMADEC + imply CMD_SATA + imply CMD_SF_TEST imply CRC32_VERIFY imply FAT_WRITE imply HASH_VERIFY imply LZMA imply SCSI - imply CMD_SATA - imply CMD_SF_TEST config SH bool "SuperH architecture" @@ -97,39 +97,39 @@ config SH config X86 bool "x86 architecture" select CREATE_ARCH_SYMLINK - select HAVE_PRIVATE_LIBGCC - select USE_PRIVATE_LIBGCC - select SUPPORT_OF_CONTROL - select OF_CONTROL select DM select DM_PCI + select HAVE_PRIVATE_LIBGCC + select OF_CONTROL select PCI + select SUPPORT_OF_CONTROL select TIMER + select USE_PRIVATE_LIBGCC select X86_TSC_TIMER imply BLK + imply CMD_FPGA_LOADMK + imply CMD_GETTIME + imply CMD_IO + imply CMD_IRQ + imply CMD_PCI + imply CMD_SF_TEST + imply CMD_ZBOOT imply DM_ETH imply DM_GPIO imply DM_KEYBOARD imply DM_MMC imply DM_RTC - imply DM_SERIAL imply DM_SCSI + imply DM_SERIAL imply DM_SPI imply DM_SPI_FLASH imply DM_USB imply DM_VIDEO imply SYSRESET imply SYSRESET_X86 - imply CMD_FPGA_LOADMK - imply CMD_GETTIME - imply CMD_IO - imply CMD_IRQ - imply CMD_PCI - imply CMD_SF_TEST - imply CMD_ZBOOT - imply USB_HOST_ETHER imply USB_ETHER_ASIX imply USB_ETHER_SMSC95XX + imply USB_HOST_ETHER config XTENSA bool "Xtensa architecture" diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ce619641b753..0c43c58ef0ed 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -219,25 +219,25 @@ config CPU_ARM1176 config CPU_V7A bool - select HAS_VBAR select HAS_THUMB2 + select HAS_VBAR select SYS_CACHE_SHIFT_6 imply SYS_ARM_MMU config CPU_V7M bool select HAS_THUMB2 - select THUMB2_KERNEL - select SYS_CACHE_SHIFT_5 select SYS_ARM_MPU + select SYS_CACHE_SHIFT_5 select SYS_THUMB_BUILD + select THUMB2_KERNEL config CPU_V7R bool select HAS_THUMB2 - select SYS_CACHE_SHIFT_6 - select SYS_ARM_MPU select SYS_ARM_CACHE_CP15 + select SYS_ARM_MPU + select SYS_CACHE_SHIFT_6 config CPU_PXA bool @@ -427,19 +427,19 @@ config ARCH_DAVINCI config KIRKWOOD bool "Marvell Kirkwood" - select CPU_ARM926
[U-Boot] [PATCH v2 5/5] Kconfig: Sort bool, default, select and imply options
Another round of sorting Kconfig entries aplhabetically. Signed-off-by: Michal Simek --- Changes in v2: None Kconfig | 22 ++--- arch/arc/Kconfig | 10 +- arch/arm/cpu/armv7/ls102xa/Kconfig| 10 +- arch/arm/cpu/armv8/Kconfig| 4 ++-- arch/arm/mach-davinci/Kconfig | 4 ++-- arch/arm/mach-exynos/Kconfig | 30 ++--- arch/arm/mach-imx/mx3/Kconfig | 2 +- arch/arm/mach-mvebu/Kconfig | 6 +++--- arch/arm/mach-omap2/Kconfig | 6 +++--- arch/arm/mach-omap2/omap5/Kconfig | 12 ++-- arch/arm/mach-qemu/Kconfig| 2 +- arch/arm/mach-rockchip/rk3288/Kconfig | 20 +-- arch/arm/mach-socfpga/Kconfig | 4 ++-- arch/arm/mach-stm32/Kconfig | 20 +-- arch/arm/mach-tegra/tegra124/Kconfig | 4 ++-- arch/arm/mach-uniphier/Kconfig| 8 arch/mips/mach-ath79/Kconfig | 10 +- arch/mips/mach-bmips/Kconfig | 36 +-- arch/mips/mach-pic32/Kconfig | 6 +++--- arch/powerpc/Kconfig | 2 +- 20 files changed, 109 insertions(+), 109 deletions(-) diff --git a/Kconfig b/Kconfig index c8b86cd3843d..62235cae96cf 100644 --- a/Kconfig +++ b/Kconfig @@ -68,25 +68,25 @@ config CC_COVERAGE config DISTRO_DEFAULTS bool "Select defaults suitable for booting general purpose Linux distributions" - imply USE_BOOTCOMMAND - select CMD_BOOTZ if ARM && !ARM64 + select AUTO_COMPLETE + select CMDLINE_EDITING select CMD_BOOTI if ARM64 + select CMD_BOOTZ if ARM && !ARM64 select CMD_DHCP if CMD_NET - select CMD_PING if CMD_NET - select CMD_PXE if NET select CMD_ENV_EXISTS select CMD_EXT2 select CMD_EXT4 select CMD_FAT select CMD_FS_GENERIC - imply CMD_MII if NET select CMD_PART if PARTITIONS + select CMD_PING if CMD_NET + select CMD_PXE if NET + select ENV_VARS_UBOOT_CONFIG select HUSH_PARSER - select CMDLINE_EDITING - select AUTO_COMPLETE - select SYS_LONGHELP select SUPPORT_RAW_INITRD - select ENV_VARS_UBOOT_CONFIG + select SYS_LONGHELP + imply CMD_MII if NET + imply USE_BOOTCOMMAND help Select this to enable various options and commands which are suitable for building u-boot for booting general purpose Linux distributions. @@ -237,8 +237,8 @@ if FIT config FIT_ENABLE_SHA256_SUPPORT bool "Support SHA256 checksum of FIT image contents" - select SHA256 default y + select SHA256 help Enable this to support SHA256 checksum of FIT image contents. A SHA256 checksum is a 256-bit (32-byte) hash value used to check that @@ -252,8 +252,8 @@ config FIT_ENABLE_SHA256_SUPPORT config FIT_SIGNATURE bool "Enable signature verification of FIT uImages" depends on DM - select RSA select HASH + select RSA help This option enables signature verification of FIT uImages, using a hash signed and verified using RSA. If diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 6f139d5bdc52..d59aa3ae291e 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -31,36 +31,36 @@ choice config CPU_ARC750D bool "ARC 750D" - select ARC_MMU_V2 depends on ISA_ARCOMPACT + select ARC_MMU_V2 help Choose this option to build an U-Boot for ARC750D CPU. config CPU_ARC770D bool "ARC 770D" - select ARC_MMU_V3 depends on ISA_ARCOMPACT + select ARC_MMU_V3 help Choose this option to build an U-Boot for ARC770D CPU. config CPU_ARCEM6 bool "ARC EM6" - select ARC_MMU_ABSENT depends on ISA_ARCV2 + select ARC_MMU_ABSENT help Next Generation ARC Core based on ISA-v2 ISA without MMU. config CPU_ARCHS36 bool "ARC HS36" - select ARC_MMU_ABSENT depends on ISA_ARCV2 + select ARC_MMU_ABSENT help Next Generation ARC Core based on ISA-v2 ISA without MMU. config CPU_ARCHS38 bool "ARC HS38" - select ARC_MMU_V4 depends on ISA_ARCV2 + select ARC_MMU_V4 help Next Generation ARC Core based on ISA-v2 ISA with MMU. diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig index 635358e32838..5d6a711c140c 100644 --- a/arch/arm/cpu/armv7/ls102xa/Kconfig +++ b/arch/arm/cpu/armv7/ls102xa/Kconfig @@ -1,5 +1,7 @@ config ARCH_LS1021A bool + select SYS_FSL_DDR_BE if SYS_FSL_DDR + select SYS_FSL_DDR_VER_50 if SYS_FSL_DDR select SYS_FSL_ERRATUM_A008378 select SYS_FSL_ERRATUM_A008407 select SYS_FSL_ERRATUM_A008997 @@ -10,18 +12,16 @@
[U-Boot] [PATCH v2 4/5] dm: Change CMD_DM enabling
CMD_DM is used for debug purpose and it shouldn't be enabled by default via Kconfig. Unfortunately this is in the tree for quite a long time that's why solution is to use imply DM for all targets which are enabling DM. Signed-off-by: Michal Simek --- Changes in v2: - sort them Based on this discussion: https://lists.denx.de/pipermail/u-boot/2018-July/334952.html Done by: for i in `git grep "select DM" | grep -v DM_ | cut -d ':' -f 1 | sort | uniq`; do sed -i 's/select DM$/select DM\n\timply CMD_DM/g' $i; done And sort: And checked by for i in `ls configs/*`; do NAME=`basename $i`; echo $NAME; make $NAME; make savedefconfig; cp defconfig $i; done --- arch/Kconfig | 3 +++ arch/arm/Kconfig | 25 + arch/arm/mach-at91/Kconfig | 6 ++ arch/arm/mach-imx/mx5/Kconfig | 2 ++ arch/arm/mach-imx/mx6/Kconfig | 25 + arch/arm/mach-imx/mx7/Kconfig | 5 + arch/arm/mach-meson/Kconfig| 2 ++ arch/arm/mach-omap2/am33xx/Kconfig | 18 ++ arch/arm/mach-omap2/omap3/Kconfig | 10 ++ arch/arm/mach-rmobile/Kconfig.32 | 8 arch/arm/mach-tegra/Kconfig| 1 + arch/microblaze/Kconfig| 1 + arch/mips/Kconfig | 6 ++ arch/powerpc/cpu/mpc83xx/Kconfig | 1 + cmd/Kconfig| 1 - 15 files changed, 113 insertions(+), 1 deletion(-) diff --git a/arch/Kconfig b/arch/Kconfig index 7967fa50ac22..bf1b4a9afac6 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -50,6 +50,7 @@ config NIOS2 select DM select OF_CONTROL select SUPPORT_OF_CONTROL + imply CMD_DM config PPC bool "PowerPC architecture" @@ -77,6 +78,7 @@ config SANDBOX select LZO select SPI select SUPPORT_OF_CONTROL + imply CMD_DM imply CMD_GETTIME imply CMD_HASH imply CMD_IO @@ -107,6 +109,7 @@ config X86 select USE_PRIVATE_LIBGCC select X86_TSC_TIMER imply BLK + imply CMD_DM imply CMD_FPGA_LOADMK imply CMD_GETTIME imply CMD_IO diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 0c43c58ef0ed..6eaaa1f14826 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -441,6 +441,7 @@ config ARCH_MVEBU select OF_CONTROL select OF_SEPARATE select SPI + imply CMD_DM config TARGET_DEVKIT3250 bool "Support devkit3250" @@ -499,6 +500,7 @@ config TARGET_STV0991 select PL01X_SERIAL select SPI select SPI_FLASH + imply CMD_DM config TARGET_X600 bool "Support x600" @@ -533,6 +535,7 @@ config ARCH_BCM283X select OF_CONTROL select PL01X_SERIAL select SERIAL_SEARCH_ALL + imply CMD_DM imply FAT_WRITE config TARGET_VEXPRESS_CA15_TC2 @@ -548,6 +551,7 @@ config ARCH_BCMSTB select DM select OF_CONTROL select OF_PRIOR_STAGE + imply CMD_DM help This enables support for Broadcom ARM-based set-top box chipsets, including the 7445 family of chips. @@ -607,6 +611,7 @@ config ARCH_EXYNOS select DM_SPI select DM_SPI_FLASH select SPI + imply CMD_DM imply FAT_WRITE config ARCH_S5PC1XX @@ -616,6 +621,7 @@ config ARCH_S5PC1XX select DM_GPIO select DM_I2C select DM_SERIAL + imply CMD_DM config ARCH_HIGHBANK bool "Calxeda Highbank" @@ -627,6 +633,7 @@ config ARCH_INTEGRATOR select DM select DM_SERIAL select PL01X_SERIAL + imply CMD_DM config ARCH_KEYSTONE bool "TI Keystone" @@ -660,6 +667,7 @@ config ARCH_MX8M select ARM64 select DM select SUPPORT_SPL + imply CMD_DM config ARCH_MX23 bool "NXP i.MX23 family" @@ -724,6 +732,7 @@ config ARCH_OWL select DM select DM_SERIAL select OF_CONTROL + imply CMD_DM config ARCH_QEMU bool "QEMU Virtual Platform" @@ -731,12 +740,14 @@ config ARCH_QEMU select DM_SERIAL select OF_CONTROL select PL01X_SERIAL + imply CMD_DM config ARCH_RMOBILE bool "Renesas ARM SoCs" select BOARD_EARLY_INIT_F select DM select DM_SERIAL + imply CMD_DM imply FAT_WRITE imply SYS_THUMB_BUILD @@ -756,6 +767,7 @@ config ARCH_SNAPDRAGON select OF_SEPARATE select SMEM select SPMI + imply CMD_DM config ARCH_SOCFPGA bool "Altera SOCFPGA family" @@ -784,6 +796,7 @@ config ARCH_SOCFPGA select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE select SYS_NS16550 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 + imply CMD_DM imply CMD_MTDPARTS imply CRC32_VERIFY imply DM_SPI @@ -816,6 +829,7 @@ config ARCH_SUNXI selec
Re: [U-Boot] [PATCH] spl: fpga: Implement fpga bistream loading with fpga_load
On 19.7.2018 10:35, Marek Vasut wrote: > On 07/19/2018 08:44 AM, Michal Simek wrote: >> On 19.7.2018 08:36, Luis Araneda wrote: >>> Hi, >>> >>> On Thu, Jul 19, 2018 at 1:58 AM Michal Simek >>> wrote: On 18.7.2018 22:11, Marek Vasut wrote: > On 07/18/2018 04:57 PM, Michal Simek wrote: >> On 18.7.2018 16:24, Marek Vasut wrote: >>> On 07/18/2018 04:18 PM, Michal Simek wrote: On 18.7.2018 16:15, Marek Vasut wrote: > On 07/18/2018 04:00 PM, Michal Simek wrote: >> On 18.7.2018 14:54, Marek Vasut wrote: >>> This breaks Arria10, sorry. The private loading function is needed >>> on >>> Arria10 as the whole bitstream is not available in RAM and needs to >>> be >>> loaded piece by piece, see [1] >>> >>> [1] >>> http://git.denx.de/?p=u-boot/u-boot-socfpga.git;a=blobdiff;f=arch/arm/mach-socfpga/spl.c;h=82adb5dfb8de62e3d928f6f4405705f3f32a780c;hp=7ee988a2d59831ec6bff927b2a5fdad7f57da055;hb=21f835ebf2b40fc8a3e8b818c5c5ba2555dd7c65;hpb=bd198801cb95b5a8460c95a762cc4a9a44ca85ef >>> >>> [...] >> The second solution is to check if load address is not 0 and call >> fpga_load only for that. In this case there is a need to check size >> for SPL. > > 0 is a valid load address, so no. Then new Kconfig option is another way to go now. >>> >>> No, the firmware loader is a way to go. Sadly, it's still work in >>> progress. >> >> I have looked at that series and it will take some time to get it done >> but even that series has no user and also only support filesystems. >> Which is fine but not enough and support for RAW mode is necessary too. > > It already took like a year and half I think ... well, better invest > your resources in perfecting it for your usecase, for that's the way to > go. I don't think so because for SPL boot we need support for a RAW mode. > >> Anyway Luis sent series where this SPL fpga supported is requested to >> add and I had this functionality in more raw state in Xilinx tree for >> quite a long time and it is time to support it because on Zybo (because >> of i2c eeprom) and also cc108 (because of uart routing via PL) fpga load >> needs to be done in SPL and we need that support. > > Ha > >> I have not a problem to keep your code in SPL but I need a way to enable >> fpga load directly with all that features like hashes which are already >> available. GZIP can be added pretty easily too. >> That's why please suggest a way what you are comfortable with not to >> block functionality on these devices. > > Look at the A10 nand branch, it uses full fit with all the bells and > whistles. Maybe that's the way to go if you have DRAM available. Enabling full fit should be possible but there is really no need to enable more and more features for load something to fpga. SPL still needs to fit to small space. >>> >>> I tested Michal's patch by replacing the fourth patch of my series [1] >>> with his patch, and it worked fine on a Zybo Z7-20. I think that for >>> devices with DRAM available is the way to go, but as Marek said, it >>> will brake Arria10. >> >> It doesn't break anything in mainline because there is no support for >> Arria10. > > You might want to git grep a bit ? I meant arria10 spl fpga support not soc itself. > >> His patch for this interface shouldn't reach mainline like it >> is normal style in Linux. No user, no interface. Also if there is >> interface already but no user then interfaces are removed like happened >> with SG_DMA. > > Uhh, that's some strong wording right there. We have many other __weak > functions in U-Boot which are probably never implemented either. Why > don't you clean those up too instead of focusing on one which enables > competing platform to work and is protected by Kconfig option, so it > doesn't change anything for the other platforms ? I think all of them should be removed. >>> I'd like to see the functionality merged, but waiting to firmware >>> loader might delay it. So I propose the following: >>> - Keep the spl_load_fpga_image() function for devices >>> like the Arria10. >>> - Apply the first three patches of my series [1], >>> as they fix FPGA (Zynq) support on SPL. >> >> They are fine please send me as regular patches and I will take them. >> >>> - Apply a modified version of Michal's patch, adding >>> a temporary Kconfig option, like he suggested, >>> to choose between the two implementations: >>> fpga_load() for devices with DRAM available, and >>> spl_load_fpga_image() for devices like the Arria10. >>> - Once firmware loader is ready, convert the code to >>> use it and unify the functions if possible. >> >> Let's continue to talk with Marek on this. If there he is not open to >> better solution we need to create new Kconfig
[U-Boot] [PATCH] fpga: Kconfig: Replace spaces with tabs
Trivial Kconfig cleanup. Use tabs instead of spaces. Signed-off-by: Michal Simek --- drivers/fpga/Kconfig | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig index d36c4c5e2804..50e901973d13 100644 --- a/drivers/fpga/Kconfig +++ b/drivers/fpga/Kconfig @@ -46,15 +46,15 @@ config FPGA_ZYNQMPPL on Xilinx Zynq UltraScale+ (ZynqMP) device. config FPGA_SPARTAN3 - bool "Enable Spartan3 FPGA driver" - help - Enable Spartan3 FPGA driver for loading in BIT format. + bool "Enable Spartan3 FPGA driver" + help + Enable Spartan3 FPGA driver for loading in BIT format. config FPGA_ZYNQPL - bool "Enable Xilinx FPGA for Zynq" - depends on ARCH_ZYNQ - help - Enable FPGA driver for loading bitstream in BIT and BIN format - on Xilinx Zynq devices. + bool "Enable Xilinx FPGA for Zynq" + depends on ARCH_ZYNQ + help + Enable FPGA driver for loading bitstream in BIT and BIN format + on Xilinx Zynq devices. endmenu -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] fs: ext4: Prevent erasing buffer past file size
On Mon, Jul 23, 2018 at 11:42:12AM +0200, Marek Vasut wrote:
> The variable 'n' represents the number of bytes to be read from a certain
> offset in a file, to a certain offset in buffer 'buf'. The variable 'len'
> represents the length of the entire file, clamped correctly to avoid any
> overflows.
>
> Therefore, comparing 'n' and 'len' to determine whether clearing 'n'
> bytes of the buffer 'buf' at a certain offset would clear data past
> buffer 'buf' cannot lead to a correct result, since the 'n' does not
> contain the offset from the beginning of the file.
>
> This patch keeps track of the amount of data read and checks for the
> buffer overflow by comparing the 'n' to the remaining amount of data
> to be read instead.
>
> Signed-off-by: Marek Vasut
> Cc: Ian Ray
> Cc: Martyn Welch
> Cc: Stefano Babic
> Cc: Tom Rini
> Fixes: ecdfb4195b20 ("ext4: recover from filesystem corruption when reading")
Good catch. Can this problem also be recreated/tested with
test/fs/fs-test.sh? Thanks!
--
Tom
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Re: [U-Boot] [PATCH 00/17] fs: fat: extend FAT write operations
On Sun, Jul 22, 2018 at 08:44:39AM +0200, Heinrich Schuchardt wrote: > Hello Tom, hello Alex, > > I have been testing the patches. They are working fine for ASCII file > names. To support Unicode file names extra work will be needed. But > probably we should postpone this to a later patch series. > > There are some dependencies with my work for correcting errors in > Unicode handling for the EFI branch. Should the patches be passed via > efi-next? Yes, a follow-up series makes sense, and yes, efi-next for the patches themselves sounds fine, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Convert CONFIG_NAND_LPC32XX_SLC to Kconfig
On Sun, Jul 08, 2018 at 06:18:48AM -0500, Adam Ford wrote: > This converts the following to Kconfig: >CONFIG_NAND_LPC32XX_SLC > > Signed-off-by: Adam Ford > > diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig > index 14c24ce6f2..8a37122104 100644 Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Convert CONFIG_NAND_DAVINCI to Kconfig
On Sun, Jul 08, 2018 at 06:43:36AM -0500, Adam Ford wrote: > This converts the following to Kconfig: >CONFIG_NAND_DAVINCI > > Signed-off-by: Adam Ford > > diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig > index 497e5515d7..43292a126d 100644 Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Convert CONFIG_NAND_ATMEL to Kconfig
On Sun, Jul 08, 2018 at 08:11:07AM -0500, Adam Ford wrote: > This converts the following to Kconfig: >CONFIG_NAND_ATMEL > > Signed-off-by: Adam Ford > > diff --git a/configs/at91sam9260ek_dataflash_cs0_defconfig > b/configs/at91sam9260ek_dataflash_cs0_defconfig > index 3d2b8803ea..c77b8d8a20 100644 Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/5] Kconfig: Sort bool, default, select and imply options
On Mon, Jul 23, 2018 at 03:55:13PM +0200, Michal Simek wrote: > Fix Kconfig bool, default, select and imply options to be > alphabetically sorted. > > Signed-off-by: Michal Simek Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] configs: Convert CONFIG_USE_NAND to CONFIG_NAND
On Tue, Jul 10, 2018 at 06:47:33AM -0500, Adam Ford wrote: > The DA850-EVM and OMAPL138_LCDK both use checks for CONFIG_USE_NAND. > This patch changes these checks to CONFIG_NAND which is already defined > in Kconfig. Since the OMAPL138_LCDK already had CONFIG_NAND defined in its > defconfig, it can be deleted from configs/omapl138_lcdk.h. > > Signed-off-by: Adam Ford > > diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h > index ebfdd1c7a3..6690be60b6 100644 Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 2/5] Kconfig: Replace spaces with tabs and missing newline
On Mon, Jul 23, 2018 at 03:55:12PM +0200, Michal Simek wrote: > Trivial Kconfig cleanup. Use tabs instead of spaces and every Kconfig > entry should be separated by newline. > > Signed-off-by: Michal Simek Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 1/5] common: Log should depends on DM not be selected by DM
On Mon, Jul 23, 2018 at 03:55:11PM +0200, Michal Simek wrote: > Better use depends on instead of select. > > Signed-off-by: Michal Simek > Reviewed-by: Tom Rini Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] dm: Change CMD_DM enabling
On 23.7.2018 14:15, Tom Rini wrote: > On Mon, Jul 23, 2018 at 08:40:51AM +0200, Michal Simek wrote: >> On 20.7.2018 14:53, Tom Rini wrote: >>> On Fri, Jul 20, 2018 at 02:05:07PM +0200, Michal Simek wrote: >>> CMD_DM is used for debug purpose and it shouldn't be enabled by default via Kconfig. Unfortunately this is in the tree for quite a long time that's why solution is to use imply DM for all targets which are enabling DM. Signed-off-by: Michal Simek --- Based on this discussion: https://lists.denx.de/pipermail/u-boot/2018-July/334952.html Done by: for i in `git grep "select DM" | grep -v DM_ | cut -d ':' -f 1 | sort | uniq`; do sed -i 's/select DM$/select DM\n\timply CMD_DM/g' $i; done >>> >>> OK, I'm glad you did this, but now the (mostly) sorted lists are >>> un-sorted. Please update to keep them alphabetically sorted, thanks! >> >> How this should be sorted? >> sorted "select" list first followed by sorted "imply" list? > > Yes, that's approximately how I've been doing it. It won't be 100% > sorted as some arches aren't, but it should be close. Thanks again! Ok. Patches sent. I have done some sorting before this patch. Thanks, Michal ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Convert CONFIG_MTD_PARTITIONS et al to Kconfig
On Sat, Jul 07, 2018 at 10:18:22PM -0500, Adam Ford wrote: > This converts the following to Kconfig: >CONFIG_MTD_PARTITIONS >CONFIG_MTD_DEVICE > > Signed-off-by: Adam Ford > > diff --git a/README b/README > index b1ddf89fc5..aee0f7371c 100644 Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] configs: Make NAND_BOOT and ONENAND_BOOT imply NAND
On Sun, Jul 08, 2018 at 07:28:10AM -0500, Adam Ford wrote: > Some boards indicate support from booting NAND or > ONENAND booting, but don't enable the CONFIG_NAND. This > makes those boards imply NAND which will make > enabling other flags that are dependent on CONFIG_NAND > possible and easier to migrate. > > Signed-off-by: Adam Ford > > diff --git a/common/Kconfig b/common/Kconfig > index 4c7a1a9af8..a22268cbf9 100644 Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 5/5] Kconfig: Sort bool, default, select and imply options
On Mon, Jul 23, 2018 at 03:55:15PM +0200, Michal Simek wrote: > Another round of sorting Kconfig entries aplhabetically. > > Signed-off-by: Michal Simek Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] cmd: Make CMD_NAND imply NAND
On Sun, Jul 08, 2018 at 07:50:28AM -0500, Adam Ford wrote: > Many boards check for CMD_NAND and not NAND. This makes CMD_NAND > imply NAND which will make some Kconfig migration of some NAND > options easier later. > > Rsync all defconfig files using moveconfig.py > > Signed-off-by: Adam Ford As-is, I get a Kconfig dependency loop. Please re-spin this and then I'll do a size-check on it, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/5] dm: Change CMD_DM enabling
On Mon, Jul 23, 2018 at 03:55:14PM +0200, Michal Simek wrote: > CMD_DM is used for debug purpose and it shouldn't be enabled by default > via Kconfig. Unfortunately this is in the tree for quite a long time > that's why solution is to use imply DM for all targets which are > enabling DM. > > Signed-off-by: Michal Simek Reviewed-by: Tom Rini -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] tegra: Indicate that binman makes all three output files
On 07/20/2018 07:49 PM, Simon Glass wrote: Use GNU make pattern rules to indicate that a single run of binman produces all three Tegra output files. The avoids make running binman three times (perhaps in parallel) and those instances inteferring with each other. See http://patchwork.ozlabs.org/patch/944611/ for the bug report. Tested-by: Stephen Warren (This make feature is very odd; specifying n targets without a % means they're separate rules, but specifying n targets with a % means it's a single rule that generates n targets. Nice inconsistency on make's part!) ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 5/5] Kconfig: Sort bool, default, select and imply options
Hi Michal, On Mon, 2018-07-23 at 15:55 +0200, Michal Simek wrote: > Another round of sorting Kconfig entries aplhabetically. > > Signed-off-by: Michal Simek > --- > > Changes in v2: None [snip] > arch/arc/Kconfig | 10 +- Acked-by: Alexey Brodkin ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] ti_omap3_common: Add CONFIG_SYS_NS16550_COMx entries
On Mon, Mar 19, 2018 at 5:35 PM Tom Rini wrote: > > On Sun, Mar 04, 2018 at 04:46:53PM -0600, Adam Ford wrote: > > > Several boards do not use the default UART3, so they do a check > > for ifdef CONFIG_SPL_BUILD and enable the pointer for > > CONFIG_SYS_NS16550_COMx to point to OMAP34XX_UARTx. > > > > Let's consoldate this all into one place, and remove them from the > > individual boards. > > > > Signed-off-by: Adam Ford > > > > diff --git a/include/configs/omap3_cairo.h b/include/configs/omap3_cairo.h > > index 57ac3ec..c387602 100644 > > Deferred because it relies on the CONFIG_SERIALn patch. Does it really depend on that patch? The intent behind it was to point all the NS16550_COMx to their respective OMAP34XX ports in the common file, so the individual boards don't need to manually set them. My understanding is that the serial port has an index which dictates which of the COMx will be used in SPL so having all COMx ports pointing to each of the OMAP34XX references shouldn't break anything. adam > > -- > Tom ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] ti_omap3_common: Add CONFIG_SYS_NS16550_COMx entries
On Mon, Jul 23, 2018 at 10:53:02AM -0500, Adam Ford wrote: > On Mon, Mar 19, 2018 at 5:35 PM Tom Rini wrote: > > > > On Sun, Mar 04, 2018 at 04:46:53PM -0600, Adam Ford wrote: > > > > > Several boards do not use the default UART3, so they do a check > > > for ifdef CONFIG_SPL_BUILD and enable the pointer for > > > CONFIG_SYS_NS16550_COMx to point to OMAP34XX_UARTx. > > > > > > Let's consoldate this all into one place, and remove them from the > > > individual boards. > > > > > > Signed-off-by: Adam Ford > > > > > > diff --git a/include/configs/omap3_cairo.h b/include/configs/omap3_cairo.h > > > index 57ac3ec..c387602 100644 > > > > Deferred because it relies on the CONFIG_SERIALn patch. > > Does it really depend on that patch? The intent behind it was to > point all the NS16550_COMx to their respective OMAP34XX ports in the > common file, so the individual boards don't need to manually set them. > My understanding is that the serial port has an index which dictates > which of the COMx will be used in SPL so having all COMx ports > pointing to each of the OMAP34XX references shouldn't break anything. Context-wise, yes, it depended on that other series in order to apply. If you can re-spin it stand-alone that would be great, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PULL] Please pull u-boot-imx
On Mon, Jul 23, 2018 at 11:44:04AM +0200, Stefano Babic wrote: > Hi Tom, > > please pull from u-boot-imx, thanks ! > > The following changes since commit 474ecd2c84d97314b8145fbe3a57887f41b2edb3: > > env: Simplify Makefile using $(SPL_TPL_) (2018-07-21 12:24:31 -0400) > > are available in the git repository at: > > git://www.denx.de/git/u-boot-imx.git master > > for you to fetch changes up to f97f167107b33fc6596561dae1309571ade39055: > > configs: imx6q_logic: Cleanup ramdiskaddr and fdtaddr (2018-07-23 > 11:05:54 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] gpio: zynq: Setup bank_name to dev->name
Hi Michal, Am 23.07.2018 um 11:08 schrieb Michal Simek: On 20.7.2018 21:31, Stefan Herbrechtsmeier wrote: Am 12.07.2018 um 16:04 schrieb Michal Simek: There should be proper bank name setup to distiguish between different gpio drivers. Use dev->name for it. Signed-off-by: Michal Simek --- drivers/gpio/zynq_gpio.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c index 26f69b1a713f..f793ee5754a8 100644 --- a/drivers/gpio/zynq_gpio.c +++ b/drivers/gpio/zynq_gpio.c @@ -337,6 +337,8 @@ static int zynq_gpio_probe(struct udevice *dev) struct zynq_gpio_privdata *priv = dev_get_priv(dev); struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); + uc_priv->bank_name = dev->name; + if (priv->p_data) uc_priv->gpio_count = priv->p_data->ngpio; Does this not lead to ugly names because the gpio number is append to the bank_name? Have you check the "gpio status -a" output? Yes I was checking it. Names are composed together but also just numbers works as before. gpio@ff0a0: input: 0 [ ] gpio@ff0a1: input: 0 [ ] gpio@ff0a2: input: 0 [ ] gpio@ff0a3: input: 0 [ ] gpio@ff0a4: input: 0 [ ] gpio@ff0a5: input: 0 [ ] gpio@ff0a6: input: 0 [ ] gpio@ff0a7: input: 0 [ ] gpio@ff0a8: input: 0 [ ] gpio@ff0a9: input: 0 [ ] Do you think that this are meaningful names? It isn't possible to separate the device and pin number as well as it mix hex and decimal numbers. If you know better way how to setup a bank name please let me know but I need to distinguish ps gpio from pl one and for pl we need to know the address. I know the use case. A lot of drivers use the bank_name from the device tree, some drivers append an underscore to the bank name and others add the req_seq of the device to an alphabetic character. Other drivers use the gpio-bank-name from the device tree. I can't see this property inside Linux kernel. If this has been reviewed by dt guys please let me know. This property is only used by u-boot. I think it isn't needed by the Linux kernel. Best regards Stefan ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RFC PATCH] gpio: zynq: Setup bank_name to dev->name
Hi Michal, On 23 July 2018 at 03:08, Michal Simek wrote: > > On 20.7.2018 21:31, Stefan Herbrechtsmeier wrote: > > Hi Michal, > > > > Am 12.07.2018 um 16:04 schrieb Michal Simek: > >> There should be proper bank name setup to distiguish between different > >> gpio drivers. Use dev->name for it. > >> > >> Signed-off-by: Michal Simek > >> --- > >> > >> drivers/gpio/zynq_gpio.c | 2 ++ > >> 1 file changed, 2 insertions(+) > >> > >> diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c > >> index 26f69b1a713f..f793ee5754a8 100644 > >> --- a/drivers/gpio/zynq_gpio.c > >> +++ b/drivers/gpio/zynq_gpio.c > >> @@ -337,6 +337,8 @@ static int zynq_gpio_probe(struct udevice *dev) > >> struct zynq_gpio_privdata *priv = dev_get_priv(dev); > >> struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev); > >> +uc_priv->bank_name = dev->name; > >> + > >> if (priv->p_data) > >> uc_priv->gpio_count = priv->p_data->ngpio; > >> > > Does this not lead to ugly names because the gpio number is append to > > the bank_name? Have you check the "gpio status -a" output? > > Yes I was checking it. Names are composed together but also just numbers > works as before. > > gpio@ff0a0: input: 0 [ ] > gpio@ff0a1: input: 0 [ ] > gpio@ff0a2: input: 0 [ ] > gpio@ff0a3: input: 0 [ ] > gpio@ff0a4: input: 0 [ ] > gpio@ff0a5: input: 0 [ ] > gpio@ff0a6: input: 0 [ ] > gpio@ff0a7: input: 0 [ ] > gpio@ff0a8: input: 0 [ ] > gpio@ff0a9: input: 0 [ ] > > If you know better way how to setup a bank name please let me know but I > need to distinguish ps gpio from pl one and for pl we need to know the > address. > > > > > Other drivers use the gpio-bank-name from the device tree. > > I can't see this property inside Linux kernel. If this has been reviewed > by dt guys please let me know. Linux doesn't have this concept and has no command line. I am skeptical they would be interested in adding the property. If we can get this in by renaming it (e.g. to u-boot,gpio-bank-name) then that would be OK. Otherwise I think we just have to rely on having our own binding file. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 3/4] gpio: xilinx: Not read output values via regs
Hi Michal,
Am 23.07.2018 um 13:43 schrieb Michal Simek:
Reading registers for finding out output value is not working because
input value is read instead in case of tristate.
Reported-by: Stefan Herbrechtsmeier
Signed-off-by: Michal Simek
---
drivers/gpio/xilinx_gpio.c | 38 +-
1 file changed, 33 insertions(+), 5 deletions(-)
diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
index 4da9ae114d87..9d3e9379d0e5 100644
--- a/drivers/gpio/xilinx_gpio.c
+++ b/drivers/gpio/xilinx_gpio.c
@@ -358,6 +358,11 @@ struct xilinx_gpio_platdata {
int bank_max[XILINX_GPIO_MAX_BANK];
int bank_input[XILINX_GPIO_MAX_BANK];
int bank_output[XILINX_GPIO_MAX_BANK];
+ u32 dout_default[XILINX_GPIO_MAX_BANK];
+};
+
+struct xilinx_gpio_privdata {
+ u32 output_val[XILINX_GPIO_MAX_BANK];
};
static int xilinx_gpio_get_bank_pin(unsigned offset, u32 *bank_num,
@@ -387,6 +392,7 @@ static int xilinx_gpio_set_value(struct udevice *dev,
unsigned offset,
int value)
{
struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
+ struct xilinx_gpio_privdata *priv = dev_get_priv(dev);
int val, ret;
u32 bank, pin;
@@ -394,19 +400,21 @@ static int xilinx_gpio_set_value(struct udevice *dev, unsigned offset,
if (ret)
return ret;
- debug("%s: regs: %lx, value: %x, gpio: %x, bank %x, pin %x\n",
- __func__, (ulong)platdata->regs, value, offset, bank, pin);
+ val = priv->output_val[bank];
+
+ debug("%s: regs: %lx, value: %x, gpio: %x, bank %x, pin %x, out %x\n",
+ __func__, (ulong)platdata->regs, value, offset, bank, pin, val);
if (value) {
- val = readl(&platdata->regs->gpiodata + bank * 2);
val = val | (1 << pin);
writel(val, &platdata->regs->gpiodata + bank * 2);
} else {
- val = readl(&platdata->regs->gpiodata + bank * 2);
val = val & ~(1 << pin);
writel(val, &platdata->regs->gpiodata + bank * 2);
}
You could replace the two writel function calls by one.
+ priv->output_val[bank] = val;
+
return val;
};
@@ -441,6 +449,7 @@ static int xilinx_gpio_get_function(struct udevice *dev, unsigned offset)
static int xilinx_gpio_get_value(struct udevice *dev, unsigned offset)
{
struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
+ struct xilinx_gpio_privdata *priv = dev_get_priv(dev);
int val, ret;
u32 bank, pin;
@@ -451,7 +460,14 @@ static int xilinx_gpio_get_value(struct udevice *dev, unsigned offset)
debug("%s: regs: %lx, gpio: %x, bank %x, pin %x\n", __func__,
(ulong)platdata->regs, offset, bank, pin);
- val = readl(&platdata->regs->gpiodata + bank * 2);
+ if (xilinx_gpio_get_function(dev, offset) == GPIOF_INPUT) {
+ debug("%s: Read input value from reg\n", __func__);
+ val = readl(&platdata->regs->gpiodata + bank * 2);
+ } else {
+ debug("%s: Read saved output value\n", __func__);
+ val = priv->output_val[bank];
+ }
Why you don't always read the data register? This doesn't work for three
state outputs.
+
val = !!(val & (1 << pin));
return val;
@@ -558,11 +574,17 @@ static int xilinx_gpio_probe(struct udevice *dev)
{
struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+ struct xilinx_gpio_privdata *priv = dev_get_priv(dev);
uc_priv->bank_name = dev->name;
uc_priv->gpio_count = platdata->bank_max[0] + platdata->bank_max[1];
+ priv->output_val[0] = platdata->dout_default[0];
+
+ if (platdata->bank_max[1])
+ priv->output_val[1] = platdata->dout_default[1];
+
return 0;
}
@@ -579,6 +601,9 @@ static int xilinx_gpio_ofdata_to_platdata(struct udevice *dev)
"xlnx,all-inputs", 0);
platdata->bank_output[0] = dev_read_u32_default(dev,
"xlnx,all-outputs", 0);
+ platdata->dout_default[0] = dev_read_u32_default(dev,
+"xlnx,dout-default",
+0);
is_dual = dev_read_u32_default(dev, "xlnx,is-dual", 0);
if (is_dual) {
@@ -588,6 +613,8 @@ static int xilinx_gpio_ofdata_to_platdata(struct udevice
*dev)
"xlnx,all-inputs-2", 0);
platdata->bank_output[1] = dev_read_u32_default(dev,
"xlnx,all-outputs-2", 0);
+ platdata->dout_default[1] = dev_read_u32_default(dev,
+ "xlnx,dout-default-2",
Re: [U-Boot] [PATCH v2] gpio: xilinx: Convert driver to DM
Hi Michal,
Am 23.07.2018 um 13:43 schrieb Michal Simek:
On 20.7.2018 22:05, Stefan Herbrechtsmeier wrote:
Am 13.07.2018 um 17:20 schrieb Michal Simek:
This patch is enabling GPIO_DM support to have an option to use this
driver together with zynq gpio driver.
!DM part is kept there till Microblaze is cleanup which will be done
hopefully soon.
Just a note:
There is no reason to initialize uc-priv->name because it is completely
unused.
Signed-off-by: Michal Simek
---
Changes in v2:
- Show value in set_value when debug is enabled
- Implement xlate function
- Remove tabs from structures for alignment (to be consistent with the
rest of code)
drivers/gpio/xilinx_gpio.c | 265
-
1 file changed, 264 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/xilinx_gpio.c b/drivers/gpio/xilinx_gpio.c
index 74c5be0865d1..48b52c985a55 100644
--- a/drivers/gpio/xilinx_gpio.c
+++ b/drivers/gpio/xilinx_gpio.c
[snip]
+static int xilinx_gpio_probe(struct udevice *dev)
+{
+ struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
+ struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+
+ uc_priv->bank_name = dev->name;
Have you check the "gpio status -a" output? Maybe you could use a
gpio-bank-name from the device tree.
The same as for zynq. gpio-bank-name is not in Linux. And yes I was
checking output. If you know better way please let me know.
Please see my other answer.
+
+ uc_priv->gpio_count = platdata->bank_max[0] + platdata->bank_max[1];
+
+ return 0;
+}
+
+static int xilinx_gpio_ofdata_to_platdata(struct udevice *dev)
+{
+ struct xilinx_gpio_platdata *platdata = dev_get_platdata(dev);
+ int is_dual;
+
+ platdata->regs = (struct gpio_regs *)dev_read_addr(dev);
+
+ platdata->bank_max[0] = dev_read_u32_default(dev,
+ "xlnx,gpio-width", 0);
The default value of the Linux driver is 32.
but not in binding doc.
Okay
+ platdata->bank_input[0] = dev_read_u32_default(dev,
+ "xlnx,all-inputs", 0);
This isn't supported by the Linux driver but documented in the device
tree bindings.
correct.
+ platdata->bank_output[0] = dev_read_u32_default(dev,
+ "xlnx,all-outputs", 0);
This isn't supported by the Linux driver neither documented in the
device tree bindings.
This IP, driver and dt binding was done pretty long time ago. I could be
one of the first dt driver that's why there could issues with dt bindings.
DTG is generating all these properties from day one and in Linux only
documented property where that one which are used by Linux.
All that old dt binding docs should be checked again and there is
actually 22 patches sent to gpio mailing list
https://patchwork.ozlabs.org/patch/947371/
but I haven't looked at them yet.
Okay
+
+ is_dual = dev_read_u32_default(dev, "xlnx,is-dual", 0);
+ if (is_dual) {
+ platdata->bank_max[1] = dev_read_u32_default(dev,
+ "xlnx,gpio2-width", 0);
+ platdata->bank_input[1] = dev_read_u32_default(dev,
+ "xlnx,all-inputs-2", 0);
+ platdata->bank_output[1] = dev_read_u32_default(dev,
+ "xlnx,all-outputs-2", 0);
+ }
+
+ return 0;
+}
+
+static const struct udevice_id xilinx_gpio_ids[] = {
+ { .compatible = "xlnx,xps-gpio-1.00.a",},
+ { }
+};
+
+U_BOOT_DRIVER(xilinx_gpio) = {
+ .name = "xlnx_gpio",
+ .id = UCLASS_GPIO,
+ .ops = &xilinx_gpio_ops,
+ .of_match = xilinx_gpio_ids,
+ .ofdata_to_platdata = xilinx_gpio_ofdata_to_platdata,
+ .probe = xilinx_gpio_probe,
+ .platdata_auto_alloc_size = sizeof(struct xilinx_gpio_platdata),
+};
+#endif
Maybe the Xilinx AXI GPIO LogiCore IP driver could be integrated into
the generic gpio-mmio driver. This driver is compatible to the hardware
and doesn't need a default value for the data register in the device tree.
There is no support for irq that's why I don't think this is going to fly.
I wasn't aware of the irq because the irq support is missing in the
xilinx driver at the moment. I only realized that the xilinx driver use
a subset of the generic gpio driver with a different binding.
Best regards
Stefan
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Re: [U-Boot] [PATCH V2 29/32] fsl_esdhc: Update usdhc driver to support i.MX8
Hi Peng, On Thu, Jul 19, 2018 at 11:04 AM, Peng Fan wrote: > There is i.MX8/8X/8M, 8M is for i.MX8MQ and i.MX8MM > i.MX8/8X has different SoC architecture compared with i.MX8M, > such as there is SCU inside i.MX8/8X. > So add a new macro dedicated for i.MX8/8X. Yes, I understand the differences between the MX8 family. Couldn't you make CONFIG_IMX8 instead of CONFIG_ARCH_IMX8 for consistency? Also, for consistency: should CONFIG_MX8M be changed to CONFIG_IMX8M? Thanks ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] fs: ext4: Prevent erasing buffer past file size
On 07/23/2018 04:09 PM, Tom Rini wrote:
> On Mon, Jul 23, 2018 at 11:42:12AM +0200, Marek Vasut wrote:
>
>> The variable 'n' represents the number of bytes to be read from a certain
>> offset in a file, to a certain offset in buffer 'buf'. The variable 'len'
>> represents the length of the entire file, clamped correctly to avoid any
>> overflows.
>>
>> Therefore, comparing 'n' and 'len' to determine whether clearing 'n'
>> bytes of the buffer 'buf' at a certain offset would clear data past
>> buffer 'buf' cannot lead to a correct result, since the 'n' does not
>> contain the offset from the beginning of the file.
>>
>> This patch keeps track of the amount of data read and checks for the
>> buffer overflow by comparing the 'n' to the remaining amount of data
>> to be read instead.
>>
>> Signed-off-by: Marek Vasut
>> Cc: Ian Ray
>> Cc: Martyn Welch
>> Cc: Stefano Babic
>> Cc: Tom Rini
>> Fixes: ecdfb4195b20 ("ext4: recover from filesystem corruption when reading")
>
> Good catch. Can this problem also be recreated/tested with
> test/fs/fs-test.sh? Thanks!
>
I think so. I'd memalign() a buffer with some safe space around it, ie.
a 4k page on each side and poison it with a pattern. I'd then read a
file which is not ext4 FS block size aligned into 1-page offset from the
beginning of that buffer . Finally, I'd check if exactly the size of the
file was changed in that buffer and the poisoned area of the buffer
still contains the poison or not.
|poison|
|
v
|...poison...|file...|.DZ.|...poison...|
If DZ is poison, everything is OK.
If DZ is 0x0, the ext4 corruption happened.
--
Best regards,
Marek Vasut
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[U-Boot] [PATCH] sunxi: enable SATA on Banana Pi M2 Berry
Banana Pi M2 Ultra and M2 Berry are very similar boards. SATA can be
enabled exactly the same as for M2 Ultra introduced in
commit daa8b75a5527 ("sunxi: enable SATA on Banana Pi M2 Ultra").
Signed-off-by: Simon Baatz
---
configs/bananapi_m2_berry_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/bananapi_m2_berry_defconfig
b/configs/bananapi_m2_berry_defconfig
index 9d75108d04..313e09a764 100644
--- a/configs/bananapi_m2_berry_defconfig
+++ b/configs/bananapi_m2_berry_defconfig
@@ -7,8 +7,11 @@ CONFIG_DRAM_ZQ=3881979
CONFIG_DRAM_ODT_EN=y
CONFIG_MMC0_CD_PIN="PH13"
CONFIG_DEFAULT_DEVICE_TREE="sun8i-v40-bananapi-m2-berry"
+CONFIG_AHCI=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_FLASH is not set
+CONFIG_SCSI_AHCI=y
CONFIG_AXP_DLDO4_VOLT=2500
CONFIG_AXP_ELDO3_VOLT=1200
+CONFIG_SCSI=y
--
2.17.1
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Re: [U-Boot] [PATCH v2 2/5] Revert "dm: led: auto probe() LEDs with "default-state""
Hi Patrick, On 23 July 2018 at 03:41, Patrick Delaunay wrote: > This reverts commit bc882f5d5c7b4d6ed5e927bf838863af43c786e7. A revert should have a motivation and a discussion of the purpose, just like any other patch. Can you add it please? > > Signed-off-by: Patrick Delaunay > --- > > Changes in v2: None > > drivers/led/led_gpio.c | 9 - > 1 file changed, 9 deletions(-) Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 4/5] stm32mp1: use new function led default state
On 23 July 2018 at 03:41, Patrick Delaunay wrote: > Initialize the led with the default state defined in device tree. > > Signed-off-by: Patrick Delaunay > --- > > Changes in v2: None > > board/st/stm32mp1/stm32mp1.c | 4 > 1 file changed, 4 insertions(+) Reviewed-by: Simon Glass But I wonder if you can use if (IS_ENABLED(CONFIG_LED)) instead? > > diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c > index cc39fa6..db8c805 100644 > --- a/board/st/stm32mp1/stm32mp1.c > +++ b/board/st/stm32mp1/stm32mp1.c > @@ -22,5 +22,9 @@ int board_init(void) > /* address of boot parameters */ > gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100; > > +#ifdef CONFIG_LED > + led_default_state(); > +#endif /* CONFIG_LED */ > + > return 0; > } > -- > 2.7.4 > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 11/17] fs: add mkdir interface
Hi, On 20 July 2018 at 11:35, Heinrich Schuchardt wrote: > On 07/20/2018 04:57 AM, AKASHI Takahiro wrote: >> "mkdir" interface is added to file operations. >> This is a preparatory change as mkdir support for FAT file system >> will be added in next patch. >> >> Signed-off-by: AKASHI Takahiro >> --- >> fs/fs.c | 45 + >> include/fs.h | 10 ++ >> 2 files changed, 55 insertions(+) >> We need to get a proper fs test in place before we add any more stuff. Does someone waent to try converting fs-test.sh to pytest in test/py/tests ? Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 5/5] sandbox: led: use new function to configure default state
Hi Patrick,
On 23 July 2018 at 03:41, Patrick Delaunay wrote:
> Initialize the led with the default state defined in device tree
> in board_init and solve issue with test for led default state.
>
> Signed-off-by: Patrick Delaunay
> ---
> Led default-state is correctly handle in Sandbox, tested with:
> ./u-boot -d ./arch/sandbox/dts/test.dtb
> => led list
> sandbox:red
> sandbox:green
> sandbox:default_on on
> sandbox:default_off off
>
> This patch solve "make tests" issue introduced by
> http://patchwork.ozlabs.org/patch/943651/
>
> Changes in v2:
> - add sandbox impact and test update
>
> board/sandbox/sandbox.c | 9 +
> common/board_r.c| 3 ++-
> test/dm/led.c | 3 +++
> 3 files changed, 14 insertions(+), 1 deletion(-)
Reviewed-by: Simon Glass
Please see below.
>
> diff --git a/board/sandbox/sandbox.c b/board/sandbox/sandbox.c
> index 195f620..66b5f24 100644
> --- a/board/sandbox/sandbox.c
> +++ b/board/sandbox/sandbox.c
> @@ -6,6 +6,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -47,6 +48,14 @@ int dram_init(void)
> return 0;
> }
>
> +int board_init(void)
> +{
> +#ifdef CONFIG_LED
> + led_default_state();
if (IS_ENABLED(CONFIG_LED))
led_default_state();
> +#endif /* CONFIG_LED */
blank line here
> + return 0;
> +}
> +
> #ifdef CONFIG_BOARD_LATE_INIT
> int board_late_init(void)
> {
> diff --git a/common/board_r.c b/common/board_r.c
> index 64f2574..9402c0e 100644
> --- a/common/board_r.c
> +++ b/common/board_r.c
> @@ -690,7 +690,8 @@ static init_fnc_t init_sequence_r[] = {
> #ifdef CONFIG_DM
> initr_dm,
> #endif
> -#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV)
> +#if defined(CONFIG_ARM) || defined(CONFIG_NDS32) || defined(CONFIG_RISCV) ||
> \
> + defined(CONFIG_SANDBOX)
> board_init, /* Setup chipselects */
> #endif
> /*
> diff --git a/test/dm/led.c b/test/dm/led.c
> index 0071f21..00de7b3 100644
> --- a/test/dm/led.c
> +++ b/test/dm/led.c
> @@ -32,6 +32,9 @@ static int dm_test_led_default_state(struct unit_test_state
> *uts)
> {
> struct udevice *dev;
>
> + /* configure the default state (auto-probe) */
> + led_default_state();
> +
> /* Check that we handle the default-state property correctly. */
> ut_assertok(led_get_by_label("sandbox:default_on", &dev));
> ut_asserteq(LEDST_ON, led_get_state(dev));
> --
> 2.7.4
>
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Re: [U-Boot] [PATCH] mkimage: fit_image: Use macros from image.h
On 20 July 2018 at 04:31, Michal Simek wrote: > There is no reason not to use macros which are already defined. > It is also much easier for grepping. > > Signed-off-by: Michal Simek > --- > > tools/fit_image.c | 53 + > 1 file changed, 29 insertions(+), 24 deletions(-) Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 5/6] configs: stm32mp15: enable ADC
On 23 July 2018 at 06:35, Fabrice Gasnier wrote: > Enable ADC on stm32mp15. > - CONFIG_CMD_ADC > - CONFIG_STM32_ADC > > Signed-off-by: Fabrice Gasnier > --- > > configs/stm32mp15_basic_defconfig | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/6] dm: adc: uclass: get reference regulator once
Hi Fabrice,
On 23 July 2018 at 06:35, Fabrice Gasnier wrote:
> device_get_supply_regulator() only needs to be called once.
> But each time there's call to adc_vxx_value() for instance, it calls
> adc_vxx_platdata_update() -> device_get_supply_regulator().
>
> This also allows vdd_supply/vss_supply to be provided directly from
> uc_pdata, e.g dt-binding variant like stm32-adc provide its own
> 'vref-supply'.
>
> Signed-off-by: Fabrice Gasnier
> ---
>
> drivers/adc/adc-uclass.c | 21 +
> 1 file changed, 13 insertions(+), 8 deletions(-)
The original code doesn't look right to me.
Reading from the DT should happen in the ofdata_to_platdata() method,
except (as here) where we need to probe another device, iwc we can use
the probe() method.
So can you move this code into a new probe() method, so it just
happens once, when the device is probed?
>
> diff --git a/drivers/adc/adc-uclass.c b/drivers/adc/adc-uclass.c
> index 17c1a4e..70f4cde 100644
> --- a/drivers/adc/adc-uclass.c
> +++ b/drivers/adc/adc-uclass.c
> @@ -264,10 +264,13 @@ static int adc_vdd_platdata_update(struct udevice *dev)
> * will bind before its supply regulator device, then the below 'get'
> * will return an error.
> */
> - ret = device_get_supply_regulator(dev, "vdd-supply",
> - &uc_pdata->vdd_supply);
> - if (ret)
> - return ret;
> + if (!uc_pdata->vdd_supply) {
> + /* Only get vdd_supply once */
> + ret = device_get_supply_regulator(dev, "vdd-supply",
> + &uc_pdata->vdd_supply);
> + if (ret)
> + return ret;
> + }
>
> ret = regulator_get_value(uc_pdata->vdd_supply);
> if (ret < 0)
> @@ -283,10 +286,12 @@ static int adc_vss_platdata_update(struct udevice *dev)
> struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
> int ret;
>
> - ret = device_get_supply_regulator(dev, "vss-supply",
> - &uc_pdata->vss_supply);
> - if (ret)
> - return ret;
> + if (!uc_pdata->vss_supply) {
> + ret = device_get_supply_regulator(dev, "vss-supply",
> + &uc_pdata->vss_supply);
> + if (ret)
> + return ret;
> + }
>
> ret = regulator_get_value(uc_pdata->vss_supply);
> if (ret < 0)
> --
> 1.9.1
>
Regards,
Simon
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Re: [U-Boot] [PATCH v1 1/6] configs: stm32f429-evaluation: Enable CONFIG_BLK
On 20 July 2018 at 01:44, Patrice Chotard wrote: > Signed-off-by: Patrice Chotard > --- > > configs/stm32f429-evaluation_defconfig | 1 - > 1 file changed, 1 deletion(-) > Reviewed-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
