[U-Boot] [PATCH 3/9] sunxi: Fix USB PHY control register offset for A83T
It was recently discovered that the USB PHY control register offset on
the A83T is 0x410 like on the A33, not 0x404. Fix it.
Fixes: 0c935acb9e5d ("sunxi: usb_phy: Add support for A83T USB PHYs")
Signed-off-by: Chen-Yu Tsai
---
arch/arm/mach-sunxi/usb_phy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c
index 9bf0b5633d4a..3fbef0050e3f 100644
--- a/arch/arm/mach-sunxi/usb_phy.c
+++ b/arch/arm/mach-sunxi/usb_phy.c
@@ -19,7 +19,7 @@
#include
#define SUNXI_USB_PMU_IRQ_ENABLE 0x800
-#ifdef CONFIG_MACH_SUN8I_A33
+#if defined CONFIG_MACH_SUN8I_A33 || defined CONFIG_MACH_SUN8I_A83T
#define SUNXI_USB_CSR 0x410
#else
#define SUNXI_USB_CSR 0x404
--
2.14.1
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[U-Boot] [PATCH 1/9] sunxi: rename Bananapi M3 dts file name
The upstream (Linux) device tree file for the Bananapi M3 follows the
convention of using the well known brand name, instead of the vendor
name, for naming. The file was recently added to upstream in commit
359b5a1e1c2d ("ARM: sun8i: a83t: Add device tree for Sinovoip Bananapi
BPI-M3")
Rename the device tree file in U-boot to match.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/dts/Makefile | 4 ++--
.../{sun8i-a83t-sinovoip-bpi-m3.dts => sun8i-a83t-bananapi-m3.dts}| 0
configs/Sinovoip_BPI_M3_defconfig | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
rename arch/arm/dts/{sun8i-a83t-sinovoip-bpi-m3.dts =>
sun8i-a83t-bananapi-m3.dts} (100%)
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 762429c463d1..b7550104c340 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -307,8 +307,8 @@ dtb-$(CONFIG_MACH_SUN8I_A33) += \
sun8i-r16-parrot.dtb
dtb-$(CONFIG_MACH_SUN8I_A83T) += \
sun8i-a83t-allwinner-h8homlet-v2.dtb \
- sun8i-a83t-cubietruck-plus.dtb \
- sun8i-a83t-sinovoip-bpi-m3.dtb
+ sun8i-a83t-bananapi-m3.dtb \
+ sun8i-a83t-cubietruck-plus.dtb
dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h2-plus-orangepi-zero.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
diff --git a/arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts
b/arch/arm/dts/sun8i-a83t-bananapi-m3.dts
similarity index 100%
rename from arch/arm/dts/sun8i-a83t-sinovoip-bpi-m3.dts
rename to arch/arm/dts/sun8i-a83t-bananapi-m3.dts
diff --git a/configs/Sinovoip_BPI_M3_defconfig
b/configs/Sinovoip_BPI_M3_defconfig
index 04d81693ebd8..f321d94e04eb 100644
--- a/configs/Sinovoip_BPI_M3_defconfig
+++ b/configs/Sinovoip_BPI_M3_defconfig
@@ -13,7 +13,7 @@ CONFIG_USB0_ID_DET="PH11"
CONFIG_USB1_VBUS_PIN="PD24"
CONFIG_AXP_GPIO=y
CONFIG_SATAPWR="PD25"
-CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-sinovoip-bpi-m3"
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-a83t-bananapi-m3"
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_CONSOLE_MUX=y
CONFIG_SPL=y
--
2.14.1
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[U-Boot] [PATCH 0/9] sunxi: A83T improvements
Hi,
This series is a bunch of improvements for A83T boards, the Bananapi M3
and Cubietruck Plus in particular:
- eMMC is enabled if it wasn't enabled already
- EMAC is enabled for Ethernet support
- MUSB switched to gadget mode
EMAC is not fully tested. The MII and auto-negotiation part looks good.
But I got "CACHE: Misaligned operation at range [bbf38940, bbf38a18]"
when the EMAC is first initialized and I didn't seem to be getting any
packets through. AFAIK the EMAC is the same as the H3/H5 one, minus the
internal PHY support. So it should just work, and if it doesn't then
the problem lies elsewhere. If this is not acceptable, feel free to drop
the last four patches.
ChenYu
Chen-Yu Tsai (9):
sunxi: rename Bananapi M3 dts file name
sunxi: Enable eMMC on Cubietruck Plus
sunxi: Fix USB PHY control register offset for A83T
sunxi: Switch MUSB to gadget mode on the Bananapi M3
sunxi: Switch MUSB to gadget mode on the Cubietruck Plus
net: sun8i_emac: Support RX/TX delay chains
net: sun8i_emac: Fix build for non-H3/H5 SoCs
sunxi: Enable EMAC on the Cubietruck Plus
sunxi: Enable EMAC on the Bananapi M3
arch/arm/dts/Makefile | 4 +--
arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi| 41 ++
...ovoip-bpi-m3.dts => sun8i-a83t-bananapi-m3.dts} | 0
.../arm/dts/sun8i-a83t-cubietruck-plus-u-boot.dtsi | 39
arch/arm/mach-sunxi/usb_phy.c | 2 +-
configs/Cubietruck_plus_defconfig | 4 ++-
configs/Sinovoip_BPI_M3_defconfig | 5 +--
drivers/net/sun8i_emac.c | 28 +++
8 files changed, 117 insertions(+), 6 deletions(-)
create mode 100644 arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi
rename arch/arm/dts/{sun8i-a83t-sinovoip-bpi-m3.dts =>
sun8i-a83t-bananapi-m3.dts} (100%)
create mode 100644 arch/arm/dts/sun8i-a83t-cubietruck-plus-u-boot.dtsi
--
2.14.1
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[U-Boot] [PATCH 2/9] sunxi: Enable eMMC on Cubietruck Plus
Set CONFIG_MMC_SUNXI_SLOT_EXTRA=2 to enable the eMMC controller to access eMMC on the board. Signed-off-by: Chen-Yu Tsai --- configs/Cubietruck_plus_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig index 3ec0bd09..3d999192cbc1 100644 --- a/configs/Cubietruck_plus_defconfig +++ b/configs/Cubietruck_plus_defconfig @@ -4,6 +4,7 @@ CONFIG_MACH_SUN8I_A83T=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=15355 CONFIG_DRAM_ODT_EN=y +CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB0_VBUS_PIN="AXP0-VBUS-ENABLE" CONFIG_USB0_VBUS_DET="AXP0-VBUS-DETECT" CONFIG_USB0_ID_DET="PH11" -- 2.14.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 6/9] net: sun8i_emac: Support RX/TX delay chains
The EMAC syscon has configurable RX/TX delay chains for use with RGMII
PHYs.
This adds support for configuring them via device tree properties. The
property names and format were defined in Linux's dwmac-sun8i binding
that was merged at one point.
Signed-off-by: Chen-Yu Tsai
---
drivers/net/sun8i_emac.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 09bbb2cdb5ca..5fa1b4c170d7 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -56,6 +56,10 @@
#define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */
#define SC_RMII_EN BIT(13)
+#define SC_TXDC_SHIFT 10
+#define SC_TXDC_MASK GENMASK(2, 0)
+#define SC_RXDC_SHIFT 5
+#define SC_RXDC_MASK GENMASK(4, 0)
#define SC_EPITBIT(2) /* 1: RGMII, 0: MII */
#define SC_ETCS_MASK GENMASK(1, 0)
#define SC_ETCS_EXT_GMII 0x1
@@ -125,6 +129,8 @@ struct emac_eth_dev {
u32 addr;
u32 tx_slot;
bool use_internal_phy;
+ u32 tx_delay;
+ u32 rx_delay;
enum emac_variant variant;
void *mac_reg;
@@ -290,6 +296,12 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv)
if (priv->variant == H3_EMAC || priv->variant == A64_EMAC)
reg &= ~SC_RMII_EN;
+ /* Configure RX/TX delay chains */
+ reg &= ~(SC_RXDC_MASK << SC_RXDC_SHIFT);
+ reg &= ~(SC_TXDC_MASK << SC_TXDC_SHIFT);
+ reg |= (priv->rx_delay & SC_RXDC_MASK) << SC_RXDC_SHIFT;
+ reg |= (priv->tx_delay & SC_TXDC_MASK) << SC_TXDC_SHIFT;
+
switch (priv->interface) {
case PHY_INTERFACE_MODE_MII:
/* default */
@@ -836,6 +848,19 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct
udevice *dev)
}
#endif
+ /* Get RX/TX delays for RGMII */
+ priv->rx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
+"allwinner,rx-delay-ps", 0);
+ if (priv->rx_delay % 100 || priv->rx_delay > 3100)
+ debug("%s: invalid rx delay value\n", __func__);
+ priv->rx_delay /= 100;
+
+ priv->tx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev),
+"allwinner,tx-delay-ps", 0);
+ if (priv->tx_delay % 100 || priv->tx_delay > 800)
+ debug("%s: invalid tx delay value\n", __func__);
+ priv->tx_delay /= 100;
+
return 0;
}
--
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[U-Boot] [PATCH 8/9] sunxi: Enable EMAC on the Cubietruck Plus
The Cubietruck Plus has an RTL8211E PHY connected to the EMAC using
RGMII. The PHY is powered by DLDO4 @ 3.3V, while the I/O pins are
powered by DLDO3 @ 2.5V.
This patch adds a U-boot specific dtsi file for the board adding
an enabled EMAC node, and enables the EMAC driver in the defconfig.
The binding used here is the old revision currently supported in
U-boot. There is no stable binding nor support in upstream Linux
at this time.
Signed-off-by: Chen-Yu Tsai
---
.../arm/dts/sun8i-a83t-cubietruck-plus-u-boot.dtsi | 39 ++
configs/Cubietruck_plus_defconfig | 1 +
2 files changed, 40 insertions(+)
create mode 100644 arch/arm/dts/sun8i-a83t-cubietruck-plus-u-boot.dtsi
diff --git a/arch/arm/dts/sun8i-a83t-cubietruck-plus-u-boot.dtsi
b/arch/arm/dts/sun8i-a83t-cubietruck-plus-u-boot.dtsi
new file mode 100644
index ..b4e216c14264
--- /dev/null
+++ b/arch/arm/dts/sun8i-a83t-cubietruck-plus-u-boot.dtsi
@@ -0,0 +1,39 @@
+#include "sunxi-u-boot.dtsi"
+
+/ {
+ aliases {
+ ethernet0 = &emac;
+ };
+
+ soc {
+ emac: ethernet@01c3 {
+ compatible = "allwinner,sun8i-a83t-emac";
+ reg = <0x01c3 0x2000>, <0x01c00030 0x4>;
+ reg-names = "emac", "syscon";
+ interrupts = ;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy = <&phy1>;
+ status = "okay";
+
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+ };
+ };
+};
+
+&pio {
+ rgmii_pins: rgmii_pins {
+ allwinner,pins = "PD8", "PD9", "PD10", "PD11",
+"PD12", "PD13", "PD15",
+"PD16", "PD17", "PD18", "PD19",
+"PD20", "PD21", "PD22", "PD23";
+ allwinner,function = "emac";
+ allwinner,drive = <3>;
+ allwinner,pull = <0>;
+ };
+};
diff --git a/configs/Cubietruck_plus_defconfig
b/configs/Cubietruck_plus_defconfig
index 3aefcc58413c..ee8b901d0d08 100644
--- a/configs/Cubietruck_plus_defconfig
+++ b/configs/Cubietruck_plus_defconfig
@@ -22,6 +22,7 @@ CONFIG_SPL=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
CONFIG_AXP_DLDO3_VOLT=2500
CONFIG_AXP_DLDO4_VOLT=3300
CONFIG_AXP_FLDO1_VOLT=1200
--
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[U-Boot] [PATCH 7/9] net: sun8i_emac: Fix build for non-H3/H5 SoCs
Only the H3/H5 SoCs have an internal PHY and its related clock and
reset controls.
Use an #ifdef to guard the internal PHY control code block so it
can be built for other SoCs, such as the A83T or A64.
Signed-off-by: Chen-Yu Tsai
---
drivers/net/sun8i_emac.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index 5fa1b4c170d7..0a98a04967da 100644
--- a/drivers/net/sun8i_emac.c
+++ b/drivers/net/sun8i_emac.c
@@ -616,6 +616,8 @@ static void sun8i_emac_board_setup(struct emac_eth_dev
*priv)
{
struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+#ifdef CONFIG_MACH_SUNXI_H3_H5
+ /* Only H3/H5 have clock controls for internal EPHY */
if (priv->use_internal_phy) {
/* Set clock gating for ephy */
setbits_le32(&ccm->bus_gate4, BIT(AHB_GATE_OFFSET_EPHY));
@@ -623,6 +625,7 @@ static void sun8i_emac_board_setup(struct emac_eth_dev
*priv)
/* Deassert EPHY */
setbits_le32(&ccm->ahb_reset2_cfg, BIT(AHB_RESET_OFFSET_EPHY));
}
+#endif
/* Set clock gating for emac */
setbits_le32(&ccm->ahb_gate0, BIT(AHB_GATE_OFFSET_GMAC));
--
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[U-Boot] [PATCH 9/9] sunxi: Enable EMAC on the Bananapi M3
The Bananapi M3 has an RTL8211E PHY connected to the EMAC using
RGMII. The PHY is powered by DCDC1 through SW @ 3.3V.
This patch adds a U-boot specific dtsi file for the board adding
an enabled EMAC node, and enables the EMAC driver in the defconfig.
The binding used here is the old revision currently supported in
U-boot. There is no stable binding nor support in upstream Linux
at this time.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi | 41 +
configs/Sinovoip_BPI_M3_defconfig | 1 +
2 files changed, 42 insertions(+)
create mode 100644 arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi
diff --git a/arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi
b/arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi
new file mode 100644
index ..9c7977e67b92
--- /dev/null
+++ b/arch/arm/dts/sun8i-a83t-bananapi-m3-u-boot.dtsi
@@ -0,0 +1,41 @@
+#include "sunxi-u-boot.dtsi"
+
+/ {
+ aliases {
+ ethernet0 = &emac;
+ };
+
+ soc {
+ emac: ethernet@01c3 {
+ compatible = "allwinner,sun8i-a83t-emac";
+ reg = <0x01c3 0x2000>, <0x01c00030 0x4>;
+ reg-names = "emac", "syscon";
+ interrupts = ;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy = <&phy1>;
+ allwinner,rx-delay-ps = <700>;
+ allwinner,tx-delay-ps = <700>;
+ status = "okay";
+
+ phy1: ethernet-phy@1 {
+ reg = <1>;
+ };
+ };
+ };
+};
+
+&pio {
+ rgmii_pins: rgmii_pins {
+ allwinner,pins = "PD8", "PD9", "PD10", "PD11",
+"PD12", "PD13", "PD15",
+"PD16", "PD17", "PD18", "PD19",
+"PD20", "PD21", "PD22", "PD23";
+ allwinner,function = "emac";
+ allwinner,drive = <3>;
+ allwinner,pull = <0>;
+ };
+};
diff --git a/configs/Sinovoip_BPI_M3_defconfig
b/configs/Sinovoip_BPI_M3_defconfig
index e48983fc3310..efdf3c7396fd 100644
--- a/configs/Sinovoip_BPI_M3_defconfig
+++ b/configs/Sinovoip_BPI_M3_defconfig
@@ -23,6 +23,7 @@ CONFIG_SPL=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_ISO_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
+CONFIG_SUN8I_EMAC=y
CONFIG_AXP_DCDC5_VOLT=1200
CONFIG_AXP_DLDO3_VOLT=2500
CONFIG_AXP_SW_ON=y
--
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[U-Boot] [PATCH 5/9] sunxi: Switch MUSB to gadget mode on the Cubietruck Plus
The Cubietruck Plus has a micro-USB OTG port. It supports both host and gadget mode. Having the OTG port operate in gadget mode is more useful, as we can use it for fastboot or Ethernet over USB. The board has 2 other USB host ports that are supported. These can be used for connecting peripherals. Signed-off-by: Chen-Yu Tsai --- configs/Cubietruck_plus_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/Cubietruck_plus_defconfig b/configs/Cubietruck_plus_defconfig index 3d999192cbc1..3aefcc58413c 100644 --- a/configs/Cubietruck_plus_defconfig +++ b/configs/Cubietruck_plus_defconfig @@ -26,5 +26,5 @@ CONFIG_AXP_DLDO3_VOLT=2500 CONFIG_AXP_DLDO4_VOLT=3300 CONFIG_AXP_FLDO1_VOLT=1200 CONFIG_USB_EHCI_HCD=y -CONFIG_USB_MUSB_HOST=y +CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -- 2.14.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 4/9] sunxi: Switch MUSB to gadget mode on the Bananapi M3
The Bananapi M3 has a micro-USB OTG port. It supports both host and gadget mode. Having the OTG port operate in gadget mode is more useful, as we can use it for fastboot or Ethernet over USB. The board has 2 other USB host ports that are supported. These can be used for connecting peripherals. Signed-off-by: Chen-Yu Tsai --- configs/Sinovoip_BPI_M3_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/Sinovoip_BPI_M3_defconfig b/configs/Sinovoip_BPI_M3_defconfig index f321d94e04eb..e48983fc3310 100644 --- a/configs/Sinovoip_BPI_M3_defconfig +++ b/configs/Sinovoip_BPI_M3_defconfig @@ -27,5 +27,5 @@ CONFIG_AXP_DCDC5_VOLT=1200 CONFIG_AXP_DLDO3_VOLT=2500 CONFIG_AXP_SW_ON=y CONFIG_USB_EHCI_HCD=y -CONFIG_USB_MUSB_HOST=y +CONFIG_USB_MUSB_GADGET=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y -- 2.14.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] sun50i: h5: Add NanoPi Neo Plus2 DT initial support
Hi Antony,
On Thu, Sep 21, 2017 at 03:22:17PM +, Antony Antony wrote:
> Add initial DT for NanoPi NEO Plus2 by FriendlyARM
> - Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
> - 1 GB DDR3 RAM
> - 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
> - micro SD card slot
> - Gigabit Ethernet (external RTL8211E-VB-CG chip)
> - 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
> - 2x USB 2.0 host ports
>
> Signed-off-by: Antony Antony
> Tested-by: Antony Antony
You don't really need the tested-by, we kind of expect you to have
tested it already :)
> ---
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 113
>
> configs/nanopi_neo_plus2_defconfig | 21 ++
> 3 files changed, 135 insertions(+)
> create mode 100644 arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
> create mode 100644 configs/nanopi_neo_plus2_defconfig
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index fee4680..295a675 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -333,6 +333,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
> sun8i-v3s-licheepi-zero.dtb
> dtb-$(CONFIG_MACH_SUN50I_H5) += \
> sun50i-h5-nanopi-neo2.dtb \
> + sun50i-h5-nanopi-neo-plus2.dtb \
> sun50i-h5-orangepi-pc2.dtb \
> sun50i-h5-orangepi-prime.dtb \
> sun50i-h5-orangepi-zero-plus2.dtb
> diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
> b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
> new file mode 100644
> index 000..7d12774
> --- /dev/null
> +++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
> @@ -0,0 +1,113 @@
> +/*
> + * Copyright (C) 2017 Antony Antony
> + * Copyright (c) 2016 ARM Ltd.
> + *
> + * This file is dual-licensed: you can use it either under the terms
> + * of the GPL or the X11 license, at your option. Note that this dual
> + * licensing only applies to this file, and not this project as a
> + * whole.
> + *
> + * a) This library is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of the
> + * License, or (at your option) any later version.
> + *
> + * This library is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * Or, alternatively,
> + *
> + * b) Permission is hereby granted, free of charge, to any person
> + * obtaining a copy of this software and associated documentation
> + * files (the "Software"), to deal in the Software without
> + * restriction, including without limitation the rights to use,
> + * copy, modify, merge, publish, distribute, sublicense, and/or
> + * sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following
> + * conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> + * included in all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
> + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
> + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +/dts-v1/;
> +
> +#include "sun50i-h5.dtsi"
> +
> +#include
> +
> +/ {
> + model = "FriendlyARM NanoPi NEO Plus 2";
> + compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
> +
> + aliases {
> + serial0 = &uart0;
> + };
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + memory {
> + reg = <0x4000 0x4000>;
> + };
That is going to be automatically added, there's no need for it.
> + reg_vcc3v3: vcc3v3 {
> + compatible = "regulator-fixed";
> + regulator-name = "vcc3v3";
> + regulator-min-microvolt = <330>;
> + regulator-max-microvolt = <330>;
> + };
> +};
> +
> +&ehci1 {
> + status = "okay";
> +};
> +
> +&mmc0 {
> + compatible = "allwinner,sun50i-h5-mmc",
> + "allwinner,sun50i-a64-mmc",
> + "allwinner,sun5i-a13-mmc";
It's not compatible with the A13.
> + pinctrl-names = "default";
> + pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
> + vmmc-supply = <®_vcc3v3>;
> + bus-width = <4>;
> + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
> + cd-inverted;
> +
[U-Boot] Armada 38x clearfog pci trouble
Hello. I have a clearfog base board with PCI-E video card based on SIlicon Motion s750 (InnoDisk EMPV-1201), and i have trouble with u-boot and accessing to this card. I use last u-boot from git, and when i try to read memory from Base address 0 of PCI-E, board resetted. log from board: High speed PHY - Version: 2.0 Detected Device ID 6828 board SerDes lanes topology details: | Lane # | Speed | Type | | 0| 3 | SATA0 | | 1| 0 | SGMII1 | | 2| 5 | PCIe1 | | 3| 5 | USB3 HOST1 | | 4| 5 | PCIe2 | | 5| 0 | SGMII2 | :** Link is Gen1, check the EP capability PCIe, Idx 1: remains Gen1 PCIe, Idx 2: detected no link High speed PHY - Ended Successfully DDR3 Training Sequence - Ver TIP-1.29.0 DDR3 Training Sequence - Switching XBAR Window to FastPath Window DDR3 Training Sequence - Ended Successfully Trying to boot from MMC1 U-Boot 2017.09-00255-ge884656c2c-dirty (Sep 22 2017 - 09:05:09 +0300) SoC: MV88F6828-A0 at 1600 MHz I2C: ready DRAM: 1 GiB (800 MHz, ECC not enabled) MMC: mv_sdh: 0 PCI: 00:01.0 - 126f:0750 - Display controller Model: SolidRun Clearfog A1 Board: SolidRun ClearFog Net: eth2: ethernet@3, eth3: ethernet@34000, eth1: ethernet@7 Hit any key to stop autoboot: 0 => pci Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _ 00.01.00 0x126f 0x0750 Display controller 0x00 => pci header 00.01.00 vendor ID = 0x126f device ID = 0x0750 command register ID = 0x0007 status register = 0x0010 revision ID = 0xa1 class code = 0x03 (Display controller) sub class code = 0x00 programming interface = 0x00 cache line = 0x08 latency time =0x00 header type = 0x00 BIST =0x00 base address 0 = 0xfc08 base address 1 = 0xe800 base address 2 = 0x base address 3 = 0x base address 4 = 0x base address 5 = 0x cardBus CIS pointer = 0x sub system vendor ID =0x126f sub system ID = 0x0750 expansion ROM base address = 0xe820 interrupt line = 0xff interrupt pin = 0x01 min Grant = 0x00 max Latency = 0x00 => md.l 0xe800 10 e800: 20a0 0160 01f0 01765324... `...$Sv. e810: 01765324 $Sv. e820: 0008 e830: => md.l 0xfc08 10 fc08:data abort pc : [<3ffb8104>] lr : [<3ffb80e0>] reloc pc : [<0083a104>]lr : [<0083a0e0>] sp : 3fb68950 ip : 0002 fp : fc08 r10: fc08 r9 : 3fb6ded8 r8 : 0004 r7 : r6 : 0004 r5 : 0004 r4 : 0010 r3 : fc08 r2 : 003a r1 : 3fb68964 r0 : 0009 Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... resetting ... :05:09) High speed PHY - Version: 2.0 Detected Device ID 6828 board SerDes lanes topology details: | Lane # | Speed | Type | | 0| 3 | SATA0 | | 1| 0 | SGMII1 | | 2| 5 | PCIe1 | | 3| 5 | USB3 HOST1 | | 4| 5 | PCIe2 | | 5| 0 | SGMII2 | :** Link is Gen1, check the EP capability PCIe, Idx 1: remains Gen1 PCIe, Idx 2: detected no link High speed PHY - Ended Successfully DDR3 Training Sequence - Ver TIP-1.29.0 DDR3 Training Sequence - Switching XBAR Window to FastPath Window DDR3 Training Sequence - Ended Successfully Trying to boot from MMC1 U-Boot 2017.09-00255-ge884656c2c-dirty (Sep 22 2017 - 09:05:09 +0300) SoC: MV88F6828-A0 at 1600 MHz I2C: ready DRAM: 1 GiB (800 MHz, ECC not enabled) MMC: mv_sdh: 0 PCI: 00:01.0 - 126f:0750 - Display controller Model: SolidRun Clearfog A1 Board: SolidRun ClearFog Net: eth2: ethernet@3, eth3: ethernet@34000, eth1: ethernet@7 Hit any key to stop autoboot: 0 => As you can see, memory from base address 1 readed sucessfully. What is the problem and how i can fix this? Feel free to ask logs or something other, i grant it for you ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Armada 38x clearfog pci trouble
Hello. I have a clearfog base board with PCI-E video card based on SIlicon Motion s750 (InnoDisk EMPV-1201), and i have trouble with u-boot and accessing to this card. I use last u-boot from git, and when i try to read memory from Base address 0 of PCI-E, board resetted. log from board: High speed PHY - Version: 2.0 Detected Device ID 6828 board SerDes lanes topology details: | Lane # | Speed | Type | | 0| 3 | SATA0 | | 1| 0 | SGMII1 | | 2| 5 | PCIe1 | | 3| 5 | USB3 HOST1 | | 4| 5 | PCIe2 | | 5| 0 | SGMII2 | :** Link is Gen1, check the EP capability PCIe, Idx 1: remains Gen1 PCIe, Idx 2: detected no link High speed PHY - Ended Successfully DDR3 Training Sequence - Ver TIP-1.29.0 DDR3 Training Sequence - Switching XBAR Window to FastPath Window DDR3 Training Sequence - Ended Successfully Trying to boot from MMC1 U-Boot 2017.09-00255-ge884656c2c-dirty (Sep 22 2017 - 09:05:09 +0300) SoC: MV88F6828-A0 at 1600 MHz I2C: ready DRAM: 1 GiB (800 MHz, ECC not enabled) MMC: mv_sdh: 0 PCI: 00:01.0 - 126f:0750 - Display controller Model: SolidRun Clearfog A1 Board: SolidRun ClearFog Net: eth2: ethernet@3, eth3: ethernet@34000, eth1: ethernet@7 Hit any key to stop autoboot: 0 => pci Scanning PCI devices on bus 0 BusDevFun VendorId DeviceId Device Class Sub-Class _ 00.01.00 0x126f 0x0750 Display controller 0x00 => pci header 00.01.00 vendor ID = 0x126f device ID = 0x0750 command register ID = 0x0007 status register = 0x0010 revision ID = 0xa1 class code = 0x03 (Display controller) sub class code = 0x00 programming interface = 0x00 cache line = 0x08 latency time =0x00 header type = 0x00 BIST =0x00 base address 0 = 0xfc08 base address 1 = 0xe800 base address 2 = 0x base address 3 = 0x base address 4 = 0x base address 5 = 0x cardBus CIS pointer = 0x sub system vendor ID =0x126f sub system ID = 0x0750 expansion ROM base address = 0xe820 interrupt line = 0xff interrupt pin = 0x01 min Grant = 0x00 max Latency = 0x00 => md.l 0xe800 10 e800: 20a0 0160 01f0 01765324... `...$Sv. e810: 01765324 $Sv. e820: 0008 e830: => md.l 0xfc08 10 fc08:data abort pc : [<3ffb8104>] lr : [<3ffb80e0>] reloc pc : [<0083a104>]lr : [<0083a0e0>] sp : 3fb68950 ip : 0002 fp : fc08 r10: fc08 r9 : 3fb6ded8 r8 : 0004 r7 : r6 : 0004 r5 : 0004 r4 : 0010 r3 : fc08 r2 : 003a r1 : 3fb68964 r0 : 0009 Flags: nZCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... resetting ... :05:09) High speed PHY - Version: 2.0 Detected Device ID 6828 board SerDes lanes topology details: | Lane # | Speed | Type | | 0| 3 | SATA0 | | 1| 0 | SGMII1 | | 2| 5 | PCIe1 | | 3| 5 | USB3 HOST1 | | 4| 5 | PCIe2 | | 5| 0 | SGMII2 | :** Link is Gen1, check the EP capability PCIe, Idx 1: remains Gen1 PCIe, Idx 2: detected no link High speed PHY - Ended Successfully DDR3 Training Sequence - Ver TIP-1.29.0 DDR3 Training Sequence - Switching XBAR Window to FastPath Window DDR3 Training Sequence - Ended Successfully Trying to boot from MMC1 U-Boot 2017.09-00255-ge884656c2c-dirty (Sep 22 2017 - 09:05:09 +0300) SoC: MV88F6828-A0 at 1600 MHz I2C: ready DRAM: 1 GiB (800 MHz, ECC not enabled) MMC: mv_sdh: 0 PCI: 00:01.0 - 126f:0750 - Display controller Model: SolidRun Clearfog A1 Board: SolidRun ClearFog Net: eth2: ethernet@3, eth3: ethernet@34000, eth1: ethernet@7 Hit any key to stop autoboot: 0 => As you can see, memory from base address 1 readed sucessfully. What is the problem and how i can fix this? Feel free to ask logs or something other, i grant it for you ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/1] ARMv8: get new GD address from gd->new_gd directly
From: zijun_hu the new GD address is calculated via board data BD currently it require the new GD area locates below BD tightly, so a strict constraint is imposed on memory layout which maybe make special platform unpleasant. fix it by getting new GD address from gd->new_gd directly. Signed-off-by: zijun_hu --- arch/arm/lib/crt0_64.S | 3 +-- lib/asm-offsets.c | 2 ++ 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/lib/crt0_64.S b/arch/arm/lib/crt0_64.S index 62fad45..9c46c93 100644 --- a/arch/arm/lib/crt0_64.S +++ b/arch/arm/lib/crt0_64.S @@ -95,8 +95,7 @@ ENTRY(_main) */ ldr x0, [x18, #GD_START_ADDR_SP]/* x0 <- gd->start_addr_sp */ bic sp, x0, #0xf/* 16-byte alignment for ABI compliance */ - ldr x18, [x18, #GD_BD] /* x18 <- gd->bd */ - sub x18, x18, #GD_SIZE /* new GD is below bd */ + ldr x18, [x18, #GD_NEW_GD] /* x18 <- gd->new_gd */ adr lr, relocation_return ldr x9, [x18, #GD_RELOC_OFF]/* x9 <- gd->reloc_off */ diff --git a/lib/asm-offsets.c b/lib/asm-offsets.c index b04f7c6..f4f1bb8 100644 --- a/lib/asm-offsets.c +++ b/lib/asm-offsets.c @@ -38,5 +38,7 @@ int main(void) DEFINE(GD_START_ADDR_SP, offsetof(struct global_data, start_addr_sp)); + DEFINE(GD_NEW_GD, offsetof(struct global_data, new_gd)); + return 0; } -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] armv8: Apply workaround for USB erratum A-009007 to LS1088A
Rx Compliance tests may fail intermittently at high jitter frequencies using default register values. Program register USB_PHY_RX_OVRD_IN_HI in certain sequence to make the Rx compliance test pass. Signed-off-by: Ran Wang --- arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 1 + arch/arm/cpu/armv8/fsl-layerscape/soc.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig index 3518d8601d..85b7c70937 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig @@ -72,6 +72,7 @@ config ARCH_LS1088A select SYS_FSL_ERRATUM_A010165 select SYS_FSL_ERRATUM_A008511 select SYS_FSL_ERRATUM_A008850 + select SYS_FSL_ERRATUM_A009007 select SYS_FSL_HAS_CCI400 select SYS_FSL_HAS_DDR4 select SYS_FSL_HAS_RGMII diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index 6698c0467d..53620ebf19 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -127,7 +127,7 @@ static void erratum_a008997(void) out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_3); \ out_be16((phy) + SCFG_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_4) -#elif defined(CONFIG_ARCH_LS2080A) +#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) #define PROGRAM_USB_PHY_RX_OVRD_IN_HI(phy) \ out_le16((phy) + DCSR_USB_PHY_RX_OVRD_IN_HI, USB_PHY_RX_EQ_VAL_1); \ @@ -149,7 +149,7 @@ static void erratum_a009007(void) usb_phy = (void __iomem *)SCFG_USB_PHY3; PROGRAM_USB_PHY_RX_OVRD_IN_HI(usb_phy); -#elif defined(CONFIG_ARCH_LS2080A) +#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) void __iomem *dcsr = (void __iomem *)DCSR_BASE; PROGRAM_USB_PHY_RX_OVRD_IN_HI(dcsr + DCSR_USB_PHY1); -- 2.14.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/3] dts: sunxi: add PWM node for sun50i
Hi Vasily,
On 22/09/17 05:45, Vasily Khoruzhick wrote:
> On Thu, Sep 21, 2017 at 12:27 AM, Maxime Ripard
> wrote:
>> On Thu, Sep 21, 2017 at 06:07:04AM +, Vasily Khoruzhick wrote:
>>> Add PWM definition to sun50i-a64.dtsi - it's compatible with PWM found on H3
>>>
>>> Signed-off-by: Vasily Khoruzhick
>>> ---
>>> v2: - drop 'sun50i-a64-pwm' compatible string and use 'sun8i-h3-pwm'
>>> instead,
>>> since A64 PWM is compatible with one on H3
>>>
>>> arch/arm/dts/sun50i-a64.dtsi | 8
>>> 1 file changed, 8 insertions(+)
>>>
>>> diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi
>>> index 65a344d9ce..00132855ff 100644
>>> --- a/arch/arm/dts/sun50i-a64.dtsi
>>> +++ b/arch/arm/dts/sun50i-a64.dtsi
>>> @@ -319,6 +319,14 @@
>>> };
>>> };
>>>
>>> + pwm: pwm@01c21400 {
>>> + compatible = "allwinner,sun8i-h3-pwm";
>>
>> You'd need both compatible. The A64 you used to have, plus that one.
>
> Why? Hardware seems to be identical and I see a number of non-A64
> compatibles in sun50i-a64.dtsi.
> What's rationale behind adding a new string?
Two reasons:
1) The DT should say what it is, namely the PWM controller in the A64 SoC.
2) We don't know *for sure* that's really identical. It seems to be from
*our* driver's perspective, but there might be bugs in this particular
implementation or some specialities. Should we discover this (in the
future), we can add the special handling to the driver and bind it to
this compatible string. But the DT does not need any change. Which is
good, because it's supposed to live in the firmware.
So it should read:
compatible = "allwinner,sun50i-a64-pwm",
"allwinner,sun8i-h3-pwm";
The DT parsing code won't find a match for the first string, but then
fall back on trying the second (or third, ...).
The only thing that would need to be done is to add this new string to
the binding documentation, mainly to reserve the name.
Cheers,
Andre.
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Re: [U-Boot] [PATCH v2 09/14] sunxi: imply USB_GADGET
Hi, On Fri, Sep 22, 2017 at 03:20:33AM +, Chen-Yu Tsai wrote: > On Wed, Sep 13, 2017 at 3:01 AM, Maxime Ripard > wrote: > > A good number of our boards have USB_GADGET enabled. Imply it so that all > > the boards can benefit from it, and remove some boilerplate from our > > defconfigs. > > > > Reviewed-by: Simon Glass > > Signed-off-by: Maxime Ripard > > This breaks builds using defconfigs where USB_MUSB_GADGET is not set. > Perhaps a better solution would be to imply USB_GADGET from USB_MUSB_GADGET? > Kconfig complains about recursive dependencies if I do > > imply USB_GADGET if USB_MUSB_GADGET > > under ARCH_SUNXI though. Thanks, I just pushed a fix for it. Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 2/9] sunxi: Enable eMMC on Cubietruck Plus
On Fri, Sep 22, 2017 at 07:26:28AM +, Chen-Yu Tsai wrote: > Set CONFIG_MMC_SUNXI_SLOT_EXTRA=2 to enable the eMMC controller to > access eMMC on the board. > > Signed-off-by: Chen-Yu Tsai Applied, thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 1/9] sunxi: rename Bananapi M3 dts file name
On Fri, Sep 22, 2017 at 07:26:27AM +, Chen-Yu Tsai wrote:
> The upstream (Linux) device tree file for the Bananapi M3 follows the
> convention of using the well known brand name, instead of the vendor
> name, for naming. The file was recently added to upstream in commit
> 359b5a1e1c2d ("ARM: sun8i: a83t: Add device tree for Sinovoip Bananapi
> BPI-M3")
>
> Rename the device tree file in U-boot to match.
>
> Signed-off-by: Chen-Yu Tsai
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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Re: [U-Boot] [PATCH 1/2] configs: colibri_imx6: don't configure video in spl
On 21/09/2017 18:58, Max Krummenacher wrote: > The functionality is not needed in the SPL. It allows to remove > code conditionally in the spl case in some drivers. > > Signed-off-by: Max Krummenacher > --- > > include/configs/colibri_imx6.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h > index 5fd9aab..b02a291 100644 > --- a/include/configs/colibri_imx6.h > +++ b/include/configs/colibri_imx6.h > @@ -94,6 +94,7 @@ > #define CONFIG_MXC_GPIO > > /* Framebuffer and LCD */ > +#if !defined(CONFIG_SPL_BUILD) > #define CONFIG_VIDEO_IPUV3 > #define CONFIG_SYS_CONSOLE_IS_IN_ENV > #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE > @@ -106,6 +107,7 @@ > #define CONFIG_CONSOLE_MUX > #define CONFIG_IMX_HDMI > #define CONFIG_IMX_VIDEO_SKIP > +#endif > > /* allow to overwrite serial and ethaddr */ > #define CONFIG_ENV_OVERWRITE > Thanks for patch ! Reviewed-by: Stefano Babic Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2] imx: sys_proto: Add a prototype for board_mmc_get_env_dev()
Hi Diego, On 21/09/2017 20:10, Diego Dorta wrote: > When compiling with W=1 the following warning is observed: > > board/freescale/mx6sabresd/mx6sabresd.c:266:5: warning: > no previous prototype for ‘board_mmc_get_env_dev’ > [-Wmissing-prototypes] int board_mmc_get_env_dev(int devno) > > Remove this warning by adding the function prototype into sys_proto.h file. > > Signed-off-by: Diego Dorta > --- > Changes since v1: > - Add 'mmc' prefix > - Change function prototype to sys_proto.h > - Update commit log accordingly > > arch/arm/include/asm/mach-imx/sys_proto.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h > b/arch/arm/include/asm/mach-imx/sys_proto.h > index 970c4ca..7036343 100644 > --- a/arch/arm/include/asm/mach-imx/sys_proto.h > +++ b/arch/arm/include/asm/mach-imx/sys_proto.h > @@ -107,6 +107,8 @@ void init_aips(void); > void init_src(void); > void imx_set_wdog_powerdown(bool enable); > > +int board_mmc_get_env_dev(int devno); > + > /* > * Initializes on-chip ethernet controllers. > * to override, implement board_eth_init() > Reviewed-by: Stefano Babic Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH V4 01/12] scripts: spl: fix typo
On 21/09/2017 04:19, Peng Fan wrote: > For the patchset, Ping.. > I know, this is in my TODO list. I will review them soon. Thanks for patience. Regards, Stefano > Thanks, > Peng. > On Wed, Aug 30, 2017 at 02:14:42PM +0800, Peng Fan wrote: >> Typo fix: CONIFG->CONFIG >> >> Signed-off-by: Peng Fan >> Cc: Tom Rini >> --- >> >> V2: new >> V3: none >> V4: none >> >> scripts/Makefile.uncmd_spl | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/scripts/Makefile.uncmd_spl b/scripts/Makefile.uncmd_spl >> index 15d0836..b399411 100644 >> --- a/scripts/Makefile.uncmd_spl >> +++ b/scripts/Makefile.uncmd_spl >> @@ -9,7 +9,7 @@ ifdef CONFIG_SPL_BUILD >> ifndef CONFIG_SPL_DM >> CONFIG_DM_SERIAL= >> CONFIG_DM_GPIO= >> -CONIFG_DM_I2C= >> +CONFIG_DM_I2C= >> CONFIG_DM_SPI= >> CONFIG_DM_SPI_FLASH= >> endif >> -- >> 2.6.6 >> -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] How to bring in support for GnuBee on MediaTek MT7621A
Hi 10 days ago one of first https://www.crowdsupply.com/gnubee/personal-cloud-1 systems arrived at my home and is now running happily my preferred Linux distribution Debian. I put on a small web page for it under http://gnubee.org/ index.html. I am however not satisfied with the situation on how my Debian boots, why relies on out of the tree https://github.com/gnubee-git/GnuBee_PCx_uboot boots initram from a fork of the LEDE (itself a OpenWRT fork) from https:// github.com/gnubee-git/GnuBee-lede, which uses then a root partition created with debootstrap. One of the steps to support this board fully under Debian would be bringing its U-Boot code into mainline U-Boot, which takes some time and effort. As I added 10 years ago two PPC4xx based boards to U-Boot, I think this is a doable task for me. Before working on my clone of git://git.denx.de/u-boot-mpc5xxx.git I would however ask, whether patches with source code GnuBee_PCx_uboot would be accepted as I am clearly NOT the copyright owner of it. Best regards Niklaus ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 7/9] net: sun8i_emac: Fix build for non-H3/H5 SoCs
On Fri, Sep 22, 2017 at 07:26:33AM +, Chen-Yu Tsai wrote: > Only the H3/H5 SoCs have an internal PHY and its related clock and > reset controls. > > Use an #ifdef to guard the internal PHY control code block so it > can be built for other SoCs, such as the A83T or A64. > > Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 3/9] sunxi: Fix USB PHY control register offset for A83T
Hi
On Fri, Sep 22, 2017 at 07:26:29AM +, Chen-Yu Tsai wrote:
> It was recently discovered that the USB PHY control register offset on
> the A83T is 0x410 like on the A33, not 0x404. Fix it.
>
> Fixes: 0c935acb9e5d ("sunxi: usb_phy: Add support for A83T USB PHYs")
> Signed-off-by: Chen-Yu Tsai
Ok, so I think I screw this one up.
I had already a patch for that that was queued by Jagan into another
branch.
I've merged both branches, it should superseed this patch.
Maxime
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Embedded Linux and Kernel engineering
http://free-electrons.com
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Re: [U-Boot] [PATCH 6/9] net: sun8i_emac: Support RX/TX delay chains
On Fri, Sep 22, 2017 at 07:26:32AM +, Chen-Yu Tsai wrote: > The EMAC syscon has configurable RX/TX delay chains for use with RGMII > PHYs. > > This adds support for configuring them via device tree properties. The > property names and format were defined in Linux's dwmac-sun8i binding > that was merged at one point. > > Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 4/9] sunxi: Switch MUSB to gadget mode on the Bananapi M3
On Fri, Sep 22, 2017 at 07:26:30AM +, Chen-Yu Tsai wrote: > The Bananapi M3 has a micro-USB OTG port. It supports both host and > gadget mode. Having the OTG port operate in gadget mode is more useful, > as we can use it for fastboot or Ethernet over USB. > > The board has 2 other USB host ports that are supported. These can be > used for connecting peripherals. > > Signed-off-by: Chen-Yu Tsai > --- > configs/Sinovoip_BPI_M3_defconfig | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/configs/Sinovoip_BPI_M3_defconfig > b/configs/Sinovoip_BPI_M3_defconfig > index f321d94e04eb..e48983fc3310 100644 > --- a/configs/Sinovoip_BPI_M3_defconfig > +++ b/configs/Sinovoip_BPI_M3_defconfig > @@ -27,5 +27,5 @@ CONFIG_AXP_DCDC5_VOLT=1200 > CONFIG_AXP_DLDO3_VOLT=2500 > CONFIG_AXP_SW_ON=y > CONFIG_USB_EHCI_HCD=y > -CONFIG_USB_MUSB_HOST=y > +CONFIG_USB_MUSB_GADGET=y I wonder whether this could become the default. As far as I can see, having it as host can only be useful on the tablets we support. Maybe we can add a config option for tablets device, and if it's set, enable in host mode, and if not defaults to gadget. Eventually, we could move all the options that are not really useful on anything but a tablet that we currently select, like USB_KEYBOARD Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 4/9] sunxi: Switch MUSB to gadget mode on the Bananapi M3
On Fri, Sep 22, 2017 at 4:14 PM, Maxime Ripard wrote: > On Fri, Sep 22, 2017 at 07:26:30AM +, Chen-Yu Tsai wrote: >> The Bananapi M3 has a micro-USB OTG port. It supports both host and >> gadget mode. Having the OTG port operate in gadget mode is more useful, >> as we can use it for fastboot or Ethernet over USB. >> >> The board has 2 other USB host ports that are supported. These can be >> used for connecting peripherals. >> >> Signed-off-by: Chen-Yu Tsai >> --- >> configs/Sinovoip_BPI_M3_defconfig | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/configs/Sinovoip_BPI_M3_defconfig >> b/configs/Sinovoip_BPI_M3_defconfig >> index f321d94e04eb..e48983fc3310 100644 >> --- a/configs/Sinovoip_BPI_M3_defconfig >> +++ b/configs/Sinovoip_BPI_M3_defconfig >> @@ -27,5 +27,5 @@ CONFIG_AXP_DCDC5_VOLT=1200 >> CONFIG_AXP_DLDO3_VOLT=2500 >> CONFIG_AXP_SW_ON=y >> CONFIG_USB_EHCI_HCD=y >> -CONFIG_USB_MUSB_HOST=y >> +CONFIG_USB_MUSB_GADGET=y > > I wonder whether this could become the default. > > As far as I can see, having it as host can only be useful on the > tablets we support. > > Maybe we can add a config option for tablets device, and if it's set, > enable in host mode, and if not defaults to gadget. > > Eventually, we could move all the options that are not really useful > on anything but a tablet that we currently select, like USB_KEYBOARD There are also the cases where the OTG controller is routed to a USB host port. These are likely set top boxes. It would probably be better to have the user be able to explicitly set it to gadget mode if they want to do development, but otherwise be in host mode by default. ChenYu ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Armada 38x clearfog pci trouble
On 22.09.2017 08:32, Влад Мао wrote: > Hello. I have a clearfog base board with PCI-E video card based on > SIlicon Motion s750 (InnoDisk EMPV-1201), and i have trouble with > u-boot and accessing to this card. > > I use last u-boot from git, and when i try to read memory from Base > address 0 of PCI-E, board resetted. log from board: > > High speed PHY - Version: 2.0 > Detected Device ID 6828 > board SerDes lanes topology details: > | Lane # | Speed | Type | > > | 0| 3 | SATA0 | > | 1| 0 | SGMII1 | > | 2| 5 | PCIe1 | > | 3| 5 | USB3 HOST1 | > | 4| 5 | PCIe2 | > | 5| 0 | SGMII2 | > > :** Link is Gen1, check the EP capability > PCIe, Idx 1: remains Gen1 > PCIe, Idx 2: detected no link > High speed PHY - Ended Successfully > DDR3 Training Sequence - Ver TIP-1.29.0 > DDR3 Training Sequence - Switching XBAR Window to FastPath Window > DDR3 Training Sequence - Ended Successfully > Trying to boot from MMC1 > > > U-Boot 2017.09-00255-ge884656c2c-dirty (Sep 22 2017 - 09:05:09 +0300) > > SoC: MV88F6828-A0 at 1600 MHz > I2C: ready > DRAM: 1 GiB (800 MHz, ECC not enabled) > MMC: mv_sdh: 0 > PCI: >00:01.0 - 126f:0750 - Display controller > Model: SolidRun Clearfog A1 > Board: SolidRun ClearFog > Net: eth2: ethernet@3, eth3: ethernet@34000, eth1: ethernet@7 > Hit any key to stop autoboot: 0 > => pci > Scanning PCI devices on bus 0 > BusDevFun VendorId DeviceId Device Class Sub-Class > _ > 00.01.00 0x126f 0x0750 Display controller 0x00 > => pci header 00.01.00 >vendor ID = 0x126f >device ID = 0x0750 >command register ID = 0x0007 >status register = 0x0010 >revision ID = 0xa1 >class code = 0x03 (Display controller) >sub class code = 0x00 >programming interface = 0x00 >cache line = 0x08 >latency time =0x00 >header type = 0x00 >BIST =0x00 >base address 0 = 0xfc08 >base address 1 = 0xe800 >base address 2 = 0x >base address 3 = 0x >base address 4 = 0x >base address 5 = 0x >cardBus CIS pointer = 0x >sub system vendor ID =0x126f >sub system ID = 0x0750 >expansion ROM base address = 0xe820 >interrupt line = 0xff >interrupt pin = 0x01 >min Grant = 0x00 >max Latency = 0x00 > => md.l 0xe800 10 > e800: 20a0 0160 01f0 01765324... `...$Sv. > e810: 01765324 $Sv. > e820: 0008 > e830: So accessing BAR1 (memory BAR) seems to work just fine. > => md.l 0xfc08 10 > fc08:data abort > pc : [<3ffb8104>] lr : [<3ffb80e0>] > reloc pc : [<0083a104>]lr : [<0083a0e0>] > sp : 3fb68950 ip : 0002 fp : fc08 > r10: fc08 r9 : 3fb6ded8 r8 : 0004 > r7 : r6 : 0004 r5 : 0004 r4 : 0010 > r3 : fc08 r2 : 003a r1 : 3fb68964 r0 : 0009 > Flags: nZCv IRQs off FIQs off Mode SVC_32 > Resetting CPU ... You are trying to access BAR0, which is most likely not a memory but a IO BAR. Why do you want to do this? Do you really need to access this BAR from within U-Boot? Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [linux-sunxi] Re: [PATCH v5 1/4] sunxi: change the DE1 video option to CONFIG_VIDEO_SUNXI
On Fri, Sep 22, 2017 at 06:41:40AM +, icen...@aosc.io wrote: > 在 2017-09-22 03:18，Maxime Ripard 写道： > > On Thu, Sep 21, 2017 at 07:48:20AM +, Icenowy Zheng wrote: > > > > > > > > > 于 2017年9月21日 GMT+08:00 下午3:40:23, Maxime Ripard > > > 写到: > > > >Hi, > > > > > > > >On Wed, Sep 20, 2017 at 04:18:19PM +, Icenowy Zheng wrote: > > > >> The sunxi DE1 video option used to be CONFIG_VIDEO, which has the > > > >same > > > >> name as the "Enable legacy video support" option in > > > >> drivers/video/Kconfig. > > > >> > > > >> Change the option name to CONFIG_VIDEO_SUNXI, which is really used by > > > >> Makefile under drivers/video/sunxi/, and defined in sunxi-common.h > > > >> when CONFIG_VIDEO is selected before this change. Now > > > >CONFIG_VIDEO_SUNXI > > > >> selects CONFIG_VIDEO and the usages of CONFIG_VIDEO in sunxi Kconfig > > > >and > > > >> config headers are all converted to use CONFIG_VIDEO_SUNXI. > > > >> > > > >> Signed-off-by: Icenowy Zheng > > > > > > > >The patch is fine, but you also seem to imply that it's an issue. It's > > > >not, you can very well define in Kconfig the same symbol in two > > > >different places, and Kconfig will merge the two by itself. > > > > > > So I can drop this patch and simply add "imply VIDEO_DT_SIMPLEFB" in > > > the VIDEO option at sunxi Kconfig? > > > > I don't see anything wrong with this patch, there's no need to change > > it. > > So this patchset can be applied if no further rejections? Yes, I'm just waiting for some feedback from the video people. Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA
Hi, I got also somme issue with my QSPI on CycmoneV and u-boot 2017.07 I cherry-picked commits from Jason Rush : b90ce1c29023abe730d2b4174294bdc09acef3e0 836a0278476be94c95ff084f81c2302fc5c0265c b0eac7e0d1e4817388543b58d30b322d0bac49a8 Also i forgot to put the "u-boot,dm-pre-reloc;" in my device tree in the qspi node. Now my QSPI is working fine except the sf unlock / lock I have remove the "clear BP# bits" in the mtd/spi/spi_flash.c Hope this can help you Regards, Clement 2017-09-06 8:10 GMT+02:00 Hannes Schmelzer : > Hi Jagan, > > > On 09/04/2017 08:22 AM, Hannes Schmelzer wrote: >> >> "U-Boot" schrieb am 01.09.2017 16:39:03: >> wrote: Hi Eldor, just found your post in the mailinglist. https://lists.denx.de/pipermail/u-boot/2016-December/276491.html Reason why i'm searched there is, that i've now excactly same problem >> >> as you. >>> >>> Can you give some details, issue came-up while 'sf probe' or 'sf read' ? >> >> Hi Jagan, >> please have a look into the weblink to the denx mailing list server. >> I have basically same trouble as eldor reported the days ago. >> >> A simple 'sf probe' ends up in a >> ### ERROR ### Please RESET the board ### >> Interesting detail is, that the information about the flash (type, size, >> ...) is printed out quite before the "hang". >> >> On wednesday i have the next time-slot to access the socfpga devkit board. >> So i could bring in more details if necessary. > > as told few days ago, i've now again access to my socfpga devkit board. > Here comes the console output: > > --- > U-Boot SPL 2017.09-rc4-00023-g84a4206 (Sep 06 2017 - 08:02:35) > /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: Preparing to > start memory calibration > /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: CALIBRATION > PASSED > /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: Calibration > complete > Trying to boot from MMC1 > spl: partition error > > > U-Boot 2017.09-rc4-00023-g84a4206 (Sep 06 2017 - 08:02:35 +0200) > > CPU: Altera SoCFPGA Platform > FPGA: Altera Cyclone V, SE/A6 or SX/C6 or ST/D6, version 0x0 > BOOT: SD/MMC Internal Transceiver (3.0V) >Watchdog enabled > I2C: ready > DRAM: 1 GiB > MMC: dwmmc0@ff704000: 0 > *** Warning - bad CRC, using default environment > > In:serial > Out: serial > Err: serial > Model: Altera SOCFPGA Cyclone V SoC Development Kit > Net: > Error: ethernet@ff702000 address not set. > No ethernet found. > Hit any key to stop autoboot: 0 > => sf probe > SF: Detected n25q512 with page size 256 Bytes, erase size 64 KiB, total 64 > MiB > ### ERROR ### Please RESET the board ### > > > Afterwards the board does some reset (about 20sec. later). > > > cheers, > Hannes > ___ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Antwort: Re: QSPI "sf probe ...", "sf read ..." on Altera SoC FPGA
Sorry these are my local commits you can find them here : https://patchwork.ozlabs.org/patch/765992/ https://patchwork.ozlabs.org/patch/765996/ https://patchwork.ozlabs.org/patch/765997/ https://patchwork.ozlabs.org/patch/765998/ 2017-09-22 14:12 GMT+02:00 Clément Péron : > Hi, > > I got also somme issue with my QSPI on CycmoneV and u-boot 2017.07 > I cherry-picked commits from Jason Rush : > b90ce1c29023abe730d2b4174294bdc09acef3e0 > 836a0278476be94c95ff084f81c2302fc5c0265c > b0eac7e0d1e4817388543b58d30b322d0bac49a8 > > Also i forgot to put the > "u-boot,dm-pre-reloc;" in my device tree in the qspi node. > > Now my QSPI is working fine except the sf unlock / lock > I have remove the "clear BP# bits" in the mtd/spi/spi_flash.c > > Hope this can help you > > Regards, > Clement > > 2017-09-06 8:10 GMT+02:00 Hannes Schmelzer : >> Hi Jagan, >> >> >> On 09/04/2017 08:22 AM, Hannes Schmelzer wrote: >>> >>> "U-Boot" schrieb am 01.09.2017 16:39:03: >>> wrote: > > Hi Eldor, > > just found your post in the mailinglist. > > https://lists.denx.de/pipermail/u-boot/2016-December/276491.html > > Reason why i'm searched there is, that i've now excactly same problem >>> >>> as > > you. Can you give some details, issue came-up while 'sf probe' or 'sf read' ? >>> >>> Hi Jagan, >>> please have a look into the weblink to the denx mailing list server. >>> I have basically same trouble as eldor reported the days ago. >>> >>> A simple 'sf probe' ends up in a >>> ### ERROR ### Please RESET the board ### >>> Interesting detail is, that the information about the flash (type, size, >>> ...) is printed out quite before the "hang". >>> >>> On wednesday i have the next time-slot to access the socfpga devkit board. >>> So i could bring in more details if necessary. >> >> as told few days ago, i've now again access to my socfpga devkit board. >> Here comes the console output: >> >> --- >> U-Boot SPL 2017.09-rc4-00023-g84a4206 (Sep 06 2017 - 08:02:35) >> /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: Preparing to >> start memory calibration >> /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: CALIBRATION >> PASSED >> /home/schmelzerh/work/u-boot/drivers/ddr/altera/sequencer.c: Calibration >> complete >> Trying to boot from MMC1 >> spl: partition error >> >> >> U-Boot 2017.09-rc4-00023-g84a4206 (Sep 06 2017 - 08:02:35 +0200) >> >> CPU: Altera SoCFPGA Platform >> FPGA: Altera Cyclone V, SE/A6 or SX/C6 or ST/D6, version 0x0 >> BOOT: SD/MMC Internal Transceiver (3.0V) >>Watchdog enabled >> I2C: ready >> DRAM: 1 GiB >> MMC: dwmmc0@ff704000: 0 >> *** Warning - bad CRC, using default environment >> >> In:serial >> Out: serial >> Err: serial >> Model: Altera SOCFPGA Cyclone V SoC Development Kit >> Net: >> Error: ethernet@ff702000 address not set. >> No ethernet found. >> Hit any key to stop autoboot: 0 >> => sf probe >> SF: Detected n25q512 with page size 256 Bytes, erase size 64 KiB, total 64 >> MiB >> ### ERROR ### Please RESET the board ### >> >> >> Afterwards the board does some reset (about 20sec. later). >> >> >> cheers, >> Hannes >> ___ >> U-Boot mailing list >> U-Boot@lists.denx.de >> https://lists.denx.de/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] doc: Fix statements on case sensitivity for regulator prefix
The regulator bindings state that regulator prefixes are allowd to be
in upper or lower case. However pmic_bind_children from pmic_uclass uses
strncmp to compare DT node name against prefix. This comparison is case
sensitive hence the regulator driver prefix case matters.
Signed-off-by: Felix Brack
---
doc/device-tree-bindings/regulator/regulator.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/doc/device-tree-bindings/regulator/regulator.txt
b/doc/device-tree-bindings/regulator/regulator.txt
index 2cf4b9d..918711e 100644
--- a/doc/device-tree-bindings/regulator/regulator.txt
+++ b/doc/device-tree-bindings/regulator/regulator.txt
@@ -10,10 +10,10 @@ pmic: drivers/power/pmic/max77686.c
regulator: drivers/power/regulator/max77686.c
For the node name e.g.: "prefix[:alpha:]num { ... }":
-- the driver prefix should be: "prefix" or "PREFIX" - case insensitive
+- the driver prefix should be: "prefix" - case sensitive
- the node name's "num" is set as "dev->driver_data" on bind
-Example the prefix "ldo" will pass for: "ldo1", "ldo@1", "LDO1", "LDOREG@1"...
+Example the prefix "ldo" will pass for: "ldo1", "ldo@1", "ldoreg@1, ...
Optional properties:
- regulator-name: a string, required by the regulator uclass
--
2.7.4
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Re: [U-Boot] Armada 38x clearfog pci trouble
On 22.09.2017 14:13, Владислав wrote: I try to port sm750fb driver to uboot. I need to access bar0 because its framebuffer memory of video card. After little research i find out pciauto_region_allocate failed for allocation region for bar0: PCI Autoconfig: BAR 0, Mem, size=0x400, No room in resource (addr: 0xE800, size: 0x400, res->bus_start: 0xE800, res->size: 0x200) PCI Autoconfig: BAR 1, Mem, size=0x20, address=0xe800 bus_lower=0xe820 I find out definition in pci_mvebu.c: #define PCIE_MEM_SIZE (32 << 20) After changing it to (128 << 20) autoconfig working vell and bar0 is fully accessible and work I see. Please send a proper patch to change this setting in mainline to the list. Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCHv2] fs/fat: Reduce stack usage
We have limited stack in SPL builds. Drop itrblock and move to
malloc/free of itr to move this off of the stack. As part of this fix a
double-free issue in fat_size().
Signed-off-by: Tom Rini
---
Rework to use malloc/free as moving this to a global overflows some SH
targets.
fs/fat/fat.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index f0284398b41d..36a309c73c27 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -1034,24 +1034,27 @@ int file_fat_detectfs(void)
int fat_exists(const char *filename)
{
fsdata fsdata;
- fat_itr itrblock, *itr = &itrblock;
+ fat_itr *itr;
int ret;
+ itr = malloc(sizeof(fat_itr));
ret = fat_itr_root(itr, &fsdata);
if (ret)
return 0;
ret = fat_itr_resolve(itr, filename, TYPE_ANY);
free(fsdata.fatbuf);
+ free(itr);
return ret == 0;
}
int fat_size(const char *filename, loff_t *size)
{
fsdata fsdata;
- fat_itr itrblock, *itr = &itrblock;
+ fat_itr *itr;
int ret;
+ itr = malloc(sizeof(fat_itr));
ret = fat_itr_root(itr, &fsdata);
if (ret)
return ret;
@@ -1072,8 +1075,9 @@ int fat_size(const char *filename, loff_t *size)
}
*size = FAT2CPU32(itr->dent->size);
-out:
free(fsdata.fatbuf);
+out:
+ free(itr);
return ret;
}
@@ -1081,9 +1085,10 @@ int file_fat_read_at(const char *filename, loff_t pos,
void *buffer,
loff_t maxsize, loff_t *actread)
{
fsdata fsdata;
- fat_itr itrblock, *itr = &itrblock;
+ fat_itr *itr;
int ret;
+ itr = malloc(sizeof(fat_itr));
ret = fat_itr_root(itr, &fsdata);
if (ret)
return ret;
@@ -1097,6 +1102,7 @@ int file_fat_read_at(const char *filename, loff_t pos,
void *buffer,
out:
free(fsdata.fatbuf);
+ free(itr);
return ret;
}
--
1.9.1
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[U-Boot] [PATCH v2] sun50i: h5: Add NanoPi Neo Plus2 DT initial support
Add initial DT for NanoPi NEO Plus2 by FriendlyARM
- Allwinner quad core H5 Cortex A53 with an ARM Mali-450MP GPU
- 1 GB DDR3 RAM
- 8GB eMMC flash (Samsung KLM8G1WEPD-B031)
- micro SD card slot
- Gigabit Ethernet (external RTL8211E-VB-CG chip)
- 802.11 b/g/n WiFi, Bluetooth 4.0 (Ampak AP6212A module)
- 2x USB 2.0 host ports
Signed-off-by: Antony Antony
---
Changes v1->v2
removed memory {}, compatible ="allwinner,sun5i-a13-mmc"
remove CONFIG_SPL_SPI_FLASH_SUPPORT=y and CONFIG_SPL_SPI_SUNXI=y (no SPI)
remove CONFIG_SD_BOOT=y
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts | 108
configs/nanopi_neo_plus2_defconfig | 18 +
3 files changed, 127 insertions(+)
create mode 100644 arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
create mode 100644 configs/nanopi_neo_plus2_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index fee4680..295a675 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -333,6 +333,7 @@ dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun8i-v3s-licheepi-zero.dtb
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-nanopi-neo2.dtb \
+ sun50i-h5-nanopi-neo-plus2.dtb \
sun50i-h5-orangepi-pc2.dtb \
sun50i-h5-orangepi-prime.dtb \
sun50i-h5-orangepi-zero-plus2.dtb
diff --git a/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
new file mode 100644
index 000..fce0d6c
--- /dev/null
+++ b/arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
@@ -0,0 +1,108 @@
+/*
+ * Copyright (C) 2017 Antony Antony
+ * Copyright (c) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+
+#include "sun50i-h5.dtsi"
+
+#include
+
+/ {
+ model = "FriendlyARM NanoPi NEO Plus 2";
+ compatible = "friendlyarm,nanopi-neo-plus2", "allwinner,sun50i-h5";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <330>;
+ regulator-max-microvolt = <330>;
+ };
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&mmc0 {
+ compatible = "allwinner,sun50i-h5-mmc",
+"allwinner,sun50i-a64-mmc";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>;
+ cd-inverted;
+ status = "okay";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <®_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins_a>;
+ status = "okay";
+};
+
+&usbphy {
+ st
Re: [U-Boot] [PATCH v2 1/2] ls1088ardb: Enable USB command RDB qspi-boot
Hi Ran,
On Thu, Sep 21, 2017 at 1:34 PM, Ran Wang wrote:
> From: Ashish Kumar
>
> Signed-off-by: Ashish Kumar
> Signed-off-by: Amrita Kumari
> Signed-off-by: Ran Wang
> ---
> Change in v2:
> 1.Adjust USB nodes position in dts to keep them sorted in
> unit-address.
> 2.Move macro CONFIG_HAS_FSL_XHCI_USB and CONFIG_USB_XHCI_FSL
> to Kconfig option.
> 3.Remove CONFIG_USB_MAX_CONTROLLER_COUNT.
>
> Change in v1:
> Rebased to
> ba39608 ARM: DRA72x: Add support for detection of DRA71x SR 2.1
>
> arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 8
> arch/arm/dts/fsl-ls1088a.dtsi | 14 ++
> board/freescale/ls1088a/ls1088a.c | 1 -
> configs/ls1088ardb_qspi_defconfig | 8
> include/linux/usb/xhci-fsl.h | 2 +-
> 5 files changed, 31 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> index 3518d8601d..3337ff3a00 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
> @@ -83,6 +83,8 @@ config ARCH_LS1088A
> select FSL_TZASC_1
> select ARCH_EARLY_INIT_R
> select BOARD_EARLY_INIT_F
> + select HAS_FSL_XHCI_USB
> + select USB_XHCI_FSL
>
> config ARCH_LS2080A
> bool
> @@ -346,6 +348,12 @@ config FSL_TZASC_1
> config FSL_TZASC_2
> bool
>
> +config HAS_FSL_XHCI_USB
> + bool
> +
This should be in a separate patch to convert HAS_FSL_XHCI_USB to
Kconfig and update all FSL boards in the same patch. Don't forget to
remove it from scripts/config_whitelist.txt. And please write a help
paragraph to explain what this Kconfig is for.
board/freescale/ls1043ardb/ls1043ardb.c:130:#ifdef CONFIG_HAS_FSL_XHCI_USB
board/freescale/ls1043ardb/ls1043ardb.c:186:#ifdef CONFIG_HAS_FSL_XHCI_USB
board/freescale/ls1046ardb/ls1046ardb.c:135:#ifdef CONFIG_HAS_FSL_XHCI_USB
board/freescale/ls1046aqds/ls1046aqds.c:171:#ifdef CONFIG_HAS_FSL_XHCI_USB
board/freescale/ls1046aqds/ls1046aqds.c:184:#ifdef CONFIG_HAS_FSL_XHCI_USB
board/freescale/ls1043aqds/ls1043aqds.c:232:#ifdef CONFIG_HAS_FSL_XHCI_USB
board/freescale/ls1043aqds/ls1043aqds.c:245:#ifdef CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1021aqds.h:408:#define CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1021aqds.h:410:#ifdef CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1012ardb.h:25:#define CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1012ardb.h:27:#ifdef CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1043aqds.h:374:#define CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1043aqds.h:375:#ifdef CONFIG_HAS_FSL_XHCI_USB
include/configs/ls2080aqds.h:442:#define CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1021atwr.h:48:#define CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1021atwr.h:50:#ifdef CONFIG_HAS_FSL_XHCI_USB
include/configs/ls2080ardb.h:344:#define CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1043ardb.h:284:#define CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1043ardb.h:285:#ifdef CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1021aiot.h:23:#define CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1021aiot.h:25:#ifdef CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1046ardb.h:214:#define CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1046ardb.h:215:#ifdef CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1012aqds.h:122:#define CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1012aqds.h:124:#ifdef CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1012afrdm.h:37:#define CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1012afrdm.h:39:#ifdef CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1046aqds.h:140:#define CONFIG_HAS_FSL_XHCI_USB
include/configs/ls1046aqds.h:141:#ifdef CONFIG_HAS_FSL_XHCI_USB
> +config USB_XHCI_FSL
> + bool
> +
This should be in a separate patch to convert USB_XHCI_FSL to Kconfig
and update all FSL boards in the same patch. Don't forget to remove it
from scripts/config_whitelist.txt. And please write a help paragraph
to explain what this Kconfig is for. And this should be put in
drivers/usb/host/Kconfig instead of here.
> endmenu
>
> menu "Layerscape clock tree configuration"
> diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
> index d943a9efa3..64b4fcf12b 100644
> --- a/arch/arm/dts/fsl-ls1088a.dtsi
> +++ b/arch/arm/dts/fsl-ls1088a.dtsi
> @@ -76,6 +76,20 @@
> num-cs = <4>;
> };
>
> + usb0: usb3@310 {
> + compatible = "fsl,layerscape-dwc3";
> + reg = <0x0 0x310 0x0 0x1>;
> + interrupts = <0 80 0x4>; /* Level high type */
> + dr_mode = "host";
> + };
> +
> + usb1: usb3@311 {
> + compatible = "fsl,layerscape-dwc3";
> + reg = <0x0 0x311 0x0 0x1>;
> + interrupts = <0 81 0x4>; /* Level high type */
> + dr_mode = "host";
> + };
> +
> pcie@340 {
> compatible = "fsl,ls-pcie", "snps,dw-pcie";
>
Re: [U-Boot] Armada 38x clearfog pci trouble
Hi, On Fri, Sep 22, 2017 at 8:32 PM, Stefan Roese wrote: > On 22.09.2017 14:13, Владислав wrote: >> >> I try to port sm750fb driver to uboot. I need to access bar0 because its >> framebuffer memory of video card. >> >> After little research i find out pciauto_region_allocate failed for >> allocation region for bar0: >> >> PCI Autoconfig: BAR 0, Mem, size=0x400, No room in resource (addr: >> 0xE800, size: 0x400, res->bus_start: 0xE800, res->size: >> 0x200) >> >> >> PCI Autoconfig: BAR 1, Mem, size=0x20, address=0xe800 >> bus_lower=0xe820 >> >> >> I find out definition in pci_mvebu.c: >> >> #define PCIE_MEM_SIZE (32 << 20) >> >> After changing it to (128 << 20) autoconfig working vell and bar0 is fully >> accessible and work Can we convert this pci_mvebu.c to DM PCI? So that this won't be hardcoded in the driver, instead using device tree settings from the boards. > > > I see. Please send a proper patch to change this setting > in mainline to the list. > Regards, Bin ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 06/13] log: Add an implemention of logging
Hi Simon,
On Thu, Sep 21, 2017 at 12:58 PM, Simon Glass wrote:
> Hi Bin,
>
> On 20 September 2017 at 08:41, Bin Meng wrote:
>>
>> Hi Simon,
>>
>> On Wed, Sep 20, 2017 at 9:50 PM, Simon Glass wrote:
>> > Hi Bin,
>> >
>> > On 17 September 2017 at 21:45, Bin Meng wrote:
>> >> Hi Simon,
>> >>
>> >> On Sun, Sep 17, 2017 at 5:23 AM, Simon Glass wrote:
>> >>> Add the logging header file and implementation with some configuration
>> >>> options to control it.
>> >>>
>> >>> Signed-off-by: Simon Glass
>> >>> ---
>> >>>
>> >>> MAINTAINERS | 9 ++
>> >>> common/Kconfig| 56 +
>> >>> common/Makefile | 1 +
>> >>> common/log.c | 246
>> >>> +
>> >>> include/asm-generic/global_data.h | 5 +
>> >>> include/log.h | 247
>> >>> --
>> >>> 6 files changed, 555 insertions(+), 9 deletions(-)
>> >>> create mode 100644 common/log.c
>> >>>
>> >>> diff --git a/MAINTAINERS b/MAINTAINERS
>> >>> index 04acf2b89d..eb420afa8d 100644
>> >>> --- a/MAINTAINERS
>> >>> +++ b/MAINTAINERS
>> >>> @@ -290,6 +290,15 @@ S: Maintained
>> >>> T: git git://git.denx.de/u-boot-i2c.git
>> >>> F: drivers/i2c/
>> >>>
>> >>> +LOGGING
>> >>> +M: Simon Glass
>> >>> +S: Maintained
>> >>> +T: git git://git.denx.de/u-boot.git
>> >>> +F: common/log.c
>> >>> +F: cmd/log.c
>> >>> +F: test/log/log_test.c
>> >>> +F: test/py/tests/test_log.py
>> >>
>> >> test/log/log_test.c and test/py/tests/test_log.py have not been
>> >> introduced at this point.
>> >
>> > OK I can tweak that,
>> > [..]
>> >
>> >>> +/**
>> >>> + * struct log_driver - a driver which accepts and processes log records
>> >>> + *
>> >>> + * @name: Name of driver
>> >>> + */
>> >>> +struct log_driver {
>> >>> + const char *name;
>> >>> + /**
>> >>> +* emit() - emit a log record
>> >>> +*
>> >>> +* Called by the log system to pass a log record to a particular
>> >>> driver
>> >>> +* for processing. The filter is checked before calling this
>> >>> function.
>> >>> +*/
>> >>> + int (*emit)(struct log_device *ldev, struct log_rec *rec);
>> >>> +};
>> >>> +
>> >>
>> >> So we are creating a new type of non-DM driver which is log-specific?
>> >> How about we add this emit to the existing uclass driver that can be
>> >> used as the log driver? (eg: blk devices with file system?)
>> >
>> > Yes that's right. I think I can link it to DM once it starts up, but a
>> > logging of DM start-up is useful.
>> >
>> > Re your idea are you saying add an emit() method to UCLASS_BLK?
>> >
>>
>> Yep, something like
>>
>> #ifdef CONFIG_LOG
>> .log_emit = xxx_log_emit,
>> #endif
>>
>> Probably we need a flag to find out which driver provides such log
>> functionality.
>
> So what would the block driver do in that function? I guess I don't
> understand what it is for. Can you please give me more information?
>
The blk driver can save the logs to a predefined block address for
permanent storage. Or file system driver can send the logs to a file.
Regards,
Bin
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Re: [U-Boot] [PATCH V3 1/5] mmc: uniphier-sd: Factor out register IO
On 08/21/2017 12:11 AM, Marek Vasut wrote:
> This patch prepares the driver to support controller(s) with registers
> at locations shifted by constant. Pull out the readl()/writel() from
> the driver into separate functions, where the adjustment of the register
> offset can be easily contained.
Sorry for late. Applied to u-boot-mmc about [PATCH 1/5~5/5].
(After fixing some conflict - i did.)
Best Regards,
Jaehoon Chung
>
> Signed-off-by: Marek Vasut
> Cc: Masahiro Yamada
> Cc: Jaehoon Chung
> ---
> V2: Use unsigned int for the reg argument
> V3: Remove const ...
> ---
> drivers/mmc/uniphier-sd.c | 115
> +-
> 1 file changed, 63 insertions(+), 52 deletions(-)
>
> diff --git a/drivers/mmc/uniphier-sd.c b/drivers/mmc/uniphier-sd.c
> index e272b14153..cb53b28737 100644
> --- a/drivers/mmc/uniphier-sd.c
> +++ b/drivers/mmc/uniphier-sd.c
> @@ -134,6 +134,17 @@ struct uniphier_sd_priv {
> #define UNIPHIER_SD_CAP_DIV1024 BIT(2) /* divisor 1024 is
> available */
> };
>
> +static u32 uniphier_sd_readl(struct uniphier_sd_priv *priv, unsigned int reg)
> +{
> + return readl(priv->regbase + reg);
> +}
> +
> +static void uniphier_sd_writel(struct uniphier_sd_priv *priv,
> +u32 val, unsigned int reg)
> +{
> + writel(val, priv->regbase + reg);
> +}
> +
> static dma_addr_t __dma_map_single(void *ptr, size_t size,
> enum dma_data_direction dir)
> {
> @@ -157,7 +168,7 @@ static void __dma_unmap_single(dma_addr_t addr, size_t
> size,
> static int uniphier_sd_check_error(struct udevice *dev)
> {
> struct uniphier_sd_priv *priv = dev_get_priv(dev);
> - u32 info2 = readl(priv->regbase + UNIPHIER_SD_INFO2);
> + u32 info2 = uniphier_sd_readl(priv, UNIPHIER_SD_INFO2);
>
> if (info2 & UNIPHIER_SD_INFO2_ERR_RTO) {
> /*
> @@ -195,7 +206,7 @@ static int uniphier_sd_wait_for_irq(struct udevice *dev,
> unsigned int reg,
> long wait = 100;
> int ret;
>
> - while (!(readl(priv->regbase + reg) & flag)) {
> + while (!(uniphier_sd_readl(priv, reg) & flag)) {
> if (wait-- < 0) {
> dev_err(dev, "timeout\n");
> return -ETIMEDOUT;
> @@ -227,14 +238,14 @@ static int uniphier_sd_pio_read_one_block(struct
> udevice *dev, u32 **pbuf,
>* Clear the status flag _before_ read the buffer out because
>* UNIPHIER_SD_INFO2_BRE is edge-triggered, not level-triggered.
>*/
> - writel(0, priv->regbase + UNIPHIER_SD_INFO2);
> + uniphier_sd_writel(priv, 0, UNIPHIER_SD_INFO2);
>
> if (likely(IS_ALIGNED((unsigned long)*pbuf, 4))) {
> for (i = 0; i < blocksize / 4; i++)
> - *(*pbuf)++ = readl(priv->regbase + UNIPHIER_SD_BUF);
> + *(*pbuf)++ = uniphier_sd_readl(priv, UNIPHIER_SD_BUF);
> } else {
> for (i = 0; i < blocksize / 4; i++)
> - put_unaligned(readl(priv->regbase + UNIPHIER_SD_BUF),
> + put_unaligned(uniphier_sd_readl(priv, UNIPHIER_SD_BUF),
> (*pbuf)++);
> }
>
> @@ -253,15 +264,15 @@ static int uniphier_sd_pio_write_one_block(struct
> udevice *dev,
> if (ret)
> return ret;
>
> - writel(0, priv->regbase + UNIPHIER_SD_INFO2);
> + uniphier_sd_writel(priv, 0, UNIPHIER_SD_INFO2);
>
> if (likely(IS_ALIGNED((unsigned long)*pbuf, 4))) {
> for (i = 0; i < blocksize / 4; i++)
> - writel(*(*pbuf)++, priv->regbase + UNIPHIER_SD_BUF);
> + uniphier_sd_writel(priv, *(*pbuf)++, UNIPHIER_SD_BUF);
> } else {
> for (i = 0; i < blocksize / 4; i++)
> - writel(get_unaligned((*pbuf)++),
> -priv->regbase + UNIPHIER_SD_BUF);
> + uniphier_sd_writel(priv, get_unaligned((*pbuf)++),
> +UNIPHIER_SD_BUF);
> }
>
> return 0;
> @@ -292,22 +303,22 @@ static void uniphier_sd_dma_start(struct
> uniphier_sd_priv *priv,
> {
> u32 tmp;
>
> - writel(0, priv->regbase + UNIPHIER_SD_DMA_INFO1);
> - writel(0, priv->regbase + UNIPHIER_SD_DMA_INFO2);
> + uniphier_sd_writel(priv, 0, UNIPHIER_SD_DMA_INFO1);
> + uniphier_sd_writel(priv, 0, UNIPHIER_SD_DMA_INFO2);
>
> /* enable DMA */
> - tmp = readl(priv->regbase + UNIPHIER_SD_EXTMODE);
> + tmp = uniphier_sd_readl(priv, UNIPHIER_SD_EXTMODE);
> tmp |= UNIPHIER_SD_EXTMODE_DMA_EN;
> - writel(tmp, priv->regbase + UNIPHIER_SD_EXTMODE);
> + uniphier_sd_writel(priv, tmp, UNIPHIER_SD_EXTMODE);
>
> - writel(dma_addr & U32_MAX, priv->regbase + UNIPHIER_SD_DMA_ADDR_L);
> + uniphier_sd_writel(priv, dma_addr & U32_MAX, UNIPHIER_SD_DMA_ADDR_L);
>
> /* suppress the warning "right shift count >= width of type" */
>
Re: [U-Boot] [PATCH v2 07/26] mmc: Add a function to dump the mmc capabilities
Hi,
On 09/21/2017 11:29 PM, Jean-Jacques Hiblot wrote:
> This adds a simple helper function to display information (bus width and
> mode) based on a capability mask. Useful for debug.
I agreed this is useful.. but there is no usage in your patch.
How did you use this? and Where does call this function..
I think it can be used the one of mmc command. how about?
Best Regards,
Jaehoon Chung
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
> drivers/mmc/mmc.c | 24
> include/mmc.h | 1 +
> 2 files changed, 25 insertions(+)
>
> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
> index 94b3a02..0b74e78 100644
> --- a/drivers/mmc/mmc.c
> +++ b/drivers/mmc/mmc.c
> @@ -1136,6 +1136,30 @@ static void mmc_set_bus_width(struct mmc *mmc, uint
> width)
> mmc_set_ios(mmc);
> }
>
> +#if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
> +/*
> + * helper function to display the capabilities in a human
> + * friendly manner. The capabilities include bus width and
> + * supported modes.
> + */
> +void mmc_dump_capabilities(const char *text, uint caps)
> +{
> + enum bus_mode mode;
> +
> + printf("%s: widths [", text);
> + if (caps & MMC_MODE_8BIT)
> + printf("8, ");
> + if (caps & MMC_MODE_4BIT)
> + printf("4, ");
> + printf("1] modes [");
> +
> + for (mode = MMC_LEGACY; mode < MMC_MODES_END; mode++)
> + if (MMC_CAP(mode) & caps)
> + printf("%s, ", mmc_mode_name(mode));
> + printf("\b\b]\n");
> +}
> +#endif
> +
> static int sd_select_bus_freq_width(struct mmc *mmc)
> {
> int err;
> diff --git a/include/mmc.h b/include/mmc.h
> index 76bd57a..dd83f14 100644
> --- a/include/mmc.h
> +++ b/include/mmc.h
> @@ -426,6 +426,7 @@ enum bus_mode {
> };
>
> const char *mmc_mode_name(enum bus_mode mode);
> +void mmc_dump_capabilities(const char *text, uint caps);
>
> /*
> * With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device
>
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Re: [U-Boot] [PATCH v2 13/26] mmc: Enable signal voltage to be selected from mmc core
On 09/21/2017 11:30 PM, Jean-Jacques Hiblot wrote:
> From: Kishon Vijay Abraham I
>
> Add a new function *mmc_set_signal_voltage* in mmc core
> which can be used during mmc initialization to select the
> signal voltage. Platform driver should use the set_ios
> callback function to select the signal voltage.
>
> Signed-off-by: Kishon Vijay Abraham I
> Signed-off-by: Jean-Jacques Hiblot
> ---
> drivers/mmc/mmc.c | 16
> include/mmc.h | 8
> 2 files changed, 24 insertions(+)
>
> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
> index 536cd7f..46ec5e1 100644
> --- a/drivers/mmc/mmc.c
> +++ b/drivers/mmc/mmc.c
> @@ -30,6 +30,8 @@ static const unsigned int sd_au_size[] = {
> SZ_16M / 512, (SZ_16M + SZ_8M) / 512, SZ_32M / 512, SZ_64M / 512,
> };
>
> +static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage);
> +
> #if CONFIG_IS_ENABLED(MMC_TINY)
> static struct mmc mmc_static;
> struct mmc *find_mmc_device(int dev_num)
> @@ -1257,6 +1259,12 @@ struct mode_width_tuning {
> uint widths;
> };
>
> +static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
> +{
> + mmc->signal_voltage = signal_voltage;
> + return mmc_set_ios(mmc);
> +}
> +
> static const struct mode_width_tuning sd_modes_by_pref[] = {
> {
> .mode = SD_HS,
> @@ -1964,6 +1972,14 @@ int mmc_start_init(struct mmc *mmc)
> return err;
> #endif
> mmc->ddr_mode = 0;
> +
> + /* First try to set 3.3V. If it fails set to 1.8V */
> + err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_330);
> + if (err != 0)
> + err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
> + if (err != 0)
> + printf("failed to set signal voltage\n");
> +
Well, it's confused. if 3.3v and 1.8v are failed, there is no problem?
last signal value should be set to 1.8v. Is it correct?
Why didn't try to set the 1.2 voltage?
> mmc_set_bus_width(mmc, 1);
> mmc_set_clock(mmc, 1);
>
> diff --git a/include/mmc.h b/include/mmc.h
> index 3e57887..e524963 100644
> --- a/include/mmc.h
> +++ b/include/mmc.h
> @@ -272,6 +272,13 @@
> #define ENHNCD_SUPPORT (0x2)
> #define PART_ENH_ATTRIB (0x1f)
>
> +enum mmc_voltage {
> + MMC_SIGNAL_VOLTAGE_000 = 0,
> + MMC_SIGNAL_VOLTAGE_120,
> + MMC_SIGNAL_VOLTAGE_180,
> + MMC_SIGNAL_VOLTAGE_330
> +};
> +
> /* Maximum block size for MMC */
> #define MMC_MAX_BLOCK_LEN512
>
> @@ -457,6 +464,7 @@ struct mmc {
> int high_capacity;
> uint bus_width;
> uint clock;
> + enum mmc_voltage signal_voltage;
> uint card_caps;
> uint ocr;
> uint dsr;
>
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Re: [U-Boot] [PATCH v2 23/26] mmc: Retry some MMC cmds on failure
On 09/21/2017 11:30 PM, Jean-Jacques Hiblot wrote:
> From: Kishon Vijay Abraham I
>
> With certain SD cards like Kingston 8GB/16GB UHS card, it is seen that
> MMC_CMD_ALL_SEND_CID cmd fails on first attempt, but succeeds
> subsequently. Therefore, retry MMC_CMD_ALL_SEND_CID cmd a few time
> as done in Linux kernel.
> Similarly, it is seen that MMC_CMD_SET_BLOCKLEN may fail on first
> attempt, therefore retry this cmd a few times as done in kernel.
>
> To make it clear that those are optionnal workarounds, a new Kconfig
> option 'MMC_QUIRKS' is added (enabled by default).
>
> Signed-off-by: Vignesh R
> Signed-off-by: Kishon Vijay Abraham I
> Signed-off-by: Jean-Jacques Hiblot
> ---
> drivers/mmc/Kconfig | 9 +
> drivers/mmc/mmc.c | 41 +++--
> include/mmc.h | 4
> 3 files changed, 52 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
> index 3d577e0..78e58d4 100644
> --- a/drivers/mmc/Kconfig
> +++ b/drivers/mmc/Kconfig
> @@ -33,6 +33,15 @@ config SPL_DM_MMC
>
> if MMC
>
> +config MMC_QUIRKS
> + bool "Enable quirks"
> + default y
> + help
> + Some cards and hosts may sometimes behave unexpectedly (quirks).
> + This option enable workarounds to handle those quirks. Some of them
> + are enabled by default, other may require additionnal flags or are
> + enabled by the host driver.
> +
> config MMC_VERBOSE
> bool "Output more information about the MMC"
> default y
> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
> index c5eaeaf..6d1bf94 100644
> --- a/drivers/mmc/mmc.c
> +++ b/drivers/mmc/mmc.c
> @@ -279,6 +279,7 @@ int mmc_send_status(struct mmc *mmc, int timeout)
> int mmc_set_blocklen(struct mmc *mmc, int len)
> {
> struct mmc_cmd cmd;
> + int err;
>
> if (mmc->ddr_mode)
> return 0;
> @@ -287,7 +288,24 @@ int mmc_set_blocklen(struct mmc *mmc, int len)
> cmd.resp_type = MMC_RSP_R1;
> cmd.cmdarg = len;
>
> - return mmc_send_cmd(mmc, &cmd, NULL);
> + err = mmc_send_cmd(mmc, &cmd, NULL);
> +
> +#ifdef CONFIG_MMC_QUIRKS
> + if (err && (mmc->quirks & MMC_QUIRK_RETRY_SET_BLOCKLEN)) {
> + int retries = 4;
> + /*
> + * It has been seen that SET_BLOCKLEN may fail on the first
> + * attempt, let's try a few more time
> + */
> + do {
> + err = mmc_send_cmd(mmc, &cmd, NULL);
> + if (!err)
> + break;
> + } while (retries--);
> + }
> +#endif
> +
> + return err;
> }
>
> static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
> @@ -1881,7 +1899,6 @@ static int mmc_startup(struct mmc *mmc)
> cmd.resp_type = MMC_RSP_R1;
> cmd.cmdarg = 1;
> err = mmc_send_cmd(mmc, &cmd, NULL);
> -
> if (err)
> return err;
> }
> @@ -1895,6 +1912,21 @@ static int mmc_startup(struct mmc *mmc)
>
> err = mmc_send_cmd(mmc, &cmd, NULL);
>
> +#ifdef CONFIG_MMC_QUIRKS
> + if (err && (mmc->quirks & MMC_QUIRK_RETRY_SEND_CID)) {
> + int retries = 4;
> + /*
> + * It has been seen that SEND_CID may fail on the first
> + * attempt, let's try a few more time
> + */
> + do {
> + err = mmc_send_cmd(mmc, &cmd, NULL);
> + if (!err)
> + break;
> + } while (retries--);
> + }
> +#endif
> +
> if (err)
> return err;
>
> @@ -2239,6 +2271,11 @@ int mmc_start_init(struct mmc *mmc)
> if (err)
> return err;
>
> +#ifdef CONFIG_MMC_QUIRKS
> + mmc->quirks = MMC_QUIRK_RETRY_SET_BLOCKLEN |
> + MMC_QUIRK_RETRY_SEND_CID;
> +#endif
> +
> err = mmc_power_cycle(mmc);
> if (err) {
> /*
> diff --git a/include/mmc.h b/include/mmc.h
> index a8901bf..a9ebc88 100644
> --- a/include/mmc.h
> +++ b/include/mmc.h
> @@ -306,6 +306,9 @@ static inline bool mmc_is_tuning_cmd(uint cmdidx)
> #define ENHNCD_SUPPORT (0x2)
> #define PART_ENH_ATTRIB (0x1f)
>
> +#define MMC_QUIRK_RETRY_SEND_CID BIT(0)
> +#define MMC_QUIRK_RETRY_SET_BLOCKLEN BIT(1)
> +
> enum mmc_voltage {
> MMC_SIGNAL_VOLTAGE_000 = 0,
> MMC_SIGNAL_VOLTAGE_120,
> @@ -591,6 +594,7 @@ struct mmc {
> * operating mode due to limitations when
> * accessing the boot partitions
> */
> + u32 quirks;
Use the #ifdef MMC_QUIRK for quirks?
> };
>
> struct mmc_hwpart_conf {
>
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Re: [U-Boot] [PATCH v2 26/26] dm: mmc: Add a library function to parse generic dt binding
On 09/21/2017 11:30 PM, Jean-Jacques Hiblot wrote:
> From: Kishon Vijay Abraham I
>
> Add a new function to parse host controller dt node and
> set mmc_config. This function can be used by mmc controller
> drivers to set the generic mmc_config.
> This function can be extended to set other UHS mode caps
> once UHS mode support is added.
>
> Signed-off-by: Kishon Vijay Abraham I
> Signed-off-by: Jean-Jacques Hiblot
> ---
> drivers/mmc/mmc-uclass.c | 46 ++
> include/mmc.h| 1 +
> 2 files changed, 47 insertions(+)
>
> diff --git a/drivers/mmc/mmc-uclass.c b/drivers/mmc/mmc-uclass.c
> index 7856e0a..e30cde7 100644
> --- a/drivers/mmc/mmc-uclass.c
> +++ b/drivers/mmc/mmc-uclass.c
> @@ -120,6 +120,52 @@ int mmc_execute_tuning(struct mmc *mmc, uint opcode)
> return dm_mmc_execute_tuning(mmc->dev, opcode);
> }
>
> +int mmc_of_parse(const void *fdt, int node, struct mmc_config *cfg)
> +{
> + int val;
> +
> + val = fdtdec_get_int(fdt, node, "bus-width", 1);
> +
> + switch (val) {
> + case 0x8:
> + cfg->host_caps |= MMC_MODE_8BIT;
> + /* fall through */
> + case 0x4:
> + cfg->host_caps |= MMC_MODE_4BIT;
> + /* fall through */
> + case 0x1:
> + cfg->host_caps |= MMC_MODE_1BIT;
> + break;
> + default:
> + printf("error: %s invalid bus-width property %d\n",
> +fdt_get_name(fdt, node, NULL), val);
I guess it can be set to 1-bit by default and just display message about
invalid bus-width property.
> + return -ENOENT;
> + }
> +
> + cfg->f_max = fdtdec_get_int(fdt, node, "max-frequency", 5200);
> +
> + if (fdtdec_get_bool(fdt, node, "cap-sd-highspeed"))
> + cfg->host_caps |= MMC_CAP(SD_HS);
> + if (fdtdec_get_bool(fdt, node, "cap-mmc-highspeed"))
> + cfg->host_caps |= MMC_CAP(MMC_HS);
> + if (fdtdec_get_bool(fdt, node, "sd-uhs-sdr12"))
> + cfg->host_caps |= MMC_CAP(UHS_SDR12);
> + if (fdtdec_get_bool(fdt, node, "sd-uhs-sdr25"))
> + cfg->host_caps |= MMC_CAP(UHS_SDR25);
> + if (fdtdec_get_bool(fdt, node, "sd-uhs-sdr50"))
> + cfg->host_caps |= MMC_CAP(UHS_SDR50);
> + if (fdtdec_get_bool(fdt, node, "sd-uhs-sdr104"))
> + cfg->host_caps |= MMC_CAP(UHS_SDR104);
> + if (fdtdec_get_bool(fdt, node, "sd-uhs-ddr50"))
> + cfg->host_caps |= MMC_CAP(UHS_DDR50);
> + if (fdtdec_get_bool(fdt, node, "mmc-ddr-1_8v"))
> + cfg->host_caps |= MMC_CAP(MMC_DDR_52);
> + if (fdtdec_get_bool(fdt, node, "mmc-hs200-1_8v"))
> + cfg->host_caps |= MMC_CAP(MMC_HS_200);
Don't need to check about 1.2v?
> +
> + return 0;
> +}
> +
> struct mmc *mmc_get_mmc_dev(struct udevice *dev)
> {
> struct mmc_uclass_priv *upriv;
> diff --git a/include/mmc.h b/include/mmc.h
> index 79be6b4..6230a32 100644
> --- a/include/mmc.h
> +++ b/include/mmc.h
> @@ -651,6 +651,7 @@ int mmc_unbind(struct udevice *dev);
> int mmc_initialize(bd_t *bis);
> int mmc_init(struct mmc *mmc);
> int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error);
> +int mmc_of_parse(const void *fdt, int node, struct mmc_config *cfg);
> int mmc_read(struct mmc *mmc, u64 src, uchar *dst, int size);
>
> /**
>
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Re: [U-Boot] [PATCH v2 24/26] mmc: use the right voltage level for MMC DDR and HS200 modes
On 09/21/2017 11:30 PM, Jean-Jacques Hiblot wrote:
> HS200 only supports 1.2v and 1.8v signal voltages. DDR52 supports 3.3v/1.8v
> or 1.2v signal voltages.
> Select the lowest voltage available when using those modes.
>
> Signed-off-by: Jean-Jacques Hiblot
> ---
> drivers/mmc/mmc.c | 68
> ++-
> include/mmc.h | 20 +---
> 2 files changed, 84 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
> index 6d1bf94..2d447dd 100644
> --- a/drivers/mmc/mmc.c
> +++ b/drivers/mmc/mmc.c
> @@ -767,6 +767,7 @@ static int mmc_get_capabilities(struct mmc *mmc)
> mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
>
> cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0x3f;
> + mmc->cardtype = cardtype;
>
> if (cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V |
> EXT_CSD_CARD_TYPE_HS200_1_8V)) {
> @@ -1441,10 +1442,30 @@ struct mode_width_tuning {
> uint tuning;
> };
>
> +int mmc_voltage_to_mv(enum mmc_voltage voltage)
> +{
> + switch (voltage) {
> + case MMC_SIGNAL_VOLTAGE_000: return 0;
> + case MMC_SIGNAL_VOLTAGE_330: return 3300;
> + case MMC_SIGNAL_VOLTAGE_180: return 1800;
> + case MMC_SIGNAL_VOLTAGE_120: return 1200;
Plz, change line.
case xxx:
return xxx;
> + }
> + return -EINVAL;
> +}
> +
> static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
> {
> + int err;
Initialized err = 0
> +
> + if (mmc->signal_voltage == signal_voltage)
> + return 0;
return err; or use return ret?
> +
> mmc->signal_voltage = signal_voltage;
> - return mmc_set_ios(mmc);
> + err = mmc_set_ios(mmc);
> + if (err)
> + debug("unable to set voltage (err %d)\n", err);
> +
> + return err;
> }
>
> static const struct mode_width_tuning sd_modes_by_pref[] = {
> @@ -1584,6 +1605,43 @@ static int mmc_read_and_compare_ext_csd(struct mmc
> *mmc)
> return -EBADMSG;
> }
>
> +static int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
> + uint32_t allowed_mask)
> +{
> + u32 card_mask = 0;
> +
> + switch (mode) {
> + case MMC_HS_200:
> + if (mmc->cardtype & EXT_CSD_CARD_TYPE_HS200_1_8V)
> + card_mask |= MMC_SIGNAL_VOLTAGE_180;
> + if (mmc->cardtype & EXT_CSD_CARD_TYPE_HS200_1_2V)
> + card_mask |= MMC_SIGNAL_VOLTAGE_120;
> + break;
> + case MMC_DDR_52:
> + if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
> + card_mask |= MMC_SIGNAL_VOLTAGE_330 |
> + MMC_SIGNAL_VOLTAGE_180;
> + if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_2V)
> + card_mask |= MMC_SIGNAL_VOLTAGE_120;
> + break;
> + default:
> + card_mask |= MMC_SIGNAL_VOLTAGE_330;
> + break;
> + }
> +
> + while (card_mask & allowed_mask) {
> + enum mmc_voltage best_match;
> +
> + best_match = 1 << (ffs(card_mask & allowed_mask) - 1);
> + if (!mmc_set_signal_voltage(mmc, best_match))
> + return 0;
Just return 0?
> +
> + allowed_mask &= ~best_match;
> + }
> +
> + return -ENOTSUPP;
> +}
> +
> static const struct mode_width_tuning mmc_modes_by_pref[] = {
> {
> .mode = MMC_HS_200,
> @@ -1655,10 +1713,17 @@ static int mmc_select_mode_and_width(struct mmc *mmc,
> uint card_caps)
> for_each_mmc_mode_by_pref(card_caps, mwt) {
> for_each_supported_width(card_caps & mwt->widths,
>mmc_is_mode_ddr(mwt->mode), ecbw) {
> + enum mmc_voltage old_voltage;
> debug("trying mode %s width %d (at %d MHz)\n",
> mmc_mode_name(mwt->mode),
> bus_width(ecbw->cap),
> mmc_mode2freq(mmc, mwt->mode) / 100);
> + old_voltage = mmc->signal_voltage;
> + err = mmc_set_lowest_voltage(mmc, mwt->mode,
> + MMC_ALL_SIGNAL_VOLTAGE);
> + if (err)
> + continue;
> +
> /* configure the bus width (card + host) */
> err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
> EXT_CSD_BUS_WIDTH,
> @@ -1702,6 +1767,7 @@ static int mmc_select_mode_and_width(struct mmc *mmc,
> uint card_caps)
> if (!err)
> return 0;
> error:
> + mmc_set_signal_voltage(mmc, old_voltage);
doesn't need to check the return value?
> /* if an error occured, revert to a safer bus mode */
> mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
>
Re: [U-Boot] [PATCH] drivers: pci: imx: add imx_pcie_remove function
Hello
Does the code below really work?
On my custom MX6Q board, the code hangs on the read of the
"PCIE_PL_PFLR". Please note that this code sequence is not entered the
first time after a power up; I have to execute a U-Boot reset to
actually trigger the hang. Any ideas what is going wrong?
While debugging it, I also noticed the two problems below.
Tim Harvey wrote:
> + if (is_mx6dq()) {
> + u32 val, gpr1, gpr12;
> +
> + gpr1 = readl(&iomuxc_regs->gpr[1]);
> + gpr12 = readl(&iomuxc_regs->gpr[12]);
> + if ((gpr1 & IOMUXC_GPR1_PCIE_REF_CLK_EN) &&
> + (gpr12 & IOMUXC_GPR12_PCIE_CTL_2)) {
This could be (gpr12 & IOMUXC_GPR12_APPS_LTSSM_ENABLE)) {
> + val = readl(MX6_DBI_ADDR + PCIE_PL_PFLR);
> + val &= ~PCIE_PL_PFLR_LINK_STATE_MASK;
> + val |= PCIE_PL_PFLR_FORCE_LINK;
> +
> + imx_pcie_fix_dabt_handler(true);
> + writel(val, MX6_DBI_ADDR + PCIE_PL_PFLR);
> + imx_pcie_fix_dabt_handler(false);
> +
> + gpr12 &= ~IOMUXC_GPR12_PCIE_CTL_2;
> + writel(val, &iomuxc_regs->gpr[12]);
I think this should be
writel(gpr12, &iomuxc_regs->gpr[12]);
or even better
clrbits_le32(&iomuxc_regs->gpr[12],
IOMUXC_GPR12_APPS_LTSSM_ENABLE);
as in the rest of the file.
Dave
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Re: [U-Boot] [PATCH v3 0/2] power: Add a driver to handle the PBIAS cell of the TI SOCs
On 09/22/2017 12:03 AM, Jean-Jacques Hiblot wrote: > In the TI SOCs a PBIAS cell exists to provide a bias voltage to the MMC1 > IO cells. Without this bias voltage these I/O cells can not function > properly. This bias voltage is either 1.8v or 3.0v. > > The first patch adds 2 functions to the DM core: to count strings in a > stringlist and get a string from a stringlist based on its position in the > list. > The second patch implements the support for this PBIAS cell as a regulator > driver. Applied to u-boot-mmc for pmic. Best Regards, Jaehoon Chung > > Jean-Jacques > > > changes since v2: > * rebased on u-boot/master > * automatically select REGMAP and SYSCON if PBIAS is selected. > > changes since v1: > - add new functions to get strings from a stringlist in DM core > - use the dev_read_*() API to access the DT > - automatically select the PBIAS driver if DM_REGULATOR, DM_MMC and >MMC_OMAP_HS are set. > - removed the patch touching the DRA7 and AM57 config files. > > > Jean-Jacques Hiblot (2): > dm: core: Add functions to get strings and the string count from a > stringlist > regulator: pbias: Add PBIAS regulator for proper voltage switching on > MMC1 > > drivers/core/read.c | 11 ++ > drivers/mmc/Kconfig | 1 + > drivers/power/regulator/Kconfig | 13 ++ > drivers/power/regulator/Makefile | 1 + > drivers/power/regulator/pbias_regulator.c | 301 > ++ > include/dm/read.h | 36 > 6 files changed, 363 insertions(+) > create mode 100644 drivers/power/regulator/pbias_regulator.c > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 1/5] pci: xilinx: Fix doc comments on config space accessors
On Fri, Sep 01, 2017 at 05:25:58PM +0300, Tuomas Tynkkynen wrote: > These take the 'struct udevice *' as an argument, not the > 'struct xilinx_pcie *` which is a local variable. Fix the comments to > match the code. > > Signed-off-by: Tuomas Tynkkynen > Reviewed-by: Bin Meng Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Uboot send pull request
On Thu, Sep 21, 2017 at 10:45:08AM +0800, ub...@andestech.com wrote: > Hi Tom, > > Please pull the following patch from u-boot-nds32 into your tree. > Thanks! > > The following changes since commit e884656c2c0b2406b9bf99ea76f5a8c75128a331: > > Merge git://www.denx.de/git/u-boot-imx (2017-09-20 12:32:34 -0400) > > are available in the git repository at: > > > git://git.denx.de/u-boot-nds32.git master > > for you to fetch changes up to 7155cd2e6e7824ab60fbfc755d546d45b1d15e7b: > > nds32: spi: Support spi dm driver. (2017-09-21 10:30:22 +0800) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 5/5] pci: Remove unnecessary 'default n' from Kconfig
On Fri, Sep 01, 2017 at 05:26:02PM +0300, Tuomas Tynkkynen wrote: > 'default n' is the default anyway so it doesn't need to be specified > explicitly, and the rest of the file doesn't specify it either anywhere. > Drop it. > > Signed-off-by: Tuomas Tynkkynen > Reviewed-by: Bin Meng Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v10, 02/10] ARM: dts: stih410-family: Add missing reset_names for mmc1 node
On Tue, Sep 05, 2017 at 11:04:19AM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > reset-names property is needed to use the reset > API for STi sdhci driver. > > Signed-off-by: Patrice Chotard > Reviewed-by: Jaehoon Chung > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v10, 01/10] mmc: sti_sdhci: Rework sti_mmc_core_config()
On Tue, Sep 05, 2017 at 11:04:18AM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > Use struct udevice* as input parameter. Previous > parameters are retrieved through plat and priv data. > > This to prepare to use the reset framework. > > Signed-off-by: Patrice Chotard > Reviewed-by: Jaehoon Chung > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 2/5] pci: xilinx: Remove unused field 'hose' from struct xilinx_pcie
On Fri, Sep 01, 2017 at 05:25:59PM +0300, Tuomas Tynkkynen wrote: > This field has never been used as the driver has been DM-based since the > beginning. Drop it. > > Signed-off-by: Tuomas Tynkkynen > Reviewed-by: Bin Meng Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 3/5] pci: tegra: Remove unused field 'hose' from struct tegra_pcie
On Fri, Sep 01, 2017 at 05:26:00PM +0300, Tuomas Tynkkynen wrote: > This field is no longer used since the DM conversion. Drop it. > > Signed-off-by: Tuomas Tynkkynen > Reviewed-by: Bin Meng Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,v2,5/9] dm: misc: add stm32 rcc driver
On Wed, Sep 13, 2017 at 06:00:08PM +0200, patrice.chot...@st.com wrote: > From: Christophe Kerello > > This patch adds the support of reset and clock control > block (rcc) found on STM32 SoCs. > This driver is similar to a MFD linux driver. > > This driver supports currently STM32H7 only. > STM32F4 and STM32F7 will be migrated to this rcc MFD driver > in the future to uniformize all STM32 SoCs already upstreamed. > > Signed-off-by: Christophe Kerello > Signed-off-by: Patrice Chotard > Reviewed-by: Vikas Manocha > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2] arm: am33xx: Make pin multiplexing functions optional
On Thu, Sep 14, 2017 at 02:37:08PM +0200, Felix Brack wrote: > This patch provides default implementations of the two functions > set_uart_mux_conf and set_mux_conf_regs. Hence boards not using > them do not need to provide their distinct empty definitions. > > Signed-off-by: Felix Brack > Reviewed-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v10, 03/10] mmc: sti_sdhci: Use reset framework
On Tue, Sep 05, 2017 at 11:04:20AM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > Signed-off-by: Patrice Chotard > Reviewed-by: Jaehoon Chung > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v10, 05/10] STiH410-B2260: enable USB Host Networking
On Tue, Sep 05, 2017 at 11:04:22AM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > Enable USB Host Networking support by enabling Ethernet/USB > adaptors support and by enabling some BOOTP flags > > Signed-off-by: Patrice Chotard > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v10, 06/10] STiH410-B2260: enable USB, fastboot, reset, PHY related flags
On Tue, Sep 05, 2017 at 11:04:23AM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > Signed-off-by: Patrice Chotard > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, 4/5] pci: layerscape: Remove unused field 'hose' from struct ls_pcie
On Fri, Sep 01, 2017 at 05:26:01PM +0300, Tuomas Tynkkynen wrote: > This field is no longer used since the DM conversion. Drop it. > > Signed-off-by: Tuomas Tynkkynen > Reviewed-by: Bin Meng Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 6/9] ARM: DTS: stm32: add stm32h743i-disco files
On Wed, Sep 13, 2017 at 06:00:09PM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > All these files are imported from linux kernel v4.13 > > Add device tree support for STM32H743 SoC and discovery > board. This board offers : > _ STM32H743XIH6 microcontroller with 2 Mbytes of > Flash memory and 1 Mbyte of RAM in TFBGA240+25 package > _ 5.7” 640x480 TFT color LCD with touch screen > _ Ethernet compliant with IEEE-802.3-2002 > _ USB OTG HS > _ I2 C compatible serial interface > _ ST-MEMS digital microphones > _ 8-Gbyte (or more) SDIO3.0 interface microSD™ card > _ 8Mx32bit SDRAM > _ 1-Gbit Twin Quad-SPI NOR Flash > _ Reset, wakeup, or key buttons > _ Joystick with 4-direction control and selector > _ Board connectors : > 1 USB with Micro-AB > Ethernet RJ45 > Stereo headset jack including analog microphone input > microSD™ card > RCA connector > JTAG/SWD and ETM trace >_ Expansion connectors: > Arduino Uno compatible Connectors > 2 x PIO connectors (PMOD and PMOD+) >_ On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration > capability: mass storage, virtual COM port and debug port > > Signed-off-by: Patrice Chotard > Reviewed-by: Vikas Manocha > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v10, 10/10] board: STiH410-B2260: add fastboot support
On Tue, Sep 05, 2017 at 11:04:27AM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > Add usb_gadget_handle_interrupts(), board_usb_init(), > board_usb_cleanup() and g_dnl_board_usb_cable_connected() > callbacks needed for FASTBOOT support > > Signed-off-by: Patrice Chotard > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v10, 08/10] ARM: dts: STiH410: set DWC3 dual role mode to peripheral
On Tue, Sep 05, 2017 at 11:04:25AM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > On STi 96boards, configure by default the micro USB connector > (managed by DWC3 hardware block) in peripheral mode. > This will allow to use fastboot feature. > > Signed-off-by: Patrice Chotard > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v10, 07/10] usb: dwc3: Add dwc3 glue driver support for STi
On Tue, Sep 05, 2017 at 11:04:24AM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > This patch adds the ST glue logic to manage the DWC3 HC > on STiH407 SoC family. It configures the internal glue > logic and syscfg registers. > > Part of this code been extracted from kernel.org driver > (drivers/usb/dwc3/dwc3-st.c) > > Signed-off-by: Patrice Chotard > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,v10,04/10] usb: phy: Add STi USB2 PHY
On Tue, Sep 05, 2017 at 11:04:21AM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > This is the generic phy driver for the picoPHY ports > used by USB2/1.1 controllers. It is found on STiH407 SoC > family from STMicroelectronics. > > Signed-off-by: Patrice Chotard > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,V2] test/py: gpt: make use of infra-structure
On Fri, Sep 15, 2017 at 12:19:38PM -0600, Stephen Warren wrote:
> From: Stephen Warren
>
> Make various changes to the GPT test:
>
> 1) Reference the disk image using an absolute path in all cases. This
> allows test/py to operate correctly if it's run from a directory other
> than the root of the U-Boot source tree.
>
> 2) Store the disk image in the teswt/py persistent data directory. This
> removes the need to re-generate it every time the tests are run.
>
> 3) Execute sgdisk using u_boot_utils.run_and_log() so that its output is
> captured in the test log. This allows debugging any problems running it.
>
> 4) Make the disk image a test fixture. This removes the requirement to
> always run all GPT tests, and run them in order. The current code doesn't
> create the disk image if e.g. just test_gpt_uuid() is executed via the
> test.py -k command-line option.
>
> 5) Use @pytest.mark.buildconfigspec for all feature dependencies, rather
> than manually implementing some of them.
>
> 6) Make all tests depend on sandbox, since they use the sandbox-specific
> host command.
>
> Fixes: a2f422555fc8 ("add pytests for 'gpt guid' command in sandbox")
> Fixes: c5772188ede9 ("add pytests for 'gpt rename' and 'gpt swap'")
> Signed-off-by: Stephen Warren
> Tested-by: Tom Rini
Applied to u-boot/master, thanks!
--
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Re: [U-Boot] [U-Boot,v2,2/9] serial: stm32x7: add STM32H7 support
On Wed, Sep 13, 2017 at 06:00:05PM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > STM32F7 and STM32H7 shares the same UART block, add > STM32H7 compatible string. > > Signed-off-by: Patrice Chotard > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 1/9] pinctrl: stm32: add stm32h743-pinctrl compatible
On Wed, Sep 13, 2017 at 06:00:04PM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > STM32H7 SoCs uses the same pinctrl block as found into > STM32F7 SoCs > > Signed-off-by: Patrice Chotard > Reviewed-by: Simon Glass > Reviewed-by: Vikas Manocha Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v10, 09/10] ARM: dts: STiH410: update ehci and ohci compatible
On Tue, Sep 05, 2017 at 11:04:26AM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > Update ehci and ohci node's compatible string in order to > use ehci-generic and ohci-generic drivers. > > Signed-off-by: Patrice Chotard > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-video/next
On Fri, Sep 15, 2017 at 03:12:28PM +0200, Anatolij Gustschin wrote: > Hi Tom, > > please pull some new video patches. The full build passed: > > https://travis-ci.org/vdsao/u-boot-video/builds/275799369 > > The following changes since commit c98ac3487e413c71e5d36322ef3324b21c6f60f9: > > Prepare v2017.09 (2017-09-11 14:10:40 -0400) > > are available in the git repository at: > > git://git.denx.de/u-boot-video.git next > > for you to fetch changes up to 8ef05352508f99b9e69feeca17a49671cc3d0ccf: > > video: add config option to skip framebuffer clear (2017-09-12 13:40:47 > +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 3/9] dm: clk: add clk driver support for stm32h7 SoCs
On Wed, Sep 13, 2017 at 06:00:06PM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > This driver implements basic clock setup, only clock gating > is implemented. > > This driver doesn't implement .of_match as it's binded > by MFD RCC driver. > > Files include/dt-bindings/clock/stm32h7-clks.h and > doc/device-tree-bindings/clock/st,stm32h7-rcc.txt > will be available soon in a kernel tag, as all the > bindings have been acked by Rob Herring [1]. > > [1] http://lkml.iu.edu/hypermail/linux/kernel/1704.0/00935.html > > Signed-off-by: Patrice Chotard > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 9/9] board: Add stm32h7 SoC, discovery and evaluation boards support
On Wed, Sep 13, 2017 at 06:00:12PM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > This patch adds support for stm32h7 soc family, stm32h743 > discovery and evaluation boards. > > For more information about STM32H7 series, please visit: > http://www.st.com/en/microcontrollers/stm32h7-series.html > > Signed-off-by: Patrice Chotard > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Makefile: Update minimum dtc version to 1.4.3
On Fri, Sep 15, 2017 at 01:15:25PM -0400, Tom Rini wrote: > With support for overlays and calling the -@ flag to dtc we need to have > at least 1.4.3 available now. > > Cc: Simon Glass > Reported-by: Stephen Warren > Signed-off-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2] net/tftp: fix build if CMD_BOOTEFI is not set
On Fri, Sep 15, 2017 at 10:16:48PM +0200, Jörg Krause wrote: > Fixes: > net/tftp.c:811: undefined reference to `efi_set_bootdev' > > Signed-off-by: Jörg Krause > Reviewed-by: Bin Meng Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] spl: stash bootstage info before jump to next stage
On Wed, Sep 13, 2017 at 06:24:24PM +0800, Kever Yang wrote: > Since we may jump to next stage like ATF/OP-TEE instead of U-Boot, > we need to stash the bootstage info before it. > > Signed-off-by: Kever Yang > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot,v2,4/9] dm: reset: add stm32 reset driver
On Wed, Sep 13, 2017 at 06:00:07PM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > This driver is adapted from linux drivers/reset/reset-stm32.c > It's compatible with STM32 F4/F7/H7 SoCs. > > This driver doesn't implement .of_match as it's binded > by MFD RCC driver. > > To add support for each SoC family, a SoC's specific > include/dt-binfings/mfd/stm32xx-rcc.h file must be added. > > This patch only includes stm32h7-rcc.h dedicated for STM32H7 SoCs. > Other SoCs support will be added in the future. > > Signed-off-by: Patrice Chotard > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 7/9] ARM: DTS: stm32: add stm32h743i-eval files
On Wed, Sep 13, 2017 at 06:00:10PM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > This file is imported from linux kernel v4.13 > > Add device tree support for STM32H743 evaluation board. > This board offers : > _ STM32H743XIH6 microcontroller with 2 Mbytes of > Flash memory and 1 Mbyte of RAM in TFBGA240+25 package > _ 5.7” 640x480 TFT color LCD with touch screen > _ Ethernet compliant with IEEE-802.3-2002 > _ USB OTG HS and FS > _ I2 C compatible serial interface > _ RTC with rechargeable backup battery > _ SAI Audio DAC > _ ST-MEMS digital microphones > _ 8-Gbyte (or more) SDIO3.0 interface microSD™ card > _ 8Mx32bit SDRAM, 1Mx16bit SRAM and 8Mx16bit NOR Flash > _ 1-Gbit Twin Quad-SPI NOR Flash > _ Potentiometer > _ 4 colored user LEDs > _ Reset, wakeup, tamper or key buttons > _ Joystick with 4-direction control and selector > _ Board connectors : > Power jack > 3 USB with Micro-AB > RS-232 communications > Ethernet RJ45 > FD-CAN compliant connection > Stereo headset jack including analog microphone input > 2 audio jacks for external speakers > microSD™ card > JTAG/SWD and ETM trace >_ Expansion connectors: > Extension connectors and memory connectors for daughterboard > or wire-wrap board >_ Flexible power-supply options: ST-LINK USB VBUS or external > sources >_ On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration > capability: mass storage, virtual COM port and debug port > > Signed-off-by: Patrice Chotard > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCHv2] fs/fat: Reduce stack usage
On Fri, Sep 22, 2017 at 09:02:09AM -0400, Tom Rini wrote: > We have limited stack in SPL builds. Drop itrblock and move to > malloc/free of itr to move this off of the stack. As part of this fix a > double-free issue in fat_size(). > > Signed-off-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Travis-CI: Checkout only v1.4.3 of dtc
On Sun, Sep 17, 2017 at 09:42:25AM -0400, Tom Rini wrote: > Our minimum DTC version is 1.4.3, so check that out. > > Signed-off-by: Tom Rini Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [linux-sunxi] Re: [PATCH v5 1/4] sunxi: change the DE1 video option to CONFIG_VIDEO_SUNXI
在 2017-09-22 19:57，Maxime Ripard 写道： On Fri, Sep 22, 2017 at 06:41:40AM +, icen...@aosc.io wrote: 在 2017-09-22 03:18，Maxime Ripard 写道： > On Thu, Sep 21, 2017 at 07:48:20AM +, Icenowy Zheng wrote: > > > > > > 于 2017年9月21日 GMT+08:00 下午3:40:23, Maxime Ripard > > 写到: > > >Hi, > > > > > >On Wed, Sep 20, 2017 at 04:18:19PM +, Icenowy Zheng wrote: > > >> The sunxi DE1 video option used to be CONFIG_VIDEO, which has the > > >same > > >> name as the "Enable legacy video support" option in > > >> drivers/video/Kconfig. > > >> > > >> Change the option name to CONFIG_VIDEO_SUNXI, which is really used by > > >> Makefile under drivers/video/sunxi/, and defined in sunxi-common.h > > >> when CONFIG_VIDEO is selected before this change. Now > > >CONFIG_VIDEO_SUNXI > > >> selects CONFIG_VIDEO and the usages of CONFIG_VIDEO in sunxi Kconfig > > >and > > >> config headers are all converted to use CONFIG_VIDEO_SUNXI. > > >> > > >> Signed-off-by: Icenowy Zheng > > > > > >The patch is fine, but you also seem to imply that it's an issue. It's > > >not, you can very well define in Kconfig the same symbol in two > > >different places, and Kconfig will merge the two by itself. > > > > So I can drop this patch and simply add "imply VIDEO_DT_SIMPLEFB" in > > the VIDEO option at sunxi Kconfig? > > I don't see anything wrong with this patch, there's no need to change > it. So this patchset can be applied if no further rejections? Yes, I'm just waiting for some feedback from the video people. I didn't To: or Cc: them... But I think U-Boot has Patchwork, right? Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 0/5] mmc: omap_hsmmc: Add support for ADMA
On 09/21/2017 11:51 PM, Jean-Jacques Hiblot wrote: > This series enables the ADMA present in some OMAP SOCs. > On a DRA7 the performances when reading from the eMMC go from 18MB/s > to 43MB/s. > Also while were at it, fix some incorrect bit operations > > This series applies on top of the series that enables HS200 and UHS mode > "mmc: Add support for HS200 and UHS modes" but should be easy to use on top > of u-boot/master (just remove special handling of the tuning). > > This is the first series of 3 which wille enable HS200 and UHS on the omap5 > platforms (dra7 and am57). I didn't have omap board...Can someone check this patchset with omap? Then it's more clearly. Best Regards, Jaehoon Chung > > Cheers, > > Jean-Jacques > > changes since v1: > * added a timeout to terminate the DMA transfer if it takes too long > * changed omap_hsmmc_adma_desc() and omap_hsmmc_prepare_adma_table(() >to not return any value (void) > * removed wrong comment about cache handling > > > Jean-Jacques Hiblot (2): > Revert "omap_hsmmc: update struct hsmmc to accommodate omap3 from DT" > omap: Update the base address of the MMC controllers > > Kishon Vijay Abraham I (3): > mmc: omap_hsmmc: Add support for DMA (ADMA2) > mmc: omap_hsmmc: Enable Auto command (CMD12) enable > mmc: omap_hsmmc: Fix incorrect bit operations for disabling a bit > > arch/arm/include/asm/arch-am33xx/mmc_host_def.h| 4 +- > arch/arm/include/asm/arch-omap4/mmc_host_def.h | 6 +- > arch/arm/include/asm/arch-omap5/mmc_host_def.h | 6 +- > arch/arm/include/asm/omap_mmc.h| 19 +- > arch/arm/mach-keystone/include/mach/mmc_host_def.h | 4 +- > drivers/mmc/omap_hsmmc.c | 251 > + > 6 files changed, 238 insertions(+), 52 deletions(-) > ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2] spl: Fix compiling warning on gunzip argument
On Fri, Sep 15, 2017 at 08:21:13AM -0700, York Sun wrote: > common/spl/spl_fit.c:201:12: warning: passing argument 4 of ‘gunzip’ > from incompatible pointer type [-Wincompatible-pointer-types] >src, &length)) > > Signed-off-by: York Sun > Reported-by: Heinrich Schuchardt > CC: Jean-Jacques Hiblot Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [U-Boot, v2, 8/9] ARM: DTS: stm32: adapt stm32h7 dts files for U-boot
On Wed, Sep 13, 2017 at 06:00:11PM +0200, patrice.chot...@st.com wrote: > From: Patrice Chotard > > This patch adapts stm32h743 disco and eval dts files to match > with U-boot requirements or add features wich are not yet > upstreamed on kernel side : > > _ Add RCC clock driver node and update all clocks phandle > accordingly. > > By default, on kernel side, all clocks was temporarly > configured as a phandle to timer_clk waiting for a RCC > clock driver to be available. > On U-boot side, we now have a dedicated RCC clock driver, we > can configured all clocks as phandle to this driver. > > All this binding update will be available soon in a kernel tag, > as all the bindings have been acked by Rob Herring [1]. > > [1] http://lkml.iu.edu/hypermail/linux/kernel/1704.0/00935.html > > _ Align STM32H7 serial compatible string with the one which will be > available in next kernel tag. The bindings has been acked by > Rob Herring [2]. > This compatible string will be usefull to add stm32h7 specific > feature for this serial driver. > > [2] https://lkml.org/lkml/2017/7/17/739 > > _ Add gpio compatible and aliases for stm32h743 > > _ Add FMC sdram node with associated new bindings value to > manage second bank (ie bank 1). > > _ Add missing HSI and CSI oscillators nodes needed > by STM32H7 RCC clock driver. > > Clock sources could be: > _ HSE (High Speed External) > _ HSI (High Speed Internal) > _ CSI (Low Power Internal) > > These clocks can be used as clocksource in some configuration. > By default, HSE is selected as clock source. > > _ Set HSE to 25Mhz for stm32h743i-disco and eval board > > By default, the external oscillator frequency is defined at > 25 Mhz in SoC stm32h743.dtsi file. > It has been set at 125 Mhz in kernel DT temporarly waiting for > RCC clock driver becomes available. > > As in U-boot we got a RCC clock driver, the real value of HSE > clock can be used. > > _ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl, > pwrcfg and gpio nodes. > > Signed-off-by: Patrice Chotard > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: Digital signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 4/9] sunxi: Switch MUSB to gadget mode on the Bananapi M3
On Fri, Sep 22, 2017 at 11:20:10AM +, Chen-Yu Tsai wrote: > On Fri, Sep 22, 2017 at 4:14 PM, Maxime Ripard > wrote: > > On Fri, Sep 22, 2017 at 07:26:30AM +, Chen-Yu Tsai wrote: > >> The Bananapi M3 has a micro-USB OTG port. It supports both host and > >> gadget mode. Having the OTG port operate in gadget mode is more useful, > >> as we can use it for fastboot or Ethernet over USB. > >> > >> The board has 2 other USB host ports that are supported. These can be > >> used for connecting peripherals. > >> > >> Signed-off-by: Chen-Yu Tsai > >> --- > >> configs/Sinovoip_BPI_M3_defconfig | 2 +- > >> 1 file changed, 1 insertion(+), 1 deletion(-) > >> > >> diff --git a/configs/Sinovoip_BPI_M3_defconfig > >> b/configs/Sinovoip_BPI_M3_defconfig > >> index f321d94e04eb..e48983fc3310 100644 > >> --- a/configs/Sinovoip_BPI_M3_defconfig > >> +++ b/configs/Sinovoip_BPI_M3_defconfig > >> @@ -27,5 +27,5 @@ CONFIG_AXP_DCDC5_VOLT=1200 > >> CONFIG_AXP_DLDO3_VOLT=2500 > >> CONFIG_AXP_SW_ON=y > >> CONFIG_USB_EHCI_HCD=y > >> -CONFIG_USB_MUSB_HOST=y > >> +CONFIG_USB_MUSB_GADGET=y > > > > I wonder whether this could become the default. > > > > As far as I can see, having it as host can only be useful on the > > tablets we support. > > > > Maybe we can add a config option for tablets device, and if it's set, > > enable in host mode, and if not defaults to gadget. > > > > Eventually, we could move all the options that are not really useful > > on anything but a tablet that we currently select, like USB_KEYBOARD > > There are also the cases where the OTG controller is routed to a USB > host port. These are likely set top boxes. It would probably be better > to have the user be able to explicitly set it to gadget mode if they > want to do development, but otherwise be in host mode by default. I don't know, maybe I'm heavily (confirmation) biased, but I've seen far more people using the micro USB as a gadget (or at least, not as a host, just powering the board), than people using it as hosts. Actually, apart from the boards that are wiring it to an USB-A connector, I haven't seen anyone use that kind of setup, ever. For the tablets where it's your only option to interact with the device since you don't have any UARTs, it makes sense. Same thing for the ones that wire it to a USB-A connector. But for all the boards out there with a micro or mini USB connector that can power them, I really feel like the default should be to a gadget. Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 00/26] mmc: Add support for HS200 and UHS modes
Dear JJ, On 09/21/2017 11:29 PM, Jean-Jacques Hiblot wrote: > This series brings support for HS200 and UHS modes to the mmc core. > It has been tested with the hsmmc driver on several platforms (DRA7, > AM57x, AM437x, beaglebone black, Atmel SAMA5D3 xplained). Some modifications > are required in the host driver to take advantage of this (voltage switching, > tuning). The changes to the host driver will be posted a another series as > this > one is already long enough. > > The series starts with a small refactoring of th sd/mmc startup. The first 5 > commits > are mostly moving code around with little or no functionnal change. > > Then the notion of "mode" is introduced. Until now, this information wasn't > kept in struct mmc. Only the clock and a flag for ddr was kept. Later the mode > information will be used to select the clock frequency, the ddr flag and the > tuning procedure. It will be also be check against the host capabilities. > > Then comes the big refactoring job in: > "mmc: refactor MMC startup to make it easier to support new modes" and > "mmc: refactor SD startup to make it easier to support new modes" > Since the number of modes is increasing, it makes sense to try them in a more > organized way. those commits use a list of supported modes and iterate through > them to find the best working one. It also allows to switch more easilly from > one mode to another (switching from HS200 to DDR52 to access boot partitions > for example) > > Then there are a couple of new callback added to: > - send the initialization stream (74 clock cycles) > - wait while the card is busy (used during UHS voltage switching). checking is > done on dat0. > - select the IO voltage > > Then Power cycle is added. Without power cycle, if a UHS card fails to > enumerate in > UHS mode, it can't fall back to high speed mode and card enumeration will > fail. > Also in case of a reset (as opposed to a power on), it ensures that the SDCard > is in clean state before re-doing the initialization. > > And finally the last commits add the support for HS200 and UHS. > > With this in place and the required changes in the HSMMC host driver > (including > DMA), we observe significant improvements in the performances on a DRA72 evm: > eMMC HS200: 124 MB/s > eMMC DDR52: 78 MB/s > sd SDR104: 71 MB/s > sd SDR50: 44 MB/s I have one question. Did you test about accessing Boot partition of eMMC? As i know, boot partition doesn't support the HS200 mode. When i checked your patches, there is no the function of mode changing for accessing boot partition. If i missed it, let me know, plz. Best Regards, Jaehoon Chung > > cheers, > > Jean-Jacques > > changes since v1: > Changes take in account all the comment made during the first round of review. > But it also include a rework of the handling of the voltage supplies and 2 new > helper functions that can be used by the host driver during tuning and dts > parsing. > > Here is a detailed list: > * rebase on u-boot/master. > * add the description for the new functions/members > * fix the typos found in the reviews > * limit the new features to DM_MMC only > * fix the new checkpatch warnings/errors (is it now more strict ?) > * get the voltage regulators from dts (main and IO-lines) > * remove the set_vdd callback and do the job in the mmc core > * add a send_init_stream callback to perform the 74 clock cycle >sequence after power up > * do a full power cycle (if possible) before the initialization. This ensures >that the sd/MMC is in valid knwon state. Also it allows to check if the > power >cycling works as expected. > * disable the UHS modes is power cycling is not available/working. This > ensures >that we won't be stuck if the UHS initialization fails. > * select the appropriate signal voltage when selecting a mode (MMC only) > * add a helper function to parse the generic dt bindings > * add a helper function to send the tuning command > > Jean-Jacques Hiblot (17): > mmc: dm: get the IO-line and main voltage regulators from the dts > mmc: split mmc_startup() > mmc: move the MMC startup for version above v4.0 in a separate > function > mmc: make ext_csd part of struct mmc > mmc: add a function to read and test the ext csd (mmc >= 4) > mmc: introduce mmc modes > mmc: Add a function to dump the mmc capabilities > mmc: use mmc modes to select the correct bus speed > cmd: mmc: display the mode name and current bus speed in the mmc info > mmc: refactor SD startup to make it easier to support new modes > mmc: refactor MMC startup to make it easier to support new modes > mmc: Add a new callback function to perform the 74 clocks cycle > sequence > mmc: Add support for UHS modes > mmc: disable UHS modes if Vcc cannot be switched on and off > mmc: Change mode when switching to a boot partition > mmc: use the right voltage level for MMC DDR and HS200 modes > mmc: add a library function to send tuning
Re: [U-Boot] [RESEND PATCH 5/5] sunxi: video: add LCD support to DE2 driver
On Fri, Sep 22, 2017 at 04:42:24AM +, Vasily Khoruzhick wrote: > >> >>> + lcdc_init(lcdc); > >> >>> + sunxi_lcdc_config_pinmux(); > >> >> > >> >> This is already handled in sunxi_lcdc_tcon0_mode_set, why duplicate > >> >> it? > >> > > >> > Because the one that sunxi_lcdc_tcon0_mode_set() calls is > >> > DE1-specific. I don't want to split out that code that won't be used > >> > by DE2 driver. > > > > Then move out the common code. It's kind of weird though, since the > > DE1 vs DE2 stuff is basically only for the layers part. The TCON is > > always there, and is mostly the same. So you should be able to re-use > > that with minor modifications. > > I'm not sure what common code you're talking about. I've already moved > out lcdc_pll_set(). Moving pinmux > configuration out into common code doesn't look reasonable. It's > different for A64 -- for A64 it configures > GPD(0)-GPD(21) as function, while for other SoCs it's GPD(18)-GPD(27) > or GPD(0)-GPD(27) depending > on SoC model. Anyway, pinmux configuration code for DE1 contains a > number of ifdef-s that are not necessary > for DE2 -- these SoCs don't have DE2 and thus won't be supported. Again, DE1 vs DE2 has nothing to do in the discussion DE1 devices will look like this: DE1 -> TCON -> HDMI / LCD / whatever -> pins DE2 will be: DE2 -> TCON -> HDMI / LCD / whatever -> pins The only thing not in common between these two cases is the display engine used. Everything else should be common (except for special cases, like the HDMI controller itself that changed as well). Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Ambiguous regulator node name prefixes
Hello, I'm working on a DM and DT compatible driver for the TI TPS65910 PMIC. The regulators for this PMIC are defined in arch/arm/dts/tps65910.dtsi and named 'regulator@0' through 'regulator@13'. Using for example the prefix 'regulator@1' in pmic_child_info[] will match to 'regualtor@1' and 'regulator@10' through 'regulator@13'. Hence, in my case, a BUCK driver instead of a LDO driver will be bound to regulators 11 through 13 by pmic_bind_children() which is not correct. Reflecting on the problem I see the following two solutions: 1) rename the nodes in arch/arm/dts/tps65910.dtsi or 2) modify pmic_bind_children() Solution 1), rename the nodes in arch/arm/dts/tps65910.dtsi. The nodes in the device tree include file will be renamed allowing pmic_bind_children() to distinguish them unambiguously. Pros: - simple and fast Cons: - file tps65910.dtsi will divert from the LINUX kernel version of the same file - other device tree source files like am335x-evmsk.dts, am335x-icev2.dts and am335x-pxm50.dts will be affected - the boards using those device tree source files may also be affected - the solution is not sustainable as it is kind of fix for the problem with the TPS65910 only Solution 2), modify pmic_bind_children() Pros: - will eventually help in similar cases with other PMICs - does not affect other, existing designs that are using pmic_bind_children() as intended since it is implements using some fallback strategy Cons: - modifications to pmic_bind_children() (not really a con) I personally favor solution 2 and suggest to modify the function pmic_bind_children() as follows: if it fails to match the prefix against the node-name it should try to match it against the node property 'regulator-name' before failing. This retains the entire logic of pmic_bind_children() and should not produce any collateral damage. The modifications in the device tree source file are made for a specific board only, i.e. in its dts file and not in some common include (dtsi) file, hence not affecting other designs. Any feedback is appreciate before I start the patch. -- Felix ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] imx: Include header file
When building with W=1 errors like the one below is seen: board/freescale/mx6sabresd/mx6sabresd.c:546:5: warning: no previous prototype for ‘overwrite_console’ [-Wmissing-prototypes] int overwrite_console(void) Fix the build warnings by including . Signed-off-by: Diego Dorta --- board/advantech/dms-ba16/dms-ba16.c | 1 + board/aristainetos/aristainetos.c | 1 + board/beckhoff/mx53cx9020/mx53cx9020.c | 1 + board/congatec/cgtqmx6eval/cgtqmx6eval.c| 1 + board/el/el6x/el6x.c| 1 + board/embest/mx6boards/mx6boards.c | 1 + board/freescale/mx51evk/mx51evk.c | 1 + board/freescale/mx53loco/mx53loco.c | 1 + board/freescale/mx6sabreauto/mx6sabreauto.c | 1 + board/freescale/mx6sabresd/mx6sabresd.c | 1 + board/ge/bx50v3/bx50v3.c| 1 + board/logicpd/imx6/imx6logic.c | 1 + board/technologic/ts4800/ts4800.c | 1 + board/toradex/apalis_imx6/apalis_imx6.c | 1 + board/toradex/colibri_imx6/colibri_imx6.c | 1 + 15 files changed, 15 insertions(+) diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c index c728943..6fe7471 100644 --- a/board/advantech/dms-ba16/dms-ba16.c +++ b/board/advantech/dms-ba16/dms-ba16.c @@ -25,6 +25,7 @@ #include #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; diff --git a/board/aristainetos/aristainetos.c b/board/aristainetos/aristainetos.c index 872fedd..a60cbfc 100644 --- a/board/aristainetos/aristainetos.c +++ b/board/aristainetos/aristainetos.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include diff --git a/board/beckhoff/mx53cx9020/mx53cx9020.c b/board/beckhoff/mx53cx9020/mx53cx9020.c index a18a4e8..021bd96 100644 --- a/board/beckhoff/mx53cx9020/mx53cx9020.c +++ b/board/beckhoff/mx53cx9020/mx53cx9020.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c b/board/congatec/cgtqmx6eval/cgtqmx6eval.c index 2ed66d3..575aff7 100644 --- a/board/congatec/cgtqmx6eval/cgtqmx6eval.c +++ b/board/congatec/cgtqmx6eval/cgtqmx6eval.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include diff --git a/board/el/el6x/el6x.c b/board/el/el6x/el6x.c index fb128f5..b2fe7fd 100644 --- a/board/el/el6x/el6x.c +++ b/board/el/el6x/el6x.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c index 8674599..ae04f68 100644 --- a/board/embest/mx6boards/mx6boards.c +++ b/board/embest/mx6boards/mx6boards.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include #include diff --git a/board/freescale/mx51evk/mx51evk.c b/board/freescale/mx51evk/mx51evk.c index a88ff8f..9e8a02e 100644 --- a/board/freescale/mx51evk/mx51evk.c +++ b/board/freescale/mx51evk/mx51evk.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include diff --git a/board/freescale/mx53loco/mx53loco.c b/board/freescale/mx53loco/mx53loco.c index ea36603..db0e2fb 100644 --- a/board/freescale/mx53loco/mx53loco.c +++ b/board/freescale/mx53loco/mx53loco.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include diff --git a/board/freescale/mx6sabreauto/mx6sabreauto.c b/board/freescale/mx6sabreauto/mx6sabreauto.c index 15ca029..bdeb5f7 100644 --- a/board/freescale/mx6sabreauto/mx6sabreauto.c +++ b/board/freescale/mx6sabreauto/mx6sabreauto.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 5b50bc8..0d31235 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include "../common/pfuze.h" diff --git a/board/ge/bx50v3/bx50v3.c b/board/ge/bx50v3/bx50v3.c index c7df4ce..2e8f394 100644 --- a/board/ge/bx50v3/bx50v3.c +++ b/board/ge/bx50v3/bx50v3.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include "vpd_reader.h" diff --git a/board/logicpd/imx6/imx6logic.c b/board/logicpd/imx6/imx6logic.c index 78fc546..1f3e378 100644 --- a/board/logicpd/imx6/imx6logic.c +++ b/board/logicpd/imx6/imx6logic.c @@ -11,6 +11,7 @@ #include #include +#include #include #include #include diff --git a/board/technologic/ts4800/ts4800.c b/board/technologic/ts4800/ts4800.c index 8fe26a7..e5bec57 100644 --- a/board/technologic/ts4800/ts4800.c +++ b/board/technologic/ts4800/ts4800.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c index 628a61d..c43f
Re: [U-Boot] Armada 38x clearfog pci trouble
Hi Bin, On 22.09.2017 15:33, Bin Meng wrote: On Fri, Sep 22, 2017 at 8:32 PM, Stefan Roese wrote: On 22.09.2017 14:13, Владислав wrote: I try to port sm750fb driver to uboot. I need to access bar0 because its framebuffer memory of video card. After little research i find out pciauto_region_allocate failed for allocation region for bar0: PCI Autoconfig: BAR 0, Mem, size=0x400, No room in resource (addr: 0xE800, size: 0x400, res->bus_start: 0xE800, res->size: 0x200) PCI Autoconfig: BAR 1, Mem, size=0x20, address=0xe800 bus_lower=0xe820 I find out definition in pci_mvebu.c: #define PCIE_MEM_SIZE (32 << 20) After changing it to (128 << 20) autoconfig working vell and bar0 is fully accessible and work Can we convert this pci_mvebu.c to DM PCI? So that this won't be hardcoded in the driver, instead using device tree settings from the boards. I agree, that this would be much better. But I currently don't have the time to port this driver over to DM. Patches from others are very welcome... ;) Thanks, Stefan ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2] sun50i: h5: Add NanoPi Neo Plus2 DT initial support
Hi Antony,
On Fri, Sep 22, 2017 at 01:09:05PM +, Antony Antony wrote:
> +&mmc0 {
> + compatible = "allwinner,sun50i-h5-mmc",
> + "allwinner,sun50i-a64-mmc";
Sorry for missing that out earlier, but why do you need to override
the compatible here?
Is there something missing in the DTSI?
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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[U-Boot] [PATCH v2 0/3] STiH410-B2260: update environment/configuration settings
From: Patrice Chotard Update the CONFIG_EXTRA_ENV_SETTINGS, BOOT_TARGET_DEVICES and CONFIG_BOOTARGS Fix SDRAM size v2: rebase on v2017.09 Lee Jones (1): board: STiH410-B2260: set ramdisk_addr_r to 0x4800 Nicolas Le Bayon (1): board: STiH410-B2260: fix sdram size Patrice Chotard (1): board: STiH410-B2260: update environment variable configs/stih410-b2260_defconfig | 2 +- include/configs/stih410-b2260.h | 27 +++ 2 files changed, 24 insertions(+), 5 deletions(-) -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 1/3] board: STiH410-B2260: update environment variable
From: Patrice Chotard Update environment variable by updating: _ BOOT_TARGET_DEVICE _ CONFIGS_BOOTARGS _ kernel_addr_r, fdtfile, fdt_addr_r, scriptaddr, fdt_high, intird_high Signed-off-by: Patrice Chotard --- v2: rebase on v2017.09 configs/stih410-b2260_defconfig | 2 +- include/configs/stih410-b2260.h | 24 +--- 2 files changed, 22 insertions(+), 4 deletions(-) diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index 8fd1ff2..fe3dde3 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -6,7 +6,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" +CONFIG_BOOTARGS="console=ttyAS1,115200 CONSOLE=/dev/ttyAS1 consoleblank=0 root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait mem=992M@0x4000 vmalloc=256m" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_PROMPT="stih410-b2260 => " CONFIG_FASTBOOT=y diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 372c083..115488c 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -18,10 +18,28 @@ #define CONFIG_SYS_HZ_CLOCK10 /* 1 GHz */ +#include /* Environment */ -#define CONFIG_EXTRA_ENV_SETTINGS \ - "board= B2260" \ - "load_addr= #CONFIG_SYS_LOAD_ADDR \0" + +#define CONFIG_LOADADDRCONFIG_SYS_LOAD_ADDR + +#define CONFIG_ENV_VARS_UBOOT_CONFIG + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(USB, usb, 0) \ + func(DHCP, dhcp, na) +#include +#define CONFIG_BOOTFILE"uImage" +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_addr_r=0x4000\0"\ + "fdtfile=stih410-b2260.dtb\0" \ + "fdt_addr_r=0x4700\0" \ + "scriptaddr=0x5000\0" \ + "fdt_high=0x\0" \ + "initrd_high=0x\0" \ + BOOTENV + #define CONFIG_ENV_SIZE 0x4000 -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 2/3] board: STiH410-B2260: fix sdram size
From: Nicolas Le Bayon 32MB are reserved for Trusted Zone purpose Signed-off-by: Nicolas Le Bayon --- v2: rebase on v2017.09 include/configs/stih410-b2260.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index 115488c..fc11f3c 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -12,7 +12,7 @@ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM_1 0x4000 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define PHYS_SDRAM_1_SIZE 0x3FE0 +#define PHYS_SDRAM_1_SIZE 0x3E00 #define CONFIG_SYS_TEXT_BASE 0x7D60 #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1/* default load addr */ -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 3/3] board: STiH410-B2260: set ramdisk_addr_r to 0x48000000
From: Lee Jones Add missing ramdisk_addr_r param and set it to 0x4800 Signed-off-by: Lee Jones --- v2: rebase on v2017.09 include/configs/stih410-b2260.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/stih410-b2260.h b/include/configs/stih410-b2260.h index fc11f3c..958d5cc 100644 --- a/include/configs/stih410-b2260.h +++ b/include/configs/stih410-b2260.h @@ -38,6 +38,7 @@ "scriptaddr=0x5000\0" \ "fdt_high=0x\0" \ "initrd_high=0x\0" \ + "ramdisk_addr_r=0x4800\0" \ BOOTENV -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [RESEND PATCH 5/5] sunxi: video: add LCD support to DE2 driver
After discussing it with Maxime in IRC I decided to wait till pinctrl driver for sunxi is ready. Please kindly disregard this series. Regards, Vasily On Fri, Sep 22, 2017 at 7:44 AM, Maxime Ripard wrote: > On Fri, Sep 22, 2017 at 04:42:24AM +, Vasily Khoruzhick wrote: >> >> >>> + lcdc_init(lcdc); >> >> >>> + sunxi_lcdc_config_pinmux(); >> >> >> >> >> >> This is already handled in sunxi_lcdc_tcon0_mode_set, why duplicate >> >> >> it? >> >> > >> >> > Because the one that sunxi_lcdc_tcon0_mode_set() calls is >> >> > DE1-specific. I don't want to split out that code that won't be used >> >> > by DE2 driver. >> > >> > Then move out the common code. It's kind of weird though, since the >> > DE1 vs DE2 stuff is basically only for the layers part. The TCON is >> > always there, and is mostly the same. So you should be able to re-use >> > that with minor modifications. >> >> I'm not sure what common code you're talking about. I've already moved >> out lcdc_pll_set(). Moving pinmux >> configuration out into common code doesn't look reasonable. It's >> different for A64 -- for A64 it configures >> GPD(0)-GPD(21) as function, while for other SoCs it's GPD(18)-GPD(27) >> or GPD(0)-GPD(27) depending >> on SoC model. Anyway, pinmux configuration code for DE1 contains a >> number of ifdef-s that are not necessary >> for DE2 -- these SoCs don't have DE2 and thus won't be supported. > > Again, DE1 vs DE2 has nothing to do in the discussion > > DE1 devices will look like this: > DE1 -> TCON -> HDMI / LCD / whatever -> pins > > DE2 will be: > DE2 -> TCON -> HDMI / LCD / whatever -> pins > > The only thing not in common between these two cases is the display > engine used. Everything else should be common (except for special > cases, like the HDMI controller itself that changed as well). > > Maxime > > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] ARM: MV_EBU: Increase size of PCIe default mapping
---
drivers/pci/pci_mvebu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/pci_mvebu.c b/drivers/pci/pci_mvebu.c
index da0aa29865..076a63f210 100644
--- a/drivers/pci/pci_mvebu.c
+++ b/drivers/pci/pci_mvebu.c
@@ -82,11 +82,11 @@ struct mvebu_pcie {
/*
* MVEBU PCIe controller needs MEMORY and I/O BARs to be mapped
- * into SoCs address space. Each controller will map 32M of MEM
+ * into SoCs address space. Each controller will map 128M of MEM
* and 64K of I/O space when registered.
*/
static void __iomem *mvebu_pcie_membase = (void __iomem *)MBUS_PCI_MEM_BASE;
-#define PCIE_MEM_SIZE (32 << 20)
+#define PCIE_MEM_SIZE (128 << 20)
#if defined(CONFIG_ARMADA_38X)
#define PCIE_BASE(if) \
--
2.14.1
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Re: [U-Boot] setjmp/longjmp prototype in U-Boot
Hi Philipp, On 09/21/2017 10:57 AM, Dr. Philipp Tomsich wrote: Simon & Alexander, It appears our setjmp/longjmp prototypes and implementations are in non-compliance with current C-standards (I checked against both C99 and C2011). U-Boot defines setjmp as: int setjmp(struct jmp_buf_data *jmp_buf) The standard however requires int setjmp(jmp_buf env) and has additional guidance regarding the definition of ‘jmp_buf’: "The type declared is jmp_buf which is an array type suitable for holding the information needed to restore a calling environment." Note that I just reworked the ARM versions: i.e. here we now are in compliance. Even with this rework, I need to expose 'struct jmp_buf_data’ (which should be an implementation detail) as this is explicitly referenced from EFI code. If agreeable for the EFI side, I'd like to change the remaining implementations to also comply with the standard, which is easy enough on by adding a 'typedef struct jmp_buf_data jmp_buf[1]'. This would also allow us to have a single 'setjmp.h' that just includes an arch-specific 'asm/setjmp.h' to retrieve the 'struct jmp_buf_data' definition. Note that this will entail changes to the EFI code by replacing all occurrences where 'struct jmp_buf_data' is used or the address of a 'struct jmp_buf_data' struct-member is taken (i.e. all call-sites for setjmp/longjmp). If this is a showstopper to the EFI implementation, let me know… I don't see anything going against it OTOH :). Please double check the converted result still works though ;). IIRC we keep the jmp_buf data on the stack - it'd be nice to keep doing that going forward. Alex ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] ARM: mvebu: handle unused DRAM banks with ECC enabled
dram_ecc_scrubbing() had code to skip unused DRAM banks but it would not
work because mvebu_sdram_bs() returns 0 and the code was subtracting 1
before checking the size. Remove the -1 from the bank size and the +1
from the total which will skip unused banks and still calculate the
correct size. Put the -1 where it is needed for scrubbing via the xor
engine.
Reported-by: Joshua Scott
Signed-off-by: Chris Packham
---
arch/arm/mach-mvebu/dram.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-mvebu/dram.c b/arch/arm/mach-mvebu/dram.c
index e3f304c366..f946c0cffe 100644
--- a/arch/arm/mach-mvebu/dram.c
+++ b/arch/arm/mach-mvebu/dram.c
@@ -179,11 +179,11 @@ static void dram_ecc_scrubbing(void)
reg_write(REG_SDRAM_CONFIG_ADDR, temp);
for (cs = 0; cs < CONFIG_NR_DRAM_BANKS; cs++) {
- size = mvebu_sdram_bs(cs) - 1;
+ size = mvebu_sdram_bs(cs);
if (size == 0)
continue;
- total = (u64)size + 1;
+ total = (u64)size;
total_mem += (u32)(total / (1 << 30));
start_addr = 0;
mv_xor_init2(cs);
@@ -194,7 +194,7 @@ static void dram_ecc_scrubbing(void)
size -= start_addr;
}
- mv_xor_mem_init(SCRB_XOR_CHAN, start_addr, size,
+ mv_xor_mem_init(SCRB_XOR_CHAN, start_addr, size - 1,
SCRUB_MAGIC, SCRUB_MAGIC);
/* Wait for previous transfer completion */
--
2.14.1
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Re: [U-Boot] [U-Boot,v10,04/10] usb: phy: Add STi USB2 PHY
On 09/22/2017 04:18 PM, Tom Rini wrote: > On Tue, Sep 05, 2017 at 11:04:21AM +0200, patrice.chot...@st.com wrote: > >> From: Patrice Chotard >> >> This is the generic phy driver for the picoPHY ports >> used by USB2/1.1 controllers. It is found on STiH407 SoC >> family from STMicroelectronics. >> >> Signed-off-by: Patrice Chotard >> Reviewed-by: Simon Glass > > Applied to u-boot/master, thanks! > usb again ?! -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH] drivers: pci: imx: add imx_pcie_remove function
On 09/22/2017 04:00 PM, David Müller (ELSOFT AG) wrote:
> Hello
>
> Does the code below really work?
>
> On my custom MX6Q board, the code hangs on the read of the
> "PCIE_PL_PFLR". Please note that this code sequence is not entered the
> first time after a power up; I have to execute a U-Boot reset to
> actually trigger the hang. Any ideas what is going wrong?
MX6Q PCIe reset breakage strikes again ?
> While debugging it, I also noticed the two problems below.
>
> Tim Harvey wrote:
>
>> +if (is_mx6dq()) {
>> +u32 val, gpr1, gpr12;
>> +
>> +gpr1 = readl(&iomuxc_regs->gpr[1]);
>> +gpr12 = readl(&iomuxc_regs->gpr[12]);
>> +if ((gpr1 & IOMUXC_GPR1_PCIE_REF_CLK_EN) &&
>> +(gpr12 & IOMUXC_GPR12_PCIE_CTL_2)) {
>
> This could be (gpr12 & IOMUXC_GPR12_APPS_LTSSM_ENABLE)) {
>
>> +val = readl(MX6_DBI_ADDR + PCIE_PL_PFLR);
>> +val &= ~PCIE_PL_PFLR_LINK_STATE_MASK;
>> +val |= PCIE_PL_PFLR_FORCE_LINK;
>> +
>> +imx_pcie_fix_dabt_handler(true);
>> +writel(val, MX6_DBI_ADDR + PCIE_PL_PFLR);
>> +imx_pcie_fix_dabt_handler(false);
>> +
>> +gpr12 &= ~IOMUXC_GPR12_PCIE_CTL_2;
>> +writel(val, &iomuxc_regs->gpr[12]);
>
> I think this should be
> writel(gpr12, &iomuxc_regs->gpr[12]);
>
> or even better
> clrbits_le32(&iomuxc_regs->gpr[12],
> IOMUXC_GPR12_APPS_LTSSM_ENABLE);
>
> as in the rest of the file.
>
> Dave
>
--
Best regards,
Marek Vasut
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