Re: [U-Boot] [PATCH 1/2] Exynos: clock: support get_mmc_clk for exynos

2013-01-11 Thread Minkyu Kang
On 28/12/12 17:30, Jaehoon Chung wrote:
> To get exactly clock value for mmc, support the get_mmc_clk() like
> set_mmc_clk().
> 
> Signed-off-by: Jaehoon Chung 
> Signed-off-by: Kyungmin Park 
> ---
>  arch/arm/cpu/armv7/exynos/clock.c  |  102 
> 
>  arch/arm/include/asm/arch-exynos/clk.h |1 +
>  2 files changed, 103 insertions(+), 0 deletions(-)
> 

applied to u-boot-samsung.

Thanks,
Minkyu Kang.

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Re: [U-Boot] [PATCH 2/2] Exynos: clock: add CLK_DIV_FSYS3 at set_mmc_clk

2013-01-11 Thread Minkyu Kang
On 28/12/12 17:30, Jaehoon Chung wrote:
> Mobile storage is used the CLK_DIV_FSYS3 value.
> 
> Signed-off-by: Jaehoon Chung 
> Signed-off-by: kyungmin Park 
> ---
>  arch/arm/cpu/armv7/exynos/clock.c |5 +
>  1 files changed, 5 insertions(+), 0 deletions(-)
> 

applied to u-boot-samsung.

Thanks,
Minkyu Kang.


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Re: [U-Boot] [PATCH v5 07/20] env: Add support for callbacks to environment vars

2013-01-11 Thread Stefan Roese
Hi Joe,

On 12/12/2012 05:16 AM, Joe Hershberger wrote:
> Add support for per-variable callbacks to the "hashtable" functions.

I just noticed using latest master branch that booting on a NOR
flash based board (sequoia, PPC440EPx based) a quite big delay
(1..2 seconds) is added upon env_relocate() (real delay happens
in himport_r()). Digging a bit deeper results in this patch
(170ab11 [env: Add support for callbacks to environment vars])
started this regression:

[ 36.208317] <  0.004802> U-Boot 2013.01-rc1-00385-g170ab11 (Jan 11 2013 - 
08:58:59)
[ 36.209012] <  0.000695> 
[ 36.215956] <  0.006944> CPU:   AMCC PowerPC 440EPx Rev. A at 528 MHz (PLB=132 
OPB=66 EBC=66 PCI=33 MHz)
[ 36.218730] <  0.002774>Security/Kasumi support
[ 36.224290] <  0.005560>Bootstrap Option H - Boot ROM Location I2C 
(Addr 0x52)
[ 36.229843] <  0.005553>Internal PCI arbiter enabled, PCI async ext 
clock used
[ 36.232704] <  0.002861>32 kB I-Cache 32 kB D-Cache
[ 36.240869] <  0.008165> Board: Sequoia - AMCC PPC440EPx Evaluation Board, 
Rev. F, PCI-Async=33 MHz
[ 36.242261] <  0.001392> I2C:   ready
[ 36.648652] <  0.406391> DRAM:  256 MiB
[ 36.811658] <  0.163006> Flash: 64 MiB
[ 36.813331] <  0.001673> NAND:  32 MiB

himport_r()

[ 37.808800] <  0.995469> PCI:   Bus Dev VenId DevId Class Int
[ 37.816780] <  0.007980> USB:   Host(int phy) Device(ext phy)
[ 37.820094] <  0.003314> Net:   ppc_4xx_eth0, ppc_4xx_eth1

Here you see the delay in himport_r() is approx 1 second.

And with patch (2598090 [env: Add environment variable flags]) this
delay even grows to 2 seconds:

[  3.096149] <  0.004800> U-Boot 2013.01-rc1-00392-g2598090 (Jan 11 2013 - 
08:55:45)
[  3.096853] <  0.000704> 
[  3.103805] <  0.006952> CPU:   AMCC PowerPC 440EPx Rev. A at 528 MHz (PLB=132 
OPB=66 EBC=66 PCI=33 MHz)
[  3.106575] <  0.002770>Security/Kasumi support
[  3.112135] <  0.005560>Bootstrap Option H - Boot ROM Location I2C 
(Addr 0x52)
[  3.117683] <  0.005548>Internal PCI arbiter enabled, PCI async ext 
clock used
[  3.120548] <  0.002865>32 kB I-Cache 32 kB D-Cache
[  3.128716] <  0.008168> Board: Sequoia - AMCC PPC440EPx Evaluation Board, 
Rev. F, PCI-Async=33 MHz
[  3.130099] <  0.001383> I2C:   ready
[  3.536470] <  0.406371> DRAM:  256 MiB
[  3.699894] <  0.163424> Flash: 64 MiB
[  3.701553] <  0.001659> NAND:  32 MiB

himport_r()

[  5.690365] <  1.988812> PCI:   Bus Dev VenId DevId Class Int
[  5.698395] <  0.008030> USB:   Host(int phy) Device(ext phy)
[  5.701709] <  0.003314> Net:   ppc_4xx_eth0, ppc_4xx_eth1


Joe, I didn't dig deeper into these functions and patches. Do you
have an idea why these patches introduce this delay? Can you
reproduce this on one of your boards? Has anybody else noticed
such issues?

Thanks,
Stefan

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[U-Boot] About fixup_memory_node()

2013-01-11 Thread Dennis Lan (dlan)
HI Forks:
  I have question about why memory info from fdt (memory size) will be
overwritten by
 those come from u-boot source code.

 function fixup_memory_node() in bootm.c
when CONFIG_OF_LIBFDT is defined, then memory node information will be
updated
says that, if I set memory 2G in fdt file, then 512M in uboot config.h,
then final fdt info will show 512M
 (you may wonder why we set 512M in uboot, but others in fdt file, because
we may have differnet boards with differnet memory size)
  Thanks

fixup_memory_node() -> fdt_fixup_memory_banks()

int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
{
   .
for (bank = 0, len = 0; bank < banks; bank++) {
write_cell(tmp + len, start[bank], addr_cell_len);
len += addr_cell_len;

write_cell(tmp + len, size[bank], size_cell_len);
len += size_cell_len;
}

err = fdt_setprop(blob, nodeoffset, "reg", tmp, len);


Dennis
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Re: [U-Boot] e1000 : Correct Rx Threshold Granularity

2013-01-11 Thread Anatolij Gustschin
Hello,

On Thu, 10 Jan 2013 15:39:42 -0800
Darcy Watkins  wrote:

> Hello,
> 
> I encountered an issue running an e1000 ethernet device with u-boot
> on an x86 (geode) and determined that the patch given in message
> # 122700 (April 2012) appears to fix it.  Was that not committed
> for some reason?

do you mean this patch http://patchwork.ozlabs.org/patch/153657/ ?
It has been committed in December, so U-Boot v2013.01-rc3 should
contain it. Maybe you need to update your local repository?

Thanks,
Anatolij
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Re: [U-Boot] [PATCH V2 1/2] EXYNOS5: Make all display related code dependent on CONFIG_LCD

2013-01-11 Thread Minkyu Kang
On 11/01/13 16:06, Ajay Kumar wrote:
> u-boot compilation fails for smdk5250 when we deselect CONFIG_LCD
> from the main config file.
> 
> Following error was observed:
> drivers/video/libvideo.o: In function `exynos_lcd_init':
> /home/ajay/u-boot-samsung/drivers/video/exynos_fb.c:68: undefined reference 
> to `lcd_set_flush_dcache'
> 
> This is because exynos video drivers have dependency on CONFIG_LCD.
> 
> Signed-off-by: Ajay Kumar 
> Acked-by: Simon Glass 

applied to u-boot-samsung.

Thanks,
Minkyu Kang.

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Re: [U-Boot] [PATCH V2 2/2] EXYNOS5: Enable console multiplexing in u-boot

2013-01-11 Thread Minkyu Kang
On 11/01/13 16:06, Ajay Kumar wrote:
> We enable console multiplexing and use both serial and LCD for stdout/stderr.
> Initially, u-boot output console is observed via serial port.
> If you also have a DP panel connected onto your SMDK5250 board,
> you can switch to LCD console by typing "setenv stdout lcd".
> You can always switch back to serial using "setenv stdout serial".
> You can switch error console(stderr) as well, using similar commands.
> 
> Signed-off-by: Ajay Kumar 
> Acked-by: Simon Glass 
> ---
> Changes in V2:  We use CONFIG_CONSOLE_MUX always. In V1, CONFIG_CONSOLE_MUX
>   was enabled only when CONFIG_LCD is selected.
> 
>  include/configs/exynos5250-dt.h | 11 +++
>  1 file changed, 11 insertions(+)
> 

applied to u-boot-samsung.

Thanks,
Minkyu Kang.

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[U-Boot] please pull u-boot-samsung master

2013-01-11 Thread Minkyu Kang
Dear Albert,

  Merge samsung, imx, tegra into u-boot-arm/master (2012-12-22 11:59:14 +0100)

are available in the git repository at:


  git://git.denx.de/u-boot-samsung master

for you to fetch changes up to a2468dedef569863e1243e802fbe3aa7565e1de1:

  EXYNOS5: Enable console multiplexing in u-boot (2013-01-11 17:15:04 +0900)


Ajay Kumar (6):
  EXYNOS5: Add support for FIMD and DP
  EXYNOS5: Change parent clock of FIMD to MPLL
  EXYNOS: Add dummy definition to fix compilation dependency on 
CONFIG_EXYNOS_MIPI_DSIM
  video: Modify exynos_fimd driver to support LCD console
  EXYNOS5: Make all display related code dependent on CONFIG_LCD
  EXYNOS5: Enable console multiplexing in u-boot

Chander Kashyap (4):
  EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses
  EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12
  EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12
  EXYNOS: EXYNOS4X12: extract Exynos4x12 IPs clock frequency

Hatim RV (5):
  EXYNOS5: FDT: add initial dts file for EXYNOS5250, SMDK5250
  fdt: exynos5: Add DT node definition for SROM and SMSC9215
  exynos5: Add DT based driver for SMC911X ethernet
  exynos5: config: Rename the smdk5250.h to exynos5250-dt.h
  SMDK5250: config: Add configuration file for SMDK5250 board

Jaehoon Chung (2):
  Exynos: clock: support get_mmc_clk for exynos
  Exynos: clock: add CLK_DIV_FSYS3 at set_mmc_clk

Piotr Wilczek (1):
  arm:exynos4:pinmux: Modify the gpio function for mmc

Rajeshwari Shinde (22):
  EXYNOS5: FDT: Add I2C device node data
  EXYNOS5 : FDT: Add Aliases for I2C device
  FDT: Add compatible string for I2C
  EXYNOS5: FDT : Decode peripheral id
  I2C: Driver changes for FDT support
  SMDK5250: Initialise I2C using FDT
  EXYNOS5: FDT: Add sound device node data
  EXYNOS5: FDT: Add sound and codec device node
  EXYNOS5: FDT: Add compatible strings for sound
  Sound: Add FDT support to driver
  Sound: WM8994: Add FDT support to codec
  Sound: Add FDT support to CMD.
  EXYNOS5: FDT: Add compatible strings for SPI
  EXYNOS5 : FDT: Add Aliases for SPI device
  EXYNOS5: FDT: Add SPI device node data
  SPI: EXYNOS: Add FDT support to driver.
  EHCI: Exynos: Add fdt support
  EXYNOS5: Add device node for USB.
  EXYNOS5: FDT: Add compatible strings for USB
  EXYNOS5: FDT: Add compatible strings for PMIC
  EXYNOS5: Add device node for PMIC
  PMIC: MAX77686: Add FDT Support

Vivek Gautam (1):
  SMDK5250: Enable VBus for USB 2.0 controller

Łukasz Majewski (2):
  spl:falcon:trats Update Trats default board configuration file to support 
FALCON MODE
  video:cache:fix: Enable dcache flush at LCD subsystem for Exynos based 
boards

 arch/arm/cpu/armv7/exynos/clock.c|  272 +-
 arch/arm/cpu/armv7/exynos/pinmux.c   |   74 ++
 arch/arm/dts/exynos5250.dtsi |  154 
 arch/arm/include/asm/arch-exynos/clk.h   |1 +
 arch/arm/include/asm/arch-exynos/clock.h |  276 ++
 arch/arm/include/asm/arch-exynos/cpu.h   |   48 +++-
 arch/arm/include/asm/arch-exynos/dp_info.h   |2 +
 arch/arm/include/asm/arch-exynos/gpio.h  |   85 +++
 arch/arm/include/asm/arch-exynos/mipi_dsim.h |7 +
 arch/arm/include/asm/arch-exynos/periph.h|   33 +--
 arch/arm/include/asm/arch-exynos/pinmux.h|8 +
 arch/arm/include/asm/arch-exynos/sromc.h |   18 ++
 board/samsung/dts/exynos5250-smdk5250.dts|   69 ++
 board/samsung/smdk5250/smdk5250.c|  237 +++
 board/samsung/trats/trats.c  |2 +-
 common/cmd_sound.c   |2 +-
 doc/device-tree-bindings/exynos/isp-spi.txt  |   22 ++
 doc/device-tree-bindings/exynos/sound.txt|   27 +++
 drivers/i2c/s3c24x0_i2c.c|   83 ++-
 drivers/i2c/s3c24x0_i2c.h|8 +
 drivers/power/pmic/pmic_max77686.c   |   37 ++-
 drivers/sound/sound.c|  171 --
 drivers/sound/wm8994.c   |   74 +-
 drivers/sound/wm8994.h   |6 +-
 drivers/spi/exynos_spi.c |   96 +++-
 drivers/usb/host/ehci-exynos.c   |   92 +++-
 drivers/video/exynos_fb.c|5 +
 drivers/video/exynos_fimd.c  |   12 +-
 include/configs/exynos5250-dt.h  |  321 ++
 include/configs/smdk5250.h   |  278 +-
 include/configs/trats.h  |   45 +++-
 include/fdtdec.h |9 +
 include/i2c.h|   26 +++
 include/sound.h  |4 +-
 lib/fdtdec.c |9 +
 35 files cha

[U-Boot] BDI3000 - Unprotect flash sectors

2013-01-11 Thread Waibel Georg
Hello,

i'm not sure if this is the right place for this question...however, here it is:

i'm using a BDI3000 to program uboot to the flash (Spansion S29GL512P) on a 
MPC5200B base board. Erasing / Programming works fine as long as the flash 
sectors are not protected (via PPB bit). On a protected sector the erase 
command fails (what makes sense). I thought I can use the unlock command to 
unprotect the sectors, but this command seems not to work:
> unlock 0xfff0 1000
Unlocking flash at 0xfff0
# Invalid parameter for flash programming

Any ideas what I'm doing wrong?

Flash configuration:
[FLASH]
CHIPTYPEMIRRORX16
CHIPSIZE0x0400
BUSWIDTH16
WORKSPACE   0x

Regards
Georg Waibel
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Re: [U-Boot] NAND flash - bad blocks

2013-01-11 Thread Dimitar Penev

Hi Scott,


On 01/10/2013 01:56:30 AM, Dimitar Penev wrote:

Hello,

First of all sorry if this question was already answered here.

We are sourcing some K9F8G08U0M-PIB0 NAND flash devices.
On the first erase in uboot 2011.09 I got bunch of mostly consecutive 
bad blocks.
According to the datasheet we should get not more then 80 bad blocks  for 
our chip

but I get something like 240 bad blocks for most of the NAND chips.

I seems to be able to fix this using the following procedure:


Call your NAND vendor and complain?



Well we did but we didn't got something from them which could explain what 
we observe.


After making sure that there's nothing wrong with your NAND driver or 
controller that causes the OOB to be read incorrectly.


We are using nand_plat driver provide by ADI without any customization.

Did you do anything to the NAND chip prior to this "first erase"?  In 
particular,  did you write to the OOB?


For boards coming out of the assembly house:
I load uboot in SPI flash, boot from SPI and get the NAND chip recognized 
properly.

On 'nand erase.chip' command I get bunch of bad blocks.
So I guess we haven't even touched OOB before 'nand erase'

Assuming the components are OK the only possible explanation could be 
overheating

of the chips in the assembly house. Does anybody get something similar?




In uboot
uboot>nand scrub.chip

In uboot
uboot>nand erase.chip clean
at this point I get usually 1,2 bad blocks which looks normal to me.


You're not fixing anything -- you're wiping out all bad block  information. 
Those "1,2 bad blocks" are not actually bad blocks, but  are the bad block 
table which appears "bad" to reserve it.  These  should be at the end of 
flash.  Or, possibly, they're blocks that  happen to be damaged in a way 
that prevents the bad block marker from  becoming 0xff.


Oh Really?
What about 'nandtest -m' in Linux ? I was hoping it does a check of the 
erase blocks.





In Linux we have few mtd partitions on this NAND chip.
Unmount all of them and for all of them :
linux>nandtest -m /dev/mtdx
Usually this doesn't add any new badblocks on top of what I get on  nand 
erase in uboot,

but I really haven't tested that much device to say.

After this procedure the NAND flash seems to work fine.
Do you think this is reliable way?


No.


Thanks Scott.
Is there any procedure to analyze the nand flash for bad blocks?



-Scott

Best Regards
Dimitar 


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[U-Boot] [PATCH] usb: ehci: exynos: Enable non-dt path

2013-01-11 Thread Vivek Gautam
Enabling the non-dt path for the driver so that
we don't get any build errors for non-dt configuration.

Signed-off-by: Vivek Gautam 
---

Earlier we had moved to fdt support for ehci-exynos driver, but
missed out the non-dt path. Although this driver serves for exysno5
onward only but better to keep the non-dt path also available.

 drivers/usb/host/ehci-exynos.c |   10 ++
 1 files changed, 10 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
index 3ca4c5c..6f0c6c3 100644
--- a/drivers/usb/host/ehci-exynos.c
+++ b/drivers/usb/host/ehci-exynos.c
@@ -153,7 +153,12 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, 
struct ehci_hcor **hcor)
return -ENOMEM;
}
 
+#ifdef CONFIG_OF_CONTROL
exynos_usb_parse_dt(gd->fdt_blob, exynos);
+#else
+   exynos->usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy();
+   exynos->hcd = samsung_get_base_usb_ehci();
+#endif
 
setup_usb_phy(exynos->usb);
 
@@ -185,7 +190,12 @@ int ehci_hcd_stop(int index)
return -ENOMEM;
}
 
+#ifdef CONFIG_OF_CONTROL
exynos_usb_parse_dt(gd->fdt_blob, exynos);
+#else
+   exynos->usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy();
+   exynos->hcd = samsung_get_base_usb_ehci();
+#endif
 
reset_usb_phy(exynos->usb);
 
-- 
1.7.6.5

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Re: [U-Boot] [PATCH] mx6qsabreauto: enable USB host interface

2013-01-11 Thread Fabio Estevam
On Fri, Jan 11, 2013 at 5:13 AM, Dirk Behme  wrote:
> From: Knut Wohlrab 
>
> The USB host interface is routed to plug USB1/J30 on the mother board.
>
> Signed-off-by: Knut Wohlrab 

Acked-by: Fabio Estevam 
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Re: [U-Boot] [PATCH] mx6qsabreauto: enable USB host interface

2013-01-11 Thread Stefano Babic
On 11/01/2013 08:13, Dirk Behme wrote:
> From: Knut Wohlrab 
> 
> The USB host interface is routed to plug USB1/J30 on the mother board.
> 
> Signed-off-by: Knut Wohlrab 
> ---

Hi Dirk,

>  board/freescale/mx6qsabreauto/mx6qsabreauto.c |7 +++
>  include/configs/mx6qsabreauto.h   |   11 +++
>  2 files changed, 18 insertions(+), 0 deletions(-)
> 
> diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c 
> b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
> index 9e3700e..696ddb4 100644
> --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c
> +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c
> @@ -101,6 +101,13 @@ static void setup_iomux_uart(void)
>   imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads));
>  }
>  
> +#ifdef CONFIG_USB_EHCI_MX6
> +int board_ehci_hcd_init(int port)
> +{
> + return 0;
> +}
> +#endif

board_ehci_hcd_init is declared weak drivers/usb/host/ehci-mx6.c. You do
nothing in this function, why do you need ? You can completely drop it.

Best regards,
Stefano Babic

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Re: [U-Boot] BDI3000 - Unprotect flash sectors

2013-01-11 Thread Stefan Roese
Hi Georg,

On 01/11/2013 08:41 AM, Waibel Georg wrote:
> i'm not sure if this is the right place for this question...however,
> here it is:
> 
> i'm using a BDI3000 to program uboot to the flash (Spansion S29GL512P)
> on a MPC5200B base board. Erasing / Programming works fine as long as
> the flash sectors are not protected (via PPB bit). On a protected
> sector the erase command fails (what makes sense). I thought I can
> use the unlock command to unprotect the sectors, but this command
> seems not to work:
>> unlock 0xfff0 1000
> Unlocking flash at 0xfff0
> # Invalid parameter for flash programming
> 
> Any ideas what I'm doing wrong?
> 
> Flash configuration:
> [FLASH]
> CHIPTYPEMIRRORX16
> CHIPSIZE0x0400
> BUSWIDTH16
> WORKSPACE   0x

Yes, the BDI doesn't support the unlocking of the Advanced Locking Bits
(PPB) of these Spansion (and other manufacturers) type chips. You need
to manually unlock the sectors in the telnet BDI session by writing the
unlocking sequence to the sector(s). Or use U-Boot to do this (if possible).

Please note that some patches to better support this PPB locking have
been applied to mainline just now. And I also have some patches to
support this PPB (un)-locking in Linux a short while ago which are still
pending:

http://lists.infradead.org/pipermail/linux-mtd/2012-December/045295.html

Hope this helps.

Thanks,
Stefan

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Re: [U-Boot] [PATCH] usb: ehci: exynos: Enable non-dt path

2013-01-11 Thread Marek Vasut
Dear Vivek Gautam,

> Enabling the non-dt path for the driver so that
> we don't get any build errors for non-dt configuration.
> 
> Signed-off-by: Vivek Gautam 

Apply on the -samsung please

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH] usb: ehci: exynos: Enable non-dt path

2013-01-11 Thread Vivek Gautam
Hi Marek,


CCing Simon Glass, Minkyu Kang.

On Fri, Jan 11, 2013 at 3:02 PM, Marek Vasut  wrote:
> Dear Vivek Gautam,
>
>> Enabling the non-dt path for the driver so that
>> we don't get any build errors for non-dt configuration.
>>
>> Signed-off-by: Vivek Gautam 
>
> Apply on the -samsung please
>

Sorry !! missed to mention.
this patch is based and tested on u-boot-samsung.


-- 
Thanks & Regards
Vivek
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Re: [U-Boot] [RFC PATCH 2/2] USB: xHCI: Add stack support for xHCI

2013-01-11 Thread Vivek Gautam
Hi Satendra,


On Fri, Jan 11, 2013 at 11:02 AM, Satendra Pratap
 wrote:
> Vivek Gautam  gmail.com> writes:
>
>>
>> Hi,
>>
>> On Tue, Oct 23, 2012 at 6:30 PM, Wolfgang Denk  denx.de> wrote:
>> > Dear Vivek Gautam,
>> >
>> > In message <1350989687-32102-3-git-send-email-gautam.vivek  
>> > samsung.com>
> you wrote:
>> >> This adds stack layer for eXtensible Host Controller Interface
>> >> which facilitates use of USB 3.0 in host mode.
>> >>
>> >> This work is based on xHCI host controller driver in linux-kernel
>> >> by Sarah Sharp.
>> >
>> > When copying code from Linux, then please always provide exact
>> > reference.  Please see especially bullet # 4 at
>> > http://www.denx.de/wiki/view/U-Boot/Patches#Attributing_Code_Copyrights_Sign
>> >
>> Thanks for pointing out. I shall keep this in mind, and update proper
>> references here also.
>>

> Hi Vivek,
> I have been trying to port your xHCI patches from U-Boot to barebox. I took 
> your
> xHCI patch from
> http://patchwork.ozlabs.org/patch/193477/
>
> Could you please let me know whether those are the latest patches? If not, 
> could
> you please send me the latest patch?
>
> What about xHCI testing?
>

Please avoid top/bottom commenting :-)

Please find below the URLs for both the patches against the patch thread :
[RFC PATCH 0/2] USB: XHCI: Add xHCI host controller stack driver, adds
just the xHCI stack support.

http://patchwork.ozlabs.org/patch/193476/
Patchwork [U-Boot,RFC,1/2] USB: SS: Add support for Super Speed USB interface

URL: http://patchwork.ozlabs.org/patch/193477/
Patchwork [U-Boot,RFC,2/2] USB: xHCI: Add stack support for xHCI

Theese were the initial set of patches, and i couldn't rework on them
due to other responsibilities.
We tested them with few private set of patches for exynos5250 platform.



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Re: [U-Boot] [PATCH 2/4 V2] SMDK5250: Convert lowlevel_init.S to lowlevel_init.c

2013-01-11 Thread Rajeshwari Birje
Hi Minkyu Kang,

Thank you for comments.

On Fri, Jan 11, 2013 at 1:24 PM, Minkyu Kang  wrote:
> Dear Rajeshwari,
>
> On 07/01/13 22:08, Rajeshwari Shinde wrote:
>> This patch converts lowlevel_init.S to lowlevel_init_c.c for
>> SMDK5250.
>> Lowlevel.S as of now added only for SMDK5250 and same can be
>> extended to other SOC in future.
>>
>> Signed-off-by: Rajeshwari Shinde 
>> ---
>> Changes in V2:
>>   - Renamed lowlevel_init.S to lowlevel.S and moved to
>>   arch/arm/cpu/armv7/exynos/
>>   - Moved power mode defines to power.h
>>   - Added early serial support.
>>   - Renamed mem_reset to reset.
>>  arch/arm/cpu/armv7/exynos/Makefile   |6 ++
>>  arch/arm/cpu/armv7/exynos/lowlevel.S |   35 
>>  arch/arm/include/asm/arch-exynos/power.h |8 ++
>>  board/samsung/smdk5250/Makefile  |2 +-
>>  board/samsung/smdk5250/dmc_common.c  |4 +-
>>  board/samsung/smdk5250/dmc_init_ddr3.c   |6 +-
>>  board/samsung/smdk5250/lowlevel_init.S   |   96 
>>  board/samsung/smdk5250/lowlevel_init.c   |   81 +
>>  board/samsung/smdk5250/setup.h   |   19 -
>>  board/samsung/smdk5250/spl_boot.c|  140 
>> +++--
>>  spl/Makefile |4 +
>>  11 files changed, 288 insertions(+), 113 deletions(-)
>>  create mode 100644 arch/arm/cpu/armv7/exynos/lowlevel.S
>>  delete mode 100644 board/samsung/smdk5250/lowlevel_init.S
>>  create mode 100644 board/samsung/smdk5250/lowlevel_init.c
>>
>> diff --git a/arch/arm/cpu/armv7/exynos/Makefile 
>> b/arch/arm/cpu/armv7/exynos/Makefile
>> index 9119961..2aa2722 100644
>> --- a/arch/arm/cpu/armv7/exynos/Makefile
>> +++ b/arch/arm/cpu/armv7/exynos/Makefile
>> @@ -22,6 +22,12 @@ include $(TOPDIR)/config.mk
>>
>>  LIB  = $(obj)lib$(SOC).o
>>
>> +ifdef CONFIG_SMDK5250
>
> Is it SMDK5250 specific?
- Yes, As mentioned in the commit message it is currently been done
only for SMDK5250 and can be also
extended to other SOC in Future.
>
>> +ifdef CONFIG_SPL
>> +COBJS  += lowlevel.o
>
> It's a SOBJS.
- Ok
>
>> +endif
>> +endif
>> +
>>  COBJS+= clock.o power.o soc.o system.o pinmux.o
>>
>>  SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
>> diff --git a/arch/arm/cpu/armv7/exynos/lowlevel.S 
>> b/arch/arm/cpu/armv7/exynos/lowlevel.S
>> new file mode 100644
>> index 000..7307959
>> --- /dev/null
>> +++ b/arch/arm/cpu/armv7/exynos/lowlevel.S
>> @@ -0,0 +1,35 @@
>> +/*
>> + * Lowlevel setup for SMDK5250 board based on S5PC520
>
> please fix this comment.
> Maybe this file is not a board specific.
-Ok
>
>> + *
>> + * Copyright (C) 2012 Samsung Electronics
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> + * MA 02111-1307 USA
>> + */
>> +
>> +#include 
>> +#include 
>> +
>> + .globl lowlevel_init
>> +lowlevel_init:
>> + /*
>> +  * Set the stack pointer, although it will be overwritten by the caller
>> +  * It seems we will not boot if this function is empty.
>> +  */
>> + ldr sp, =CONFIG_IRAM_STACK
>> + mov pc, lr
>> diff --git a/board/samsung/smdk5250/lowlevel_init.c 
>> b/board/samsung/smdk5250/lowlevel_init.c
>> new file mode 100644
>> index 000..22bdd2b
>> --- /dev/null
>> +++ b/board/samsung/smdk5250/lowlevel_init.c
>> @@ -0,0 +1,81 @@
>> +/*
>> + * Lowlevel setup for SMDK5250 board based on S5PC520
>> + *
>> + * Copyright (C) 2012 Samsung Electronics
>> + * Copyright (c) 2012 The Chromium OS Authors.
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with t

Re: [U-Boot] [PATCH] EXYNOS5: Add L2 Cache Support.

2013-01-11 Thread Rajeshwari Birje
Hi Minkyu,

Please do let me know if any comments for same.

Regards,
Rajeshwari Shinde.
On Thu, Dec 27, 2012 at 11:29 AM, Rajeshwari Birje
 wrote:
> Minkyu Kang,
>
> Please do let me know if any comments regarding this patch.
>
> Regards,
> Rajeshwari Shinde.




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Re: [U-Boot] [PATCH 2/4 V2] SMDK5250: Convert lowlevel_init.S to lowlevel_init.c

2013-01-11 Thread Rajeshwari Birje
Hi Simon,

Thank you for comments.

On Thu, Jan 10, 2013 at 11:04 PM, Simon Glass  wrote:
> Hi Rajeshwari,
>
> On Mon, Jan 7, 2013 at 5:08 AM, Rajeshwari Shinde
>  wrote:
>> This patch converts lowlevel_init.S to lowlevel_init_c.c for
>> SMDK5250.
>> Lowlevel.S as of now added only for SMDK5250 and same can be
>> extended to other SOC in future.
>
> Should perhaps also mention new feature (controllable memory reset for 
> resume?)
-OK
>
>>
>> Signed-off-by: Rajeshwari Shinde 
>> ---
>> Changes in V2:
>> - Renamed lowlevel_init.S to lowlevel.S and moved to
>> arch/arm/cpu/armv7/exynos/
>> - Moved power mode defines to power.h
>> - Added early serial support.
>> - Renamed mem_reset to reset.
>>  arch/arm/cpu/armv7/exynos/Makefile   |6 ++
>>  arch/arm/cpu/armv7/exynos/lowlevel.S |   35 
>>  arch/arm/include/asm/arch-exynos/power.h |8 ++
>>  board/samsung/smdk5250/Makefile  |2 +-
>>  board/samsung/smdk5250/dmc_common.c  |4 +-
>>  board/samsung/smdk5250/dmc_init_ddr3.c   |6 +-
>>  board/samsung/smdk5250/lowlevel_init.S   |   96 
>>  board/samsung/smdk5250/lowlevel_init.c   |   81 +
>
> Any change we could move all of this to arch/arm/cpu/armv7/exynos...?
We do not have a separate directory for exynos5 and exynos4 and if we
add all these files in arch/arm/cpu/armv7/exynos it would break the
compilation for EXYNOS4. Also Later versions of exynos5 have different
memory and timing variants.
>
> It really doesn't relate to this board alone, but to the chip.
>
>>  board/samsung/smdk5250/setup.h   |   19 -
>>  board/samsung/smdk5250/spl_boot.c|  140 
>> +++--
>>  spl/Makefile |4 +
>>  11 files changed, 288 insertions(+), 113 deletions(-)
>>  create mode 100644 arch/arm/cpu/armv7/exynos/lowlevel.S
>>  delete mode 100644 board/samsung/smdk5250/lowlevel_init.S
>>  create mode 100644 board/samsung/smdk5250/lowlevel_init.c
>>
>> diff --git a/arch/arm/cpu/armv7/exynos/Makefile 
>> b/arch/arm/cpu/armv7/exynos/Makefile
>> index 9119961..2aa2722 100644
>> --- a/arch/arm/cpu/armv7/exynos/Makefile
>> +++ b/arch/arm/cpu/armv7/exynos/Makefile
>> @@ -22,6 +22,12 @@ include $(TOPDIR)/config.mk
>>
>>  LIB= $(obj)lib$(SOC).o
>>
>> +ifdef CONFIG_SMDK5250
>> +ifdef CONFIG_SPL
>> +COBJS  += lowlevel.o
>
> Could do:
>
> COBJS-$(CONFIG_SPL)  += lowlevel.o
>
> and remove the inner ifdef
- OK
>
>> +endif
>> +endif
>> +
>>  COBJS  += clock.o power.o soc.o system.o pinmux.o
>>
>>  SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
>> diff --git a/arch/arm/cpu/armv7/exynos/lowlevel.S 
>> b/arch/arm/cpu/armv7/exynos/lowlevel.S
>> new file mode 100644
>> index 000..7307959
>> --- /dev/null
>> +++ b/arch/arm/cpu/armv7/exynos/lowlevel.S
>> @@ -0,0 +1,35 @@
>> +/*
>> + * Lowlevel setup for SMDK5250 board based on S5PC520
>> + *
>> + * Copyright (C) 2012 Samsung Electronics
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> + * MA 02111-1307 USA
>> + */
>> +
>> +#include 
>> +#include 
>> +
>> +   .globl lowlevel_init
>> +lowlevel_init:
>> +   /*
>> +* Set the stack pointer, although it will be overwritten by the 
>> caller
>> +* It seems we will not boot if this function is empty.
>> +*/
>> +   ldr sp, =CONFIG_IRAM_STACK
>> +   mov pc, lr
>> diff --git a/arch/arm/include/asm/arch-exynos/power.h 
>> b/arch/arm/include/asm/arch-exynos/power.h
>> index f6d0278..d6fd29e 100644
>> --- a/arch/arm/include/asm/arch-exynos/power.h
>> +++ b/arch/arm/include/asm/arch-exynos/power.h
>> @@ -874,4 +874,12 @@ void power_ps_hold_setup(void);
>>
>>  /* Read the resume function and call it */
>>  void power_exit_wakeup(void);
>> +
>> +
>> +/* Power Down Modes
>> + * User defined values in inform1 register
>> + */
>> +#define EXYNOS_CHECK_SLEEP 0x0BAD
>> +#define EXYNOS_CHECK_DIDLE 0xBAD0
>> +#define EXYNOS_CHECK_LPA   0xABAD
>>  #endif
>> diff --git a/board/samsung/smdk5250/Makefile 
>> b/board/samsung/smdk5250/Makefile
>> index 47c6a5a..7eaef09 100644
>> --- a/board/samsung/smdk5250/Makefile
>> +++ b/board/samsung/smdk5250/

Re: [U-Boot] [RFC PATCH 01/22] sandbox: Allow -c argument to provide a command list

2013-01-11 Thread Marek Vasut
Dear Simon Glass,

> This allows passing of entire scripts to sandbox with the -c argument,
> which is useful for testing. Commands can be delimited with a newline
> or semicolon.
> 
> Signed-off-by: Simon Glass 

Reviewed-by: Marek Vasut 

> ---
>  arch/sandbox/cpu/start.c |2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/sandbox/cpu/start.c b/arch/sandbox/cpu/start.c
> index 8589da2..ce47e7e 100644
> --- a/arch/sandbox/cpu/start.c
> +++ b/arch/sandbox/cpu/start.c
> @@ -90,7 +90,7 @@ int sandbox_main_loop_init(void)
> 
>   /* Execute command if required */
>   if (state->cmd) {
> - run_command(state->cmd, 0);
> + run_command_list(state->cmd, -1, 0);
>   os_exit(state->exit_type);
>   }

Best regards,
Marek Vasut
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Re: [U-Boot] [RFC PATCH 02/22] sandbox: Support 'source' command

2013-01-11 Thread Marek Vasut
Dear Simon Glass,

> Enhance the source command to work with sandbox, by using map_sysmem() to
> convert a ulong address into a pointer.
> 
> Signed-off-by: Simon Glass 

Reviewed-by: Marek Vasut 

Best regards,
Marek Vasut
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Re: [U-Boot] [RFC PATCH 03/22] fs: Add support for saving data to filesystems

2013-01-11 Thread Marek Vasut
Dear Simon Glass,

> Add a new method for saving that filesystems can implement. This mirrors
> the existing load method.
> 
> Signed-off-by: Simon Glass 

Reviewed-by: Marek Vasut 

btw what about fat write support, can this map somehow on it?

Best regards,
Marek Vasut
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Re: [U-Boot] [RFC PATCH 04/22] sandbox: fs: Add support for saving files to host filesystem

2013-01-11 Thread Marek Vasut
Dear Simon Glass,

> This allows write of files from the host filesystem in sandbox. There is
> currently no concept of overwriting the file and removing its existing
> contents - all writing is done on top of what is there. This means that
> writing 10 bytes to the start of a 1KB file will only update those 10
> bytes, not truncate the file to 10 byte slong.
> 
> If the file does not exist it is created.
> 
> Signed-off-by: Simon Glass 

Reviewed-by: Marek Vasut 

Best regards,
Marek Vasut
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Re: [U-Boot] [RFC PATCH 07/22] arm: Refactor bootm to reduce #ifdefs

2013-01-11 Thread Marek Vasut
Dear Simon Glass,

> With fewer #ifdefs the code is more readable and more of the code is
> compiled for all boards. Add defines in the header file to control
> what features are enabled, and then use if() instead of #ifdef.
> 
> Signed-off-by: Simon Glass 

Did you try building it with ELDK 4.2 and check if there's no size growth?

Best regards,
Marek Vasut
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Re: [U-Boot] [RFC PATCH 09/22] powerpc: Use image_setup_linux() instead of local code

2013-01-11 Thread Marek Vasut
Dear Simon Glass,

> Rather than having similar code in powerpc, use image_setup_linux() which
> should be common across all architectures that use the FDT.
> 
> Signed-off-by: Simon Glass 

Reviewed-by: Marek Vasut 

Best regards,
Marek Vasut
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Re: [U-Boot] [RFC PATCH 08/22] arm: Use image_setup_linux() instead of local code

2013-01-11 Thread Marek Vasut
Dear Simon Glass,

> Use the common FDT setup function that is now available in image. Move
> the FDT-specific code to a new bootm-fdt.c and remove unused headers
> from bootm.c.
> 
> Signed-off-by: Simon Glass 

Reviewed-by: Marek Vasut 

Best regards,
Marek Vasut
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Re: [U-Boot] [RFC PATCH 10/22] m68k: Use image_setup_linux() instead of local code

2013-01-11 Thread Marek Vasut
Dear Simon Glass,

> Rather than having similar code in m68k, use image_setup_linux() which
> should be common across all architectures that use the FDT.
> 
> Signed-off-by: Simon Glass 

Reviewed-by: Marek Vasut 

Best regards,
Marek Vasut
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[U-Boot] [PATCH v2 1/3] am33xx: add a pulldown macro to pinmux config

2013-01-11 Thread Lars Poeschel
From: Lars Poeschel 

Signed-off-by: Lars Poeschel 
---
 arch/arm/include/asm/arch-am33xx/mux.h |3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-am33xx/mux.h 
b/arch/arm/include/asm/arch-am33xx/mux.h
index aed6b00..460ac1c 100644
--- a/arch/arm/include/asm/arch-am33xx/mux.h
+++ b/arch/arm/include/asm/arch-am33xx/mux.h
@@ -25,7 +25,8 @@
 /* PAD Control Fields */
 #define SLEWCTRL   (0x1 << 6)
 #define RXACTIVE   (0x1 << 5)
-#define PULLUP_EN  (0x1 << 4) /* Pull UP Selection */
+#define PULLDOWN_EN(0x0 << 4) /* Pull Down Selection */
+#define PULLUP_EN  (0x1 << 4) /* Pull Up Selection */
 #define PULLUDEN   (0x0 << 3) /* Pull up enabled */
 #define PULLUDDIS  (0x1 << 3) /* Pull up disabled */
 #define MODE(val)  val /* used for Readability */
-- 
1.7.10.4

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[U-Boot] [PATCH v2 2/3] pcm051: Add support for Phytec phyCORE-AM335x

2013-01-11 Thread Lars Poeschel
From: Lars Poeschel 

The board is named pcm051 and has this hardware:
SOC: TI AM3359
DDR3-RAM: 2x MT41J256M8HX-15EIT:D 512MiB
ETH 1: LAN8710AI
SPI-Flash: W25Q64BVSSIG
RTC: RV-4162-C7
I2C-EEPROM: CAT32WC32
NAND: MT29F4G08_VFPGA63
PMIC: TPS65910A3
LCD

Supported:
UART 1
MMC/SD
ETH 1
USB
I2C
SPI

Not yet supported:
NAND
RTC
LCD

Signed-off-by: Lars Poeschel 
---
 MAINTAINERS |3 +
 arch/arm/include/asm/arch-am33xx/ddr_defs.h |   18 ++
 board/phytec/pcm051/Makefile|   46 
 board/phytec/pcm051/board.c |  266 
 board/phytec/pcm051/board.h |   33 +++
 board/phytec/pcm051/mux.c   |  133 
 boards.cfg  |1 +
 include/configs/pcm051.h|  300 +++
 8 files changed, 800 insertions(+)
 create mode 100644 board/phytec/pcm051/Makefile
 create mode 100644 board/phytec/pcm051/board.c
 create mode 100644 board/phytec/pcm051/board.h
 create mode 100644 board/phytec/pcm051/mux.c
 create mode 100644 include/configs/pcm051.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 28c052d..9718e08 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -815,6 +815,9 @@ Dave Peverley 
 
omap730p2   ARM926EJS
 
+Lars Poeschel 
+   pcm051  ARM ARMV7 (AM33xx Soc)
+
 Mathieu Poirier 
 
snowballARM ARMV7 (u8500 SoC)
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h 
b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
index 8e69fb6..f95b332 100644
--- a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
+++ b/arch/arm/include/asm/arch-am33xx/ddr_defs.h
@@ -65,6 +65,24 @@
 #define MT41J128MJT125_PHY_FIFO_WE 0x100
 #define MT41J128MJT125_IOCTRL_VALUE0x18B
 
+/* Micron MT41J256M8HX-15E */
+#define MT41J256M8HX15E_EMIF_READ_LATENCY  0x06
+#define MT41J256M8HX15E_EMIF_TIM1  0x0888A39B
+#define MT41J256M8HX15E_EMIF_TIM2  0x26337FDA
+#define MT41J256M8HX15E_EMIF_TIM3  0x501F830F
+#define MT41J256M8HX15E_EMIF_SDCFG 0x61C04B32
+#define MT41J256M8HX15E_EMIF_SDREF 0x093B
+#define MT41J256M8HX15E_ZQ_CFG 0x50074BE4
+#define MT41J256M8HX15E_DLL_LOCK_DIFF  0x1
+#define MT41J256M8HX15E_RATIO  0x40
+#define MT41J256M8HX15E_INVERT_CLKOUT  0x1
+#define MT41J256M8HX15E_RD_DQS 0x3B
+#define MT41J256M8HX15E_WR_DQS 0x85
+#define MT41J256M8HX15E_PHY_WR_DATA0xC1
+#define MT41J256M8HX15E_PHY_FIFO_WE0x100
+#define MT41J256M8HX15E_IOCTRL_VALUE   0x18B
+
+
 /**
  * Configure SDRAM
  */
diff --git a/board/phytec/pcm051/Makefile b/board/phytec/pcm051/Makefile
new file mode 100644
index 000..67a87a1
--- /dev/null
+++ b/board/phytec/pcm051/Makefile
@@ -0,0 +1,46 @@
+#
+# Makefile
+#
+# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed "as is" WITHOUT ANY WARRANTY of any
+# kind, whether express or implied; without even the implied warranty
+# of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+ifdef CONFIG_SPL_BUILD
+COBJS  := mux.o
+endif
+
+COBJS  += board.o
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+SOBJS  := $(addprefix $(obj),$(SOBJS))
+
+$(LIB):$(obj).depend $(OBJS) $(SOBJS)
+   $(call cmd_link_o_target, $(OBJS) $(SOBJS))
+
+clean:
+   rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+   rm -f $(LIB) core *.bak $(obj).depend
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c
new file mode 100644
index 000..55bc018
--- /dev/null
+++ b/board/phytec/pcm051/board.c
@@ -0,0 +1,266 @@
+/*
+ * board.c
+ *
+ * Board functions for Phytec phyCORE-AM335x (pcm051) based boards
+ *
+ * Copyright (C) 2013 Lemonage Software GmbH
+ * Author Lars Poeschel 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPO

[U-Boot] [PATCH v2 3/3] am335x: display msg when reading MAC from efuse

2013-01-11 Thread Lars Poeschel
From: Lars Poeschel 

When ethaddr is not set in environment the MAC address is read
from efuse. The message was only printed in debug case, but this
message could be of interest for the ordinary user, so printf it.

Signed-off-by: Lars Poeschel 
---
 board/ti/am335x/board.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index f0eca54..ac3c999 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -391,7 +391,7 @@ int board_eth_init(bd_t *bis)
uint32_t mac_hi, mac_lo;
 
if (!eth_getenv_enetaddr("ethaddr", mac_addr)) {
-   debug(" not set. Reading from E-fuse\n");
+   printf(" not set. Reading from E-fuse\n");
/* try reading mac address from efuse */
mac_lo = readl(&cdev->macid0l);
mac_hi = readl(&cdev->macid0h);
-- 
1.7.10.4

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Re: [U-Boot] [PATCH V4 4/9] EXYNOS5: DWMMC: Added FDT support for DWMMC

2013-01-11 Thread Amarendra Reddy
Hi Simon / Jaehoon,

Thanks for review comments.
Please find the responses below.

Thanks & Regards
Amarendra Reddy

On 11 January 2013 11:14, Simon Glass  wrote:

> Hi Jaehoon,
>
> On Thu, Jan 10, 2013 at 8:12 PM, Jaehoon Chung 
> wrote:
> > On 01/11/2013 12:33 AM, Simon Glass wrote:
> >> Hi Amar,
> >>
> >> On Fri, Jan 4, 2013 at 1:34 AM, Amar  wrote:
> >>> This patch adds FDT support for DWMMC, by reading the DWMMC node data
> >>> from the device tree and initialising DWMMC channels as per data
> >>> obtained from the node.
> >>>
> >>> Changes from V1:
> >>> 1)Updated code to have same signature for the function
> >>> exynos_dwmci_init() for both FDT and non-FDT versions.
> >>> 2)Updated code to pass device_id parameter to the function
> >>> exynos5_mmc_set_clk_div() instead of index.
> >>> 3)Updated code to decode the value of "samsung,width" from FDT.
> >>> 4)Channel index is computed instead of getting from FDT.
> >>>
> >>> Changes from V2:
> >>> 1)Updation of commit message and resubmition of proper patch
> set.
> >>>
> >>> Changes from V3:
> >>> 1)Replaced the new function exynos5_mmc_set_clk_div() with the
> >>> existing function set_mmc_clk(). set_mmc_clk() will do the
> purpose.
> >>> 2)Computation of FSYS block clock divisor (pre-ratio) is added.
> >>>
> >>> Signed-off-by: Vivek Gautam 
> >>> Signed-off-by: Amar 
> >>> ---
> >>>  arch/arm/include/asm/arch-exynos/dwmmc.h |   4 +
> >>>  drivers/mmc/exynos_dw_mmc.c  | 129
> +--
> >>>  include/dwmmc.h  |   4 +
> >>>  3 files changed, 130 insertions(+), 7 deletions(-)
> >>>
> >>> diff --git a/arch/arm/include/asm/arch-exynos/dwmmc.h
> b/arch/arm/include/asm/arch-exynos/dwmmc.h
> >>> index 8acdf9b..40dcc7b 100644
> >>> --- a/arch/arm/include/asm/arch-exynos/dwmmc.h
> >>> +++ b/arch/arm/include/asm/arch-exynos/dwmmc.h
> >>> @@ -29,8 +29,12 @@
> >>>
> >>>  int exynos_dwmci_init(u32 regbase, int bus_width, int index);
> >>>
> >>> +#ifdef CONFIG_OF_CONTROL
> >>> +unsigned int exynos_dwmmc_init(const void *blob);
> >>> +#else
> >>>  static inline unsigned int exynos_dwmmc_init(int index, int bus_width)
> >>
> >> Why unsigned?
>
Ok, shall replace "unsigned int exynos_dwmmc_init(int index, int
bus_width)" with
int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32
clksel).
 Regarding the parameter *'clksel':*
i) "timing" value shall be passed in case of FDT, to be written into CLKSEL
register.
ii) NULL will be passed in case of non-FDT.


>  >>
> >> I'm really not that keen on functions which change their signature
> >> based on an #ifdef. Can we perhaps have
> >>
> >> int exynos_dwmmc_init(const void *blob);
> >>
> >> which will pass NULL when there is no FDT, and
> >>
> >> int exynos_dwmmc_add_port(int index, int bus_width)
> >>
> >> for use by non-FDT boards?
>

Ok. I will call the function int exynos_dwmmc_init(NULL) for non-FDT and
int exynos_dwmmc_init(const void *blob) for FDT.
And use "int exynos_dwmci_add_port(int index, u32 regbase, int bus_width,
u32 clksel)".


>  >>
> >>>  {
> >>> unsigned int base = samsung_get_base_mmc() + (0x1 * index);
> >>> return exynos_dwmci_init(base, bus_width, index);
> >>>  }
> >>> +#endif
> >>> diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c
> >>> index 72a31b7..d7ca7d0 100644
> >>> --- a/drivers/mmc/exynos_dw_mmc.c
> >>> +++ b/drivers/mmc/exynos_dw_mmc.c
> >>> @@ -19,39 +19,154 @@
> >>>   */
> >>>
> >>>  #include 
> >>> -#include 
> >>>  #include 
> >>> +#include 
> >>> +#include 
> >>> +#include 
> >>>  #include 
> >>>  #include 
> >>> +#include 
> >>> +
> >>> +#defineDWMMC_MAX_CH_NUM4
> >>> +#defineDWMMC_MAX_FREQ  5200
> >>> +#defineDWMMC_MIN_FREQ  40
> >>> +#defineDWMMC_MMC0_CLKSEL_VAL   0x03030001
> >>> +#defineDWMMC_MMC2_CLKSEL_VAL   0x03020001
> >>> +#defineONE_MEGA_HZ 100
> >>> +#defineSCALED_VAL_FOUR_HUNDRED 400
> >>
> >> I don't think you need these last two - you can just write the number
> >> in the code
> > Why didn't add into the dwmmc.h?
>

Ok, will just write the number in the code.

>  >>
> >>>
> >>>  static char *EXYNOS_NAME = "EXYNOS DWMMC";
> >>
> >> Same with this I think
> > Sorry..What means? Also need not?
>
> Yes I mean that you probably don't need this - just put the string in the
> code.
>
Ok.

>
> >>
> >>> +u32 timing[3];
> >>>
> >>> +/*
> >>> + * Function used as callback function to initialise the
> >>> + * CLKSEL register for every mmc channel.
> >>> + */
> >>>  static void exynos_dwmci_clksel(struct dwmci_host *host)
> >>>  {
> >>> -   u32 val;
> >>> -   val = DWMCI_SET_SAMPLE_CLK(DWMCI_SHIFT_0) |
> >>> -   DWMCI_SET_DRV_CLK(DWMCI_SHIFT_0) |
> DWMCI_SET_DIV_RATIO(0);
> >>> +   dwmci_writel(host, DWMCI_CLKSEL

[U-Boot] [PATCH 01/18] mxs: mmc: Drop unused members from struct mxsmmc_priv

2013-01-11 Thread Marek Vasut
The clock data are not used by the driver, drop them.

Signed-off-by: Marek Vasut 
Cc: Andy Fleming 
Cc: Fabio Estevam 
Cc: Stefano Babic 
---
 drivers/mmc/mxsmmc.c |   12 
 1 file changed, 12 deletions(-)

diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 024df59..aa3d1b0 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -47,8 +47,6 @@
 struct mxsmmc_priv {
int id;
struct mxs_ssp_regs *regs;
-   uint32_tclkseq_bypass;
-   uint32_t*clkctrl_ssp;
uint32_tbuswidth;
int (*mmc_is_wp)(int);
struct mxs_dma_desc *desc;
@@ -355,8 +353,6 @@ static int mxsmmc_init(struct mmc *mmc)
 
 int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
 {
-   struct mxs_clkctrl_regs *clkctrl_regs =
-   (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
struct mmc *mmc = NULL;
struct mxsmmc_priv *priv = NULL;
int ret;
@@ -387,23 +383,15 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
switch (id) {
case 0:
priv->regs = (struct mxs_ssp_regs *)MXS_SSP0_BASE;
-   priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP0;
-   priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp0;
break;
case 1:
priv->regs = (struct mxs_ssp_regs *)MXS_SSP1_BASE;
-   priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP1;
-   priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp1;
break;
case 2:
priv->regs = (struct mxs_ssp_regs *)MXS_SSP2_BASE;
-   priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP2;
-   priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp2;
break;
case 3:
priv->regs = (struct mxs_ssp_regs *)MXS_SSP3_BASE;
-   priv->clkseq_bypass = CLKCTRL_CLKSEQ_BYPASS_SSP3;
-   priv->clkctrl_ssp = &clkctrl_regs->hw_clkctrl_ssp3;
break;
}
 
-- 
1.7.10.4

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[U-Boot] [PATCH 03/18] mxs: clock: Use 'mxs' prefix for methods

2013-01-11 Thread Marek Vasut
From: Otavio Salvador 

Signed-off-by: Otavio Salvador 
Cc: Fabio Estevam 
Cc: Marek Vasut 
Cc: Stefano Babic 
---
 arch/arm/cpu/arm926ejs/mxs/clock.c   |   46 +++---
 arch/arm/include/asm/arch-mxs/clock.h|6 ++--
 board/bluegiga/apx4devkit/apx4devkit.c   |6 ++--
 board/denx/m28evk/m28evk.c   |8 +++---
 board/freescale/mx28evk/mx28evk.c|8 +++---
 board/schulercontrol/sc_sps_1/sc_sps_1.c |8 +++---
 drivers/mmc/mxsmmc.c |4 +--
 drivers/spi/mxs_spi.c|2 +-
 8 files changed, 44 insertions(+), 44 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c 
b/arch/arm/cpu/arm926ejs/mxs/clock.c
index 5d6e12a..b7cf98f 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -41,7 +41,7 @@
 #definePLL_FREQ_MHZ(PLL_FREQ_KHZ / 1000)
 #defineXTAL_FREQ_MHZ   (XTAL_FREQ_KHZ / 1000)
 
-static uint32_t mx28_get_pclk(void)
+static uint32_t mxs_get_pclk(void)
 {
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -73,7 +73,7 @@ static uint32_t mx28_get_pclk(void)
return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
 }
 
-static uint32_t mx28_get_hclk(void)
+static uint32_t mxs_get_hclk(void)
 {
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -88,10 +88,10 @@ static uint32_t mx28_get_hclk(void)
return 0;
 
div = clkctrl & CLKCTRL_HBUS_DIV_MASK;
-   return mx28_get_pclk() / div;
+   return mxs_get_pclk() / div;
 }
 
-static uint32_t mx28_get_emiclk(void)
+static uint32_t mxs_get_emiclk(void)
 {
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -116,7 +116,7 @@ static uint32_t mx28_get_emiclk(void)
return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
 }
 
-static uint32_t mx28_get_gpmiclk(void)
+static uint32_t mxs_get_gpmiclk(void)
 {
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -143,7 +143,7 @@ static uint32_t mx28_get_gpmiclk(void)
 /*
  * Set IO clock frequency, in kHz
  */
-void mx28_set_ioclk(enum mxs_ioclock io, uint32_t freq)
+void mxs_set_ioclk(enum mxs_ioclock io, uint32_t freq)
 {
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -176,7 +176,7 @@ void mx28_set_ioclk(enum mxs_ioclock io, uint32_t freq)
 /*
  * Get IO clock, returns IO clock in kHz
  */
-static uint32_t mx28_get_ioclk(enum mxs_ioclock io)
+static uint32_t mxs_get_ioclk(enum mxs_ioclock io)
 {
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -197,7 +197,7 @@ static uint32_t mx28_get_ioclk(enum mxs_ioclock io)
 /*
  * Configure SSP clock frequency, in kHz
  */
-void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal)
+void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal)
 {
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -216,7 +216,7 @@ void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, 
int xtal)
if (xtal)
clk = XTAL_FREQ_KHZ;
else
-   clk = mx28_get_ioclk(ssp >> 1);
+   clk = mxs_get_ioclk(ssp >> 1);
 
if (freq > clk)
return;
@@ -241,7 +241,7 @@ void mx28_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, 
int xtal)
 /*
  * Return SSP frequency, in kHz
  */
-static uint32_t mx28_get_sspclk(enum mxs_sspclock ssp)
+static uint32_t mxs_get_sspclk(enum mxs_sspclock ssp)
 {
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
@@ -263,7 +263,7 @@ static uint32_t mx28_get_sspclk(enum mxs_sspclock ssp)
if (tmp == 0)
return 0;
 
-   clk = mx28_get_ioclk(ssp >> 1);
+   clk = mxs_get_ioclk(ssp >> 1);
 
return clk / tmp;
 }
@@ -271,10 +271,10 @@ static uint32_t mx28_get_sspclk(enum mxs_sspclock ssp)
 /*
  * Set SSP/MMC bus frequency, in kHz)
  */
-void mx28_set_ssp_busclock(unsigned int bus, uint32_t freq)
+void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq)
 {
struct mxs_ssp_regs *ssp_regs;
-   const uint32_t sspclk = mx28_get_sspclk(bus);
+   const uint32_t sspclk = mxs_get_sspclk(bus);
uint32_t reg;
uint32_t divide, rate, tgtclk;
 
@@ -313,26 +313,26 @@ uint32_t mxc_get_clock(enum mxc_clock clk)
 {
switch (clk) {
case MXC_ARM_CLK:
-   return mx28_get_pclk() * 100;
+   return mxs_get_pclk() * 100;
case MXC_GPMI_CLK:
-   return mx28_get_gpmiclk() * 100;
+   return mxs_get_gpmiclk() * 100;
case MXC_AHB_CLK:
case MXC_IPG_CLK:
-   return mx28_get_hclk() * 10

[U-Boot] [PATCH 14/18] mmc: Limit the number of used SSP ports on MX23

2013-01-11 Thread Marek Vasut
The MX23 can only use two SSP ports.

Signed-off-by: Marek Vasut 
Cc: Andy Fleming 
Cc: Fabio Estevam 
Cc: Otavio Salvador 
Cc: Stefano Babic 
---
 drivers/mmc/mxsmmc.c |   12 +++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index 76878d0..0c4cd54 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -356,6 +356,16 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
struct mmc *mmc = NULL;
struct mxsmmc_priv *priv = NULL;
int ret;
+#if defined(CONFIG_MX23)
+   const unsigned int mxsmmc_max_id = 2;
+   const unsigned int mxsmmc_clk_id = 0;
+#elif defined(CONFIG_MX28)
+   const unsigned int mxsmmc_max_id = 4;
+   const unsigned int mxsmmc_clk_id = id;
+#endif
+
+   if (id >= mxsmmc_max_id)
+   return -ENODEV;
 
mmc = malloc(sizeof(struct mmc));
if (!mmc)
@@ -401,7 +411,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
 * CLOCK_RATE could be any integer from 0 to 255.
 */
mmc->f_min = 40;
-   mmc->f_max = mxc_get_clock(MXC_SSP0_CLK + id) * 1000 / 2;
+   mmc->f_max = mxc_get_clock(MXC_SSP0_CLK + mxsmmc_clk_id) * 1000 / 2;
mmc->b_max = 0x20;
 
mmc_register(mmc);
-- 
1.7.10.4

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[U-Boot] [PATCH 05/18] mx23: Add iomux-mx23.h

2013-01-11 Thread Marek Vasut
From: Otavio Salvador 

This has been copied from Linux source at revision 786f02b719f.

Signed-off-by: Otavio Salvador 
Cc: Fabio Estevam 
Cc: Marek Vasut 
Cc: Stefano Babic 
---
 arch/arm/include/asm/arch-mxs/iomux-mx23.h |  355 
 arch/arm/include/asm/arch-mxs/sys_proto.h  |6 +
 2 files changed, 361 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-mxs/iomux-mx23.h

diff --git a/arch/arm/include/asm/arch-mxs/iomux-mx23.h 
b/arch/arm/include/asm/arch-mxs/iomux-mx23.h
new file mode 100644
index 000..7cb5e71
--- /dev/null
+++ b/arch/arm/include/asm/arch-mxs/iomux-mx23.h
@@ -0,0 +1,355 @@
+/*
+ * Copyright (C) 2009-2010 Amit Kucheria 
+ * Copyright (C) 2010 Freescale Semiconductor, Inc.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#ifndef __MACH_IOMUX_MX23_H__
+#define __MACH_IOMUX_MX23_H__
+
+#include 
+
+/*
+ * The naming convention for the pad modes is MX23_PAD___
+ * If  or  refers to a GPIO, it is named GPIO__
+ * See also iomux.h
+ *
+ * BANK
PIN MUX
+ */
+/* MUXSEL_0 */
+#define MX23_PAD_GPMI_D00__GPMI_D00MXS_IOMUX_PAD_NAKED(0,  0, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D01__GPMI_D01MXS_IOMUX_PAD_NAKED(0,  1, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D02__GPMI_D02MXS_IOMUX_PAD_NAKED(0,  2, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D03__GPMI_D03MXS_IOMUX_PAD_NAKED(0,  3, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D04__GPMI_D04MXS_IOMUX_PAD_NAKED(0,  4, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D05__GPMI_D05MXS_IOMUX_PAD_NAKED(0,  5, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D06__GPMI_D06MXS_IOMUX_PAD_NAKED(0,  6, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D07__GPMI_D07MXS_IOMUX_PAD_NAKED(0,  7, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D08__GPMI_D08MXS_IOMUX_PAD_NAKED(0,  8, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D09__GPMI_D09MXS_IOMUX_PAD_NAKED(0,  9, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D10__GPMI_D10MXS_IOMUX_PAD_NAKED(0, 10, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D11__GPMI_D11MXS_IOMUX_PAD_NAKED(0, 11, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D12__GPMI_D12MXS_IOMUX_PAD_NAKED(0, 12, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D13__GPMI_D13MXS_IOMUX_PAD_NAKED(0, 13, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D14__GPMI_D14MXS_IOMUX_PAD_NAKED(0, 14, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_D15__GPMI_D15MXS_IOMUX_PAD_NAKED(0, 15, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_CLE__GPMI_CLEMXS_IOMUX_PAD_NAKED(0, 16, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_ALE__GPMI_ALEMXS_IOMUX_PAD_NAKED(0, 17, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_CE2N__GPMI_CE2N  MXS_IOMUX_PAD_NAKED(0, 18, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_RDY0__GPMI_RDY0  MXS_IOMUX_PAD_NAKED(0, 19, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_RDY1__GPMI_RDY1  MXS_IOMUX_PAD_NAKED(0, 20, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_RDY2__GPMI_RDY2  MXS_IOMUX_PAD_NAKED(0, 21, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_RDY3__GPMI_RDY3  MXS_IOMUX_PAD_NAKED(0, 22, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_WPN__GPMI_WPNMXS_IOMUX_PAD_NAKED(0, 23, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_WRN__GPMI_WRNMXS_IOMUX_PAD_NAKED(0, 24, 
PAD_MUXSEL_0)
+#define MX23_PAD_GPMI_RDN__GPMI_RDNMXS_IOMUX_PAD_NAKED(0, 25, 
PAD_MUXSEL_0)
+#define MX23_PAD_AUART1_CTS__AUART1_CTSMXS_IOMUX_PAD_NAKED(0, 
26, PAD_MUXSEL_0)
+#define MX23_PAD_AUART1_RTS__AUART1_RTSMXS_IOMUX_PAD_NAKED(0, 
27, PAD_MUXSEL_0)
+#define MX23_PAD_AUART1_RX__AUART1_RX  MXS_IOMUX_PAD_NAKED(0, 28, 
PAD_MUXSEL_0)
+#define MX23_PAD_AUART1_TX__AUART1_TX  MXS_IOMUX_PAD_NAKED(0, 29, 
PAD_MUXSEL_0)
+#define MX23_PAD_I2C_SCL__I2C_SCL  MXS_IOMUX_PAD_NAKED(0, 30, 
PAD_MUXSEL_0)
+#define MX23_PAD_I2C_SDA__I2C_SDA  MXS_IOMUX_PAD_NAKED(0, 31, 
PAD_MUXSEL_0)
+
+#define MX23_PAD_LCD_D00__LCD_D00  MXS_IOMUX_PAD_NAKED(1,  0, 
PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D01__LCD_D01  MXS_IOMUX_PAD_NAKED(1,  1, 
PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D02__LCD_D02  MXS_IOMUX_PAD_NAKED(1,  2, 
PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D03__LCD_D03  MXS_IOMUX_PAD_NAKED(1,  3, 
PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D04__LCD_D04  MXS_IOMUX_PAD_NAKED(1,  4, 
PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D05__LCD_D05  MXS_IOMUX_PAD_NAKED(1,  5, 
PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D06__LCD_D06  MXS_IOMUX_PAD_NAKED(1,  6, 
PAD_MUXSEL_0)
+#define MX23_PAD_LCD_D07__LCD_D07  MXS_IOMUX_PAD_NAKED(1,  7, 
PAD_MUXSEL_0)
+#define M

[U-Boot] [PATCH 10/18] mx23: SPL: Add boot mode support

2013-01-11 Thread Marek Vasut
From: Otavio Salvador 

This adds the boot mode support for i.MX23 processors.

Signed-off-by: Otavio Salvador 
Cc: Fabio Estevam 
Cc: Marek Vasut 
Cc: Stefano Babic 
---
 arch/arm/cpu/arm926ejs/mxs/spl_boot.c |   25 +
 1 file changed, 25 insertions(+)

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c 
b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
index 1b8502e..7e70440 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_boot.c
@@ -51,12 +51,21 @@ void early_delay(int delay)
 
 #defineMUX_CONFIG_BOOTMODE_PAD (MXS_PAD_3V3 | MXS_PAD_4MA | 
MXS_PAD_NOPULL)
 static const iomux_cfg_t iomux_boot[] = {
+#if defined(CONFIG_MX23)
+   MX23_PAD_LCD_D00__GPIO_1_0 | MUX_CONFIG_BOOTMODE_PAD,
+   MX23_PAD_LCD_D01__GPIO_1_1 | MUX_CONFIG_BOOTMODE_PAD,
+   MX23_PAD_LCD_D02__GPIO_1_2 | MUX_CONFIG_BOOTMODE_PAD,
+   MX23_PAD_LCD_D03__GPIO_1_3 | MUX_CONFIG_BOOTMODE_PAD,
+   MX23_PAD_LCD_D04__GPIO_1_4 | MUX_CONFIG_BOOTMODE_PAD,
+   MX23_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD,
+#elif defined(CONFIG_MX28)
MX28_PAD_LCD_D00__GPIO_1_0 | MUX_CONFIG_BOOTMODE_PAD,
MX28_PAD_LCD_D01__GPIO_1_1 | MUX_CONFIG_BOOTMODE_PAD,
MX28_PAD_LCD_D02__GPIO_1_2 | MUX_CONFIG_BOOTMODE_PAD,
MX28_PAD_LCD_D03__GPIO_1_3 | MUX_CONFIG_BOOTMODE_PAD,
MX28_PAD_LCD_D04__GPIO_1_4 | MUX_CONFIG_BOOTMODE_PAD,
MX28_PAD_LCD_D05__GPIO_1_5 | MUX_CONFIG_BOOTMODE_PAD,
+#endif
 };
 
 static uint8_t mxs_get_bootmode_index(void)
@@ -68,6 +77,21 @@ static uint8_t mxs_get_bootmode_index(void)
/* Setup IOMUX of bootmode pads to GPIO */
mxs_iomux_setup_multiple_pads(iomux_boot, ARRAY_SIZE(iomux_boot));
 
+#if defined(CONFIG_MX23)
+   /* Setup bootmode pins as GPIO input */
+   gpio_direction_input(MX23_PAD_LCD_D00__GPIO_1_0);
+   gpio_direction_input(MX23_PAD_LCD_D01__GPIO_1_1);
+   gpio_direction_input(MX23_PAD_LCD_D02__GPIO_1_2);
+   gpio_direction_input(MX23_PAD_LCD_D03__GPIO_1_3);
+   gpio_direction_input(MX23_PAD_LCD_D05__GPIO_1_5);
+
+   /* Read bootmode pads */
+   bootmode |= (gpio_get_value(MX23_PAD_LCD_D00__GPIO_1_0) ? 1 : 0) << 0;
+   bootmode |= (gpio_get_value(MX23_PAD_LCD_D01__GPIO_1_1) ? 1 : 0) << 1;
+   bootmode |= (gpio_get_value(MX23_PAD_LCD_D02__GPIO_1_2) ? 1 : 0) << 2;
+   bootmode |= (gpio_get_value(MX23_PAD_LCD_D03__GPIO_1_3) ? 1 : 0) << 3;
+   bootmode |= (gpio_get_value(MX23_PAD_LCD_D05__GPIO_1_5) ? 1 : 0) << 5;
+#elif defined(CONFIG_MX28)
/* Setup bootmode pins as GPIO input */
gpio_direction_input(MX28_PAD_LCD_D00__GPIO_1_0);
gpio_direction_input(MX28_PAD_LCD_D01__GPIO_1_1);
@@ -83,6 +107,7 @@ static uint8_t mxs_get_bootmode_index(void)
bootmode |= (gpio_get_value(MX28_PAD_LCD_D03__GPIO_1_3) ? 1 : 0) << 3;
bootmode |= (gpio_get_value(MX28_PAD_LCD_D04__GPIO_1_4) ? 1 : 0) << 4;
bootmode |= (gpio_get_value(MX28_PAD_LCD_D05__GPIO_1_5) ? 1 : 0) << 5;
+#endif
 
for (i = 0; i < ARRAY_SIZE(mxs_boot_modes); i++) {
masked = bootmode & mxs_boot_modes[i].boot_mask;
-- 
1.7.10.4

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[U-Boot] [PATCH 04/18] mx23: Add register base addresses

2013-01-11 Thread Marek Vasut
From: Otavio Salvador 

This adds the base addresses of i.MX23 and easy the detection of wrong
order in board setup, in case no SoC has been set, an error is raised
during build.

Signed-off-by: Otavio Salvador 
Cc: Fabio Estevam 
Cc: Marek Vasut 
Cc: Stefano Babic 
---
 arch/arm/include/asm/arch-mxs/regs-base.h |   56 ++---
 1 file changed, 51 insertions(+), 5 deletions(-)

diff --git a/arch/arm/include/asm/arch-mxs/regs-base.h 
b/arch/arm/include/asm/arch-mxs/regs-base.h
index dbdcc2b..2d9f96b 100644
--- a/arch/arm/include/asm/arch-mxs/regs-base.h
+++ b/arch/arm/include/asm/arch-mxs/regs-base.h
@@ -1,5 +1,5 @@
 /*
- * Freescale i.MX28 Peripheral Base Addresses
+ * Freescale i.MX23/i.MX28 Peripheral Base Addresses
  *
  * Copyright (C) 2011 Marek Vasut 
  * on behalf of DENX Software Engineering GmbH
@@ -25,12 +25,55 @@
  *
  */
 
-#ifndef __MX28_REGS_BASE_H__
-#define __MX28_REGS_BASE_H__
+#ifndef __MXS_REGS_BASE_H__
+#define __MXS_REGS_BASE_H__
 
 /*
- * Register base address
+ * Register base addresses for i.MX23
  */
+#if defined(CONFIG_MX23)
+#defineMXS_ICOLL_BASE  0x8000
+#defineMXS_APBH_BASE   0x80004000
+#defineMXS_ECC8_BASE   0x80008000
+#defineMXS_BCH_BASE0x8000A000
+#defineMXS_GPMI_BASE   0x8000C000
+#defineMXS_SSP0_BASE   0x8001
+#defineMXS_SSP1_BASE   0x80034000
+#defineMXS_ETM_BASE0x80014000
+#defineMXS_PINCTRL_BASE0x80018000
+#defineMXS_DIGCTL_BASE 0x8001C000
+#defineMXS_EMI_BASE0x8002
+#defineMXS_APBX_BASE   0x80024000
+#defineMXS_DCP_BASE0x80028000
+#defineMXS_PXP_BASE0x8002A000
+#defineMXS_OCOTP_BASE  0x8002C000
+#defineMXS_AXI_BASE0x8002E000
+#defineMXS_LCDIF_BASE  0x8003
+#defineMXS_SSP1_BASE   0x80034000
+#defineMXS_TVENC_BASE  0x80038000
+#defineMXS_CLKCTRL_BASE0x8004
+#defineMXS_SAIF0_BASE  0x80042000
+#defineMXS_POWER_BASE  0x80044000
+#defineMXS_SAIF1_BASE  0x80046000
+#defineMXS_AUDIOOUT_BASE   0x80048000
+#defineMXS_AUDIOIN_BASE0x8004C000
+#defineMXS_LRADC_BASE  0x8005
+#defineMXS_SPDIF_BASE  0x80054000
+#defineMXS_I2C0_BASE   0x80058000
+#defineMXS_RTC_BASE0x8005C000
+#defineMXS_PWM_BASE0x80064000
+#defineMXS_TIMROT_BASE 0x80068000
+#defineMXS_UARTAPP0_BASE   0x8006C000
+#defineMXS_UARTAPP1_BASE   0x8006E000
+#defineMXS_UARTDBG_BASE0x8007
+#defineMXS_USBPHY0_BASE0x8007C000
+#defineMXS_USBCTRL0_BASE   0x8008
+#defineMXS_DRAM_BASE   0x800E
+
+/*
+ * Register base addresses for i.MX28
+ */
+#elif defined(CONFIG_MX28)
 #defineMXS_ICOL_BASE   0x8000
 #defineMXS_HSADC_BASE  0x80002000
 #defineMXS_APBH_BASE   0x80004000
@@ -84,5 +127,8 @@
 #defineMXS_DRAM_BASE   0x800E
 #defineMXS_ENET0_BASE  0x800F
 #defineMXS_ENET1_BASE  0x800F4000
+#else
+#error Unkown SoC. Please set CONFIG_MX23 or CONFIG_MX28
+#endif
 
-#endif /* __MX28_REGS_BASE_H__ */
+#endif /* __MXS_REGS_BASE_H__ */
-- 
1.7.10.4

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[U-Boot] [PATCH 06/18] mx23: Add POWER and CLKCTRL register definitions

2013-01-11 Thread Marek Vasut
Add register definitions for the i.MX23 power control block and
clock control block. These are essential for the basic bootstrap
of the i.MX23. Also, properly include them in imx-regs.h .

Signed-off-by: Marek Vasut 
Cc: Fabio Estevam 
Cc: Otavio Salvador 
Cc: Stefano Babic 
---
 arch/arm/include/asm/arch-mxs/imx-regs.h  |7 +-
 arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h |  221 +
 arch/arm/include/asm/arch-mxs/regs-power-mx23.h   |  358 +
 3 files changed, 585 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h
 create mode 100644 arch/arm/include/asm/arch-mxs/regs-power-mx23.h

diff --git a/arch/arm/include/asm/arch-mxs/imx-regs.h 
b/arch/arm/include/asm/arch-mxs/imx-regs.h
index 9764041..05eb63c 100644
--- a/arch/arm/include/asm/arch-mxs/imx-regs.h
+++ b/arch/arm/include/asm/arch-mxs/imx-regs.h
@@ -1,5 +1,5 @@
 /*
- * Freescale i.MX28 Registers
+ * Freescale i.MX23/i.MX28 Registers
  *
  * Copyright (C) 2011 Marek Vasut 
  * on behalf of DENX Software Engineering GmbH
@@ -37,6 +37,11 @@
 #include 
 #include 
 
+#ifdef CONFIG_MX23
+#include 
+#include 
+#endif
+
 #ifdef CONFIG_MX28
 #include 
 #include 
diff --git a/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h 
b/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h
new file mode 100644
index 000..62810ec
--- /dev/null
+++ b/arch/arm/include/asm/arch-mxs/regs-clkctrl-mx23.h
@@ -0,0 +1,221 @@
+/*
+ * Freescale i.MX23 CLKCTRL Register Definitions
+ *
+ * Copyright (C) 2012 Marek Vasut 
+ * on behalf of DENX Software Engineering GmbH
+ *
+ * Based on code from LTIB:
+ * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ *
+ */
+
+#ifndef __MX23_REGS_CLKCTRL_H__
+#define __MX23_REGS_CLKCTRL_H__
+
+#include 
+
+#ifndef__ASSEMBLY__
+struct mxs_clkctrl_regs {
+   mxs_reg_32(hw_clkctrl_pll0ctrl0)/* 0x00 */
+   uint32_thw_clkctrl_pll0ctrl1;   /* 0x10 */
+   uint32_treserved_pll0ctrl1[3];  /* 0x14-0x1c */
+   mxs_reg_32(hw_clkctrl_cpu)  /* 0x20 */
+   mxs_reg_32(hw_clkctrl_hbus) /* 0x30 */
+   mxs_reg_32(hw_clkctrl_xbus) /* 0x40 */
+   mxs_reg_32(hw_clkctrl_xtal) /* 0x50 */
+   mxs_reg_32(hw_clkctrl_pix)  /* 0x60 */
+   mxs_reg_32(hw_clkctrl_ssp0) /* 0x70 */
+   mxs_reg_32(hw_clkctrl_gpmi) /* 0x80 */
+   mxs_reg_32(hw_clkctrl_spdif)/* 0x90 */
+   mxs_reg_32(hw_clkctrl_emi)  /* 0xa0 */
+
+   uint32_treserved1[4];
+
+   mxs_reg_32(hw_clkctrl_saif0)/* 0xc0 */
+   mxs_reg_32(hw_clkctrl_tv)   /* 0xd0 */
+   mxs_reg_32(hw_clkctrl_etm)  /* 0xe0 */
+   mxs_reg_8(hw_clkctrl_frac0) /* 0xf0 */
+   mxs_reg_8(hw_clkctrl_frac1) /* 0x100 */
+   mxs_reg_32(hw_clkctrl_clkseq)   /* 0x110 */
+   mxs_reg_32(hw_clkctrl_reset)/* 0x120 */
+   mxs_reg_32(hw_clkctrl_status)   /* 0x130 */
+   mxs_reg_32(hw_clkctrl_version)  /* 0x140 */
+};
+#endif
+
+#defineCLKCTRL_PLL0CTRL0_LFR_SEL_MASK  (0x3 << 28)
+#defineCLKCTRL_PLL0CTRL0_LFR_SEL_OFFSET28
+#defineCLKCTRL_PLL0CTRL0_LFR_SEL_DEFAULT   (0x0 << 28)
+#defineCLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_2   (0x1 << 28)
+#defineCLKCTRL_PLL0CTRL0_LFR_SEL_TIMES_05  (0x2 << 28)
+#defineCLKCTRL_PLL0CTRL0_LFR_SEL_UNDEFINED (0x3 << 28)
+#defineCLKCTRL_PLL0CTRL0_CP_SEL_MASK   (0x3 << 24)
+#defineCLKCTRL_PLL0CTRL0_CP_SEL_OFFSET 24
+#defineCLKCTRL_PLL0CTRL0_CP_SEL_DEFAULT(0x0 << 24)
+#defineCLKCTRL_PLL0CTRL0_CP_SEL_TIMES_2(0x1 << 24)
+#defineCLKCTRL_PLL0CTRL0_CP_SEL_TIMES_05   (0x2 << 24)
+#defineCLKCTRL_PLL0CTRL0_CP_SEL_UNDEFINED  (0x3 << 24)
+#defineCLKCTRL_PLL0CTRL0_DIV_SEL_MASK  (0x3 << 20)
+#defineCLKCTRL_PLL0CTRL0_DIV_SEL_OFFSET20
+#defineCLKCTRL_PLL0CTRL0_DIV_SEL_DEFAULT   (0x0 << 20)
+#defineCLKCTRL_PLL0CTRL0_DIV_SEL_LOWER (0x1 << 20)
+#defineCLKCTRL_PLL0CTRL0_DIV_S

[U-Boot] [PATCH 02/18] mxs: ssp: Pull out the SSP bus to regs conversion

2013-01-11 Thread Marek Vasut
Create function which converts SSP bus number to SSP register pointer.
This functionality is reimplemented multiple times in the code, thus
make one common implementation. Moreover, make it a switch(), since the
SSP ports are not mapped in such nice linear fashion on MX23, therefore
having it a switch will simplify things there.

Signed-off-by: Marek Vasut 
Cc: Andy Fleming 
Cc: Fabio Estevam 
Cc: Stefano Babic 
---
 arch/arm/cpu/arm926ejs/mxs/clock.c   |2 +-
 arch/arm/include/asm/arch-mxs/regs-ssp.h |   16 
 drivers/mmc/mxsmmc.c |   15 +--
 drivers/spi/mxs_spi.c|5 +
 4 files changed, 19 insertions(+), 19 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c 
b/arch/arm/cpu/arm926ejs/mxs/clock.c
index 4ff19c3..5d6e12a 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -278,7 +278,7 @@ void mx28_set_ssp_busclock(unsigned int bus, uint32_t freq)
uint32_t reg;
uint32_t divide, rate, tgtclk;
 
-   ssp_regs = (struct mxs_ssp_regs *)(MXS_SSP0_BASE + (bus * 0x2000));
+   ssp_regs = mxs_ssp_regs_by_bus(bus);
 
/*
 * SSP bit rate = SSPCLK / (CLOCK_DIVIDE * (1 + CLOCK_RATE)),
diff --git a/arch/arm/include/asm/arch-mxs/regs-ssp.h 
b/arch/arm/include/asm/arch-mxs/regs-ssp.h
index cf52a28..4a75029 100644
--- a/arch/arm/include/asm/arch-mxs/regs-ssp.h
+++ b/arch/arm/include/asm/arch-mxs/regs-ssp.h
@@ -50,6 +50,22 @@ struct mxs_ssp_regs {
mxs_reg_32(hw_ssp_debug)
mxs_reg_32(hw_ssp_version)
 };
+
+static inline struct mxs_ssp_regs *mxs_ssp_regs_by_bus(unsigned int port)
+{
+   switch (port) {
+   case 0:
+   return (struct mxs_ssp_regs *)MXS_SSP0_BASE;
+   case 1:
+   return (struct mxs_ssp_regs *)MXS_SSP1_BASE;
+   case 2:
+   return (struct mxs_ssp_regs *)MXS_SSP2_BASE;
+   case 3:
+   return (struct mxs_ssp_regs *)MXS_SSP3_BASE;
+   default:
+   return NULL;
+   }
+}
 #endif
 
 #defineSSP_CTRL0_SFTRST(1 << 31)
diff --git a/drivers/mmc/mxsmmc.c b/drivers/mmc/mxsmmc.c
index aa3d1b0..2fd9ccc 100644
--- a/drivers/mmc/mxsmmc.c
+++ b/drivers/mmc/mxsmmc.c
@@ -380,20 +380,7 @@ int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int))
 
priv->mmc_is_wp = wp;
priv->id = id;
-   switch (id) {
-   case 0:
-   priv->regs = (struct mxs_ssp_regs *)MXS_SSP0_BASE;
-   break;
-   case 1:
-   priv->regs = (struct mxs_ssp_regs *)MXS_SSP1_BASE;
-   break;
-   case 2:
-   priv->regs = (struct mxs_ssp_regs *)MXS_SSP2_BASE;
-   break;
-   case 3:
-   priv->regs = (struct mxs_ssp_regs *)MXS_SSP3_BASE;
-   break;
-   }
+   priv->regs = mxs_ssp_regs_by_bus(id);
 
sprintf(mmc->name, "MXS MMC");
mmc->send_cmd = mxsmmc_send_cmd;
diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index 42e4c99..31cd77d 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -80,7 +80,6 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned 
int cs,
  unsigned int max_hz, unsigned int mode)
 {
struct mxs_spi_slave *mxs_slave;
-   uint32_t addr;
struct mxs_ssp_regs *ssp_regs;
int reg;
 
@@ -96,13 +95,11 @@ struct spi_slave *spi_setup_slave(unsigned int bus, 
unsigned int cs,
if (mxs_dma_init_channel(bus))
goto err_init;
 
-   addr = MXS_SSP0_BASE + (bus * MXS_SPI_PORT_OFFSET);
-
mxs_slave->slave.bus = bus;
mxs_slave->slave.cs = cs;
mxs_slave->max_khz = max_hz / 1000;
mxs_slave->mode = mode;
-   mxs_slave->regs = (struct mxs_ssp_regs *)addr;
+   mxs_slave->regs = mxs_ssp_regs_by_bus(bus);
ssp_regs = mxs_slave->regs;
 
reg = readl(&ssp_regs->hw_ssp_ctrl0);
-- 
1.7.10.4

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[U-Boot] [PATCH 07/18] mx23: ssp: Fix ssp-regs.h for MX23

2013-01-11 Thread Marek Vasut
Disable SSP2 and SSP3 ports on MX23.

Signed-off-by: Marek Vasut 
Signed-off-by: Otavio Salvador 
Cc: Fabio Estevam 
Cc: Stefano Babic 
---
 arch/arm/include/asm/arch-mxs/regs-ssp.h |2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/include/asm/arch-mxs/regs-ssp.h 
b/arch/arm/include/asm/arch-mxs/regs-ssp.h
index 4a75029..b97ac35 100644
--- a/arch/arm/include/asm/arch-mxs/regs-ssp.h
+++ b/arch/arm/include/asm/arch-mxs/regs-ssp.h
@@ -58,10 +58,12 @@ static inline struct mxs_ssp_regs 
*mxs_ssp_regs_by_bus(unsigned int port)
return (struct mxs_ssp_regs *)MXS_SSP0_BASE;
case 1:
return (struct mxs_ssp_regs *)MXS_SSP1_BASE;
+#ifdef CONFIG_MX28
case 2:
return (struct mxs_ssp_regs *)MXS_SSP2_BASE;
case 3:
return (struct mxs_ssp_regs *)MXS_SSP3_BASE;
+#endif
default:
return NULL;
}
-- 
1.7.10.4

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[U-Boot] [PATCH 08/18] mx23: Add support on print_cpuinfo()

2013-01-11 Thread Marek Vasut
From: Otavio Salvador 

Add information to identify i.MX23 chips and its known revisions.

Signed-off-by: Otavio Salvador 
Cc: Fabio Estevam 
Cc: Marek Vasut 
Cc: Stefano Babic 
---
 arch/arm/cpu/arm926ejs/mxs/mxs.c|   19 ++-
 arch/arm/include/asm/arch-mxs/regs-digctl.h |1 +
 2 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/mxs.c b/arch/arm/cpu/arm926ejs/mxs/mxs.c
index 6ce8019..a748623 100644
--- a/arch/arm/cpu/arm926ejs/mxs/mxs.c
+++ b/arch/arm/cpu/arm926ejs/mxs/mxs.c
@@ -1,5 +1,5 @@
 /*
- * Freescale i.MX28 common code
+ * Freescale i.MX23/i.MX28 common code
  *
  * Copyright (C) 2011 Marek Vasut 
  * on behalf of DENX Software Engineering GmbH
@@ -196,6 +196,8 @@ static const char *get_cpu_type(void)
(struct mxs_digctl_regs *)MXS_DIGCTL_BASE;
 
switch (readl(&digctl_regs->hw_digctl_chipid) & HW_DIGCTL_CHIPID_MASK) {
+   case HW_DIGCTL_CHIPID_MX23:
+   return "23";
case HW_DIGCTL_CHIPID_MX28:
return "28";
default:
@@ -210,6 +212,21 @@ static const char *get_cpu_rev(void)
uint8_t rev = readl(&digctl_regs->hw_digctl_chipid) & 0x00FF;
 
switch (readl(&digctl_regs->hw_digctl_chipid) & HW_DIGCTL_CHIPID_MASK) {
+   case HW_DIGCTL_CHIPID_MX23:
+   switch (rev) {
+   case 0x0:
+   return "1.0";
+   case 0x1:
+   return "1.1";
+   case 0x2:
+   return "1.2";
+   case 0x3:
+   return "1.3";
+   case 0x4:
+   return "1.4";
+   default:
+   return "??";
+   }
case HW_DIGCTL_CHIPID_MX28:
switch (rev) {
case 0x1:
diff --git a/arch/arm/include/asm/arch-mxs/regs-digctl.h 
b/arch/arm/include/asm/arch-mxs/regs-digctl.h
index e7cc4b4..d043325 100644
--- a/arch/arm/include/asm/arch-mxs/regs-digctl.h
+++ b/arch/arm/include/asm/arch-mxs/regs-digctl.h
@@ -154,6 +154,7 @@ struct mxs_digctl_regs {
 
 /* Product code identification */
 #define HW_DIGCTL_CHIPID_MASK  (0x << 16)
+#define HW_DIGCTL_CHIPID_MX23  (0x3780 << 16)
 #define HW_DIGCTL_CHIPID_MX28  (0x2800 << 16)
 
 #endif /* __MX28_REGS_DIGCTL_H__ */
-- 
1.7.10.4

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[U-Boot] [PATCH 11/18] mx23: SPL: Initialize DDR at 133MHz

2013-01-11 Thread Marek Vasut
From: Otavio Salvador 

Signed-off-by: Otavio Salvador 
Cc: Fabio Estevam 
Cc: Marek Vasut 
Cc: Stefano Babic 
---
 arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c |   20 
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c 
b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index 401c513..9d05f83 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -83,6 +83,22 @@ static uint32_t dram_vals[] = {
0x06120612, 0x04320432, 0x04320432, 0x00040004,
0x00040004, 0x, 0x, 0x,
0x, 0x00010001
+
+/*
+ * i.MX23 DDR at 133MHz
+ */
+#elif defined(CONFIG_MX23)
+   0x01010001, 0x00010100, 0x01000101, 0x0001,
+   0x0101, 0x, 0x0001, 0x0101,
+   0x, 0x0001, 0x07000200, 0x00070202,
+   0x0202, 0x04040a01, 0x0201, 0x0204,
+   0x0200, 0x19000f08, 0x0d0d, 0x02021313,
+   0x02061521, 0x000a, 0x00080008, 0x00200020,
+   0x00200020, 0x00200020, 0x03f7, 0x,
+   0x, 0x0020, 0x0020, 0x00c8,
+   0x000a23cd, 0x00c8, 0x6665, 0x,
+   0x0101, 0x00040001, 0x, 0x,
+   0x0001
 #else
 #error Unsupported memory initialization
 #endif
@@ -102,6 +118,10 @@ static void initialize_dram_values(void)
 
for (i = 0; i < ARRAY_SIZE(dram_vals); i++)
writel(dram_vals[i], MXS_DRAM_BASE + (4 * i));
+
+#ifdef CONFIG_MX23
+   writel((1 << 24), MXS_DRAM_BASE + (4 * 8));
+#endif
 }
 
 static void mxs_mem_init_clock(void)
-- 
1.7.10.4

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[U-Boot] [PATCH 18/18] mxs: Fix the memory init for MX23

2013-01-11 Thread Marek Vasut
From: Otavio Salvador 

The memory init is slightly different on MX23, thus split the memory
init for mx23 and mx28 into different functions.

Signed-off-by: Marek Vasut 
Signed-off-by: Otavio Salvador 
Cc: Fabio Estevam 
Cc: Stefano Babic 
---
 arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c |   93 -
 1 file changed, 78 insertions(+), 15 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c 
b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
index 9d05f83..5944dd2 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
@@ -128,13 +128,20 @@ static void mxs_mem_init_clock(void)
 {
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
+#if defined(CONFIG_MX23)
+   /* Fractional divider for ref_emi is 33 ; 480 * 18 / 33 = 266MHz */
+   const unsigned char divider = 33;
+#elif defined(CONFIG_MX28)
+   /* Fractional divider for ref_emi is 21 ; 480 * 18 / 21 = 411MHz */
+   const unsigned char divider = 21;
+#endif
 
/* Gate EMI clock */
writeb(CLKCTRL_FRAC_CLKGATE,
&clkctrl_regs->hw_clkctrl_frac0_set[CLKCTRL_FRAC0_EMI]);
 
-   /* Set fractional divider for ref_emi to 480 * 18 / 21 = 411MHz */
-   writeb(CLKCTRL_FRAC_CLKGATE | (21 & CLKCTRL_FRAC_FRAC_MASK),
+   /* Set fractional divider for ref_emi */
+   writeb(CLKCTRL_FRAC_CLKGATE | (divider & CLKCTRL_FRAC_FRAC_MASK),
&clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_EMI]);
 
/* Ungate EMI clock */
@@ -217,10 +224,60 @@ uint32_t mxs_mem_get_size(void)
return sz;
 }
 
-void mxs_mem_init(void)
+#ifdef CONFIG_MX23
+static void mx23_mem_setup_vddmem(void)
+{
+   struct mxs_power_regs *power_regs =
+   (struct mxs_power_regs *)MXS_POWER_BASE;
+
+   writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) |
+   POWER_VDDMEMCTRL_ENABLE_ILIMIT |
+   POWER_VDDMEMCTRL_ENABLE_LINREG |
+   POWER_VDDMEMCTRL_PULLDOWN_ACTIVE,
+   &power_regs->hw_power_vddmemctrl);
+
+   early_delay(1);
+
+   writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) |
+   POWER_VDDMEMCTRL_ENABLE_LINREG,
+   &power_regs->hw_power_vddmemctrl);
+}
+
+static void mx23_mem_init(void)
+{
+   mx23_mem_setup_vddmem();
+
+   /*
+* Configure the DRAM registers
+*/
+
+   /* Clear START and SREFRESH bit from DRAM_CTL8 */
+   clrbits_le32(MXS_DRAM_BASE + 0x20, (1 << 16) | (1 << 8));
+
+   initialize_dram_values();
+
+   /* Set START bit in DRAM_CTL16 */
+   setbits_le32(MXS_DRAM_BASE + 0x20, 1 << 16);
+
+   clrbits_le32(MXS_DRAM_BASE + 0x40, 1 << 17);
+   early_delay(2);
+
+   /* Adjust EMI port priority. */
+   clrsetbits_le32(0x8002, 0x1f << 16, 0x8);
+   early_delay(2);
+
+   setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 19);
+   setbits_le32(MXS_DRAM_BASE + 0x40, 1 << 11);
+
+   /* Wait for bit 10 (DRAM init complete) in DRAM_CTL18 */
+   while (!(readl(MXS_DRAM_BASE + 0x48) & (1 << 10)))
+   ;
+}
+#endif
+
+#ifdef CONFIG_MX28
+static void mx28_mem_init(void)
 {
-   struct mxs_clkctrl_regs *clkctrl_regs =
-   (struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
struct mxs_pinctrl_regs *pinctrl_regs =
(struct mxs_pinctrl_regs *)MXS_PINCTRL_BASE;
 
@@ -228,16 +285,6 @@ void mxs_mem_init(void)
writel(PINCTRL_EMI_DS_CTRL_DDR_MODE_DDR2,
&pinctrl_regs->hw_pinctrl_emi_ds_ctrl_set);
 
-   /* Power up PLL0 */
-   writel(CLKCTRL_PLL0CTRL0_POWER,
-   &clkctrl_regs->hw_clkctrl_pll0ctrl0_set);
-
-   early_delay(11000);
-
-   mxs_mem_init_clock();
-
-   mxs_mem_setup_vdda();
-
/*
 * Configure the DRAM registers
 */
@@ -256,6 +303,22 @@ void mxs_mem_init(void)
/* Wait for bit 20 (DRAM init complete) in DRAM_CTL58 */
while (!(readl(MXS_DRAM_BASE + 0xe8) & (1 << 20)))
;
+}
+#endif
+
+void mxs_mem_init(void)
+{
+   early_delay(11000);
+
+   mxs_mem_init_clock();
+
+   mxs_mem_setup_vdda();
+
+#if defined(CONFIG_MX23)
+   mx23_mem_init();
+#elif defined(CONFIG_MX28)
+   mx28_mem_init();
+#endif
 
early_delay(1);
 
-- 
1.7.10.4

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[U-Boot] [PATCH 09/18] mx23: Add boot mode description

2013-01-11 Thread Marek Vasut
From: Otavio Salvador 

Signed-off-by: Otavio Salvador 
Cc: Fabio Estevam 
Cc: Otavio Salvador 
Cc: Stefano Babic 
---
 arch/arm/include/asm/arch-mxs/sys_proto.h |   12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/include/asm/arch-mxs/sys_proto.h 
b/arch/arm/include/asm/arch-mxs/sys_proto.h
index a4290d8..8aaf196 100644
--- a/arch/arm/include/asm/arch-mxs/sys_proto.h
+++ b/arch/arm/include/asm/arch-mxs/sys_proto.h
@@ -52,6 +52,17 @@ struct mxs_pair {
 };
 
 static const struct mxs_pair mxs_boot_modes[] = {
+#if defined(CONFIG_MX23)
+   { 0x00, 0x0f, "USB" },
+   { 0x01, 0x1f, "I2C, master" },
+   { 0x02, 0x1f, "SSP SPI #1, master, NOR" },
+   { 0x03, 0x1f, "SSP SPI #2, master, NOR" },
+   { 0x04, 0x1f, "NAND" },
+   { 0x08, 0x1f, "SSP SPI #3, master, EEPROM" },
+   { 0x09, 0x1f, "SSP SD/MMC #0" },
+   { 0x0a, 0x1f, "SSP SD/MMC #1" },
+   { 0x00, 0x00, "Reserved/Unknown/Wrong" },
+#elif defined(CONFIG_MX28)
{ 0x00, 0x0f, "USB #0" },
{ 0x01, 0x1f, "I2C #0, master, 3V3" },
{ 0x11, 0x1f, "I2C #0, master, 1V8" },
@@ -68,6 +79,7 @@ static const struct mxs_pair mxs_boot_modes[] = {
{ 0x0a, 0x1f, "SSP SD/MMC #1, 3V3" },
{ 0x1a, 0x1f, "SSP SD/MMC #1, 1V8" },
{ 0x00, 0x00, "Reserved/Unknown/Wrong" },
+#endif
 };
 
 struct mxs_spl_data {
-- 
1.7.10.4

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[U-Boot] [PATCH 13/18] mx23: config: Enable mxsboot tool for i.MX23 based boards

2013-01-11 Thread Marek Vasut
From: Otavio Salvador 

Signed-off-by: Otavio Salvador 
Cc: Fabio Estevam 
Cc: Marek Vasut 
Cc: Stefano Babic 
---
 tools/Makefile |2 ++
 1 file changed, 2 insertions(+)

diff --git a/tools/Makefile b/tools/Makefile
index 686840a..c5952fc 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -69,6 +69,7 @@ BIN_FILES-$(CONFIG_XWAY_SWAP_BYTES) += xway-swap-bytes$(SFX)
 BIN_FILES-y += mkenvimage$(SFX)
 BIN_FILES-y += mkimage$(SFX)
 BIN_FILES-$(CONFIG_SMDK5250) += mksmdk5250spl$(SFX)
+BIN_FILES-$(CONFIG_MX23) += mxsboot$(SFX)
 BIN_FILES-$(CONFIG_MX28) += mxsboot$(SFX)
 BIN_FILES-$(CONFIG_NETCONSOLE) += ncb$(SFX)
 BIN_FILES-$(CONFIG_SHA1_CHECK_UB_IMG) += ubsha1$(SFX)
@@ -98,6 +99,7 @@ NOPED_OBJ_FILES-y += omapimage.o
 NOPED_OBJ_FILES-y += mkenvimage.o
 NOPED_OBJ_FILES-y += mkimage.o
 OBJ_FILES-$(CONFIG_SMDK5250) += mkexynosspl.o
+OBJ_FILES-$(CONFIG_MX23) += mxsboot.o
 OBJ_FILES-$(CONFIG_MX28) += mxsboot.o
 OBJ_FILES-$(CONFIG_NETCONSOLE) += ncb.o
 NOPED_OBJ_FILES-y += os_support.o
-- 
1.7.10.4

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[U-Boot] [PATCH 12/18] mx23: config: Enable building of u-boot.sb binary

2013-01-11 Thread Marek Vasut
From: Otavio Salvador 

For i.MX23 we need to pass imx23 as elftosb param.

Signed-off-by: Otavio Salvador 
Cc: Fabio Estevam 
Cc: Marek Vasut 
Cc: Stefano Babic 
---
 Makefile   |1 +
 arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd |   18 ++
 2 files changed, 19 insertions(+)
 create mode 100644 arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd

diff --git a/Makefile b/Makefile
index a7b6cd1..af6baa4 100644
--- a/Makefile
+++ b/Makefile
@@ -508,6 +508,7 @@ $(obj)u-boot.ais:   $(obj)spl/u-boot-spl.bin 
$(obj)u-boot.img
$(obj)u-boot.ais
 
 # Specify the target for use in elftosb call
+ELFTOSB_TARGET-$(CONFIG_MX23) = imx23
 ELFTOSB_TARGET-$(CONFIG_MX28) = imx28
 
 $(obj)u-boot.sb:   $(obj)u-boot.bin $(obj)spl/u-boot-spl.bin
diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd 
b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd
new file mode 100644
index 000..3a51879
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-imx23.bd
@@ -0,0 +1,18 @@
+options {
+   driveTag = 0x00;
+   flags = 0x01;
+}
+
+sources {
+   u_boot_spl="spl/u-boot-spl.bin";
+   u_boot="u-boot.bin";
+}
+
+section (0) {
+   load u_boot_spl > 0x;
+   load ivt (entry = 0x0014) > 0x8000;
+   call 0x8000;
+
+   load u_boot > 0x4100;
+   call 0x4100;
+}
-- 
1.7.10.4

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[U-Boot] [PATCH 15/18] mxs: Add MX23 quirks into the clock code

2013-01-11 Thread Marek Vasut
From: Otavio Salvador 

The MX23 has different handling of the SSP clock and GPMI NAND clock sources,
add necessary quirks into the clock code to properly handle these.

Signed-off-by: Marek Vasut 
Signed-off-by: Otavio Salvador 
Cc: Fabio Estevam 
Cc: Stefano Babic 
---
 arch/arm/cpu/arm926ejs/mxs/clock.c|   44 +
 arch/arm/include/asm/arch-mxs/clock.h |8 --
 2 files changed, 40 insertions(+), 12 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/mxs/clock.c 
b/arch/arm/cpu/arm926ejs/mxs/clock.c
index b7cf98f..2df7ec6 100644
--- a/arch/arm/cpu/arm926ejs/mxs/clock.c
+++ b/arch/arm/cpu/arm926ejs/mxs/clock.c
@@ -1,5 +1,5 @@
 /*
- * Freescale i.MX28 clock setup code
+ * Freescale i.MX23/i.MX28 clock setup code
  *
  * Copyright (C) 2011 Marek Vasut 
  * on behalf of DENX Software Engineering GmbH
@@ -32,15 +32,24 @@
 #include 
 #include 
 
-/* The PLL frequency is always 480MHz, see section 10.2 in iMX28 datasheet. */
+/*
+ * The PLL frequency is 480MHz and XTAL frequency is 24MHz
+ *   iMX23: datasheet section 4.2
+ *   iMX28: datasheet section 10.2
+ */
 #definePLL_FREQ_KHZ48
 #definePLL_FREQ_COEF   18
-/* The XTAL frequency is always 24MHz, see section 10.2 in iMX28 datasheet. */
 #defineXTAL_FREQ_KHZ   24000
 
 #definePLL_FREQ_MHZ(PLL_FREQ_KHZ / 1000)
 #defineXTAL_FREQ_MHZ   (XTAL_FREQ_KHZ / 1000)
 
+#if defined(CONFIG_MX23)
+#define MXC_SSPCLK_MAX MXC_SSPCLK0
+#elif defined(CONFIG_MX28)
+#define MXC_SSPCLK_MAX MXC_SSPCLK3
+#endif
+
 static uint32_t mxs_get_pclk(void)
 {
struct mxs_clkctrl_regs *clkctrl_regs =
@@ -120,10 +129,17 @@ static uint32_t mxs_get_gpmiclk(void)
 {
struct mxs_clkctrl_regs *clkctrl_regs =
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
-
+#if defined(CONFIG_MX23)
+   uint8_t *reg =
+   &clkctrl_regs->hw_clkctrl_frac0[CLKCTRL_FRAC0_CPU];
+#elif defined(CONFIG_MX28)
+   uint8_t *reg =
+   &clkctrl_regs->hw_clkctrl_frac1[CLKCTRL_FRAC1_GPMI];
+#endif
uint32_t clkctrl, clkseq, div;
uint8_t clkfrac, frac;
 
+
clkseq = readl(&clkctrl_regs->hw_clkctrl_clkseq);
clkctrl = readl(&clkctrl_regs->hw_clkctrl_gpmi);
 
@@ -134,7 +150,7 @@ static uint32_t mxs_get_gpmiclk(void)
}
 
/* REF Path */
-   clkfrac = readb(&clkctrl_regs->hw_clkctrl_frac1[CLKCTRL_FRAC1_GPMI]);
+   clkfrac = readb(reg);
frac = clkfrac & CLKCTRL_FRAC_FRAC_MASK;
div = clkctrl & CLKCTRL_GPMI_DIV_MASK;
return (PLL_FREQ_MHZ * PLL_FREQ_COEF / frac) / div;
@@ -203,7 +219,7 @@ void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, 
int xtal)
(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
uint32_t clk, clkreg;
 
-   if (ssp > MXC_SSPCLK3)
+   if (ssp > MXC_SSPCLK_MAX)
return;
 
clkreg = (uint32_t)(&clkctrl_regs->hw_clkctrl_ssp0) +
@@ -248,7 +264,7 @@ static uint32_t mxs_get_sspclk(enum mxs_sspclock ssp)
uint32_t clkreg;
uint32_t clk, tmp;
 
-   if (ssp > MXC_SSPCLK3)
+   if (ssp > MXC_SSPCLK_MAX)
return 0;
 
tmp = readl(&clkctrl_regs->hw_clkctrl_clkseq);
@@ -273,8 +289,14 @@ static uint32_t mxs_get_sspclk(enum mxs_sspclock ssp)
  */
 void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq)
 {
+#if defined(CONFIG_MX23)
+   const unsigned int clkbus = 0;
+#elif defined(CONFIG_MX28)
+   const unsigned int clkbus = bus;
+#endif
+
struct mxs_ssp_regs *ssp_regs;
-   const uint32_t sspclk = mxs_get_sspclk(bus);
+   const uint32_t sspclk = mxs_get_sspclk(clkbus);
uint32_t reg;
uint32_t divide, rate, tgtclk;
 
@@ -325,16 +347,18 @@ uint32_t mxc_get_clock(enum mxc_clock clk)
return mxs_get_ioclk(MXC_IOCLK0);
case MXC_IO1_CLK:
return mxs_get_ioclk(MXC_IOCLK1);
+   case MXC_XTAL_CLK:
+   return XTAL_FREQ_KHZ * 1000;
case MXC_SSP0_CLK:
return mxs_get_sspclk(MXC_SSPCLK0);
+#ifdef CONFIG_MX28
case MXC_SSP1_CLK:
return mxs_get_sspclk(MXC_SSPCLK1);
case MXC_SSP2_CLK:
return mxs_get_sspclk(MXC_SSPCLK2);
case MXC_SSP3_CLK:
return mxs_get_sspclk(MXC_SSPCLK3);
-   case MXC_XTAL_CLK:
-   return XTAL_FREQ_KHZ * 1000;
+#endif
}
 
return 0;
diff --git a/arch/arm/include/asm/arch-mxs/clock.h 
b/arch/arm/include/asm/arch-mxs/clock.h
index d3927c7..3f7d3f0 100644
--- a/arch/arm/include/asm/arch-mxs/clock.h
+++ b/arch/arm/include/asm/arch-mxs/clock.h
@@ -1,5 +1,5 @@
 /*
- * Freescale i.MX28 Clock
+ * Freescale i.MX23/i.MX28 Clock
  *
  * Copyright (C) 2011 Marek Vasut 
  * on behalf of DENX Software Engineering GmbH
@@ -31,11 +31,13 @@ enum mxc_clock {
MXC_GPMI_CLK,
MXC_IO0_CLK,
MXC_IO1_CLK,
+   MXC_XTAL_CLK,
MXC_SSP0_CLK,
+#ifdef CONFIG_MX28
MXC_SSP1_CLK,
M

[U-Boot] [PATCH 17/18] mxs: Add function to ungate the power block on MX23

2013-01-11 Thread Marek Vasut
The power block on MX23 must first be ungated before it can be operated.
Add function to MXS power init that ungates it.

Signed-off-by: Marek Vasut 
Cc: Fabio Estevam 
Cc: Otavio Salvador 
Cc: Stefano Babic 
---
 arch/arm/cpu/arm926ejs/mxs/spl_power_init.c |   12 
 1 file changed, 12 insertions(+)

diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c 
b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
index be44c22..e9d6302 100644
--- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
+++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
@@ -881,11 +881,23 @@ static void mxs_setup_batt_detect(void)
early_delay(10);
 }
 
+static void mxs_ungate_power(void)
+{
+#ifdef CONFIG_MX23
+   struct mxs_power_regs *power_regs =
+   (struct mxs_power_regs *)MXS_POWER_BASE;
+
+   writel(POWER_CTRL_CLKGATE, &power_regs->hw_power_ctrl_clr);
+#endif
+}
+
 void mxs_power_init(void)
 {
struct mxs_power_regs *power_regs =
(struct mxs_power_regs *)MXS_POWER_BASE;
 
+   mxs_ungate_power();
+
mxs_power_clock2xtal();
mxs_power_clear_auto_restart();
mxs_power_set_linreg();
-- 
1.7.10.4

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[U-Boot] [PATCH 16/18] mxs: Add MX23 olinuxino board support

2013-01-11 Thread Marek Vasut
This patch adds support for MX23-based Olinuxino board.

Signed-off-by: Marek Vasut 
Cc: Fabio Estevam 
Cc: Otavio Salvador 
Cc: Stefano Babic 
---
 board/olimex/mx23_olinuxino/Makefile |   47 +
 board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++
 board/olimex/mx23_olinuxino/spl_boot.c   |   90 +
 boards.cfg   |1 +
 include/configs/mx23_olinuxino.h |  136 ++
 5 files changed, 325 insertions(+)
 create mode 100644 board/olimex/mx23_olinuxino/Makefile
 create mode 100644 board/olimex/mx23_olinuxino/mx23_olinuxino.c
 create mode 100644 board/olimex/mx23_olinuxino/spl_boot.c
 create mode 100644 include/configs/mx23_olinuxino.h

diff --git a/board/olimex/mx23_olinuxino/Makefile 
b/board/olimex/mx23_olinuxino/Makefile
new file mode 100644
index 000..ff41cff
--- /dev/null
+++ b/board/olimex/mx23_olinuxino/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+ifndef CONFIG_SPL_BUILD
+COBJS  := mx23_olinuxino.o
+else
+COBJS  := spl_boot.o
+endif
+
+SRCS   := $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/olimex/mx23_olinuxino/mx23_olinuxino.c 
b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
new file mode 100644
index 000..2fcad26
--- /dev/null
+++ b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
@@ -0,0 +1,51 @@
+/*
+ * Olimex MX23 Olinuxino board
+ *
+ * Copyright (C) 2013 Marek Vasut 
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Functions
+ */
+int board_early_init_f(void)
+{
+   /* SSP clock init will come here soon. */
+   return 0;
+}
+
+int dram_init(void)
+{
+   return mxs_dram_init();
+}
+
+int board_init(void)
+{
+   /* Adress of boot parameters */
+   gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+   return 0;
+}
diff --git a/board/olimex/mx23_olinuxino/spl_boot.c 
b/board/olimex/mx23_olinuxino/spl_boot.c
new file mode 100644
index 000..aaebe6c
--- /dev/null
+++ b/board/olimex/mx23_olinuxino/spl_boot.c
@@ -0,0 +1,90 @@
+/*
+ * Olimex MX23 Olinuxino Boot setup
+ *
+ * Copyright (C) 2013 Marek Vasut 
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Bos

Re: [U-Boot] [PATCH V4 5/9] EXYNOS5: DWMMC: API to set mmc clock divisor

2013-01-11 Thread Amarendra Reddy
Hi Jaehoon / Simon,

Thanks for review comments.
Please find my responses below.

Thanks & Regards
Amarendra Reddy

On 11 January 2013 09:22, Jaehoon Chung  wrote:

>  On 01/11/2013 12:35 AM, Simon Glass wrote:
> > Hi Amar,
> >
> > On Fri, Jan 4, 2013 at 1:34 AM, Amar  wrote:
> >> This API computes the divisor value based on MPLL clock and
> >> writes it into the FSYS1 register.
> >>
> >> Changes from V1:
> >> 1)Updated the function exynos5_mmc_set_clk_div() to receive
> >> 'device_i'd as input parameter instead of 'index'.
> >>
> >> Changes from V2:
> >> 1)Updation of commit message and resubmition of proper patch
> set.
> >>
> >> Changes from V3:
> >> 1)Removed the new API exynos5_mmc_set_clk_div() from clock.c,
> >> because existing API set_mmc_clk() can be used to set mmc clock.
> >>
> >> Signed-off-by: Amar 
> >> ---
> >>  arch/arm/cpu/armv7/exynos/clock.c  | 4 ++--
> >>  arch/arm/include/asm/arch-exynos/clk.h | 3 +++
> >>  2 files changed, 5 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/arch/arm/cpu/armv7/exynos/clock.c
> b/arch/arm/cpu/armv7/exynos/clock.c
> >> index 973b84e..89574ba 100644
> >> --- a/arch/arm/cpu/armv7/exynos/clock.c
> >> +++ b/arch/arm/cpu/armv7/exynos/clock.c
> >> @@ -490,7 +490,7 @@ static unsigned long exynos4_get_mmc_clk(int
> dev_index)
> >> (struct exynos4_clock *)samsung_get_base_clock();
> >> unsigned long uclk, sclk;
> >> unsigned int sel, ratio, pre_ratio;
> >> -   int shift;
> >> +   int shift = 0;
> >
> > Is this fixing a warning?
> Maybe..fix the compiler warning..
>

As 'shift' was uninitialised, it had garbage value which was causing a
problem when "dev_index = 0 or 2".

> >
> >>
> >> sel = readl(&clk->src_fsys);
> >> sel = (sel >> (dev_index << 2)) & 0xf;
> >> @@ -539,7 +539,7 @@ static unsigned long exynos5_get_mmc_clk(int
> dev_index)
> >> (struct exynos5_clock *)samsung_get_base_clock();
> >> unsigned long uclk, sclk;
> >> unsigned int sel, ratio, pre_ratio;
> >> -   int shift;
> >> +   int shift = 0;
> >>
> >> sel = readl(&clk->src_fsys);
> >> sel = (sel >> (dev_index << 2)) & 0xf;
> >> diff --git a/arch/arm/include/asm/arch-exynos/clk.h
> b/arch/arm/include/asm/arch-exynos/clk.h
> >> index 1935b0b..a4d5b4e 100644
> >> --- a/arch/arm/include/asm/arch-exynos/clk.h
> >> +++ b/arch/arm/include/asm/arch-exynos/clk.h
> >> @@ -29,6 +29,9 @@
> >>  #define VPLL   4
> >>  #define BPLL   5
> >>
> >> +#define FSYS1_MMC0_DIV_MASK0xff0f
> >> +#define FSYS1_MMC0_DIV_VAL 0x0701
> >
> > What is this used for? I don't see it in this patch.
> >
> > Overall it is not clear what this patch is for.
> This define didn't need. That value is not static value, isn't?
>
In fact, V2 of this patch had a new function (which I added). That new
function was using the #define values.
But later in V4 the new function has been removed.

As of now the #define values are used in the file
board/samsung/smdk5250/clock_init.c.
 The values are used during "booting from EMMC".


> Best Regards,
> Jaehoon Chung
>  >
> >> +
> >>  unsigned long get_pll_clk(int pllreg);
> >>  unsigned long get_arm_clk(void);
> >>  unsigned long get_i2c_clk(void);
> >> --
> >> 1.8.0
> >>
> >
> > Regards,
> > Simon
> >
>
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Re: [U-Boot] BDI3000 - Unprotect flash sectors

2013-01-11 Thread Marek Vasut
Dear Waibel Georg,

CCing Wolfgang, he's the expert on both IMO.

> Hello,
> 
> i'm not sure if this is the right place for this question...however, here
> it is:
> 
> i'm using a BDI3000 to program uboot to the flash (Spansion S29GL512P) on a 
MPC5200B base board. Erasing / Programming works fine as long as the flash 
sectors are not protected (via PPB bit). On a protected sector the erase 
command 
fails (what makes sense). I thought I can use the unlock command to unprotect 
the sectors, but this command seems not to work:
> > unlock 0xfff0 1000
> 
> Unlocking flash at 0xfff0
> # Invalid parameter for flash programming
> 
> Any ideas what I'm doing wrong?
> 
> Flash configuration:
> [FLASH]
> CHIPTYPEMIRRORX16
> CHIPSIZE0x0400
> BUSWIDTH16
> WORKSPACE   0x
> 
> Regards
> Georg Waibel

Best regards,
Marek Vasut
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Re: [U-Boot] [STATUS] v2013.01-rc3 out

2013-01-11 Thread Marek Vasut
Dear Tom Rini,

> Hey all,
> 
> As a reminder, we're scheduled for v2013.01 on the 15th.  I've pushed
> out v2013.01-rc3 now.  I still expect:
> - At least one more u-boot-arm PR
> - Any other outstand bug fixes
> 
> I saw there was a request for an m68k change to come in from a
> developer, Jason can you review and pass along please?  It is assigned
> to you in patchwork.  And I suspect there's a few more bugfixes out
> there we need to handle (I know of 2 different one for IGEP boards).
> 
> Please remind me here if there's something else that needs reviewing and
> going in, thanks!

There's still the bug in vfat code.

Message-ID: <50eccde1.2020...@cavium.com>

Best regards,
Marek Vasut
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[U-Boot] [PATCH] vfat: Fix mkcksum argument sizes

2013-01-11 Thread Marek Vasut
In case a function argument is known/fixed size array in C, the argument is
still decoyed as pointer instead ( T f(U n[k]) ~= T fn(U *n) ) and therefore
calling sizeof on the function argument will result in the size of the pointer,
not the size of the array.

The VFAT code contains such a bug, this patch fixes it.

Reported-by: Aaron Williams 
Signed-off-by: Marek Vasut 
Cc: Tom Rini 
Cc: Aaron Williams 
---
 fs/fat/fat.c |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index 393c378..25d3318 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -569,9 +569,9 @@ static __u8 mkcksum(const char name[8], const char ext[3])
 
__u8 ret = 0;
 
-   for (i = 0; i < sizeof(name); i++)
+   for (i = 0; i < 8; i++)
ret = (((ret & 1) << 7) | ((ret & 0xfe) >> 1)) + name[i];
-   for (i = 0; i < sizeof(ext); i++)
+   for (i = 0; i < 3; i++)
ret = (((ret & 1) << 7) | ((ret & 0xfe) >> 1)) + ext[i];
 
return ret;
-- 
1.7.10.4

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Re: [U-Boot] [PATCH V4 9/9] COMMON: MMC: Command to support EMMC booting and to

2013-01-11 Thread Amarendra Reddy
Hi Simon / Jaehoon,

Please find my responses below.

Thanks & Regards
Amarendra reddy

On 11 January 2013 11:11, Simon Glass  wrote:

> HI Jaehoon,
>
> On Thu, Jan 10, 2013 at 7:54 PM, Jaehoon Chung 
> wrote:
> > On 01/11/2013 01:46 AM, Simon Glass wrote:
> >> Hi Amar,
> >>
> >> On Fri, Jan 4, 2013 at 1:34 AM, Amar  wrote:
> >>> This patch adds commands to open, close and resize boot partitions on
> EMMC.
> >>>
> >>> Changes from V1:
> >>> 1)Combined the common piece of code between 'open' and 'close'
> >>> operations.
> >>>
> >>> Changes from V2:
> >>> 1)Updation of commit message and resubmition of proper patch
> set.
> >>>
> >>> Changes from V3:
> >>> No change.
> >>>
> >>> Signed-off-by: Amar 
> >>> ---
> >>>  common/cmd_mmc.c | 84
> +++-
> >>>  1 file changed, 83 insertions(+), 1 deletion(-)
> >>>
> >>> diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
> >>> index 7dacd51..1dabb5b 100644
> >>> --- a/common/cmd_mmc.c
> >>> +++ b/common/cmd_mmc.c
> >>> @@ -248,6 +248,84 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag,
> int argc, char * const argv[])
> >>> curr_device, mmc->part_num);
> >>>
> >>> return 0;
> >>> +   } else if ((strcmp(argv[1], "open") == 0) ||
> >>> +   (strcmp(argv[1], "close") == 0)) {
> >>
> >> How about putting this block in its own function?
>

Ok. Shall put the entire block in a new function.

>  >>
> >>> +   int dev;
> >>> +   struct mmc *mmc;
> >>> +
> >>> +   if (argc == 2)
> >>> +   dev = curr_device;
> >>> +   else if (argc == 3)
> >>> +   dev = simple_strtoul(argv[2], NULL, 10);
> >>> +   else
> >>> +   return CMD_RET_USAGE;
> >>> +
> >>> +   mmc = find_mmc_device(dev);
> >>> +   if (!mmc) {
> >>> +   printf("no mmc device at slot %x\n", dev);
> >>> +   return 1;
> >>> +   }
> >>> +
> >>> +   if (IS_SD(mmc)) {
> >>> +   printf("SD device cannot be opened/closed\n");
> >>> +   return 1;
> >>> +   }
> >>> +
> >>> +   if (strcmp(argv[1], "open") == 0) {
> >>> +   if (!(mmc_boot_open(mmc))) {
> >>> +   printf("EMMC OPEN Success.\n");
> >>> +   printf("\t\t\t!!!Notice!!!\n");
> >>> +   printf("!You must close EMMC"
> >>> +   " boot Partition after all"
> >>> +   " images are written\n");
> >>
> >> Do you need to split these strings so much? Perhaps when it is in a
> >> function the indenting will be less?
>
Ok.

>  >>
> >>> +   printf("!EMMC boot partition"
> >>> +   " has continuity at"
> >>> +   " image writing time.\n");
> >>> +   printf("!So, Do not close boot"
> >>> +   " partition, Before, all"
> >>> +   " images are written.\n");
> >>> +   return 0;
> >>> +   } else {
> >>> +   printf("EMMC OPEN Failed.\n");
> >>> +   return 1;
> >>
> >> You could put this above the other block and reduce indenting:
> >>
> >> if (mmc_boot_open(mmc)) {
> >>printf("EMMC OPEN Failed.\n");
> >>return 1;
> >> }
> >> ...code continues
> >>
>
Ok.

>  >>> +   }
> >>> +   }
> >>> +
> >>> +   if (strcmp(argv[1], "close") == 0) {
> >>> +   if (!(mmc_boot_close(mmc))) {
> >>> +   printf("EMMC CLOSE Success.\n");
> >>
> >> Shouldn't print a message on success
> >>
>
Ok. shall remove the print message in success case.

>>> +   return 0;
>>> +   } else {
>>> +   printf("EMMC CLOSE Failed.\n");
>>> +   return 1;
>>> +   }
>>> +   }
>>> +   } else if (strcmp(argv[1], "bootpart") == 0) {
>>> +   int dev;
>>> +   dev = simple_strtoul(argv[2], NULL, 10);
>>> +
>>> +   u32 bootsize = simple_strtoul(argv[3], NULL, 10);
>>> +   u32 rpmbsize = simple_strtoul(argv[4], NULL, 10);
>>> +   struct mmc *mmc = find_mmc_device(dev);
>>> +   if (!mmc) {
>>> +   printf("no mmc device at slot %x\n", dev);
>>> +   return 1;
>>> +   }
>>> +
>>> +   if (IS_SD(mmc)) {
>>> +   printf("It is n

Re: [U-Boot] [PATCH 2/4 V2] SMDK5250: Convert lowlevel_init.S to lowlevel_init.c

2013-01-11 Thread Simon Glass
Hi Rajeshwari,

On Fri, Jan 11, 2013 at 2:43 AM, Rajeshwari Birje
 wrote:
> Hi Simon,
>
> Thank you for comments.
>
> On Thu, Jan 10, 2013 at 11:04 PM, Simon Glass  wrote:
>> Hi Rajeshwari,
>>
>> On Mon, Jan 7, 2013 at 5:08 AM, Rajeshwari Shinde
>>  wrote:
>>> This patch converts lowlevel_init.S to lowlevel_init_c.c for
>>> SMDK5250.
>>> Lowlevel.S as of now added only for SMDK5250 and same can be
>>> extended to other SOC in future.
>>
>> Should perhaps also mention new feature (controllable memory reset for 
>> resume?)
> -OK
>>
>>>
>>> Signed-off-by: Rajeshwari Shinde 
>>> ---
>>> Changes in V2:
>>> - Renamed lowlevel_init.S to lowlevel.S and moved to
>>> arch/arm/cpu/armv7/exynos/
>>> - Moved power mode defines to power.h
>>> - Added early serial support.
>>> - Renamed mem_reset to reset.
>>>  arch/arm/cpu/armv7/exynos/Makefile   |6 ++
>>>  arch/arm/cpu/armv7/exynos/lowlevel.S |   35 
>>>  arch/arm/include/asm/arch-exynos/power.h |8 ++
>>>  board/samsung/smdk5250/Makefile  |2 +-
>>>  board/samsung/smdk5250/dmc_common.c  |4 +-
>>>  board/samsung/smdk5250/dmc_init_ddr3.c   |6 +-
>>>  board/samsung/smdk5250/lowlevel_init.S   |   96 
>>>  board/samsung/smdk5250/lowlevel_init.c   |   81 +
>>
>> Any change we could move all of this to arch/arm/cpu/armv7/exynos...?
> We do not have a separate directory for exynos5 and exynos4 and if we
> add all these files in arch/arm/cpu/armv7/exynos it would break the
> compilation for EXYNOS4. Also Later versions of exynos5 have different
> memory and timing variants.

OK, but is this something you intend to fix, perhaps in a future
series? It seems like you need separate directories sooner rather than
later.I don't think this is board-specific code, but chip-specific.

>>
>> It really doesn't relate to this board alone, but to the chip.
>>
>>>  board/samsung/smdk5250/setup.h   |   19 -
>>>  board/samsung/smdk5250/spl_boot.c|  140 
>>> +++--
>>>  spl/Makefile |4 +
>>>  11 files changed, 288 insertions(+), 113 deletions(-)
>>>  create mode 100644 arch/arm/cpu/armv7/exynos/lowlevel.S
>>>  delete mode 100644 board/samsung/smdk5250/lowlevel_init.S
>>>  create mode 100644 board/samsung/smdk5250/lowlevel_init.c
>>>
>>> diff --git a/arch/arm/cpu/armv7/exynos/Makefile 
>>> b/arch/arm/cpu/armv7/exynos/Makefile
>>> index 9119961..2aa2722 100644
>>> --- a/arch/arm/cpu/armv7/exynos/Makefile
>>> +++ b/arch/arm/cpu/armv7/exynos/Makefile
>>> @@ -22,6 +22,12 @@ include $(TOPDIR)/config.mk
>>>
>>>  LIB= $(obj)lib$(SOC).o
>>>
>>> +ifdef CONFIG_SMDK5250
>>> +ifdef CONFIG_SPL
>>> +COBJS  += lowlevel.o
>>
>> Could do:
>>
>> COBJS-$(CONFIG_SPL)  += lowlevel.o
>>
>> and remove the inner ifdef
> - OK
>>
>>> +endif
>>> +endif
>>> +
>>>  COBJS  += clock.o power.o soc.o system.o pinmux.o
>>>
>>>  SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
>>> diff --git a/arch/arm/cpu/armv7/exynos/lowlevel.S 
>>> b/arch/arm/cpu/armv7/exynos/lowlevel.S
>>> new file mode 100644
>>> index 000..7307959
>>> --- /dev/null
>>> +++ b/arch/arm/cpu/armv7/exynos/lowlevel.S
>>> @@ -0,0 +1,35 @@
>>> +/*
>>> + * Lowlevel setup for SMDK5250 board based on S5PC520
>>> + *
>>> + * Copyright (C) 2012 Samsung Electronics
>>> + *
>>> + * See file CREDITS for list of people who contributed to this
>>> + * project.
>>> + *
>>> + * This program is free software; you can redistribute it and/or
>>> + * modify it under the terms of the GNU General Public License as
>>> + * published by the Free Software Foundation; either version 2 of
>>> + * the License, or (at your option) any later version.
>>> + *
>>> + * This program is distributed in the hope that it will be useful,
>>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>>> + * GNU General Public License for more details.
>>> + *
>>> + * You should have received a copy of the GNU General Public License
>>> + * along with this program; if not, write to the Free Software
>>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>>> + * MA 02111-1307 USA
>>> + */
>>> +
>>> +#include 
>>> +#include 
>>> +
>>> +   .globl lowlevel_init
>>> +lowlevel_init:
>>> +   /*
>>> +* Set the stack pointer, although it will be overwritten by the 
>>> caller
>>> +* It seems we will not boot if this function is empty.
>>> +*/
>>> +   ldr sp, =CONFIG_IRAM_STACK
>>> +   mov pc, lr
>>> diff --git a/arch/arm/include/asm/arch-exynos/power.h 
>>> b/arch/arm/include/asm/arch-exynos/power.h
>>> index f6d0278..d6fd29e 100644
>>> --- a/arch/arm/include/asm/arch-exynos/power.h
>>> +++ b/arch/arm/include/asm/arch-exynos/power.h
>>> @@ -874,4 +874,12 @@ void power_ps_hold_setup(void);
>>>
>>>  /* Read the resume function and call it */
>>>  void power_exit_wakeup(void);
>>> +
>>> 

Re: [U-Boot] [RFC PATCH 03/22] fs: Add support for saving data to filesystems

2013-01-11 Thread Simon Glass
Hi Marek,

On Fri, Jan 11, 2013 at 3:08 AM, Marek Vasut  wrote:
> Dear Simon Glass,
>
>> Add a new method for saving that filesystems can implement. This mirrors
>> the existing load method.
>>
>> Signed-off-by: Simon Glass 
>
> Reviewed-by: Marek Vasut 
>
> btw what about fat write support, can this map somehow on it?

Thanks for reviews.

There is also ext4, am hoping that others might help with this?

Regards,
Simon

>
> Best regards,
> Marek Vasut
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Re: [U-Boot] [PATCH V4 5/9] EXYNOS5: DWMMC: API to set mmc clock divisor

2013-01-11 Thread Simon Glass
Hi Amarendra,

On Fri, Jan 11, 2013 at 5:23 AM, Amarendra Reddy
 wrote:
> Hi Jaehoon / Simon,
>
> Thanks for review comments.
> Please find my responses below.
>
> Thanks & Regards
> Amarendra Reddy
>
> On 11 January 2013 09:22, Jaehoon Chung  wrote:
>>
>> On 01/11/2013 12:35 AM, Simon Glass wrote:
>> > Hi Amar,
>> >
>> > On Fri, Jan 4, 2013 at 1:34 AM, Amar  wrote:
>> >> This API computes the divisor value based on MPLL clock and
>> >> writes it into the FSYS1 register.
>> >>
>> >> Changes from V1:
>> >> 1)Updated the function exynos5_mmc_set_clk_div() to receive
>> >> 'device_i'd as input parameter instead of 'index'.
>> >>
>> >> Changes from V2:
>> >> 1)Updation of commit message and resubmition of proper patch
>> >> set.
>> >>
>> >> Changes from V3:
>> >> 1)Removed the new API exynos5_mmc_set_clk_div() from clock.c,
>> >> because existing API set_mmc_clk() can be used to set mmc
>> >> clock.
>> >>
>> >> Signed-off-by: Amar 
>> >> ---
>> >>  arch/arm/cpu/armv7/exynos/clock.c  | 4 ++--
>> >>  arch/arm/include/asm/arch-exynos/clk.h | 3 +++
>> >>  2 files changed, 5 insertions(+), 2 deletions(-)
>> >>
>> >> diff --git a/arch/arm/cpu/armv7/exynos/clock.c
>> >> b/arch/arm/cpu/armv7/exynos/clock.c
>> >> index 973b84e..89574ba 100644
>> >> --- a/arch/arm/cpu/armv7/exynos/clock.c
>> >> +++ b/arch/arm/cpu/armv7/exynos/clock.c
>> >> @@ -490,7 +490,7 @@ static unsigned long exynos4_get_mmc_clk(int
>> >> dev_index)
>> >> (struct exynos4_clock *)samsung_get_base_clock();
>> >> unsigned long uclk, sclk;
>> >> unsigned int sel, ratio, pre_ratio;
>> >> -   int shift;
>> >> +   int shift = 0;
>> >
>> > Is this fixing a warning?
>> Maybe..fix the compiler warning..
>
>
> As 'shift' was uninitialised, it had garbage value which was causing a
> problem when "dev_index = 0 or 2".

OK good.

>>
>> >
>> >>
>> >> sel = readl(&clk->src_fsys);
>> >> sel = (sel >> (dev_index << 2)) & 0xf;
>> >> @@ -539,7 +539,7 @@ static unsigned long exynos5_get_mmc_clk(int
>> >> dev_index)
>> >> (struct exynos5_clock *)samsung_get_base_clock();
>> >> unsigned long uclk, sclk;
>> >> unsigned int sel, ratio, pre_ratio;
>> >> -   int shift;
>> >> +   int shift = 0;
>> >>
>> >> sel = readl(&clk->src_fsys);
>> >> sel = (sel >> (dev_index << 2)) & 0xf;
>> >> diff --git a/arch/arm/include/asm/arch-exynos/clk.h
>> >> b/arch/arm/include/asm/arch-exynos/clk.h
>> >> index 1935b0b..a4d5b4e 100644
>> >> --- a/arch/arm/include/asm/arch-exynos/clk.h
>> >> +++ b/arch/arm/include/asm/arch-exynos/clk.h
>> >> @@ -29,6 +29,9 @@
>> >>  #define VPLL   4
>> >>  #define BPLL   5
>> >>
>> >> +#define FSYS1_MMC0_DIV_MASK0xff0f
>> >> +#define FSYS1_MMC0_DIV_VAL 0x0701
>> >
>> > What is this used for? I don't see it in this patch.
>> >
>> > Overall it is not clear what this patch is for.
>> This define didn't need. That value is not static value, isn't?
>
> In fact, V2 of this patch had a new function (which I added). That new
> function was using the #define values.
> But later in V4 the new function has been removed.
>
> As of now the #define values are used in the file
> board/samsung/smdk5250/clock_init.c.
> The values are used during "booting from EMMC".

OK I see. I suppose they could move to that patch, but I suppose it
isn't important so long as the patches go in in the right order.

Regards,
Simon

>
>>
>> Best Regards,
>> Jaehoon Chung
>> >
>> >> +
>> >>  unsigned long get_pll_clk(int pllreg);
>> >>  unsigned long get_arm_clk(void);
>> >>  unsigned long get_i2c_clk(void);
>> >> --
>> >> 1.8.0
>> >>
>> >
>> > Regards,
>> > Simon
>> >
>>
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Re: [U-Boot] [PATCH V4 9/9] COMMON: MMC: Command to support EMMC booting and to

2013-01-11 Thread Simon Glass
Hi Amarendra,

On Fri, Jan 11, 2013 at 5:50 AM, Amarendra Reddy
 wrote:
> Hi Simon / Jaehoon,
>
> Please find my responses below.
>
> Thanks & Regards
> Amarendra reddy
>
> On 11 January 2013 11:11, Simon Glass  wrote:
>>
>> HI Jaehoon,
>>
>> On Thu, Jan 10, 2013 at 7:54 PM, Jaehoon Chung 
>> wrote:
>> > On 01/11/2013 01:46 AM, Simon Glass wrote:
>> >> Hi Amar,
>> >>
>> >> On Fri, Jan 4, 2013 at 1:34 AM, Amar  wrote:
>> >>> This patch adds commands to open, close and resize boot partitions on
>> >>> EMMC.
>> >>>
>> >>> Changes from V1:
>> >>> 1)Combined the common piece of code between 'open' and 'close'
>> >>> operations.
>> >>>
>> >>> Changes from V2:
>> >>> 1)Updation of commit message and resubmition of proper patch
>> >>> set.
>> >>>
>> >>> Changes from V3:
>> >>> No change.
>> >>>
>> >>> Signed-off-by: Amar 
>> >>> ---
>> >>>  common/cmd_mmc.c | 84
>> >>> +++-
>> >>>  1 file changed, 83 insertions(+), 1 deletion(-)
>> >>>
>> >>> diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
>> >>> index 7dacd51..1dabb5b 100644
>> >>> --- a/common/cmd_mmc.c
>> >>> +++ b/common/cmd_mmc.c
>> >>> @@ -248,6 +248,84 @@ static int do_mmcops(cmd_tbl_t *cmdtp, int flag,
>> >>> int argc, char * const argv[])
>> >>> curr_device, mmc->part_num);
>> >>>
>> >>> return 0;
>> >>> +   } else if ((strcmp(argv[1], "open") == 0) ||
>> >>> +   (strcmp(argv[1], "close") == 0)) {
>> >>
>> >> How about putting this block in its own function?
>
>
> Ok. Shall put the entire block in a new function.
>>
>> >>
>> >>> +   int dev;
>> >>> +   struct mmc *mmc;
>> >>> +
>> >>> +   if (argc == 2)
>> >>> +   dev = curr_device;
>> >>> +   else if (argc == 3)
>> >>> +   dev = simple_strtoul(argv[2], NULL, 10);
>> >>> +   else
>> >>> +   return CMD_RET_USAGE;
>> >>> +
>> >>> +   mmc = find_mmc_device(dev);
>> >>> +   if (!mmc) {
>> >>> +   printf("no mmc device at slot %x\n", dev);
>> >>> +   return 1;
>> >>> +   }
>> >>> +
>> >>> +   if (IS_SD(mmc)) {
>> >>> +   printf("SD device cannot be opened/closed\n");
>> >>> +   return 1;
>> >>> +   }
>> >>> +
>> >>> +   if (strcmp(argv[1], "open") == 0) {
>> >>> +   if (!(mmc_boot_open(mmc))) {
>> >>> +   printf("EMMC OPEN Success.\n");
>> >>> +   printf("\t\t\t!!!Notice!!!\n");
>> >>> +   printf("!You must close EMMC"
>> >>> +   " boot Partition after all"
>> >>> +   " images are written\n");
>> >>
>> >> Do you need to split these strings so much? Perhaps when it is in a
>> >> function the indenting will be less?
>
> Ok.
>>
>> >>
>> >>> +   printf("!EMMC boot partition"
>> >>> +   " has continuity at"
>> >>> +   " image writing time.\n");
>> >>> +   printf("!So, Do not close boot"
>> >>> +   " partition, Before, all"
>> >>> +   " images are written.\n");
>> >>> +   return 0;
>> >>> +   } else {
>> >>> +   printf("EMMC OPEN Failed.\n");
>> >>> +   return 1;
>> >>
>> >> You could put this above the other block and reduce indenting:
>> >>
>> >> if (mmc_boot_open(mmc)) {
>> >>printf("EMMC OPEN Failed.\n");
>> >>return 1;
>> >> }
>> >> ...code continues
>> >>
>
> Ok.
>>
>> >>> +   }
>> >>> +   }
>> >>> +
>> >>> +   if (strcmp(argv[1], "close") == 0) {
>> >>> +   if (!(mmc_boot_close(mmc))) {
>> >>> +   printf("EMMC CLOSE Success.\n");
>> >>
>> >> Shouldn't print a message on success
>> >>
>
> Ok. shall remove the print message in success case.
>
 +   return 0;
 +   } else {
 +   printf("EMMC CLOSE Failed.\n");
 +   return 1;
 +   }
 +   }
 +   } else if (strcmp(argv[1], "bootpart") == 0) {
 +   int dev;
 +   dev = simple_strtoul(argv[2], NULL, 10);
 +
 +   u32 bootsize = simple_strtoul(argv[3], NULL, 10);
 +   u32 rpmbsize = simple_strtoul(argv[4], NULL, 10);
 +   struct mmc *mmc = find_mmc_device(dev);
 + 

Re: [U-Boot] [PATCH] usb: ehci: exynos: Enable non-dt path

2013-01-11 Thread Simon Glass
Hi Vivek,

On Fri, Jan 11, 2013 at 1:24 AM, Vivek Gautam  wrote:
> Enabling the non-dt path for the driver so that
> we don't get any build errors for non-dt configuration.
>
> Signed-off-by: Vivek Gautam 

Acked-by: Simon Glass 

But this has thrown up the issue that the FDT decode is done each
time. Could you (in a future patch) change this so that the FDT decode
happens once, and the values are put in a structure which is then used
subsequently?

Regards,
Simon

> ---
>
> Earlier we had moved to fdt support for ehci-exynos driver, but
> missed out the non-dt path. Although this driver serves for exysno5
> onward only but better to keep the non-dt path also available.
>
>  drivers/usb/host/ehci-exynos.c |   10 ++
>  1 files changed, 10 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/usb/host/ehci-exynos.c b/drivers/usb/host/ehci-exynos.c
> index 3ca4c5c..6f0c6c3 100644
> --- a/drivers/usb/host/ehci-exynos.c
> +++ b/drivers/usb/host/ehci-exynos.c
> @@ -153,7 +153,12 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, 
> struct ehci_hcor **hcor)
> return -ENOMEM;
> }
>
> +#ifdef CONFIG_OF_CONTROL
> exynos_usb_parse_dt(gd->fdt_blob, exynos);
> +#else
> +   exynos->usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy();
> +   exynos->hcd = samsung_get_base_usb_ehci();
> +#endif
>
> setup_usb_phy(exynos->usb);
>
> @@ -185,7 +190,12 @@ int ehci_hcd_stop(int index)
> return -ENOMEM;
> }
>
> +#ifdef CONFIG_OF_CONTROL
> exynos_usb_parse_dt(gd->fdt_blob, exynos);
> +#else
> +   exynos->usb = (struct exynos_usb_phy *)samsung_get_base_usb_phy();
> +   exynos->hcd = samsung_get_base_usb_ehci();
> +#endif
>
> reset_usb_phy(exynos->usb);
>
> --
> 1.7.6.5
>
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Re: [U-Boot] [U-Boot, 1/1] OMAP3: igep00x0: add CONFIG_SPL_BOARD_INIT for CONFIG_SPL_NAND_SUPPORT

2013-01-11 Thread Tom Rini
On Fri, Dec 28, 2012 at 02:51:53AM -, Javier Martinez Canillas wrote:

> When booting an IGEPv2 board from NAND with SPL, U-Boot hangs
> trying to read the OMAP General Purpose Memory Controller (GPMC).
> 
> The reason is that the GPMC initialization function is called
> inside spl_board_init() and this function is only executed when
> CONFIG_SPL_BOARD_INIT is defined.
> 
> Signed-off-by: Javier Martinez Canillas 
> Acked-by: Enric Balletbo i Serra 

Applied to u-boot-ti/master, thanks!

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Re: [U-Boot] Makefile: remove MLO.byteswap on clobber

2013-01-11 Thread Tom Rini
On Wed, Jan 02, 2013 at 07:59:24AM -, Nishanth Menon wrote:

> On clobber, do a cleanup even for SPL build else, we'd have
> MLO.byteswap remaining for certain platforms like am33xx SPL builds
> 
> Signed-off-by: Nishanth Menon 

Applied to u-boot-ti/master, thanks!

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Re: [U-Boot] [U-Boot, 1/2] serial/ns16550: add an option to avoid hanging on broken platforms

2013-01-11 Thread Tom Rini
On Mon, Jan 07, 2013 at 01:35:20AM -, Javier Martinez Canillas wrote:

> Some platforms (e.g. IGEPv2 board) has a broken ns16550 UART that
> does not set the TEMT bit when the transmitter is empty in SPL.
> This makes U-Boot to hang while waiting for TEMT to be set.
> 
> Add a new option to avoid this:
> 
> CONFIG_SYS_NS16550_BROKEN_TEMT
> 
> 16550 UART set the Transmitter Empty (TEMT) Bit when all output
> has finished and the transmitter is totally empty. U-Boot waits
> for this bit to be set to initialize the serial console. On some
> broken platforms this bit is not set in SPL making U-Boot to
> hang while waiting for TEMT. Define this option to avoid it.
> 
> Signed-off-by: Javier Martinez Canillas 

Applied to u-boot-ti/master, thanks!

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Re: [U-Boot] [U-Boot, 2/2] OMAP3: igep00x0: add CONFIG_SYS_NS16550_BROKEN_TEMT

2013-01-11 Thread Tom Rini
On Mon, Jan 07, 2013 at 01:35:21AM -, Javier Martinez Canillas wrote:

> IGEP board PC16550D (ns16550) UART doesn't set the
> Transmitter Empty (TEMT) Bit in SPL. This makes
> U-Boot to hang while waiting for TEMT. Add the
> CONFIG_SYS_NS16550_BROKEN_TEMT config option to
> avoid this issue.
> 
> Signed-off-by: Javier Martinez Canillas 

Applied to u-boot-ti/master, thanks!

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Re: [U-Boot] [PATCH 1/1] m68k/lib: fix serial driver relocation

2013-01-11 Thread Jens Scharsig
Am 2012-11-23 23:23, schrieb Angelo Dureghello:
> Fix coldfire serial driver bindings no more relocated to ram after last
> changes to drivers/serial/serial.c (regression).
> Serial initialization in ram has to be called after that gd->reloc_off is
> calculated.
> 
> Signed-off-by: Angelo Dureghello 
> Cc: Jason Jin 
> ---
> diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c
> index 02d73fd..373570c 100644
> --- a/arch/m68k/lib/board.c
> +++ b/arch/m68k/lib/board.c
> @@ -402,14 +402,14 @@ void board_init_r (gd_t *id, ulong dest_addr)
> 
> gd->flags |= GD_FLG_RELOC;  /* tell others: relocation done */
> 
> -   serial_initialize();
> -
> debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
> 
> WATCHDOG_RESET ();
> 
> gd->reloc_off =  dest_addr - CONFIG_SYS_MONITOR_BASE;
> 
> + serial_initialize();
> +
> monitor_flash_len = (ulong)&__init_end - dest_addr;
> 
>  #if defined(CONFIG_NEEDS_MANUAL_RELOC)
> 

Acked-by: Jens Scharsig (BuS Elektronik) 
Tested-by: Jens Scharsig (BuS Elektronik) 
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Re: [U-Boot] [STATUS] v2013.01-rc3 out

2013-01-11 Thread Jens Scharsig
Hello Tom Rini

> Hey all,
> 
> As a reminder, we're scheduled for v2013.01 on the 15th.  I've pushed
> out v2013.01-rc3 now.  I still expect:
> - At least one more u-boot-arm PR
> - Any other outstand bug fixes
> 
> I saw there was a request for an m68k change to come in from a
> developer, Jason can you review and pass along please?  It is assigned
> to you in patchwork.  And I suspect there's a few more bugfixes out
> there we need to handle (I know of 2 different one for IGEP boards).
> 
> Please remind me here if there's something else that needs reviewing and
> going in, thanks!
> 

the relocation of serial functions on m68k arch does not work correct.

we need the patch

http://patchwork.ozlabs.org/patch/201421/

in finale release

regards


Jens Scharsig

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[U-Boot] [PATCH] mmc:sdhci:fix: Change default interrupts enabled at SDHCI initialization

2013-01-11 Thread Lukasz Majewski
This patch changes sdhci_init()'s behavior to NOT enable all interrupt
sources by default. Moreover interrupt signaling has been disabled.

This patch do not enable interrupts which aren't served in u-boot
(they are defined at sdhci.h but NOT used elsewhere):
- SDHCI_INT_CARD_INSERT, SDHCI_INT_CARD_REMOVE, SDHCI_BUS_POWER,
  SDHCI_INT_CARD_REMOVE, SDHCI_INT_CARD_INT

Special care shall be put on SDHCI_INT_CARD_INT, which indicates
interrupt generated by SD card.
According to "SD Host Controller Simplified Spec. ver 3.00" when bit 8
(Card Interrupt Status Enable) at "Normal Interrupt Status Enable
Register" (offset 0x34) is set, the card interrupt detection is started.
Then eMMC card may cause the SD controller to set this bit and then this
interrupt is passed to booted OS and might cause kernel crash.


To sum up:
- Only enable interrupts, which are served at u-boot
- This cleanup as a side effect fixes SDHCI's CARD INTERRUPT problem at 
  Linux kernel (versions 3.6+, sdhci controller)
- Keep masked bits at "Normal Interrupt Signal Enable Register" (0x38h)

Signed-off-by: Lukasz Majewski 
Signed-off-by: Kyungmin Park 
Cc: Lei Wen 
Cc: Andy Fleming 
---
 drivers/mmc/sdhci.c |8 +---
 1 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c
index 0fd1337..76c14fb 100644
--- a/drivers/mmc/sdhci.c
+++ b/drivers/mmc/sdhci.c
@@ -412,9 +412,11 @@ int sdhci_init(struct mmc *mmc)
status = sdhci_readl(host, SDHCI_PRESENT_STATE);
}
 
-   /* Eable all state */
-   sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_ENABLE);
-   sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_SIGNAL_ENABLE);
+   /* Enable only interrupts served by the SD controller */
+   sdhci_writel(host, SDHCI_INT_DATA_MASK | SDHCI_INT_CMD_MASK
+, SDHCI_INT_ENABLE);
+   /* Mask all sdhci interrupt sources */
+   sdhci_writel(host, 0x0, SDHCI_SIGNAL_ENABLE);
 
return 0;
 }
-- 
1.7.2.3

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Re: [U-Boot] [RFC] mmc:fix: Increase the timeout value for SDHCI_send_command()

2013-01-11 Thread Lukasz Majewski
Hi Jaehoon,

> Hi All,
> 
> I think this problem is produced when card is running write/erase
> operation. We used the mmc_send_status() into driver/mmc/mmc.c.
> When That command is sending, i found the inhibit released log.
> 
> I think problem that SDHCI_DATA_INHIBIT is set at every command.
> if didn't have data and response type is not busy-wait type,
> SDHCI_DATA_INHIBIT didn't need to set.
> 
> How about this? It is more reasonable than increasing timeout value.
> 
> @@ -141,7 +143,10 @@ int sdhci_send_command(struct mmc *mmc, struct
> mmc_cmd *cmd, timeout = 10;
>  
>   sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS);
> - mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT;
> + mask = SDHCI_CMD_INHIBIT;
> +
> + if ((data != NULL) || (cmd->resp_type & MMC_RSP_BUSY))
> + mask |= SDHCI_DATA_INHIBIT;
>  

Ive tested this code and data abort appears when used with ext4.

I think, that we need to look around for another solution.

>   /* We shouldn't wait for data inihibit for stop commands,
> even though they might use busy signaling */
> 
> Best Regards,
> Jaehoon Chung
> 
> On 01/10/2013 05:12 AM, Wolfgang Denk wrote:
> > Dear Lukasz Majewski,
> > 
> > In message
> > <1357665792-8141-1-git-send-email-l.majew...@samsung.com> you wrote:
> >> I'd like to ask for your opinion about the following problem:
> > 
> > I cannot comment on the problem - only a bit about the proposed
> > patch ;-)
> > 
> >> From a brief checking I can say that it happens when we are doing
> >> consecutive MMC operations (i.e. many reads), and the 10ms timeout
> >> might be too short when eMMC firmware is forced to do some internal
> >> time consuming operations (e.g. flash blocks management, wear
> >> leveling).
> >> In this situation, the SDHCI_CMD_INHIBIT bit is set, which means
> >> that SDHCI controller didn't received response from eMMC.
> >>
> >> One proposition would be to define the per device/per memory chip
> >> specific timeouts, to replace those defined
> >> at ./drivers/mmc/sdhci.c file.
> > 
> > Is there no way to ask the device and/or controller when it is done,
> > so we can poll for ready state instead of adding delays, which will
> > always have to be tailored for the so far known worst case, i. e.
> > they will be always too long on all almost all systems.
> > 
> >> --- a/drivers/mmc/sdhci.c
> >> +++ b/drivers/mmc/sdhci.c
> >> @@ -137,8 +137,8 @@ int sdhci_send_command(struct mmc *mmc, struct
> >> mmc_cmd *cmd, unsigned int timeout, start_addr = 0;
> >>unsigned int retry = 1;
> >>  
> >> -  /* Wait max 10 ms */
> >> -  timeout = 10;
> >> +  /* Wait max 100 ms */
> >> +  timeout = 100;
> > 
> > We have cases where we struggle for sub-second boot times.  Adding
> > 100 ms delay here is clearly prohbitive.  [Even the 10 ms are way
> > too long IMHO.]  There must be a better way to handle this.
> > 
> > Best regards,
> > 
> > Wolfgang Denk
> > 
> 



-- 
Best regards,

Lukasz Majewski

Samsung R&D Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [RFC] mmc:fix: Increase the timeout value for SDHCI_send_command()

2013-01-11 Thread Lukasz Majewski
Hi Wolfgang,

> Dear Lukasz Majewski,
> 
> In message <1357665792-8141-1-git-send-email-l.majew...@samsung.com>
> you wrote:
> > I'd like to ask for your opinion about the following problem:
> 
> I cannot comment on the problem - only a bit about the proposed patch
> ;-)
> 
> > From a brief checking I can say that it happens when we are doing
> > consecutive MMC operations (i.e. many reads), and the 10ms timeout
> > might be too short when eMMC firmware is forced to do some internal
> > time consuming operations (e.g. flash blocks management, wear
> > leveling).
> > In this situation, the SDHCI_CMD_INHIBIT bit is set, which means
> > that SDHCI controller didn't received response from eMMC.
> > 
> > One proposition would be to define the per device/per memory chip
> > specific timeouts, to replace those defined at ./drivers/mmc/sdhci.c
> > file.
> 
> Is there no way to ask the device and/or controller when it is done,
> so we can poll for ready state instead of adding delays, which will
> always have to be tailored for the so far known worst case, i. e. they
> will be always too long on all almost all systems.

We are doing this already - the SDHCI_PRESENT_STATE register's bit 0
(SDHCI_CMD_INHIBIT) and bit 1 (DATA_INHIBIT) are for this purpose.
Those indicate when host controller can send further command/data to
the card.

Moreover, there are also timeouts in the case when someone pull out SD
card inserted to the slot (or any other use case which I'm not aware).


> 
> > --- a/drivers/mmc/sdhci.c
> > +++ b/drivers/mmc/sdhci.c
> > @@ -137,8 +137,8 @@ int sdhci_send_command(struct mmc *mmc, struct
> > mmc_cmd *cmd, unsigned int timeout, start_addr = 0;
> > unsigned int retry = 1;
> >  
> > -   /* Wait max 10 ms */
> > -   timeout = 10;
> > +   /* Wait max 100 ms */
> > +   timeout = 100;
> 
> We have cases where we struggle for sub-second boot times.  Adding
> 100 ms delay here is clearly prohbitive.  [Even the 10 ms are way too
> long IMHO.]  There must be a better way to handle this.

That's why I'm asking. 

It is strange that, when I'm increasing delay it works.

Maybe we will find some areas of optimization?

> 
> Best regards,
> 
> Wolfgang Denk
> 



-- 
Best regards,

Lukasz Majewski

Samsung R&D Poland (SRPOL) | Linux Platform Group
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Re: [U-Boot] [RFC PATCH 03/22] fs: Add support for saving data to filesystems

2013-01-11 Thread Simon Glass
Hi,

On Fri, Jan 11, 2013 at 6:26 AM, Simon Glass  wrote:
> Hi Marek,
>
> On Fri, Jan 11, 2013 at 3:08 AM, Marek Vasut  wrote:
>> Dear Simon Glass,
>>
>>> Add a new method for saving that filesystems can implement. This mirrors
>>> the existing load method.
>>>
>>> Signed-off-by: Simon Glass 
>>
>> Reviewed-by: Marek Vasut 
>>
>> btw what about fat write support, can this map somehow on it?
>
> Thanks for reviews.
>
> There is also ext4, am hoping that others might help with this?

One thing I meant to put in the cover letter was that we might need a
generic CONFIG to enable write support. A lot of people don't want it,
and perhaps rather than having fat write, ext4 writes, etc. we have a
global write support CONFIG.

>
> Regards,
> Simon
>
>>
>> Best regards,
>> Marek Vasut
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Re: [U-Boot] [RFC PATCH 07/22] arm: Refactor bootm to reduce #ifdefs

2013-01-11 Thread Simon Glass
Hi Marek,

On Fri, Jan 11, 2013 at 3:10 AM, Marek Vasut  wrote:
> Dear Simon Glass,
>
>> With fewer #ifdefs the code is more readable and more of the code is
>> compiled for all boards. Add defines in the header file to control
>> what features are enabled, and then use if() instead of #ifdef.
>>
>> Signed-off-by: Simon Glass 
>
> Did you try building it with ELDK 4.2 and check if there's no size growth?

buildman says:

08: arm: Refactor bootm to reduce #ifdefs
   arm: (285 boards)   spl/u-boot-spl:text -0.0   text -7.9   bss +1.0

so no size growth there with 4.4.1 (the numbers are changes in bytes
for that section averaged over all boards).

The code is basically equivalent, just using a compile-time check instead.

gcc version 4.4.1 (Sourcery G++ Lite 2010q1-202)

>
> Best regards,
> Marek Vasut

Regards,
Simon
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Re: [U-Boot] [PATH v3 1/2] sf: Add status register reading support

2013-01-11 Thread Jagan Teki
Hi Simon,

On Fri, Jan 11, 2013 at 7:52 AM, Simon Glass  wrote:
> Hi Jagannadha
>
> On Thu, Jan 3, 2013 at 6:51 AM, Jagannadha Sutradharudu Teki
>  wrote:
>> This patch provides support to read a flash status register.
>>
>> Status register contains a control bits used to verify
>> the progress of flash program and erase operations.
>>
>> User need to get the data through spi_flash_cmd_read_status()
>> based on their usage.
>
> Do you have a console command for this, and the control register also?

There is no sf command for status register read.

Usage is based on the user code, see how I am using this function on
Quad Enable bit setting.
http://patchwork.ozlabs.org/patch/207454/

Please tell me if you still unclear.

Thanks,
Jagan.

>
> Regards,
> Simon
>
>>
>> Signed-off-by: Jagannadha Sutradharudu Teki 
>> ---
>> Changes in v3:
>> improved coding style
>>
>>  drivers/mtd/spi/spi_flash.c  |8 
>>  drivers/mtd/spi/spi_flash_internal.h |3 +++
>>  2 files changed, 11 insertions(+), 0 deletions(-)
>>
>> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
>> index 9e8939c..0f05b91 100644
>> --- a/drivers/mtd/spi/spi_flash.c
>> +++ b/drivers/mtd/spi/spi_flash.c
>> @@ -264,6 +264,14 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, 
>> u8 sr)
>> return 0;
>>  }
>>
>> +int spi_flash_cmd_read_status(struct spi_flash *flash, void *data)
>> +{
>> +   u8 cmd;
>> +
>> +   cmd = CMD_READ_STATUS;
>> +   return spi_flash_read_common(flash, &cmd, sizeof(cmd), (void *)data, 
>> 1);
>> +}
>> +
>>  /*
>>   * The following table holds all device probe functions
>>   *
>> diff --git a/drivers/mtd/spi/spi_flash_internal.h 
>> b/drivers/mtd/spi/spi_flash_internal.h
>> index 141cfa8..8232595 100644
>> --- a/drivers/mtd/spi/spi_flash_internal.h
>> +++ b/drivers/mtd/spi/spi_flash_internal.h
>> @@ -77,6 +77,9 @@ static inline int spi_flash_cmd_write_disable(struct 
>> spi_flash *flash)
>>  /* Program the status register. */
>>  int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
>>
>> +/* Read the status register */
>> +int spi_flash_cmd_read_status(struct spi_flash *flash, void *data);
>> +
>>  /*
>>   * Same as spi_flash_cmd_read() except it also claims/releases the SPI
>>   * bus. Used as common part of the ->read() operation.
>> --
>> 1.7.0.4
>>
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Re: [U-Boot] [PATH v3 1/2] sf: Add status register reading support

2013-01-11 Thread Simon Glass
Hi Jagan,

On Fri, Jan 11, 2013 at 7:51 AM, Jagan Teki  wrote:
> Hi Simon,
>
> On Fri, Jan 11, 2013 at 7:52 AM, Simon Glass  wrote:
>> Hi Jagannadha
>>
>> On Thu, Jan 3, 2013 at 6:51 AM, Jagannadha Sutradharudu Teki
>>  wrote:
>>> This patch provides support to read a flash status register.
>>>
>>> Status register contains a control bits used to verify
>>> the progress of flash program and erase operations.
>>>
>>> User need to get the data through spi_flash_cmd_read_status()
>>> based on their usage.
>>
>> Do you have a console command for this, and the control register also?
>
> There is no sf command for status register read.
>
> Usage is based on the user code, see how I am using this function on
> Quad Enable bit setting.
> http://patchwork.ozlabs.org/patch/207454/
>
> Please tell me if you still unclear.

Yes, but do you think such a command might be useful? Or is it better
to have commands for each individual feature? I am thinking of locking
of part of the flash and anything else that the status register
provides.

Regards,
Simon

>
> Thanks,
> Jagan.
>
>>
>> Regards,
>> Simon
>>
>>>
>>> Signed-off-by: Jagannadha Sutradharudu Teki 
>>> ---
>>> Changes in v3:
>>> improved coding style
>>>
>>>  drivers/mtd/spi/spi_flash.c  |8 
>>>  drivers/mtd/spi/spi_flash_internal.h |3 +++
>>>  2 files changed, 11 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
>>> index 9e8939c..0f05b91 100644
>>> --- a/drivers/mtd/spi/spi_flash.c
>>> +++ b/drivers/mtd/spi/spi_flash.c
>>> @@ -264,6 +264,14 @@ int spi_flash_cmd_write_status(struct spi_flash 
>>> *flash, u8 sr)
>>> return 0;
>>>  }
>>>
>>> +int spi_flash_cmd_read_status(struct spi_flash *flash, void *data)
>>> +{
>>> +   u8 cmd;
>>> +
>>> +   cmd = CMD_READ_STATUS;
>>> +   return spi_flash_read_common(flash, &cmd, sizeof(cmd), (void 
>>> *)data, 1);
>>> +}
>>> +
>>>  /*
>>>   * The following table holds all device probe functions
>>>   *
>>> diff --git a/drivers/mtd/spi/spi_flash_internal.h 
>>> b/drivers/mtd/spi/spi_flash_internal.h
>>> index 141cfa8..8232595 100644
>>> --- a/drivers/mtd/spi/spi_flash_internal.h
>>> +++ b/drivers/mtd/spi/spi_flash_internal.h
>>> @@ -77,6 +77,9 @@ static inline int spi_flash_cmd_write_disable(struct 
>>> spi_flash *flash)
>>>  /* Program the status register. */
>>>  int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
>>>
>>> +/* Read the status register */
>>> +int spi_flash_cmd_read_status(struct spi_flash *flash, void *data);
>>> +
>>>  /*
>>>   * Same as spi_flash_cmd_read() except it also claims/releases the SPI
>>>   * bus. Used as common part of the ->read() operation.
>>> --
>>> 1.7.0.4
>>>
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[U-Boot] csb1724 88f6282

2013-01-11 Thread Mario Schuknecht
Hello,

we want to use the marvell 88f6282 SoC in our products. For evaluation we
use the cogent1724 board [1].
Does anyone have experience with the cogent csb1724 board [1] and the
marvell 88f6282?
I've searched the mainline u-boot sources, but found no config for the
88f6282.
Is it possible to build a mainline u-boot for that SoC? If so, which config
works? If not, is it planned to support the board and the marvell 88f6282
SoC?

Kind regards,

Mario Schuknecht

[1] http://www.cogcomp.com/csb_csb1724.htm
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[U-Boot] USB driver on MPC8555E controller on a Non-RTOS project

2013-01-11 Thread Srijith
Hello,

We are using an in-house Power PC board with MPC8555E processor.We are
currently developing drivers for USB on bare board(Non-RTOS).

We would like your inputs regarding the implementation of usb driver.My
reference is uboot and
linux.

We are implementing usb support for the first time and are very new to it.
Am aware of the USB protocol.I would like to know, if there is any
implementation for usb drivers for mpc8555E support in uboot, which i can
refer it for porting.
If not, what all components could i refer in uboot to implement this.

Our milestone is usb device enumeration and detection initially.

Please could you help us out regarding this.

Appreciate your valuable feedback.

Thanks in advance!!



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Re: [U-Boot] Please pull u-boot-ti/master

2013-01-11 Thread Albert ARIBAUD
Hi Tom,

On Thu, 10 Jan 2013 17:59:45 -0700, Tom Rini  wrote:

> Hello,
> 
> The following changes since commit 612404c28a64a6df300642a1550a65dcc8e01f82:
> 
>   Merge 'u-boot-atmel/master' into 'u-boot-arm/master' (2013-01-09 20:01:48 
> +0100)
> 
> are available in the git repository at:
> 
> 
>   git://git.denx.de/u-boot-ti.git master
> 
> for you to fetch changes up to 039cbaefcf57338cc9b6a3c656db64e7907838db:
> 
>   OMAP3: igep00x0: add CONFIG_SYS_NS16550_BROKEN_TEMT (2013-01-10 15:09:24 
> -0700)
> 
> 
> Javier Martinez Canillas (3):
>   OMAP3: igep00x0: add CONFIG_SPL_BOARD_INIT for CONFIG_SPL_NAND_SUPPORT
>   serial/ns16550: add an option to avoid hanging on broken platforms
>   OMAP3: igep00x0: add CONFIG_SYS_NS16550_BROKEN_TEMT
> 
> Nishanth Menon (1):
>   Makefile: remove MLO.byteswap on clobber
> 
>  Makefile   |2 +-
>  README |8 
>  drivers/serial/ns16550.c   |2 ++
>  include/configs/igep00x0.h |4 
>  4 files changed, 15 insertions(+), 1 deletion(-)
> 
> These are all small but important fixes that either localized to a set
> of machines (IGEP devices) or fixing the 'clean' rules.  I've put this
> through the build cycle I normally do on master and nothing unexpected
> shows up (but not everything builds as u-boot-arm is behind master).
> 

Applied to u-boot-arm/master, thanks!

Amicalement,
-- 
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Re: [U-Boot] [PATCH V4 6/9] SMDK5250: Initialise and Enable DWMMC, support FDT and non-FDT

2013-01-11 Thread Amarendra Reddy
Hi Simon,

Thanks for review comments.
Please find my responses below.

Thanks & Regards
Amarendra Reddy

On 10 January 2013 22:27, Simon Glass  wrote:

> Hi Amar,
>
> On Fri, Jan 4, 2013 at 1:34 AM, Amar  wrote:
> > This patch enables and initialises DWMMC for SMDK5250.
> > Supports both FDT and non-FDT. This patch creates a new file
> > 'exynos5-dt.c' meant for FDT support.
> > exynos5-dt.c:   This file shall contain all code which supports
> FDT.
> > Any addition of FDT support for any module needs
> to be
> > added in this file.
> > smdk5250.c: This file shall contain the code which supports
> non-FDT.
> > version. Any addition of non-FDT support for any
> module
> > needs to be added in this file.
> > May be, the file smdk5250.c can be removed in
> near future
> > when non-FDT is not required.
> >
> > The Makefile is updated to compile only one of the files
> > exynos5-dt.c / smdk5250.c based on FDT configuration.
> >
> > NOTE:
> > Please note that all additions corresponding to FDT need to be added
> into the
> > file exynos5-dt.c.
> > At same time if non-FDT support is required then add the corresponding
> > updations into smdk5250.c.
> >
> > Changes from V1:
> > 1)A new file 'exynos5-dt.c' is created meant for FDT support
> > 2)Makefile is updated to compile only one of the files
> > exynos5-dt.c / smdk5250.c based on FDT configuration
> >
> > Changes from V2:
> > 1)Updation of commit message and resubmition of proper patch set.
> >
> > Changes from V3:
> > No change.
> >
> > Signed-off-by: Amar 
> > ---
> >  board/samsung/smdk5250/Makefile |   4 +
> >  board/samsung/smdk5250/exynos5-dt.c | 242
> 
> >  board/samsung/smdk5250/smdk5250.c   |  97 +++
> >  include/configs/exynos5250-dt.h |   2 +
> >  include/i2c.h   |   2 +
> >  5 files changed, 292 insertions(+), 55 deletions(-)
> >  create mode 100644 board/samsung/smdk5250/exynos5-dt.c
> >
> > diff --git a/board/samsung/smdk5250/Makefile
> b/board/samsung/smdk5250/Makefile
> > index 47c6a5a..ecca9f3 100644
> > --- a/board/samsung/smdk5250/Makefile
> > +++ b/board/samsung/smdk5250/Makefile
> > @@ -32,8 +32,12 @@ COBJS+= tzpc_init.o
> >  COBJS  += smdk5250_spl.o
> >
> >  ifndef CONFIG_SPL_BUILD
> > +ifdef CONFIG_OF_CONTROL
> > +COBJS  += exynos5-dt.o
> > +else
> >  COBJS  += smdk5250.o
> >  endif
> > +endif
> >
> >  ifdef CONFIG_SPL_BUILD
> >  COBJS  += spl_boot.o
> > diff --git a/board/samsung/smdk5250/exynos5-dt.c
> b/board/samsung/smdk5250/exynos5-dt.c
> > new file mode 100644
> > index 000..da539ca
> > --- /dev/null
> > +++ b/board/samsung/smdk5250/exynos5-dt.c
> > @@ -0,0 +1,242 @@
> > +/*
> > + * Copyright (C) 2012 Samsung Electronics
> > + *
> > + * See file CREDITS for list of people who contributed to this
> > + * project.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> > + * MA 02111-1307 USA
> > + */
> > +
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +#include 
> > +
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> > +int board_init(void)
> > +{
> > +   gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
> > +#ifdef CONFIG_EXYNOS_SPI
> > +   spi_init();
> > +#endif
> > +   return 0;
> > +}
> > +
> > +int dram_init(void)
> > +{
> > +   gd->ram_size= get_ram_size((long *)PHYS_SDRAM_1,
> PHYS_SDRAM_1_SIZE)
> > +   + get_ram_size((long *)PHYS_SDRAM_2,
> PHYS_SDRAM_2_SIZE)
> > +   + get_ram_size((long *)PHYS_SDRAM_3,
> PHYS_SDRAM_3_SIZE)
> > +   + get_ram_size((long *)PHYS_SDRAM_4,
> PHYS_SDRAM_4_SIZE)
> > +   + get_ram_size((long *)PHYS_SDRAM_5,
> PHYS_SDRAM_7_SIZE)
> > +   + get_ram_size((long *)PHYS_SDRAM_6,
> PHYS_SDRAM_7_SIZE)
> > +   + get_ram_size((long *)PHYS_SDRAM_7,
> PHYS_SDRAM_7_SIZE)
> > +   + get_ram_size((long *)PHYS_SDRAM_8,
> PHYS_SDRAM_8_SIZE);
>
> This 

[U-Boot] [PATCH 7/7] tegra: cardhu: config: enable SPI

2013-01-11 Thread Allen Martin
Turn on SPI in cardhu config file

Signed-off-by: Allen Martin 
---
 include/configs/cardhu.h |   11 +++
 1 file changed, 11 insertions(+)

diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h
index aa725ba..1616b39 100644
--- a/include/configs/cardhu.h
+++ b/include/configs/cardhu.h
@@ -49,6 +49,17 @@
 
 #define CONFIG_ENV_IS_NOWHERE
 
+/* SPI */
+#define CONFIG_TEGRA_SLINK
+#define CONFIG_TEGRA_SLINK_CTRLS   6
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_WINBOND
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
+#define CONFIG_SF_DEFAULT_SPEED2400
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH_SIZE  (4 << 20)
+
 #include "tegra-common-post.h"
 
 #endif /* __CONFIG_H */
-- 
1.7.10.4

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[U-Boot] [PATCH 1/7] tegra: fdt: add apbdma node

2013-01-11 Thread Allen Martin
Add apbdma node for tegra20 and tegra30, copied directly from tegra
Linux dtsi files.

Signed-off-by: Allen Martin 
---
 arch/arm/dts/tegra20.dtsi |   21 +
 arch/arm/dts/tegra30.dtsi |   37 +
 2 files changed, 58 insertions(+)

diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index 636ec2c..707975c 100644
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -20,6 +20,27 @@
};
};
 
+   apbdma: dma {
+   compatible = "nvidia,tegra20-apbdma";
+   reg = <0x6000a000 0x1200>;
+   interrupts = <0 104 0x04
+ 0 105 0x04
+ 0 106 0x04
+ 0 107 0x04
+ 0 108 0x04
+ 0 109 0x04
+ 0 110 0x04
+ 0 111 0x04
+ 0 112 0x04
+ 0 113 0x04
+ 0 114 0x04
+ 0 115 0x04
+ 0 116 0x04
+ 0 117 0x04
+ 0 118 0x04
+ 0 119 0x04>;
+   };
+
intc: interrupt-controller@50041000 {
compatible = "nvidia,tegra20-gic";
interrupt-controller;
diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi
index 664c397..d5f761e 100644
--- a/arch/arm/dts/tegra30.dtsi
+++ b/arch/arm/dts/tegra30.dtsi
@@ -19,6 +19,43 @@
};
};
 
+   apbdma: dma {
+   compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
+   reg = <0x6000a000 0x1400>;
+   interrupts = <0 104 0x04
+ 0 105 0x04
+ 0 106 0x04
+ 0 107 0x04
+ 0 108 0x04
+ 0 109 0x04
+ 0 110 0x04
+ 0 111 0x04
+ 0 112 0x04
+ 0 113 0x04
+ 0 114 0x04
+ 0 115 0x04
+ 0 116 0x04
+ 0 117 0x04
+ 0 118 0x04
+ 0 119 0x04
+ 0 128 0x04
+ 0 129 0x04
+ 0 130 0x04
+ 0 131 0x04
+ 0 132 0x04
+ 0 133 0x04
+ 0 134 0x04
+ 0 135 0x04
+ 0 136 0x04
+ 0 137 0x04
+ 0 138 0x04
+ 0 139 0x04
+ 0 140 0x04
+ 0 141 0x04
+ 0 142 0x04
+ 0 143 0x04>;
+   };
+
i2c@7000c000 {
#address-cells = <1>;
#size-cells = <0>;
-- 
1.7.10.4

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[U-Boot] [PATCH 6/7] tegra: add SPI SLINK driver

2013-01-11 Thread Allen Martin
Add driver for tegra SPI "SLINK" style driver.  This controller is
similar to the tegra20 SPI "SFLASH" controller.  The difference is
that the SLINK controller is a genernal purpose SPI controller and the
SFLASH controller is special purpose and can only talk to FLASH
devices.  In addition there are potentially many instances of an SLINK
controller on tegra and only a single instance of SFLASH.  Tegra20 is
currently ths only version of tegra that instantiates an SFLASH
controller.

This driver supports basic PIO mode of operation and is configurable
(CONFIG_OF_CONTROL) to be driven off devicetree bindings.  Up to 4
devices per controller may be attached, although typically only a
single chip select line is exposed from tegra per controller so in
reality this is usually limited to 1.

To enable this driver, use CONFIG_TEGRA_SLINK

Signed-off-by: Allen Martin 
---
 arch/arm/include/asm/arch-tegra/tegra_slink.h |   84 +++
 board/nvidia/common/board.c   |3 +-
 drivers/spi/Makefile  |1 +
 drivers/spi/tegra_slink.c |  333 +
 4 files changed, 420 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-tegra/tegra_slink.h
 create mode 100644 drivers/spi/tegra_slink.c

diff --git a/arch/arm/include/asm/arch-tegra/tegra_slink.h 
b/arch/arm/include/asm/arch-tegra/tegra_slink.h
new file mode 100644
index 000..74804b5
--- /dev/null
+++ b/arch/arm/include/asm/arch-tegra/tegra_slink.h
@@ -0,0 +1,84 @@
+/*
+ * NVIDIA Tegra SPI-SLINK controller
+ *
+ * Copyright 2010-2013 NVIDIA Corporation
+ *
+ * This software may be used and distributed according to the
+ * terms of the GNU Public License, Version 2, incorporated
+ * herein by reference.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * Version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _TEGRA_SLINK_H_
+#define _TEGRA_SLINK_H_
+
+#include 
+
+struct slink_tegra {
+   u32 command;/* SLINK_COMMAND_0 register  */
+   u32 command2;   /* SLINK_COMMAND2_0 reg */
+   u32 status; /* SLINK_STATUS_0 register */
+   u32 reserved;   /* Reserved offset 0C */
+   u32 mas_data;   /* SLINK_MAS_DATA_0 reg */
+   u32 slav_data;  /* SLINK_SLAVE_DATA_0 reg */
+   u32 dma_ctl;/* SLINK_DMA_CTL_0 register */
+   u32 status2;/* SLINK_STATUS2_0 reg */
+   u32 rsvd[56];   /* 0x20 to 0xFF reserved */
+   u32 tx_fifo;/* SLINK_TX_FIFO_0 reg off 100h */
+   u32 rsvd2[31];  /* 0x104 to 0x17F reserved */
+   u32 rx_fifo;/* SLINK_RX_FIFO_0 reg off 180h */
+};
+
+/* COMMAND */
+#define SLINK_CMD_ENB  (1 << 31)
+#define SLINK_CMD_GO   (1 << 30)
+#define SLINK_CMD_M_S  (1 << 28)
+#define SLINK_CMD_CK_SDA   (1 << 21)
+#define SLINK_CMD_CS_POL   (1 << 13)
+#define SLINK_CMD_CS_VAL   (1 << 12)
+#define SLINK_CMD_CS_SOFT  (1 << 11)
+#define SLINK_CMD_BIT_LENGTH   (1 << 4)
+#define SLINK_CMD_BIT_LENGTH_MASK  0x001F
+/* COMMAND2 */
+#define SLINK_CMD2_TXEN(1 << 30)
+#define SLINK_CMD2_RXEN(1 << 31)
+#define SLINK_CMD2_SS_EN   (1 << 18)
+#define SLINK_CMD2_SS_EN_SHIFT 18
+#define SLINK_CMD2_SS_EN_MASK  0x000C
+#define SLINK_CMD2_CS_ACTIVE_BETWEEN   (1 << 17)
+/* STATUS */
+#define SLINK_STAT_BSY (1 << 31)
+#define SLINK_STAT_RDY (1 << 30)
+#define SLINK_STAT_ERR (1 << 29)
+#define SLINK_STAT_RXF_FLUSH   (1 << 27)
+#define SLINK_STAT_TXF_FLUSH   (1 << 26)
+#define SLINK_STAT_RXF_OVF (1 << 25)
+#define SLINK_STAT_TXF_UNR (1 << 24)
+#define SLINK_STAT_RXF_EMPTY   (1 << 23)
+#define SLINK_STAT_RXF_FULL(1 << 22)
+#define SLINK_STAT_TXF_EMPTY   (1 << 21)
+#define SLINK_STAT_TXF_FULL(1 << 20)
+#define SLINK_STAT_TXF_OVF (1 << 19)
+#define SLINK_STAT_RXF_UNR (1 << 18)
+#define SLINK_STAT_CUR_BLKCNT  (1 << 15)
+/* STATUS2 */
+#define SLINK_STAT2_RXF_FULL_CNT   (1 << 16)
+#define SLINK_STAT2_TXF_FULL_CNT   (1 << 0)
+
+#define SPI_TIMEOUT1000
+#define TEGRA_SPI_MAX_FREQ 5200
+
+#endif /* _TEGRA_SLINK_H_ */
diff --git a/board/nvidia/common/board.c b/board/nvidia/common/board.c
index a4af539..63

[U-Boot] [PATCH 4/7] tegra30: fdt: add SPI SLINK nodes

2013-01-11 Thread Allen Martin
Add tegra30 SPI SLINK nodes to fdt.

Signed-off-by: Allen Martin 
---
 arch/arm/dts/tegra30.dtsi |   77 +
 include/fdtdec.h  |1 +
 lib/fdtdec.c  |1 +
 3 files changed, 79 insertions(+)

diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi
index d5f761e..e58e112 100644
--- a/arch/arm/dts/tegra30.dtsi
+++ b/arch/arm/dts/tegra30.dtsi
@@ -100,4 +100,81 @@
/* PERIPH_ID_I2C_DVC, CLK_M */
clocks = <&tegra_car 47>;
};
+   spi@7000d400 {
+   compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+   reg = <0x7000d400 0x200>;
+   interrupts = <0 59 0x04>;
+   nvidia,dma-request-selector = <&apbdma 15>;
+   spi-max-frequency = <2500>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   /* PERIPH_ID_SBC1, PLLP_OUT0 */
+   clocks = <&tegra_car 41>;
+   };
+
+   spi@7000d600 {
+   compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+   reg = <0x7000d600 0x200>;
+   interrupts = <0 82 0x04>;
+   nvidia,dma-request-selector = <&apbdma 16>;
+   spi-max-frequency = <2500>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   /* PERIPH_ID_SBC2, PLLP_OUT0 */
+   clocks = <&tegra_car 44>;
+   };
+
+   spi@7000d800 {
+   compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+   reg = <0x7000d480 0x200>;
+   interrupts = <0 83 0x04>;
+   nvidia,dma-request-selector = <&apbdma 17>;
+   spi-max-frequency = <2500>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   /* PERIPH_ID_SBC3, PLLP_OUT0 */
+   clocks = <&tegra_car 46>;
+   };
+
+   spi@7000da00 {
+   compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+   reg = <0x7000da00 0x200>;
+   interrupts = <0 93 0x04>;
+   nvidia,dma-request-selector = <&apbdma 18>;
+   spi-max-frequency = <2500>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   /* PERIPH_ID_SBC4, PLLP_OUT0 */
+   clocks = <&tegra_car 68>;
+   };
+
+   spi@7000dc00 {
+   compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+   reg = <0x7000dc00 0x200>;
+   interrupts = <0 94 0x04>;
+   nvidia,dma-request-selector = <&apbdma 27>;
+   spi-max-frequency = <2500>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   /* PERIPH_ID_SBC5, PLLP_OUT0 */
+   clocks = <&tegra_car 104>;
+   };
+
+   spi@7000de00 {
+   compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink";
+   reg = <0x7000de00 0x200>;
+   interrupts = <0 79 0x04>;
+   nvidia,dma-request-selector = <&apbdma 28>;
+   spi-max-frequency = <2500>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   /* PERIPH_ID_SBC6, PLLP_OUT0 */
+   clocks = <&tegra_car 105>;
+   };
 };
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 1504336..14aa308 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -71,6 +71,7 @@ enum fdt_compat_id {
COMPAT_NVIDIA_TEGRA20_PWM,  /* Tegra 2 PWM controller */
COMPAT_NVIDIA_TEGRA20_DC,   /* Tegra 2 Display controller */
COMPAT_NVIDIA_TEGRA20_SFLASH,   /* Tegra 2 SPI flash controller */
+   COMPAT_NVIDIA_TEGRA20_SLINK,/* Tegra 2 SPI SLINK controller */
 
COMPAT_COUNT,
 };
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 6779278..4fef428 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -46,6 +46,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(NVIDIA_TEGRA20_PWM, "nvidia,tegra20-pwm"),
COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"),
COMPAT(NVIDIA_TEGRA20_SFLASH, "nvidia,tegra20-sflash"),
+   COMPAT(NVIDIA_TEGRA20_SLINK, "nvidia,tegra20-slink"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)
-- 
1.7.10.4

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[U-Boot] [PATCH 3/7] tegra30: add SBC1 to periph id mapping table

2013-01-11 Thread Allen Martin
SBC1 is SPI controller 1 on tegra30

Signed-off-by: Allen Martin 
---
 arch/arm/cpu/tegra30-common/clock.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/tegra30-common/clock.c 
b/arch/arm/cpu/tegra30-common/clock.c
index c67a2e1..db5ac1e 100644
--- a/arch/arm/cpu/tegra30-common/clock.c
+++ b/arch/arm/cpu/tegra30-common/clock.c
@@ -318,7 +318,7 @@ static s8 periph_id_to_internal_id[PERIPH_ID_COUNT] = {
 
/* 40 */
NONE(KFUSE),
-   NONE(SBC1), /* SBC1, 0x34, is this SPI1? */
+   PERIPHC_SBC1,
PERIPHC_NOR,
NONE(RESERVED43),
PERIPHC_SBC2,
-- 
1.7.10.4

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[U-Boot] [PATCH 0/7] tegra: SPI drivers

2013-01-11 Thread Allen Martin
This series updates the tegra20 SPI driver to add fdt support and adds
a new tegra30 SPI driver.  This series depends on the following
patches:

Allen Martin:
fdt: fix dts preprocessor options
tegra: remove IRDA pinmux synonym

Testing was done on seaboard (tegra20) and cardhu (tegra30).

Allen Martin (7):
  tegra: fdt: add apbdma node
  tegra: spi: add fdt support to tegra SPI SFLASH driver
  tegra30: add SBC1 to periph id mapping table
  tegra30: fdt: add SPI SLINK nodes
  tegra: add addresses of SPI SLINK controllers
  tegra: add SPI SLINK driver
  tegra: cardhu: config: enable SPI

 arch/arm/cpu/tegra30-common/clock.c   |2 +-
 arch/arm/dts/tegra20.dtsi |   34 +++
 arch/arm/dts/tegra30.dtsi |  114 +
 arch/arm/include/asm/arch-tegra/tegra.h   |6 +
 arch/arm/include/asm/arch-tegra/tegra_slink.h |   84 +++
 board/nvidia/common/board.c   |3 +-
 drivers/spi/Makefile  |1 +
 drivers/spi/tegra_slink.c |  333 +
 drivers/spi/tegra_spi.c   |   42 +++-
 include/configs/cardhu.h  |   11 +
 include/fdtdec.h  |2 +
 lib/fdtdec.c  |2 +
 12 files changed, 631 insertions(+), 3 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-tegra/tegra_slink.h
 create mode 100644 drivers/spi/tegra_slink.c

-- 
1.7.10.4

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[U-Boot] [PATCH 5/7] tegra: add addresses of SPI SLINK controllers

2013-01-11 Thread Allen Martin
Add I/O addresses of SPI SLINK controllers 1-6

Signed-off-by: Allen Martin 
---
 arch/arm/include/asm/arch-tegra/tegra.h |6 ++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/include/asm/arch-tegra/tegra.h 
b/arch/arm/include/asm/arch-tegra/tegra.h
index 67e6fd0..d2435c1 100644
--- a/arch/arm/include/asm/arch-tegra/tegra.h
+++ b/arch/arm/include/asm/arch-tegra/tegra.h
@@ -40,6 +40,12 @@
 #define NV_PA_APB_UARTE_BASE   (NV_PA_APB_MISC_BASE + 0x6400)
 #define NV_PA_NAND_BASE(NV_PA_APB_MISC_BASE + 0x8000)
 #define NV_PA_SPI_BASE (NV_PA_APB_MISC_BASE + 0xC380)
+#define NV_PA_SLINK1_BASE  (NV_PA_APB_MISC_BASE + 0xD400)
+#define NV_PA_SLINK2_BASE  (NV_PA_APB_MISC_BASE + 0xD600)
+#define NV_PA_SLINK3_BASE  (NV_PA_APB_MISC_BASE + 0xD800)
+#define NV_PA_SLINK4_BASE  (NV_PA_APB_MISC_BASE + 0xDA00)
+#define NV_PA_SLINK5_BASE  (NV_PA_APB_MISC_BASE + 0xDC00)
+#define NV_PA_SLINK6_BASE  (NV_PA_APB_MISC_BASE + 0xDE00)
 #define TEGRA_DVC_BASE (NV_PA_APB_MISC_BASE + 0xD000)
 #define NV_PA_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400)
 #define NV_PA_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400)
-- 
1.7.10.4

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[U-Boot] [PATCH 2/7] tegra: spi: add fdt support to tegra SPI SFLASH driver

2013-01-11 Thread Allen Martin
Add support for configuring tegra SPI driver from devicetree.
Support is keyed off CONFIG_OF_CONTROL.  Add entry in seaboard dts
file for spi controller to describe seaboard spi.

Signed-off-by: Allen Martin 
---
 arch/arm/dts/tegra20.dtsi |   13 +
 drivers/spi/tegra_spi.c   |   42 +-
 include/fdtdec.h  |1 +
 lib/fdtdec.c  |1 +
 4 files changed, 56 insertions(+), 1 deletion(-)

diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index 707975c..8d4c7ec 100644
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -337,4 +337,17 @@
};
};
 
+   spi@7000c380 {
+   compatible = "nvidia,tegra20-sflash";
+   reg = <0x7000c380 0x80>;
+   interrupts = <0 39 0x04>;
+   nvidia,dma-request-selector = <&apbdma 11>;
+   spi-max-frequency = <2500>;
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+   /* PERIPH_ID_SPI1, PLLP_OUT0 */
+   clocks = <&tegra_car 43>;
+   };
+
 };
diff --git a/drivers/spi/tegra_spi.c b/drivers/spi/tegra_spi.c
index 9bb34e2..36b0cd0 100644
--- a/drivers/spi/tegra_spi.c
+++ b/drivers/spi/tegra_spi.c
@@ -32,6 +32,11 @@
 #include 
 #include 
 #include 
+#ifdef CONFIG_OF_CONTROL
+#include 
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
 
 #if defined(CONFIG_SPI_CORRUPTS_UART)
  #define corrupt_delay()   udelay(CONFIG_SPI_CORRUPTS_UART_DLY);
@@ -44,6 +49,7 @@ struct tegra_spi_slave {
struct spi_tegra *regs;
unsigned int freq;
unsigned int mode;
+   int periph_id;
 };
 
 static inline struct tegra_spi_slave *to_tegra_spi(struct spi_slave *slave)
@@ -85,7 +91,41 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned 
int cs,
spi->slave.bus = bus;
spi->slave.cs = cs;
spi->freq = max_hz;
+#ifdef CONFIG_OF_CONTROL
+   int node = fdtdec_next_compatible(gd->fdt_blob, 0,
+ COMPAT_NVIDIA_TEGRA20_SFLASH);
+   if (node < 0) {
+   debug("%s: cannot locate sflash node\n", __func__);
+   return NULL;
+   }
+   spi->regs = (struct spi_tegra *)fdtdec_get_addr(gd->fdt_blob,
+   node, "reg");
+   if ((fdt_addr_t)spi->regs == FDT_ADDR_T_NONE) {
+   debug("%s: no sflash register found\n", __func__);
+   return NULL;
+   }
+   spi->freq = fdtdec_get_int(gd->fdt_blob, node, "spi-max-frequency", 0);
+   if (!spi->freq) {
+   debug("%s: no sflash max frequency found\n", __func__);
+   return NULL;
+   }
+   spi->periph_id = clock_decode_periph_id(gd->fdt_blob, node);
+   if (spi->periph_id == PERIPH_ID_NONE) {
+   debug("%s: could not decode periph id\n", __func__);
+   return NULL;
+   }
+#else
spi->regs = (struct spi_tegra *)NV_PA_SPI_BASE;
+   spi->freq = TEGRA_SPI_MAX_FREQ;
+   spi->periph_id = PERIPH_ID_SPI1;
+#endif
+   if (max_hz < spi->freq) {
+   debug("%s: limiting frequency from %u to %u\n", __func__,
+ spi->freq, max_hz);
+   spi->freq = max_hz;
+   }
+   debug("%s: controller initialized at %p, freq = %u, periph_id = %d\n",
+ __func__, spi->regs, spi->freq, spi->periph_id);
spi->mode = mode;
 
return &spi->slave;
@@ -110,7 +150,7 @@ int spi_claim_bus(struct spi_slave *slave)
u32 reg;
 
/* Change SPI clock to correct frequency, PLLP_OUT0 source */
-   clock_start_periph_pll(PERIPH_ID_SPI1, CLOCK_ID_PERIPH, spi->freq);
+   clock_start_periph_pll(spi->periph_id, CLOCK_ID_PERIPH, spi->freq);
 
/* Clear stale status here */
reg = SPI_STAT_RDY | SPI_STAT_RXF_FLUSH | SPI_STAT_TXF_FLUSH | \
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 70d0e97..1504336 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -70,6 +70,7 @@ enum fdt_compat_id {
COMPAT_NVIDIA_TEGRA20_NAND, /* Tegra2 NAND controller */
COMPAT_NVIDIA_TEGRA20_PWM,  /* Tegra 2 PWM controller */
COMPAT_NVIDIA_TEGRA20_DC,   /* Tegra 2 Display controller */
+   COMPAT_NVIDIA_TEGRA20_SFLASH,   /* Tegra 2 SPI flash controller */
 
COMPAT_COUNT,
 };
diff --git a/lib/fdtdec.c b/lib/fdtdec.c
index 6dba438..6779278 100644
--- a/lib/fdtdec.c
+++ b/lib/fdtdec.c
@@ -45,6 +45,7 @@ static const char * const compat_names[COMPAT_COUNT] = {
COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
COMPAT(NVIDIA_TEGRA20_PWM, "nvidia,tegra20-pwm"),
COMPAT(NVIDIA_TEGRA20_DC, "nvidia,tegra20-dc"),
+   COMPAT(NVIDIA_TEGRA20_SFLASH, "nvidia,tegra20-sflash"),
 };
 
 const char *fdtdec_get_compatible(enum fdt_compat_id id)
-- 
1.7.10.4

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Re: [U-Boot] NAND flash - bad blocks

2013-01-11 Thread Scott Wood

On 01/11/2013 02:46:06 AM, Dimitar Penev wrote:

Hi Scott,


On 01/10/2013 01:56:30 AM, Dimitar Penev wrote:

Hello,

First of all sorry if this question was already answered here.

We are sourcing some K9F8G08U0M-PIB0 NAND flash devices.
On the first erase in uboot 2011.09 I got bunch of mostly  
consecutive bad blocks.
According to the datasheet we should get not more then 80 bad  
blocks  for our chip

but I get something like 240 bad blocks for most of the NAND chips.

I seems to be able to fix this using the following procedure:


Call your NAND vendor and complain?



Well we did but we didn't got something from them which could explain  
what we observe.


After making sure that there's nothing wrong with your NAND driver  
or controller that causes the OOB to be read incorrectly.


We are using nand_plat driver provide by ADI without any  
customization.


Still, do some investigation to see whether it seems to be working.   
Dump the raw data that you read -- is it mostly 0xff with some bad  
block markers set, or is it returning garbage?  Do any of the blocks  
that are not marked bad have non-0xff data?  If you do a scrub of the  
entire NAND chip, then write to one block, does the write show up  
anywhere else on the NAND chip?



In uboot
uboot>nand scrub.chip

In uboot
uboot>nand erase.chip clean
at this point I get usually 1,2 bad blocks which looks normal to me.


You're not fixing anything -- you're wiping out all bad block   
information. Those "1,2 bad blocks" are not actually bad blocks,  
but  are the bad block table which appears "bad" to reserve it.   
These  should be at the end of flash.  Or, possibly, they're blocks  
that  happen to be damaged in a way that prevents the bad block  
marker from  becoming 0xff.


Oh Really?
What about 'nandtest -m' in Linux ? I was hoping it does a check of  
the erase blocks.


That's no substitute for having the factory bad block markers.   
Nandtest doesn't look very rigorous at all -- and only seems to mark  
bad blocks if the erase or write operations return failure, not if it  
sees an uncorrectable error on readback.



Thanks Scott.
Is there any procedure to analyze the nand flash for bad blocks?


Yes, and it's done by the flash manufacturer to produce bad block  
markers. :-P


-Scott
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[U-Boot] [PATCH] configs: omap4_common: support load from uEnv.txt

2013-01-11 Thread Nishanth Menon
if traditionally used boot.scr is not found see if uEnv.txt
is available to load environment. uenvcmd is executed after load
of uEnv.txt if it is defined in the environment text file

Signed-off-by: Nishanth Menon 
---
 include/configs/omap4_common.h |   12 
 1 file changed, 12 insertions(+)

diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
index a32369a..8b71beb 100644
--- a/include/configs/omap4_common.h
+++ b/include/configs/omap4_common.h
@@ -159,6 +159,10 @@
"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
"source ${loadaddr}\0" \
+   "bootenv=uEnv.txt\0" \
+   "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
+   "importbootenv=echo Importing environment from mmc ...; " \
+   "env import -t $loadaddr $filesize\0" \
"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
"mmcboot=echo Booting from mmc${mmcdev} ...; " \
"run mmcargs; " \
@@ -169,6 +173,14 @@
"if run loadbootscript; then " \
"run bootscript; " \
"else " \
+   "if run loadbootenv; then " \
+   "echo Loaded environment from ${bootenv};" \
+   "run importbootenv;" \
+   "if test -n $uenvcmd; then " \
+   "echo Running uenvcmd ...;" \
+   "run uenvcmd;" \
+   "fi;" \
+   "fi;" \
"if run loaduimage; then " \
"run mmcboot; " \
"fi; " \
-- 
1.7.9.5

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Re: [U-Boot] [PATCH] configs: omap4_common: support load from uEnv.txt

2013-01-11 Thread Nishanth Menon
On 14:39-20130111, Nishanth Menon wrote:
> if traditionally used boot.scr is not found see if uEnv.txt
> is available to load environment. uenvcmd is executed after load
> of uEnv.txt if it is defined in the environment text file
> 
> Signed-off-by: Nishanth Menon 
> ---
>  include/configs/omap4_common.h |   12 
>  1 file changed, 12 insertions(+)
> 
> diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
> index a32369a..8b71beb 100644
> --- a/include/configs/omap4_common.h
> +++ b/include/configs/omap4_common.h
> @@ -159,6 +159,10 @@
>   "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
>   "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
>   "source ${loadaddr}\0" \
> + "bootenv=uEnv.txt\0" \
> + "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
> + "importbootenv=echo Importing environment from mmc ...; " \
> + "env import -t $loadaddr $filesize\0" \
>   "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
>   "mmcboot=echo Booting from mmc${mmcdev} ...; " \
>   "run mmcargs; " \
> @@ -169,6 +173,14 @@
>   "if run loadbootscript; then " \
>   "run bootscript; " \
>   "else " \
> + "if run loadbootenv; then " \
> + "echo Loaded environment from ${bootenv};" \
> + "run importbootenv;" \
> + "if test -n $uenvcmd; then " \
> + "echo Running uenvcmd ...;" \
> + "run uenvcmd;" \
> + "fi;" \
> + "fi;" \
>   "if run loaduimage; then " \
>   "run mmcboot; " \
>   "fi; " \
> -- 
> 1.7.9.5
> 
Thanks to Tom pointing in IRC, patch
http://patchwork.ozlabs.org/patch/209925/
prefer that patch be merged instead of mine.

-- 
Regards,
Nishanth Menon
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Re: [U-Boot] [PATCH 16/18] mxs: Add MX23 olinuxino board support

2013-01-11 Thread Fabio Estevam
Hi Marek,

On Fri, Jan 11, 2013 at 11:19 AM, Marek Vasut  wrote:
> This patch adds support for MX23-based Olinuxino board.
>
> Signed-off-by: Marek Vasut 
> Cc: Fabio Estevam 
> Cc: Otavio Salvador 
> Cc: Stefano Babic 
> ---
>  board/olimex/mx23_olinuxino/Makefile |   47 +
>  board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++
>  board/olimex/mx23_olinuxino/spl_boot.c   |   90 +
>  boards.cfg   |1 +
>  include/configs/mx23_olinuxino.h |  136 
> ++

You missed an entry in MAINTAINER file.

>  5 files changed, 325 insertions(+)
>  create mode 100644 board/olimex/mx23_olinuxino/Makefile

Can't we name it 'mx23olinuxino', without the underscore ?

>  create mode 100644 board/olimex/mx23_olinuxino/mx23_olinuxino.c
>  create mode 100644 board/olimex/mx23_olinuxino/spl_boot.c
>  create mode 100644 include/configs/mx23_olinuxino.h
>
> diff --git a/board/olimex/mx23_olinuxino/Makefile 
> b/board/olimex/mx23_olinuxino/Makefile
> new file mode 100644
> index 000..ff41cff
> --- /dev/null
> +++ b/board/olimex/mx23_olinuxino/Makefile
> @@ -0,0 +1,47 @@
> +#
> +# (C) Copyright 2000-2006
> +# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB= $(obj)lib$(BOARD).o
> +
> +ifndef CONFIG_SPL_BUILD
> +COBJS  := mx23_olinuxino.o
> +else
> +COBJS  := spl_boot.o
> +endif
> +
> +SRCS   := $(COBJS:.o=.c)
> +OBJS   := $(addprefix $(obj),$(COBJS))
> +
> +$(LIB):$(obj).depend $(OBJS)
> +   $(call cmd_link_o_target, $(OBJS))
> +
> +#
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#
> diff --git a/board/olimex/mx23_olinuxino/mx23_olinuxino.c 
> b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
> new file mode 100644
> index 000..2fcad26
> --- /dev/null
> +++ b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
> @@ -0,0 +1,51 @@
> +/*
> + * Olimex MX23 Olinuxino board
> + *
> + * Copyright (C) 2013 Marek Vasut 
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include 
> +#include 
> +#include 
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +/*
> + * Functions
> + */
> +int board_early_init_f(void)
> +{
> +   /* SSP clock init will come here soon. */
> +   return 0;
> +}
> +
> +int dram_init(void)
> +{
> +   return mxs_dram_init();
> +}
> +
> +int board_init(void)
> +{
> +   /* Adress of boot parameters */
> +   gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
> +
> +   return 0;
> +}
> diff --git a/board/olimex/mx23_olinuxino/spl_boot.c 
> b/board/olimex/mx23_olinuxino/spl_boot.c
> new file mode 100644
> index 000..aaebe6c
> --- /dev/null
> +++ b/board/olimex/mx23_olinuxino/spl_boot.c
> @@ -0,0 +1,90 @@
> +/*
> + * Olimex MX23 Olinuxino Boot setup
> + *
> + * Copyright (C) 2013 Marek Vasut 
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your optio

Re: [U-Boot] [PATCH v2 1/1] omap4: allow the use of a plain text env file instead boot scripts

2013-01-11 Thread Nishanth Menon
On Mon, Jan 7, 2013 at 7:51 AM, Javier Martinez Canillas
 wrote:
> For production systems it is better to use script images since
> they are protected by checksums and carry valuable information like
> name and timestamp. Also, you can't validate the content passed to
> env import.
>
> But for development, it is easier to use the env import command and
> plain text files instead of script-images.
>
> Since both OMAP4 supported boards (Panda and TI SDP4430) are used
> primarily for development, this patch allows U-Boot to load env var
> from a text file in case that an boot.scr script-image is not present.
>
> The variable uenvcmd (if existent) will be executed (using run) after
> uEnv.txt was loaded. If uenvcmd doesn't exist the default boot sequence
> will be started.
>
> Signed-off-by: Javier Martinez Canillas 
Acked-by: Nishanth Menon 

Tested on PandaBoard ES.
Regards,
Nishanth Menon
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Re: [U-Boot] please pull u-boot-samsung master

2013-01-11 Thread Albert ARIBAUD
Hi Minkyu,

On Fri, 11 Jan 2013 17:23:10 +0900, Minkyu Kang 
wrote:
> Dear Albert,
> 
>   Merge samsung, imx, tegra into u-boot-arm/master (2012-12-22 11:59:14 +0100)
> 
> are available in the git repository at:
> 
> 
>   git://git.denx.de/u-boot-samsung master
> 
> for you to fetch changes up to a2468dedef569863e1243e802fbe3aa7565e1de1:
> 
>   EXYNOS5: Enable console multiplexing in u-boot (2013-01-11 17:15:04 +0900)
> 
> 
> Ajay Kumar (6):
>   EXYNOS5: Add support for FIMD and DP
>   EXYNOS5: Change parent clock of FIMD to MPLL
>   EXYNOS: Add dummy definition to fix compilation dependency on 
> CONFIG_EXYNOS_MIPI_DSIM
>   video: Modify exynos_fimd driver to support LCD console
>   EXYNOS5: Make all display related code dependent on CONFIG_LCD
>   EXYNOS5: Enable console multiplexing in u-boot
> 
> Chander Kashyap (4):
>   EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses
>   EXYNOS: EXYNOS4X12: Add clock structure for EXYNOS4X12
>   EXYNOS: EXYNOS4X12: Add gpio structure for EXYNOS4X12
>   EXYNOS: EXYNOS4X12: extract Exynos4x12 IPs clock frequency
> 
> Hatim RV (5):
>   EXYNOS5: FDT: add initial dts file for EXYNOS5250, SMDK5250
>   fdt: exynos5: Add DT node definition for SROM and SMSC9215
>   exynos5: Add DT based driver for SMC911X ethernet
>   exynos5: config: Rename the smdk5250.h to exynos5250-dt.h
>   SMDK5250: config: Add configuration file for SMDK5250 board
> 
> Jaehoon Chung (2):
>   Exynos: clock: support get_mmc_clk for exynos
>   Exynos: clock: add CLK_DIV_FSYS3 at set_mmc_clk
> 
> Piotr Wilczek (1):
>   arm:exynos4:pinmux: Modify the gpio function for mmc
> 
> Rajeshwari Shinde (22):
>   EXYNOS5: FDT: Add I2C device node data
>   EXYNOS5 : FDT: Add Aliases for I2C device
>   FDT: Add compatible string for I2C
>   EXYNOS5: FDT : Decode peripheral id
>   I2C: Driver changes for FDT support
>   SMDK5250: Initialise I2C using FDT
>   EXYNOS5: FDT: Add sound device node data
>   EXYNOS5: FDT: Add sound and codec device node
>   EXYNOS5: FDT: Add compatible strings for sound
>   Sound: Add FDT support to driver
>   Sound: WM8994: Add FDT support to codec
>   Sound: Add FDT support to CMD.
>   EXYNOS5: FDT: Add compatible strings for SPI
>   EXYNOS5 : FDT: Add Aliases for SPI device
>   EXYNOS5: FDT: Add SPI device node data
>   SPI: EXYNOS: Add FDT support to driver.
>   EHCI: Exynos: Add fdt support
>   EXYNOS5: Add device node for USB.
>   EXYNOS5: FDT: Add compatible strings for USB
>   EXYNOS5: FDT: Add compatible strings for PMIC
>   EXYNOS5: Add device node for PMIC
>   PMIC: MAX77686: Add FDT Support
> 
> Vivek Gautam (1):
>   SMDK5250: Enable VBus for USB 2.0 controller
> 
> Łukasz Majewski (2):
>   spl:falcon:trats Update Trats default board configuration file to 
> support FALCON MODE
>   video:cache:fix: Enable dcache flush at LCD subsystem for Exynos based 
> boards
> 
>  arch/arm/cpu/armv7/exynos/clock.c|  272 +-
>  arch/arm/cpu/armv7/exynos/pinmux.c   |   74 ++
>  arch/arm/dts/exynos5250.dtsi |  154 
>  arch/arm/include/asm/arch-exynos/clk.h   |1 +
>  arch/arm/include/asm/arch-exynos/clock.h |  276 ++
>  arch/arm/include/asm/arch-exynos/cpu.h   |   48 +++-
>  arch/arm/include/asm/arch-exynos/dp_info.h   |2 +
>  arch/arm/include/asm/arch-exynos/gpio.h  |   85 +++
>  arch/arm/include/asm/arch-exynos/mipi_dsim.h |7 +
>  arch/arm/include/asm/arch-exynos/periph.h|   33 +--
>  arch/arm/include/asm/arch-exynos/pinmux.h|8 +
>  arch/arm/include/asm/arch-exynos/sromc.h |   18 ++
>  board/samsung/dts/exynos5250-smdk5250.dts|   69 ++
>  board/samsung/smdk5250/smdk5250.c|  237 +++
>  board/samsung/trats/trats.c  |2 +-
>  common/cmd_sound.c   |2 +-
>  doc/device-tree-bindings/exynos/isp-spi.txt  |   22 ++
>  doc/device-tree-bindings/exynos/sound.txt|   27 +++
>  drivers/i2c/s3c24x0_i2c.c|   83 ++-
>  drivers/i2c/s3c24x0_i2c.h|8 +
>  drivers/power/pmic/pmic_max77686.c   |   37 ++-
>  drivers/sound/sound.c|  171 --
>  drivers/sound/wm8994.c   |   74 +-
>  drivers/sound/wm8994.h   |6 +-
>  drivers/spi/exynos_spi.c |   96 +++-
>  drivers/usb/host/ehci-exynos.c   |   92 +++-
>  drivers/video/exynos_fb.c|5 +
>  drivers/video/exynos_fimd.c  |   12 +-
>  include/configs/exynos5250-dt.h  |  321 
> ++
>  include/configs/smdk5250.h   |  278 +-
>  include/

[U-Boot] Pull request: u-boot-arm/master

2013-01-11 Thread Albert ARIBAUD
Hello Tom,

The following changes since commit
61bdb9133593f0f881a57232039296f64bd662ed:

  arm: remove useless code in start.S files (2013-01-08 22:14:54 +0100)

are available in the git repository at:

  git://git.denx.de/u-boot-arm.git master

for you to fetch changes up to 59ee45ee91cc91b392a8e2684bfcb8c933ce4967:

  Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' (2013-01-11
  18:17:33 +0100)



Albert ARIBAUD (6):
  mv88e61xx: refactor PHY and SWITCH level-code
  kirkwood: make MPP arrays static const
  ARM: lacie_kw: add support for WIRELESS_SPACE
  Merge branch 'u-boot-marvell/master' into 'u-boot-arm/master'
  Merge 'u-boot-atmel/master' into 'u-boot-arm/master'
  Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'

Andreas Bießmann (1):
  mv-common.h: increase malloc arena to 4MiB

Arun Mankuzhi (1):
  arm: move flush_dcache_all() to just before disable cache

Bo Shen (1):
  spi: atmel: sam9m10g45 also support WDRBT bit

Gabe Black (1):
  arm: Keep track of the tlb size as well as its location

Holger Brunck (3):
  arm/km: fix memory settings
  km/common: drop unneeded std* environment variables
  km/common: cosmetic change reported from checkpatch

Javier Martinez Canillas (3):
  OMAP3: igep00x0: add CONFIG_SPL_BOARD_INIT for
CONFIG_SPL_NAND_SUPPORT serial/ns16550: add an option to avoid hanging
on broken platforms OMAP3: igep00x0: add CONFIG_SYS_NS16550_BROKEN_TEMT

Luke Lowrey (1):
  arch-kirkwood: Ethernet port macro returning incorrect address

Michael Walle (1):
  lsxl: unset ncip for rescue mode

Nishanth Menon (1):
  Makefile: remove MLO.byteswap on clobber

Richard Genoud (3):
  at91sam9x5: enable USB support for 9x5ek board.
  at91sam9x5ek: regroup FAT/DOS features
  at91sam9x5ek: add USB configuration

Simon Glass (6):
  arm: Move fdt check earlier so that board_early_init_f() can use
it arm: Add CONFIG_DELAY_ENVIRONMENT to delay environment loading
  Document the CONFIG_DISPLAY_BOARDINFO option
  arm: Add CONFIG_DISPLAY_BOARDINFO_LATE to display board info on
LCD Add option to display customised memory information
  arm: Move bootstage record for board_init_f() to after
arch_cpu_init()

Taylor Hutt (1):
  arm: Tabify code for MMC initialization

Tom Wai-Hong Tam (1):
  arm: Make interrupts.o and reset.o in libarm also appear in SPL

Valentin Longchamp (1):
  arm/km: remove duplicate code

 Makefile |2 +-
 README   |   28 ++
 arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c |   13 +
 arch/arm/cpu/arm926ejs/kirkwood/mpp.c|2 +-
 arch/arm/include/asm/arch-at91/at91sam9x5.h  |2 +
 arch/arm/include/asm/arch-kirkwood/cpu.h |2 +-
 arch/arm/include/asm/arch-kirkwood/mpp.h |2 +-
 arch/arm/include/asm/global_data.h   |1 +
 arch/arm/lib/Makefile|5 +-
 arch/arm/lib/board.c |   75 +++-
 arch/arm/lib/cache-cp15.c|5 +-
 board/LaCie/net2big_v2/net2big_v2.c  |2 +-
 board/LaCie/netspace_v2/netspace_v2.c|2 +-
 board/LaCie/wireless_space/Makefile  |   46 ++
 board/LaCie/wireless_space/kwbimage.cfg  |   82 
 board/LaCie/wireless_space/wireless_space.c  |  176 
 board/Marvell/dreamplug/dreamplug.c  |2 +-
 board/Marvell/guruplug/guruplug.c|2 +-
 board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c  |2 +-
 board/Marvell/openrd/openrd.c|2 +-
 board/Marvell/rd6281a/rd6281a.c  |2 +-
 board/Marvell/sheevaplug/sheevaplug.c|2 +-
 board/Seagate/dockstar/dockstar.c|2 +-
 board/atmel/at91sam9x5ek/at91sam9x5ek.c  |3 +
 board/buffalo/lsxl/lsxl.c|7 +-
 board/cloudengines/pogo_e02/pogo_e02.c   |2 +-
 board/d-link/dns325/dns325.c |2 +-
 board/iomega/iconnect/iconnect.c |2 +-
 board/karo/tk71/tk71.c   |2 +-
 board/keymile/common/common.c|2 +-
 board/keymile/km_arm/km_arm.c|   16 +-
 board/keymile/km_arm/kwbimage-memphis.cfg|6 +-
 board/keymile/km_arm/kwbimage.cfg|6 +-
 board/keymile/km_arm/kwbimage_128M16_1.cfg   |   25 +-
 board/keymile/km_arm/kwbimage_256M8_1.cfg|   25 +-
 board/raidsonic/ib62x0/ib62x0.c  |2 +-
 boards.cfg   |1 +
 common/cmd_mem.c |   27 ++
 drivers/net/phy/mv88e61xx.c  |  495
 ++
 drivers/net/phy/mv88e61xx.h  |   39 +-
 drivers/serial/ns16550.c  

Re: [U-Boot] [PATCH V3 1/1] mx31/mx35/mx51/mx53/mx6: add watchdog

2013-01-11 Thread Troy Kisky

On 10/28/2012 4:48 AM, Stefano Babic wrote:

On 23/10/2012 03:19, Troy Kisky wrote:

Use a common watchdog driver for all these cpus.

Signed-off-by: Troy Kisky 

---
v2: add README.watchdog
include mx31/mx35 watchdogs
move to drivers/watchdog

v3: change drivers/watchdog/Makefile to list relevant soc's
Please test on a mx31 and mx35 board.
qong and mx31pdk would be best!!
---
  arch/arm/cpu/arm1136/mx31/timer.c |   39 -
  arch/arm/cpu/arm1136/mx35/generic.c   |6 ---
  arch/arm/imx-common/cpu.c |5 ---
  arch/arm/include/asm/arch-mx31/clock.h|2 -
  arch/arm/include/asm/arch-mx31/imx-regs.h |   13 +-
  arch/arm/include/asm/arch-mx35/imx-regs.h |   11 +
  arch/arm/include/asm/arch-mx5/imx-regs.h  |   10 -
  board/davedenx/qong/qong.c|9 +---
  board/freescale/mx31pdk/mx31pdk.c |9 +---
  board/hale/tt01/tt01.c|2 +-
  doc/README.watchdog   |   29 +
  drivers/watchdog/Makefile |3 ++
  drivers/watchdog/imx_watchdog.c   |   66 +
  include/configs/mx31pdk.h |1 +
  include/configs/qong.h|1 +
  include/watchdog.h|1 +
  16 files changed, 106 insertions(+), 101 deletions(-)
  create mode 100644 doc/README.watchdog
  create mode 100644 drivers/watchdog/imx_watchdog.c



Applied to u-boot-imx, thanks.

Best regards,
Stefano Babic



Has this patch been dropped??


Thanks
Troy

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[U-Boot] [PATCH 16/18 V2] mxs: Add MX23 olinuxino board support

2013-01-11 Thread Marek Vasut
This patch adds support for MX23-based Olinuxino board.

Signed-off-by: Marek Vasut 
Cc: Fabio Estevam 
Cc: Otavio Salvador 
Cc: Stefano Babic 
---
 MAINTAINERS  |1 +
 board/olimex/mx23_olinuxino/Makefile |   47 +
 board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++
 board/olimex/mx23_olinuxino/spl_boot.c   |   90 +
 boards.cfg   |1 +
 include/configs/mx23_olinuxino.h |  133 ++
 6 files changed, 323 insertions(+)
 create mode 100644 board/olimex/mx23_olinuxino/Makefile
 create mode 100644 board/olimex/mx23_olinuxino/mx23_olinuxino.c
 create mode 100644 board/olimex/mx23_olinuxino/spl_boot.c
 create mode 100644 include/configs/mx23_olinuxino.h

V2: Add MAINTAINERS entry
Remove CONFIG_MACH_TYPE (as this board is DT-only)

diff --git a/MAINTAINERS b/MAINTAINERS
index 36b47b7..08daa28 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -935,6 +935,7 @@ Marek Vasut 
palmtc  xscale/pxa
vpac270 xscale/pxa
zipitz2 xscale/pxa
+   mx23_olinuxino  i.MX23
m28evk  i.MX28
sc_sps_1i.MX28
 
diff --git a/board/olimex/mx23_olinuxino/Makefile 
b/board/olimex/mx23_olinuxino/Makefile
new file mode 100644
index 000..ff41cff
--- /dev/null
+++ b/board/olimex/mx23_olinuxino/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+ifndef CONFIG_SPL_BUILD
+COBJS  := mx23_olinuxino.o
+else
+COBJS  := spl_boot.o
+endif
+
+SRCS   := $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/olimex/mx23_olinuxino/mx23_olinuxino.c 
b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
new file mode 100644
index 000..2fcad26
--- /dev/null
+++ b/board/olimex/mx23_olinuxino/mx23_olinuxino.c
@@ -0,0 +1,51 @@
+/*
+ * Olimex MX23 Olinuxino board
+ *
+ * Copyright (C) 2013 Marek Vasut 
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Functions
+ */
+int board_early_init_f(void)
+{
+   /* SSP clock init will come here soon. */
+   return 0;
+}
+
+int dram_init(void)
+{
+   return mxs_dram_init();
+}
+
+int board_init(void)
+{
+   /* Adress of boot parameters */
+   gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
+
+   return 0;
+}
diff --git a/board/olimex/mx23_olinuxino/spl_boot.c 
b/board/olimex/mx23_olinuxino/spl_boot.c
new file mode 100644
index 000..aaebe6c
--- /dev/null
+++ b/board/olimex/mx23_olinuxino/spl_boot.c
@@ -0,0 +1,90 @@
+/*
+ * Olimex MX23 Olinuxino Boot setup
+ *
+ * Copyright (C) 2013 Marek Vasut 
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at yo

Re: [U-Boot] [PATCH 16/18] mxs: Add MX23 olinuxino board support

2013-01-11 Thread Marek Vasut
Dear Fabio Estevam,

> Hi Marek,
> 
> On Fri, Jan 11, 2013 at 11:19 AM, Marek Vasut  wrote:
> > This patch adds support for MX23-based Olinuxino board.
> > 
> > Signed-off-by: Marek Vasut 
> > Cc: Fabio Estevam 
> > Cc: Otavio Salvador 
> > Cc: Stefano Babic 
> > ---
> > 
> >  board/olimex/mx23_olinuxino/Makefile |   47 +
> >  board/olimex/mx23_olinuxino/mx23_olinuxino.c |   51 ++
> >  board/olimex/mx23_olinuxino/spl_boot.c   |   90 +
> >  boards.cfg   |1 +
> >  include/configs/mx23_olinuxino.h |  136
> >  ++
> 
> You missed an entry in MAINTAINER file.
> 
> >  5 files changed, 325 insertions(+)
> >  create mode 100644 board/olimex/mx23_olinuxino/Makefile
> 
> Can't we name it 'mx23olinuxino', without the underscore ?

No, since there'll be a13_olinuxino etc. Is there any particular reason for why 
you'd like to see this change?

Best regards,
Marek Vasut
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[U-Boot] [PATCH] mxs: Linux uses ttyAMA0 as DUART

2013-01-11 Thread Marek Vasut
Replace use of ttyAM0 with ttyAMA0 as default serial console.

Signed-off-by: Marek Vasut 
Cc: Stefano Babic 
---
 include/configs/m28evk.h |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index 6887171..d34e970 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -274,7 +274,7 @@
 #defineCONFIG_SETUP_MEMORY_TAGS
 #defineCONFIG_BOOTDELAY3
 #defineCONFIG_BOOTFILE "uImage"
-#defineCONFIG_BOOTARGS "console=ttyAM0,115200n8 "
+#defineCONFIG_BOOTARGS "console=ttyAMA0,115200n8 "
 #defineCONFIG_BOOTCOMMAND  "run bootcmd_net"
 #defineCONFIG_LOADADDR 0x4200
 #defineCONFIG_SYS_LOAD_ADDRCONFIG_LOADADDR
-- 
1.7.10.4

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Re: [U-Boot] Pull request: u-boot-arm/master

2013-01-11 Thread Tom Rini
On Fri, Jan 11, 2013 at 10:36:06PM +0100, Albert ARIBAUD wrote:

> Hello Tom,
> 
> The following changes since commit
> 61bdb9133593f0f881a57232039296f64bd662ed:
> 
>   arm: remove useless code in start.S files (2013-01-08 22:14:54 +0100)
> 
> are available in the git repository at:
> 
>   git://git.denx.de/u-boot-arm.git master
> 
> for you to fetch changes up to 59ee45ee91cc91b392a8e2684bfcb8c933ce4967:
> 
>   Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' (2013-01-11
>   18:17:33 +0100)
> 
> 
> 
> Albert ARIBAUD (6):
>   mv88e61xx: refactor PHY and SWITCH level-code
>   kirkwood: make MPP arrays static const
>   ARM: lacie_kw: add support for WIRELESS_SPACE
>   Merge branch 'u-boot-marvell/master' into 'u-boot-arm/master'
>   Merge 'u-boot-atmel/master' into 'u-boot-arm/master'
>   Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'
> 
> Andreas Bie??mann (1):
>   mv-common.h: increase malloc arena to 4MiB
> 
> Arun Mankuzhi (1):
>   arm: move flush_dcache_all() to just before disable cache
> 
> Bo Shen (1):
>   spi: atmel: sam9m10g45 also support WDRBT bit
> 
> Gabe Black (1):
>   arm: Keep track of the tlb size as well as its location
> 
> Holger Brunck (3):
>   arm/km: fix memory settings
>   km/common: drop unneeded std* environment variables
>   km/common: cosmetic change reported from checkpatch
> 
> Javier Martinez Canillas (3):
>   OMAP3: igep00x0: add CONFIG_SPL_BOARD_INIT for
> CONFIG_SPL_NAND_SUPPORT serial/ns16550: add an option to avoid hanging
> on broken platforms OMAP3: igep00x0: add CONFIG_SYS_NS16550_BROKEN_TEMT
> 
> Luke Lowrey (1):
>   arch-kirkwood: Ethernet port macro returning incorrect address
> 
> Michael Walle (1):
>   lsxl: unset ncip for rescue mode
> 
> Nishanth Menon (1):
>   Makefile: remove MLO.byteswap on clobber
> 
> Richard Genoud (3):
>   at91sam9x5: enable USB support for 9x5ek board.
>   at91sam9x5ek: regroup FAT/DOS features
>   at91sam9x5ek: add USB configuration
> 
> Simon Glass (6):
>   arm: Move fdt check earlier so that board_early_init_f() can use
> it arm: Add CONFIG_DELAY_ENVIRONMENT to delay environment loading
>   Document the CONFIG_DISPLAY_BOARDINFO option
>   arm: Add CONFIG_DISPLAY_BOARDINFO_LATE to display board info on
> LCD Add option to display customised memory information
>   arm: Move bootstage record for board_init_f() to after
> arch_cpu_init()
> 
> Taylor Hutt (1):
>   arm: Tabify code for MMC initialization
> 
> Tom Wai-Hong Tam (1):
>   arm: Make interrupts.o and reset.o in libarm also appear in SPL
> 
> Valentin Longchamp (1):
>   arm/km: remove duplicate code
> 
>  Makefile |2 +-
>  README   |   28 ++
>  arch/arm/cpu/arm926ejs/at91/at91sam9x5_devices.c |   13 +
>  arch/arm/cpu/arm926ejs/kirkwood/mpp.c|2 +-
>  arch/arm/include/asm/arch-at91/at91sam9x5.h  |2 +
>  arch/arm/include/asm/arch-kirkwood/cpu.h |2 +-
>  arch/arm/include/asm/arch-kirkwood/mpp.h |2 +-
>  arch/arm/include/asm/global_data.h   |1 +
>  arch/arm/lib/Makefile|5 +-
>  arch/arm/lib/board.c |   75 +++-
>  arch/arm/lib/cache-cp15.c|5 +-
>  board/LaCie/net2big_v2/net2big_v2.c  |2 +-
>  board/LaCie/netspace_v2/netspace_v2.c|2 +-
>  board/LaCie/wireless_space/Makefile  |   46 ++
>  board/LaCie/wireless_space/kwbimage.cfg  |   82 
>  board/LaCie/wireless_space/wireless_space.c  |  176 
>  board/Marvell/dreamplug/dreamplug.c  |2 +-
>  board/Marvell/guruplug/guruplug.c|2 +-
>  board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c  |2 +-
>  board/Marvell/openrd/openrd.c|2 +-
>  board/Marvell/rd6281a/rd6281a.c  |2 +-
>  board/Marvell/sheevaplug/sheevaplug.c|2 +-
>  board/Seagate/dockstar/dockstar.c|2 +-
>  board/atmel/at91sam9x5ek/at91sam9x5ek.c  |3 +
>  board/buffalo/lsxl/lsxl.c|7 +-
>  board/cloudengines/pogo_e02/pogo_e02.c   |2 +-
>  board/d-link/dns325/dns325.c |2 +-
>  board/iomega/iconnect/iconnect.c |2 +-
>  board/karo/tk71/tk71.c   |2 +-
>  board/keymile/common/common.c|2 +-
>  board/keymile/km_arm/km_arm.c|   16 +-
>  board/keymile/km_arm/kwbimage-memphis.cfg|6 +-
>  board/keymile/km_arm/kwbimage.cfg|6 +-
>  board/keymile/km_arm/kwbimage_128M16_1.cfg   |   25 +-
>  board/keymile/km_arm/kwbimage_256M8_1.cfg|   25 +-
>  board/raidsonic/ib62x0/ib62x0.c  |2 

Re: [U-Boot] [PATCH 1/1] m68k/lib: fix serial driver relocation

2013-01-11 Thread Tom Rini
On Fri, Jan 11, 2013 at 03:45:26PM +0100, Jens Scharsig wrote:
> Am 2012-11-23 23:23, schrieb Angelo Dureghello:
> > Fix coldfire serial driver bindings no more relocated to ram after last
> > changes to drivers/serial/serial.c (regression).
> > Serial initialization in ram has to be called after that gd->reloc_off is
> > calculated.
> > 
> > Signed-off-by: Angelo Dureghello 
> > Cc: Jason Jin 
> > ---
> > diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c
> > index 02d73fd..373570c 100644
> > --- a/arch/m68k/lib/board.c
> > +++ b/arch/m68k/lib/board.c
> > @@ -402,14 +402,14 @@ void board_init_r (gd_t *id, ulong dest_addr)
> > 
> > gd->flags |= GD_FLG_RELOC;  /* tell others: relocation done */
> > 
> > -   serial_initialize();
> > -
> > debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
> > 
> > WATCHDOG_RESET ();
> > 
> > gd->reloc_off =  dest_addr - CONFIG_SYS_MONITOR_BASE;
> > 
> > +   serial_initialize();
> > +
> > monitor_flash_len = (ulong)&__init_end - dest_addr;
> > 
> >  #if defined(CONFIG_NEEDS_MANUAL_RELOC)
> > 
> 
> Acked-by: Jens Scharsig (BuS Elektronik) 
> Tested-by: Jens Scharsig (BuS Elektronik) 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [U-Boot] [PATCH 1/7] tegra: fdt: add apbdma node

2013-01-11 Thread Stephen Warren
On 01/11/2013 11:44 AM, Allen Martin wrote:
> Add apbdma node for tegra20 and tegra30, copied directly from tegra
> Linux dtsi files.

> diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi

> + apbdma: dma {
> + compatible = "nvidia,tegra20-apbdma";
> + reg = <0x6000a000 0x1200>;
...
>   intc: interrupt-controller@50041000 {

Can the nodes be kept sorted by address?

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Re: [U-Boot] [PATCH 2/7] tegra: spi: add fdt support to tegra SPI SFLASH driver

2013-01-11 Thread Stephen Warren
On 01/11/2013 11:44 AM, Allen Martin wrote:
> Add support for configuring tegra SPI driver from devicetree.
> Support is keyed off CONFIG_OF_CONTROL.  Add entry in seaboard dts
> file for spi controller to describe seaboard spi.

> diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi

.dtsi changes would typically be in a separate patch.

> + spi@7000c380 {
> + compatible = "nvidia,tegra20-sflash";
> + reg = <0x7000c380 0x80>;
> + interrupts = <0 39 0x04>;
> + nvidia,dma-request-selector = <&apbdma 11>;

> + spi-max-frequency = <2500>;

spi-max-frequency is board-specific; it should appear in the board .dts
file not the SoC .dtsi file.

> diff --git a/drivers/spi/tegra_spi.c b/drivers/spi/tegra_spi.c

> @@ -85,7 +91,41 @@ struct spi_slave *spi_setup_slave(unsigned int bus, 
> unsigned int cs,
>   spi->slave.bus = bus;
>   spi->slave.cs = cs;
>   spi->freq = max_hz;
> +#ifdef CONFIG_OF_CONTROL
> + int node = fdtdec_next_compatible(gd->fdt_blob, 0,
> +   COMPAT_NVIDIA_TEGRA20_SFLASH);

I assume this function gets called once, and hence the line above simply
finds the first sflash node in the device tree. What if there's more
than one node? There certainly can be more than one SPI controller,
although perhaps the sflash controller only has one instance on any
current chip and it's the other IP block ("SPI") that has multiple
instances in practice.
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