Re: [U-Boot] [PATCH 2/2 v3] arm: suen3, suen3_v1, mgcoge2_arm_p1a support
Hello Prafulla, tahnks for your quick response! Prafulla Wadaskar wrote: >> -Original Message- >> From: Heiko Schocher [mailto:h...@denx.de] >> Sent: Wednesday, February 10, 2010 12:39 PM >> To: Prafulla Wadaskar >> Cc: U-Boot user list >> Subject: Re: [PATCH 2/2 v3] arm: suen3, suen3_v1, >> mgcoge2_arm_p1a support >> >> Hello Prafulla, >> >> do you have some comments on the following 2 points? >> (If they are clarified, I can post v4 of the patch ...) >> >> Heiko Schocher wrote: >>> Prafulla Wadaskar wrote: > -Original Message- > From: Heiko Schocher [mailto:h...@denx.de] > Sent: Monday, February 01, 2010 1:07 PM > To: U-Boot user list > Cc: Wolfgang Denk; Prafulla Wadaskar; Tom > Subject: [PATCH 2/2 v3] arm: suen3, suen3_v1, >> mgcoge2_arm_p1a support > ...snip... the include/config files indicates that there are five >> board supports. Please provide one patch for each board, may be first will >> be master one. >>> This question also asked Tom, see: >>> >>> http://lists.denx.de/pipermail/u-boot/2010-January/067182.html >>> >>> But if you prefer to split this in 5 patches, I can do it. >> Is it OK in one patch, or should I split it in 4 patches? > > Dear Heiko > > You should split it in patches as per boards supported, if you are supporting > four board then there should be four different patches. OK. >> [...] > diff --git a/board/keymile/km_arm/sdramregs.txt > b/board/keymile/km_arm/sdramregs.txt > new file mode 100644 > index 000..68c53a7 > --- /dev/null > +++ b/board/keymile/km_arm/sdramregs.txt > @@ -0,0 +1,31 @@ What is this file? Which license? Who is using it? >>> Ok, you are right, some comments are here necessary. >>> >>> On this boards is a preloader, which initializes >>> the RAM. Therefore the preloader reads the RAM settings >>> from the image he should load, through an hear. This >>> header is created with a tool doimage (I think it is >>> from marvell), and this tool needs this file ... > > Marvell Kirkwood has internal bootROM and it may be active through h/w > configuration on you board. > In such case bootROM tries to read Kirkwood boot image (i.e. kwbimage) from > boot media (i.e. NAND/SPI/Sata etc). > > So kwbimage.cfg (the above file that you have created) should be present in > board folder and this will be used by mkimage tool if you create u-boot.kwb > target. Ah, OK! >>> So, I have no idea where to put this files, and think >>> they are in the board directory on the right place ... > > Please refer docs/README.kwbimage Ok, found it, thanks >>> I found something similiar in current mainline: >>> >>> board/Marvell/mv88f6281gtw_ge/dramregs_333h.txt > > There is kwbimage.cfg and not dramregs_333h.txt, may be you are referring > very early post Yep, sorry. bye Heiko -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] OMAP3: Consolidate SDRC related operations
> -Original Message-
> From: Tom [mailto:tom@windriver.com]
> Sent: Sunday, February 07, 2010 9:44 PM
> To: Hiremath, Vaibhav
> Cc: u-boot@lists.denx.de; Paulraj, Sandeep; Premi, Sanjeev
> Subject: Re: [PATCH 1/3] OMAP3: Consolidate SDRC related operations
>
> hvaib...@ti.com wrote:
> > From: Vaibhav Hiremath
> >
> > Consolidated all SDRC related functions/operations into separate
> > file - sdrc.c.
>
> Please add a long comment to explain why this is necessary.
> Something like..
> 'Generalizing omap memory setup is necessary to support the new
> emif4 interface
> that for am3517 uses.. '
[Hiremath, Vaibhav] Ok, will update in next version.
>
> >
> > Signed-off-by: Vaibhav Hiremath
> > Signed-off-by: Sanjeev Premi
>
> There is a regression.
> Please check devkit8000
> cpu/arm_cortexa8/omap3/libomap3.a(board.o): In function
> `checkboard':
> .../cpu/arm_cortexa8/omap3/board.c:313: undefined reference to
> `is_mem_sdr'
> cpu/arm_cortexa8/omap3/libomap3.a(board.o): In function `s_init':
> .../cpu/arm_cortexa8/omap3/board.c:228: undefined reference to
> `mem_init'
> cpu/arm_cortexa8/omap3/libomap3.a(mem.o): In function `mem_ok':
> .../cpu/arm_cortexa8/omap3/mem.c:92: undefined reference to
> `get_sdr_cs_offset'
> lib_arm/libarm.a(board.o):(.data+0x28): undefined reference to
> `dram_init'
>
> The biggest problem with this patch is that though the comment says
> it is
> a code movement patch, it has other changes it in. These changes
> must
> be separated into its own patch(s).
>
> Because of these problems, this is only a partial review.
[Hiremath, Vaibhav] I will separate such changes into separate commit and
submit it to list.
>
> > ---
> > cpu/arm_cortexa8/omap3/Makefile|3 +
> > cpu/arm_cortexa8/omap3/board.c | 34 +--
>
>
>
> > u32 size)
> > {
> > diff --git a/cpu/arm_cortexa8/omap3/sdrc.c
> b/cpu/arm_cortexa8/omap3/sdrc.c
> > new file mode 100644
> > index 000..9a46155
> > --- /dev/null
> > +++ b/cpu/arm_cortexa8/omap3/sdrc.c
> > @@ -0,0 +1,186 @@
> > +/*
> > + * Functions related to SDRC.
> > + *
> > + * This file has been created after exctracting and consolidating
> > + * the SDRC related content from mem.c and board.c.
> > + *
> > + * Copyright (C) 2009 Texas Instruments Incorporated -
> http://www.ti.com/
> > + *
>
> Because this is code movement, include the original copyrights
[Hiremath, Vaibhav] Ok, will update in next version.
>
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be
> useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public
> License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> > + * MA 02111-1307 USA
> > + */
> > +
>
>
>
> > +
> > + if (!mem_ok(cs))
> > + writel(0, &sdrc_base->cs[cs].mcfg);
> > +}
> > +
> > +/**
>
> Follow the multi-line comment.
> Remove the extra '*'
> This happens other places in this patch.
> Fix globally
[Hiremath, Vaibhav] Ok.
Thanks Tom for the review, I will update the patch series and submit it again.
Thanks,
Vaibhav
>
> > + * dram_init - Sets uboots idea of sdram size
> > + */
> > +int dram_init(void)
> > +{
> > + DECLARE_GLOBAL_DATA_PTR;
> > + unsigned int size0 = 0, size1 = 0;
> > +
> > + size0 = get_sdr_cs_size(CS0);
> > + /*
> > +* If a second bank of DDR is attached to CS1 this is
> > +* where it can be started. Early init code will init
> > +* memory on CS0.
> > +*/
> > + if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype ==
> DDR_STACKED)) {
> > + do_sdrc_init(CS1, NOT_EARLY);
> > + make_cs1_contiguous();
> > +
> > + size1 = get_sdr_cs_size(CS1);
>
> This is different that a code movement change.
> The comment of the change does not match what you have done.
> Split the real changes into a separate patch.
>
> Tom
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[U-Boot] POST related question
Hello, Working on the POST for our board (which I am going to submit to the u-boot in the near future) I was asked to output the POST tests sequence progress to the dedicated LEDs (current test’s index and test’s result – PASS or FAIL) in addition to the conventional console output. Such indication can be helpful at the customer premises when console is not available as well as at the production testing/diagnostics to understand which POST test has failed while serial console does not show signs of life. In order to fulfill this requirement I see two possibilities: 1) Common infrastructure change - add pre-test and after test callbacks to the post_test structure in the tests.c file. Call these callbacks before and after each POST test in the post_run_single routine of post.c file. 2) Local, board specific change – duplicate all necessary POST tests into specific board folder and add output to LEDs interface into every _post_test routine. Please advise. Thanks, Michael ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 3/3] SAMSUNG: SMDKC100: Adds ethernet support.
Dear Naveen Krishna Ch,
On 10 February 2010 15:56, Minkyu Kang wrote:
> Dear Naveen Krishna Ch,
>
> On 10 February 2010 14:10, Naveen Krishna Ch wrote:
>> From: Naveen Krishna CH
>>
>> Add setup for ethernet on SMDKC100, allowing kernel/ramdisk to be
>> loaded over tftp.
>>
>> The preinit function will configure GPIO (GPK0CON) & SROMC to look
>> for environment in SROM Bank 3.
>>
>> Changes since v1:
>>
>> 1. Removed the CONFIG_BOOTP_* and Net config macros from board header file
>> as per comments from Ben Warren.
>
> please move this change log under the --- line.
> And if you send next version patch, you must send all of your patch series.
>
>>
>> Signed-off-by: Naveen Krishna Ch samsung.com>
>> ---
>> board/samsung/smdkc100/smdkc100.c | 37
>> +
>> include/configs/smdkc100.h | 13 -
>> 2 files changed, 49 insertions(+), 1 deletions(-)
>>
>> diff --git a/board/samsung/smdkc100/smdkc100.c
>> b/board/samsung/smdkc100/smdkc100.c
>> index 15a1a27..6e50f14 100644
>> --- a/board/samsung/smdkc100/smdkc100.c
>> +++ b/board/samsung/smdkc100/smdkc100.c
>> @@ -23,10 +23,38 @@
>> */
>>
>> #include
>> +#include
>> +#include
>> +
>> +#define GPK0CON_OFFSET 0x2A0
>> +#define GPK0CON (S5PC100_GPIO_BASE + GPK0CON_OFFSET)
>> +
>> DECLARE_GLOBAL_DATA_PTR;
>>
>> +/*
>> + * Miscellaneous platform dependent initialisations
>> + */
>> +static void smc9115_pre_init(void)
>> +{
>> + u32 tmp;
>> + u32 smc_bw_conf;
>> +
>> + /* gpio configuration */
>> + tmp = __raw_readl(GPK0CON);
>> + tmp &= ~(0xf << CONFIG_ENV_SROM_BANK * 4);
>> + tmp |= (0x2 << CONFIG_ENV_SROM_BANK * 4);
>> + __raw_writel(tmp, GPK0CON);
>
> NAK.
> Please use the structure (see gpio.h)
>
>> +
>> + /* Ethernet needs bus width of 16 bits */
>> + smc_bw_conf = SROM_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
>> +
>> + /* Select and configure the SROMC bank */
>> + config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, SMC_BC_X_CON);
>> +}
sorry, one more thing
I think smc_bw_conf is unnecessary.
please do it in config_sromc.
>> +
>> int board_init(void)
>> {
>> + smc9115_pre_init();
>> gd->bd->bi_arch_number = MACH_TYPE_SMDKC100;
>> gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
>>
>> @@ -49,3 +77,12 @@ int checkboard(void)
>> return 0;
>> }
>> #endif
>> +
>> +int board_eth_init(bd_t *bis)
>> +{
>> + int rc = 0;
>> +#ifdef CONFIG_SMC911X
>> + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
>> +#endif
>> + return rc;
>> +}
>> diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
>> index a8ba052..eceb93f 100644
>> --- a/include/configs/smdkc100.h
>> +++ b/include/configs/smdkc100.h
>> @@ -83,7 +83,7 @@
>> #undef CONFIG_CMD_FLASH
>> #undef CONFIG_CMD_IMLS
>> #undef CONFIG_CMD_NAND
>> -#undef CONFIG_CMD_NET
>> +#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
>>
>> #define CONFIG_CMD_CACHE
>> #define CONFIG_CMD_REGINFO
>> @@ -235,4 +235,15 @@
>>
>> #define CONFIG_DOS_PARTITION 1
>>
>> +/*
>> + * Ethernet Contoller driver
>> + */
>> +#ifdef CONFIG_CMD_NET
>> +#define CONFIG_NET_MULTI
>> +#define CONFIG_SMC911X 1 /* we have a SMC9115 on-board */
>> +#define CONFIG_SMC911X_16_BIT 1 /* SMC911X_16_BIT Mode */
>> +#define CONFIG_SMC911X_BASE 0x98800300 /* SMC911X Drive Base */
>> +#define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for Ethernet*/
>> +#endif /* CONFIG_CMD_NET */
>> +
>> #endif /* __CONFIG_H */
>> --
>> 1.6.6
>>
>> ___
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>>
>
> Thanks
> Minkyu Kang
> --
> from. prom.
> www.promsoft.net
>
Thanks.
Minkyu Kang
--
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www.promsoft.net
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Re: [U-Boot] [PATCH 1/3] S5PC100: Memory SubSystem Header file, register description(SROMC).
Dear Naveen Krishna Ch,
On 10 February 2010 15:16, Naveen Krishna Ch wrote:
> Hi Kang,
>
> On 10 February 2010 11:18, Minkyu Kang wrote:
>>
>> Dear Naveen Krishna Ch,
>>
>> On 9 February 2010 18:34, Naveen Krishna Ch wrote:
>> > From: Naveen Krishna CH
>> >
>> > Memory subsystem of S5PC100 handles SROM, SRAM, OneDRAM, OneNand,
>> > NAND Flash, DDRs.
>> > mem.h is a common place for the register description of Memory subsystem
>> > of S5PC100.
>> > Note: Only SROM related registers are descibed now.
>> >
>> > Signed-off-by: Naveen Krishna Ch samsung.com>
>> > ---
>> > include/asm-arm/arch-s5pc1xx/mem.h | 55
>> >
>> > 1 files changed, 55 insertions(+), 0 deletions(-)
>> > create mode 100644 include/asm-arm/arch-s5pc1xx/mem.h
>> >
>> > diff --git a/include/asm-arm/arch-s5pc1xx/mem.h
>> > b/include/asm-arm/arch-s5pc1xx/mem.h
>> > new file mode 100644
>> > index 000..66272ff
>> > --- /dev/null
>> > +++ b/include/asm-arm/arch-s5pc1xx/mem.h
>>
>> I think srom.h is better than mem.h.
>
> As the SMC of S5PC100 is supporting several memories SRAM, SROM, NAND, NOR,
> DDR. I kept it as mem.h
So what?
This patch add about sromc. (not another memories)
If need, separate each controller.
>>
>> > @@ -0,0 +1,55 @@
>> > +/*
>> > + * (C) Copyright 2010 Samsung Electronics
>> > + * Naveen Krishna Ch
>> > + *
>> > + * This program is free software; you can redistribute it and/or
>> > + * modify it under the terms of the GNU General Public License as
>> > + * published by the Free Software Foundation; either version 2 of
>> > + * the License, or (at your option) any later version.
>> > + *
>> > + * This program is distributed in the hope that it will be useful,
>> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> > + * GNU General Public License for more details.
>> > + *
>> > + * You should have received a copy of the GNU General Public License
>> > + * along with this program; if not, write to the Free Software
>> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> > + * MA 02111-1307 USA
>> > + *
>> > + * Note: This file contains the register description for Memory
>> > subsystem
>> > + * (SROM, NAND Flash, OneNand, DDR, OneDRAM) on S5PC1XX.
>> > + *
>> > + * Only SROMC is defined as of now
>> > + */
>> > +
>> > +#ifndef __ASM_ARCH_MEM_H_
>> > +#define __ASM_ARCH_MEM_H_
>> > +
>> > +#define SROM_DATA16_WIDTH(x) (1<<((x*4)+0))
>> > +#define SROM_BYTE_ADDR_MODE(x) (1<<((x*4)+1)) /* 0-> Half-word base
>> > address*/
>> > + /* 1-> Byte base
>> > address*/
>> > +#define SROM_WAIT_ENABLE(x) (1<<((x*4)+2))
>> > +#define SROM_BYTE_ENABLE(x) (1<<((x*4)+3))
>>
>> Do you use all of these defines?
>
> For Net support i use only SROM_DATA16_WIDTH
> But for NAND support we may need SROM_BYTE_ADDR_MODE
> These Macros can serve for generic pupose.
>>
>> > +
>> > +#define SMCBC_X_Tacs (0x0) /* 0clk address set-up */
>> > +#define SMCBC_X_Tcos (0x4) /* 4clk chip selection set-up
>> > */
>> > +#define SMCBC_X_Tacc (0xe) /* 14clk access cycle */
>> > +#define SMCBC_X_Tcoh (0x1) /* 1clk chip selection hold */
>> > +#define SMCBC_X_Tah (0x4) /* 4clk address holding time */
>> > +#define SMCBC_X_Tacp (0x6) /* 6clk page mode access cycle
>> > */
>> > +#define SMCBC_X_PMC (0x0) /* normal(1data)page mode configuration
>> > */
>>
>> Please don't use lowercase at define
>
> I will change it.
>>
>> and () is unnecessary.
>
> Should remove it
>>
>> and.. what mean X is?
>
> The SROM has 6 banks, I used "X" to indicate that
then, it must be different each banks.
but your code set same value at all banks (Almost hard code)
Please modify to can set values each banks.
And one more question, what mean SMCBC is?
>>
>> > +
>> > +#define SMC_BC_X_CON ((SMCBC_X_Tacs<<28)|(SMCBC_X_Tcos<<24)| \
>> > + (SMCBC_X_Tacc<<16)|(SMCBC_X_Tcoh<<12)| \
>> > + (SMCBC_X_Tah<<8)|(SMCBC_X_Tacp<<4)| \
>> > + (SMCBC_X_PMC))
>> > +
>> > +#ifndef __ASSEMBLY__
>> > +struct s5pc1xx_sromc {
>> > + unsigned int smc_bw;
>> > + unsigned int smc_bc[6];
>> > +};
>> > +#endif /* __ASSEMBLY__ */
>>
>> smc_bw and smc_bc are already belong to sromc structure.
>> is "smc_" really need?
>> Please modify it to bw and bc or srom_bw and srom_bc (according to TRM)
>
> I named it according to TRM. there it mentioned smc_bc.
> I wil change it if u insist on srom_bc or so.
My TRM mentioned srom_bc. (what is your TRM version?)
>>
>> > +
>> > +#endif /* __ASM_ARCH_MEM_H_ */
>> > --
>> > 1.6.6
>> >
>> > ___
>> > U-Boot mailing list
>> > U-Boot@lists.denx.de
>> > http://lists.denx.de/mailman/listinfo/u-boot
>> >
>>
> Let me know your opinion
>>
>> Thanks,
>> Mi
Re: [U-Boot] [PATCH 2/3] S5PC100: Function to configure the SROMC registers.
Naveen Krishna Ch,
On 10 February 2010 15:52, Minkyu Kang wrote:
> Dear
>
> On 10 February 2010 15:31, Naveen Krishna Ch
> wrote:
>> Hi Kang,
>>
>> On 10 February 2010 11:43, Minkyu Kang wrote:
>>>
>>> Dear Naveen Krishna Ch,
>>>
>>> On 9 February 2010 18:38, Naveen Krishna Ch wrote:
>>> > From: Naveen Krishna CH
>>> >
>>> > Nand Flash, Ethernet, other features might need to configure the
>>> > SROMC registers accordingly.
>>> > The config_sromc() functions helps with this.
>>> >
>>> > Signed-off-by: Naveen Krishna Ch samsung.com>
>>>
>>> please fix ur e-mail address.
>>
>> The Email ID is correct.
>
> ch.naveen samsung.com is correct?
> Please modify it to ch.nav...@samsung.com
>
>>>
>>> > ---
>>> > cpu/arm_cortexa8/s5pc1xx/Makefile | 1 +
>>> > cpu/arm_cortexa8/s5pc1xx/sromc.c | 49
>>> >
>>> > include/asm-arm/arch-s5pc1xx/mem.h | 3 ++
>>> > 3 files changed, 53 insertions(+), 0 deletions(-)
>>> > create mode 100644 cpu/arm_cortexa8/s5pc1xx/sromc.c
>>> >
>>> > diff --git a/cpu/arm_cortexa8/s5pc1xx/Makefile
>>> > b/cpu/arm_cortexa8/s5pc1xx/Makefile
>>> > index 4f922e6..0a6a9b4 100644
>>> > --- a/cpu/arm_cortexa8/s5pc1xx/Makefile
>>> > +++ b/cpu/arm_cortexa8/s5pc1xx/Makefile
>>> > @@ -34,6 +34,7 @@ SOBJS += reset.o
>>> > COBJS += clock.o
>>> > COBJS += cpu_info.o
>>> > COBJS += timer.o
>>> > +COBJS += sromc.o
>>> >
>>> > SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
>>> > OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
>>> > diff --git a/cpu/arm_cortexa8/s5pc1xx/sromc.c
>>> > b/cpu/arm_cortexa8/s5pc1xx/sromc.c
>>> > new file mode 100644
>>> > index 000..96ca9e0
>>> > --- /dev/null
>>> > +++ b/cpu/arm_cortexa8/s5pc1xx/sromc.c
>>> > @@ -0,0 +1,49 @@
>>> > +/*
>>> > + * Copyright (C) 2010 Samsung Electronics
>>> > + * Naveen Krishna Ch
>>> > + *
>>> > + * See file CREDITS for list of people who contributed to this
>>> > + * project.
>>> > + *
>>> > + * This program is free software; you can redistribute it and/or
>>> > + * modify it under the terms of the GNU General Public License as
>>> > + * published by the Free Software Foundation; either version 2 of
>>> > + * the License, or (at your option) any later version.
>>> > + *
>>> > + * This program is distributed in the hope that it will be useful,
>>> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>> > + * GNU General Public License for more details.
>>> > + *
>>> > + * You should have received a copy of the GNU General Public License
>>> > + * along with this program; if not, write to the Free Software
>>> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>>> > + * MA 02111-1307 USA
>>> > + */
>>> > +
>>> > +#include
>>> > +#include
>>> > +#include
>>> > +
>>> > +/*
>>> > + * config_sromc() - select the proper SROMC Bank and configure the
>>> > + * band width control and bank control registers
>>> > + * srom_bank - SROM Bank 0 to 5
>>> > + * smc_bw_conf - SMC Band witdh reg configuration value
>>> > + * smc_bc_conf - SMC Bank Control reg configuration value
>>> > + */
>>> > +void config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf)
one more thing.
please add prefix like s5pc1xx_config_sromc.
>>> > +{
>>> > + u32 tmp;
>>> > + struct s5pc1xx_sromc *const srom =
>>> > + (struct s5pc1xx_sromc *)S5PC100_SROMC_BASE;
>>>
>>> Please adds support S5PC110 together.
>>
>> I wil add this and resend the patch.
>>>
>>> > +
>>> > + /* Configure SMC_BW register to handle proper SROMC bank */
>>> > + tmp = srom->smc_bw;
>>> > + tmp &= ~(0xF << (srom_bank * 4));
>>> > + tmp |= smc_bw_conf;
>>> > + srom->smc_bw = tmp;
>>> > +
>>> > + /* Configure SMC_BC register */
>>> > + srom->smc_bc[srom_bank] = smc_bc_conf;
>>> > +}
>>> > diff --git a/include/asm-arm/arch-s5pc1xx/mem.h
>>> > b/include/asm-arm/arch-s5pc1xx/mem.h
>>> > index 66272ff..99b2d2e 100644
>>> > --- a/include/asm-arm/arch-s5pc1xx/mem.h
>>> > +++ b/include/asm-arm/arch-s5pc1xx/mem.h
>>> > @@ -52,4 +52,7 @@ struct s5pc1xx_sromc {
>>> > };
>>> > #endif /* __ASSEMBLY__ */
>>> >
>>> > +/* Configure the Band Width and Bank Control Regs for required SROMC
>>> > Bank */
>>> > +void config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf);
>>> > +
>>> > #endif /* __ASM_ARCH_MEM_H_ */
>>> > --
>>> > 1.6.6
>>> >
>>> > ___
>>> > U-Boot mailing list
>>> > U-Boot@lists.denx.de
>>> > http://lists.denx.de/mailman/listinfo/u-boot
>>> >
>>>
>>> Thanks
>>> Minkyu Kang
>>> --
>>> from. prom.
>>> www.promsoft.net
>>> ___
>>> U-Boot mailing list
>>> U-Boot@lists.denx.de
>>> http://lists.denx.de/mailman/listinfo/u-boot
>>
>>
>>
>> --
>> Shine bright,
>> (: Naveen Krishna Ch :)
>>
>
> Thanks
> Minkyu Kang
> --
> from. prom.
> www.promsoft.net
>
Thanks
Minkyu Kang
--
from.
[U-Boot] Booting from NAND on MX51
Hi,
I am using mx51 3stack Freescale dev board, and I would like to make it
boot u-boot from NAND.
Does anyone have any local changes that enable that feature?
The u-boot works when is downloaded into RAM from Jtag, but can't get it
boot from NAND when I write it there.
Do I have to develop nand_spl, early stage0 loader?
I have also tried to change the following setting on the standard
mx51_3stack config but still cannot get it boot from NAND.
#undef CONFIG_SKIP_RELOCATE_UBOOT
#define CONFIG_SYS_NAND_BOOT 1
Does anyone have u-boot booting from NAND on mx51? Any repository, or a
patch that might be available?
Regards,
Andreas
-
/*
* Copyright (C) 2007, Guennadi Liakhovetski
*
* (C) Copyright 2009 Freescale Semiconductor, Inc.
*
* Configuration settings for the MX51-3Stack Freescale board.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __CONFIG_H
#define __CONFIG_H
#include
/* High Level Configuration Options */
#define CONFIG_ARMV71 /* This is armv7 Cortex-A8 CPU
core */
#define CONFIG_SYS_APCS_GNU
#define CONFIG_L2_OFF
#define CONFIG_MXC 1
#define CONFIG_MX51_3DS 1 /* in a mx51 */
#define CONFIG_FLASH_HEADER 1
#define CONFIG_FLASH_HEADER_OFFSET 0x400
#define CONFIG_FLASH_HEADER_BARKER 0xB1
#undef CONFIG_SKIP_RELOCATE_UBOOT
#define CONFIG_SYS_NAND_BOOT 1
#define CONFIG_MX51_HCLK_FREQ 2400/* RedBoot says 26MHz */
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_ARCH_MMU
#define CONFIG_DISPLAY_CPUINFO
#define CONFIG_DISPLAY_BOARDINFO
#define BOARD_LATE_INIT
/*
* Disabled for now due to build problems under Debian and a significant
* increase in the final file size: 144260 vs. 109536 Bytes.
*/
#define CONFIG_CMDLINE_TAG 1 /* enable passing of
ATAGs */
#define CONFIG_REVISION_TAG 1
#define CONFIG_SETUP_MEMORY_TAGS1
#define CONFIG_INITRD_TAG 1
/*
* Size of malloc() pool
*/
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 *
1024)
/* size in bytes reserved for initial data */
#define CONFIG_SYS_GBL_DATA_SIZE128
/*
* Hardware drivers
*/
#define CONFIG_MX51_UART1
#define CONFIG_MX51_UART1 1
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_CONS_INDEX 1
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600,
115200}
/***
* Command definition
***/
#include
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
/* Enable below configure when supporting nand */
#define CONFIG_CMD_NAND
#define CONFIG_MXC_NAND
#define CONFIG_CMD_ENV
#define CMD_SAVEENV
#undef CONFIG_CMD_IMLS
#define CONFIG_CMD_MII
#define CONFIG_CMD_NET
#define CONFIG_NET_RETRY_COUNT 100
#define CONFIG_NET_MULTI
#define CONFIG_CMD_MMC
/*
* MMC Configs
*/
#ifdef CONFIG_CMD_MMC
#define CONFIG_MMC 1
#define CONFIG_GENERIC_MMC
#define CONFIG_IMX_MMC
#define CONFIG_DOS_PARTITION1
#define CONFIG_CMD_FAT 1
#endif
/*
* I2C Configs
*/
#define CONFIG_CMD_I2C 1
#define CONFIG_HARD_I2C 1
#define CONFIG_I2C_MXC 1
#define CONFIG_SYS_I2C_PORT I2C2_BASE_ADDR
#define CONFIG_SYS_I2C_SPEED40
#define CONFIG_SYS_I2C_SLAVE0xfe
#define CONFIG_BOOTDELAY3
#define CONFIG_LOADADDR 0x9080 /* loadaddr env var */
#define CONFIG_EXTRA_ENV_SETTINGS
\
"netdev=eth0\0"
\
"ethprime=smc911x\0"
\
"uboot_addr=0xa000\0"
\
"uboot=u-boot.bin\0"\
"kernel=uImage\0" \
"nfsroot=/opt/eldk/arm\0"
\
"bootargs_base=setenv bootargs
console=ttymxc0,115200\0"\
"bootargs_nfs=setenv bootargs ${bootargs} root=/dev/nfs
"\
"ip=dhcp
nfsroot=${serverip}:${nfsroot},v3,tcp\0"\
"bootcmd=run bootcmd_net\0"
\
"bootcmd_net=run bootargs_base bootargs_nfs; "
\
Re: [U-Boot] [PATCH 5/9 V4] convert common files to new SoC access
Hello Jens, Jens Scharsig wrote: > * add's a warning to all files, which need update to new SoC access > * convert common files in cpu/../at91 and a lot of drivers to use >c stucture SoC access > > > Signed-off-by: Jens Scharsig > diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c > index 9a48783..e0cf1e1 100644 > --- a/drivers/i2c/soft_i2c.c > +++ b/drivers/i2c/soft_i2c.c > @@ -30,14 +30,15 @@ > #include > #include > #endif > -#ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 > */ > +#if defined(CONFIG_AT91RM9200) || \ > + defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ > + defined(CONFIG_AT91SAM9263) > #include > #include > -#endif > -#ifdef CONFIG_AT91SAM9263/* only valid for AT91SAM9263 */ > -#include Please don't remove this include. It breaks build on AT91SAM9263 boards who have CONFIG_AT91_LEGACY enabled. (e.g. new otc570 board) > +#include > +#ifdef CONFIG_AT91_LEGACY > #include > -#include dito > +#endif > #endif > #ifdef CONFIG_IXP425 /* only valid for IXP425 */ > #include Best regards, Daniel Gorsulowski ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 3/3] SAMSUNG: SMDKC100: Adds ethernet support.
Hi kang,
On 10 February 2010 15:46, Minkyu Kang wrote:
> Dear Naveen Krishna Ch,
>
> On 10 February 2010 15:56, Minkyu Kang wrote:
> > Dear Naveen Krishna Ch,
> >
> > On 10 February 2010 14:10, Naveen Krishna Ch
> wrote:
> >> From: Naveen Krishna CH
> >>
> >> Add setup for ethernet on SMDKC100, allowing kernel/ramdisk to be
> >> loaded over tftp.
> >>
> >> The preinit function will configure GPIO (GPK0CON) & SROMC to look
> >> for environment in SROM Bank 3.
> >>
> >> Changes since v1:
> >>
> >> 1. Removed the CONFIG_BOOTP_* and Net config macros from board header
> file
> >> as per comments from Ben Warren.
> >
> > please move this change log under the --- line.
> > And if you send next version patch, you must send all of your patch
> series.
> >
> >>
> >> Signed-off-by: Naveen Krishna Ch samsung.com>
> >> ---
> >> board/samsung/smdkc100/smdkc100.c | 37
> +
> >> include/configs/smdkc100.h| 13 -
> >> 2 files changed, 49 insertions(+), 1 deletions(-)
> >>
> >> diff --git a/board/samsung/smdkc100/smdkc100.c
> b/board/samsung/smdkc100/smdkc100.c
> >> index 15a1a27..6e50f14 100644
> >> --- a/board/samsung/smdkc100/smdkc100.c
> >> +++ b/board/samsung/smdkc100/smdkc100.c
> >> @@ -23,10 +23,38 @@
> >> */
> >>
> >> #include
> >> +#include
> >> +#include
> >> +
> >> +#define GPK0CON_OFFSET 0x2A0
> >> +#define GPK0CON (S5PC100_GPIO_BASE + GPK0CON_OFFSET)
> >> +
> >> DECLARE_GLOBAL_DATA_PTR;
> >>
> >> +/*
> >> + * Miscellaneous platform dependent initialisations
> >> + */
> >> +static void smc9115_pre_init(void)
> >> +{
> >> + u32 tmp;
> >> + u32 smc_bw_conf;
> >> +
> >> + /* gpio configuration */
> >> + tmp = __raw_readl(GPK0CON);
> >> + tmp &= ~(0xf << CONFIG_ENV_SROM_BANK * 4);
> >> + tmp |= (0x2 << CONFIG_ENV_SROM_BANK * 4);
> >> + __raw_writel(tmp, GPK0CON);
> >
> > NAK.
> > Please use the structure (see gpio.h)
> >
> >> +
> >> + /* Ethernet needs bus width of 16 bits */
> >> + smc_bw_conf = SROM_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
> >> +
> >> + /* Select and configure the SROMC bank */
> >> + config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, SMC_BC_X_CON);
> >> +}
>
> sorry, one more thing
> I think smc_bw_conf is unnecessary.
> please do it in config_sromc.
The config_sromc() is a dumb/generic function which takes the configuration
values for BandWidth and BankControl register and the SROM Bank number
and accordingly programs the registers.
So, its better the caller send the value to be configured.
>
>
> >> +
> >> int board_init(void)
> >> {
> >> + smc9115_pre_init();
> >>gd->bd->bi_arch_number = MACH_TYPE_SMDKC100;
> >>gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
> >>
> >> @@ -49,3 +77,12 @@ int checkboard(void)
> >>return 0;
> >> }
> >> #endif
> >> +
> >> +int board_eth_init(bd_t *bis)
> >> +{
> >> + int rc = 0;
> >> +#ifdef CONFIG_SMC911X
> >> + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
> >> +#endif
> >> + return rc;
> >> +}
> >> diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
> >> index a8ba052..eceb93f 100644
> >> --- a/include/configs/smdkc100.h
> >> +++ b/include/configs/smdkc100.h
> >> @@ -83,7 +83,7 @@
> >> #undef CONFIG_CMD_FLASH
> >> #undef CONFIG_CMD_IMLS
> >> #undef CONFIG_CMD_NAND
> >> -#undef CONFIG_CMD_NET
> >> +#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
> >>
> >> #define CONFIG_CMD_CACHE
> >> #define CONFIG_CMD_REGINFO
> >> @@ -235,4 +235,15 @@
> >>
> >> #define CONFIG_DOS_PARTITION 1
> >>
> >> +/*
> >> + * Ethernet Contoller driver
> >> + */
> >> +#ifdef CONFIG_CMD_NET
> >> +#define CONFIG_NET_MULTI
> >> +#define CONFIG_SMC911X 1 /* we have a SMC9115 on-board
> */
> >> +#define CONFIG_SMC911X_16_BIT 1 /* SMC911X_16_BIT Mode
> */
> >> +#define CONFIG_SMC911X_BASE0x98800300 /* SMC911X Drive Base
> */
> >> +#define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for
> Ethernet*/
> >> +#endif /* CONFIG_CMD_NET */
> >> +
> >> #endif /* __CONFIG_H */
> >> --
> >> 1.6.6
> >>
> >> ___
> >> U-Boot mailing list
> >> U-Boot@lists.denx.de
> >> http://lists.denx.de/mailman/listinfo/u-boot
> >>
> >
> > Thanks
> > Minkyu Kang
> > --
> > from. prom.
> > www.promsoft.net
> >
>
> Thanks.
> Minkyu Kang
> --
> from. prom.
> www.promsoft.net
> ___
> U-Boot mailing list
> U-Boot@lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
>
--
Shine bright,
(: Naveen Krishna Ch :)
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH V2 3/3] SAMSUNG: SMDKC100: Adds ethernet support.
Hi Kang,
On 10 February 2010 12:26, Minkyu Kang wrote:
> Dear Naveen Krishna Ch,
>
> On 10 February 2010 14:10, Naveen Krishna Ch
> wrote:
> > From: Naveen Krishna CH
> >
> > Add setup for ethernet on SMDKC100, allowing kernel/ramdisk to be
> > loaded over tftp.
> >
> > The preinit function will configure GPIO (GPK0CON) & SROMC to look
> > for environment in SROM Bank 3.
> >
> > Changes since v1:
> >
> > 1. Removed the CONFIG_BOOTP_* and Net config macros from board header
> file
> > as per comments from Ben Warren.
>
> please move this change log under the --- line.
> And if you send next version patch, you must send all of your patch series.
>
My Bad i will change it
>
> >
> > Signed-off-by: Naveen Krishna Ch samsung.com>
> > ---
> > board/samsung/smdkc100/smdkc100.c | 37
> +
> > include/configs/smdkc100.h| 13 -
> > 2 files changed, 49 insertions(+), 1 deletions(-)
> >
> > diff --git a/board/samsung/smdkc100/smdkc100.c
> b/board/samsung/smdkc100/smdkc100.c
> > index 15a1a27..6e50f14 100644
> > --- a/board/samsung/smdkc100/smdkc100.c
> > +++ b/board/samsung/smdkc100/smdkc100.c
> > @@ -23,10 +23,38 @@
> > */
> >
> > #include
> > +#include
> > +#include
> > +
> > +#define GPK0CON_OFFSET 0x2A0
> > +#define GPK0CON (S5PC100_GPIO_BASE + GPK0CON_OFFSET)
> > +
> > DECLARE_GLOBAL_DATA_PTR;
> >
> > +/*
> > + * Miscellaneous platform dependent initialisations
> > + */
> > +static void smc9115_pre_init(void)
> > +{
> > + u32 tmp;
> > + u32 smc_bw_conf;
> > +
> > + /* gpio configuration */
> > + tmp = __raw_readl(GPK0CON);
> > + tmp &= ~(0xf << CONFIG_ENV_SROM_BANK * 4);
> > + tmp |= (0x2 << CONFIG_ENV_SROM_BANK * 4);
> > + __raw_writel(tmp, GPK0CON);
>
> NAK.
> Please use the structure (see gpio.h)
>
I wil resend the patches V2.
>
> > +
> > + /* Ethernet needs bus width of 16 bits */
> > + smc_bw_conf = SROM_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
> > +
> > + /* Select and configure the SROMC bank */
> > + config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, SMC_BC_X_CON);
> > +}
> > +
> > int board_init(void)
> > {
> > + smc9115_pre_init();
> >gd->bd->bi_arch_number = MACH_TYPE_SMDKC100;
> >gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
> >
> > @@ -49,3 +77,12 @@ int checkboard(void)
> >return 0;
> > }
> > #endif
> > +
> > +int board_eth_init(bd_t *bis)
> > +{
> > + int rc = 0;
> > +#ifdef CONFIG_SMC911X
> > + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
> > +#endif
> > + return rc;
> > +}
> > diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
> > index a8ba052..eceb93f 100644
> > --- a/include/configs/smdkc100.h
> > +++ b/include/configs/smdkc100.h
> > @@ -83,7 +83,7 @@
> > #undef CONFIG_CMD_FLASH
> > #undef CONFIG_CMD_IMLS
> > #undef CONFIG_CMD_NAND
> > -#undef CONFIG_CMD_NET
> > +#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
> >
> > #define CONFIG_CMD_CACHE
> > #define CONFIG_CMD_REGINFO
> > @@ -235,4 +235,15 @@
> >
> > #define CONFIG_DOS_PARTITION 1
> >
> > +/*
> > + * Ethernet Contoller driver
> > + */
> > +#ifdef CONFIG_CMD_NET
> > +#define CONFIG_NET_MULTI
> > +#define CONFIG_SMC911X 1 /* we have a SMC9115 on-board
> */
> > +#define CONFIG_SMC911X_16_BIT 1 /* SMC911X_16_BIT Mode
> */
> > +#define CONFIG_SMC911X_BASE0x98800300 /* SMC911X Drive Base
> */
> > +#define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for
> Ethernet*/
> > +#endif /* CONFIG_CMD_NET */
> > +
> > #endif /* __CONFIG_H */
> > --
> > 1.6.6
> >
> > ___
> > U-Boot mailing list
> > U-Boot@lists.denx.de
> > http://lists.denx.de/mailman/listinfo/u-boot
> >
>
> Thanks
> Minkyu Kang
> --
> from. prom.
> www.promsoft.net
> ___
> U-Boot mailing list
> U-Boot@lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
>
--
Shine bright,
(: Naveen Krishna Ch :)
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/3] S5PC100: Function to configure the SROMC registers.
Hi Kang,
On 10 February 2010 16:06, Minkyu Kang wrote:
> Naveen Krishna Ch,
>
> On 10 February 2010 15:52, Minkyu Kang wrote:
> > Dear
> >
> > On 10 February 2010 15:31, Naveen Krishna Ch
> wrote:
> >> Hi Kang,
> >>
> >> On 10 February 2010 11:43, Minkyu Kang wrote:
> >>>
> >>> Dear Naveen Krishna Ch,
> >>>
> >>> On 9 February 2010 18:38, Naveen Krishna Ch
> wrote:
> >>> > From: Naveen Krishna CH
> >>> >
> >>> > Nand Flash, Ethernet, other features might need to configure the
> >>> > SROMC registers accordingly.
> >>> > The config_sromc() functions helps with this.
> >>> >
> >>> > Signed-off-by: Naveen Krishna Ch samsung.com>
> >>>
> >>> please fix ur e-mail address.
> >>
> >> The Email ID is correct.
> >
> > ch.naveen samsung.com is correct?
> > Please modify it to ch.nav...@samsung.com
>
I wil change it, thank you
>
> >
> >>>
> >>> > ---
> >>> > cpu/arm_cortexa8/s5pc1xx/Makefile |1 +
> >>> > cpu/arm_cortexa8/s5pc1xx/sromc.c | 49
> >>> >
> >>> > include/asm-arm/arch-s5pc1xx/mem.h |3 ++
> >>> > 3 files changed, 53 insertions(+), 0 deletions(-)
> >>> > create mode 100644 cpu/arm_cortexa8/s5pc1xx/sromc.c
> >>> >
> >>> > diff --git a/cpu/arm_cortexa8/s5pc1xx/Makefile
> >>> > b/cpu/arm_cortexa8/s5pc1xx/Makefile
> >>> > index 4f922e6..0a6a9b4 100644
> >>> > --- a/cpu/arm_cortexa8/s5pc1xx/Makefile
> >>> > +++ b/cpu/arm_cortexa8/s5pc1xx/Makefile
> >>> > @@ -34,6 +34,7 @@ SOBJS += reset.o
> >>> > COBJS += clock.o
> >>> > COBJS += cpu_info.o
> >>> > COBJS += timer.o
> >>> > +COBJS += sromc.o
> >>> >
> >>> > SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> >>> > OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
> >>> > diff --git a/cpu/arm_cortexa8/s5pc1xx/sromc.c
> >>> > b/cpu/arm_cortexa8/s5pc1xx/sromc.c
> >>> > new file mode 100644
> >>> > index 000..96ca9e0
> >>> > --- /dev/null
> >>> > +++ b/cpu/arm_cortexa8/s5pc1xx/sromc.c
> >>> > @@ -0,0 +1,49 @@
> >>> > +/*
> >>> > + * Copyright (C) 2010 Samsung Electronics
> >>> > + * Naveen Krishna Ch
> >>> > + *
> >>> > + * See file CREDITS for list of people who contributed to this
> >>> > + * project.
> >>> > + *
> >>> > + * This program is free software; you can redistribute it and/or
> >>> > + * modify it under the terms of the GNU General Public License as
> >>> > + * published by the Free Software Foundation; either version 2 of
> >>> > + * the License, or (at your option) any later version.
> >>> > + *
> >>> > + * This program is distributed in the hope that it will be useful,
> >>> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> >>> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> >>> > + * GNU General Public License for more details.
> >>> > + *
> >>> > + * You should have received a copy of the GNU General Public License
> >>> > + * along with this program; if not, write to the Free Software
> >>> > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> >>> > + * MA 02111-1307 USA
> >>> > + */
> >>> > +
> >>> > +#include
> >>> > +#include
> >>> > +#include
> >>> > +
> >>> > +/*
> >>> > + * config_sromc() - select the proper SROMC Bank and configure the
> >>> > + * band width control and bank control registers
> >>> > + * srom_bank - SROM Bank 0 to 5
> >>> > + * smc_bw_conf - SMC Band witdh reg configuration value
> >>> > + * smc_bc_conf - SMC Bank Control reg configuration value
> >>> > + */
> >>> > +void config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf)
>
> one more thing.
> please add prefix like s5pc1xx_config_sromc.
>
I wil change this too and resend all the patches.
>
> >>> > +{
> >>> > + u32 tmp;
> >>> > + struct s5pc1xx_sromc *const srom =
> >>> > + (struct s5pc1xx_sromc *)S5PC100_SROMC_BASE;
> >>>
> >>> Please adds support S5PC110 together.
> >>
> >> I wil add this and resend the patch.
> >>>
> >>> > +
> >>> > + /* Configure SMC_BW register to handle proper SROMC bank */
> >>> > + tmp = srom->smc_bw;
> >>> > + tmp &= ~(0xF << (srom_bank * 4));
> >>> > + tmp |= smc_bw_conf;
> >>> > + srom->smc_bw = tmp;
> >>> > +
> >>> > + /* Configure SMC_BC register */
> >>> > + srom->smc_bc[srom_bank] = smc_bc_conf;
> >>> > +}
> >>> > diff --git a/include/asm-arm/arch-s5pc1xx/mem.h
> >>> > b/include/asm-arm/arch-s5pc1xx/mem.h
> >>> > index 66272ff..99b2d2e 100644
> >>> > --- a/include/asm-arm/arch-s5pc1xx/mem.h
> >>> > +++ b/include/asm-arm/arch-s5pc1xx/mem.h
> >>> > @@ -52,4 +52,7 @@ struct s5pc1xx_sromc {
> >>> > };
> >>> > #endif /* __ASSEMBLY__ */
> >>> >
> >>> > +/* Configure the Band Width and Bank Control Regs for required SROMC
> >>> > Bank */
> >>> > +void config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf);
> >>> > +
> >>> > #endif /* __ASM_ARCH_MEM_H_ */
> >>> > --
> >>> > 1.6.6
> >>> >
> >>> > ___
> >>> > U-Boot mailing list
> >>> > U-Boot@lists.denx.de
> >>> > http://lists.denx.de
Re: [U-Boot] [PATCH 1/9 V4] add new CONFIG_AT91_LEGACY
Hello Tom, Tom wrote: > Jens Scharsig wrote: >> * add's the new temporary CONFIG_AT91_LEGACY to all board configs >> This will need for backward compatiblity, while change the SoC access >> to c structures. If CONFIG_AT91_LEGACY is defined, the deprecated >> SoC is used. >> >> >> Signed-off-by: Jens Scharsig > > This looks good. > The only problem is the new at91 target otc570 is breaking. > > Please take a look at errors in otc570 > > otc570 : > > at91sam9263_devices.c: In function 'at91_serial0_hw_init': > at91sam9263_devices.c:40: warning: implicit declaration of function > 'at91_set_a_periph' > at91sam9263_devices.c: In function 'at91_spi0_hw_init': > at91sam9263_devices.c:96: warning: implicit declaration of function > 'at91_set_b_periph' > at91sam9263_devices.c:116: warning: implicit declaration of function > 'at91_set_pio_output' > clock.c: In function 'at91_clock_init': > clock.c:160: warning: implicit declaration of function 'at91_sys_read' > clock.c:160: error: 'AT91_CKGR_MCFR' undeclared (first use in this function) > clock.c:160: error: (Each undeclared identifier is reported only once > clock.c:160: error: for each function it appears in.) > > Tom This is caused by missing defines in include\configs\otc570.h: #define CONFIG_AT91_LEGACY and #define CONFIG_AT91_GPIO1 Should I send a patch to fix this, or should I wait for Jens patches coming mainline? Best regards, Daniel Gorsulowski ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Booting from NAND on MX51
Andreas Orfanos wrote: > Hi, > Hi Andreas, > I am using mx51 3stack Freescale dev board, and I would like to make it > boot u-boot from NAND. I sent patches for the mx51evk (babbage board), but NAND is not (yet) supported. This is the first MX51 board that should go into mainline. The mx51_3stack is not supported in u-boot. How do you derive your u-boot ? From my patches or from another source ? > Does anyone have any local changes that enable that feature? > > The u-boot works when is downloaded into RAM from Jtag, but can't get it > boot from NAND when I write it there. > Do I have to develop nand_spl, early stage0 loader? Well, I think the MX51 can boot without an early loader. The processor can boot directly from NAND, if the correct boot pins are set and no internal fuses are blown to avoid it, as stated in the user manual. The processor reads an image in the IMX format - you see documentation in doc/README.imximage. At the beginning of the image there must be a suitable for your board DCD table, that enables the IOMUX for the NAND controller and does the required setup. The image length is part of the IMX header and the processor copies automatically from NAND to the RAM address you set in the header and then jumps to the starting address. As I said, I have not tried (the mx51evk has no NAND). However, booting from other sources (SD card, SPI Flash) works in this way. Regards, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Booting from NAND on MX51
Hi Stefano, Thank you for your reply. MX51 for u-boot can be found in launchpad.net Here is the link: https://launchpad.net/ubuntu/+source/uboot-imx/ It has MX51_3stack too. You need to download the source code, including the diffs, and patch them appropriately. I didn't know how the ROM MX51 boot loader works. Thanks for writing that README document. I have set up the right switches on the board, and I can boot RedBoot from nand without problem. Therefore it should be easy to do it on u-boot. I can't find that imximage on 2009-08 u-boot you mention in your document. But I found it on the latest git u-boot repository. I will check out the latest u-boot and give it a go. Regards, Andreas -Original Message- From: Stefano Babic [mailto:sba...@denx.de] Sent: 10 February 2010 11:44 To: Andreas Orfanos Cc: u-boot@lists.denx.de Subject: Re: [U-Boot] Booting from NAND on MX51 Andreas Orfanos wrote: > Hi, > Hi Andreas, > I am using mx51 3stack Freescale dev board, and I would like to make it > boot u-boot from NAND. I sent patches for the mx51evk (babbage board), but NAND is not (yet) supported. This is the first MX51 board that should go into mainline. The mx51_3stack is not supported in u-boot. How do you derive your u-boot ? From my patches or from another source ? > Does anyone have any local changes that enable that feature? > > The u-boot works when is downloaded into RAM from Jtag, but can't get it > boot from NAND when I write it there. > Do I have to develop nand_spl, early stage0 loader? Well, I think the MX51 can boot without an early loader. The processor can boot directly from NAND, if the correct boot pins are set and no internal fuses are blown to avoid it, as stated in the user manual. The processor reads an image in the IMX format - you see documentation in doc/README.imximage. At the beginning of the image there must be a suitable for your board DCD table, that enables the IOMUX for the NAND controller and does the required setup. The image length is part of the IMX header and the processor copies automatically from NAND to the RAM address you set in the header and then jumps to the starting address. As I said, I have not tried (the mx51evk has no NAND). However, booting from other sources (SD card, SPI Flash) works in this way. Regards, Stefano -- = DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2 1/3] S5PC100: Memory SubSystem Header file, register description(SROMC).
From: Naveen Krishna CH
Memory subsystem of S5PC100 handles SROM, SRAM, OneDRAM, OneNand,
NAND Flash, DDRs.
mem.h is a common place for the register description of Memory subsystem
of S5PC100.
Note: Only SROM related registers are descibed now.
Signed-off-by: Naveen Krishna Ch
---
Changes since V1:
1. The header file is renamed to smc.h from mem.h
2. The Macros are renamed according to TRM.
Comments from Minkyu kang are fixed.
Note: Some of the defined macros are not used now. They are added to
facilitiate
simple cofiguration of SMC registers.
include/asm-arm/arch-s5pc1xx/smc.h | 54
1 files changed, 54 insertions(+), 0 deletions(-)
create mode 100644 include/asm-arm/arch-s5pc1xx/smc.h
diff --git a/include/asm-arm/arch-s5pc1xx/smc.h
b/include/asm-arm/arch-s5pc1xx/smc.h
new file mode 100644
index 000..2a1ee07
--- /dev/null
+++ b/include/asm-arm/arch-s5pc1xx/smc.h
@@ -0,0 +1,54 @@
+/*
+ * (C) Copyright 2010 Samsung Electronics
+ * Naveen Krishna Ch
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Note: This file contains the register description for Memory subsystem
+ * (SROM, NAND Flash, OneNand, DDR, OneDRAM) on S5PC1XX.
+ *
+ * Only SROMC is defined as of now
+ */
+
+#ifndef __ASM_ARCH_SMC_H_
+#define __ASM_ARCH_SMC_H_
+
+#define SMC_DATA16_WIDTH(x)(1<<((x*4)+0))
+#define SMC_BYTE_ADDR_MODE(x) (1<<((x*4)+1)) /* 0-> Half-word base address*/
+ /* 1-> Byte base address*/
+#define SMC_WAIT_ENABLE(x) (1<<((x*4)+2))
+#define SMC_BYTE_ENABLE(x) (1<<((x*4)+3))
+
+#define SMC_BC_TACS0x0 /* 0clk address set-up */
+#define SMC_BC_TCOS0x4 /* 4clk chip selection set-up */
+#define SMC_BC_TACC0xe /* 14clkaccess cycle */
+#define SMC_BC_TCOH0x1 /* 1clk chip selection hold */
+#define SMC_BC_TAH 0x4 /* 4clk address holding time */
+#define SMC_BC_TACP0x6 /* 6clk page mode access cycle */
+#define SMC_BC_PMC 0x0 /* normal(1data)page mode configuration */
+
+#define SMC_BC_CON((SMC_BC_TACS<<28)|(SMC_BC_TCOS<<24)| \
+ (SMC_BC_TACC<<16)|(SMC_BC_TCOH<<12)| \
+ (SMC_BC_TAH<<8)|(SMC_BC_TACP<<4)|(SMC_BC_PMC))
+
+#ifndef __ASSEMBLY__
+struct s5pc1xx_smc {
+ unsigned intbw;
+ unsigned intbc[6];
+};
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ASM_ARCH_SMC_H_ */
--
1.6.6
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[U-Boot] [PATCH 3/3] SAMSUNG: SMDKC100: Adds ethernet support.
From: Naveen Krishna CH
Add setup for ethernet on SMDKC100, allowing kernel/ramdisk to be
loaded over tftp.
The preinit function will configure GPIO (GPK0CON) & SROMC to look
for environment in SROM Bank 3.
Signed-off-by: Naveen Krishna Ch
---
Changes since V1:
1. The CONFIG_BOOTP* and Net config Macros are removed from config header.
Comments from Ben Warren are fixed
2. The GPIO configuration is modified & Macro and Function are renamed.
Comments from Minkyu Kang are fixed
board/samsung/smdkc100/smdkc100.c | 38 +
include/configs/smdkc100.h| 13 +++-
2 files changed, 50 insertions(+), 1 deletions(-)
diff --git a/board/samsung/smdkc100/smdkc100.c
b/board/samsung/smdkc100/smdkc100.c
index 15a1a27..43af5ea 100644
--- a/board/samsung/smdkc100/smdkc100.c
+++ b/board/samsung/smdkc100/smdkc100.c
@@ -23,10 +23,39 @@
*/
#include
+#include
+#include
+#include
+
DECLARE_GLOBAL_DATA_PTR;
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+static void smc9115_pre_init(void)
+{
+ u32 tmp;
+ u32 smc_bw_conf;
+ struct s5pc100_gpio *const gpio =
+ (struct s5pc100_gpio *)S5PC100_GPIO_BASE;
+
+ /* gpio configuration GPK0CON */
+ tmp = __raw_readl(&gpio->gpio_k0.con);
+ tmp &= ~(0xf << CONFIG_ENV_SROM_BANK * 4);
+ tmp |= (0x2 << CONFIG_ENV_SROM_BANK * 4);
+ __raw_writel(tmp, &gpio->gpio_k0.con);
+
+ /* Ethernet needs bus width of 16 bits */
+ smc_bw_conf = SMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
+
+ /* Select and configure the SROMC bank */
+ s5pc1xx_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, SMC_BC_CON);
+}
+
int board_init(void)
{
+ smc9115_pre_init();
+
gd->bd->bi_arch_number = MACH_TYPE_SMDKC100;
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
@@ -49,3 +78,12 @@ int checkboard(void)
return 0;
}
#endif
+
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC911X
+ rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#endif
+ return rc;
+}
diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
index a8ba052..f7cfc5e 100644
--- a/include/configs/smdkc100.h
+++ b/include/configs/smdkc100.h
@@ -83,7 +83,7 @@
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_NAND
-#undef CONFIG_CMD_NET
+#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_REGINFO
@@ -235,4 +235,15 @@
#define CONFIG_DOS_PARTITION 1
+/*
+ * Ethernet Contoller driver
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC911X 1 /* we have a SMC9115 on-board */
+#define CONFIG_SMC911X_16_BIT 1 /* SMC911X_16_BIT Mode */
+#define CONFIG_SMC911X_BASE0x98800300 /* SMC911X Drive Base */
+#define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for Ethernet*/
+#endif /* CONFIG_CMD_NET */
+
#endif /* __CONFIG_H */
--
1.6.6
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[U-Boot] [PATCH 2/3] S5PC100: Function to configure the SROMC registers.
From: Naveen Krishna CH
Nand Flash, Ethernet, other features might need to configure the
SROMC registers accordingly.
The config_sromc() functions helps with this.
Signed-off-by: Naveen Krishna Ch
---
Changes since V1:
1. Funtion config_sromc() is renamed to s5pc1xx_config_sromc().
Comments from Minkyu Kang are fixed
cpu/arm_cortexa8/s5pc1xx/Makefile |1 +
cpu/arm_cortexa8/s5pc1xx/sromc.c | 54
include/asm-arm/arch-s5pc1xx/smc.h |3 ++
3 files changed, 58 insertions(+), 0 deletions(-)
create mode 100644 cpu/arm_cortexa8/s5pc1xx/sromc.c
diff --git a/cpu/arm_cortexa8/s5pc1xx/Makefile
b/cpu/arm_cortexa8/s5pc1xx/Makefile
index 4f922e6..0a6a9b4 100644
--- a/cpu/arm_cortexa8/s5pc1xx/Makefile
+++ b/cpu/arm_cortexa8/s5pc1xx/Makefile
@@ -34,6 +34,7 @@ SOBJS += reset.o
COBJS += clock.o
COBJS += cpu_info.o
COBJS += timer.o
+COBJS += sromc.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/cpu/arm_cortexa8/s5pc1xx/sromc.c b/cpu/arm_cortexa8/s5pc1xx/sromc.c
new file mode 100644
index 000..1d6e738
--- /dev/null
+++ b/cpu/arm_cortexa8/s5pc1xx/sromc.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2010 Samsung Electronics
+ * Naveen Krishna Ch
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+
+/*
+ * s5pc1xx_config_sromc() - select the proper SROMC Bank and configure the
+ * band width control and bank control registers
+ * srom_bank - SROM Bank 0 to 5
+ * smc_bw_conf - SMC Band witdh reg configuration value
+ * smc_bc_conf - SMC Bank Control reg configuration value
+ */
+void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf)
+{
+ u32 tmp;
+#if defined(CONFIG_S5PC100)
+ struct s5pc1xx_smc *const srom =
+ (struct s5pc1xx_smc *)S5PC100_SROMC_BASE;
+#elif defined(CONFIG_S5PC110)
+ struct s5pc1xx_smc *const srom =
+ (struct s5pc1xx_smc *)S5PC110_SROMC_BASE;
+#endif
+
+ /* Configure SMC_BW register to handle proper SROMC bank */
+ tmp = srom->bw;
+ tmp &= ~(0xF << (srom_bank * 4));
+ tmp |= smc_bw_conf;
+ srom->bw = tmp;
+
+ /* Configure SMC_BC register */
+ srom->bc[srom_bank] = smc_bc_conf;
+}
diff --git a/include/asm-arm/arch-s5pc1xx/smc.h
b/include/asm-arm/arch-s5pc1xx/smc.h
index 2a1ee07..a280dc1 100644
--- a/include/asm-arm/arch-s5pc1xx/smc.h
+++ b/include/asm-arm/arch-s5pc1xx/smc.h
@@ -51,4 +51,7 @@ struct s5pc1xx_smc {
};
#endif /* __ASSEMBLY__ */
+/* Configure the Band Width and Bank Control Regs for required SROMC Bank */
+void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf);
+
#endif /* __ASM_ARCH_SMC_H_ */
--
1.6.6
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Re: [U-Boot] Booting from NAND on MX51
Hi, Le 10/02/2010 13:23, Andreas Orfanos a écrit : > I have set up the right switches on the board, and I can boot RedBoot > from nand without problem. > Therefore it should be easy to do it on u-boot. > we are booting u-boot from NAND on a custom iMX51 board (using mDDR and not DDR2), we started from Freescale's u-boot for 3 Stack board (it's in their BSP which can be downloaded from their website) and customized it to our hardware as we have many changes vs the reference design. We are using a customized DCD table to configure the CPU and it works fine. Eric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Booting from NAND on MX51
Hi Did you have to make changes in cpu/arm_cortex8/start.S file? I don't have to make any changes on DCD table anyway, as it has already produced by freescale for mx51_3stack board Regards Andreas -Original Message- From: Eric Bénard [mailto:e...@eukrea.com] Sent: 10 February 2010 13:55 To: Andreas Orfanos Cc: U-Boot user list; sba...@denx.de Subject: Re: [U-Boot] Booting from NAND on MX51 Hi, Le 10/02/2010 13:23, Andreas Orfanos a écrit : > I have set up the right switches on the board, and I can boot RedBoot > from nand without problem. > Therefore it should be easy to do it on u-boot. > we are booting u-boot from NAND on a custom iMX51 board (using mDDR and not DDR2), we started from Freescale's u-boot for 3 Stack board (it's in their BSP which can be downloaded from their website) and customized it to our hardware as we have many changes vs the reference design. We are using a customized DCD table to configure the CPU and it works fine. Eric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] POST related question
On Wed, Feb 10, 2010 at 4:33 PM, Michael Zaidman wrote: > > > On Wed, Feb 10, 2010 at 3:28 PM, Wolfgang Denk wrote: > > Dear Michael Zaidman, > > > > In message <660c0f821002100159i1a956edfx1c76945042f51...@mail.gmail.com> > > you wrote: > >> SGVsbG8sCgpXb3JraW5nIG9uIHRoZSBQT1NUIGZvciBvdXIgYm9hcmQgKHdoaWNoIEkgYW0gZ29p > ... > > > > Please do not send base 64 encoded messages. > > > > Please do not send HTML messages. > > > > Please send plain text only. > > > > Message unreadable, ignored. Sorry. > > > > > Ok, sorry, I re-post my question again. Hello, Working on the POST for our board (which I am going to submit to the u-boot in the near future) I was asked to output the POST tests sequence progress to the dedicated LEDs (current test’s index and test’s result – PASS or FAIL) in addition to the conventional console output. Such indication can be helpful at the customer premises when console is not available as well as at the production testing/diagnostics to understand which POST test has failed while serial console does not show signs of life. In order to fulfill this requirement I see two possibilities: 1) Common infrastructure change - add pre-test and after test callbacks to the post_test structure in the tests.c file. Call these callbacks before and after each POST test in the post_run_single routine of post.c file. 2) Local, board specific change – duplicate all necessary POST tests into specific board folder and add output to LEDs interface into every _post_test routine. Please advise. Thanks, Michael ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] POST related question
On Wed, Feb 10, 2010 at 3:28 PM, Wolfgang Denk wrote: > Dear Michael Zaidman, > > In message <660c0f821002100159i1a956edfx1c76945042f51...@mail.gmail.com> you wrote: >> SGVsbG8sCgpXb3JraW5nIG9uIHRoZSBQT1NUIGZvciBvdXIgYm9hcmQgKHdoaWNoIEkgYW0gZ29p ... > > Please do not send base 64 encoded messages. > > Please do not send HTML messages. > > Please send plain text only. > > Message unreadable, ignored. Sorry. > > Ok, sorry, I re-post my question again. Hello, Working on the POST for our board (which I am going to submit to the u-boot in the near future) I was asked to output the POST tests sequence progress to the dedicated LEDs (current test’s index and test’s result – PASS or FAIL) in addition to the conventional console output. Such indication can be helpful at the customer premises when console is not available as well as at the production testing/diagnostics to understand which POST test has failed while serial console does not show signs of life. In order to fulfill this requirement I see two possibilities: 1) Common infrastructure change - add pre-test and after test callbacks to the post_test structure in the tests.c file. Call these callbacks before and after each POST test in the post_run_single routine of post.c file. 2) Local, board specific change – duplicate all necessary POST tests into specific board folder and add output to LEDs interface into every _post_test routine. Please advise. Thanks, Michael ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Booting from NAND on MX51
Hi Andreas, Le 10/02/2010 15:55, Andreas Orfanos a écrit : > Did you have to make changes in cpu/arm_cortex8/start.S file? we are using u-boot-2009.01 + freescale patches. No change to start.S (except a small hack to turn on a led to check u-boot is properly loaded and run). > I don't have to make any changes on DCD table anyway, as it has already > produced by freescale for mx51_3stack board > I started with the DCD of Redboot for 3Stack as the one for the 3Stack in u-boot never worked here. If you don't manage to get it running using RedBoot DCD, come back to me on next thursday where I should be able to extract some patches as I'm actually busy on an other subject. Eric ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] POST related question
Hi Michael, > Working on the POST for our board (which I am going to submit > to the u-boot in the near future) I was asked to output the POST tests > sequence progress to the dedicated LEDs (current test’s index and > test’s result – PASS or FAIL) in addition to the conventional console > output. Such indication can be helpful at the customer premises when > console is not available as well as at the production testing/diagnostics > to understand which POST test has failed while serial console does not > show signs of life. > In order to fulfill this requirement I see two possibilities: > > 1) Common infrastructure change - add pre-test and after test callbacks > to the post_test structure in the tests.c file. Call these callbacks > before and after each POST test in the post_run_single routine of post.c file. > > 2) Local, board specific change – duplicate all necessary POST tests into > specific board folder and add output to LEDs interface into every > _post_test routine. > > Please advise. Thinking about it, why can't we 3) introduce show_post_progress(). It seems to me that the show_boot_progress (grep the README) implements exactly the same idea for the boot process, so it would make sense to re-use the implementation idea. Nowadays we could solve the overrideing with weak functions. What do you think? Cheers Detlev -- It's very important that you sleep because that's when your brain is garbage collecting. And a dream is if you are interrupted in the middle and have junk left in the registers. -- Gerald Sussman -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-40 Fax: (+49)-8142-66989-80 Email: d...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Pull request - ColdFire
Wolfgang, The following changes since commit 0b692dcb190655c7eb96b6b8003bee163e3b58dd: Wolfgang Denk (1): Merge branch 'master' of git://git.denx.de/u-boot-net are available in the git repository at: git://www.denx.de/git/u-boot-coldfire.git master TsiChung Liew (1): MCF5271-only: Added a weak board_reset function to allow custom reset Wolfgang Wegner (3): add include/asm-m68k/unaligned.h allow MCF532x to use CONFIG_MONITOR_IS_IN_RAM MCF532x: make icache_enable use CONFIG_SYS_SDRAM_SIZE cpu/mcf52x2/cpu.c|6 ++ cpu/mcf52x2/cpu.h| 33 + cpu/mcf532x/speed.c |3 +++ cpu/mcf532x/start.S |6 +- drivers/mtd/cfi_flash.c |2 +- include/asm-m68k/unaligned.h | 15 +++ 6 files changed, 63 insertions(+), 2 deletions(-) create mode 100644 cpu/mcf52x2/cpu.h create mode 100644 include/asm-m68k/unaligned.h Thanks! Regards, TsiChung ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] edb9302(a): Tweak PLL settings
Previous code ran the edb9302(a) boards with the PLL same settings as the edb9301, at 166MHz core and 66MHz system bus clock. In difference to the edb9301 board the edb9302(a) is equipped with an EP9302 processor, which can be clocked at higher rates than the EP9301. Therefore we can configure the edb9302(a) with the same PLL settings as the other non-edb9301 boards, namely at 200MHz for the core and 100MHz for the system bus clock. Signed-off-by: Matthias Kaehlcke --- board/edb93xx/pll_cfg.h |6 +++--- board/edb93xx/sdram_cfg.h |7 --- 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/board/edb93xx/pll_cfg.h b/board/edb93xx/pll_cfg.h index 0b6f469..39d6f5a 100644 --- a/board/edb93xx/pll_cfg.h +++ b/board/edb93xx/pll_cfg.h @@ -25,8 +25,7 @@ #include #include -#if defined(CONFIG_EDB9301) || defined(CONFIG_EDB9302) || \ - defined(CONFIG_EDB9302A) +#if defined(CONFIG_EDB9301) /* * fclk_div: 2, nbyp1: 1, hclk_div: 5, pclk_div: 2 * pll1_x1: 294912000.00, pll1_x2ip: 36864000.00, @@ -39,7 +38,8 @@ 3 << SYSCON_CLKSET1_HCLK_DIV_SHIFT |\ SYSCON_CLKSET1_NBYP1 | \ 1 << SYSCON_CLKSET1_FCLK_DIV_SHIFT) -#elif defined(CONFIG_EDB9307) || defined(CONFIG_EDB9307A) || \ +#elif defined(CONFIG_EDB9302) || defined(CONFIG_EDB9302A) \ + defined(CONFIG_EDB9307) || defined(CONFIG_EDB9307A) || \ defined CONFIG_EDB9312 || defined(CONFIG_EDB9315) ||\ defined(CONFIG_EDB9315A) /* diff --git a/board/edb93xx/sdram_cfg.h b/board/edb93xx/sdram_cfg.h index 757b63c..5a5cf82 100644 --- a/board/edb93xx/sdram_cfg.h +++ b/board/edb93xx/sdram_cfg.h @@ -43,12 +43,13 @@ * CLK cycle time min: * @ CAS latency = 3: 7.5ns * @ CAS latency = 2: 10ns - * We're running at 66MHz (15ns cycle time) external bus speed (HCLK), - * so it's safe to use CAS latency = 2 + * We're running at 66MHz (EDB9301) / 100Mhz (EDB9302(a)) external + * bus speed (HCLK), with a cycle time of 15ns / 10ns, so it's safe + * to use CAS latency = 2 * * RAS-to-CAS delay min: * 20ns - * At 15ns cycle time, we use RAS-to-CAS delay = 2 + * At 15ns/10ns cycle time, we use RAS-to-CAS delay = 2 * * SROMLL = 1: Swap BA[1:0] with A[13:12], making the SDRAM appear * as four blocks of 8MB size, instead of eight blocks of 4MB size: -- 1.6.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v2 3/3] SAMSUNG: SMDKC100: Adds ethernet support.
From: Naveen Krishna CH
Add setup for ethernet on SMDKC100, allowing kernel/ramdisk to be
loaded over tftp.
The preinit function will configure GPIO (GPK0CON) & SROMC to look
for environment in SROM Bank 3.
Signed-off-by: Naveen Krishna Ch
---
Changes since V1:
1. The CONFIG_BOOTP* and Net config Macros are removed from config header.
Comments from Ben Warren are fixed
2. The GPIO configuration is modified & Macro and Function are renamed.
Comments from Minkyu Kang are fixed
board/samsung/smdkc100/smdkc100.c | 38 +
include/configs/smdkc100.h| 13 +++-
2 files changed, 50 insertions(+), 1 deletions(-)
diff --git a/board/samsung/smdkc100/smdkc100.c
b/board/samsung/smdkc100/smdkc100.c
index 15a1a27..43af5ea 100644
--- a/board/samsung/smdkc100/smdkc100.c
+++ b/board/samsung/smdkc100/smdkc100.c
@@ -23,10 +23,39 @@
*/
#include
+#include
+#include
+#include
+
DECLARE_GLOBAL_DATA_PTR;
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+static void smc9115_pre_init(void)
+{
+ u32 tmp;
+ u32 smc_bw_conf;
+ struct s5pc100_gpio *const gpio =
+ (struct s5pc100_gpio *)S5PC100_GPIO_BASE;
+
+ /* gpio configuration GPK0CON */
+ tmp = __raw_readl(&gpio->gpio_k0.con);
+ tmp &= ~(0xf << CONFIG_ENV_SROM_BANK * 4);
+ tmp |= (0x2 << CONFIG_ENV_SROM_BANK * 4);
+ __raw_writel(tmp, &gpio->gpio_k0.con);
+
+ /* Ethernet needs bus width of 16 bits */
+ smc_bw_conf = SMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK);
+
+ /* Select and configure the SROMC bank */
+ s5pc1xx_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, SMC_BC_CON);
+}
+
int board_init(void)
{
+ smc9115_pre_init();
+
gd->bd->bi_arch_number = MACH_TYPE_SMDKC100;
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
@@ -49,3 +78,12 @@ int checkboard(void)
return 0;
}
#endif
+
+int board_eth_init(bd_t *bis)
+{
+ int rc = 0;
+#ifdef CONFIG_SMC911X
+ rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
+#endif
+ return rc;
+}
diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
index a8ba052..f7cfc5e 100644
--- a/include/configs/smdkc100.h
+++ b/include/configs/smdkc100.h
@@ -83,7 +83,7 @@
#undef CONFIG_CMD_FLASH
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_NAND
-#undef CONFIG_CMD_NET
+#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#define CONFIG_CMD_CACHE
#define CONFIG_CMD_REGINFO
@@ -235,4 +235,15 @@
#define CONFIG_DOS_PARTITION 1
+/*
+ * Ethernet Contoller driver
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_NET_MULTI
+#define CONFIG_SMC911X 1 /* we have a SMC9115 on-board */
+#define CONFIG_SMC911X_16_BIT 1 /* SMC911X_16_BIT Mode */
+#define CONFIG_SMC911X_BASE0x98800300 /* SMC911X Drive Base */
+#define CONFIG_ENV_SROM_BANK 3 /* Select SROM Bank-3 for Ethernet*/
+#endif /* CONFIG_CMD_NET */
+
#endif /* __CONFIG_H */
--
1.6.6
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[U-Boot] [PATCH v2 2/3] S5PC100: Function to configure the SROMC registers.
From: Naveen Krishna CH
Nand Flash, Ethernet, other features might need to configure the
SROMC registers accordingly.
The config_sromc() functions helps with this.
Signed-off-by: Naveen Krishna Ch
---
Changes since V1:
1. Funtion config_sromc() is renamed to s5pc1xx_config_sromc().
Comments from Minkyu Kang are fixed
cpu/arm_cortexa8/s5pc1xx/Makefile |1 +
cpu/arm_cortexa8/s5pc1xx/sromc.c | 54
include/asm-arm/arch-s5pc1xx/smc.h |3 ++
3 files changed, 58 insertions(+), 0 deletions(-)
create mode 100644 cpu/arm_cortexa8/s5pc1xx/sromc.c
diff --git a/cpu/arm_cortexa8/s5pc1xx/Makefile
b/cpu/arm_cortexa8/s5pc1xx/Makefile
index 4f922e6..0a6a9b4 100644
--- a/cpu/arm_cortexa8/s5pc1xx/Makefile
+++ b/cpu/arm_cortexa8/s5pc1xx/Makefile
@@ -34,6 +34,7 @@ SOBJS += reset.o
COBJS += clock.o
COBJS += cpu_info.o
COBJS += timer.o
+COBJS += sromc.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/cpu/arm_cortexa8/s5pc1xx/sromc.c b/cpu/arm_cortexa8/s5pc1xx/sromc.c
new file mode 100644
index 000..1d6e738
--- /dev/null
+++ b/cpu/arm_cortexa8/s5pc1xx/sromc.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2010 Samsung Electronics
+ * Naveen Krishna Ch
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+
+/*
+ * s5pc1xx_config_sromc() - select the proper SROMC Bank and configure the
+ * band width control and bank control registers
+ * srom_bank - SROM Bank 0 to 5
+ * smc_bw_conf - SMC Band witdh reg configuration value
+ * smc_bc_conf - SMC Bank Control reg configuration value
+ */
+void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf)
+{
+ u32 tmp;
+#if defined(CONFIG_S5PC100)
+ struct s5pc1xx_smc *const srom =
+ (struct s5pc1xx_smc *)S5PC100_SROMC_BASE;
+#elif defined(CONFIG_S5PC110)
+ struct s5pc1xx_smc *const srom =
+ (struct s5pc1xx_smc *)S5PC110_SROMC_BASE;
+#endif
+
+ /* Configure SMC_BW register to handle proper SROMC bank */
+ tmp = srom->bw;
+ tmp &= ~(0xF << (srom_bank * 4));
+ tmp |= smc_bw_conf;
+ srom->bw = tmp;
+
+ /* Configure SMC_BC register */
+ srom->bc[srom_bank] = smc_bc_conf;
+}
diff --git a/include/asm-arm/arch-s5pc1xx/smc.h
b/include/asm-arm/arch-s5pc1xx/smc.h
index 2a1ee07..a280dc1 100644
--- a/include/asm-arm/arch-s5pc1xx/smc.h
+++ b/include/asm-arm/arch-s5pc1xx/smc.h
@@ -51,4 +51,7 @@ struct s5pc1xx_smc {
};
#endif /* __ASSEMBLY__ */
+/* Configure the Band Width and Bank Control Regs for required SROMC Bank */
+void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf);
+
#endif /* __ASM_ARCH_SMC_H_ */
--
1.6.6
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Re: [U-Boot] [PATCH 5/9 V4] convert common files to new SoC access
Daniel Gorsulowski wrote: > Hello Jens, > > Jens Scharsig wrote: >> * add's a warning to all files, which need update to new SoC access >> * convert common files in cpu/../at91 and a lot of drivers to use >>c stucture SoC access >> >> >> Signed-off-by: Jens Scharsig > > > >> diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c >> index 9a48783..e0cf1e1 100644 >> --- a/drivers/i2c/soft_i2c.c >> +++ b/drivers/i2c/soft_i2c.c >> @@ -30,14 +30,15 @@ >> #include >> #include >> #endif >> -#ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 >> */ >> +#if defined(CONFIG_AT91RM9200) || \ >> +defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \ >> +defined(CONFIG_AT91SAM9263) >> #include >> #include >> -#endif >> -#ifdef CONFIG_AT91SAM9263 /* only valid for AT91SAM9263 */ >> -#include > Please don't remove this include. It breaks build on AT91SAM9263 boards who > have > CONFIG_AT91_LEGACY enabled. (e.g. new otc570 board) >> +#include >> +#ifdef CONFIG_AT91_LEGACY >> #include >> -#include > dito >> +#endif >> #endif >> #ifdef CONFIG_IXP425 /* only valid for IXP425 */ >> #include I Updated my otc570 board to new SoC access, hence these includes are not needed anymore. I can ack this patch as it is. Best regards, Daniel Gorsulowski ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 5/9 V4] convert common files to new SoC access
Hello Jens,
Jens Scharsig wrote:
> * add's a warning to all files, which need update to new SoC access
> * convert common files in cpu/../at91 and a lot of drivers to use
>c stucture SoC access
> diff --git a/cpu/arm926ejs/at91/clock.c b/cpu/arm926ejs/at91/clock.c
> index 574f488..7e03907 100644
> --- a/cpu/arm926ejs/at91/clock.c
> +++ b/cpu/arm926ejs/at91/clock.c
IMHO you slipped the following:
diff --git a/cpu/arm926ejs/at91/clock.c b/cpu/arm926ejs/at91/clock.c
index 7e03907..b6f434a 100644
--- a/cpu/arm926ejs/at91/clock.c
+++ b/cpu/arm926ejs/at91/clock.c
@@ -157,9 +157,9 @@ int at91_clock_init(unsigned long main_clock)
*/
if (!main_clock) {
do {
- tmp = at91_sys_read(AT91_CKGR_MCFR);
- } while (!(tmp & AT91_PMC_MAINRDY));
- main_clock = (tmp & AT91_PMC_MAINF) * (AT91_SLOW_CLOCK / 16);
+ tmp = readl(&pmc->mcfr);
+ } while (!(tmp & AT91_PMC_IXR_MCKRDY));
+ main_clock = (tmp & (0x << 0)) * (AT91_SLOW_CLOCK / 16);
}
#endif
main_clk_rate_hz = main_clock;
--
I replaced AT91_PMC_MAINF with (0x << 0), because AT91_PMC_MAINF in not
available anymore. Maybe you find a better solution...
Best regards,
Daniel Gorsulowski
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