From: Naveen Krishna CH <chnav...@chnaveen.localdomain>
Nand Flash, Ethernet, other features might need to configure the
SROMC registers accordingly.
The config_sromc() functions helps with this.
Signed-off-by: Naveen Krishna Ch <ch.nav...@samsung.com>
---
Changes since V1:
1. Funtion config_sromc() is renamed to s5pc1xx_config_sromc().
Comments from Minkyu Kang are fixed
cpu/arm_cortexa8/s5pc1xx/Makefile | 1 +
cpu/arm_cortexa8/s5pc1xx/sromc.c | 54 ++++++++++++++++++++++++++++++++++++
include/asm-arm/arch-s5pc1xx/smc.h | 3 ++
3 files changed, 58 insertions(+), 0 deletions(-)
create mode 100644 cpu/arm_cortexa8/s5pc1xx/sromc.c
diff --git a/cpu/arm_cortexa8/s5pc1xx/Makefile
b/cpu/arm_cortexa8/s5pc1xx/Makefile
index 4f922e6..0a6a9b4 100644
--- a/cpu/arm_cortexa8/s5pc1xx/Makefile
+++ b/cpu/arm_cortexa8/s5pc1xx/Makefile
@@ -34,6 +34,7 @@ SOBJS += reset.o
COBJS += clock.o
COBJS += cpu_info.o
COBJS += timer.o
+COBJS += sromc.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
diff --git a/cpu/arm_cortexa8/s5pc1xx/sromc.c b/cpu/arm_cortexa8/s5pc1xx/sromc.c
new file mode 100644
index 0000000..1d6e738
--- /dev/null
+++ b/cpu/arm_cortexa8/s5pc1xx/sromc.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2010 Samsung Electronics
+ * Naveen Krishna Ch <ch.nav...@samsung.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/smc.h>
+
+/*
+ * s5pc1xx_config_sromc() - select the proper SROMC Bank and configure the
+ * band width control and bank control registers
+ * srom_bank - SROM Bank 0 to 5
+ * smc_bw_conf - SMC Band witdh reg configuration value
+ * smc_bc_conf - SMC Bank Control reg configuration value
+ */
+void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf)
+{
+ u32 tmp;
+#if defined(CONFIG_S5PC100)
+ struct s5pc1xx_smc *const srom =
+ (struct s5pc1xx_smc *)S5PC100_SROMC_BASE;
+#elif defined(CONFIG_S5PC110)
+ struct s5pc1xx_smc *const srom =
+ (struct s5pc1xx_smc *)S5PC110_SROMC_BASE;
+#endif
+
+ /* Configure SMC_BW register to handle proper SROMC bank */
+ tmp = srom->bw;
+ tmp &= ~(0xF << (srom_bank * 4));
+ tmp |= smc_bw_conf;
+ srom->bw = tmp;
+
+ /* Configure SMC_BC register */
+ srom->bc[srom_bank] = smc_bc_conf;
+}
diff --git a/include/asm-arm/arch-s5pc1xx/smc.h
b/include/asm-arm/arch-s5pc1xx/smc.h
index 2a1ee07..a280dc1 100644
--- a/include/asm-arm/arch-s5pc1xx/smc.h
+++ b/include/asm-arm/arch-s5pc1xx/smc.h
@@ -51,4 +51,7 @@ struct s5pc1xx_smc {
};
#endif /* __ASSEMBLY__ */
+/* Configure the Band Width and Bank Control Regs for required SROMC Bank */
+void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf);
+
#endif /* __ASM_ARCH_SMC_H_ */
--
1.6.6
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