Re: svn commit: r205014 - in head: . sys/amd64/amd64 sys/amd64/conf sys/amd64/include sys/amd64/linux32 sys/compat/freebsd32 sys/compat/ia32 sys/conf sys/fs/procfs sys/ia64/conf sys/ia64/ia64 sys/ia64

2010-03-17 Thread Ed Schouten
* M. Warner Losh  wrote:
> Under your plan, which __FreeBSD_version would we use here?

Well, the idea is that it's monotone. The lower you set the value, the
more rubbish you get.

-- 
 Ed Schouten 
 WWW: http://80386.nl/


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Re: svn commit: r204939 - head/secure/libexec

2010-03-17 Thread Dag-Erling Smørgrav
Doug Barton  writes:
> Dag-Erling Smørgrav  writes:
> > The proper way to handle this would have been to send me an email
> > asking if perhaps I had forgotten to commit the Makefile.
> 1. Broken needs to be fixed, sooner rather than later.
> 2. The change I made didn't affect any functionality because there was
> nothing there to break.
> 3. I actually meant to drop you a note that I made the change, but given
> that I know you follow the lists with regularity the priority for doing
> this in my own mind wasn't high enough, and it slipped my mind,
> apologies for that.

Well, no harm done.

DES
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Re: svn commit: r205231 - in head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs: . sys

2010-03-17 Thread John Baldwin
On Tuesday 16 March 2010 6:17:22 pm Kip Macy wrote:
> Author: kmacy
> Date: Tue Mar 16 22:17:21 2010
> New Revision: 205231
> URL: http://svn.freebsd.org/changeset/base/205231
> 
> Log:
>   - reduce contention by breaking up ARC state locks in to 16 for data
> and 16 for metadata
>   - export L2ARC tunables as sysctls
>   - add several kstats to track L2ARC state more precisely
>   - avoid holding a contended lock when atomically incrementing a
> contended counter (no lock protection needed for atomics)
> 
> Modified:
>   head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c
>   head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/sys/arc.h
> 
> Modified: head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c
> 
==
> --- head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c Tue Mar 16 
21:44:21 2010   (r205230)
> +++ head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c Tue Mar 16 
22:17:21 2010   (r205231)
> @@ -131,6 +131,7 @@
>  #include 
>  #include 
>  
> +#include 
>  #include 
>  
>  static kmutex_t  arc_reclaim_thr_lock;
> @@ -186,6 +187,11 @@ SYSCTL_QUAD(_vfs_zfs, OID_AUTO, arc_min,
>  SYSCTL_INT(_vfs_zfs, OID_AUTO, mdcomp_disable, CTLFLAG_RDTUN,
>  &zfs_mdcomp_disable, 0, "Disable metadata compression");
>  
> +#ifdef ZIO_USE_UMA
> +extern kmem_cache_t  *zio_buf_cache[];
> +extern kmem_cache_t  *zio_data_buf_cache[];
> +#endif
> +
>  /*
>   * Note that buffers can be in one of 6 states:
>   *   ARC_anon- anonymous (discussed below)
> @@ -218,13 +224,31 @@ SYSCTL_INT(_vfs_zfs, OID_AUTO, mdcomp_di
>   * second level ARC benefit from these fast lookups.
>   */
>  
> +#define  ARCS_LOCK_PAD   128

Please use CACHE_LINE_SIZE instead of hardcoding 128.

-- 
John Baldwin
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Re: svn commit: r205221 - head/sys/dev/bge

2010-03-17 Thread Andrew Gallatin

Pyun YongHyeon wrote:


  Revert r205090.
  It's hard to know when the mail box register write will get flushed to
  the hardware and it may take longer.
  
  Pointed out by:	scottl



I may be mis-reading the code, but it looks like the mailbox
register is in memory space, which should be flushed immediately
unless write-combining is enabled on the region.  The bge
driver does not seem to be setting up write combining.
Is the concern that something may enable write combining
behind your back?  In that case, a wmb() could act as a
serializing instruction and flush the WC buffers.

Or is it something completely different? Eg, maybe the chip
polls the mailboxes at some regular interval, and it doesn't
notice a write immediately. So writing earlier gives a better chance
that it will see the new value sooner.

Drew
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Re: svn commit: r205221 - head/sys/dev/bge

2010-03-17 Thread Bruce Evans

On Wed, 17 Mar 2010, Andrew Gallatin wrote:


Pyun YongHyeon wrote:


  Revert r205090.
  It's hard to know when the mail box register write will get flushed to
  the hardware and it may take longer.
Pointed out by: scottl


I may be mis-reading the code, but it looks like the mailbox
register is in memory space, which should be flushed immediately
unless write-combining is enabled on the region.  The bge
driver does not seem to be setting up write combining.
Is the concern that something may enable write combining
behind your back?  In that case, a wmb() could act as a
serializing instruction and flush the WC buffers.


We want writes to the PCI bus to be efficient.  Normally (?) writes
to bge registers appear to be several times faster than reads.  I don't
know if this depends on write combining but think it depends on write
buffering which can delay the write to the hardware by about the
difference between the read time and the time to write to the bufer.
Any forcing of serialization or timing would presumably lose the
benefits of the buffer.


Or is it something completely different? Eg, maybe the chip
polls the mailboxes at some regular interval, and it doesn't
notice a write immediately. So writing earlier gives a better chance
that it will see the new value sooner.


The old and restored strategy is to write early and then read.  The
read forces the write to the hardware, so it gives a 100% chance that
the hardware sees the write before the read (and before everything
that follows the read; accesses to the status block in fact follow the
read).  Probably these reads take even longer than most PCI reads since
they have to wait for the write that was just done, but not much can
be done about that except moving the write even earlier and/or moving
stuff that doesn't need to be serialized in between the write and the
read.

Bruce
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Re: svn commit: r205014 - in head: . sys/amd64/amd64 sys/amd64/conf sys/amd64/include sys/amd64/linux32 sys/compat/freebsd32 sys/compat/ia32 sys/conf sys/fs/procfs sys/ia64/conf sys/ia64/ia64 sys/ia64

2010-03-17 Thread M. Warner Losh
In message: <20100317085004.gb7...@hoeg.nl>
Ed Schouten  writes:
: * M. Warner Losh  wrote:
: > Under your plan, which __FreeBSD_version would we use here?
: 
: Well, the idea is that it's monotone. The lower you set the value, the
: more rubbish you get.

I agree with John this is too fine grained.  We don't currently have
this data for the removals, just when we did.  And it isn't clear that
our users could easily find this data either, even if we
dumpster-dived the repo for it.

Warner
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svn commit: r205250 - head/share/dict

2010-03-17 Thread David E. O'Brien
Author: obrien
Date: Wed Mar 17 15:31:06 2010
New Revision: 205250
URL: http://svn.freebsd.org/changeset/base/205250

Log:
  Add "Massachusetts".

Modified:
  head/share/dict/web2

Modified: head/share/dict/web2
==
--- head/share/dict/web2Wed Mar 17 09:52:26 2010(r205249)
+++ head/share/dict/web2Wed Mar 17 15:31:06 2010(r205250)
@@ -112025,6 +112025,7 @@ masquerader
 Mass
 mass
 massa
+Massachusetts
 massacre
 massacrer
 massage
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Re: svn commit: r205221 - head/sys/dev/bge

2010-03-17 Thread Andrew Gallatin

Bruce Evans wrote:
> On Wed, 17 Mar 2010, Andrew Gallatin wrote:
>
>> Pyun YongHyeon wrote:
>>
>>>   Revert r205090.
>>>   It's hard to know when the mail box register write will get 
flushed to

>>>   the hardware and it may take longer.
>>> Pointed out by:scottl
>>
>> I may be mis-reading the code, but it looks like the mailbox
>> register is in memory space, which should be flushed immediately
>> unless write-combining is enabled on the region.  The bge
>> driver does not seem to be setting up write combining.
>> Is the concern that something may enable write combining
>> behind your back?  In that case, a wmb() could act as a
>> serializing instruction and flush the WC buffers.
>
> We want writes to the PCI bus to be efficient.  Normally (?) writes
> to bge registers appear to be several times faster than reads.  I don't
> know if this depends on write combining but think it depends on write
> buffering which can delay the write to the hardware by about the
> difference between the read time and the time to write to the bufer.
> Any forcing of serialization or timing would presumably lose the
> benefits of the buffer.

What buffer? On the host side of the PCI{e} bus or the NIC side??

For i386/amd64, only write-combining (MTRR or PAT) pio mappings are
buffered on the host side.  Every other PIO behaves as if implicitly
surrounded by a serializing instruction before and after for legacy
reasons.  On non i386/amd64, there may be buffering; it depends on the
platform.  Or are you talking about buffering on the bge side of the
PCI{e} bus?

The point I was trying to make is that PIO reads are very
(hopelessly?) slow because the CPU stalls while waiting for the device
to return some data, and you're at the mercy of the device.  In
general, when you're given a choice as to what to use to force a write
across the PCI{e} bus (in the case of WC being enabled, or working on
a non-x86/amd64 arch), the best choice by far is a serializing
instruction (wmb()) and not a PIO read.  Unfortunately, it looks like
a PIO read is intimately entwined with correct operation of this
device, so doing it the old way is probably safest/best.

Sorry for the noise..

Drew


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Re: svn commit: r205165 - head/lib/libc/gen

2010-03-17 Thread Dag-Erling Smørgrav
Bruce Evans  writes:
> Even if the child causes the flush, the content of stdout and stderr
> is not flushed normally since it is redirected to /dev/null.  Unflushed
> input in stdin is handled more brokenly: although stdin is redirected
> to /dev/null, input on it can still be read via stdin's buffer.
> Inheriting unflushed input on other streams is a feature (unless these
> streams are open on fd's 0-2; then these streams will have the same
> corruption as std* streams open on their normal fd's 0-2).

how about

Index: gen/daemon.c
===
--- gen/daemon.c(revision 204870)
+++ gen/daemon.c(working copy)
@@ -37,6 +37,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -81,6 +82,9 @@
(void)chdir("/");
 
if (!noclose && (fd = _open(_PATH_DEVNULL, O_RDWR, 0)) != -1) {
+   fpurge(stdin);
+   fflush(stdout);
+   fflush(stderr);
(void)_dup2(fd, STDIN_FILENO);
(void)_dup2(fd, STDOUT_FILENO);
(void)_dup2(fd, STDERR_FILENO);

?

DES
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Re: svn commit: r205014 - in head: . sys/amd64/amd64 sys/amd64/conf sys/amd64/include sys/amd64/linux32 sys/compat/freebsd32 sys/compat/ia32 sys/conf sys/fs/procfs sys/ia64/conf sys/ia64/ia64 sys/ia64

2010-03-17 Thread Ed Schouten
* M. Warner Losh  wrote:
> I agree with John this is too fine grained.  We don't currently have
> this data for the removals, just when we did.  And it isn't clear that
> our users could easily find this data either, even if we
> dumpster-dived the repo for it.

I do think the same, but maybe in the future we should annotate compat
bits like these in source by specific __FreeBSD_version?

-- 
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 WWW: http://80386.nl/


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Re: svn commit: r205014 - in head: . sys/amd64/amd64 sys/amd64/conf sys/amd64/include sys/amd64/linux32 sys/compat/freebsd32 sys/compat/ia32 sys/conf sys/fs/procfs sys/ia64/conf sys/ia64/ia64 sys/ia64

2010-03-17 Thread M. Warner Losh
In message: <20100317171648.gd7...@hoeg.nl>
Ed Schouten  writes:
: * M. Warner Losh  wrote:
: > I agree with John this is too fine grained.  We don't currently have
: > this data for the removals, just when we did.  And it isn't clear that
: > our users could easily find this data either, even if we
: > dumpster-dived the repo for it.
: 
: I do think the same, but maybe in the future we should annotate compat
: bits like these in source by specific __FreeBSD_version?

Such annotations might be useful.  However, most (all?) of them will
be in the X00yyy, since we usually only demote code to compat status
on -head.  Users would likely almost always set this value to X0.
Furthermore, you can't pick which of the things removed in release X
are omitted arbitrarily, just a point in a list.  This suggests, to my
mind at least, that we're adding extra complexity in selecting
compatibility bits, but not really providing much value add for that
complexity.  Am I missing something?

Warner
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svn commit: r205251 - head/sys/netinet

2010-03-17 Thread Bjoern A. Zeeb
Author: bz
Date: Wed Mar 17 18:28:27 2010
New Revision: 205251
URL: http://svn.freebsd.org/changeset/base/205251

Log:
  Add pcb reference counting to the pcblist sysctl handler functions
  to ensure type stability while caching the pcb pointers for the
  copyout.
  
  Reviewed by:  rwatson
  MFC after:7 days

Modified:
  head/sys/netinet/ip_divert.c
  head/sys/netinet/raw_ip.c
  head/sys/netinet/tcp_subr.c
  head/sys/netinet/udp_usrreq.c

Modified: head/sys/netinet/ip_divert.c
==
--- head/sys/netinet/ip_divert.cWed Mar 17 15:31:06 2010
(r205250)
+++ head/sys/netinet/ip_divert.cWed Mar 17 18:28:27 2010
(r205251)
@@ -628,11 +628,13 @@ div_pcblist(SYSCTL_HANDLER_ARGS)
INP_INFO_RLOCK(&V_divcbinfo);
for (inp = LIST_FIRST(V_divcbinfo.ipi_listhead), i = 0; inp && i < n;
 inp = LIST_NEXT(inp, inp_list)) {
-   INP_RLOCK(inp);
+   INP_WLOCK(inp);
if (inp->inp_gencnt <= gencnt &&
-   cr_canseeinpcb(req->td->td_ucred, inp) == 0)
+   cr_canseeinpcb(req->td->td_ucred, inp) == 0) {
+   in_pcbref(inp);
inp_list[i++] = inp;
-   INP_RUNLOCK(inp);
+   }
+   INP_WUNLOCK(inp);
}
INP_INFO_RUNLOCK(&V_divcbinfo);
n = i;
@@ -654,6 +656,15 @@ div_pcblist(SYSCTL_HANDLER_ARGS)
} else
INP_RUNLOCK(inp);
}
+   INP_INFO_WLOCK(&V_divcbinfo);
+   for (i = 0; i < n; i++) {
+   inp = inp_list[i];
+   INP_WLOCK(inp);
+   if (!in_pcbrele(inp))
+   INP_WUNLOCK(inp);
+   }
+   INP_INFO_WUNLOCK(&V_divcbinfo);
+
if (!error) {
/*
 * Give the user an updated idea of our state.

Modified: head/sys/netinet/raw_ip.c
==
--- head/sys/netinet/raw_ip.c   Wed Mar 17 15:31:06 2010(r205250)
+++ head/sys/netinet/raw_ip.c   Wed Mar 17 18:28:27 2010(r205251)
@@ -1011,13 +1011,13 @@ rip_pcblist(SYSCTL_HANDLER_ARGS)
INP_INFO_RLOCK(&V_ripcbinfo);
for (inp = LIST_FIRST(V_ripcbinfo.ipi_listhead), i = 0; inp && i < n;
 inp = LIST_NEXT(inp, inp_list)) {
-   INP_RLOCK(inp);
+   INP_WLOCK(inp);
if (inp->inp_gencnt <= gencnt &&
cr_canseeinpcb(req->td->td_ucred, inp) == 0) {
-   /* XXX held references? */
+   in_pcbref(inp);
inp_list[i++] = inp;
}
-   INP_RUNLOCK(inp);
+   INP_WUNLOCK(inp);
}
INP_INFO_RUNLOCK(&V_ripcbinfo);
n = i;
@@ -1040,6 +1040,15 @@ rip_pcblist(SYSCTL_HANDLER_ARGS)
} else
INP_RUNLOCK(inp);
}
+   INP_INFO_WLOCK(&V_ripcbinfo);
+   for (i = 0; i < n; i++) {
+   inp = inp_list[i];
+   INP_WLOCK(inp);
+   if (!in_pcbrele(inp))
+   INP_WUNLOCK(inp);
+   }
+   INP_INFO_WUNLOCK(&V_ripcbinfo);
+
if (!error) {
/*
 * Give the user an updated idea of our state.  If the

Modified: head/sys/netinet/tcp_subr.c
==
--- head/sys/netinet/tcp_subr.c Wed Mar 17 15:31:06 2010(r205250)
+++ head/sys/netinet/tcp_subr.c Wed Mar 17 18:28:27 2010(r205251)
@@ -1108,7 +1108,7 @@ tcp_pcblist(SYSCTL_HANDLER_ARGS)
INP_INFO_RLOCK(&V_tcbinfo);
for (inp = LIST_FIRST(V_tcbinfo.ipi_listhead), i = 0;
inp != NULL && i < n; inp = LIST_NEXT(inp, inp_list)) {
-   INP_RLOCK(inp);
+   INP_WLOCK(inp);
if (inp->inp_gencnt <= gencnt) {
/*
 * XXX: This use of cr_cansee(), introduced with
@@ -1123,10 +1123,12 @@ tcp_pcblist(SYSCTL_HANDLER_ARGS)
error = EINVAL; /* Skip this inp. */
} else
error = cr_canseeinpcb(req->td->td_ucred, inp);
-   if (error == 0)
+   if (error == 0) {
+   in_pcbref(inp);
inp_list[i++] = inp;
+   }
}
-   INP_RUNLOCK(inp);
+   INP_WUNLOCK(inp);
}
INP_INFO_RUNLOCK(&V_tcbinfo);
n = i;
@@ -1165,8 +1167,16 @@ tcp_pcblist(SYSCTL_HANDLER_ARGS)
error = SYSCTL_OUT(req, &xt, sizeof xt);
} else
INP_RUNLOCK(inp);
-   
}
+   INP_INFO_WLOCK(&V_tcbinfo);
+   for (i = 0; i < n; i++) {
+   inp =

svn commit: r205252 - head/sys/cam/scsi

2010-03-17 Thread Matt Jacob
Author: mjacob
Date: Wed Mar 17 18:53:58 2010
New Revision: 205252
URL: http://svn.freebsd.org/changeset/base/205252

Log:
  We actually can generate a host number.
  
  MFC after:1 month

Modified:
  head/sys/cam/scsi/scsi_sg.c

Modified: head/sys/cam/scsi/scsi_sg.c
==
--- head/sys/cam/scsi/scsi_sg.c Wed Mar 17 18:28:27 2010(r205251)
+++ head/sys/cam/scsi/scsi_sg.c Wed Mar 17 18:53:58 2010(r205252)
@@ -586,7 +586,7 @@ sgioctl(struct cdev *dev, u_long cmd, ca
{
struct sg_scsi_id id;
 
-   id.host_no = 0; /* XXX */
+   id.host_no = cam_sim_path(xpt_path_sim(periph->path));
id.channel = xpt_path_path_id(periph->path);
id.scsi_id = xpt_path_target_id(periph->path);
id.lun = xpt_path_lun_id(periph->path);
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svn commit: r205253 - head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs

2010-03-17 Thread Kip Macy
Author: kmacy
Date: Wed Mar 17 20:00:22 2010
New Revision: 205253
URL: http://svn.freebsd.org/changeset/base/205253

Log:
  use CACHE_LINE_SIZE instead of hardcoding 128 for lock pad
  
  pointed out by Marius Nuennerich and jhb@

Modified:
  head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c

Modified: head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c
==
--- head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c   Wed Mar 17 
18:53:58 2010(r205252)
+++ head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c   Wed Mar 17 
20:00:22 2010(r205253)
@@ -568,7 +568,7 @@ static void arc_evict_ghost(arc_state_t 
  * Hash table routines
  */
 
-#defineHT_LOCK_PAD 128
+#defineHT_LOCK_PAD CACHE_LINE_SIZE
 
 struct ht_lock {
kmutex_tht_lock;
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svn commit: r205254 - head/sys/sparc64/pci

2010-03-17 Thread Marius Strobl
Author: marius
Date: Wed Mar 17 20:01:01 2010
New Revision: 205254
URL: http://svn.freebsd.org/changeset/base/205254

Log:
  - Add quirk handling for Sun Fire V1280. The firmware of these machines
provides no ino-bitmap properties so forge them using the default set
of controller interrupts and let schizo_setup_intr() take care of the
children, hoping for non-fancy routing.
  - Add quirk handling for Sun Fire V890. When booting these machines from
disk a Schizo comes up with PCI error residing which triggers as soon
as we register schizo_pci_bus() even when clearing it from all involved
registers (it's no longer indicated once we're in schizo_pci_bus()
though). Thus make PCI bus errors non-fatal until we actually touch the
bus. With this change schizo_pci_bus() typically triggers once during
attach in this case. Obviously this approach isn't exactly race free
but it's about the best we can do about this problem as we're not
guaranteed that the interrupt will actually trigger on V890 either, as
it certainly doesn't when for example netbooting them.

Modified:
  head/sys/sparc64/pci/schizo.c
  head/sys/sparc64/pci/schizovar.h

Modified: head/sys/sparc64/pci/schizo.c
==
--- head/sys/sparc64/pci/schizo.c   Wed Mar 17 20:00:22 2010
(r205253)
+++ head/sys/sparc64/pci/schizo.c   Wed Mar 17 20:01:01 2010
(r205254)
@@ -402,9 +402,22 @@ schizo_attach(device_t dev)
 */
i = OF_getprop(node, "ino-bitmap", (void *)prop_array,
sizeof(prop_array));
-   if (i == -1)
-   panic("%s: could not get ino-bitmap", __func__);
-   ino_bitmap = ((uint64_t)prop_array[1] << 32) | prop_array[0];
+   if (i != -1)
+   ino_bitmap = ((uint64_t)prop_array[1] << 32) | prop_array[0];
+   else {
+   /*
+* If the ino-bitmap property is missing, just provide the
+* default set of interrupts for this controller and let
+* schizo_setup_intr() take care of child interrupts.
+*/
+   if (sc->sc_half == 0)
+   ino_bitmap = (1ULL << STX_UE_INO) |
+   (1ULL << STX_CE_INO) |
+   (1ULL << STX_PCIERR_A_INO) |
+   (1ULL << STX_BUS_INO);
+   else
+   ino_bitmap = 1ULL << STX_PCIERR_B_INO;
+   }
for (i = 0; i <= STX_MAX_INO; i++) {
if ((ino_bitmap & (1ULL << i)) == 0)
continue;
@@ -684,6 +697,14 @@ schizo_attach(device_t dev)
 
ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(ofw_pci_intr_t));
 
+   /*
+* At least when booting Fire V890 from disk a Schizo comes up with
+* a PCI bus error residing which triggers as soon as we register
+* schizo_pci_bus() even when clearing it from all involved registers
+* beforehand (but is quiet once it has fired).  Thus we make PCI bus
+* errors non-fatal until we actually touch the bus.
+*/
+   sc->sc_flags |= SCHIZO_FLAGS_ARMED;
device_add_child(dev, "pci", -1);
return (bus_generic_attach(dev));
 }
@@ -787,6 +808,8 @@ schizo_pci_bus(void *arg)
iommu = SCHIZO_PCI_READ_8(sc, STX_PCI_IOMMU);
status = PCIB_READ_CONFIG(sc->sc_dev, sc->sc_pci_secbus,
STX_CS_DEVICE, STX_CS_FUNC, PCIR_STATUS, 2);
+   if ((sc->sc_flags & SCHIZO_FLAGS_ARMED) == 0)
+   goto clear_error;
if ((csr & STX_PCI_CTRL_MMU_ERR) != 0) {
if ((iommu & TOM_PCI_IOMMU_ERR) == 0)
goto clear_error;

Modified: head/sys/sparc64/pci/schizovar.h
==
--- head/sys/sparc64/pci/schizovar.hWed Mar 17 20:00:22 2010
(r205253)
+++ head/sys/sparc64/pci/schizovar.hWed Mar 17 20:01:01 2010
(r205254)
@@ -44,8 +44,9 @@ struct schizo_softc {
 #defineSCHIZO_MODE_XMS 2
 
u_int   sc_flags;
-#defineSCHIZO_FLAGS_BSWAR  (1 << 0)
-#defineSCHIZO_FLAGS_CDMA   (1 << 1)
+#defineSCHIZO_FLAGS_ARMED  (1 << 0)
+#defineSCHIZO_FLAGS_BSWAR  (1 << 1)
+#defineSCHIZO_FLAGS_CDMA   (1 << 2)
 
bus_addr_t  sc_cdma_clr;
uint32_tsc_cdma_state;
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svn commit: r205255 - head/sys/dev/mxge

2010-03-17 Thread Andrew Gallatin
Author: gallatin
Date: Wed Mar 17 20:13:09 2010
New Revision: 205255
URL: http://svn.freebsd.org/changeset/base/205255

Log:
  Fix 2 bugs in mxge_attach()
  
  - Don't leak slice resources when mxge_alloc_rings() fails
  
  - Start taskq threads only after we know attach will succeed.  At
boot time, taskqueue_terminate() will loop infinately, waiting
for the threads to exit, and hang the system.
  
  Submitted by: Panasas
  MFC After: 3 days

Modified:
  head/sys/dev/mxge/if_mxge.c

Modified: head/sys/dev/mxge/if_mxge.c
==
--- head/sys/dev/mxge/if_mxge.c Wed Mar 17 20:01:01 2010(r205254)
+++ head/sys/dev/mxge/if_mxge.c Wed Mar 17 20:13:09 2010(r205255)
@@ -4616,8 +4616,6 @@ mxge_attach(device_t dev)
err = ENOMEM;
goto abort_with_nothing;
}
-   taskqueue_start_threads(&sc->tq, 1, PI_NET, "%s taskq",
-   device_get_nameunit(sc->dev));
 
err = bus_dma_tag_create(NULL,  /* parent */
 1, /* alignment */
@@ -4723,7 +4721,7 @@ mxge_attach(device_t dev)
err = mxge_alloc_rings(sc);
if (err != 0) {
device_printf(sc->dev, "failed to allocate rings\n");
-   goto abort_with_dmabench;
+   goto abort_with_slices;
}
 
err = mxge_add_irq(sc);
@@ -4781,6 +4779,8 @@ mxge_attach(device_t dev)
ifp->if_transmit = mxge_transmit;
ifp->if_qflush = mxge_qflush;
 #endif
+   taskqueue_start_threads(&sc->tq, 1, PI_NET, "%s taskq",
+   device_get_nameunit(sc->dev));
callout_reset(&sc->co_hdl, mxge_ticks, mxge_tick, sc);
return 0;
 
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svn commit: r205258 - in head/sys/sparc64: include sparc64

2010-03-17 Thread Marius Strobl
Author: marius
Date: Wed Mar 17 20:23:14 2010
New Revision: 205258
URL: http://svn.freebsd.org/changeset/base/205258

Log:
  - Add TTE and context register bits for the additional page sizes supported
by UltraSparc-IV and -IV+ as well as SPARC64 V, VI, VII and VIIIfx CPUs.
  - Replace TLB_PCXR_PGSZ_MASK and TLB_SCXR_PGSZ_MASK with TLB_CXR_PGSZ_MASK
which just is the complement of TLB_CXR_CTX_MASK instead of trying to
assemble it from the page size bits which vary across CPUs.
  - Add macros for the remainder of the SFSR bits, which are useful for at
least debugging purposes.

Modified:
  head/sys/sparc64/include/tlb.h
  head/sys/sparc64/include/tte.h
  head/sys/sparc64/sparc64/genassym.c
  head/sys/sparc64/sparc64/pmap.c
  head/sys/sparc64/sparc64/swtch.S

Modified: head/sys/sparc64/include/tlb.h
==
--- head/sys/sparc64/include/tlb.h  Wed Mar 17 20:17:25 2010
(r205257)
+++ head/sys/sparc64/include/tlb.h  Wed Mar 17 20:23:14 2010
(r205258)
@@ -1,5 +1,6 @@
 /*-
  * Copyright (c) 2001 Jake Burkholder.
+ * Copyright (c) 2008, 2010 Marius Strobl 
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -35,11 +36,11 @@
 #defineTLB_DIRECT_ADDRESS_MASK ((1UL << 
TLB_DIRECT_ADDRESS_BITS) - 1)
 #defineTLB_DIRECT_PAGE_MASK((1UL << TLB_DIRECT_PAGE_BITS) 
- 1)
 
-#defineTLB_PHYS_TO_DIRECT(pa) \
+#defineTLB_PHYS_TO_DIRECT(pa)  
\
((pa) | VM_MIN_DIRECT_ADDRESS)
-#defineTLB_DIRECT_TO_PHYS(va) \
+#defineTLB_DIRECT_TO_PHYS(va)  
\
((va) & TLB_DIRECT_ADDRESS_MASK)
-#defineTLB_DIRECT_TO_TTE_MASK \
+#defineTLB_DIRECT_TO_TTE_MASK  
\
(TD_V | TD_4M | (TLB_DIRECT_ADDRESS_MASK - TLB_DIRECT_PAGE_MASK))
 
 #defineTLB_DAR_SLOT_SHIFT  (3)
@@ -56,18 +57,21 @@
(((1UL << TLB_CXR_CTX_BITS) - 1) << TLB_CXR_CTX_SHIFT)
 #defineTLB_CXR_CTX_SHIFT   (0)
 #defineTLB_CXR_PGSZ_BITS   (3)
-#defineTLB_PCXR_PGSZ_MASK  
\
-   1UL << TLB_CXR_PGSZ_BITS) - 1) << TLB_PCXR_N_PGSZ0_SHIFT) | \
-   (((1UL << TLB_CXR_PGSZ_BITS) - 1) << TLB_PCXR_N_PGSZ1_SHIFT) |  \
-   (((1UL << TLB_CXR_PGSZ_BITS) - 1) << TLB_PCXR_P_PGSZ0_SHIFT) |  \
-   (((1UL << TLB_CXR_PGSZ_BITS) - 1) << TLB_PCXR_P_PGSZ1_SHIFT))
+#defineTLB_CXR_PGSZ_MASK   (~TLB_CXR_CTX_MASK)
+#defineTLB_PCXR_N_IPGSZ0_SHIFT (53)/* SPARC64 VI, VII, 
VIIIfx */
+#defineTLB_PCXR_N_IPGSZ1_SHIFT (50)/* SPARC64 VI, VII, 
VIIIfx */
 #defineTLB_PCXR_N_PGSZ0_SHIFT  (61)
 #defineTLB_PCXR_N_PGSZ1_SHIFT  (58)
+#defineTLB_PCXR_N_PGSZ_I_SHIFT (55)/* US-IV+ */
+#defineTLB_PCXR_P_IPGSZ0_SHIFT (24)/* SPARC64 VI, VII, 
VIIIfx */
+#defineTLB_PCXR_P_IPGSZ1_SHIFT (27)/* SPARC64 VI, VII, 
VIIIfx */
 #defineTLB_PCXR_P_PGSZ0_SHIFT  (16)
 #defineTLB_PCXR_P_PGSZ1_SHIFT  (19)
-#defineTLB_SCXR_PGSZ_MASK  
\
-   1UL << TLB_CXR_PGSZ_BITS) - 1) << TLB_SCXR_S_PGSZ0_SHIFT) | \
-   (((1UL << TLB_CXR_PGSZ_BITS) - 1) << TLB_SCXR_S_PGSZ1_SHIFT))
+/*
+ * Note that the US-IV+ documentation appears to have TLB_PCXR_P_PGSZ_I_SHIFT
+ * and TLB_PCXR_P_PGSZ0_SHIFT erroneously inverted.
+ */
+#defineTLB_PCXR_P_PGSZ_I_SHIFT (22)/* US-IV+ */
 #defineTLB_SCXR_S_PGSZ1_SHIFT  (19)
 #defineTLB_SCXR_S_PGSZ0_SHIFT  (16)
 
@@ -87,7 +91,7 @@
 #defineTLB_DEMAP_TYPE_SHIFT(6)
 #defineTLB_DEMAP_TYPE_PAGE (0)
 #defineTLB_DEMAP_TYPE_CONTEXT  (1)
-#defineTLB_DEMAP_TYPE_ALL  (2) /* USIII and beyond 
only */
+#defineTLB_DEMAP_TYPE_ALL  (2) /* US-III and beyond 
only */
 
 #defineTLB_DEMAP_VA(va)((va) & ~PAGE_MASK)
 #defineTLB_DEMAP_ID(id)((id) << TLB_DEMAP_ID_SHIFT)
@@ -118,9 +122,17 @@
 #defineMMU_SFSR_FT_SIZE(6)
 #defineMMU_SFSR_CT_SIZE(2)
 
-#defineMMU_SFSR_GET_ASI(sfsr) \
+#defineMMU_SFSR_GET_ASI(sfsr)  
\
(((sfsr) >> MMU_SFSR_ASI_SHIFT) & ((1UL << MMU_SFSR_ASI_SIZE) - 1))
+#defineMMU_SFSR_GET_FT(sfsr)   
\
+   (((sfsr) >> MMU_SFSR_FT_SHIFT) & ((1UL << MMU_SFSR_FT_SIZE) - 1))
+#defineMMU_SFSR_GET_CT(sfsr)   
\
+   (((sfsr) >> MMU_SFSR_CT_SHIFT) & ((1UL << MMU_SFSR_CT_SIZE) - 1))
+
+#define   

svn commit: r205263 - head/sys/sparc64/include

2010-03-17 Thread Marius Strobl
Author: marius
Date: Wed Mar 17 21:00:39 2010
New Revision: 205263
URL: http://svn.freebsd.org/changeset/base/205263

Log:
  Add macros for the VER.impl of SPARC64 II to VIIIfx.

Modified:
  head/sys/sparc64/include/ver.h

Modified: head/sys/sparc64/include/ver.h
==
--- head/sys/sparc64/include/ver.h  Wed Mar 17 20:39:21 2010
(r205262)
+++ head/sys/sparc64/include/ver.h  Wed Mar 17 21:00:39 2010
(r205263)
@@ -69,8 +69,15 @@ extern char sparc64_model[];
 
 #endif /* !LOCORE */
 
-/* Known implementations. */
+/* Known implementations */
 #defineCPU_IMPL_SPARC640x01
+#defineCPU_IMPL_SPARC64II  0x02
+#defineCPU_IMPL_SPARC64III 0x03
+#defineCPU_IMPL_SPARC64IV  0x04
+#defineCPU_IMPL_SPARC64V   0x05
+#defineCPU_IMPL_SPARC64VI  0x06
+#defineCPU_IMPL_SPARC64VII 0x07
+#defineCPU_IMPL_SPARC64VIIIfx  0x08
 #defineCPU_IMPL_ULTRASPARCI0x10
 #defineCPU_IMPL_ULTRASPARCII   0x11
 #defineCPU_IMPL_ULTRASPARCIIi  0x12
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svn commit: r205264 - head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs

2010-03-17 Thread Kip Macy
Author: kmacy
Date: Wed Mar 17 21:10:09 2010
New Revision: 205264
URL: http://svn.freebsd.org/changeset/base/205264

Log:
  - cache line align arcs_lock array (h/t Marius Nuennerich)
  - fix ARCS_LOCK_PAD to use architecture defined CACHE_LINE_SIZE
  - cache line align buf_hash_table ht_locks array
  
  MFC after:7 days

Modified:
  head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c

Modified: head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c
==
--- head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c   Wed Mar 17 
21:00:39 2010(r205263)
+++ head/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/arc.c   Wed Mar 17 
21:10:09 2010(r205264)
@@ -224,7 +224,7 @@ extern kmem_cache_t *zio_data_buf_cache[
  * second level ARC benefit from these fast lookups.
  */
 
-#defineARCS_LOCK_PAD   128
+#defineARCS_LOCK_PAD   CACHE_LINE_SIZE
 struct arcs_lock {
kmutex_tarcs_lock;
 #ifdef _KERNEL
@@ -244,7 +244,7 @@ typedef struct arc_state {
uint64_t arcs_lsize[ARC_BUFC_NUMTYPES]; /* amount of evictable data */
uint64_t arcs_size; /* total amount of data in this state */
list_t  arcs_lists[ARC_BUFC_NUMLISTS]; /* list of evictable buffers */
-   struct arcs_lock arcs_locks[ARC_BUFC_NUMLISTS] __aligned(128);
+   struct arcs_lock arcs_locks[ARC_BUFC_NUMLISTS] 
__aligned(CACHE_LINE_SIZE);
 } arc_state_t;
 
 #define ARCS_LOCK(s, i) &((s)->arcs_locks[(i)].arcs_lock)
@@ -581,7 +581,7 @@ struct ht_lock {
 typedef struct buf_hash_table {
uint64_t ht_mask;
arc_buf_hdr_t **ht_table;
-   struct ht_lock ht_locks[BUF_LOCKS];
+   struct ht_lock ht_locks[BUF_LOCKS] __aligned(CACHE_LINE_SIZE);
 } buf_hash_table_t;
 
 static buf_hash_table_t buf_hash_table;
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svn commit: r205266 - head/sys/vm

2010-03-17 Thread Kip Macy
Author: kmacy
Date: Wed Mar 17 21:18:28 2010
New Revision: 205266
URL: http://svn.freebsd.org/changeset/base/205266

Log:
  Cache line align various structures and move volatile counters to
  not share a cache line with (mostly) immutable state
  
  Reviewed by:  jeff@
  MFC after:7 days

Modified:
  head/sys/vm/uma_int.h

Modified: head/sys/vm/uma_int.h
==
--- head/sys/vm/uma_int.h   Wed Mar 17 21:11:48 2010(r205265)
+++ head/sys/vm/uma_int.h   Wed Mar 17 21:18:28 2010(r205266)
@@ -160,6 +160,11 @@ struct uma_hash {
 };
 
 /*
+ * align field or structure to cache line
+ */
+#define UMA_ALIGN  __aligned(CACHE_LINE_SIZE)
+
+/*
  * Structures for per cpu queues.
  */
 
@@ -168,7 +173,7 @@ struct uma_bucket {
int16_t ub_cnt; /* Count of free items. */
int16_t ub_entries; /* Max items. */
void*ub_bucket[];   /* actual allocation storage */
-};
+} UMA_ALIGN;
 
 typedef struct uma_bucket * uma_bucket_t;
 
@@ -177,7 +182,7 @@ struct uma_cache {
uma_bucket_tuc_allocbucket; /* Bucket to allocate from */
u_int64_t   uc_allocs;  /* Count of allocations */
u_int64_t   uc_frees;   /* Count of frees */
-};
+} UMA_ALIGN;
 
 typedef struct uma_cache * uma_cache_t;
 
@@ -312,11 +317,12 @@ struct uma_zone {
uma_inituz_init;/* Initializer for each item */
uma_finiuz_fini;/* Discards memory */
 
-   u_int64_t   uz_allocs;  /* Total number of allocations */
-   u_int64_t   uz_frees;   /* Total number of frees */
-   u_int64_t   uz_fails;   /* Total number of alloc failures */
u_int32_t   uz_flags;   /* Flags inherited from kegs */
u_int32_t   uz_size;/* Size inherited from kegs */
+
+   u_int64_t   uz_allocs UMA_ALIGN; /* Total number of allocations */
+   u_int64_t   uz_frees;   /* Total number of frees */
+   u_int64_t   uz_fails;   /* Total number of alloc failures */
uint16_tuz_fills;   /* Outstanding bucket fills */
uint16_tuz_count;   /* Highest value ub_ptr can have */
 
@@ -324,7 +330,7 @@ struct uma_zone {
 * This HAS to be the last item because we adjust the zone size
 * based on NCPU and then allocate the space for the zones.
 */
-   struct uma_cacheuz_cpu[1];  /* Per cpu caches */
+   struct uma_cacheuz_cpu[1] UMA_ALIGN; /* Per cpu caches */
 };
 
 /*
@@ -341,6 +347,8 @@ struct uma_zone {
 #defineUMA_ZFLAG_INHERIT   (UMA_ZFLAG_INTERNAL | 
UMA_ZFLAG_CACHEONLY | \
UMA_ZFLAG_BUCKET)
 
+#undef UMA_ALIGN
+
 #ifdef _KERNEL
 /* Internal prototypes */
 static __inline uma_slab_t hash_sfind(struct uma_hash *hash, u_int8_t *data);
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svn commit: r205268 - head/sys/dev/mii

2010-03-17 Thread Qing Li
Author: qingli
Date: Wed Mar 17 22:12:12 2010
New Revision: 205268
URL: http://svn.freebsd.org/changeset/base/205268

Log:
  Set the device capabilities to include dynamic link-state for
  those modern drivers.
  
  Reviewed by:  imp (and suggested by imp)
  MFC after:3 days

Modified:
  head/sys/dev/mii/mii.c

Modified: head/sys/dev/mii/mii.c
==
--- head/sys/dev/mii/mii.c  Wed Mar 17 21:19:30 2010(r205267)
+++ head/sys/dev/mii/mii.c  Wed Mar 17 22:12:12 2010(r205268)
@@ -173,6 +173,8 @@ miibus_attach(device_t dev)
 * XXX: EVIL HACK!
 */
mii->mii_ifp = *(struct 
ifnet**)device_get_softc(device_get_parent(dev));
+   mii->mii_ifp->if_capabilities |= IFCAP_LINKSTATE;
+   mii->mii_ifp->if_capenable |= IFCAP_LINKSTATE;
ivars = device_get_ivars(dev);
ifmedia_init(&mii->mii_media, IFM_IMASK, ivars->ifmedia_upd,
ivars->ifmedia_sts);
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svn commit: r205269 - in head/sys/sparc64: include sparc64

2010-03-17 Thread Marius Strobl
Author: marius
Date: Wed Mar 17 22:45:09 2010
New Revision: 205269
URL: http://svn.freebsd.org/changeset/base/205269

Log:
  o Add support for UltraSparc-IV+:
- Swap the configuration of the first and second large dTLB as with
  US-IV+ these can only hold entries of certain page sizes each, which
  we happened to chose the non-working way around.
- Additionally ensure that the large iTLB is set up to hold 8k pages
  (currently this happens to be a NOP though).
- Add a workaround for US-IV+ erratum #2.
- Turn off dTLB parity error reporting as otherwise we get seemingly
  false positives when copying in the user window by simulating a
  fill trap on return to usermode. Given that these parity errors can
  be avoided by disabling multi issue mode and the problem could be
  reproduced with a second machine this appears to be a silicon bug of
  some sort.
- Add a membar #Sync also before the stores to ASI_DCACHE_TAG. While
  at it, turn of interrupts across the whole cheetah_cache_flush() for
  simplicity instead of around every flush. This should have next to no
  impact as for cheetah-class machines we typically only need to flush
  the caches a few times during boot when recovering from peeking/poking
  non-existent PCI devices, if at all.
- Just use KERNBASE for FLUSH as we also do elsewhere as the US-IV+
  documentation doesn't seem to mention that these CPUs also ignore the
  address like previous cheetah-class CPUs do. Again the code changing
  LSU_IC is executed seldom enough that the negligible optimization of
  using %g0 instead should have no real impact.
  
With these changes FreeBSD runs stable on V890 equipped with US-IV+
and -j128 buildworlds in a loop for days are no problem. Unfortunately,
the performance isn't were it should be as a buildworld on a 4x1.5GHz
US-IV+ V890 takes nearly 3h while on a V440 with (theoretically) less
powerfull 4x1.5GHz US-IIIi it takes just over 1h. It's unclear whether
this is related to the supposed silicon bug mentioned above or due to
another issue. The documentation (which contains a sever bug in the
description of the bits added to the context registers though) at least
doesn't mention any requirements for changes in the CPU handling besides
those implemented and the cache as well as the TLB configurations and
handling look fine.
  o Re-arrange cheetah_init() so it's easier to add support for SPARC64
V up to VIIIfx CPUs, which only require parts of this initialization.

Modified:
  head/sys/sparc64/include/dcr.h
  head/sys/sparc64/sparc64/cheetah.c

Modified: head/sys/sparc64/include/dcr.h
==
--- head/sys/sparc64/include/dcr.h  Wed Mar 17 22:12:12 2010
(r205268)
+++ head/sys/sparc64/include/dcr.h  Wed Mar 17 22:45:09 2010
(r205269)
@@ -57,6 +57,10 @@
 #defineDCR_BPM_BITS2
 #defineDCR_BPM_MASK
\
(((1UL << DCR_BPM_BITS) - 1) << DCR_BPM_SHIFT)
+#defineDCR_BPM_1HIST_GSHARE(0UL << DCR_BPM_SHIFT)
+#defineDCR_BPM_2HIST_GSHARE(1UL << DCR_BPM_SHIFT)
+#defineDCR_BPM_PC  (2UL << DCR_BPM_SHIFT)
+#defineDCR_BPM_2HIST_MIXED (3UL << DCR_BPM_SHIFT)
 
 #defineDCR_JPE (1UL << 15)
 #defineDCR_ITPE(1UL << 16)

Modified: head/sys/sparc64/sparc64/cheetah.c
==
--- head/sys/sparc64/sparc64/cheetah.c  Wed Mar 17 22:12:12 2010
(r205268)
+++ head/sys/sparc64/sparc64/cheetah.c  Wed Mar 17 22:45:09 2010
(r205269)
@@ -1,6 +1,6 @@
 /*-
  * Copyright (c) 2003 Jake Burkholder.
- * Copyright (c) 2005, 2008 Marius Strobl 
+ * Copyright (c) 2005, 2008, 2010 Marius Strobl 
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -49,9 +49,6 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
-/* A FLUSH is required after changing LSU_IC (the address is ignored). */
-#defineCHEETAH_FLUSH_LSU_IC()  __asm __volatile("flush %%g0" : :)
-
 #defineCHEETAH_ICACHE_TAG_LOWER0x30
 
 /*
@@ -60,6 +57,7 @@ __FBSDID("$FreeBSD$");
 void
 cheetah_init(u_int cpu_impl)
 {
+   u_long val;
register_t s;
 
/*
@@ -68,14 +66,6 @@ cheetah_init(u_int cpu_impl)
 */
s = intr_disable();
 
-   /*
-* Ensure DCR_IFPOE is disabled as long as we haven't implemented
-* support for it (if ever) as most if not all firmware versions
-* apparently turn it on.  Not making use of DCR_IFPOE should also
-* avoid Cheetah erratum #109.
-*/
-   wr(asr18, rd(asr18) & ~DCR_IFPOE, 0);
-
/* Ensure the TSB Extension Registers hold 0 as TSB_Base. */
 
stxa(AA_DMMU_TSB_P

svn commit: r205270 - head/sys/dev/mii

2010-03-17 Thread Warner Losh
Author: imp
Date: Wed Mar 17 22:45:53 2010
New Revision: 205270
URL: http://svn.freebsd.org/changeset/base/205270

Log:
  Remove two instances of the evil hack to get the ifnet.  mii_ifp is
  set early enough that we don't need to do these hacks anymore.

Modified:
  head/sys/dev/mii/mii.c

Modified: head/sys/dev/mii/mii.c
==
--- head/sys/dev/mii/mii.c  Wed Mar 17 22:45:09 2010(r205269)
+++ head/sys/dev/mii/mii.c  Wed Mar 17 22:45:53 2010(r205270)
@@ -259,13 +259,7 @@ miibus_statchg(device_t dev)
MIIBUS_STATCHG(parent);
 
mii = device_get_softc(dev);
-
-   /*
-* Note that each NIC's softc must start with an ifnet pointer.
-* XXX: EVIL HACK!
-*/
-   ifp = *(struct ifnet **)device_get_softc(parent);
-   ifp->if_baudrate = ifmedia_baudrate(mii->mii_media_active);
+   mii->mii_ifp->if_baudrate = ifmedia_baudrate(mii->mii_media_active);
return;
 }
 
@@ -288,11 +282,7 @@ miibus_linkchg(device_t dev)
link_state = LINK_STATE_DOWN;
} else
link_state = LINK_STATE_UNKNOWN;
-   /*
-* Note that each NIC's softc must start with an ifnet pointer.
-* XXX: EVIL HACK!
-*/
-   if_link_state_change(*(struct ifnet**)device_get_softc(parent), 
link_state);
+   if_link_state_change(mii->mii_ifp, link_state);
 }
 
 static void
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svn commit: r205271 - head/bin/ps

2010-03-17 Thread Juli Mallett
Author: jmallett
Date: Wed Mar 17 22:57:58 2010
New Revision: 205271
URL: http://svn.freebsd.org/changeset/base/205271

Log:
  o) Add a keyword to displaying elapsed time in integer seconds, "etimes".
  o) Give slightly better (i.e. any) documentation of the format of "etime".
  
  Reviewed by:  jilles

Modified:
  head/bin/ps/extern.h
  head/bin/ps/keyword.c
  head/bin/ps/print.c
  head/bin/ps/ps.1

Modified: head/bin/ps/extern.h
==
--- head/bin/ps/extern.hWed Mar 17 22:45:53 2010(r205270)
+++ head/bin/ps/extern.hWed Mar 17 22:57:58 2010(r205271)
@@ -48,6 +48,7 @@ void   command(KINFO *, VARENT *);
 voidcputime(KINFO *, VARENT *);
 int donlist(void);
 voidelapsed(KINFO *, VARENT *);
+voidelapseds(KINFO *, VARENT *);
 voidemulname(KINFO *, VARENT *);
 VARENT *find_varentry(VAR *);
 const   char *fmt_argv(char **, char *, size_t);

Modified: head/bin/ps/keyword.c
==
--- head/bin/ps/keyword.c   Wed Mar 17 22:45:53 2010(r205270)
+++ head/bin/ps/keyword.c   Wed Mar 17 22:57:58 2010(r205271)
@@ -89,6 +89,7 @@ static VAR var[] = {
{"emul", "EMUL", NULL, LJUST, emulname, NULL, EMULLEN, 0, CHAR,
NULL, 0},
{"etime", "ELAPSED", NULL, USER, elapsed, NULL, 12, 0, CHAR, NULL, 0},
+   {"etimes", "ELAPSED", NULL, USER, elapseds, NULL, 12, 0, CHAR, NULL, 0},
{"f", "F", NULL, 0, kvar, NULL, 7, KOFF(ki_flag), INT, "x", 0},
{"flags", "", "f", 0, NULL, NULL, 0, 0, CHAR, NULL, 0},
{"ignored", "", "sigignore", 0, NULL, NULL, 0, 0, CHAR, NULL, 0},

Modified: head/bin/ps/print.c
==
--- head/bin/ps/print.c Wed Mar 17 22:45:53 2010(r205270)
+++ head/bin/ps/print.c Wed Mar 17 22:57:58 2010(r205271)
@@ -54,6 +54,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -618,6 +619,21 @@ elapsed(KINFO *k, VARENT *ve)
(void)printf("%*s", v->width, obuff);
 }
 
+void
+elapseds(KINFO *k, VARENT *ve)
+{
+   VAR *v;
+   time_t val;
+
+   v = ve->var;
+   if (!k->ki_valid) {
+   (void)printf("%-*s", v->width, "-");
+   return;
+   }
+   val = now - k->ki_p->ki_start.tv_sec;
+   (void)printf("%*jd", v->width, (intmax_t)val);
+}
+
 double
 getpcpu(const KINFO *k)
 {

Modified: head/bin/ps/ps.1
==
--- head/bin/ps/ps.1Wed Mar 17 22:45:53 2010(r205270)
+++ head/bin/ps/ps.1Wed Mar 17 22:57:58 2010(r205271)
@@ -29,7 +29,7 @@
 .\" @(#)ps.1   8.3 (Berkeley) 4/18/94
 .\" $FreeBSD$
 .\"
-.Dd March 5, 2010
+.Dd March 17, 2010
 .Dt PS 1
 .Os
 .Sh NAME
@@ -479,7 +479,12 @@ command and arguments
 .It Cm cpu
 short-term CPU usage factor (for scheduling)
 .It Cm etime
-elapsed running time
+elapsed running time, format
+.Op days- Ns
+.Op hours: Ns
+minutes:seconds.
+.It Cm etimes
+elapsed running time, in decimal integer seconds
 .It Cm flags
 the process flags, in hexadecimal (alias
 .Cm f )
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svn commit: r205272 - head/usr.sbin/ppp

2010-03-17 Thread Qing Li
Author: qingli
Date: Thu Mar 18 00:23:39 2010
New Revision: 205272
URL: http://svn.freebsd.org/changeset/base/205272

Log:
  Need to set the proper flag bit when inserting ARP
  entries into the kernel.
  
  MFC after:3 days

Modified:
  head/usr.sbin/ppp/arp.c

Modified: head/usr.sbin/ppp/arp.c
==
--- head/usr.sbin/ppp/arp.c Wed Mar 17 22:57:58 2010(r205271)
+++ head/usr.sbin/ppp/arp.c Thu Mar 18 00:23:39 2010(r205272)
@@ -119,7 +119,7 @@ arp_ProxySub(struct bundle *bundle, stru
 return 0;
   }
   arpmsg.hdr.rtm_type = add ? RTM_ADD : RTM_DELETE;
-  arpmsg.hdr.rtm_flags = RTF_ANNOUNCE | RTF_HOST | RTF_STATIC;
+  arpmsg.hdr.rtm_flags = RTF_ANNOUNCE | RTF_HOST | RTF_STATIC | RTF_LLDATA;
   arpmsg.hdr.rtm_version = RTM_VERSION;
   arpmsg.hdr.rtm_seq = ++bundle->routing_seq;
   arpmsg.hdr.rtm_addrs = RTA_DST | RTA_GATEWAY;
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svn commit: r205273 - head/lib/libstand

2010-03-17 Thread Xin LI
Author: delphij
Date: Thu Mar 18 00:27:17 2010
New Revision: 205273
URL: http://svn.freebsd.org/changeset/base/205273

Log:
  Remove two pieces of code (one disabled in revision 39665 and another derived
  from the first one) that is not used for the last 12 years.

Modified:
  head/lib/libstand/bzipfs.c
  head/lib/libstand/gzipfs.c

Modified: head/lib/libstand/bzipfs.c
==
--- head/lib/libstand/bzipfs.c  Thu Mar 18 00:23:39 2010(r205272)
+++ head/lib/libstand/bzipfs.c  Thu Mar 18 00:27:17 2010(r205273)
@@ -81,14 +81,6 @@ struct fs_ops bzipfs_fsops = {
 };
 #endif
 
-#if 0
-void *
-calloc(int items, size_t size)
-{
-return(malloc(items * size));
-}
-#endif
-
 static int
 bzf_fill(struct bz_file *bzf)
 {

Modified: head/lib/libstand/gzipfs.c
==
--- head/lib/libstand/gzipfs.c  Thu Mar 18 00:23:39 2010(r205272)
+++ head/lib/libstand/gzipfs.c  Thu Mar 18 00:27:17 2010(r205273)
@@ -62,14 +62,6 @@ struct fs_ops gzipfs_fsops = {
 null_readdir
 };
 
-#if 0
-void *
-calloc(int items, size_t size)
-{
-return(malloc(items * size));
-}
-#endif
-
 static int
 zf_fill(struct z_file *zf)
 {
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