Re: [Mesa-dev] [PATCH 04/19] i965/fs: Store the number of sources an fs_inst has.

[Tapani Pälli]

On 05/28/2014 04:47 AM, Matt Turner wrote:
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp | 21 +++--
>  src/mesa/drivers/dri/i965/brw_fs.h   |  3 ++-
>  2 files changed, 13 insertions(+), 11 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index b06966a..a9a8ac1 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -52,11 +52,12 @@ extern "C" {
>  #include "glsl/glsl_types.h"
>  
>  void
> -fs_inst::init()
> +fs_inst::init(int sources)
>  {
> memset(this, 0, sizeof(*this));
>  
> -   this->src = ralloc_array(this, fs_reg, 3);
> +   this->sources = sources;
> +   this->src = ralloc_array(this, fs_reg, sources);
>  
> this->conditional_mod = BRW_CONDITIONAL_NONE;
>  
> @@ -73,19 +74,19 @@ fs_inst::init()
>  
>  fs_inst::fs_inst()
>  {
> -   init();
> +   init(3);
> this->opcode = BRW_OPCODE_NOP;
>  }
>  
>  fs_inst::fs_inst(enum opcode opcode)
>  {
> -   init();
> +   init(3);
> this->opcode = opcode;
>  }
>  
>  fs_inst::fs_inst(enum opcode opcode, fs_reg dst)
>  {
> -   init();
> +   init(3);
> this->opcode = opcode;
> this->dst = dst;
>  
> @@ -95,7 +96,7 @@ fs_inst::fs_inst(enum opcode opcode, fs_reg dst)
>  
>  fs_inst::fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0)
>  {
> -   init();
> +   init(3);
> this->opcode = opcode;
> this->dst = dst;
> this->src[0] = src0;
> @@ -108,7 +109,7 @@ fs_inst::fs_inst(enum opcode opcode, fs_reg dst, fs_reg 
> src0)
>  
>  fs_inst::fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1)
>  {
> -   init();
> +   init(3);
> this->opcode = opcode;
> this->dst = dst;
> this->src[0] = src0;
> @@ -125,7 +126,7 @@ fs_inst::fs_inst(enum opcode opcode, fs_reg dst, fs_reg 
> src0, fs_reg src1)
>  fs_inst::fs_inst(enum opcode opcode, fs_reg dst,
>fs_reg src0, fs_reg src1, fs_reg src2)
>  {
> -   init();
> +   init(3);
> this->opcode = opcode;
> this->dst = dst;
> this->src[0] = src0;
> @@ -146,9 +147,9 @@ fs_inst::fs_inst(const fs_inst &that)
>  {
> memcpy(this, &that, sizeof(that));
>  
> -   this->src = ralloc_array(this, fs_reg, 3);
> +   this->src = ralloc_array(this, fs_reg, that.sources);
>  
> -   for (int i = 0; i < 3; i++)
> +   for (int i = 0; i < that.sources; i++)
>this->src[i] = that.src[i];
>  }
>  
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
> b/src/mesa/drivers/dri/i965/brw_fs.h
> index 11a5c7c..4f8a2b2 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> @@ -190,7 +190,7 @@ class fs_inst : public backend_instruction {
>  public:
> DECLARE_RALLOC_CXX_OPERATORS(fs_inst)
>  
> -   void init();
> +   void init(int sources);

Could use unsigned (or uint8_t) here as the member is unsigned, function
resize_sources() introduced in patch 7 uses uint8_t type too.

>  
> fs_inst();
> fs_inst(enum opcode opcode);
> @@ -216,6 +216,7 @@ public:
> uint32_t texture_offset; /**< Texture offset bitfield */
> uint32_t offset; /* spill/unspill offset */
>  
> +   uint8_t sources; /**< Number of fs_reg sources. */
> uint8_t conditional_mod; /**< BRW_CONDITIONAL_* */
>  
> /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional


// Tapani

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Re: [Mesa-dev] [PATCH 04/19] i965/fs: Store the number of sources an fs_inst has.

[Tapani Pälli]

On 05/28/2014 10:38 AM, Tapani Pälli wrote:
> On 05/28/2014 04:47 AM, Matt Turner wrote:
>> ---
>>  src/mesa/drivers/dri/i965/brw_fs.cpp | 21 +++--
>>  src/mesa/drivers/dri/i965/brw_fs.h   |  3 ++-
>>  2 files changed, 13 insertions(+), 11 deletions(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
>> b/src/mesa/drivers/dri/i965/brw_fs.cpp
>> index b06966a..a9a8ac1 100644
>> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
>> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
>> @@ -52,11 +52,12 @@ extern "C" {
>>  #include "glsl/glsl_types.h"
>>  
>>  void
>> -fs_inst::init()
>> +fs_inst::init(int sources)
>>  {
>> memset(this, 0, sizeof(*this));
>>  
>> -   this->src = ralloc_array(this, fs_reg, 3);
>> +   this->sources = sources;
>> +   this->src = ralloc_array(this, fs_reg, sources);
>>  
>> this->conditional_mod = BRW_CONDITIONAL_NONE;
>>  
>> @@ -73,19 +74,19 @@ fs_inst::init()
>>  
>>  fs_inst::fs_inst()
>>  {
>> -   init();
>> +   init(3);
>> this->opcode = BRW_OPCODE_NOP;
>>  }
>>  
>>  fs_inst::fs_inst(enum opcode opcode)
>>  {
>> -   init();
>> +   init(3);
>> this->opcode = opcode;
>>  }
>>  
>>  fs_inst::fs_inst(enum opcode opcode, fs_reg dst)
>>  {
>> -   init();
>> +   init(3);
>> this->opcode = opcode;
>> this->dst = dst;
>>  
>> @@ -95,7 +96,7 @@ fs_inst::fs_inst(enum opcode opcode, fs_reg dst)
>>  
>>  fs_inst::fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0)
>>  {
>> -   init();
>> +   init(3);
>> this->opcode = opcode;
>> this->dst = dst;
>> this->src[0] = src0;
>> @@ -108,7 +109,7 @@ fs_inst::fs_inst(enum opcode opcode, fs_reg dst, fs_reg 
>> src0)
>>  
>>  fs_inst::fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1)
>>  {
>> -   init();
>> +   init(3);
>> this->opcode = opcode;
>> this->dst = dst;
>> this->src[0] = src0;
>> @@ -125,7 +126,7 @@ fs_inst::fs_inst(enum opcode opcode, fs_reg dst, fs_reg 
>> src0, fs_reg src1)
>>  fs_inst::fs_inst(enum opcode opcode, fs_reg dst,
>>   fs_reg src0, fs_reg src1, fs_reg src2)
>>  {
>> -   init();
>> +   init(3);
>> this->opcode = opcode;
>> this->dst = dst;
>> this->src[0] = src0;
>> @@ -146,9 +147,9 @@ fs_inst::fs_inst(const fs_inst &that)
>>  {
>> memcpy(this, &that, sizeof(that));
>>  
>> -   this->src = ralloc_array(this, fs_reg, 3);
>> +   this->src = ralloc_array(this, fs_reg, that.sources);
>>  
>> -   for (int i = 0; i < 3; i++)
>> +   for (int i = 0; i < that.sources; i++)
>>this->src[i] = that.src[i];
>>  }
>>  
>> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
>> b/src/mesa/drivers/dri/i965/brw_fs.h
>> index 11a5c7c..4f8a2b2 100644
>> --- a/src/mesa/drivers/dri/i965/brw_fs.h
>> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
>> @@ -190,7 +190,7 @@ class fs_inst : public backend_instruction {
>>  public:
>> DECLARE_RALLOC_CXX_OPERATORS(fs_inst)
>>  
>> -   void init();
>> +   void init(int sources);
> Could use unsigned (or uint8_t) here as the member is unsigned, function
> resize_sources() introduced in patch 7 uses uint8_t type too.

Forgot that with the nitpick (change at will):
Reviewed-by: Tapani Pälli 


>>  
>> fs_inst();
>> fs_inst(enum opcode opcode);
>> @@ -216,6 +216,7 @@ public:
>> uint32_t texture_offset; /**< Texture offset bitfield */
>> uint32_t offset; /* spill/unspill offset */
>>  
>> +   uint8_t sources; /**< Number of fs_reg sources. */
>> uint8_t conditional_mod; /**< BRW_CONDITIONAL_* */
>>  
>> /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
>
> // Tapani
>

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Re: [Mesa-dev] [PATCH 05/19] i965/fs: Loop from 0 to inst->sources, not 0 to 3.

[Tapani Pälli]

On 05/28/2014 04:47 AM, Matt Turner wrote:
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp   | 24 
> +++---
>  .../drivers/dri/i965/brw_fs_copy_propagation.cpp   |  4 ++--
>  src/mesa/drivers/dri/i965/brw_fs_cse.cpp   |  2 +-
>  .../dri/i965/brw_fs_dead_code_eliminate.cpp|  2 +-
>  src/mesa/drivers/dri/i965/brw_fs_generator.cpp |  2 +-
>  .../drivers/dri/i965/brw_fs_live_variables.cpp |  2 +-
>  src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp  |  6 +++---
>  .../drivers/dri/i965/brw_fs_register_coalesce.cpp  |  2 +-
>  .../dri/i965/brw_fs_saturate_propagation.cpp   |  2 +-
>  .../drivers/dri/i965/brw_schedule_instructions.cpp | 10 -
>  10 files changed, 28 insertions(+), 28 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index a9a8ac1..8b13683 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -1472,7 +1472,7 @@ fs_visitor::assign_curb_setup()
> foreach_list(node, &this->instructions) {
>fs_inst *inst = (fs_inst *)node;
>  
> -  for (unsigned int i = 0; i < 3; i++) {
> +  for (unsigned int i = 0; i < inst->sources; i++) {
>if (inst->src[i].file == UNIFORM) {
>  int uniform_nr = inst->src[i].reg + inst->src[i].reg_offset;
>  int constant_nr;
> @@ -1670,7 +1670,7 @@ fs_visitor::split_virtual_grfs()
> * the send is reading the whole thing.
> */
>if (inst->is_send_from_grf()) {
> - for (int i = 0; i < 3; i++) {
> + for (int i = 0; i < inst->sources; i++) {
>  if (inst->src[i].file == GRF) {
> split_grf[inst->src[i].reg] = false;
>  }

Note that former loop comparison is against unsigned while here using
signed. Would be good to use exact type to avoid compilation
warnings.This also for some of the loops below. Otherwise,

Reviewed-by: Tapani Pälli 


> @@ -1703,7 +1703,7 @@ fs_visitor::split_virtual_grfs()
> inst->dst.reg_offset - 1);
>inst->dst.reg_offset = 0;
>}
> -  for (int i = 0; i < 3; i++) {
> +  for (int i = 0; i < inst->sources; i++) {
>if (inst->src[i].file == GRF &&
>split_grf[inst->src[i].reg] &&
>inst->src[i].reg_offset != 0) {
> @@ -1741,7 +1741,7 @@ fs_visitor::compact_virtual_grfs()
>if (inst->dst.file == GRF)
>   remap_table[inst->dst.reg] = 0;
>  
> -  for (int i = 0; i < 3; i++) {
> +  for (int i = 0; i < inst->sources; i++) {
>   if (inst->src[i].file == GRF)
>  remap_table[inst->src[i].reg] = 0;
>}
> @@ -1767,7 +1767,7 @@ fs_visitor::compact_virtual_grfs()
>if (inst->dst.file == GRF)
>   inst->dst.reg = remap_table[inst->dst.reg];
>  
> -  for (int i = 0; i < 3; i++) {
> +  for (int i = 0; i < inst->sources; i++) {
>   if (inst->src[i].file == GRF)
>  inst->src[i].reg = remap_table[inst->src[i].reg];
>}
> @@ -1807,7 +1807,7 @@ 
> fs_visitor::move_uniform_array_access_to_pull_constants()
> foreach_list_safe(node, &this->instructions) {
>fs_inst *inst = (fs_inst *)node;
>  
> -  for (int i = 0 ; i < 3; i++) {
> +  for (int i = 0 ; i < inst->sources; i++) {
>   if (inst->src[i].file != UNIFORM || !inst->src[i].reladdr)
>  continue;
>  
> @@ -1857,7 +1857,7 @@ fs_visitor::assign_constant_locations()
> foreach_list(node, &this->instructions) {
>fs_inst *inst = (fs_inst *) node;
>  
> -  for (int i = 0; i < 3; i++) {
> +  for (int i = 0; i < inst->sources; i++) {
>   if (inst->src[i].file != UNIFORM)
>  continue;
>  
> @@ -1928,7 +1928,7 @@ fs_visitor::demote_pull_constants()
> foreach_list(node, &this->instructions) {
>fs_inst *inst = (fs_inst *)node;
>  
> -  for (int i = 0; i < 3; i++) {
> +  for (int i = 0; i < inst->sources; i++) {
>if (inst->src[i].file != UNIFORM)
>   continue;
>  
> @@ -2180,7 +2180,7 @@ fs_visitor::compute_to_mrf()
> * MRF's source GRF that we wanted to rewrite, that stops us.
> */
>bool interfered = false;
> -  for (int i = 0; i < 3; i++) {
> +  for (int i = 0; i < scan_inst->sources; i++) {
>   if (scan_inst->src[i].file == GRF &&
>   scan_inst->src[i].reg == inst->src[0].reg &&
>   scan_inst->src[i].reg_offset == inst->src[0].reg_offset) {
> @@ -2319,7 +2319,7 @@ clear_deps_for_inst_src(fs_inst *inst, int 
> dispatch_width, bool *deps,
> !inst->force_sechalf);
>  
> /* Clear the flag for registers that actually got read (as expected). */
> -   for (int i = 0; i < 3; i++) {
> +   for (int i = 0; i < inst->sources; i++) {
>int grf;
>if (inst->src[i].file == GRF) {
>   grf = inst->src[i].reg;
> @@ -2697,7 +2697,7 @@ fs_visitor::dump_instruction(backend_instr

Re: [Mesa-dev] [PATCH 01/11] gallium: Add __DRIimageDriverExtension support to gallium

[Michel Dänzer]

On 28.05.2014 09:55, Axel Davy wrote:
> From: Keith Packard 
> 
> Provide the hook to pull textures out of __DRIimage structures and use them as
> renderbuffers.
> 
> Signed-off-by: Keith Packard 

This patch breaks a number of piglit tests with DRI2, see the backtrace
below. This fixes it:

diff --git a/src/gallium/state_trackers/dri/drm/dri2.c 
b/src/gallium/state_trackers/dri/drm/dri2.c
index cd9964c..2d93686 100644
--- a/src/gallium/state_trackers/dri/drm/dri2.c
+++ b/src/gallium/state_trackers/dri/drm/dri2.c
@@ -761,7 +761,7 @@ dri2_flush_frontbuffer(struct dri_context *ctx,

pipe->flush(pipe, NULL, 0);

-   if (image->flushFrontBuffer) {
+   if (image) {
   image->flushFrontBuffer(dri_drawable, dri_drawable->loaderPrivate);
} else if (loader->flushFrontBuffer) {
   loader->flushFrontBuffer(dri_drawable, dri_drawable->loaderPrivate);



Program received signal SIGSEGV, Segmentation fault.
dri2_flush_frontbuffer (ctx=, drawable=0x6f60e0, 
statt=) at 
../../../../../../src/gallium/state_trackers/dri/drm/dri2.c:764
764if (image->flushFrontBuffer) {
(gdb) bt
#0  dri2_flush_frontbuffer (ctx=, drawable=0x6f60e0, 
statt=) at 
../../../../../../src/gallium/state_trackers/dri/drm/dri2.c:764
#1  0x717d6315 in dri_st_framebuffer_flush_front (stctx=, stfbi=, statt=)
at ../../../../../../src/gallium/state_trackers/dri/drm/dri_drawable.c:118
#2  0x77aff57e in stub_glFlush () at 
tests/util/generated_dispatch.c:8122
#3  0x00400df2 in piglit_display () at 
tests/spec/gl-1.0/front-invalidate-back.c:99
#4  0x77aed319 in process_next_event (x11_fw=0x602010) at 
tests/util/piglit-framework-gl/piglit_x11_framework.c:137
#5  0x77aed3bb in enter_event_loop (winsys_fw=0x602010) at 
tests/util/piglit-framework-gl/piglit_x11_framework.c:153
#6  0x77aec8a7 in run_test (gl_fw=0x602010, argc=1, 
argv=0x7fffe768) at 
tests/util/piglit-framework-gl/piglit_winsys_framework.c:85
#7  0x77ae8ff8 in piglit_gl_test_run (argc=1, argv=0x7fffe768, 
config=0x7fffe630) at tests/util/piglit-framework-gl.c:151
#8  0x00400cc4 in main (argc=1, argv=0x7fffe768) at 
tests/spec/gl-1.0/front-invalidate-back.c:48


-- 
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Libre software enthusiast  |Mesa and X developer
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Re: [Mesa-dev] [PATCH 07/19] i965/fs: Add a function to resize fs_inst's sources array.

[Tapani Pälli]

On 05/28/2014 04:47 AM, Matt Turner wrote:
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp | 9 +
>  src/mesa/drivers/dri/i965/brw_fs.h   | 2 ++
>  2 files changed, 11 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index f926d97..1f174d3 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -111,6 +111,15 @@ fs_inst::fs_inst(const fs_inst &that)
>this->src[i] = that.src[i];
>  }
>  
> +void
> +fs_inst::resize_sources(uint8_t num_sources)
> +{
> +   if (this->sources != num_sources) {
> +  this->src = reralloc(this, this->src, fs_reg, num_sources);
> +  this->sources = num_sources;
> +   }
> +}
> +

This looks proper to me but it does not seem to be used anywhere by this
series?

>  #define ALU1(op)\
> fs_inst *\
> fs_visitor::op(fs_reg dst, fs_reg src0)  \
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
> b/src/mesa/drivers/dri/i965/brw_fs.h
> index fb68923..b7cfb3c 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> @@ -200,6 +200,8 @@ public:
> const fs_reg &src1, const fs_reg &src2);
> fs_inst(const fs_inst &that);
>  
> +   void resize_sources(uint8_t num_sources);
> +
> bool equals(fs_inst *inst) const;
> bool overwrites_reg(const fs_reg ®) const;
> bool is_send_from_grf() const;

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[Mesa-dev] [Bug 79263] Linking error in egl_gallium.la when compiling 32 bit on multiarch

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=79263

Chia-I Wu  changed:

   What|Removed |Added

 CC||emil.l.veli...@gmail.com,
   ||olva...@gmail.com

--- Comment #1 from Chia-I Wu  ---
The issue was really introduced by

commit 39ae284a6941df5942602c027d4a8863ca35e654
Author: Emil Velikov 
Date:   Sat May 10 15:59:03 2014 +0100

egl-static: include libradeonwinsys.la only once

which removed libloader.la from LIBADD.  CC Emil.

-- 
You are receiving this mail because:
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Re: [Mesa-dev] [PATCH 11/11] Radeonsi: Use dma_copy when possible for si_blit.

[Michel Dänzer]

On 28.05.2014 09:55, Axel Davy wrote:
> This improves GLX DRI3 Gpu offloading significantly on cpu
> bound benchmarks particularly.
> No performance impact for DRI2 Gpu offloading.
> 
> Signed-off-by: Axel Davy 
> ---
>  src/gallium/drivers/radeonsi/si_blit.c | 15 +++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/src/gallium/drivers/radeonsi/si_blit.c 
> b/src/gallium/drivers/radeonsi/si_blit.c
> index 6bc89ab..0e327b5 100644
> --- a/src/gallium/drivers/radeonsi/si_blit.c
> +++ b/src/gallium/drivers/radeonsi/si_blit.c
> @@ -712,6 +712,21 @@ static void si_blit(struct pipe_context *ctx,
>   return;
>   }
>  
> + if (info->src.box.width ==  info->dst.box.width &&

You need to check info->src.box.height == info->dst.box.height as well.


> + info->src.format == info->dst.format &&
> + info->src.box.width >=0 &&

Missing space between operator and operand.


> + info->src.resource->nr_samples == 0 &&
> + info->dst.resource->nr_samples == 0 &&
> + info->src.box.depth == 1 &&
> + info->dst.box.depth == 1 &&
> + info->mask == PIPE_MASK_RGBA) {
> + sctx->b.dma_copy(ctx, info->dst.resource, info->dst.level,
> +  info->dst.box.x, info->dst.box.y,
> +  info->dst.box.z, info->src.resource,
> +  info->src.level, &(info->src.box));
> + return;
> + }

Even with that fixed, this change breaks a number of scissor related
piglit tests because it ignores info->scissor{_enable,}. You need to
either fall back or factor in info->scissor if info->scissor_enable is on.

Might be safer to fall back for info->render_condition_enable as well.


-- 
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Libre software enthusiast  |Mesa and X developer
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[Mesa-dev] [Bug 78716] Fix Mesa bugs for running Unreal Engine 4.1 Cave effects demo compiled for Linux

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=78716

darkbasic  changed:

   What|Removed |Added

 CC||darkba...@linuxsystems.it

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Re: [Mesa-dev] [PATCH 01/11] gallium: Add __DRIimageDriverExtension support to gallium

[Michel Dänzer]

On 28.05.2014 09:55, Axel Davy wrote:
> From: Keith Packard 
> 
> Provide the hook to pull textures out of __DRIimage structures and use them as
> renderbuffers.
> 
> Signed-off-by: Keith Packard 

Enabling DRI3 using this change breaks a number of depth/stencil and
multisampling related piglit tests on radeonsi compared to DRI2. No idea
yet what's wrong. Keith, I presume there's no such issue with DRI3 on intel?

(According to Tom Stellard, the same or at least a similar issue also
occurs when using this patch for running piglit without X via GBM and
DRM render nodes.)


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[Mesa-dev] [PATCH v2] glsl: reduce size of swizzle field in ir_state_slot

[Tapani Pälli]

v2: oops, swizzle needs more space than 8 bits (Tapani)

Signed-off-by: Tapani Pälli 
---
 src/glsl/ir.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index fccbfdd..22d981a 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -384,7 +384,7 @@ depth_layout_string(ir_depth_layout layout);
  */
 struct ir_state_slot {
int tokens[5];
-   int swizzle;
+   uint16_t swizzle;
 };
 
 
-- 
1.8.3.1

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Re: [Mesa-dev] [PATCH 00/21] Reduce ir_variable memory usage

[Tapani Pälli]

On 05/28/2014 05:48 AM, Ian Romanick wrote:
> This series reduces the memory usage of ir_variable quite significantly.
>
> The first couple patches add a mechanism to determine the amount of
> memory used by any kind of IR object.  This is used to collect the data
> that is shown in the commit messages through the series.

Nice to see this happen, it also reduces the data size for the IR binary
cache I've been implementing. With these patches cache generated by
Piglit quick round (~10680 tests run) goes down from 63MB to 61MB. I've
just sent 2 related size reduction patches where structure members are
bigger than required.

// Tapani

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Re: [Mesa-dev] [PATCH] targets/opencl: Fix (static) linking with LLVM

[Emil Velikov]

On 28/05/14 07:42, Kertesz Laszlo wrote:
>>> Hi,
>>> i too hit the X crashing issue. But i am unable to compile the latest
>>> git (10.2-branchpoint-318-g4c7bf8a according to 'git describe')
>>> Here is the errors i get:
>>>
>>>
>>> make[3]: Entering directory '/compile/mesa/src/gallium/targets/gbm'
>>>   CC   gbm.lo
>>>   CXXLDgbm_gallium_drm.la
>>> /usr/local/lib/llvm32/lib/libLLVMSupport.a(Process.o): In function
>> Hmm that file is not provide by us, so I'm afraid I cannot help you here.
>> Perhaps the LLVM folks will have a better idea.
>>
> 
> Solved.
> 
> I added LDFLAGS="-ltinfo -lpthread" to the configure options and
> recompiled llvm with the additional "--disable-terminfo --disable-zlib"
> options.
> 
> Seems there were 2 issues, both somewhat trivial:
> 
>>> `llvm::sys::Process::FileDescriptorHasColors(int)':
>>> Process.cpp:(.text._ZN4llvm3sys7Process23FileDescriptorHasColorsEi+0x67): 
>>> undefined
>>> reference to `setupterm'
>>> Process.cpp:(.text._ZN4llvm3sys7Process23FileDescriptorHasColorsEi+0x92): 
>>> undefined
>>> reference to `tigetnum'
>>> Process.cpp:(.text._ZN4llvm3sys7Process23FileDescriptorHasColorsEi+0xa0): 
>>> undefined
>>> reference to `set_curterm'
>>> Process.cpp:(.text._ZN4llvm3sys7Process23FileDescriptorHasColorsEi+0xa8): 
>>> undefined
>>> reference to `del_curterm'
> 
> The above have to do with some terminal output options (i saw some chat
> about removing it by default but it isnt the case). Solution is to add
> LDFLAGS="-ltinfo" or recompile llvm with "--disable-terminfo" option.
> 
>>> /usr/local/lib/llvm32/lib/libLLVMSupport.a(Compression.o): In function
>>> `llvm::zlib::compress(llvm::StringRef, llvm::SmallVectorImpl&,
>>> llvm::zlib::CompressionLevel)':
>>> Compression.cpp:(.text._ZN4llvm4zlib8compressENS_9StringRefERNS_15SmallVectorImplIcEENS0_16CompressionLevelE+0x26):
>>> undefined reference to `compressBound'
>>> Compression.cpp:(.text._ZN4llvm4zlib8compressENS_9StringRefERNS_15SmallVectorImplIcEENS0_16CompressionLevelE+0xa7):
>>> undefined reference to `compress2'
> 
> These above are related to zlib. I have zlib headers installed and by
> default llvm will use them, but at least on my system (both my actual
> desktop and my 32 bit chroot) it messes up static linking in mesa. The
> only solution i found was to disable zlib when building llvm, by adding
> "--disable-zlib" to its configure script.
> 
>> Explicitly setting LDFLAGS is a recipe for disaster. Try to avoid that at all
>> cost.
>>
>> Cheers
>> Emil
> 
> Now i have those specified since i was building mesa with shared libs on
> a 64 bit system so i had to install it in another prefix, different from
> that of the 64 bit build.
I would assume that PKG_CONFIG_PATH + --with-llvm-prefix= should be enough.
Perhaps out logic in configure.ac is lacking something ?

> But now static linking works and i dont need it anyway on the 64 bit
> machine.
> 
Glad to hear :)

Thanks for the comprehensive investigation.
-Emil


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>>>
>>
> 

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Re: [Mesa-dev] [PATCH 06/11] loader: Use drirc device_id parameter in complement to DRI_PRIME

[Axel Davy]

On 27/05/2014 23:46, Michel Dänzer wrote :

This breaks the build for me, see below. That's an out-of-tree build FWIW.


make[2]: Entering directory 
'/home/daenzer/src/mesa-git/mesa/build-amd64/src/loader'
  cd ../../.. && automake-1.14 --foreign src/loader/Makefile
src/loader/Makefile.am:42: warning: source file 
'$(top_srcdir)/src/mesa/drivers/dri/common/xmlconfig.c' is in a subdirectory,
src/loader/Makefile.am:42: but option 'subdir-objects' is disabled
automake-1.14: warning: possible forward-incompatibility.
automake-1.14: At least a source file is in a subdirectory, but the 
'subdir-objects'
automake-1.14: automake option hasn't been enabled.  For now, the corresponding 
output
automake-1.14: object file(s) will be placed in the top-level directory.  
However,
automake-1.14: this behaviour will change in future Automake versions: they will
automake-1.14: unconditionally cause object files to be placed in the same 
subdirectory
automake-1.14: of the corresponding sources.
automake-1.14: You are advised to start using 'subdir-objects' option 
throughout your
automake-1.14: project, to avoid future incompatibilities.
  cd ../.. && /bin/bash ./config.status src/loader/Makefile depfiles
config.status: creating src/loader/Makefile
config.status: executing depfiles commands
   CC   libloader_la-loader.lo
   CC   libloader_la-xmlconfig.lo
In file included from ../../../src/loader/loader.c:79:0:
../../../src/mesa/drivers/dri/common/xmlpool.h:103:29: fatal error: 
xmlpool/options.h: No such file or directory
  #include "xmlpool/options.h"
  ^
compilation terminated.
Makefile:570: recipe for target 'libloader_la-loader.lo' failed
make[2]: *** [libloader_la-loader.lo] Error 1
make[2]: Leaving directory 
'/home/daenzer/src/mesa-git/mesa/build-amd64/src/loader'



Replacing

-I$(top_srcdir)/src/mesa/drivers/dri/common/ \
by
-I$(top_builddir)/src/mesa/drivers/dri/common \
in the patch should solve that.

I'm going to test that later and will send an updated patch.

Thanks for your testing,

Axel Davy
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Re: [Mesa-dev] [PATCH 11/11] Radeonsi: Use dma_copy when possible for si_blit.

[Axel Davy]

On 28/05/2014 04:40, Michel Dänzer wrote :

On 28.05.2014 09:55, Axel Davy wrote:

This improves GLX DRI3 Gpu offloading significantly on cpu
bound benchmarks particularly.
No performance impact for DRI2 Gpu offloading.

Signed-off-by: Axel Davy 
---
  src/gallium/drivers/radeonsi/si_blit.c | 15 +++
  1 file changed, 15 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_blit.c 
b/src/gallium/drivers/radeonsi/si_blit.c
index 6bc89ab..0e327b5 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -712,6 +712,21 @@ static void si_blit(struct pipe_context *ctx,
return;
}
  
+	if (info->src.box.width ==  info->dst.box.width &&

You need to check info->src.box.height == info->dst.box.height as well.

Oh I missed that. Thanks for pointing out




+   info->src.format == info->dst.format &&
+   info->src.box.width >=0 &&

Missing space between operator and operand.



+   info->src.resource->nr_samples == 0 &&
+   info->dst.resource->nr_samples == 0 &&
+   info->src.box.depth == 1 &&
+   info->dst.box.depth == 1 &&
+   info->mask == PIPE_MASK_RGBA) {
+   sctx->b.dma_copy(ctx, info->dst.resource, info->dst.level,
+info->dst.box.x, info->dst.box.y,
+info->dst.box.z, info->src.resource,
+info->src.level, &(info->src.box));
+   return;
+   }

Even with that fixed, this change breaks a number of scissor related
piglit tests because it ignores info->scissor{_enable,}. You need to
either fall back or factor in info->scissor if info->scissor_enable is on.

Might be safer to fall back for info->render_condition_enable as well.



Thanks, I'll take a look at it.

Axel Davy
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Re: [Mesa-dev] [PATCH 01/11] gallium: Add __DRIimageDriverExtension support to gallium

[Axel Davy]

On 28/05/2014 03:47, Michel Dänzer wrote :

On 28.05.2014 09:55, Axel Davy wrote:

From: Keith Packard 

Provide the hook to pull textures out of __DRIimage structures and use them as
renderbuffers.

Signed-off-by: Keith Packard 

This patch breaks a number of piglit tests with DRI2, see the backtrace
below. This fixes it:

diff --git a/src/gallium/state_trackers/dri/drm/dri2.c 
b/src/gallium/state_trackers/dri/drm/dri2.c
index cd9964c..2d93686 100644
--- a/src/gallium/state_trackers/dri/drm/dri2.c
+++ b/src/gallium/state_trackers/dri/drm/dri2.c
@@ -761,7 +761,7 @@ dri2_flush_frontbuffer(struct dri_context *ctx,

 pipe->flush(pipe, NULL, 0);

-   if (image->flushFrontBuffer) {
+   if (image) {
image->flushFrontBuffer(dri_drawable, dri_drawable->loaderPrivate);
 } else if (loader->flushFrontBuffer) {
loader->flushFrontBuffer(dri_drawable, dri_drawable->loaderPrivate);



Program received signal SIGSEGV, Segmentation fault.
dri2_flush_frontbuffer (ctx=, drawable=0x6f60e0, statt=) at ../../../../../../src/gallium/state_trackers/dri/drm/dri2.c:764
764if (image->flushFrontBuffer) {
(gdb) bt
#0  dri2_flush_frontbuffer (ctx=, drawable=0x6f60e0, 
statt=) at 
../../../../../../src/gallium/state_trackers/dri/drm/dri2.c:764
#1  0x717d6315 in dri_st_framebuffer_flush_front (stctx=, 
stfbi=, statt=)
 at ../../../../../../src/gallium/state_trackers/dri/drm/dri_drawable.c:118
#2  0x77aff57e in stub_glFlush () at 
tests/util/generated_dispatch.c:8122
#3  0x00400df2 in piglit_display () at 
tests/spec/gl-1.0/front-invalidate-back.c:99
#4  0x77aed319 in process_next_event (x11_fw=0x602010) at 
tests/util/piglit-framework-gl/piglit_x11_framework.c:137
#5  0x77aed3bb in enter_event_loop (winsys_fw=0x602010) at 
tests/util/piglit-framework-gl/piglit_x11_framework.c:153
#6  0x77aec8a7 in run_test (gl_fw=0x602010, argc=1, 
argv=0x7fffe768) at 
tests/util/piglit-framework-gl/piglit_winsys_framework.c:85
#7  0x77ae8ff8 in piglit_gl_test_run (argc=1, argv=0x7fffe768, 
config=0x7fffe630) at tests/util/piglit-framework-gl.c:151
#8  0x00400cc4 in main (argc=1, argv=0x7fffe768) at 
tests/spec/gl-1.0/front-invalidate-back.c:48



I agree with the fix.

However the test may be better to be 'image && image->flushFrontBuffer', 
even if for the moment the field is non-NULL for all the drivers 
defining __DRIimageLoaderExtension.


Axel Davy
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Re: [Mesa-dev] [PATCH 04/11] Loader: Add gpu selection code with DRI_PRIME.

[Emil Velikov]

On 28/05/14 01:55, Axel Davy wrote:
> Signed-off-by: Axel Davy 
> ---
>  src/loader/loader.c | 188 
> 
>  src/loader/loader.h |   7 ++
>  2 files changed, 195 insertions(+)
> 
> diff --git a/src/loader/loader.c b/src/loader/loader.c
> index 666d015..3d504f7 100644
> --- a/src/loader/loader.c
> +++ b/src/loader/loader.c
[snip]
> +int loader_get_user_preferred_fd(int default_fd, int *different_device)
> +{
> +   struct udev *udev;
> +   const char *dri_prime = getenv("DRI_PRIME");
> +   char *prime = NULL;
> +   int is_different_device = 0, fd = default_fd;
> +   char *default_device_id_path_tag;
> +   char *device_name = NULL;
> +   char another_tag = 0;
> +   UDEV_SYMBOL(struct udev *, udev_new, (void));
> +   UDEV_SYMBOL(struct udev *, udev_unref, (struct udev *));
> +
> +   if (dri_prime)
> +  prime = strdup(dri_prime);
> +
> +   if (prime == NULL) {
> +  *different_device = 0;
> +  return default_fd;
> +   }
> +
> +   udev = udev_new();
> +   if (!udev)
> +  goto prime_clean;
> +
> +   default_device_id_path_tag = get_id_path_tag_from_fd(udev, default_fd);
> +   if (!default_device_id_path_tag)
> +  goto udev_clean;
> +
> +   is_different_device = 1;
> +   /* two format are supported:
> +* "1": choose any other card than the card used by default.
> +* id_path_tag: (for example "pci-_02_00_0") choose the card
> +* with this id_path_tag.
> +*/
> +   if (!strcmp(prime,"1")) {
> +  free(prime);
> +  prime = strdup(default_device_id_path_tag);
> +  /* request a card with a different card than the default card */
> +  another_tag = 1;
> +   } else if (!strcmp(default_device_id_path_tag, prime))
> +  /* we are to get a new fd (render-node) of the same device */
> +  is_different_device = 0;
> +
> +   device_name = get_render_node_from_id_path_tag(udev,
> +  prime,
> +  another_tag);
> +   if (device_name == NULL) {
> +  is_different_device = 0;
> +  goto default_device_clean;
> +   }
> +
> +   fd = drm_open_device(device_name);
> +   if (fd > 0) {
> +  close(default_fd);
> +   } else {
> +  fd = default_fd;
> +  is_different_device = 0;
> +   }
> +
Hi Axel,

AFAICS we're leaking device_name.

FYI I'm about to push a few patches for non libudev users which may cause
merge conflicts when applying this series.

Cheers
Emil

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[Mesa-dev] Splitting fs-instruction emission out of fs_visitor

[Topi Pohjolainen]

Here is some restructuring I've done in the compiler backend, mostly
for the fragment shader side. It allows me to introduce gen6/7 stencil
texturing without growing the already large fs_visitor even more.

I identified some common logic between fs and vec4 visitors and moved
these into brw_shader. The main thing the series really accomplishes
is breaking the dependency of fs_inst and fs_reg of fs_visitor. They
now only depend on backend_emitter. The newly introduced fs_emitter
depends on those and finally fs_visitor on fs_emitter.

In terms of class diagram:

   before  after
   --  -

   backend_visitor backend_visitor   backend_emitter
 |   | |
/ \ / \   / \
 |   | |
  +--+--+ +--+--+   +--+--+
  | | | |   | |
 vec4_visitor   fs_visitor|  vec4_visitor fs_emitter
  |   |
  |  / \
  |   |
  |   |
  |   |
  +---+---+
  |
  fs_visitor

I saw no piglit regressions using IVB.

Topi Pohjolainen (14):
  i965: Split emitter out of backend_visitor
  i965: Merge emission memory context setup for shader visitors
  i965: Merge max_grf between stage compilers
  i965/vec4: Use unsigned instead of signed for visitor uniform count
  i965: Merge variable hashtables of fs and vec4 visitors
  i965: Merge fail() for ir visitors
  i965/vec4: Move virtual register map into backend_emitter
  i965: Refactor virtual register allocation between fs and vec4
  i965: Merge resolving of register size between fs and vec4
  i965: Merge common members of visitors
  i965/fs: Reduce scope for the visitor
  i965/fs: Split declarations of fs_reg and fs_inst out of brw_fs.h
  i965/fs: Split LIR emission ouf of ir-visitor
  i965/fs: Move emission of ALUs into fs_emitter

 src/mesa/drivers/dri/i965/Makefile.sources |   1 +
 src/mesa/drivers/dri/i965/brw_cfg.cpp  |   8 +-
 src/mesa/drivers/dri/i965/brw_cfg.h|   4 +-
 .../drivers/dri/i965/brw_dead_control_flow.cpp |   6 +-
 src/mesa/drivers/dri/i965/brw_dead_control_flow.h  |   2 +-
 src/mesa/drivers/dri/i965/brw_fs.cpp   | 229 +
 src/mesa/drivers/dri/i965/brw_fs.h | 249 +-
 src/mesa/drivers/dri/i965/brw_fs_emit.h| 285 +
 src/mesa/drivers/dri/i965/brw_fs_emitter.cpp   | 206 +++
 src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp  |   2 +-
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp   |  53 +---
 .../drivers/dri/i965/brw_schedule_instructions.cpp |   4 +-
 src/mesa/drivers/dri/i965/brw_shader.cpp   | 145 ++-
 src/mesa/drivers/dri/i965/brw_shader.h |  75 +-
 src/mesa/drivers/dri/i965/brw_vec4.cpp |  16 +-
 src/mesa/drivers/dri/i965/brw_vec4.h   |  38 +--
 .../drivers/dri/i965/brw_vec4_reg_allocate.cpp |   2 +-
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 142 +-
 src/mesa/drivers/dri/i965/brw_vec4_vp.cpp  |   2 +-
 19 files changed, 743 insertions(+), 726 deletions(-)
 create mode 100644 src/mesa/drivers/dri/i965/brw_fs_emit.h
 create mode 100644 src/mesa/drivers/dri/i965/brw_fs_emitter.cpp

-- 
1.8.3.1

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[Mesa-dev] [PATCH 04/14] i965/vec4: Use unsigned instead of signed for visitor uniform count

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_vec4.cpp | 12 ++--
 src/mesa/drivers/dri/i965/brw_vec4.h   |  4 ++--
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp |  4 ++--
 src/mesa/drivers/dri/i965/brw_vec4_vp.cpp  |  2 +-
 4 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index daff364..041f9e6 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -515,7 +515,7 @@ vec4_visitor::split_uniform_registers()
}
 
/* Update that everything is now vector-sized. */
-   for (int i = 0; i < this->uniforms; i++) {
+   for (unsigned i = 0; i < this->uniforms; i++) {
   this->uniform_size[i] = 1;
}
 }
@@ -546,12 +546,12 @@ vec4_visitor::pack_uniform_registers()
   }
}
 
-   int new_uniform_count = 0;
+   unsigned new_uniform_count = 0;
 
/* Now, figure out a packing of the live uniform vectors into our
 * push constants.
 */
-   for (int src = 0; src < uniforms; src++) {
+   for (unsigned src = 0; src < uniforms; src++) {
   assert(src < uniform_array_size);
   int size = this->uniform_vector_size[src];
 
@@ -560,7 +560,7 @@ vec4_visitor::pack_uniform_registers()
 continue;
   }
 
-  int dst;
+  unsigned dst;
   /* Find the lowest place we can slot this uniform in. */
   for (dst = 0; dst < src; dst++) {
 if (this->uniform_vector_size[dst] + size <= 4)
@@ -715,7 +715,7 @@ vec4_visitor::move_push_constants_to_pull_constants()
/* Only allow 32 registers (256 uniform components) as push constants,
 * which is the limit on gen6.
 */
-   int max_uniform_components = 32 * 8;
+   unsigned max_uniform_components = 32 * 8;
if (this->uniforms * 4 <= max_uniform_components)
   return;
 
@@ -724,7 +724,7 @@ vec4_visitor::move_push_constants_to_pull_constants()
 * look for the most infrequently used uniform vec4s, but leave
 * that for later.
 */
-   for (int i = 0; i < this->uniforms * 4; i += 4) {
+   for (unsigned i = 0; i < this->uniforms * 4; i += 4) {
   pull_constant_loc[i / 4] = -1;
 
   if (i >= max_uniform_components) {
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h 
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 33d3bba..b6585bc 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -393,8 +393,8 @@ public:
const char *output_reg_annotation[BRW_VARYING_SLOT_COUNT];
int *uniform_size;
int *uniform_vector_size;
-   int uniform_array_size; /*< Size of uniform_[vector_]size arrays */
-   int uniforms;
+   unsigned uniform_array_size; /*< Size of uniform_[vector_]size arrays */
+   unsigned uniforms;
 
src_reg shader_start_time;
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index f995828..5b95ed6 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -3280,7 +3280,7 @@ 
vec4_visitor::move_uniform_array_access_to_pull_constants()
 {
int pull_constant_loc[this->uniforms];
 
-   for (int i = 0; i < this->uniforms; i++) {
+   for (unsigned i = 0; i < this->uniforms; i++) {
   pull_constant_loc[i] = -1;
}
 
@@ -3297,7 +3297,7 @@ 
vec4_visitor::move_uniform_array_access_to_pull_constants()
 if (inst->src[i].file != UNIFORM || !inst->src[i].reladdr)
continue;
 
-int uniform = inst->src[i].reg;
+unsigned uniform = inst->src[i].reg;
 
 /* If this array isn't already present in the pull constant buffer,
  * add it.
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
index f1000f2..fa26970 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_vp.cpp
@@ -570,7 +570,7 @@ vec4_vs_visitor::get_vp_src_reg(const prog_src_register 
&src)
  break;
 
   case PROGRAM_STATE_VAR:
- assert(src.Index < this->uniforms);
+ assert(src.Index < (int)this->uniforms);
  result = src_reg(dst_reg(UNIFORM, src.Index));
  result.type = BRW_REGISTER_TYPE_F;
  break;
-- 
1.8.3.1

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[Mesa-dev] [PATCH 01/14] i965: Split emitter out of backend_visitor

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_cfg.cpp|  8 
 src/mesa/drivers/dri/i965/brw_cfg.h  |  4 ++--
 src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp  |  6 +++---
 src/mesa/drivers/dri/i965/brw_dead_control_flow.h|  2 +-
 src/mesa/drivers/dri/i965/brw_fs.h   |  2 +-
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |  3 ++-
 .../drivers/dri/i965/brw_schedule_instructions.cpp   |  4 ++--
 src/mesa/drivers/dri/i965/brw_shader.cpp | 15 +--
 src/mesa/drivers/dri/i965/brw_shader.h   | 20 ++--
 src/mesa/drivers/dri/i965/brw_vec4.h |  2 +-
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp   |  3 ++-
 11 files changed, 41 insertions(+), 28 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_cfg.cpp 
b/src/mesa/drivers/dri/i965/brw_cfg.cpp
index 6bf99f1..0897c83 100644
--- a/src/mesa/drivers/dri/i965/brw_cfg.cpp
+++ b/src/mesa/drivers/dri/i965/brw_cfg.cpp
@@ -72,14 +72,14 @@ bblock_t::add_successor(void *mem_ctx, bblock_t *successor)
 }
 
 void
-bblock_t::dump(backend_visitor *v)
+bblock_t::dump(backend_emitter *e)
 {
int ip = this->start_ip;
for (backend_instruction *inst = (backend_instruction *)this->start;
inst != this->end->next;
inst = (backend_instruction *) inst->next) {
   fprintf(stderr, "%5d: ", ip);
-  v->dump_instruction(inst);
+  e->dump_instruction(inst);
   ip++;
}
 }
@@ -302,7 +302,7 @@ cfg_t::make_block_array()
 }
 
 void
-cfg_t::dump(backend_visitor *v)
+cfg_t::dump(backend_emitter *e)
 {
for (int b = 0; b < this->num_blocks; b++) {
 bblock_t *block = this->blocks[b];
@@ -312,7 +312,7 @@ cfg_t::dump(backend_visitor *v)
  link->block->block_num);
   }
   fprintf(stderr, "\n");
-  block->dump(v);
+  block->dump(e);
   fprintf(stderr, "END B%d", b);
   foreach_list_typed(bblock_link, link, link, &block->children) {
  fprintf(stderr, " ->B%d",
diff --git a/src/mesa/drivers/dri/i965/brw_cfg.h 
b/src/mesa/drivers/dri/i965/brw_cfg.h
index 9466bd2..50f9545 100644
--- a/src/mesa/drivers/dri/i965/brw_cfg.h
+++ b/src/mesa/drivers/dri/i965/brw_cfg.h
@@ -58,7 +58,7 @@ struct bblock_t {
bblock_t();
 
void add_successor(void *mem_ctx, bblock_t *successor);
-   void dump(backend_visitor *v);
+   void dump(backend_emitter *e);
 #endif
 
struct backend_instruction *start;
@@ -94,7 +94,7 @@ public:
void set_next_block(bblock_t **cur, bblock_t *block, int ip);
void make_block_array();
 
-   void dump(backend_visitor *v);
+   void dump(backend_emitter *e);
 
void *mem_ctx;
 
diff --git a/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp 
b/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
index 63a3e5b..35b0de0 100644
--- a/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
+++ b/src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
@@ -35,11 +35,11 @@
  *   - if/else/endif
  */
 bool
-dead_control_flow_eliminate(backend_visitor *v)
+dead_control_flow_eliminate(backend_emitter *e)
 {
bool progress = false;
 
-   cfg_t cfg(&v->instructions);
+   cfg_t cfg(&e->instructions);
 
for (int b = 0; b < cfg.num_blocks; b++) {
   bblock_t *block = cfg.blocks[b];
@@ -77,7 +77,7 @@ dead_control_flow_eliminate(backend_visitor *v)
}
 
if (progress)
-  v->invalidate_live_intervals();
+  e->invalidate_live_intervals();
 
return progress;
 }
diff --git a/src/mesa/drivers/dri/i965/brw_dead_control_flow.h 
b/src/mesa/drivers/dri/i965/brw_dead_control_flow.h
index 57a4dab..58f8612 100644
--- a/src/mesa/drivers/dri/i965/brw_dead_control_flow.h
+++ b/src/mesa/drivers/dri/i965/brw_dead_control_flow.h
@@ -23,4 +23,4 @@
 
 #include "brw_shader.h"
 
-bool dead_control_flow_eliminate(backend_visitor *v);
+bool dead_control_flow_eliminate(backend_emitter *e);
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index 60a4906..29ca84c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -239,7 +239,7 @@ public:
  *
  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
  */
-class fs_visitor : public backend_visitor
+class fs_visitor : public backend_visitor, public backend_emitter
 {
 public:
 
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 171f063..b40a682 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -2963,8 +2963,9 @@ fs_visitor::fs_visitor(struct brw_context *brw,
struct gl_shader_program *shader_prog,
struct gl_fragment_program *fp,
unsigned dispatch_width)
-   : backend_visitor(brw, shader_prog, &fp->Base, &prog_data->base,
+   : backend_visitor(shader_prog, &fp->Base, &prog_data->base,
  MESA_SHA

[Mesa-dev] [PATCH 02/14] i965: Merge emission memory context setup for shader visitors

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp   | 3 +--
 src/mesa/drivers/dri/i965/brw_shader.cpp   | 5 +++--
 src/mesa/drivers/dri/i965/brw_shader.h | 8 ++--
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 3 +--
 4 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index b40a682..0219c81 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -2965,12 +2965,11 @@ fs_visitor::fs_visitor(struct brw_context *brw,
unsigned dispatch_width)
: backend_visitor(shader_prog, &fp->Base, &prog_data->base,
  MESA_SHADER_FRAGMENT),
- backend_emitter(brw),
+ backend_emitter(brw, mem_ctx),
  key(key), prog_data(prog_data),
  dispatch_width(dispatch_width)
 {
this->fp = fp;
-   this->mem_ctx = mem_ctx;
this->failed = false;
this->simd16_unsupported = false;
this->no16_msg = NULL;
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp 
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index aa7ea06..69c8576 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -548,9 +548,10 @@ backend_visitor::backend_visitor(struct gl_shader_program 
*shader_prog,
 {
 }
 
-backend_emitter::backend_emitter(struct brw_context *brw)
+backend_emitter::backend_emitter(struct brw_context *brw, void *mem_ctx)
: brw(brw),
- ctx(&brw->ctx)
+ ctx(&brw->ctx),
+ mem_ctx(mem_ctx)
 {
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h 
b/src/mesa/drivers/dri/i965/brw_shader.h
index 980cd0a..c1343ae 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -102,7 +102,7 @@ public:
 class backend_emitter {
 protected:
 
-   explicit backend_emitter(struct brw_context *brw);
+   backend_emitter(struct brw_context *brw, void *mem_ctx);
 
 public:
 
@@ -110,7 +110,7 @@ public:
struct gl_context * const ctx;
 
/** ralloc context for temporary data used during compile */
-   void *mem_ctx;
+   void * const mem_ctx;
 
/**
 * List of either fs_inst or vec4_instruction (inheriting from
@@ -122,6 +122,10 @@ public:
virtual void dump_instructions();
 
virtual void invalidate_live_intervals() = 0;
+
+private:
+   backend_emitter(const backend_emitter& );
+   const backend_emitter& operator=(const backend_emitter& );
 };
 
 uint32_t brw_texture_offset(struct gl_context *ctx, ir_constant *offset);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 5e9d3d8..c46593c 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -3364,7 +3364,7 @@ vec4_visitor::vec4_visitor(struct brw_context *brw,
shader_time_shader_type st_written,
shader_time_shader_type st_reset)
: backend_visitor(shader_prog, prog, &prog_data->base, stage),
- backend_emitter(brw),
+ backend_emitter(brw, mem_ctx),
  c(c),
  key(key),
  prog_data(prog_data),
@@ -3378,7 +3378,6 @@ vec4_visitor::vec4_visitor(struct brw_context *brw,
  st_written(st_written),
  st_reset(st_reset)
 {
-   this->mem_ctx = mem_ctx;
this->failed = false;
 
this->base_ir = NULL;
-- 
1.8.3.1

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[Mesa-dev] [PATCH 09/14] i965: Merge resolving of register size between fs and vec4

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_fs.cpp   | 37 ---
 src/mesa/drivers/dri/i965/brw_fs.h |  1 -
 src/mesa/drivers/dri/i965/brw_shader.cpp   | 51 +
 src/mesa/drivers/dri/i965/brw_shader.h |  3 ++
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 63 +++---
 5 files changed, 61 insertions(+), 94 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index f073e12..90aca4f 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -521,43 +521,6 @@ fs_reg::is_accumulator() const
   fixed_hw_reg.nr == BRW_ARF_ACCUMULATOR;
 }
 
-int
-fs_visitor::type_size(const struct glsl_type *type)
-{
-   unsigned int size, i;
-
-   switch (type->base_type) {
-   case GLSL_TYPE_UINT:
-   case GLSL_TYPE_INT:
-   case GLSL_TYPE_FLOAT:
-   case GLSL_TYPE_BOOL:
-  return type->components();
-   case GLSL_TYPE_ARRAY:
-  return type_size(type->fields.array) * type->length;
-   case GLSL_TYPE_STRUCT:
-  size = 0;
-  for (i = 0; i < type->length; i++) {
-size += type_size(type->fields.structure[i].type);
-  }
-  return size;
-   case GLSL_TYPE_SAMPLER:
-  /* Samplers take up no register space, since they're baked in at
-   * link time.
-   */
-  return 0;
-   case GLSL_TYPE_ATOMIC_UINT:
-  return 0;
-   case GLSL_TYPE_IMAGE:
-   case GLSL_TYPE_VOID:
-   case GLSL_TYPE_ERROR:
-   case GLSL_TYPE_INTERFACE:
-  assert(!"not reached");
-  break;
-   }
-
-   return 0;
-}
-
 fs_reg
 fs_visitor::get_timestamp()
 {
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index d1d2018..7b3ffbd 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -323,7 +323,6 @@ public:
fs_inst *SUBB(fs_reg dst, fs_reg src0, fs_reg src1);
fs_inst *SEL(fs_reg dst, fs_reg src0, fs_reg src1);
 
-   int type_size(const struct glsl_type *type);
fs_inst *get_instruction_generating_reg(fs_inst *start,
   fs_inst *end,
   const fs_reg ®);
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp 
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index e55e998..777d4aa 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -626,6 +626,57 @@ backend_emitter::virtual_grf_alloc(int size, bool use_map)
return virtual_grf_count++;
 }
 
+int
+backend_emitter::type_size(const struct glsl_type *type,
+   bool use_vec4_overrides)
+{
+   unsigned int size, i;
+
+   switch (type->base_type) {
+   case GLSL_TYPE_UINT:
+   case GLSL_TYPE_INT:
+   case GLSL_TYPE_FLOAT:
+   case GLSL_TYPE_BOOL:
+  if (!use_vec4_overrides)
+ return type->components();
+
+  if (type->is_matrix()) {
+ return type->matrix_columns;
+  } else {
+ /* Regardless of size of vector, it gets a vec4. This is bad
+  * packing for things like floats, but otherwise arrays become a
+  * mess.  Hopefully a later pass over the code can pack scalars
+  * down if appropriate.
+  */
+ return 1;
+  }
+   case GLSL_TYPE_ARRAY:
+  assert(type->length > 0);
+  return type_size(type->fields.array, use_vec4_overrides) * type->length;
+   case GLSL_TYPE_STRUCT:
+  size = 0;
+  for (i = 0; i < type->length; i++) {
+ size += type_size(type->fields.structure[i].type, use_vec4_overrides);
+  }
+  return size;
+   case GLSL_TYPE_SAMPLER:
+  /* Samplers take up no register space, since they're baked in at
+   * link time.
+   */
+  return use_vec4_overrides ? 1 : 0;
+   case GLSL_TYPE_ATOMIC_UINT:
+  return 0;
+   case GLSL_TYPE_IMAGE:
+   case GLSL_TYPE_VOID:
+   case GLSL_TYPE_ERROR:
+   case GLSL_TYPE_INTERFACE:
+  assert(!"not reached");
+  break;
+   }
+
+   return 0;
+}
+
 bool
 backend_instruction::is_tex() const
 {
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h 
b/src/mesa/drivers/dri/i965/brw_shader.h
index 54157fd..9ae5873 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -114,6 +114,9 @@ public:
 
int virtual_grf_alloc(int size, bool use_map = false);
 
+   static int type_size(const struct glsl_type *type,
+bool use_vec4_overrides = false);
+
struct brw_context * const brw;
struct gl_context * const ctx;
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index e324d76..4be1acf 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -548,61 +548,12 @@ vec4_visitor::visit_instructions(const exec_list *list)
}
 }
 
-
-static int
-type_size(const struct glsl_type *type)
-{
-   unsigned in

[Mesa-dev] [PATCH 11/14] i965/fs: Reduce scope for the visitor

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_fs.cpp | 4 ++--
 src/mesa/drivers/dri/i965/brw_fs.h   | 4 +++-
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 90aca4f..c971480 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -823,12 +823,12 @@ fs_reg::fs_reg(enum register_file file, int reg, uint32_t 
type)
 }
 
 /** Automatic reg constructor. */
-fs_reg::fs_reg(class fs_visitor *v, const struct glsl_type *type)
+fs_reg::fs_reg(backend_emitter *e, const struct glsl_type *type)
 {
init();
 
this->file = GRF;
-   this->reg = v->virtual_grf_alloc(v->type_size(type));
+   this->reg = e->virtual_grf_alloc(e->type_size(type));
this->reg_offset = 0;
this->type = brw_type_for_base_type(type);
 }
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index 36bb7bf..67dce1e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -76,7 +76,7 @@ public:
fs_reg(struct brw_reg fixed_hw_reg);
fs_reg(enum register_file file, int reg);
fs_reg(enum register_file file, int reg, uint32_t type);
-   fs_reg(class fs_visitor *v, const struct glsl_type *type);
+   fs_reg(backend_emitter *e, const struct glsl_type *type);
 
bool equals(const fs_reg &r) const;
bool is_zero() const;
@@ -184,6 +184,8 @@ public:
int ip;
 };
 
+class fs_visitor;
+
 class fs_inst : public backend_instruction {
 public:
DECLARE_RALLOC_CXX_OPERATORS(fs_inst)
-- 
1.8.3.1

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[Mesa-dev] [PATCH 06/14] i965: Merge fail() for ir visitors

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_fs.cpp   | 30 --
 src/mesa/drivers/dri/i965/brw_fs.h |  4 ---
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp   |  3 +-
 src/mesa/drivers/dri/i965/brw_shader.cpp   | 44 --
 src/mesa/drivers/dri/i965/brw_shader.h | 13 +++-
 src/mesa/drivers/dri/i965/brw_vec4.h   |  6 
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 30 +-
 7 files changed, 56 insertions(+), 74 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 5605db3..5de6b95 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -666,36 +666,6 @@ fs_visitor::emit_shader_time_write(enum 
shader_time_shader_type type,
  fs_reg(), payload, offset, value));
 }
 
-void
-fs_visitor::vfail(const char *format, va_list va)
-{
-   char *msg;
-
-   if (failed)
-  return;
-
-   failed = true;
-
-   msg = ralloc_vasprintf(mem_ctx, format, va);
-   msg = ralloc_asprintf(mem_ctx, "FS compile failed: %s\n", msg);
-
-   this->fail_msg = msg;
-
-   if (INTEL_DEBUG & DEBUG_WM) {
-  fprintf(stderr, "%s",  msg);
-   }
-}
-
-void
-fs_visitor::fail(const char *format, ...)
-{
-   va_list va;
-
-   va_start(va, format);
-   vfail(format, va);
-   va_end(va);
-}
-
 /**
  * Mark this program as impossible to compile in SIMD16 mode.
  *
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index 184725c..f430862 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -376,8 +376,6 @@ public:
void insert_gen4_send_dependency_workarounds();
void insert_gen4_pre_send_dependency_workarounds(fs_inst *inst);
void insert_gen4_post_send_dependency_workarounds(fs_inst *inst);
-   void vfail(const char *msg, va_list args);
-   void fail(const char *msg, ...);
void no16(const char *msg, ...);
void lower_uniform_pull_constant_loads();
 
@@ -537,8 +535,6 @@ public:
const void *base_ir;
/** @} */
 
-   bool failed;
-   char *fail_msg;
bool simd16_unsupported;
char *no16_msg;
 
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index d4e02d2..e74b28e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -2965,12 +2965,11 @@ fs_visitor::fs_visitor(struct brw_context *brw,
unsigned dispatch_width)
: backend_visitor(shader_prog, &fp->Base, &prog_data->base,
  MESA_SHADER_FRAGMENT),
- backend_emitter(brw, mem_ctx),
+ backend_emitter(brw, mem_ctx, "FS", INTEL_DEBUG & DEBUG_WM),
  key(key), prog_data(prog_data),
  dispatch_width(dispatch_width)
 {
this->fp = fp;
-   this->failed = false;
this->simd16_unsupported = false;
this->no16_msg = NULL;
 
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp 
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index c73fa8b..7594713 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -548,17 +548,57 @@ backend_visitor::backend_visitor(struct gl_shader_program 
*shader_prog,
 {
 }
 
-backend_emitter::backend_emitter(struct brw_context *brw, void *mem_ctx)
+backend_emitter::backend_emitter(struct brw_context *brw, void *mem_ctx,
+ const char *stage_name, bool debug_flag)
: brw(brw),
  ctx(&brw->ctx),
  mem_ctx(mem_ctx),
  max_grf(brw->gen >= 7 ? GEN7_MRF_HACK_START : BRW_MAX_GRF),
  variable_ht(hash_table_ctor(0,
  hash_table_pointer_hash,
- hash_table_pointer_compare))
+ hash_table_pointer_compare)),
+ fail_msg(NULL),
+ failed(false),
+ stage_name(stage_name),
+ debug_flag(debug_flag)
 {
 }
 
+backend_emitter::~backend_emitter()
+{
+   hash_table_dtor(variable_ht);
+}
+
+void
+backend_emitter::vfail(const char *format, va_list va) 
+{
+   char *msg;
+
+   if (failed)
+  return;
+
+   failed = true;
+
+   msg = ralloc_vasprintf(mem_ctx, format, va);
+   msg = ralloc_asprintf(mem_ctx, "%s compile failed: %s\n", stage_name, msg);
+
+   this->fail_msg = msg;
+
+   if (debug_flag) {
+  fprintf(stderr, "%s",  msg);
+   }
+}
+
+void
+backend_emitter::fail(const char *format, ...)
+{
+   va_list va;
+
+   va_start(va, format);
+   vfail(format, va);
+   va_end(va);
+}
+
 bool
 backend_instruction::is_tex() const
 {
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h 
b/src/mesa/drivers/dri/i965/brw_shader.h
index 1c5c9f1..f7bb15e 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -102,7 +102,13 @@ public:
 class backend_emitter {
 protected:
 
-   backend_emitter(struct brw_context *brw, void *mem_ctx);
+   backend_emitter(

[Mesa-dev] [PATCH 12/14] i965/fs: Split declarations of fs_reg and fs_inst out of brw_fs.h

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_fs.h  | 174 +
 src/mesa/drivers/dri/i965/brw_fs_emit.h | 220 
 2 files changed, 221 insertions(+), 173 deletions(-)
 create mode 100644 src/mesa/drivers/dri/i965/brw_fs_emit.h

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index 67dce1e..6c39368 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -51,6 +51,7 @@ extern "C" {
 #include "gen8_generator.h"
 #include "glsl/glsl_types.h"
 #include "glsl/ir.h"
+#include "brw_fs_emit.h"
 
 #define MAX_SAMPLER_MESSAGE_SIZE 11
 
@@ -63,179 +64,6 @@ namespace brw {
class fs_live_variables;
 }
 
-class fs_reg {
-public:
-   DECLARE_RALLOC_CXX_OPERATORS(fs_reg)
-
-   void init();
-
-   fs_reg();
-   fs_reg(float f);
-   fs_reg(int32_t i);
-   fs_reg(uint32_t u);
-   fs_reg(struct brw_reg fixed_hw_reg);
-   fs_reg(enum register_file file, int reg);
-   fs_reg(enum register_file file, int reg, uint32_t type);
-   fs_reg(backend_emitter *e, const struct glsl_type *type);
-
-   bool equals(const fs_reg &r) const;
-   bool is_zero() const;
-   bool is_one() const;
-   bool is_null() const;
-   bool is_valid_3src() const;
-   bool is_contiguous() const;
-   bool is_accumulator() const;
-
-   fs_reg &apply_stride(unsigned stride);
-   /** Smear a channel of the reg to all channels. */
-   fs_reg &set_smear(unsigned subreg);
-
-   /** Register file: GRF, MRF, IMM. */
-   enum register_file file;
-   /** Register type.  BRW_REGISTER_TYPE_* */
-   uint8_t type;
-   /**
-* Register number.  For MRF, it's the hardware register.  For
-* GRF, it's a virtual register number until register allocation
-*/
-   uint16_t reg;
-   /**
-* Offset from the start of the contiguous register block.
-*
-* For pre-register-allocation GRFs, this is in units of a float per pixel
-* (1 hardware register for SIMD8 mode, or 2 registers for SIMD16 mode).
-* For uniforms, this is in units of 1 float.
-*/
-   int reg_offset;
-   /**
-* Offset in bytes from the start of the register.  Values up to a
-* backend_reg::reg_offset unit are valid.
-*/
-   int subreg_offset;
-
-   /** Value for file == IMM */
-   union {
-  int32_t i;
-  uint32_t u;
-  float f;
-   } imm;
-
-   struct brw_reg fixed_hw_reg;
-
-   fs_reg *reladdr;
-
-   bool negate;
-   bool abs;
-
-   /** Register region horizontal stride */
-   uint8_t stride;
-};
-
-static inline fs_reg
-retype(fs_reg reg, unsigned type)
-{
-   reg.fixed_hw_reg.type = reg.type = type;
-   return reg;
-}
-
-static inline fs_reg
-offset(fs_reg reg, unsigned delta)
-{
-   assert(delta == 0 || (reg.file != HW_REG && reg.file != IMM));
-   reg.reg_offset += delta;
-   return reg;
-}
-
-static inline fs_reg
-byte_offset(fs_reg reg, unsigned delta)
-{
-   assert(delta == 0 || (reg.file != HW_REG && reg.file != IMM));
-   reg.subreg_offset += delta;
-   return reg;
-}
-
-/**
- * Get either of the 8-component halves of a 16-component register.
- *
- * Note: this also works if \c reg represents a SIMD16 pair of registers.
- */
-static inline fs_reg
-half(const fs_reg ®, unsigned idx)
-{
-   assert(idx < 2);
-   assert(idx == 0 || (reg.file != HW_REG && reg.file != IMM));
-   return byte_offset(reg, 8 * idx * reg.stride * type_sz(reg.type));
-}
-
-static const fs_reg reg_undef;
-static const fs_reg reg_null_f(retype(brw_null_reg(), BRW_REGISTER_TYPE_F));
-static const fs_reg reg_null_d(retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
-static const fs_reg reg_null_ud(retype(brw_null_reg(), BRW_REGISTER_TYPE_UD));
-
-class ip_record : public exec_node {
-public:
-   DECLARE_RALLOC_CXX_OPERATORS(ip_record)
-
-   ip_record(int ip)
-   {
-  this->ip = ip;
-   }
-
-   int ip;
-};
-
-class fs_visitor;
-
-class fs_inst : public backend_instruction {
-public:
-   DECLARE_RALLOC_CXX_OPERATORS(fs_inst)
-
-   void init();
-
-   fs_inst();
-   fs_inst(enum opcode opcode);
-   fs_inst(enum opcode opcode, fs_reg dst);
-   fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
-   fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
-   fs_inst(enum opcode opcode, fs_reg dst,
-   fs_reg src0, fs_reg src1,fs_reg src2);
-
-   bool equals(fs_inst *inst) const;
-   bool overwrites_reg(const fs_reg ®) const;
-   bool is_send_from_grf() const;
-   bool is_partial_write() const;
-   int regs_read(fs_visitor *v, int arg) const;
-
-   bool reads_flag() const;
-   bool writes_flag() const;
-
-   fs_reg dst;
-   fs_reg src[3];
-
-   uint32_t texture_offset; /**< Texture offset bitfield */
-   uint32_t offset; /* spill/unspill offset */
-
-   uint8_t conditional_mod; /**< BRW_CONDITIONAL_* */
-
-   /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
-* mod and predication.
-*/
-   uint8_t flag_subreg;
-
-   uint8_t mlen; /**< SEND message length */
-   uint8_t regs_written; /**< Numb

[Mesa-dev] [PATCH 08/14] i965: Refactor virtual register allocation between fs and vec4

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_fs.cpp   | 15 -
 src/mesa/drivers/dri/i965/brw_fs.h |  4 
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp   |  3 ---
 src/mesa/drivers/dri/i965/brw_shader.cpp   | 25 +
 src/mesa/drivers/dri/i965/brw_shader.h |  6 +
 src/mesa/drivers/dri/i965/brw_vec4.cpp |  4 ++--
 src/mesa/drivers/dri/i965/brw_vec4.h   |  4 
 .../drivers/dri/i965/brw_vec4_reg_allocate.cpp |  2 +-
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 26 ++
 9 files changed, 36 insertions(+), 53 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 5de6b95..f073e12 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -841,21 +841,6 @@ fs_visitor::implied_mrf_writes(fs_inst *inst)
}
 }
 
-int
-fs_visitor::virtual_grf_alloc(int size)
-{
-   if (virtual_grf_array_size <= virtual_grf_count) {
-  if (virtual_grf_array_size == 0)
-virtual_grf_array_size = 16;
-  else
-virtual_grf_array_size *= 2;
-  virtual_grf_sizes = reralloc(mem_ctx, virtual_grf_sizes, int,
-  virtual_grf_array_size);
-   }
-   virtual_grf_sizes[virtual_grf_count] = size;
-   return virtual_grf_count++;
-}
-
 /** Fixed HW reg constructor. */
 fs_reg::fs_reg(enum register_file file, int reg)
 {
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index f430862..d1d2018 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -252,7 +252,6 @@ public:
   unsigned dispatch_width);
 
fs_reg *variable_storage(ir_variable *var);
-   int virtual_grf_alloc(int size);
void import_uniforms(fs_visitor *v);
 
void visit(ir_variable *ir);
@@ -492,9 +491,6 @@ public:
 
int *param_size;
 
-   int *virtual_grf_sizes;
-   int virtual_grf_count;
-   int virtual_grf_array_size;
int *virtual_grf_start;
int *virtual_grf_end;
brw::fs_live_variables *live_intervals;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index e74b28e..b78a8d2 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -2983,9 +2983,6 @@ fs_visitor::fs_visitor(struct brw_context *brw,
this->current_annotation = NULL;
this->base_ir = NULL;
 
-   this->virtual_grf_sizes = NULL;
-   this->virtual_grf_count = 0;
-   this->virtual_grf_array_size = 0;
this->virtual_grf_start = NULL;
this->virtual_grf_end = NULL;
this->live_intervals = NULL;
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp 
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index fba347a..e55e998 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -561,6 +561,9 @@ backend_emitter::backend_emitter(struct brw_context *brw, 
void *mem_ctx,
  failed(false),
  stage_name(stage_name),
  debug_flag(debug_flag),
+ virtual_grf_sizes(0),
+ virtual_grf_count(0),
+ virtual_grf_array_size(0),
  virtual_grf_reg_count(0),
  virtual_grf_reg_map(NULL)
 {
@@ -601,6 +604,28 @@ backend_emitter::fail(const char *format, ...)
va_end(va);
 }
 
+int
+backend_emitter::virtual_grf_alloc(int size, bool use_map)
+{
+   if (virtual_grf_array_size <= virtual_grf_count) {
+  if (virtual_grf_array_size == 0)
+ virtual_grf_array_size = 16;
+  else
+ virtual_grf_array_size *= 2;
+  virtual_grf_sizes = reralloc(mem_ctx, virtual_grf_sizes, int,
+   virtual_grf_array_size);
+  if (use_map)
+ virtual_grf_reg_map = reralloc(mem_ctx, virtual_grf_reg_map, int,
+virtual_grf_array_size);
+   }
+   if (use_map) {
+  virtual_grf_reg_map[virtual_grf_count] = virtual_grf_reg_count;
+  virtual_grf_reg_count += size;
+   }
+   virtual_grf_sizes[virtual_grf_count] = size;
+   return virtual_grf_count++;
+}
+
 bool
 backend_instruction::is_tex() const
 {
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h 
b/src/mesa/drivers/dri/i965/brw_shader.h
index 8c9b646..54157fd 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -112,6 +112,8 @@ protected:
 
 public:
 
+   int virtual_grf_alloc(int size, bool use_map = false);
+
struct brw_context * const brw;
struct gl_context * const ctx;
 
@@ -134,6 +136,10 @@ public:
const char * const stage_name;
const bool debug_flag;
 
+   int *virtual_grf_sizes;
+   int virtual_grf_count;
+   int virtual_grf_array_size;
+
/**
 * This is the size to be used for an array with an element per
 * reg_offset
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 041f9e6

[Mesa-dev] [PATCH 05/14] i965: Merge variable hashtables of fs and vec4 visitors

[Topi Pohjolainen]

Now empty destructors are dropped allowing compiler to generate the
defaults (calling base class).

Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_fs.h | 2 --
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp   | 8 
 src/mesa/drivers/dri/i965/brw_shader.cpp   | 5 -
 src/mesa/drivers/dri/i965/brw_shader.h | 2 ++
 src/mesa/drivers/dri/i965/brw_vec4.h   | 3 ---
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 9 -
 6 files changed, 6 insertions(+), 23 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index 9581f41..184725c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -250,7 +250,6 @@ public:
   struct gl_shader_program *shader_prog,
   struct gl_fragment_program *fp,
   unsigned dispatch_width);
-   ~fs_visitor();
 
fs_reg *variable_storage(ir_variable *var);
int virtual_grf_alloc(int size);
@@ -522,7 +521,6 @@ public:
 */
int *push_constant_loc;
 
-   struct hash_table *variable_ht;
fs_reg frag_depth;
fs_reg sample_mask;
fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index f0715bc..d4e02d2 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -2973,9 +2973,6 @@ fs_visitor::fs_visitor(struct brw_context *brw,
this->failed = false;
this->simd16_unsupported = false;
this->no16_msg = NULL;
-   this->variable_ht = hash_table_ctor(0,
-   hash_table_pointer_hash,
-   hash_table_pointer_compare);
 
memset(&this->payload, 0, sizeof(this->payload));
memset(this->outputs, 0, sizeof(this->outputs));
@@ -3008,8 +3005,3 @@ fs_visitor::fs_visitor(struct brw_context *brw,
if (dispatch_width == 8)
   this->param_size = rzalloc_array(mem_ctx, int, 
stage_prog_data->nr_params);
 }
-
-fs_visitor::~fs_visitor()
-{
-   hash_table_dtor(this->variable_ht);
-}
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp 
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 6b9c0b7..c73fa8b 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -552,7 +552,10 @@ backend_emitter::backend_emitter(struct brw_context *brw, 
void *mem_ctx)
: brw(brw),
  ctx(&brw->ctx),
  mem_ctx(mem_ctx),
- max_grf(brw->gen >= 7 ? GEN7_MRF_HACK_START : BRW_MAX_GRF)
+ max_grf(brw->gen >= 7 ? GEN7_MRF_HACK_START : BRW_MAX_GRF),
+ variable_ht(hash_table_ctor(0,
+ hash_table_pointer_hash,
+ hash_table_pointer_compare))
 {
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h 
b/src/mesa/drivers/dri/i965/brw_shader.h
index e7f8911..1c5c9f1 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -121,6 +121,8 @@ public:
/** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
const unsigned max_grf;
 
+   struct hash_table * const variable_ht;
+
virtual void dump_instruction(backend_instruction *inst) = 0;
virtual void dump_instructions();
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h 
b/src/mesa/drivers/dri/i965/brw_vec4.h
index b6585bc..b44a3dc 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -299,7 +299,6 @@ public:
 shader_time_shader_type st_base,
 shader_time_shader_type st_written,
 shader_time_shader_type st_reset);
-   ~vec4_visitor();
 
dst_reg dst_null_f()
{
@@ -398,8 +397,6 @@ public:
 
src_reg shader_start_time;
 
-   struct hash_table *variable_ht;
-
bool run(void);
void fail(const char *msg, ...);
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 5b95ed6..a17d6f6 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -3384,10 +3384,6 @@ vec4_visitor::vec4_visitor(struct brw_context *brw,
this->current_annotation = NULL;
memset(this->output_reg_annotation, 0, sizeof(this->output_reg_annotation));
 
-   this->variable_ht = hash_table_ctor(0,
-  hash_table_pointer_hash,
-  hash_table_pointer_compare);
-
this->virtual_grf_start = NULL;
this->virtual_grf_end = NULL;
this->virtual_grf_sizes = NULL;
@@ -3411,11 +3407,6 @@ vec4_visitor::vec4_visitor(struct brw_context *brw,
this->uniform_vector_size = rzalloc_array(mem_ctx, int, 
this->uniform_array_size);
 }
 
-vec4_visitor::~vec4_visitor()
-{
-   hash_table_dtor(this->variable_ht);
-}
-
 
 void
 vec4_visitor::fail(const char *format, ...)
-- 
1.8.3.1

___
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[Mesa-dev] [PATCH 07/14] i965/vec4: Move virtual register map into backend_emitter

[Topi Pohjolainen]

In preparation for merging virtual register allocation between
vector and fragment visitors.

Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_shader.cpp   | 4 +++-
 src/mesa/drivers/dri/i965/brw_shader.h | 8 
 src/mesa/drivers/dri/i965/brw_vec4.h   | 8 
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 2 --
 4 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp 
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 7594713..fba347a 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -560,7 +560,9 @@ backend_emitter::backend_emitter(struct brw_context *brw, 
void *mem_ctx,
  fail_msg(NULL),
  failed(false),
  stage_name(stage_name),
- debug_flag(debug_flag)
+ debug_flag(debug_flag),
+ virtual_grf_reg_count(0),
+ virtual_grf_reg_map(NULL)
 {
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h 
b/src/mesa/drivers/dri/i965/brw_shader.h
index f7bb15e..8c9b646 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -134,6 +134,14 @@ public:
const char * const stage_name;
const bool debug_flag;
 
+   /**
+* This is the size to be used for an array with an element per
+* reg_offset
+*/
+   int virtual_grf_reg_count;
+   /** Per-virtual-grf indices into an array of size virtual_grf_reg_count */
+   int *virtual_grf_reg_map;
+
virtual void dump_instruction(backend_instruction *inst) = 0;
virtual void dump_instructions();
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h 
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 3726eb0..db5f417 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -335,14 +335,6 @@ public:
int *virtual_grf_end;
dst_reg userplane[MAX_CLIP_PLANES];
 
-   /**
-* This is the size to be used for an array with an element per
-* reg_offset
-*/
-   int virtual_grf_reg_count;
-   /** Per-virtual-grf indices into an array of size virtual_grf_reg_count */
-   int *virtual_grf_reg_map;
-
bool live_intervals_valid;
 
dst_reg *variable_storage(ir_variable *var);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 83c482b..f7355b8 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -3384,8 +3384,6 @@ vec4_visitor::vec4_visitor(struct brw_context *brw,
this->virtual_grf_end = NULL;
this->virtual_grf_sizes = NULL;
this->virtual_grf_count = 0;
-   this->virtual_grf_reg_map = NULL;
-   this->virtual_grf_reg_count = 0;
this->virtual_grf_array_size = 0;
this->live_intervals_valid = false;
 
-- 
1.8.3.1

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[Mesa-dev] [PATCH 13/14] i965/fs: Split LIR emission ouf of ir-visitor

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/Makefile.sources   |   1 +
 src/mesa/drivers/dri/i965/brw_fs.cpp |  44 ---
 src/mesa/drivers/dri/i965/brw_fs.h   |  19 +
 src/mesa/drivers/dri/i965/brw_fs_emit.h  |  33 
 src/mesa/drivers/dri/i965/brw_fs_emitter.cpp | 108 +++
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |  31 +---
 6 files changed, 145 insertions(+), 91 deletions(-)
 create mode 100644 src/mesa/drivers/dri/i965/brw_fs_emitter.cpp

diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
b/src/mesa/drivers/dri/i965/Makefile.sources
index 2570059..d43fc8e 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -69,6 +69,7 @@ i965_FILES = \
brw_fs_sel_peephole.cpp \
brw_fs_vector_splitting.cpp \
brw_fs_visitor.cpp \
+   brw_fs_emitter.cpp \
brw_gs.c \
brw_gs_emit.c \
brw_gs_state.c \
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index c971480..f3d8dcf 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -661,50 +661,6 @@ fs_visitor::no16(const char *format, ...)
va_end(va);
 }
 
-fs_inst *
-fs_visitor::emit(enum opcode opcode)
-{
-   return emit(new(mem_ctx) fs_inst(opcode));
-}
-
-fs_inst *
-fs_visitor::emit(enum opcode opcode, fs_reg dst)
-{
-   return emit(new(mem_ctx) fs_inst(opcode, dst));
-}
-
-fs_inst *
-fs_visitor::emit(enum opcode opcode, fs_reg dst, fs_reg src0)
-{
-   return emit(new(mem_ctx) fs_inst(opcode, dst, src0));
-}
-
-fs_inst *
-fs_visitor::emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1)
-{
-   return emit(new(mem_ctx) fs_inst(opcode, dst, src0, src1));
-}
-
-fs_inst *
-fs_visitor::emit(enum opcode opcode, fs_reg dst,
- fs_reg src0, fs_reg src1, fs_reg src2)
-{
-   return emit(new(mem_ctx) fs_inst(opcode, dst, src0, src1, src2));
-}
-
-void
-fs_visitor::push_force_uncompressed()
-{
-   force_uncompressed_stack++;
-}
-
-void
-fs_visitor::pop_force_uncompressed()
-{
-   force_uncompressed_stack--;
-   assert(force_uncompressed_stack >= 0);
-}
-
 /**
  * Returns true if the instruction has a flag that means it won't
  * update an entire destination register.
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index 6c39368..82af5cd 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -69,7 +69,7 @@ namespace brw {
  *
  * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS IR.
  */
-class fs_visitor : public backend_visitor, public backend_emitter
+class fs_visitor : public backend_visitor, public fs_emitter
 {
 public:
 
@@ -109,16 +109,6 @@ public:
 
bool can_do_source_mods(fs_inst *inst);
 
-   fs_inst *emit(fs_inst *inst);
-   void emit(exec_list list);
-
-   fs_inst *emit(enum opcode opcode);
-   fs_inst *emit(enum opcode opcode, fs_reg dst);
-   fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0);
-   fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
-   fs_inst *emit(enum opcode opcode, fs_reg dst,
- fs_reg src0, fs_reg src1, fs_reg src2);
-
fs_inst *MOV(fs_reg dst, fs_reg src);
fs_inst *NOT(fs_reg dst, fs_reg src);
fs_inst *RNDD(fs_reg dst, fs_reg src);
@@ -207,9 +197,6 @@ public:
void no16(const char *msg, ...);
void lower_uniform_pull_constant_loads();
 
-   void push_force_uncompressed();
-   void pop_force_uncompressed();
-
void emit_dummy_fs();
fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
@@ -381,10 +368,6 @@ public:
 
int grf_used;
bool spilled_any_registers;
-
-   const unsigned dispatch_width; /**< 8 or 16 */
-
-   int force_uncompressed_stack;
 };
 
 /**
diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.h 
b/src/mesa/drivers/dri/i965/brw_fs_emit.h
index 1b1e584..d24e137 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_emit.h
+++ b/src/mesa/drivers/dri/i965/brw_fs_emit.h
@@ -31,6 +31,7 @@
 extern "C" {
 #include 
 #include "brw_shader.h"
+#include "brw_context.h"
 }
 
 #include "glsl/glsl_types.h"
@@ -217,4 +218,36 @@ public:
bool force_writemask_all:1;
 };
 
+class fs_emitter : public backend_emitter
+{
+protected:
+   fs_emitter(struct brw_context *brw, void *mem_ctx,
+  unsigned dispatch_width);
+
+public:
+   const unsigned dispatch_width; /**< 8 or 16 */
+
+   fs_inst *emit(enum opcode opcode);
+   fs_inst *emit(enum opcode opcode, fs_reg dst);
+   fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0);
+   fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
+   fs_inst *emit(enum opcode opcode, fs_reg dst,
+ fs_reg src0, fs_reg src1, fs_reg src2);
+
+   fs_inst *emit(fs_inst *inst);
+
+protected:
+   void emit(exec_list list);
+
+   void push_for

[Mesa-dev] [PATCH 03/14] i965: Merge max_grf between stage compilers

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_fs.h| 2 --
 src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 2 +-
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp  | 1 -
 src/mesa/drivers/dri/i965/brw_shader.cpp  | 3 ++-
 src/mesa/drivers/dri/i965/brw_shader.h| 3 +++
 src/mesa/drivers/dri/i965/brw_vec4.h  | 1 -
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp| 2 --
 7 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index 29ca84c..9581f41 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -530,8 +530,6 @@ public:
fs_reg dual_src_output;
bool do_dual_src;
int first_non_payload_grf;
-   /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
-   int max_grf;
 
fs_reg *fp_temp_regs;
fs_reg *fp_input_regs;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
index 717a94e..8f47ea5 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
@@ -63,7 +63,7 @@ fs_visitor::assign_regs_trivial()
   assign_reg(hw_reg_mapping, &inst->src[2], reg_width);
}
 
-   if (this->grf_used >= max_grf) {
+   if ((unsigned)this->grf_used >= max_grf) {
   fail("Ran out of regs on trivial allocator (%d/%d)\n",
   this->grf_used, max_grf);
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 0219c81..f0715bc 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -2983,7 +2983,6 @@ fs_visitor::fs_visitor(struct brw_context *brw,
this->source_depth_to_render_target = false;
this->runtime_check_aads_emit = false;
this->first_non_payload_grf = 0;
-   this->max_grf = brw->gen >= 7 ? GEN7_MRF_HACK_START : BRW_MAX_GRF;
 
this->current_annotation = NULL;
this->base_ir = NULL;
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp 
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 69c8576..6b9c0b7 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -551,7 +551,8 @@ backend_visitor::backend_visitor(struct gl_shader_program 
*shader_prog,
 backend_emitter::backend_emitter(struct brw_context *brw, void *mem_ctx)
: brw(brw),
  ctx(&brw->ctx),
- mem_ctx(mem_ctx)
+ mem_ctx(mem_ctx),
+ max_grf(brw->gen >= 7 ? GEN7_MRF_HACK_START : BRW_MAX_GRF)
 {
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h 
b/src/mesa/drivers/dri/i965/brw_shader.h
index c1343ae..e7f8911 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -118,6 +118,9 @@ public:
 */
exec_list instructions;
 
+   /** Either BRW_MAX_GRF or GEN7_MRF_HACK_START */
+   const unsigned max_grf;
+
virtual void dump_instruction(backend_instruction *inst) = 0;
virtual void dump_instructions();
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h 
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 2ec547c..33d3bba 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -335,7 +335,6 @@ public:
int virtual_grf_count;
int virtual_grf_array_size;
int first_non_payload_grf;
-   unsigned int max_grf;
int *virtual_grf_start;
int *virtual_grf_end;
dst_reg userplane[MAX_CLIP_PLANES];
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index c46593c..f995828 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -3397,8 +3397,6 @@ vec4_visitor::vec4_visitor(struct brw_context *brw,
this->virtual_grf_array_size = 0;
this->live_intervals_valid = false;
 
-   this->max_grf = brw->gen >= 7 ? GEN7_MRF_HACK_START : BRW_MAX_GRF;
-
this->uniforms = 0;
 
/* Initialize uniform_array_size to at least 1 because pre-gen6 VS requires
-- 
1.8.3.1

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[Mesa-dev] [PATCH 14/14] i965/fs: Move emission of ALUs into fs_emitter

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_fs.cpp | 99 
 src/mesa/drivers/dri/i965/brw_fs.h   | 31 -
 src/mesa/drivers/dri/i965/brw_fs_emit.h  | 32 +
 src/mesa/drivers/dri/i965/brw_fs_emitter.cpp | 98 +++
 4 files changed, 130 insertions(+), 130 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index f3d8dcf..5b30803 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -139,85 +139,6 @@ fs_inst::fs_inst(enum opcode opcode, fs_reg dst,
   assert(src[2].reg_offset >= 0);
 }
 
-#define ALU1(op)\
-   fs_inst *\
-   fs_visitor::op(fs_reg dst, fs_reg src0)  \
-   {\
-  return new(mem_ctx) fs_inst(BRW_OPCODE_##op, dst, src0);  \
-   }
-
-#define ALU2(op)\
-   fs_inst *\
-   fs_visitor::op(fs_reg dst, fs_reg src0, fs_reg src1) \
-   {\
-  return new(mem_ctx) fs_inst(BRW_OPCODE_##op, dst, src0, src1);\
-   }
-
-#define ALU2_ACC(op)\
-   fs_inst *\
-   fs_visitor::op(fs_reg dst, fs_reg src0, fs_reg src1) \
-   {\
-  fs_inst *inst = new(mem_ctx) fs_inst(BRW_OPCODE_##op, dst, src0, src1);\
-  inst->writes_accumulator = true;  \
-  return inst;  \
-   }
-
-#define ALU3(op)\
-   fs_inst *\
-   fs_visitor::op(fs_reg dst, fs_reg src0, fs_reg src1, fs_reg src2)\
-   {\
-  return new(mem_ctx) fs_inst(BRW_OPCODE_##op, dst, src0, src1, src2);\
-   }
-
-ALU1(NOT)
-ALU1(MOV)
-ALU1(FRC)
-ALU1(RNDD)
-ALU1(RNDE)
-ALU1(RNDZ)
-ALU2(ADD)
-ALU2(MUL)
-ALU2_ACC(MACH)
-ALU2(AND)
-ALU2(OR)
-ALU2(XOR)
-ALU2(SHL)
-ALU2(SHR)
-ALU2(ASR)
-ALU3(LRP)
-ALU1(BFREV)
-ALU3(BFE)
-ALU2(BFI1)
-ALU3(BFI2)
-ALU1(FBH)
-ALU1(FBL)
-ALU1(CBIT)
-ALU3(MAD)
-ALU2_ACC(ADDC)
-ALU2_ACC(SUBB)
-ALU2(SEL)
-ALU2(MAC)
-
-/** Gen4 predicated IF. */
-fs_inst *
-fs_visitor::IF(uint32_t predicate)
-{
-   fs_inst *inst = new(mem_ctx) fs_inst(BRW_OPCODE_IF);
-   inst->predicate = predicate;
-   return inst;
-}
-
-/** Gen6 IF with embedded comparison. */
-fs_inst *
-fs_visitor::IF(fs_reg src0, fs_reg src1, uint32_t condition)
-{
-   assert(brw->gen == 6);
-   fs_inst *inst = new(mem_ctx) fs_inst(BRW_OPCODE_IF,
-reg_null_d, src0, src1);
-   inst->conditional_mod = condition;
-   return inst;
-}
-
 /**
  * CMP: Sets the low bit of the destination channels with the result
  * of the comparison, while the upper bits are undefined, and updates
@@ -314,26 +235,6 @@ fs_visitor::VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
return instructions;
 }
 
-/**
- * A helper for MOV generation for fixing up broken hardware SEND dependency
- * handling.
- */
-fs_inst *
-fs_visitor::DEP_RESOLVE_MOV(int grf)
-{
-   fs_inst *inst = MOV(brw_null_reg(), fs_reg(GRF, grf, BRW_REGISTER_TYPE_F));
-
-   inst->ir = NULL;
-   inst->annotation = "send dependency resolve";
-
-   /* The caller always wants uncompressed to emit the minimal extra
-* dependencies, and to avoid having to deal with aligning its regs to 2.
-*/
-   inst->force_uncompressed = true;
-
-   return inst;
-}
-
 bool
 fs_inst::equals(fs_inst *inst) const
 {
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index 82af5cd..10a2b1c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -109,39 +109,8 @@ public:
 
bool can_do_source_mods(fs_inst *inst);
 
-   fs_inst *MOV(fs_reg dst, fs_reg src);
-   fs_inst *NOT(fs_reg dst, fs_reg src);
-   fs_inst *RNDD(fs_reg dst, fs_reg src);
-   fs_inst *RNDE(fs_reg dst, fs_reg src);
-   fs_inst *RNDZ(fs_reg dst, fs_reg src);
-   fs_inst *FRC(fs_reg dst, fs_reg src);
-   fs_inst *ADD(fs_reg dst, fs_reg src0, fs_reg src1);
-   fs_inst *MUL(fs_reg dst, fs_reg src0, fs_reg src1);
-   fs_inst *MACH(fs_reg dst, fs_reg src0, fs_reg src1);
-   fs_inst *MAC(fs_reg dst, fs_reg src0, fs_reg src1);
-   fs_inst *SHL(fs_reg dst, fs_reg src0, fs_reg src1);
-   fs_inst *SHR(fs_reg dst, fs_reg src0, fs_reg src1);
-   fs_inst *ASR(fs_reg dst, fs_reg src0, fs_reg src1);
-   fs_inst *AND

[Mesa-dev] [PATCH 10/14] i965: Merge common members of visitors

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen 
---
 src/mesa/drivers/dri/i965/brw_fs.h | 12 
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp   |  7 ---
 src/mesa/drivers/dri/i965/brw_shader.cpp   |  9 -
 src/mesa/drivers/dri/i965/brw_shader.h | 16 
 src/mesa/drivers/dri/i965/brw_vec4.h   | 12 
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp |  8 
 6 files changed, 24 insertions(+), 40 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index 7b3ffbd..36bb7bf 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -486,19 +486,13 @@ public:
struct gl_fragment_program *fp;
const struct brw_wm_prog_key *const key;
struct brw_wm_prog_data *prog_data;
-   unsigned int sanity_param_count;
 
int *param_size;
 
-   int *virtual_grf_start;
-   int *virtual_grf_end;
brw::fs_live_variables *live_intervals;
 
int *regs_live_at_ip;
 
-   /** Number of uniform variable components visited. */
-   unsigned uniforms;
-
/** Byte-offset for the next available spot in the scratch space buffer. */
unsigned last_scratch;
 
@@ -520,16 +514,10 @@ public:
unsigned output_components[BRW_MAX_DRAW_BUFFERS];
fs_reg dual_src_output;
bool do_dual_src;
-   int first_non_payload_grf;
 
fs_reg *fp_temp_regs;
fs_reg *fp_input_regs;
 
-   /** @{ debug annotation info */
-   const char *current_annotation;
-   const void *base_ir;
-   /** @} */
-
bool simd16_unsupported;
char *no16_msg;
 
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index b78a8d2..aa1249b 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -2978,17 +2978,10 @@ fs_visitor::fs_visitor(struct brw_context *brw,
memset(this->output_components, 0, sizeof(this->output_components));
this->source_depth_to_render_target = false;
this->runtime_check_aads_emit = false;
-   this->first_non_payload_grf = 0;
 
-   this->current_annotation = NULL;
-   this->base_ir = NULL;
-
-   this->virtual_grf_start = NULL;
-   this->virtual_grf_end = NULL;
this->live_intervals = NULL;
this->regs_live_at_ip = NULL;
 
-   this->uniforms = 0;
this->last_scratch = 0;
this->pull_constant_loc = NULL;
this->push_constant_loc = NULL;
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp 
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 777d4aa..f21261c 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -561,11 +561,18 @@ backend_emitter::backend_emitter(struct brw_context *brw, 
void *mem_ctx,
  failed(false),
  stage_name(stage_name),
  debug_flag(debug_flag),
+ uniforms(0),
+ sanity_param_count(0),
  virtual_grf_sizes(0),
  virtual_grf_count(0),
  virtual_grf_array_size(0),
+ virtual_grf_start(NULL),
+ virtual_grf_end(NULL),
  virtual_grf_reg_count(0),
- virtual_grf_reg_map(NULL)
+ virtual_grf_reg_map(NULL),
+ base_ir(NULL),
+ current_annotation(NULL),
+ first_non_payload_grf(0)
 {
 }
 
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h 
b/src/mesa/drivers/dri/i965/brw_shader.h
index 9ae5873..a27f10c 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -139,9 +139,16 @@ public:
const char * const stage_name;
const bool debug_flag;
 
+   /** Number of uniform variable components visited. */
+   unsigned uniforms;
+
+   unsigned int sanity_param_count;
+
int *virtual_grf_sizes;
int virtual_grf_count;
int virtual_grf_array_size;
+   int *virtual_grf_start;
+   int *virtual_grf_end;
 
/**
 * This is the size to be used for an array with an element per
@@ -151,6 +158,15 @@ public:
/** Per-virtual-grf indices into an array of size virtual_grf_reg_count */
int *virtual_grf_reg_map;
 
+   /**
+* GLSL IR currently being processed, which is associated with our
+* driver IR instructions for debugging purposes.
+*/
+   const void *base_ir;
+   const char *current_annotation;
+
+   int first_non_payload_grf;
+
virtual void dump_instruction(backend_instruction *inst) = 0;
virtual void dump_instructions();
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h 
b/src/mesa/drivers/dri/i965/brw_vec4.h
index dbf445f..6fe25fc 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -318,18 +318,7 @@ public:
struct brw_vec4_compile * const c;
const struct brw_vec4_prog_key * const key;
struct brw_vec4_prog_data * const prog_data;
-   unsigned int sanity_param_count;
 
-   /**
-* GLSL IR currently being processed, which is associated with our
-* driver IR instructions for debugging purposes.
-*/
-   const void *base_ir;
-   const char *current_annotation;
-
-   int first_non_payload_grf;
-

Re: [Mesa-dev] [PATCH 06/11] loader: Use drirc device_id parameter in complement to DRI_PRIME

[Emil Velikov]

On 28/05/14 01:55, Axel Davy wrote:
> Signed-off-by: Axel Davy 
Hi Axel

Can you give the scons build a try. I suspect that this patch will leave it in
somewhat broken state.

> ---
>  src/Makefile.am |  4 +++-
>  src/loader/Makefile.am  | 21 ---
>  src/loader/loader.c | 27 
> +
>  src/mesa/drivers/dri/common/xmlconfig.h |  2 ++
>  src/mesa/drivers/dri/common/xmlpool/t_options.h | 14 +
>  5 files changed, 64 insertions(+), 4 deletions(-)
> 
> diff --git a/src/Makefile.am b/src/Makefile.am
> index 9d1580f..d4a7090 100644
> --- a/src/Makefile.am
> +++ b/src/Makefile.am
> @@ -19,12 +19,14 @@
>  # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
> DEALINGS
>  # IN THE SOFTWARE.
>  
> -SUBDIRS = gtest loader mapi
> +SUBDIRS = gtest mapi
>  
>  if NEED_OPENGL_COMMON
>  SUBDIRS += glsl mesa
>  endif
>  
> +SUBDIRS += loader
> +
>  if HAVE_DRI_GLX
>  SUBDIRS += glx
>  endif
> diff --git a/src/loader/Makefile.am b/src/loader/Makefile.am
> index bddf7ac..3503a51 100644
> --- a/src/loader/Makefile.am
> +++ b/src/loader/Makefile.am
> @@ -29,6 +29,23 @@ libloader_la_CPPFLAGS = \
>   $(VISIBILITY_CFLAGS) \
>   $(LIBUDEV_CFLAGS)
>  
> +libloader_la_SOURCES = $(LOADER_C_FILES)
> +libloader_la_LIBADD = $()
> +
Please drop the "$()"

> +if NEED_OPENGL_COMMON
> +libloader_la_CPPFLAGS += \
> + -I$(top_srcdir)/src/mesa/drivers/dri/common/ \
Out of tree builds will fail without
-I$(top_builddir)/src/mesa/drivers/dri/common/ \

and possibly similar treatment for the other two

> + -I$(top_srcdir)/src/mesa/ \
> + -I$(top_srcdir)/src/mapi/ \
> + -DUSE_DRICONF
> +
> +libloader_la_SOURCES += \
> + $(top_srcdir)/src/mesa/drivers/dri/common/xmlconfig.c
> +
> +libloader_la_LIBADD += \
> + -lexpat
EXPAT_LIBS might be better.

> +endif
> +
>  if !HAVE_LIBDRM
>  libloader_la_CPPFLAGS += \
>   -D__NOT_HAVE_DRM_H
> @@ -36,8 +53,6 @@ else
>  libloader_la_CPPFLAGS += \
>   $(LIBDRM_CFLAGS)
>  
> -libloader_la_LIBADD = \
> +libloader_la_LIBADD += \
>   $(LIBDRM_LIBS)
>  endif
> -
> -libloader_la_SOURCES = $(LOADER_C_FILES)
> diff --git a/src/loader/loader.c b/src/loader/loader.c
> index 3d504f7..e9a8c46 100644
> --- a/src/loader/loader.c
> +++ b/src/loader/loader.c
> @@ -74,6 +74,10 @@
>  #include 
>  #include 
>  #include 
> +#ifdef USE_DRICONF
> +#include "xmlconfig.h"
> +#include "xmlpool.h"
> +#endif
>  #endif
>  #include "loader.h"
>  
> @@ -310,9 +314,22 @@ drm_open_device(const char *device_name)
> return fd;
>  }
>  
> +#ifdef USE_DRICONF
> +const char __driConfigOptionsLoader[] =
> +DRI_CONF_BEGIN
> +DRI_CONF_SECTION_INITIALIZATION
> +DRI_CONF_DEVICE_ID_PATH_TAG()
> +DRI_CONF_SECTION_END
> +DRI_CONF_END;
> +#endif
> +
>  int loader_get_user_preferred_fd(int default_fd, int *different_device)
>  {
> struct udev *udev;
> +#ifdef USE_DRICONF
> +   driOptionCache defaultInitOptions;
> +   driOptionCache userInitOptions;
> +#endif
> const char *dri_prime = getenv("DRI_PRIME");
> char *prime = NULL;
> int is_different_device = 0, fd = default_fd;
> @@ -324,6 +341,16 @@ int loader_get_user_preferred_fd(int default_fd, int 
> *different_device)
>  
> if (dri_prime)
>prime = strdup(dri_prime);
> +#ifdef USE_DRICONF
> +   else {
> +  driParseOptionInfo(&defaultInitOptions, __driConfigOptionsLoader);
> +  driParseConfigFiles(&userInitOptions, &defaultInitOptions, 0, 
> "loader");
> +  if (driCheckOption(&userInitOptions, "device_id", DRI_STRING))
> + prime = strdup(driQueryOptionstr(&userInitOptions, "device_id"));
> +  driDestroyOptionCache(&userInitOptions);
> +  driDestroyOptionInfo(&defaultInitOptions);
> +   }
> +#endif
>  
> if (prime == NULL) {
>*different_device = 0;
> diff --git a/src/mesa/drivers/dri/common/xmlconfig.h 
> b/src/mesa/drivers/dri/common/xmlconfig.h
> index 786caae..a4daa6b 100644
> --- a/src/mesa/drivers/dri/common/xmlconfig.h
> +++ b/src/mesa/drivers/dri/common/xmlconfig.h
> @@ -30,6 +30,8 @@
>  #ifndef __XMLCONFIG_H
>  #define __XMLCONFIG_H
>  
> +#include 
> +
^^ This is rather ugly, although the GL* types used throughout kind of mandate
it :\

Thanks
Emil


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[Mesa-dev] [Bug 79263] Linking error in egl_gallium.la when compiling 32 bit on multiarch

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=79263

--- Comment #2 from Emil Velikov  ---
Handling of the egl_platform is slightly move convoluted than expected.

platform_drm - things will build nicely as the loader* symbols are provided via
gbm/libgbm. Everything else - the symbols are missing.

Might be better off re-adding the libloader + multiple-declarations for now.

-- 
You are receiving this mail because:
You are the assignee for the bug.
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Re: [Mesa-dev] [PATCH 04/11] Loader: Add gpu selection code with DRI_PRIME.

[Axel Davy]

On 28/05/2014 08:33, Emil Velikov wrote :

Hi Axel,

AFAICS we're leaking device_name.

That's true, I'll send a patch with the fix.


FYI I'm about to push a few patches for non libudev users which may cause
merge conflicts when applying this series.

Thanks for the information.


Cheers
Emil


Axel
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Re: [Mesa-dev] [PATCH 06/11] loader: Use drirc device_id parameter in complement to DRI_PRIME

[Axel Davy]

On 28/05/2014 08:40, Emil Velikov wrote :

On 28/05/14 01:55, Axel Davy wrote:

Signed-off-by: Axel Davy 

Hi Axel

Can you give the scons build a try. I suspect that this patch will leave it in
somewhat broken state.

I'll give a try.



---
  src/Makefile.am |  4 +++-
  src/loader/Makefile.am  | 21 ---
  src/loader/loader.c | 27 +
  src/mesa/drivers/dri/common/xmlconfig.h |  2 ++
  src/mesa/drivers/dri/common/xmlpool/t_options.h | 14 +
  5 files changed, 64 insertions(+), 4 deletions(-)

diff --git a/src/Makefile.am b/src/Makefile.am
index 9d1580f..d4a7090 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -19,12 +19,14 @@
  # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  # IN THE SOFTWARE.
  
-SUBDIRS = gtest loader mapi

+SUBDIRS = gtest mapi
  
  if NEED_OPENGL_COMMON

  SUBDIRS += glsl mesa
  endif
  
+SUBDIRS += loader

+
  if HAVE_DRI_GLX
  SUBDIRS += glx
  endif
diff --git a/src/loader/Makefile.am b/src/loader/Makefile.am
index bddf7ac..3503a51 100644
--- a/src/loader/Makefile.am
+++ b/src/loader/Makefile.am
@@ -29,6 +29,23 @@ libloader_la_CPPFLAGS = \
$(VISIBILITY_CFLAGS) \
$(LIBUDEV_CFLAGS)
  
+libloader_la_SOURCES = $(LOADER_C_FILES)

+libloader_la_LIBADD = $()
+

Please drop the "$()"

What could I use instead to enable to use '+=' after ?



+if NEED_OPENGL_COMMON
+libloader_la_CPPFLAGS += \
+   -I$(top_srcdir)/src/mesa/drivers/dri/common/ \

Out of tree builds will fail without
-I$(top_builddir)/src/mesa/drivers/dri/common/ \

Yes it should be that. It's what is done for dri-swrast.


and possibly similar treatment for the other two

+   -I$(top_srcdir)/src/mesa/ \
+   -I$(top_srcdir)/src/mapi/ \
+   -DUSE_DRICONF
+
+libloader_la_SOURCES += \
+   $(top_srcdir)/src/mesa/drivers/dri/common/xmlconfig.c
+
+libloader_la_LIBADD += \
+   -lexpat

EXPAT_LIBS might be better.


+#include 
+

^^ This is rather ugly, although the GL* types used throughout kind of mandate
it :\
Yes, this would need a series of cleanups to remove all GL* types used 
in Mesa when not neccessary.


Thanks,

Axel Davy
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Re: [Mesa-dev] [PATCH 17/21] glsl: Make ir_variable::num_state_slots and ir_variable::state_slots private

[Tapani]

On 05/28/2014 05:49 AM, Ian Romanick wrote:

From: Ian Romanick 

Also move num_state_slots inside ir_variable_data for better packing.

The payoff for this will come in a few more patches.

Signed-off-by: Ian Romanick 


looks good to me, also I've rebased my cache code on top of these 
particular changes and internal api introduced for state slots works fine;


Reviewed-by: Tapani Pälli 


---
  src/glsl/builtin_variables.cpp |  5 +--
  src/glsl/ir.h  | 56 ++
  src/glsl/ir_clone.cpp  | 13 ++
  src/glsl/ir_memory_usage.cpp   |  5 ++-
  src/glsl/linker.cpp|  7 ++--
  src/mesa/drivers/dri/i965/brw_fs.cpp   |  6 +--
  src/mesa/drivers/dri/i965/brw_shader.cpp   |  6 +--
  src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp |  6 +--
  src/mesa/program/ir_to_mesa.cpp| 14 +++
  src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 14 +++
  10 files changed, 75 insertions(+), 57 deletions(-)

diff --git a/src/glsl/builtin_variables.cpp b/src/glsl/builtin_variables.cpp
index 1461953..5878fbf 100644
--- a/src/glsl/builtin_variables.cpp
+++ b/src/glsl/builtin_variables.cpp
@@ -489,12 +489,9 @@ builtin_variable_generator::add_uniform(const glsl_type 
*type,
&_mesa_builtin_uniform_desc[i];
  
 const unsigned array_count = type->is_array() ? type->length : 1;

-   uni->num_state_slots = array_count * statevar->num_elements;
  
 ir_state_slot *slots =

-  ralloc_array(uni, ir_state_slot, uni->num_state_slots);
-
-   uni->state_slots = slots;
+  uni->allocate_state_slots(array_count * statevar->num_elements);
  
 for (unsigned a = 0; a < array_count; a++) {

for (unsigned j = 0; j < statevar->num_elements; j++) {
diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index bfd790e..ab9f27b 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -538,6 +538,32 @@ public:
return this->max_ifc_array_access;
 }
  
+   inline unsigned get_num_state_slots() const

+   {
+  return this->data._num_state_slots;
+   }
+
+   inline void set_num_state_slots(unsigned n)
+   {
+  this->data._num_state_slots = n;
+   }
+
+   inline ir_state_slot *get_state_slots()
+   {
+  return this->state_slots;
+   }
+
+   inline ir_state_slot *allocate_state_slots(unsigned n)
+   {
+  this->state_slots = ralloc_array(this, ir_state_slot, n);
+  this->data._num_state_slots = 0;
+
+  if (this->state_slots != NULL)
+ this->data._num_state_slots = n;
+
+  return this->state_slots;
+   }
+
 /**
  * Enable emitting extension warnings for this variable
  */
@@ -723,6 +749,10 @@ public:
/** Image internal format if specified explicitly, otherwise GL_NONE. */
uint16_t image_format;
  
+   private:

+  unsigned _num_state_slots;/**< Number of state slots used */
+
+   public:
/**
 * Storage location of the base of this variable
 *
@@ -771,22 +801,6 @@ public:
 } data;
  
 /**

-* Built-in state that backs this uniform
-*
-* Once set at variable creation, \c state_slots must remain invariant.
-* This is because, ideally, this array would be shared by all clones of
-* this variable in the IR tree.  In other words, we'd really like for it
-* to be a fly-weight.
-*
-* If the variable is not a uniform, \c num_state_slots will be zero and
-* \c state_slots will be \c NULL.
-*/
-   /*@{*/
-   unsigned num_state_slots;/**< Number of state slots used */
-   ir_state_slot *state_slots;  /**< State descriptors. */
-   /*@}*/
-
-   /**
  * Value assigned in the initializer of a variable declared "const"
  */
 ir_constant *constant_value;
@@ -818,6 +832,16 @@ private:
 unsigned *max_ifc_array_access;
  
 /**

+* Built-in state that backs this uniform
+*
+* Once set at variable creation, \c state_slots must remain invariant.
+*
+* If the variable is not a uniform, \c _num_state_slots will be zero and
+* \c state_slots will be \c NULL.
+*/
+   ir_state_slot *state_slots;
+
+   /**
  * For variables that are in an interface block or are an instance of an
  * interface block, this is the \c GLSL_TYPE_INTERFACE type for that block.
  *
diff --git a/src/glsl/ir_clone.cpp b/src/glsl/ir_clone.cpp
index d594529..0cd35f0 100644
--- a/src/glsl/ir_clone.cpp
+++ b/src/glsl/ir_clone.cpp
@@ -53,15 +53,10 @@ ir_variable::clone(void *mem_ctx, struct hash_table *ht) 
const
  
 memcpy(&var->data, &this->data, sizeof(var->data));
  
-   var->num_state_slots = this->num_state_slots;

-   if (this->state_slots) {
-  /* FINISHME: This really wants to use something like talloc_reference, 
but
-   * FINISHME: ralloc doesn't have any similar function.
-   */
-  var->state_slots = ralloc_array(var, ir_state_slot,
- this->num_state_slots);
-

Re: [Mesa-dev] [PATCH 1/2] glsl: fix use-after free bug/crash in ast_declarator_list::hir()

[Brian Paul]

Ping.


On 05/23/2014 03:22 PM, Brian Paul wrote:

The call to get_variable_being_redeclared() may delete 'var' so we
can't reference var->name afterward.  We fix that by examining the
var's name before making that call.

Fixes valgrind warnings and possible crash when running the piglit
tests/spec/glsl-1.30/execution/clipping/vs-clip-distance-in-param.shader_test
test (and probably others).

Cc: "10.1 10.2" 
---
  src/glsl/ast_to_hir.cpp |6 +-
  1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 0128b3f..e06f9b4 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -3651,11 +3651,15 @@ ast_declarator_list::hir(exec_list *instructions,
 * instruction stream.
 */
exec_list initializer_instructions;
+
+  /* Examine var name here since var may get deleted in the next call */
+  bool var_is_gl_id = (strncmp(var->name, "gl_", 3) == 0);
+
ir_variable *earlier =
   get_variable_being_redeclared(var, decl->get_location(), state,
 false /* allow_all_redeclarations */);
if (earlier != NULL) {
- if (strncmp(var->name, "gl_", 3) == 0 &&
+ if (var_is_gl_id &&
   earlier->data.how_declared == ir_var_declared_in_block) {
  _mesa_glsl_error(&loc, state,
   "`%s' has already been redeclared using "



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Re: [Mesa-dev] [PATCH 09/19] i965/fs: Add SHADER_OPCODE_LOAD_PAYLOAD.

[Pohjolainen, Topi]

On Tue, May 27, 2014 at 06:47:40PM -0700, Matt Turner wrote:
> Will be used to simplify the handling of large virtual GRFs in SSA form.
> ---
>  src/mesa/drivers/dri/i965/brw_defines.h|  2 ++
>  src/mesa/drivers/dri/i965/brw_fs.cpp   | 10 ++
>  src/mesa/drivers/dri/i965/brw_fs.h |  2 ++
>  src/mesa/drivers/dri/i965/brw_fs_generator.cpp |  3 +++
>  src/mesa/drivers/dri/i965/brw_shader.cpp   |  3 +++
>  5 files changed, 20 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
> b/src/mesa/drivers/dri/i965/brw_defines.h
> index c38e447..34467e9 100644
> --- a/src/mesa/drivers/dri/i965/brw_defines.h
> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> @@ -797,6 +797,8 @@ enum opcode {
> SHADER_OPCODE_TG4,
> SHADER_OPCODE_TG4_OFFSET,
>  
> +   SHADER_OPCODE_LOAD_PAYLOAD,
> +
> SHADER_OPCODE_SHADER_TIME_ADD,
>  
> SHADER_OPCODE_UNTYPED_ATOMIC,
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index c86cb42..0856b6b 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -241,6 +241,16 @@ fs_visitor::CMP(fs_reg dst, fs_reg src0, fs_reg src1, 
> uint32_t condition)
> return inst;
>  }
>  
> +fs_inst *
> +fs_visitor::LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources)
> +{
> +   fs_inst *inst = new(mem_ctx) fs_inst(SHADER_OPCODE_LOAD_PAYLOAD, dst, src,
> +sources);
> +   inst->regs_written = sources;
> +
> +   return inst;
> +}
> +
>  exec_list
>  fs_visitor::VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
> const fs_reg &surf_index,
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
> b/src/mesa/drivers/dri/i965/brw_fs.h
> index 527c3f3..d0e459c 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> @@ -338,6 +338,8 @@ public:
>  fs_inst *end,
>  const fs_reg ®);
>  
> +   fs_inst *LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources);
> +
> exec_list VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
>  const fs_reg &surf_index,
>  const fs_reg &varying_offset,
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> index a5be0ec..26b963b 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> @@ -1713,6 +1713,9 @@ fs_generator::generate_code(exec_list *instructions,
>   generate_discard_jump(inst);
>   break;
>  
> +  case SHADER_OPCODE_LOAD_PAYLOAD:
> + break;
> +

Did I misunderstand but wasn't the idea to always lower this in the visitor
before generator? If that is the case then shouldn't this be dropped and let
the default case to issue an error?

>case SHADER_OPCODE_SHADER_TIME_ADD:
>   generate_shader_time_add(inst, src[0], src[1], src[2]);
>   break;
> diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp 
> b/src/mesa/drivers/dri/i965/brw_shader.cpp
> index 254afef..b35862c 100644
> --- a/src/mesa/drivers/dri/i965/brw_shader.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
> @@ -452,6 +452,9 @@ brw_instruction_name(enum opcode op)
> case SHADER_OPCODE_TG4_OFFSET:
>return "tg4_offset";
>  
> +   case SHADER_OPCODE_LOAD_PAYLOAD:
> +  return "load_payload";
> +
> case SHADER_OPCODE_GEN4_SCRATCH_READ:
>return "gen4_scratch_read";
> case SHADER_OPCODE_GEN4_SCRATCH_WRITE:
> -- 
> 1.8.3.2
> 
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[Mesa-dev] [PATCH 1/2] egl_dri2: fix wayland_platform when drm_platform is not set

[Emil Velikov]

The build fails with implicit delaration of drmGetCap (xf86drm.h)
Were we're including the header only when building the DRM_PLATFORM.

Wayland backend can operate without DRM_PLATFORM so replace the
guard, and fold in drmGetCap() usage to silence compiler warnings.

Cc: Chad Versace 
Cc: Kristian Høgsberg 
Signed-off-by: Emil Velikov 
---
 src/egl/drivers/dri2/egl_dri2.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index f7f2da2..c1497b8 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -35,7 +35,7 @@
 #include 
 #include 
 #include 
-#ifdef HAVE_DRM_PLATFORM
+#ifdef HAVE_LIBDRM
 #include 
 #include 
 #endif
@@ -2001,7 +2001,7 @@ dri2_bind_wayland_display_wl(_EGLDriver *drv, _EGLDisplay 
*disp,
 struct wl_display *wl_dpy)
 {
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
-   int ret, flags = 0;
+   int flags = 0;
uint64_t cap;
 
(void) drv;
@@ -2012,11 +2012,13 @@ dri2_bind_wayland_display_wl(_EGLDriver *drv, 
_EGLDisplay *disp,
wl_drm_callbacks.authenticate =
   (int(*)(void *, uint32_t)) dri2_dpy->vtbl->authenticate;
 
-   ret = drmGetCap(dri2_dpy->fd, DRM_CAP_PRIME, &cap);
-   if (ret == 0 && cap == (DRM_PRIME_CAP_IMPORT | DRM_PRIME_CAP_EXPORT) &&
+#ifdef HAVE_LIBDRM
+   if (drmGetCap(dri2_dpy->fd, DRM_CAP_PRIME, &cap) == 0 &&
+   cap == (DRM_PRIME_CAP_IMPORT | DRM_PRIME_CAP_EXPORT) &&
dri2_dpy->image->base.version >= 7 &&
dri2_dpy->image->createImageFromFds != NULL)
   flags |= WAYLAND_DRM_PRIME;
+#endif
 
dri2_dpy->wl_server_drm =
   wayland_drm_init(wl_dpy, dri2_dpy->device_name,
-- 
1.9.3

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[Mesa-dev] [PATCH 2/2] egl-static: resolve library linking

[Emil Velikov]

With DRM_PLATFORM libloader.la in linked into libEGL pleading
to multiple defition of the loader* symbols. For every other
platform we need to explicitly link against it.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79263
Cc: José Fonseca 
Cc: Chia-I Wu 
Signed-off-by: Emil Velikov 
---
 src/gallium/targets/egl-static/Makefile.am | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/gallium/targets/egl-static/Makefile.am 
b/src/gallium/targets/egl-static/Makefile.am
index f4990ad..224ed95 100644
--- a/src/gallium/targets/egl-static/Makefile.am
+++ b/src/gallium/targets/egl-static/Makefile.am
@@ -66,7 +66,6 @@ egl_gallium_la_SOURCES = \
egl_st.c
 
 egl_gallium_la_LIBADD = \
-   $(top_builddir)/src/loader/libloader.la \
$(top_builddir)/src/gallium/auxiliary/libgallium.la \
$(top_builddir)/src/gallium/drivers/identity/libidentity.la \
$(top_builddir)/src/gallium/drivers/trace/libtrace.la \
@@ -100,6 +99,9 @@ AM_CPPFLAGS += $(LIBDRM_CFLAGS)
 egl_gallium_la_LIBADD += \
$(top_builddir)/src/gbm/libgbm.la \
$(LIBDRM_LIBS)
+else
+egl_gallium_la_LIBADD += \
+   $(top_builddir)/src/loader/libloader.la
 endif
 
 if HAVE_EGL_PLATFORM_FBDEV
-- 
1.9.3

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Re: [Mesa-dev] [PATCH 10/19] i965/fs: Lower LOAD_PAYLOAD and clean up.

[Pohjolainen, Topi]

On Tue, May 27, 2014 at 06:47:41PM -0700, Matt Turner wrote:
> Clean up with with register_coalesce()/dead_code_eliminate().
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp | 42 
> 
>  src/mesa/drivers/dri/i965/brw_fs.h   |  1 +
>  2 files changed, 43 insertions(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 0856b6b..c0af6d0 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -2574,6 +2574,43 @@ fs_visitor::lower_uniform_pull_constant_loads()
> }
>  }
>  
> +bool
> +fs_visitor::lower_load_payload()
> +{
> +   bool progress = false;
> +
> +   foreach_list_safe(node, &instructions) {
> +  fs_inst *inst = (fs_inst *)node;
> +
> +  if (inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD) {

Nit-picking here, you could reduce indentation by:

 if (inst->opcode != SHADER_OPCODE_LOAD_PAYLOAD)
continue;
  

> + fs_reg dst = inst->dst;
> +
> + /* The generator creates the message header if present, which is in
> +  * the first register of the message payload.
> +  */
> + if (!inst->header_present) {
> +inst->insert_before(MOV(dst, inst->src[0]));
> + } else {
> +assert(inst->src[0].file == BAD_FILE);
> + }
> + dst.reg_offset++;
> +
> + for (int i = 1; i < inst->sources; i++) {

Tapani already asked about using signed counter and comparing it with
uint8_t. As long as compiler does not complain, I don't really mind.

I leave it to you and

Reviewed-by: Topi Pohjolainen 

> +inst->insert_before(MOV(dst, inst->src[i]));
> +dst.reg_offset++;
> + }
> +
> + inst->remove();
> + progress = true;
> +  }
> +   }
> +
> +   if (progress)
> +  invalidate_live_intervals();
> +
> +   return progress;
> +}
> +
>  void
>  fs_visitor::dump_instructions()
>  {
> @@ -3071,6 +3108,11 @@ fs_visitor::run()
>   progress = OPT(compute_to_mrf) || progress;
>} while (progress);
>  
> +  if (lower_load_payload()) {
> + register_coalesce();
> + dead_code_eliminate();
> +  }
> +
>lower_uniform_pull_constant_loads();
>  
>assign_curb_setup();
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
> b/src/mesa/drivers/dri/i965/brw_fs.h
> index d0e459c..2b60945 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> @@ -391,6 +391,7 @@ public:
> void fail(const char *msg, ...);
> void no16(const char *msg, ...);
> void lower_uniform_pull_constant_loads();
> +   bool lower_load_payload();
>  
> void push_force_uncompressed();
> void pop_force_uncompressed();
> -- 
> 1.8.3.2
> 
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Re: [Mesa-dev] [PATCH 06/11] loader: Use drirc device_id parameter in complement to DRI_PRIME

[Emil Velikov]

On 28/05/14 14:24, Axel Davy wrote:
> On 28/05/2014 08:40, Emil Velikov wrote :
>> On 28/05/14 01:55, Axel Davy wrote:
>>> Signed-off-by: Axel Davy 
>> Hi Axel
>>
>> Can you give the scons build a try. I suspect that this patch will leave it 
>> in
>> somewhat broken state.
> I'll give a try.
>>
>>> ---
>>>   src/Makefile.am |  4 +++-
>>>   src/loader/Makefile.am  | 21 ---
>>>   src/loader/loader.c | 27
>>> +
>>>   src/mesa/drivers/dri/common/xmlconfig.h |  2 ++
>>>   src/mesa/drivers/dri/common/xmlpool/t_options.h | 14 +
>>>   5 files changed, 64 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/src/Makefile.am b/src/Makefile.am
>>> index 9d1580f..d4a7090 100644
>>> --- a/src/Makefile.am
>>> +++ b/src/Makefile.am
>>> @@ -19,12 +19,14 @@
>>>   # FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
>>> DEALINGS
>>>   # IN THE SOFTWARE.
>>>   -SUBDIRS = gtest loader mapi
>>> +SUBDIRS = gtest mapi
>>> if NEED_OPENGL_COMMON
>>>   SUBDIRS += glsl mesa
>>>   endif
>>>   +SUBDIRS += loader
>>> +
>>>   if HAVE_DRI_GLX
>>>   SUBDIRS += glx
>>>   endif
>>> diff --git a/src/loader/Makefile.am b/src/loader/Makefile.am
>>> index bddf7ac..3503a51 100644
>>> --- a/src/loader/Makefile.am
>>> +++ b/src/loader/Makefile.am
>>> @@ -29,6 +29,23 @@ libloader_la_CPPFLAGS = \
>>>   $(VISIBILITY_CFLAGS) \
>>>   $(LIBUDEV_CFLAGS)
>>>   +libloader_la_SOURCES = $(LOADER_C_FILES)
>>> +libloader_la_LIBADD = $()
>>> +
>> Please drop the "$()"
> What could I use instead to enable to use '+=' after ?
libloader_la_LIBADD =

Pretty much all of mesa uses this approach.

>>
>>> +if NEED_OPENGL_COMMON
>>> +libloader_la_CPPFLAGS += \
>>> +-I$(top_srcdir)/src/mesa/drivers/dri/common/ \
>> Out of tree builds will fail without
>> -I$(top_builddir)/src/mesa/drivers/dri/common/ \
> Yes it should be that. It's what is done for dri-swrast.
Indeed. xmlpool.h pulls in xmlpool/options.h which is generated at buildtime
from xmlpool/t_options.h

-Emil

>>
>> and possibly similar treatment for the other two
>>> +-I$(top_srcdir)/src/mesa/ \
>>> +-I$(top_srcdir)/src/mapi/ \
>>> +-DUSE_DRICONF
>>> +
>>> +libloader_la_SOURCES += \
>>> +$(top_srcdir)/src/mesa/drivers/dri/common/xmlconfig.c
>>> +
>>> +libloader_la_LIBADD += \
>>> +-lexpat
>> EXPAT_LIBS might be better.
>>
>>> +#include 
>>> +
>> ^^ This is rather ugly, although the GL* types used throughout kind of 
>> mandate
>> it :\
> Yes, this would need a series of cleanups to remove all GL* types used in Mesa
> when not neccessary.
> 
> Thanks,
> 
> Axel Davy

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Re: [Mesa-dev] [PATCH 09/19] i965/fs: Add SHADER_OPCODE_LOAD_PAYLOAD.

[Matt Turner]

On Wed, May 28, 2014 at 7:43 AM, Pohjolainen, Topi
 wrote:
> On Tue, May 27, 2014 at 06:47:40PM -0700, Matt Turner wrote:
>> Will be used to simplify the handling of large virtual GRFs in SSA form.
>> ---
>>  src/mesa/drivers/dri/i965/brw_defines.h|  2 ++
>>  src/mesa/drivers/dri/i965/brw_fs.cpp   | 10 ++
>>  src/mesa/drivers/dri/i965/brw_fs.h |  2 ++
>>  src/mesa/drivers/dri/i965/brw_fs_generator.cpp |  3 +++
>>  src/mesa/drivers/dri/i965/brw_shader.cpp   |  3 +++
>>  5 files changed, 20 insertions(+)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
>> b/src/mesa/drivers/dri/i965/brw_defines.h
>> index c38e447..34467e9 100644
>> --- a/src/mesa/drivers/dri/i965/brw_defines.h
>> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
>> @@ -797,6 +797,8 @@ enum opcode {
>> SHADER_OPCODE_TG4,
>> SHADER_OPCODE_TG4_OFFSET,
>>
>> +   SHADER_OPCODE_LOAD_PAYLOAD,
>> +
>> SHADER_OPCODE_SHADER_TIME_ADD,
>>
>> SHADER_OPCODE_UNTYPED_ATOMIC,
>> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
>> b/src/mesa/drivers/dri/i965/brw_fs.cpp
>> index c86cb42..0856b6b 100644
>> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
>> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
>> @@ -241,6 +241,16 @@ fs_visitor::CMP(fs_reg dst, fs_reg src0, fs_reg src1, 
>> uint32_t condition)
>> return inst;
>>  }
>>
>> +fs_inst *
>> +fs_visitor::LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources)
>> +{
>> +   fs_inst *inst = new(mem_ctx) fs_inst(SHADER_OPCODE_LOAD_PAYLOAD, dst, 
>> src,
>> +sources);
>> +   inst->regs_written = sources;
>> +
>> +   return inst;
>> +}
>> +
>>  exec_list
>>  fs_visitor::VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
>> const fs_reg &surf_index,
>> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
>> b/src/mesa/drivers/dri/i965/brw_fs.h
>> index 527c3f3..d0e459c 100644
>> --- a/src/mesa/drivers/dri/i965/brw_fs.h
>> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
>> @@ -338,6 +338,8 @@ public:
>>  fs_inst *end,
>>  const fs_reg ®);
>>
>> +   fs_inst *LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources);
>> +
>> exec_list VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
>>  const fs_reg &surf_index,
>>  const fs_reg &varying_offset,
>> diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp 
>> b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
>> index a5be0ec..26b963b 100644
>> --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
>> +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
>> @@ -1713,6 +1713,9 @@ fs_generator::generate_code(exec_list *instructions,
>>   generate_discard_jump(inst);
>>   break;
>>
>> +  case SHADER_OPCODE_LOAD_PAYLOAD:
>> + break;
>> +
>
> Did I misunderstand but wasn't the idea to always lower this in the visitor
> before generator? If that is the case then shouldn't this be dropped and let
> the default case to issue an error?

I'll add an assert here confirming that it's never hit. Using the
default case would yield an "Unsupported opcode" error message.
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Re: [Mesa-dev] [PATCH 1/2] glsl: reduce size of glsl_type::base_type

[Ian Romanick]

Types are fly-weights, so there aren't that many of them allocated...
maybe a couple hundred, tops.  Have you measured the memory savings?

On 05/27/2014 10:09 PM, Tapani Pälli wrote:
> Signed-off-by: Tapani Pälli 
> ---
>  src/glsl/glsl_types.h | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/src/glsl/glsl_types.h b/src/glsl/glsl_types.h
> index dca5492..e6aae26a 100644
> --- a/src/glsl/glsl_types.h
> +++ b/src/glsl/glsl_types.h
> @@ -29,6 +29,7 @@
>  #include 
>  #include 
>  #include "main/mtypes.h" /* for gl_texture_index, C++'s enum rules are 
> broken */
> +#include "main/compiler.h"
>  
>  #ifdef __cplusplus
>  extern "C" {
> @@ -47,7 +48,7 @@ _mesa_glsl_release_types(void);
>  }
>  #endif
>  
> -enum glsl_base_type {
> +enum PACKED glsl_base_type {
> GLSL_TYPE_UINT = 0,
> GLSL_TYPE_INT,
> GLSL_TYPE_FLOAT,
> 

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Re: [Mesa-dev] [PATCH] targets/opencl: Fix (static) linking with LLVM

[Kai Wasserbäch]

[Just a short note, as I can't test Mesa any longer, since I have a new Radeon,
which is "no business case" for the FLOSS driver.]

terminfo rings a bell, IIRC there was a Mesa bug about this some while back; for
myself at least I just added the terminfo stuff to my Mesa build (again IIRC,
that problem came up a while back for me).

Cheers,
Kai



-- 

Kai Wasserbäch (Kai Wasserbaech)

E-Mail: k...@dev.carbon-project.org



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Re: [Mesa-dev] [PATCH 2/2] glsl: reduce size of swizzle field in ir_state_slot

[Ian Romanick]

This won't actually do anything because the compiler still rounds the
size of the structure upto a multiple of sizeof(int) for alignment
purposes.  With your v2 patch applied, I still get

(gdb) print sizeof(ir_state_slot)
$1 = 24

which is 6*sizeof(int).

On 05/27/2014 10:09 PM, Tapani Pälli wrote:
> Signed-off-by: Tapani Pälli 
> ---
>  src/glsl/ir.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/glsl/ir.h b/src/glsl/ir.h
> index ef4a12d..bc19208 100644
> --- a/src/glsl/ir.h
> +++ b/src/glsl/ir.h
> @@ -357,7 +357,7 @@ depth_layout_string(ir_depth_layout layout);
>   */
>  struct ir_state_slot {
> int tokens[5];
> -   int swizzle;
> +   uint8_t swizzle;
>  };
>  
>  
> 

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Re: [Mesa-dev] [PATCH 2/2] glsl: replace strncmp("gl_") calls with new is_gl_identifier() helper

[Ian Romanick]

Reviewed-by: Ian Romanick 

On 05/23/2014 02:22 PM, Brian Paul wrote:
> Makes things a little easier to read.
> ---
>  src/glsl/ast_to_hir.cpp   |8 
>  src/glsl/ir.h |9 +
>  src/glsl/ir_print_visitor.cpp |2 +-
>  src/glsl/link_uniforms.cpp|4 ++--
>  src/glsl/link_varyings.cpp|3 +--
>  5 files changed, 17 insertions(+), 9 deletions(-)
> 
> diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
> index e06f9b4..f230a70 100644
> --- a/src/glsl/ast_to_hir.cpp
> +++ b/src/glsl/ast_to_hir.cpp
> @@ -3078,7 +3078,7 @@ validate_identifier(const char *identifier, YYLTYPE loc,
>  *   OpenGL, and may not be declared in a shader as either a
>  *   variable or a function."
>  */
> -   if (strncmp(identifier, "gl_", 3) == 0) {
> +   if (is_gl_identifier(identifier)) {
>_mesa_glsl_error(&loc, state,
> "identifier `%s' uses reserved `gl_' prefix",
> identifier);
> @@ -3653,7 +3653,7 @@ ast_declarator_list::hir(exec_list *instructions,
>exec_list initializer_instructions;
>  
>/* Examine var name here since var may get deleted in the next call */
> -  bool var_is_gl_id = (strncmp(var->name, "gl_", 3) == 0);
> +  bool var_is_gl_id = is_gl_identifier(var->name);
>  
>ir_variable *earlier =
>   get_variable_being_redeclared(var, decl->get_location(), state,
> @@ -5403,7 +5403,7 @@ ast_interface_block::hir(exec_list *instructions,
>  ir_variable *earlier =
> get_variable_being_redeclared(var, loc, state,
>   true /* 
> allow_all_redeclarations */);
> -if (strncmp(var->name, "gl_", 3) != 0 || earlier == NULL) {
> +if (!is_gl_identifier(var->name) || earlier == NULL) {
> _mesa_glsl_error(&loc, state,
>  "redeclaration of gl_PerVertex can only "
>  "include built-in variables");
> @@ -5638,7 +5638,7 @@ detect_conflicting_assignments(struct 
> _mesa_glsl_parse_state *state,
>   gl_FragColor_assigned = true;
>else if (strcmp(var->name, "gl_FragData") == 0)
>   gl_FragData_assigned = true;
> -  else if (strncmp(var->name, "gl_", 3) != 0) {
> +  else if (!is_gl_identifier(var->name)) {
>   if (state->stage == MESA_SHADER_FRAGMENT &&
>   var->data.mode == ir_var_shader_out) {
>  user_defined_fs_output_assigned = true;
> diff --git a/src/glsl/ir.h b/src/glsl/ir.h
> index ef4a12d..8060982 100644
> --- a/src/glsl/ir.h
> +++ b/src/glsl/ir.h
> @@ -2342,6 +2342,15 @@ prototype_string(const glsl_type *return_type, const 
> char *name,
>  const char *
>  mode_string(const ir_variable *var);
>  
> +/**
> + * Built-in / reserved GL variables names start with "gl_"
> + */
> +static inline bool
> +is_gl_identifier(const char *s)
> +{
> +   return s && s[0] == 'g' && s[1] == 'l' && s[2] == '_';
> +}
> +
>  extern "C" {
>  #endif /* __cplusplus */
>  
> diff --git a/src/glsl/ir_print_visitor.cpp b/src/glsl/ir_print_visitor.cpp
> index 0a7695a..418f051 100644
> --- a/src/glsl/ir_print_visitor.cpp
> +++ b/src/glsl/ir_print_visitor.cpp
> @@ -146,7 +146,7 @@ print_type(FILE *f, const glsl_type *t)
>print_type(f, t->fields.array);
>fprintf(f, " %u)", t->length);
> } else if ((t->base_type == GLSL_TYPE_STRUCT)
> -   && (strncmp("gl_", t->name, 3) != 0)) {
> +  && !is_gl_identifier(t->name)) {
>fprintf(f, "%s@%p", t->name, (void *) t);
> } else {
>fprintf(f, "%s", t->name);
> diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp
> index c7147e0..ba66053 100644
> --- a/src/glsl/link_uniforms.cpp
> +++ b/src/glsl/link_uniforms.cpp
> @@ -848,7 +848,7 @@ link_assign_uniform_locations(struct gl_shader_program 
> *prog)
>  
>/* FINISHME: Update code to process built-in uniforms!
> */
> -  if (strncmp("gl_", var->name, 3) == 0) {
> +  if (is_gl_identifier(var->name)) {
>   uniform_size.num_shader_uniform_components +=
>  var->type->component_slots();
>   continue;
> @@ -900,7 +900,7 @@ link_assign_uniform_locations(struct gl_shader_program 
> *prog)
>  
>/* FINISHME: Update code to process built-in uniforms!
> */
> -  if (strncmp("gl_", var->name, 3) == 0)
> +  if (is_gl_identifier(var->name))
>   continue;
>  
>parcel.set_and_process(prog, var);
> diff --git a/src/glsl/link_varyings.cpp b/src/glsl/link_varyings.cpp
> index 71998df..6863298 100644
> --- a/src/glsl/link_varyings.cpp
> +++ b/src/glsl/link_varyings.cpp
> @@ -77,8 +77,7 @@ cross_validate_types_and_qualifiers(struct 
> gl_shader_program *prog,
> * correspondence between the vertex language and the
> * fragment language."
> */
> -  if (!output->type->is_array()
> -  || (strncmp("gl_"

Re: [Mesa-dev] [PATCH 1/2] glsl: fix use-after free bug/crash in ast_declarator_list::hir()

[Ian Romanick]

On 05/23/2014 02:22 PM, Brian Paul wrote:
> The call to get_variable_being_redeclared() may delete 'var' so we
> can't reference var->name afterward.  We fix that by examining the
> var's name before making that call.
> 
> Fixes valgrind warnings and possible crash when running the piglit
> tests/spec/glsl-1.30/execution/clipping/vs-clip-distance-in-param.shader_test
> test (and probably others).
> 
> Cc: "10.1 10.2" 
> ---
>  src/glsl/ast_to_hir.cpp |6 +-
>  1 file changed, 5 insertions(+), 1 deletion(-)
> 
> diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
> index 0128b3f..e06f9b4 100644
> --- a/src/glsl/ast_to_hir.cpp
> +++ b/src/glsl/ast_to_hir.cpp
> @@ -3651,11 +3651,15 @@ ast_declarator_list::hir(exec_list *instructions,
> * instruction stream.
> */
>exec_list initializer_instructions;
> +
> +  /* Examine var name here since var may get deleted in the next call */
> +  bool var_is_gl_id = (strncmp(var->name, "gl_", 3) == 0);
> +
>ir_variable *earlier =
>   get_variable_being_redeclared(var, decl->get_location(), state,
> false /* allow_all_redeclarations */);
>if (earlier != NULL) {
> - if (strncmp(var->name, "gl_", 3) == 0 &&
> + if (var_is_gl_id &&

I think this could also be

 if (strncmp(earlier->name, "gl_", 3) == 0 &&

since var and earlier are supposed to be the same variable.  Either way,

Reviewed-by: Ian Romanick 

>   earlier->data.how_declared == ir_var_declared_in_block) {
>  _mesa_glsl_error(&loc, state,
>   "`%s' has already been redeclared using "
> 

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Re: [Mesa-dev] [PATCH 2/2] wglinfo: use common code from glinfo_common.c

[Jose Fonseca]

This is a nice cleanup.

You can use 

  ${CMAKE_SOURCE_DIR}/src/xdemos/glinfo_common.c

instead.  

Jose

- Original Message -
> I'm not a cmake expert so I'm not sure my changes to CMakeLists.txt are
> ideal.  Doing ../somewhere always feels like a hack.
> 
> -Brian
> 
> 
> On 05/22/2014 08:53 PM, Brian Paul wrote:
> > ---
> >   src/wgl/CMakeLists.txt |3 +-
> >   src/wgl/wglinfo.c  |  532
> >   ++--
> >   2 files changed, 18 insertions(+), 517 deletions(-)
> >
> > diff --git a/src/wgl/CMakeLists.txt b/src/wgl/CMakeLists.txt
> > index a32a664..d45cbf3 100644
> > --- a/src/wgl/CMakeLists.txt
> > +++ b/src/wgl/CMakeLists.txt
> > @@ -1,6 +1,7 @@
> >   include_directories (
> > ${OPENGL_INCLUDE_PATH}
> > ${GLEW_INCLUDE_DIR}
> > +   ../xdemos
> >   )
> >
> >   link_libraries (
> > @@ -12,7 +13,7 @@ add_executable (wglthreads wglthreads.c)
> >   add_executable (wgl_sharedtex_mt sharedtex_mt.c)
> >   set_target_properties (wgl_sharedtex_mt PROPERTIES OUTPUT_NAME
> >   sharedtex_mt)
> >
> > -add_executable (wglinfo wglinfo.c)
> > +add_executable (wglinfo wglinfo.c ../xdemos/glinfo_common.c)
> >   add_executable (wglcontext wglcontext.c)
> >   add_executable (wincopy WIN32 wincopy.c wglutil.c)
> >
> > diff --git a/src/wgl/wglinfo.c b/src/wgl/wglinfo.c
> > index b54c3b6..2b2c921 100644
> > --- a/src/wgl/wglinfo.c
> > +++ b/src/wgl/wglinfo.c
> > @@ -39,6 +39,7 @@
> >   #include 
> >   #include 
> >   #include 
> > +#include "glinfo_common.h"
> >
> >
> >   typedef enum
> > @@ -49,520 +50,6 @@ typedef enum
> >   } InfoMode;
> >
> >
> > -/**
> > - * Return the GL enum name for a numeric value.
> > - * We really only care about the compressed texture formats for now.
> > - */
> > -static const char *
> > -enum_name(GLenum val)
> > -{
> > -   static const struct {
> > -  const char *name;
> > -  GLenum val;
> > -   } enums [] = {
> > -  { "GL_COMPRESSED_ALPHA", 0x84E9 },
> > -  { "GL_COMPRESSED_LUMINANCE", 0x84EA },
> > -  { "GL_COMPRESSED_LUMINANCE_ALPHA", 0x84EB },
> > -  { "GL_COMPRESSED_INTENSITY", 0x84EC },
> > -  { "GL_COMPRESSED_RGB", 0x84ED },
> > -  { "GL_COMPRESSED_RGBA", 0x84EE },
> > -  { "GL_COMPRESSED_TEXTURE_FORMATS", 0x86A3 },
> > -  { "GL_COMPRESSED_RGB", 0x84ED },
> > -  { "GL_COMPRESSED_RGBA", 0x84EE },
> > -  { "GL_COMPRESSED_TEXTURE_FORMATS", 0x86A3 },
> > -  { "GL_COMPRESSED_ALPHA", 0x84E9 },
> > -  { "GL_COMPRESSED_LUMINANCE", 0x84EA },
> > -  { "GL_COMPRESSED_LUMINANCE_ALPHA", 0x84EB },
> > -  { "GL_COMPRESSED_INTENSITY", 0x84EC },
> > -  { "GL_COMPRESSED_SRGB", 0x8C48 },
> > -  { "GL_COMPRESSED_SRGB_ALPHA", 0x8C49 },
> > -  { "GL_COMPRESSED_SLUMINANCE", 0x8C4A },
> > -  { "GL_COMPRESSED_SLUMINANCE_ALPHA", 0x8C4B },
> > -  { "GL_COMPRESSED_RED", 0x8225 },
> > -  { "GL_COMPRESSED_RG", 0x8226 },
> > -  { "GL_COMPRESSED_RED_RGTC1", 0x8DBB },
> > -  { "GL_COMPRESSED_SIGNED_RED_RGTC1", 0x8DBC },
> > -  { "GL_COMPRESSED_RG_RGTC2", 0x8DBD },
> > -  { "GL_COMPRESSED_SIGNED_RG_RGTC2", 0x8DBE },
> > -  { "GL_COMPRESSED_RGB8_ETC2", 0x9274 },
> > -  { "GL_COMPRESSED_SRGB8_ETC2", 0x9275 },
> > -  { "GL_COMPRESSED_RGB8_PUNCHTHROUGH_ALPHA1_ETC2", 0x9276 },
> > -  { "GL_COMPRESSED_SRGB8_PUNCHTHROUGH_ALPHA1_ETC2", 0x9277 },
> > -  { "GL_COMPRESSED_RGBA8_ETC2_EAC", 0x9278 },
> > -  { "GL_COMPRESSED_SRGB8_ALPHA8_ETC2_EAC", 0x9279 },
> > -  { "GL_COMPRESSED_R11_EAC", 0x9270 },
> > -  { "GL_COMPRESSED_SIGNED_R11_EAC", 0x9271 },
> > -  { "GL_COMPRESSED_RG11_EAC", 0x9272 },
> > -  { "GL_COMPRESSED_SIGNED_RG11_EAC", 0x9273 },
> > -  { "GL_COMPRESSED_ALPHA_ARB", 0x84E9 },
> > -  { "GL_COMPRESSED_LUMINANCE_ARB", 0x84EA },
> > -  { "GL_COMPRESSED_LUMINANCE_ALPHA_ARB", 0x84EB },
> > -  { "GL_COMPRESSED_INTENSITY_ARB", 0x84EC },
> > -  { "GL_COMPRESSED_RGB_ARB", 0x84ED },
> > -  { "GL_COMPRESSED_RGBA_ARB", 0x84EE },
> > -  { "GL_COMPRESSED_TEXTURE_FORMATS_ARB", 0x86A3 },
> > -  { "GL_COMPRESSED_RGBA_BPTC_UNORM_ARB", 0x8E8C },
> > -  { "GL_COMPRESSED_SRGB_ALPHA_BPTC_UNORM_ARB", 0x8E8D },
> > -  { "GL_COMPRESSED_RGB_BPTC_SIGNED_FLOAT_ARB", 0x8E8E },
> > -  { "GL_COMPRESSED_RGB_BPTC_UNSIGNED_FLOAT_ARB", 0x8E8F },
> > -  { "GL_COMPRESSED_RGBA_ASTC_4x4_KHR", 0x93B0 },
> > -  { "GL_COMPRESSED_RGBA_ASTC_5x4_KHR", 0x93B1 },
> > -  { "GL_COMPRESSED_RGBA_ASTC_5x5_KHR", 0x93B2 },
> > -  { "GL_COMPRESSED_RGBA_ASTC_6x5_KHR", 0x93B3 },
> > -  { "GL_COMPRESSED_RGBA_ASTC_6x6_KHR", 0x93B4 },
> > -  { "GL_COMPRESSED_RGBA_ASTC_8x5_KHR", 0x93B5 },
> > -  { "GL_COMPRESSED_RGBA_ASTC_8x6_KHR", 0x93B6 },
> > -  { "GL_COMPRESSED_RGBA_ASTC_8x8_KHR", 0x93B7 },
> > -  { "GL_COMPRESSED_RGBA_ASTC_10x5_KHR", 0x93B8 },
> > -  { "GL_COMPRESSED_RGBA_ASTC_10x6_KHR", 0x93B9 },
> > -  { "GL_COMPRESSED_RGBA_ASTC_10x8_KHR", 0x93BA },
> > -  { "GL_COMPRESSED_RGBA_AST

Re: [Mesa-dev] [PATCH 05/14] i965: Merge variable hashtables of fs and vec4 visitors

[Matt Turner]

On Wed, May 28, 2014 at 5:36 AM, Topi Pohjolainen
 wrote:
> Now empty destructors are dropped allowing compiler to generate the
> defaults (calling base class).
>
> Signed-off-by: Topi Pohjolainen 
> ---
>  src/mesa/drivers/dri/i965/brw_fs.h | 2 --
>  src/mesa/drivers/dri/i965/brw_fs_visitor.cpp   | 8 
>  src/mesa/drivers/dri/i965/brw_shader.cpp   | 5 -
>  src/mesa/drivers/dri/i965/brw_shader.h | 2 ++
>  src/mesa/drivers/dri/i965/brw_vec4.h   | 3 ---
>  src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 9 -
>  6 files changed, 6 insertions(+), 23 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
> b/src/mesa/drivers/dri/i965/brw_fs.h
> index 9581f41..184725c 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> @@ -250,7 +250,6 @@ public:
>struct gl_shader_program *shader_prog,
>struct gl_fragment_program *fp,
>unsigned dispatch_width);
> -   ~fs_visitor();
>
> fs_reg *variable_storage(ir_variable *var);
> int virtual_grf_alloc(int size);
> @@ -522,7 +521,6 @@ public:
>  */
> int *push_constant_loc;
>
> -   struct hash_table *variable_ht;
> fs_reg frag_depth;
> fs_reg sample_mask;
> fs_reg outputs[BRW_MAX_DRAW_BUFFERS];
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> index f0715bc..d4e02d2 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> @@ -2973,9 +2973,6 @@ fs_visitor::fs_visitor(struct brw_context *brw,
> this->failed = false;
> this->simd16_unsupported = false;
> this->no16_msg = NULL;
> -   this->variable_ht = hash_table_ctor(0,
> -   hash_table_pointer_hash,
> -   hash_table_pointer_compare);
>
> memset(&this->payload, 0, sizeof(this->payload));
> memset(this->outputs, 0, sizeof(this->outputs));
> @@ -3008,8 +3005,3 @@ fs_visitor::fs_visitor(struct brw_context *brw,
> if (dispatch_width == 8)
>this->param_size = rzalloc_array(mem_ctx, int, 
> stage_prog_data->nr_params);
>  }
> -
> -fs_visitor::~fs_visitor()
> -{
> -   hash_table_dtor(this->variable_ht);
> -}

Doesn't backend_visitor need to have a destructor that calls hash_table_dtor?
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Re: [Mesa-dev] [PATCH 05/14] i965: Merge variable hashtables of fs and vec4 visitors

[Matt Turner]

On Wed, May 28, 2014 at 10:43 AM, Matt Turner  wrote:
> Doesn't backend_visitor need to have a destructor that calls hash_table_dtor?

Ah, next patch.
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[Mesa-dev] [Bug 79382] New: build error: multiple definition of `loader_get_pci_id_for_fd'

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=79382

  Priority: high
Bug ID: 79382
CC: jfons...@vmware.com
  Assignee: mesa-dev@lists.freedesktop.org
   Summary: build error: multiple definition of
`loader_get_pci_id_for_fd'
  Severity: critical
Classification: Unclassified
OS: Linux (All)
  Reporter: fabio@libero.it
  Hardware: All
Status: NEW
   Version: git
 Component: Mesa core
   Product: Mesa

Latest commit breaks build. Full log here:
https://launchpadlibrarian.net/176502806/buildlog_ubuntu-trusty-i386.mesa_10.3~git1405281930.9ec7cb~gd~t_FAILEDTOBUILD.txt.gz

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Re: [Mesa-dev] [PATCH 12/14] i965/fs: Split declarations of fs_reg and fs_inst out of brw_fs.h

[Matt Turner]

On Wed, May 28, 2014 at 5:36 AM, Topi Pohjolainen
 wrote:
> + * Authors:
> + *Eric Anholt 

I think Eric said he wanted to stop using Author lists. Probably use
this opportunity to drop it.
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Re: [Mesa-dev] [PATCH 13/14] i965/fs: Split LIR emission ouf of ir-visitor

[Matt Turner]

On Wed, May 28, 2014 at 5:36 AM, Topi Pohjolainen
 wrote:
> Signed-off-by: Topi Pohjolainen 
> ---
>  src/mesa/drivers/dri/i965/Makefile.sources   |   1 +
>  src/mesa/drivers/dri/i965/brw_fs.cpp |  44 ---
>  src/mesa/drivers/dri/i965/brw_fs.h   |  19 +
>  src/mesa/drivers/dri/i965/brw_fs_emit.h  |  33 
>  src/mesa/drivers/dri/i965/brw_fs_emitter.cpp | 108 
> +++
>  src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |  31 +---
>  6 files changed, 145 insertions(+), 91 deletions(-)
>  create mode 100644 src/mesa/drivers/dri/i965/brw_fs_emitter.cpp
>
> diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
> b/src/mesa/drivers/dri/i965/Makefile.sources
> index 2570059..d43fc8e 100644
> --- a/src/mesa/drivers/dri/i965/Makefile.sources
> +++ b/src/mesa/drivers/dri/i965/Makefile.sources
> @@ -69,6 +69,7 @@ i965_FILES = \
> brw_fs_sel_peephole.cpp \
> brw_fs_vector_splitting.cpp \
> brw_fs_visitor.cpp \
> +   brw_fs_emitter.cpp \

Alphabetize.

> brw_gs.c \
> brw_gs_emit.c \
> brw_gs_state.c \
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index c971480..f3d8dcf 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -661,50 +661,6 @@ fs_visitor::no16(const char *format, ...)
> va_end(va);
>  }
>
> -fs_inst *
> -fs_visitor::emit(enum opcode opcode)
> -{
> -   return emit(new(mem_ctx) fs_inst(opcode));
> -}
> -
> -fs_inst *
> -fs_visitor::emit(enum opcode opcode, fs_reg dst)
> -{
> -   return emit(new(mem_ctx) fs_inst(opcode, dst));
> -}
> -
> -fs_inst *
> -fs_visitor::emit(enum opcode opcode, fs_reg dst, fs_reg src0)
> -{
> -   return emit(new(mem_ctx) fs_inst(opcode, dst, src0));
> -}
> -
> -fs_inst *
> -fs_visitor::emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1)
> -{
> -   return emit(new(mem_ctx) fs_inst(opcode, dst, src0, src1));
> -}
> -
> -fs_inst *
> -fs_visitor::emit(enum opcode opcode, fs_reg dst,
> - fs_reg src0, fs_reg src1, fs_reg src2)
> -{
> -   return emit(new(mem_ctx) fs_inst(opcode, dst, src0, src1, src2));
> -}
> -
> -void
> -fs_visitor::push_force_uncompressed()
> -{
> -   force_uncompressed_stack++;
> -}
> -
> -void
> -fs_visitor::pop_force_uncompressed()
> -{
> -   force_uncompressed_stack--;
> -   assert(force_uncompressed_stack >= 0);
> -}
> -
>  /**
>   * Returns true if the instruction has a flag that means it won't
>   * update an entire destination register.
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
> b/src/mesa/drivers/dri/i965/brw_fs.h
> index 6c39368..82af5cd 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> @@ -69,7 +69,7 @@ namespace brw {
>   *
>   * Translates either GLSL IR or Mesa IR (for ARB_fragment_program) into FS 
> IR.
>   */
> -class fs_visitor : public backend_visitor, public backend_emitter
> +class fs_visitor : public backend_visitor, public fs_emitter
>  {
>  public:
>
> @@ -109,16 +109,6 @@ public:
>
> bool can_do_source_mods(fs_inst *inst);
>
> -   fs_inst *emit(fs_inst *inst);
> -   void emit(exec_list list);
> -
> -   fs_inst *emit(enum opcode opcode);
> -   fs_inst *emit(enum opcode opcode, fs_reg dst);
> -   fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0);
> -   fs_inst *emit(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
> -   fs_inst *emit(enum opcode opcode, fs_reg dst,
> - fs_reg src0, fs_reg src1, fs_reg src2);
> -
> fs_inst *MOV(fs_reg dst, fs_reg src);
> fs_inst *NOT(fs_reg dst, fs_reg src);
> fs_inst *RNDD(fs_reg dst, fs_reg src);
> @@ -207,9 +197,6 @@ public:
> void no16(const char *msg, ...);
> void lower_uniform_pull_constant_loads();
>
> -   void push_force_uncompressed();
> -   void pop_force_uncompressed();
> -
> void emit_dummy_fs();
> fs_reg *emit_fragcoord_interpolation(ir_variable *ir);
> fs_inst *emit_linterp(const fs_reg &attr, const fs_reg &interp,
> @@ -381,10 +368,6 @@ public:
>
> int grf_used;
> bool spilled_any_registers;
> -
> -   const unsigned dispatch_width; /**< 8 or 16 */
> -
> -   int force_uncompressed_stack;
>  };
>
>  /**
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.h 
> b/src/mesa/drivers/dri/i965/brw_fs_emit.h
> index 1b1e584..d24e137 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_emit.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs_emit.h
> @@ -31,6 +31,7 @@
>  extern "C" {
>  #include 
>  #include "brw_shader.h"
> +#include "brw_context.h"
>  }
>
>  #include "glsl/glsl_types.h"
> @@ -217,4 +218,36 @@ public:
> bool force_writemask_all:1;
>  };
>
> +class fs_emitter : public backend_emitter
> +{
> +protected:
> +   fs_emitter(struct brw_context *brw, void *mem_ctx,
> +  unsigned dispatch_width);
> +
> +public:
> +   const unsigned dispatch_width; /**< 8 or 16 */
> +
> +   fs_inst *emit(enum opcode opcode);
> +   fs_inst *emit(en

Re: [Mesa-dev] [PATCH] i965: Fix repeated usage of rectangle texture coordinate scaling.

[Ian Romanick]

On 05/27/2014 06:16 PM, Kenneth Graunke wrote:
> Previously, we set up new entries in the params[] array on every access
> of a rectangle texture.  Unfortunately, we only reserve space for
> (2 * MaxTextureImageUnits) extra entries, so programs which accessed
> rectangle textures more times than that would write off the end of the
> array and likely crash.
> 
> We don't really have a decent mapping between the index returned by
> _mesa_add_state_reference and our index into the params array, so we
> have to manually search for it.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78691
> Signed-off-by: Kenneth Graunke 
> Cc: mesa-sta...@lists.freedesktop.org

Assuming no piglit regressions,

Reviewed-by: Ian Romanick 

> ---
>  src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 27 ---
>  1 file changed, 20 insertions(+), 7 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> index 171f063..be6b8ac 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> @@ -1486,15 +1486,28 @@ fs_visitor::rescale_texcoord(ir_texture *ir, fs_reg 
> coordinate,
>return coordinate;
>}
>  
> -  scale_x = fs_reg(UNIFORM, uniforms);
> -  scale_y = fs_reg(UNIFORM, uniforms + 1);
> -
>GLuint index = _mesa_add_state_reference(params,
>  (gl_state_index *)tokens);
> -  stage_prog_data->param[uniforms++] =
> - &prog->Parameters->ParameterValues[index][0].f;
> -  stage_prog_data->param[uniforms++] =
> - &prog->Parameters->ParameterValues[index][1].f;
> +  /* Try to find existing copies of the texrect scale uniforms. */
> +  for (unsigned i = 0; i < uniforms; i++) {
> + if (stage_prog_data->param[i] ==
> + &prog->Parameters->ParameterValues[index][0].f) {
> +scale_x = fs_reg(UNIFORM, i);
> +scale_y = fs_reg(UNIFORM, i + 1);
> +break;
> + }
> +  }
> +
> +  /* If we didn't already set them up, do so now. */
> +  if (scale_x.file == BAD_FILE) {
> + scale_x = fs_reg(UNIFORM, uniforms);
> + scale_y = fs_reg(UNIFORM, uniforms + 1);
> +
> + stage_prog_data->param[uniforms++] =
> +&prog->Parameters->ParameterValues[index][0].f;
> + stage_prog_data->param[uniforms++] =
> +&prog->Parameters->ParameterValues[index][1].f;
> +  }
> }
>  
> /* The 965 requires the EU to do the normalization of GL rectangle
> 

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[Mesa-dev] [PATCH 14/16] mesa: Change program parser instruction storage.

[Eric Anholt]

This is in preparation for making prog_instruction be a list element --
I'm going to want to allocate the final instruction at this point, and
this gets a bunch of pointer type changes out of the way for that big
commit.
---
 src/mesa/program/prog_parameter_layout.c | 16 
 src/mesa/program/program_parse.y | 63 +++-
 src/mesa/program/program_parser.h|  2 +-
 3 files changed, 46 insertions(+), 35 deletions(-)

diff --git a/src/mesa/program/prog_parameter_layout.c 
b/src/mesa/program/prog_parameter_layout.c
index e834690..e6ec559 100644
--- a/src/mesa/program/prog_parameter_layout.c
+++ b/src/mesa/program/prog_parameter_layout.c
@@ -150,8 +150,8 @@ _mesa_layout_parameters(struct asm_parser_state *state)
 * array.  Now that the base of the parameter array is known, the
 * index can be updated to its actual value.
 */
-   inst->Base.SrcReg[i] = inst->SrcReg[i].Base;
-   inst->Base.SrcReg[i].Index +=
+   inst->Base->SrcReg[i] = inst->SrcReg[i].Base;
+   inst->Base->SrcReg[i].Index +=
   inst->SrcReg[i].Symbol->param_binding_begin;
 }
   }
@@ -178,7 +178,7 @@ _mesa_layout_parameters(struct asm_parser_state *state)
continue;
 }
 
-inst->Base.SrcReg[i] = inst->SrcReg[i].Base;
+inst->Base->SrcReg[i] = inst->SrcReg[i].Base;
 p = & state->prog->Parameters->Parameters[idx];
 
 switch (p->Type) {
@@ -186,16 +186,16 @@ _mesa_layout_parameters(struct asm_parser_state *state)
const gl_constant_value *const v =
   state->prog->Parameters->ParameterValues[idx];
 
-   inst->Base.SrcReg[i].Index =
+   inst->Base->SrcReg[i].Index =
   _mesa_add_unnamed_constant(layout, v, p->Size, & swizzle);
 
-   inst->Base.SrcReg[i].Swizzle = 
-  _mesa_combine_swizzles(swizzle, inst->Base.SrcReg[i].Swizzle);
+   inst->Base->SrcReg[i].Swizzle =
+  _mesa_combine_swizzles(swizzle, inst->Base->SrcReg[i].Swizzle);
break;
 }
 
 case PROGRAM_STATE_VAR:
-   inst->Base.SrcReg[i].Index =
+   inst->Base->SrcReg[i].Index =
   _mesa_add_state_reference(layout, p->StateIndexes);
break;
 
@@ -204,7 +204,7 @@ _mesa_layout_parameters(struct asm_parser_state *state)
 }
 
 inst->SrcReg[i].Base.File = p->Type;
-inst->Base.SrcReg[i].File = p->Type;
+inst->Base->SrcReg[i].File = p->Type;
   }
}
 
diff --git a/src/mesa/program/program_parse.y b/src/mesa/program/program_parse.y
index 1664740..f6ec7e5 100644
--- a/src/mesa/program/program_parse.y
+++ b/src/mesa/program/program_parse.y
@@ -429,18 +429,18 @@ SAMPLE_instruction: SAMPLE_OP maskedDstReg ',' 
swizzleSrcReg ',' texImageUnit ',
  GLbitfield target_mask = 0;
 
 
- $$->Base.TexSrcUnit = $6;
+ $$->Base->TexSrcUnit = $6;
 
  if ($8 < 0) {
 shadow_tex = tex_mask;
 
-$$->Base.TexSrcTarget = -$8;
-$$->Base.TexShadow = 1;
+$$->Base->TexSrcTarget = -$8;
+$$->Base->TexShadow = 1;
  } else {
-$$->Base.TexSrcTarget = $8;
+$$->Base->TexSrcTarget = $8;
  }
 
- target_mask = (1U << $$->Base.TexSrcTarget);
+ target_mask = (1U << $$->Base->TexSrcTarget);
 
  /* If this texture unit was previously accessed and that access
   * had a different texture target, generate an error.
@@ -472,8 +472,8 @@ KIL_instruction: KIL swizzleSrcReg
| KIL ccTest
{
   $$ = asm_instruction_ctor(OPCODE_KIL_NV, NULL, NULL, NULL, NULL);
-  $$->Base.DstReg.CondMask = $2.CondMask;
-  $$->Base.DstReg.CondSwizzle = $2.CondSwizzle;
+  $$->Base->DstReg.CondMask = $2.CondMask;
+  $$->Base->DstReg.CondSwizzle = $2.CondSwizzle;
   state->fragment.UsesKill = 1;
}
;
@@ -487,18 +487,18 @@ TXD_instruction: TXD_OP maskedDstReg ',' swizzleSrcReg 
',' swizzleSrcReg ',' swi
  GLbitfield target_mask = 0;
 
 
- $$->Base.TexSrcUnit = $10;
+ $$->Base->TexSrcUnit = $10;
 
  if ($12 < 0) {
 shadow_tex = tex_mask;
 
-$$->Base.TexSrcTarget = -$12;
-$$->Base.TexShadow = 1;
+$$->Base->TexSrcTarget = -$12;
+$$->Base->TexShadow = 1;
  } else {
-$$->Base.TexSrcTarget = $12;
+$$->Base->TexSrcTarget = $12;
  }
 
- target_mask = (1U << $$->Base.TexSrcTarget);
+ target_mask = (1U << $$->Base->TexSrcTarget);
 
  /* If this texture unit was previously accessed and that access
   * had a different texture target, generate an error.
@@ -2241,30 +2241,30 @@ asm_ins

[Mesa-dev] [PATCH 05/16] mesa: Fix debug printing of live ranges for dead values.

[Eric Anholt]

We'd loop for approximately forever trying to get to (GLuint)-1.
---
 src/mesa/program/prog_optimize.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/program/prog_optimize.c b/src/mesa/program/prog_optimize.c
index 1ab54ec..e877497 100644
--- a/src/mesa/program/prog_optimize.c
+++ b/src/mesa/program/prog_optimize.c
@@ -1088,7 +1088,7 @@ find_live_intervals(struct gl_program *prog,
  const struct interval *inv = liveIntervals->Intervals + i;
  fprintf(stderr, "Reg[%d] live [%d, %d]:",
   inv->Reg, inv->Start, inv->End);
- if (1) {
+ if (inv->Start != -1) {
 GLuint j;
 for (j = 0; j < inv->Start; j++)
fprintf(stderr, " ");
-- 
2.0.0.rc2

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[Mesa-dev] [PATCH 10/16] mesa: Remove REG_ALLOCATE_MAX_PROGRAM_TEMPS from global dead code.

[Eric Anholt]

---
 src/mesa/program/prog_optimize.c | 23 +--
 1 file changed, 13 insertions(+), 10 deletions(-)

diff --git a/src/mesa/program/prog_optimize.c b/src/mesa/program/prog_optimize.c
index ce53937..f0d279b 100644
--- a/src/mesa/program/prog_optimize.c
+++ b/src/mesa/program/prog_optimize.c
@@ -248,11 +248,13 @@ replace_regs(struct gl_program *prog, gl_register_file 
file, const GLint map[])
 static GLboolean
 _mesa_remove_dead_code_global(struct gl_program *prog)
 {
-   GLboolean tempRead[REG_ALLOCATE_MAX_PROGRAM_TEMPS][4];
+   bool *tempRead;
GLboolean *removeInst; /* per-instruction removal flag */
GLuint i, rem = 0, comp;
 
-   memset(tempRead, 0, sizeof(tempRead));
+   tempRead = calloc(prog->NumTemporaries, 4 * sizeof(bool));
+   if (!tempRead)
+  return false;
 
if (dbg) {
   fprintf(stderr, "Optimize: Begin dead code removal\n");
@@ -273,7 +275,7 @@ _mesa_remove_dead_code_global(struct gl_program *prog)
  if (inst->SrcReg[j].File == PROGRAM_TEMPORARY) {
 const GLuint index = inst->SrcReg[j].Index;
 GLuint read_mask;
-ASSERT(index < REG_ALLOCATE_MAX_PROGRAM_TEMPS);
+ASSERT(index < prog->NumTemporaries);
read_mask = get_src_arg_mask(inst, j, NO_MASK);
 
 if (inst->SrcReg[j].RelAddr) {
@@ -288,7 +290,7 @@ _mesa_remove_dead_code_global(struct gl_program *prog)
if ((read_mask & (1 << swz)) == 0)
  continue;
if (swz <= SWIZZLE_W)
-  tempRead[index][swz] = GL_TRUE;
+  tempRead[index * 4 + swz] = GL_TRUE;
}
  }
   }
@@ -296,7 +298,7 @@ _mesa_remove_dead_code_global(struct gl_program *prog)
   /* check dst reg */
   if (inst->DstReg.File == PROGRAM_TEMPORARY) {
  const GLuint index = inst->DstReg.Index;
- ASSERT(index < REG_ALLOCATE_MAX_PROGRAM_TEMPS);
+ ASSERT(index < prog->NumTemporaries);
 
  if (inst->DstReg.RelAddr) {
 if (dbg)
@@ -309,10 +311,10 @@ _mesa_remove_dead_code_global(struct gl_program *prog)
  * codes we cannot remove the instruction.  Prevent removal
  * by setting the 'read' flag.
  */
-tempRead[index][0] = GL_TRUE;
-tempRead[index][1] = GL_TRUE;
-tempRead[index][2] = GL_TRUE;
-tempRead[index][3] = GL_TRUE;
+tempRead[index * 4 + 0] = GL_TRUE;
+tempRead[index * 4 + 1] = GL_TRUE;
+tempRead[index * 4 + 2] = GL_TRUE;
+tempRead[index * 4 + 3] = GL_TRUE;
  }
   }
}
@@ -326,7 +328,7 @@ _mesa_remove_dead_code_global(struct gl_program *prog)
  GLint chan, index = inst->DstReg.Index;
 
 for (chan = 0; chan < 4; chan++) {
-   if (!tempRead[index][chan] &&
+   if (!tempRead[index * 4 + chan] &&
inst->DstReg.WriteMask & (1 << chan)) {
   if (dbg) {
   fprintf(stderr, "Remove writemask on %u.%c\n", i,
@@ -357,6 +359,7 @@ _mesa_remove_dead_code_global(struct gl_program *prog)
}
 
 done:
+   free(tempRead);
free(removeInst);
return rem != 0;
 }
-- 
2.0.0.rc2

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[Mesa-dev] [PATCH 12/16] mesa: Dynamically allocate memory for _mesa_reallocate_registers().

[Eric Anholt]

No more nasty stack allocations in this path.
---
 src/mesa/program/prog_optimize.c | 51 
 1 file changed, 36 insertions(+), 15 deletions(-)

diff --git a/src/mesa/program/prog_optimize.c b/src/mesa/program/prog_optimize.c
index 20c6dd9..d76a15d 100644
--- a/src/mesa/program/prog_optimize.c
+++ b/src/mesa/program/prog_optimize.c
@@ -848,7 +848,7 @@ struct interval
 struct interval_list
 {
GLuint Num;
-   struct interval Intervals[REG_ALLOCATE_MAX_PROGRAM_TEMPS];
+   struct interval *Intervals;
 };
 
 /** Insert interval inv into list, sorted by interval end */
@@ -988,12 +988,17 @@ _mesa_find_temp_intervals(struct gl_program *prog,
/* We will output a struct interval_list with an interval per declared
 * temporary, even if the temp is never used.
 */
-   for (i = 0; i < REG_ALLOCATE_MAX_PROGRAM_TEMPS; i++){
+   intervals->Intervals = calloc(prog->NumTemporaries,
+ sizeof(*intervals->Intervals));
+   if (!intervals->Intervals)
+  return GL_FALSE;
+
+   for (i = 0; i < prog->NumTemporaries; i++){
   intervals->Intervals[i].Reg = i;
   intervals->Intervals[i].Start = -1;
   intervals->Intervals[i].End = -1;
}
-   intervals->Num = REG_ALLOCATE_MAX_PROGRAM_TEMPS;
+   intervals->Num = prog->NumTemporaries;
 
/* Scan instructions looking for temporary registers */
for (i = 0; i < prog->NumInstructions; i++) {
@@ -1099,10 +1104,10 @@ find_live_intervals(struct gl_program *prog,
 
 /** Scan the array of used register flags to find free entry */
 static GLint
-alloc_register(GLboolean usedRegs[REG_ALLOCATE_MAX_PROGRAM_TEMPS])
+alloc_register(GLboolean *usedRegs, unsigned int count)
 {
GLuint k;
-   for (k = 0; k < REG_ALLOCATE_MAX_PROGRAM_TEMPS; k++) {
+   for (k = 0; k < count; k++) {
   if (!usedRegs[k]) {
  usedRegs[k] = GL_TRUE;
  return k;
@@ -1124,8 +1129,8 @@ static void
 _mesa_reallocate_registers(struct gl_program *prog)
 {
struct interval_list liveIntervals;
-   GLint registerMap[REG_ALLOCATE_MAX_PROGRAM_TEMPS];
-   GLboolean usedRegs[REG_ALLOCATE_MAX_PROGRAM_TEMPS];
+   GLint *registerMap = NULL;
+   GLboolean *usedRegs = NULL;
GLuint i;
GLint maxTemp = -1;
 
@@ -1134,19 +1139,28 @@ _mesa_reallocate_registers(struct gl_program *prog)
   _mesa_print_program(prog);
}
 
-   for (i = 0; i < REG_ALLOCATE_MAX_PROGRAM_TEMPS; i++){
-  registerMap[i] = -1;
-  usedRegs[i] = GL_FALSE;
-   }
-
if (!find_live_intervals(prog, &liveIntervals)) {
   if (dbg)
  fprintf(stderr, "Aborting register reallocation\n");
-  return;
+  goto done;
+   }
+
+   registerMap = calloc(prog->NumTemporaries, sizeof(*registerMap));
+   usedRegs = calloc(prog->NumTemporaries, sizeof(*usedRegs));
+   if (!registerMap || !usedRegs)
+  goto done;
+
+   for (i = 0; i < prog->NumTemporaries; i++){
+  registerMap[i] = -1;
}
 
{
   struct interval_list activeIntervals;
+  activeIntervals.Intervals = calloc(liveIntervals.Num,
+ sizeof(*activeIntervals.Intervals));
+  if (!activeIntervals.Intervals)
+ goto done;
+
   activeIntervals.Num = 0;
 
   /* loop over live intervals, allocating a new register for each */
@@ -1194,10 +1208,10 @@ _mesa_reallocate_registers(struct gl_program *prog)
 
  /* find a free register for this live interval */
  {
-const GLint k = alloc_register(usedRegs);
+const GLint k = alloc_register(usedRegs, prog->NumTemporaries);
 if (k < 0) {
/* out of registers, give up */
-   return;
+   goto done;
 }
 registerMap[live->Reg] = k;
 maxTemp = MAX2(maxTemp, k);
@@ -1210,6 +1224,8 @@ _mesa_reallocate_registers(struct gl_program *prog)
   */
  insert_interval_by_end(&activeIntervals, live);
   }
+
+  free(activeIntervals.Intervals);
}
 
if (maxTemp + 1 < (GLint) liveIntervals.Num) {
@@ -1228,6 +1244,11 @@ _mesa_reallocate_registers(struct gl_program *prog)
liveIntervals.Num, maxTemp + 1);
   _mesa_print_program(prog);
}
+
+ done:
+   free(liveIntervals.Intervals);
+   free(registerMap);
+   free(usedRegs);
 }
 
 
-- 
2.0.0.rc2

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[Mesa-dev] [PATCH 16/16] mesa: Expand the Mesa IR register index to a full int.

[Eric Anholt]

With this, we can stop worrying about overflowing the tiny 4k temps we
used to be limited to.
---
 src/mesa/program/ir_to_mesa.cpp |  1 -
 src/mesa/program/prog_instruction.h | 25 ++---
 src/mesa/program/program.c  | 17 -
 src/mesa/program/program_parse.y|  9 -
 4 files changed, 10 insertions(+), 42 deletions(-)

diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 1777614..24ecccf 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -2257,7 +2257,6 @@ mesa_src_reg_from_ir_src_reg(src_reg reg)
struct prog_src_register mesa_reg;
 
mesa_reg.File = reg.file;
-   assert(reg.index < (1 << INST_INDEX_BITS));
mesa_reg.Index = reg.index;
mesa_reg.Swizzle = reg.swizzle;
mesa_reg.RelAddr = reg.reladdr != NULL;
diff --git a/src/mesa/program/prog_instruction.h 
b/src/mesa/program/prog_instruction.h
index fee1be7..b61451f 100644
--- a/src/mesa/program/prog_instruction.h
+++ b/src/mesa/program/prog_instruction.h
@@ -225,23 +225,20 @@ typedef enum prog_opcode {
MAX_OPCODE
 } gl_inst_opcode;
 
-
-/**
- * Number of bits for the src/dst register Index field.
- * This limits the size of temp/uniform register files.
- */
-#define INST_INDEX_BITS 12
-
-
 /**
  * Instruction source register.
  */
 struct prog_src_register
 {
GLuint File:4;  /**< One of the PROGRAM_* register file values. */
-   GLint Index:(INST_INDEX_BITS+1); /**< Extra bit here for sign bit.
- * May be negative for relative addressing.
- */
+   /**
+* Offset within the register file, or the offset from the address register
+* within the register file, in the case of RelAddr being set.
+*
+* Note that the index can be negative for relative addressing.
+*/
+   int Index;
+
GLuint Swizzle:12;
GLuint RelAddr:1;
 
@@ -267,9 +264,7 @@ struct prog_src_register
 */
GLuint HasIndex2:1;
GLuint RelAddr2:1;
-   GLint Index2:(INST_INDEX_BITS+1); /**< Extra bit here for sign bit.
-   * May be negative for relative
-   * addressing. */
+   int Index2;
 };
 
 
@@ -279,7 +274,7 @@ struct prog_src_register
 struct prog_dst_register
 {
GLuint File:4;  /**< One of the PROGRAM_* register file values */
-   GLuint Index:INST_INDEX_BITS;  /**< Unsigned, never negative */
+   uint32_t Index;
GLuint WriteMask:4;
GLuint RelAddr:1;
 
diff --git a/src/mesa/program/program.c b/src/mesa/program/program.c
index ee6d8c0..8a564f6 100644
--- a/src/mesa/program/program.c
+++ b/src/mesa/program/program.c
@@ -52,26 +52,9 @@ struct gl_program _mesa_DummyProgram;
 void
 _mesa_init_program(struct gl_context *ctx)
 {
-   /*
-* If this assertion fails, we need to increase the field
-* size for register indexes (see INST_INDEX_BITS).
-*/
-   ASSERT(ctx->Const.Program[MESA_SHADER_VERTEX].MaxUniformComponents / 4
-  <= (1 << INST_INDEX_BITS));
-   ASSERT(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxUniformComponents / 4
-  <= (1 << INST_INDEX_BITS));
-
-   ASSERT(ctx->Const.Program[MESA_SHADER_VERTEX].MaxTemps <= (1 << 
INST_INDEX_BITS));
-   ASSERT(ctx->Const.Program[MESA_SHADER_VERTEX].MaxLocalParams <= (1 << 
INST_INDEX_BITS));
-   ASSERT(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTemps <= (1 << 
INST_INDEX_BITS));
-   ASSERT(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxLocalParams <= (1 << 
INST_INDEX_BITS));
-
ASSERT(ctx->Const.Program[MESA_SHADER_VERTEX].MaxUniformComponents <= 4 * 
MAX_UNIFORMS);
ASSERT(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxUniformComponents <= 4 * 
MAX_UNIFORMS);
 
-   ASSERT(ctx->Const.Program[MESA_SHADER_VERTEX].MaxAddressOffset <= (1 << 
INST_INDEX_BITS));
-   ASSERT(ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxAddressOffset <= (1 << 
INST_INDEX_BITS));
-
/* If this fails, increase prog_instruction::TexSrcUnit size */
STATIC_ASSERT(MAX_TEXTURE_UNITS <= (1 << 5));
 
diff --git a/src/mesa/program/program_parse.y b/src/mesa/program/program_parse.y
index d4263cb..41ce824 100644
--- a/src/mesa/program/program_parse.y
+++ b/src/mesa/program/program_parse.y
@@ -2337,12 +2337,9 @@ init_dst_reg(struct prog_dst_register *r)
 void
 set_dst_reg(struct prog_dst_register *r, gl_register_file file, GLint index)
 {
-   const GLint maxIndex = 1 << INST_INDEX_BITS;
const GLint minIndex = 0;
ASSERT(index >= minIndex);
(void) minIndex;
-   ASSERT(index <= maxIndex);
-   (void) maxIndex;
ASSERT(file == PROGRAM_TEMPORARY ||
  file == PROGRAM_ADDRESS ||
  file == PROGRAM_OUTPUT);
@@ -2379,13 +2376,7 @@ void
 set_src_reg_swz(struct asm_src_register *r, gl_register_file file, GLint index,
 GLuint swizzle)
 {
-   const GLint maxIndex = (1 << INST_INDEX_BITS) - 1;
-   const GLint minIndex = -(1 << INST_INDEX_BITS);
ASSERT(file < PROGRAM_FILE_MAX);
-   AS

[Mesa-dev] [PATCH 04/16] mesa: Make prog_optimize() consistently use stderr.

[Eric Anholt]

Note that _mesa_print_program() and _mesa_print_instruction() both used
stderr, so this stdout stuff would get mixed up with it.
---
 src/mesa/program/prog_optimize.c | 64 +---
 1 file changed, 33 insertions(+), 31 deletions(-)

diff --git a/src/mesa/program/prog_optimize.c b/src/mesa/program/prog_optimize.c
index 4cba045..1ab54ec 100644
--- a/src/mesa/program/prog_optimize.c
+++ b/src/mesa/program/prog_optimize.c
@@ -255,7 +255,7 @@ _mesa_remove_dead_code_global(struct gl_program *prog)
memset(tempRead, 0, sizeof(tempRead));
 
if (dbg) {
-  printf("Optimize: Begin dead code removal\n");
+  fprintf(stderr, "Optimize: Begin dead code removal\n");
   /*_mesa_print_program(prog);*/
}
 
@@ -278,7 +278,7 @@ _mesa_remove_dead_code_global(struct gl_program *prog)
 
 if (inst->SrcReg[j].RelAddr) {
if (dbg)
-  printf("abort remove dead code (indirect temp)\n");
+  fprintf(stderr, "abort remove dead code (indirect temp)\n");
goto done;
 }
 
@@ -300,7 +300,7 @@ _mesa_remove_dead_code_global(struct gl_program *prog)
 
  if (inst->DstReg.RelAddr) {
 if (dbg)
-   printf("abort remove dead code (indirect temp)\n");
+   fprintf(stderr, "abort remove dead code (indirect temp)\n");
 goto done;
  }
 
@@ -329,8 +329,8 @@ _mesa_remove_dead_code_global(struct gl_program *prog)
if (!tempRead[index][chan] &&
inst->DstReg.WriteMask & (1 << chan)) {
   if (dbg) {
- printf("Remove writemask on %u.%c\n", i,
-  chan == 3 ? 'w' : 'x' + chan);
+  fprintf(stderr, "Remove writemask on %u.%c\n", i,
+  chan == 3 ? 'w' : 'x' + chan);
   }
   inst->DstReg.WriteMask &= ~(1 << chan);
   rem++;
@@ -340,7 +340,7 @@ _mesa_remove_dead_code_global(struct gl_program *prog)
 if (inst->DstReg.WriteMask == 0) {
/* If we cleared all writes, the instruction can be removed. */
if (dbg)
-  printf("Remove instruction %u: \n", i);
+   fprintf(stderr, "Remove instruction %u: \n", i);
removeInst[i] = GL_TRUE;
 }
   }
@@ -350,9 +350,9 @@ _mesa_remove_dead_code_global(struct gl_program *prog)
rem = remove_instructions(prog, removeInst);
 
if (dbg) {
-  printf("Optimize: End dead code removal.\n");
-  printf("  %u channel writes removed\n", rem);
-  printf("  %u instructions removed\n", rem);
+  fprintf(stderr, "Optimize: End dead code removal.\n");
+  fprintf(stderr, "  %u channel writes removed\n", rem);
+  fprintf(stderr, "  %u instructions removed\n", rem);
   /*_mesa_print_program(prog);*/
}
 
@@ -494,7 +494,7 @@ _mesa_remove_extra_move_use(struct gl_program *prog)
GLuint i, j;
 
if (dbg) {
-  printf("Optimize: Begin remove extra move use\n");
+  fprintf(stderr, "Optimize: Begin remove extra move use\n");
   _mesa_print_program(prog);
}
 
@@ -585,7 +585,7 @@ _mesa_remove_extra_move_use(struct gl_program *prog)
}
 
if (dbg) {
-  printf("Optimize: End remove extra move use.\n");
+  fprintf(stderr, "Optimize: End remove extra move use.\n");
   /*_mesa_print_program(prog);*/
}
 }
@@ -739,7 +739,7 @@ _mesa_remove_extra_moves(struct gl_program *prog)
GLuint i, rem = 0, nesting = 0;
 
if (dbg) {
-  printf("Optimize: Begin remove extra moves\n");
+  fprintf(stderr, "Optimize: Begin remove extra moves\n");
   _mesa_print_program(prog);
}
 
@@ -805,8 +805,8 @@ _mesa_remove_extra_moves(struct gl_program *prog)
   if (_mesa_merge_mov_into_inst(prevInst, mov)) {
  removeInst[i] = GL_TRUE;
  if (dbg) {
-printf("Remove MOV at %u\n", i);
-printf("new prev inst %u: ", prevI);
+fprintf(stderr, "Remove MOV at %u\n", i);
+fprintf(stderr, "new prev inst %u: ", prevI);
 _mesa_print_instruction(prevInst);
  }
   }
@@ -825,7 +825,7 @@ _mesa_remove_extra_moves(struct gl_program *prog)
free(removeInst);
 
if (dbg) {
-  printf("Optimize: End remove extra moves.  %u instructions removed\n", 
rem);
+  fprintf(stderr, "Optimize: End remove extra moves.  %u instructions 
removed\n", rem);
   /*_mesa_print_program(prog);*/
}
 
@@ -1059,7 +1059,7 @@ find_live_intervals(struct gl_program *prog,
 */
 
if (dbg) {
-  printf("Optimize: Begin find intervals\n");
+  fprintf(stderr, "Optimize: Begin find intervals\n");
}
 
/* build intermediate arrays */
@@ -1086,16 +1086,16 @@ find_live_intervals(struct gl_program *prog,
   /* print interval info */
   for (i = 0; i < liveIntervals-

[Mesa-dev] Mesa IR as a list of instructions

[Eric Anholt]

Here's a series I started back in January as a little experiment.
Basically, I feel guilty for pushing GLSL IR into the driver, and wish I'd
just fixed up Mesa IR back in the day.  But, given that we're still
feeding Mesa IR into drivers as well (ARB programs and fixed function
vertex programs), it made me think: What if I fixed it up now, and got
Mesa IR to the point that we could just garbage collect the GLSL IR input
paths to drivers?

Mesa IR has a bunch of weaknesses that need to get sorted out if it's
going to be useful:

- It's a single giant array of instructions, making modifications of the
  instruction stream (instruction lowering, optimization, etc.) more
  expensive in code and CPU time than it should be.
- It doesn't have any variable declarations, so if you have dynamic array
  indexing, optimization just shuts down (plus, no annotation on the
  temps, so debugging is irritating).
- It doesn't have integer instructions or anything else post-GLSL-1.30.
- The optimization passes for it are totally ad-hoc and fairly weak.
- It's not SSA.

I'm interested in fixing all of these.  How do people feel about this
goal?

This series fixes the first bullet point above.  Patch 15 is huge, but I
didn't see a way to chop it up smaller without maintaining the list
alongside the array for some intermediate patches.  I'd be willing to do
so if needed, though, to make review doable.  You can also find the
changes in the "mesa-ir" branch of my git tree.

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[Mesa-dev] [PATCH 01/16] ir_to_mesa: Move Mesa IR debug to stderr as well.

[Eric Anholt]

Half the debug was in stderr, and this bit was in stdout.
---
 src/mesa/program/ir_to_mesa.cpp | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 59cf123..978b6cf 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -2366,22 +2366,22 @@ print_program(struct prog_instruction 
*mesa_instructions,
   struct prog_instruction *mesa_inst = mesa_instructions + i;
   ir_instruction *ir = mesa_instruction_annotation[i];
 
-  fprintf(stdout, "%3d: ", i);
+  fprintf(stderr, "%3d: ", i);
 
   if (last_ir != ir && ir) {
 int j;
 
 for (j = 0; j < indent; j++) {
-   fprintf(stdout, " ");
+   fprintf(stderr, " ");
 }
-ir->print();
-printf("\n");
+ir->fprint(stderr);
+fprintf(stderr, "\n");
 last_ir = ir;
 
-fprintf(stdout, " "); /* line number spacing. */
+fprintf(stderr, " "); /* line number spacing. */
   }
 
-  indent = _mesa_fprint_instruction_opt(stdout, mesa_inst, indent,
+  indent = _mesa_fprint_instruction_opt(stderr, mesa_inst, indent,
PROG_PRINT_DEBUG, NULL);
}
 }
-- 
2.0.0.rc2

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[Mesa-dev] [PATCH 07/16] mesa: Drop some redundant Mesa IR instruction setup for MVP.

[Eric Anholt]

Since we've got them already initialized by _mesa_init_instructions(), I
think this helps make the code more obvious (only set a writemask when
you've got a non-default writemask).  Ideally, we'd probably reuse one of
those piles of helper code for emitting Mesa IR instructions, though.
---
 src/mesa/program/programopt.c | 10 --
 1 file changed, 10 deletions(-)

diff --git a/src/mesa/program/programopt.c b/src/mesa/program/programopt.c
index ee822be..39a83b4 100644
--- a/src/mesa/program/programopt.c
+++ b/src/mesa/program/programopt.c
@@ -93,10 +93,8 @@ _mesa_insert_mvp_dp4_code(struct gl_context *ctx, struct 
gl_vertex_program *vpro
   newInst[i].DstReg.WriteMask = (WRITEMASK_X << i);
   newInst[i].SrcReg[0].File = PROGRAM_STATE_VAR;
   newInst[i].SrcReg[0].Index = mvpRef[i];
-  newInst[i].SrcReg[0].Swizzle = SWIZZLE_NOOP;
   newInst[i].SrcReg[1].File = PROGRAM_INPUT;
   newInst[i].SrcReg[1].Index = VERT_ATTRIB_POS;
-  newInst[i].SrcReg[1].Swizzle = SWIZZLE_NOOP;
}
 
/* Append original instructions after new instructions */
@@ -162,43 +160,35 @@ _mesa_insert_mvp_mad_code(struct gl_context *ctx, struct 
gl_vertex_program *vpro
newInst[0].Opcode = OPCODE_MUL;
newInst[0].DstReg.File = PROGRAM_TEMPORARY;
newInst[0].DstReg.Index = hposTemp;
-   newInst[0].DstReg.WriteMask = WRITEMASK_XYZW;
newInst[0].SrcReg[0].File = PROGRAM_INPUT;
newInst[0].SrcReg[0].Index = VERT_ATTRIB_POS;
newInst[0].SrcReg[0].Swizzle = SWIZZLE_;
newInst[0].SrcReg[1].File = PROGRAM_STATE_VAR;
newInst[0].SrcReg[1].Index = mvpRef[0];
-   newInst[0].SrcReg[1].Swizzle = SWIZZLE_NOOP;
 
for (i = 1; i <= 2; i++) {
   newInst[i].Opcode = OPCODE_MAD;
   newInst[i].DstReg.File = PROGRAM_TEMPORARY;
   newInst[i].DstReg.Index = hposTemp;
-  newInst[i].DstReg.WriteMask = WRITEMASK_XYZW;
   newInst[i].SrcReg[0].File = PROGRAM_INPUT;
   newInst[i].SrcReg[0].Index = VERT_ATTRIB_POS;
   newInst[i].SrcReg[0].Swizzle = MAKE_SWIZZLE4(i,i,i,i);
   newInst[i].SrcReg[1].File = PROGRAM_STATE_VAR;
   newInst[i].SrcReg[1].Index = mvpRef[i];
-  newInst[i].SrcReg[1].Swizzle = SWIZZLE_NOOP;
   newInst[i].SrcReg[2].File = PROGRAM_TEMPORARY;
   newInst[i].SrcReg[2].Index = hposTemp;
-  newInst[i].SrcReg[2].Swizzle = SWIZZLE_NOOP;
}
 
newInst[3].Opcode = OPCODE_MAD;
newInst[3].DstReg.File = PROGRAM_OUTPUT;
newInst[3].DstReg.Index = VARYING_SLOT_POS;
-   newInst[3].DstReg.WriteMask = WRITEMASK_XYZW;
newInst[3].SrcReg[0].File = PROGRAM_INPUT;
newInst[3].SrcReg[0].Index = VERT_ATTRIB_POS;
newInst[3].SrcReg[0].Swizzle = SWIZZLE_;
newInst[3].SrcReg[1].File = PROGRAM_STATE_VAR;
newInst[3].SrcReg[1].Index = mvpRef[3];
-   newInst[3].SrcReg[1].Swizzle = SWIZZLE_NOOP;
newInst[3].SrcReg[2].File = PROGRAM_TEMPORARY;
newInst[3].SrcReg[2].Index = hposTemp;
-   newInst[3].SrcReg[2].Swizzle = SWIZZLE_NOOP;
 
 
/* Append original instructions after new instructions */
-- 
2.0.0.rc2

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[Mesa-dev] [PATCH 08/16] mesa: Remove stale comment (and fix grammar in the remainder).

[Eric Anholt]

_mesa_add_state_reference() already checks to see if you've already got
that state referenced.
---
 src/mesa/program/programopt.c | 10 ++
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/src/mesa/program/programopt.c b/src/mesa/program/programopt.c
index 39a83b4..bcc0b75 100644
--- a/src/mesa/program/programopt.c
+++ b/src/mesa/program/programopt.c
@@ -53,10 +53,7 @@ _mesa_insert_mvp_dp4_code(struct gl_context *ctx, struct 
gl_vertex_program *vpro
const GLuint newLen = origLen + 4;
GLuint i;
 
-   /*
-* Setup state references for the modelview/projection matrix.
-* XXX we should check if these state vars are already declared.
-*/
+   /* Set up state references for the modelview/projection matrix. */
static const gl_state_index mvpState[4][STATE_LENGTH] = {
   { STATE_MVP_MATRIX, 0, 0, 0, 0 },  /* state.matrix.mvp.row[0] */
   { STATE_MVP_MATRIX, 0, 1, 1, 0 },  /* state.matrix.mvp.row[1] */
@@ -120,10 +117,7 @@ _mesa_insert_mvp_mad_code(struct gl_context *ctx, struct 
gl_vertex_program *vpro
GLuint hposTemp;
GLuint i;
 
-   /*
-* Setup state references for the modelview/projection matrix.
-* XXX we should check if these state vars are already declared.
-*/
+   /* Set up state references for the modelview/projection matrix. */
static const gl_state_index mvpState[4][STATE_LENGTH] = {
   { STATE_MVP_MATRIX, 0, 0, 0, STATE_MATRIX_TRANSPOSE },
   { STATE_MVP_MATRIX, 0, 1, 1, STATE_MATRIX_TRANSPOSE },
-- 
2.0.0.rc2

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[Mesa-dev] [PATCH 02/16] ir_to_mesa: Dump the optimized Mesa IR as well.

[Eric Anholt]

We were dumping the intial code generated before optimization, with
annotation, because we don't have support for tracking the annotation info
across optimization.  It's still really useful to see the optimized code,
though.
---
 src/mesa/program/ir_to_mesa.cpp | 8 
 1 file changed, 8 insertions(+)

diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 978b6cf..1b9a519 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -2965,6 +2965,14 @@ get_mesa_program(struct gl_context *ctx,
   goto fail_exit;
}
 
+   if (ctx->_Shader->Flags & GLSL_DUMP) {
+  fprintf(stderr, "\n");
+  fprintf(stderr, "Optimized Mesa IR for linked %s program %d:\n",
+  target_string, shader_program->Name);
+  _mesa_fprint_program_opt(stderr, prog, PROG_PRINT_DEBUG, true);
+  fflush(stderr);
+   }
+
return prog;
 
 fail_exit:
-- 
2.0.0.rc2

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[Mesa-dev] [PATCH 06/16] mesa: Fix a "1" vs "i" typo in MVP setup.

[Eric Anholt]

It doesn't matter, because the instructions were initialized to noop
swizzles anyway.
---
 src/mesa/program/programopt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/program/programopt.c b/src/mesa/program/programopt.c
index 92a8831..ee822be 100644
--- a/src/mesa/program/programopt.c
+++ b/src/mesa/program/programopt.c
@@ -183,7 +183,7 @@ _mesa_insert_mvp_mad_code(struct gl_context *ctx, struct 
gl_vertex_program *vpro
   newInst[i].SrcReg[1].Swizzle = SWIZZLE_NOOP;
   newInst[i].SrcReg[2].File = PROGRAM_TEMPORARY;
   newInst[i].SrcReg[2].Index = hposTemp;
-  newInst[1].SrcReg[2].Swizzle = SWIZZLE_NOOP;
+  newInst[i].SrcReg[2].Swizzle = SWIZZLE_NOOP;
}
 
newInst[3].Opcode = OPCODE_MAD;
-- 
2.0.0.rc2

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[Mesa-dev] [PATCH 03/16] mesa: Fix find_next_use() in the presence of RelAddr.

[Eric Anholt]

Both callers of this function are doing dead code elimintation: "is this
reg completely rewritten before any of these components are used?".  If
there's reladdr on this write, then we don't know if the write landed in
our channels or not, but assuming that it didn't is conservative and safe.

This failure was hidden by the fact that the two passes would bail early
if any src reladdr was found, and programs using dst reladdr tended to use
src as well.  With my Mesa IR list changes, I happened to make those
passes not bail on instruction removal that they'd previously determined
was safe.
---
 src/mesa/program/prog_optimize.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/mesa/program/prog_optimize.c b/src/mesa/program/prog_optimize.c
index 6153f5e..4cba045 100644
--- a/src/mesa/program/prog_optimize.c
+++ b/src/mesa/program/prog_optimize.c
@@ -415,7 +415,8 @@ find_next_use(const struct gl_program *prog,
 }
 if (_mesa_num_inst_dst_regs(inst->Opcode) == 1 &&
 inst->DstReg.File == PROGRAM_TEMPORARY &&
-inst->DstReg.Index == index) {
+inst->DstReg.Index == index &&
+!inst->DstReg.RelAddr) {
mask &= ~inst->DstReg.WriteMask;
if (mask == 0)
   return WRITE;
-- 
2.0.0.rc2

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[Mesa-dev] [PATCH 09/16] mesa: Slightly change instruction walking behavior for prog_optimize.

[Eric Anholt]

I was going to change this when I moved to lists of instructions, and
wanted to call the behavior change out here.  Note that the last
instruction is always OPCODE_END, and can_upward_mov_be_modified will
notice that it's not a MOV and take the continue path (to the exit of the
loop).
---
 src/mesa/program/prog_optimize.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/program/prog_optimize.c b/src/mesa/program/prog_optimize.c
index e877497..ce53937 100644
--- a/src/mesa/program/prog_optimize.c
+++ b/src/mesa/program/prog_optimize.c
@@ -509,7 +509,7 @@ _mesa_remove_extra_move_use(struct gl_program *prog)
 *FOO tmpY, arg0, arg1;
 */
 
-   for (i = 0; i + 1 < prog->NumInstructions; i++) {
+   for (i = 0; i < prog->NumInstructions; i++) {
   const struct prog_instruction *mov = prog->Instructions + i;
   GLuint dst_mask, src_mask;
   if (can_upward_mov_be_modifed(mov) == GL_FALSE)
-- 
2.0.0.rc2

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[Mesa-dev] [PATCH 11/16] mesa: Simplify _mesa_find_temp_intervals().

[Eric Anholt]

Since there are no other callers, we can make it static and propagate some
types around, removing one of the giant stack allocations.
---
 src/mesa/program/prog_optimize.c | 77 ++--
 src/mesa/program/prog_optimize.h |  7 
 2 files changed, 34 insertions(+), 50 deletions(-)

diff --git a/src/mesa/program/prog_optimize.c b/src/mesa/program/prog_optimize.c
index f0d279b..20c6dd9 100644
--- a/src/mesa/program/prog_optimize.c
+++ b/src/mesa/program/prog_optimize.c
@@ -851,14 +851,6 @@ struct interval_list
struct interval Intervals[REG_ALLOCATE_MAX_PROGRAM_TEMPS];
 };
 
-
-static void
-append_interval(struct interval_list *list, const struct interval *inv)
-{
-   list->Intervals[list->Num++] = *inv;
-}
-
-
 /** Insert interval inv into list, sorted by interval end */
 static void
 insert_interval_by_end(struct interval_list *list, const struct interval *inv)
@@ -945,9 +937,9 @@ struct loop_info
  * instruction 'ic'.
  */
 static void
-update_interval(GLint intBegin[], GLint intEnd[],
+update_interval(struct interval *interval,
struct loop_info *loopStack, GLuint loopStackDepth,
-   GLuint index, GLuint ic)
+   GLuint ic)
 {
int i;
GLuint begin = ic;
@@ -957,7 +949,7 @@ update_interval(GLint intBegin[], GLint intEnd[],
 * of the outermost loop that doesn't contain its definition.
 */
for (i = 0; i < loopStackDepth; i++) {
-  if (intBegin[index] < loopStack[i].Start) {
+  if (interval->Start < loopStack[i].Start) {
 end = loopStack[i].End;
 break;
   }
@@ -971,14 +963,13 @@ update_interval(GLint intBegin[], GLint intEnd[],
   begin = loopStack[0].Start;
}
 
-   ASSERT(index < REG_ALLOCATE_MAX_PROGRAM_TEMPS);
-   if (intBegin[index] == -1) {
-  ASSERT(intEnd[index] == -1);
-  intBegin[index] = begin;
-  intEnd[index] = end;
+   if (interval->Start == -1) {
+  ASSERT(interval->End == -1);
+  interval->Start = begin;
+  interval->End = end;
}
else {
-  intEnd[index] = end;
+  interval->End = end;
}
 }
 
@@ -986,23 +977,27 @@ update_interval(GLint intBegin[], GLint intEnd[],
 /**
  * Find first/last instruction that references each temporary register.
  */
-GLboolean
-_mesa_find_temp_intervals(const struct prog_instruction *instructions,
-  GLuint numInstructions,
-  GLint intBegin[REG_ALLOCATE_MAX_PROGRAM_TEMPS],
-  GLint intEnd[REG_ALLOCATE_MAX_PROGRAM_TEMPS])
+static GLboolean
+_mesa_find_temp_intervals(struct gl_program *prog,
+  struct interval_list *intervals)
 {
struct loop_info loopStack[MAX_LOOP_NESTING];
GLuint loopStackDepth = 0;
GLuint i;
 
+   /* We will output a struct interval_list with an interval per declared
+* temporary, even if the temp is never used.
+*/
for (i = 0; i < REG_ALLOCATE_MAX_PROGRAM_TEMPS; i++){
-  intBegin[i] = intEnd[i] = -1;
+  intervals->Intervals[i].Reg = i;
+  intervals->Intervals[i].Start = -1;
+  intervals->Intervals[i].End = -1;
}
+   intervals->Num = REG_ALLOCATE_MAX_PROGRAM_TEMPS;
 
/* Scan instructions looking for temporary registers */
-   for (i = 0; i < numInstructions; i++) {
-  const struct prog_instruction *inst = instructions + i;
+   for (i = 0; i < prog->NumInstructions; i++) {
+  const struct prog_instruction *inst = prog->Instructions + i;
   if (inst->Opcode == OPCODE_BGNLOOP) {
  loopStack[loopStackDepth].Start = i;
  loopStack[loopStackDepth].End = inst->BranchTarget;
@@ -1022,16 +1017,16 @@ _mesa_find_temp_intervals(const struct prog_instruction 
*instructions,
const GLuint index = inst->SrcReg[j].Index;
if (inst->SrcReg[j].RelAddr)
   return GL_FALSE;
-   update_interval(intBegin, intEnd, loopStack, loopStackDepth,
-  index, i);
+   update_interval(&intervals->Intervals[index],
+   loopStack, loopStackDepth, i);
 }
  }
  if (inst->DstReg.File == PROGRAM_TEMPORARY) {
 const GLuint index = inst->DstReg.Index;
 if (inst->DstReg.RelAddr)
return GL_FALSE;
-update_interval(intBegin, intEnd, loopStack, loopStackDepth,
-   index, i);
+update_interval(&intervals->Intervals[index],
+loopStack, loopStackDepth, i);
  }
   }
}
@@ -1051,9 +1046,7 @@ static GLboolean
 find_live_intervals(struct gl_program *prog,
 struct interval_list *liveIntervals)
 {
-   GLint intBegin[REG_ALLOCATE_MAX_PROGRAM_TEMPS];
-   GLint intEnd[REG_ALLOCATE_MAX_PROGRAM_TEMPS];
-   GLuint i;
+   GLuint i, skipped;
 
/*
 * Note: we'll return GL_FALSE below if we find relative indexing
@@ -1066,19 +1059,17 @@ find_live_intervals(struct gl_pr

[Mesa-dev] [PATCH 13/16] mesa: Remove the last REG_ALLOCATE_MAX_TEMPS user.

[Eric Anholt]

---
 src/mesa/program/prog_optimize.c | 18 +++---
 1 file changed, 7 insertions(+), 11 deletions(-)

diff --git a/src/mesa/program/prog_optimize.c b/src/mesa/program/prog_optimize.c
index d76a15d..88dc177 100644
--- a/src/mesa/program/prog_optimize.c
+++ b/src/mesa/program/prog_optimize.c
@@ -33,12 +33,6 @@
 
 
 #define MAX_LOOP_NESTING 50
-/* MAX_PROGRAM_TEMPS is a low number (256), and we want to be able to
- * register allocate many temporary values into that small number of
- * temps.  So allow large temporary indices coming into the register
- * allocator.
- */
-#define REG_ALLOCATE_MAX_PROGRAM_TEMPS ((1 << INST_INDEX_BITS) - 1)
 
 static GLboolean dbg = GL_FALSE;
 
@@ -1286,7 +1280,7 @@ print_it(struct gl_context *ctx, struct gl_program 
*program, const char *txt) {
 static void
 _mesa_simplify_cmp(struct gl_program * program)
 {
-   GLuint tempWrites[REG_ALLOCATE_MAX_PROGRAM_TEMPS];
+   GLuint *tempWrites;
GLuint outputWrites[MAX_PROGRAM_OUTPUTS];
GLuint i;
 
@@ -1295,9 +1289,9 @@ _mesa_simplify_cmp(struct gl_program * program)
   _mesa_print_program(program);
}
 
-   for (i = 0; i < REG_ALLOCATE_MAX_PROGRAM_TEMPS; i++) {
-  tempWrites[i] = 0;
-   }
+   tempWrites = calloc(program->NumTemporaries, sizeof(*tempWrites));
+   if (!tempWrites)
+  return;
 
for (i = 0; i < MAX_PROGRAM_OUTPUTS; i++) {
   outputWrites[i] = 0;
@@ -1309,6 +1303,7 @@ _mesa_simplify_cmp(struct gl_program * program)
 
   /* Give up if we encounter relative addressing or flow control. */
   if (_mesa_is_flow_control_opcode(inst->Opcode) || inst->DstReg.RelAddr) {
+ free(tempWrites);
  return;
   }
 
@@ -1317,7 +1312,7 @@ _mesa_simplify_cmp(struct gl_program * program)
  prevWriteMask = outputWrites[inst->DstReg.Index];
  outputWrites[inst->DstReg.Index] |= inst->DstReg.WriteMask;
   } else if (inst->DstReg.File == PROGRAM_TEMPORARY) {
- assert(inst->DstReg.Index < REG_ALLOCATE_MAX_PROGRAM_TEMPS);
+ assert(inst->DstReg.Index < program->NumTemporaries);
  prevWriteMask = tempWrites[inst->DstReg.Index];
  tempWrites[inst->DstReg.Index] |= inst->DstReg.WriteMask;
   } else {
@@ -1350,6 +1345,7 @@ _mesa_simplify_cmp(struct gl_program * program)
   fprintf(stderr, "Optimize: End reads without writes\n");
   _mesa_print_program(program);
}
+   free(tempWrites);
 }
 
 /**
-- 
2.0.0.rc2

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Re: [Mesa-dev] [PATCH 08/10] glsl: parser changes for GL_ARB_explicit_uniform_location

[Ian Romanick]

On 05/22/2014 09:37 PM, Tapani Pälli wrote:
> On 05/21/2014 07:52 PM, Ian Romanick wrote:
>> On 05/21/2014 08:11 AM, Tapani wrote:
>>> On 05/21/2014 05:43 PM, Tapani wrote:
 On 05/21/2014 01:27 AM, Ian Romanick wrote:
> On 05/19/2014 10:08 PM, Tapani wrote:
>> On 05/19/2014 08:18 PM, Ian Romanick wrote:
>>> On 04/09/2014 02:56 AM, Tapani Pälli wrote:
 diff --git a/src/glsl/glsl_parser_extras.h
 b/src/glsl/glsl_parser_extras.h
 index c53c583..20879a0 100644
 --- a/src/glsl/glsl_parser_extras.h
 +++ b/src/glsl/glsl_parser_extras.h
 @@ -152,6 +152,20 @@ struct _mesa_glsl_parse_state {
  return true;
   }
+   bool check_explicit_uniform_location_allowed(YYLTYPE *locp,
 +const ir_variable
 *var)
 +   {
 +  /* Requires OpenGL 3.3 or ARB_explicit_attrib_location. */
 +  if (ctx->Version < 33 &&
 !ctx->Extensions.ARB_explicit_attrib_location) {
 + _mesa_glsl_error(locp, this, "%s explicit location
 requires "
 + "GL_ARB_explicit_attrib_location extension "
 +  "or OpenGL 3.3", mode_string(var));
>>> Many copy-and-paste bugs. :) Explicit uniform locations aren't added
>>> until 4.3.
>> It may look copy-paste but the specification states that "Requires
>> OpenGL 3.3 or ARB_explicit_attrib_location":
>>
>> https://www.opengl.org/registry/specs/ARB/explicit_uniform_location.txt
>>
>> Using 4.3 capable driver will pass this check correctly.
> Oh right, because it relies on 3.3 or ARB_explicit_attib_location to
> add the layout keyword.  Some comments explaining that this isn't a
> copy-and-paste bug will prevent the next person from also thinking that
> it is. :)
>
> But this code should check the version (and extension) bits set in the
> shader, not what's enabled in the context. How about:
>
> bool check_explicit_attrib_location_allowed(YYLTYPE *locp,
> const ir_variable *var)
> {
>if (!this->has_explicit_attrib_location() ||
>!this->ARB_explicit_uniform_location_enable) {
>   _mesa_glsl_error(locp, this,
>"uniform explicit location requires
>"GL_ARB_explicit_uniform_location and
> either "
>"GL_ARB_explicit_attrib_location or GLSL
> 330.");
>   return false;
>}
>
>return true;
> }
 Sure, this is fine by me. I'll send new patches soon.

>>> Or maybe fine with some changes since my piglit tests won't pass with
>>> this change (for those explicit attrib location is not available for
>>> some reason (!)), will take a look.
>> Do the tests enable it via #extension?
> 
> They enable GL_ARB_explicit_uniform_location but not
> GL_ARB_explicit_attrib_location and I think that is the way it should
> work. I don't understand why checking the existence of
> explicit_attrib_location from context is not correct way to deal with
> this? It doesn't need to be enabled in the language as layout token will
> be there also if just explicit_uniform_location is enabled.

There are two places that we need to check extension or version related
things in the compiler.

1. Check that the driver supports a particular extension when a shader
tries to enable the functionality (via #extension).  This is handled by
the _mesa_glsl_supported_extensions table in glsl_parser_extras.cpp.

2. Check that the shader has enabled the extension when it tries to use
some functionality from that extension.  This is handled by either
checking the appropriate state->foo_enable flag directly or using one of
the state->has_foo or state->check_foo methods.  The methods are used
for cases where a feature is enabled by multiple extensions or an
extension and a GLSL version.

Now, for this case...

I think the intention of the spec language is that the layout()
qualifier is added by either GL_ARB_explicit_attrib_location or GLSL
3.30.  The layout qualifier applied to a uniform is further added by
GL_ARB_explicit_uniform_location.

So... I think an application needs (GLSL 330 ||
GL_ARB_explicit_attrib_location) && GL_ARB_explicit_uniform_location.
Meaning that either

#version 330
#extension GL_ARB_explicit_uniform_location: enable

or

#version 120 // for example
#extension GL_ARB_explicit_attrib_location: enable
#extension GL_ARB_explicit_uniform_location: enable

I am curious to see what other implementatons do... if they do something
different from what I have said, I'll submit a spec bug so that it's
more clear.

> // Tapani

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Re: [Mesa-dev] [PATCH] i965: Fix repeated usage of rectangle texture coordinate scaling.

[Eric Anholt]

Kenneth Graunke  writes:

> Previously, we set up new entries in the params[] array on every access
> of a rectangle texture.  Unfortunately, we only reserve space for
> (2 * MaxTextureImageUnits) extra entries, so programs which accessed
> rectangle textures more times than that would write off the end of the
> array and likely crash.
>
> We don't really have a decent mapping between the index returned by
> _mesa_add_state_reference and our index into the params array, so we
> have to manually search for it.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78691
> Signed-off-by: Kenneth Graunke 
> Cc: mesa-sta...@lists.freedesktop.org

Reviewed-by: Eric Anholt 


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Re: [Mesa-dev] [PATCH 1/2] glxinfo: move reusable, non-GLX code into glinfo_common.[ch]

[Ian Romanick]

The code changes look good, but I know approximately jack about cmake.

Reviewed-by: Ian Romanick 

On 05/22/2014 07:53 PM, Brian Paul wrote:
> So that we can share some of the code with wglinfo.
> ---
>  src/xdemos/CMakeLists.txt  |4 +-
>  src/xdemos/Makefile.am |4 +
>  src/xdemos/glinfo_common.c |  649 
> 
>  src/xdemos/glinfo_common.h |   89 ++
>  src/xdemos/glxinfo.c   |  647 +--
>  5 files changed, 759 insertions(+), 634 deletions(-)
>  create mode 100644 src/xdemos/glinfo_common.c
>  create mode 100644 src/xdemos/glinfo_common.h
> 
> diff --git a/src/xdemos/CMakeLists.txt b/src/xdemos/CMakeLists.txt
> index ee8b12d..97329fe 100644
> --- a/src/xdemos/CMakeLists.txt
> +++ b/src/xdemos/CMakeLists.txt
> @@ -34,7 +34,6 @@ set (targets
>   glxgears_fbconfig
>   glxgears_pixmap
>   glxheads
> - glxinfo
>   glxpbdemo
>   glxpixmap
>   glxsnoop
> @@ -73,5 +72,6 @@ target_link_libraries (${subdir}_sharedtex_mt pthread)
>  
>  add_executable (corender corender.c ipc.c) 
>  add_executable (xrotfontdemo xrotfontdemo.c xuserotfont.c)
> +add_executable (glxinfo glxinfo.c glinfo_common.c)
>  
> -install (TARGETS corender xrotfontdemo DESTINATION demos)
> +install (TARGETS glxinfo corender xrotfontdemo DESTINATION demos)
> diff --git a/src/xdemos/Makefile.am b/src/xdemos/Makefile.am
> index 373e7c2..0bdf13d 100644
> --- a/src/xdemos/Makefile.am
> +++ b/src/xdemos/Makefile.am
> @@ -77,6 +77,10 @@ xrotfontdemo_SOURCES = \
>   xuserotfont.c \
>   xuserotfont.h
>  
> +glxinfo_SOURCES = \
> + glxinfo.c \
> + glinfo_common.c
> +
>  glthreads_LDADD = -lpthread
>  glxgears_fbconfig_LDADD = libpbutil.la
>  pbdemo_LDADD = libpbutil.la
> diff --git a/src/xdemos/glinfo_common.c b/src/xdemos/glinfo_common.c
> new file mode 100644
> index 000..e6517d7
> --- /dev/null
> +++ b/src/xdemos/glinfo_common.c
> @@ -0,0 +1,649 @@
> +/*
> + * Copyright (C) 1999-2014  Brian Paul   All Rights Reserved.
> + * 
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + * 
> + * The above copyright notice and this permission notice shall be included
> + * in all copies or substantial portions of the Software.
> + * 
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 
> MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
> + * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
> + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "glinfo_common.h"
> +
> +
> +/**
> + * Return the GL enum name for a numeric value.
> + * We really only care about the compressed texture formats for now.
> + */
> +static const char *
> +enum_name(GLenum val)
> +{
> +   static const struct {
> +  const char *name;
> +  GLenum val;
> +   } enums [] = {
> +  { "GL_COMPRESSED_ALPHA", 0x84E9 },
> +  { "GL_COMPRESSED_LUMINANCE", 0x84EA },
> +  { "GL_COMPRESSED_LUMINANCE_ALPHA", 0x84EB },
> +  { "GL_COMPRESSED_INTENSITY", 0x84EC },
> +  { "GL_COMPRESSED_RGB", 0x84ED },
> +  { "GL_COMPRESSED_RGBA", 0x84EE },
> +  { "GL_COMPRESSED_TEXTURE_FORMATS", 0x86A3 },
> +  { "GL_COMPRESSED_RGB", 0x84ED },
> +  { "GL_COMPRESSED_RGBA", 0x84EE },
> +  { "GL_COMPRESSED_TEXTURE_FORMATS", 0x86A3 },
> +  { "GL_COMPRESSED_ALPHA", 0x84E9 },
> +  { "GL_COMPRESSED_LUMINANCE", 0x84EA },
> +  { "GL_COMPRESSED_LUMINANCE_ALPHA", 0x84EB },
> +  { "GL_COMPRESSED_INTENSITY", 0x84EC },
> +  { "GL_COMPRESSED_SRGB", 0x8C48 },
> +  { "GL_COMPRESSED_SRGB_ALPHA", 0x8C49 },
> +  { "GL_COMPRESSED_SLUMINANCE", 0x8C4A },
> +  { "GL_COMPRESSED_SLUMINANCE_ALPHA", 0x8C4B },
> +  { "GL_COMPRESSED_RED", 0x8225 },
> +  { "GL_COMPRESSED_RG", 0x8226 },
> +  { "GL_COMPRESSED_RED_RGTC1", 0x8DBB },
> +  { "GL_COMPRESSED_SIGNED_RED_RGTC1", 0x8DBC },
> +  { "GL_COMPRESSED_RG_RGTC2", 0x8DBD },
> +  { "GL_COMPRESSED_SIGNED_RG_RGTC2", 0x8DBE },
> +  { "GL_COMPRESSED_RGB8_ETC2", 0x9274 },
> +  { "GL_COMPRESSED_SRGB8_ETC2", 0x9275 },
> +  { "GL_COMPRESSED_RGB8_PUNCHTHROUGH_ALPHA1_ETC2", 0x9276 },
> +  { "GL_COMPRESSED_SRGB8_PUNCHTHROUGH_ALPHA1_ETC2", 0x9277 },
> +  { "GL_COMPRESSED_RGBA8_ETC2_EAC", 0x9278 },
> +  { "GL_C

Re: [Mesa-dev] Mesa IR as a list of instructions

[Ian Romanick]

On 05/28/2014 11:37 AM, Eric Anholt wrote:
> Here's a series I started back in January as a little experiment.
> Basically, I feel guilty for pushing GLSL IR into the driver, and wish I'd
> just fixed up Mesa IR back in the day.  But, given that we're still
> feeding Mesa IR into drivers as well (ARB programs and fixed function
> vertex programs), it made me think: What if I fixed it up now, and got
> Mesa IR to the point that we could just garbage collect the GLSL IR input
> paths to drivers?
> 
> Mesa IR has a bunch of weaknesses that need to get sorted out if it's
> going to be useful:
> 
> - It's a single giant array of instructions, making modifications of the
>   instruction stream (instruction lowering, optimization, etc.) more
>   expensive in code and CPU time than it should be.
> - It doesn't have any variable declarations, so if you have dynamic array
>   indexing, optimization just shuts down (plus, no annotation on the
>   temps, so debugging is irritating).
> - It doesn't have integer instructions or anything else post-GLSL-1.30.
> - The optimization passes for it are totally ad-hoc and fairly weak.
> - It's not SSA.
> 
> I'm interested in fixing all of these.  How do people feel about this
> goal?

I'm not very excited about exposing i915, r200, and swrast to more
potential breakage that nobody will notice until 5 minutes before a
release... or 5 mintues after.  Not wanting to touch prog_exec is one of
the reasons we avoided making changes to Mesa IR in the first place.

It also feels a bit like a re-invention of TGSI, and nobody seems
particularly enamored with that IR either.

That said, it may still be an interesting experiment.

Patches 1 - 4 and 6 - 9 are

Reviewed-by: Ian Romanick 

I need to look more closely at 5 and 10 - 16.

> This series fixes the first bullet point above.  Patch 15 is huge, but I
> didn't see a way to chop it up smaller without maintaining the list
> alongside the array for some intermediate patches.  I'd be willing to do
> so if needed, though, to make review doable.  You can also find the
> changes in the "mesa-ir" branch of my git tree.
> 
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Re: [Mesa-dev] [PATCH 11/21] glsl: Store ir_variable::ir_type in 8 bits instead of 32

[Ian Romanick]

On 05/27/2014 08:28 PM, Matt Turner wrote:
> On Tue, May 27, 2014 at 7:49 PM, Ian Romanick  wrote:
>> From: Ian Romanick 
>>
>> No change in the peak ir_variable memory usage in a trimmed apitrace of
>> dota2 on 64-bit.
>>
>> No change in the peak ir_variable memory usage in a trimmed apitrace of
>> dota2 on 32-bit.
>>
>> Signed-off-by: Ian Romanick 
>> ---
>>  src/glsl/ir.h | 5 +++--
>>  1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/src/glsl/ir.h b/src/glsl/ir.h
>> index 7faee74..bc02f6e 100644
>> --- a/src/glsl/ir.h
>> +++ b/src/glsl/ir.h
>> @@ -92,12 +92,13 @@ enum ir_node_type {
>>   */
>>  class ir_instruction : public exec_node {
>>  private:
>> -   enum ir_node_type ir_type;
>> +   uint8_t ir_type;
>>
>>  public:
>> inline enum ir_node_type get_ir_type() const
>> {
>> -  return this->ir_type;
>> +  STATIC_ASSERT(ir_type_max < 256);
>> +  return (enum ir_node_type) this->ir_type;
>> }
>>
>> /**
>> --
>> 1.8.1.4
> 
> Instead of doing this, you can mark the enum type with the PACKED
> attribute. I did this in a similar change in i965 already. See
> http://lists.freedesktop.org/archives/mesa-dev/2014-February/054643.html
> 
> This way we still get enum type checking and warnings out of switch
> statements and such.

Hmm... that would mean that patch 10 wouldn't strictly be necessary.
The disadvantage is that the next patch would need (right?) some changes
for MSVC, especially on 32-bit.  I think it would need to be

#if sizeof(ir_node_type) < sizeof(void *)
# define PADDING_BYTES (sizeof(void *) - sizeof(ir_node_type))
#else
# define PADDING_BYTES sizeof(void *)
#  if (__GNUC__ >= 3)
#error "GCC did us wrong."
#  endif
#endif

  uint8_t padding[PADDING_BYTES];

Seems a little sketchy, but might still be better... hmm...
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Re: [Mesa-dev] [PATCH 06/16] mesa: Fix a "1" vs "i" typo in MVP setup.

[Ian Romanick]

This should also get tagged for stable... probably 10.1 and 10.2.

On 05/28/2014 11:37 AM, Eric Anholt wrote:
> It doesn't matter, because the instructions were initialized to noop
> swizzles anyway.
> ---
>  src/mesa/program/programopt.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/mesa/program/programopt.c b/src/mesa/program/programopt.c
> index 92a8831..ee822be 100644
> --- a/src/mesa/program/programopt.c
> +++ b/src/mesa/program/programopt.c
> @@ -183,7 +183,7 @@ _mesa_insert_mvp_mad_code(struct gl_context *ctx, struct 
> gl_vertex_program *vpro
>newInst[i].SrcReg[1].Swizzle = SWIZZLE_NOOP;
>newInst[i].SrcReg[2].File = PROGRAM_TEMPORARY;
>newInst[i].SrcReg[2].Index = hposTemp;
> -  newInst[1].SrcReg[2].Swizzle = SWIZZLE_NOOP;
> +  newInst[i].SrcReg[2].Swizzle = SWIZZLE_NOOP;
> }
>  
> newInst[3].Opcode = OPCODE_MAD;
> 

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Re: [Mesa-dev] [PATCH 11/21] glsl: Store ir_variable::ir_type in 8 bits instead of 32

[Patrick Baggett]

On Wed, May 28, 2014 at 2:17 PM, Ian Romanick  wrote:

> On 05/27/2014 08:28 PM, Matt Turner wrote:
> > On Tue, May 27, 2014 at 7:49 PM, Ian Romanick 
> wrote:
> >> From: Ian Romanick 
> >>
> >> No change in the peak ir_variable memory usage in a trimmed apitrace of
> >> dota2 on 64-bit.
> >>
> >> No change in the peak ir_variable memory usage in a trimmed apitrace of
> >> dota2 on 32-bit.
> >>
> >> Signed-off-by: Ian Romanick 
> >> ---
> >>  src/glsl/ir.h | 5 +++--
> >>  1 file changed, 3 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/src/glsl/ir.h b/src/glsl/ir.h
> >> index 7faee74..bc02f6e 100644
> >> --- a/src/glsl/ir.h
> >> +++ b/src/glsl/ir.h
> >> @@ -92,12 +92,13 @@ enum ir_node_type {
> >>   */
> >>  class ir_instruction : public exec_node {
> >>  private:
> >> -   enum ir_node_type ir_type;
> >> +   uint8_t ir_type;
> >>
> >>  public:
> >> inline enum ir_node_type get_ir_type() const
> >> {
> >> -  return this->ir_type;
> >> +  STATIC_ASSERT(ir_type_max < 256);
> >> +  return (enum ir_node_type) this->ir_type;
> >> }
> >>
> >> /**
> >> --
> >> 1.8.1.4
> >
> > Instead of doing this, you can mark the enum type with the PACKED
> > attribute. I did this in a similar change in i965 already. See
> > http://lists.freedesktop.org/archives/mesa-dev/2014-February/054643.html
> >
> > This way we still get enum type checking and warnings out of switch
> > statements and such.
>
> Hmm... that would mean that patch 10 wouldn't strictly be necessary.
> The disadvantage is that the next patch would need (right?) some changes
> for MSVC, especially on 32-bit.  I think it would need to be
>
> #if sizeof(ir_node_type) < sizeof(void *)
>

I don't think the preprocessor can evaluate sizeof().


> # define PADDING_BYTES (sizeof(void *) - sizeof(ir_node_type))
> #else
> # define PADDING_BYTES sizeof(void *)
> #  if (__GNUC__ >= 3)
> #error "GCC did us wrong."
> #  endif
> #endif
>
>   uint8_t padding[PADDING_BYTES];
>
> Seems a little sketchy, but might still be better... hmm...
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Re: [Mesa-dev] [PATCH 17/21] glsl: Make ir_variable::num_state_slots and ir_variable::state_slots private

[Ian Romanick]

On 05/28/2014 07:22 AM, Tapani wrote:
> On 05/28/2014 05:49 AM, Ian Romanick wrote:
>> From: Ian Romanick 
>>
>> Also move num_state_slots inside ir_variable_data for better packing.
>>
>> The payoff for this will come in a few more patches.
>>
>> Signed-off-by: Ian Romanick 
> 
> looks good to me, also I've rebased my cache code on top of these
> particular changes and internal api introduced for state slots works fine;
> 
> Reviewed-by: Tapani Pälli 

Is that for just this patch, this and the preceeding patches in the
series, the whole series, or something else? :)

>> ---
>>   src/glsl/builtin_variables.cpp |  5 +--
>>   src/glsl/ir.h  | 56
>> ++
>>   src/glsl/ir_clone.cpp  | 13 ++
>>   src/glsl/ir_memory_usage.cpp   |  5 ++-
>>   src/glsl/linker.cpp|  7 ++--
>>   src/mesa/drivers/dri/i965/brw_fs.cpp   |  6 +--
>>   src/mesa/drivers/dri/i965/brw_shader.cpp   |  6 +--
>>   src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp |  6 +--
>>   src/mesa/program/ir_to_mesa.cpp| 14 +++
>>   src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 14 +++
>>   10 files changed, 75 insertions(+), 57 deletions(-)
>>
>> diff --git a/src/glsl/builtin_variables.cpp
>> b/src/glsl/builtin_variables.cpp
>> index 1461953..5878fbf 100644
>> --- a/src/glsl/builtin_variables.cpp
>> +++ b/src/glsl/builtin_variables.cpp
>> @@ -489,12 +489,9 @@ builtin_variable_generator::add_uniform(const
>> glsl_type *type,
>> &_mesa_builtin_uniform_desc[i];
>>const unsigned array_count = type->is_array() ? type->length : 1;
>> -   uni->num_state_slots = array_count * statevar->num_elements;
>>ir_state_slot *slots =
>> -  ralloc_array(uni, ir_state_slot, uni->num_state_slots);
>> -
>> -   uni->state_slots = slots;
>> +  uni->allocate_state_slots(array_count * statevar->num_elements);
>>for (unsigned a = 0; a < array_count; a++) {
>> for (unsigned j = 0; j < statevar->num_elements; j++) {
>> diff --git a/src/glsl/ir.h b/src/glsl/ir.h
>> index bfd790e..ab9f27b 100644
>> --- a/src/glsl/ir.h
>> +++ b/src/glsl/ir.h
>> @@ -538,6 +538,32 @@ public:
>> return this->max_ifc_array_access;
>>  }
>>   +   inline unsigned get_num_state_slots() const
>> +   {
>> +  return this->data._num_state_slots;
>> +   }
>> +
>> +   inline void set_num_state_slots(unsigned n)
>> +   {
>> +  this->data._num_state_slots = n;
>> +   }
>> +
>> +   inline ir_state_slot *get_state_slots()
>> +   {
>> +  return this->state_slots;
>> +   }
>> +
>> +   inline ir_state_slot *allocate_state_slots(unsigned n)
>> +   {
>> +  this->state_slots = ralloc_array(this, ir_state_slot, n);
>> +  this->data._num_state_slots = 0;
>> +
>> +  if (this->state_slots != NULL)
>> + this->data._num_state_slots = n;
>> +
>> +  return this->state_slots;
>> +   }
>> +
>>  /**
>>   * Enable emitting extension warnings for this variable
>>   */
>> @@ -723,6 +749,10 @@ public:
>> /** Image internal format if specified explicitly, otherwise
>> GL_NONE. */
>> uint16_t image_format;
>>   +   private:
>> +  unsigned _num_state_slots;/**< Number of state slots used */
>> +
>> +   public:
>> /**
>>  * Storage location of the base of this variable
>>  *
>> @@ -771,22 +801,6 @@ public:
>>  } data;
>>/**
>> -* Built-in state that backs this uniform
>> -*
>> -* Once set at variable creation, \c state_slots must remain
>> invariant.
>> -* This is because, ideally, this array would be shared by all
>> clones of
>> -* this variable in the IR tree.  In other words, we'd really like
>> for it
>> -* to be a fly-weight.
>> -*
>> -* If the variable is not a uniform, \c num_state_slots will be
>> zero and
>> -* \c state_slots will be \c NULL.
>> -*/
>> -   /*@{*/
>> -   unsigned num_state_slots;/**< Number of state slots used */
>> -   ir_state_slot *state_slots;  /**< State descriptors. */
>> -   /*@}*/
>> -
>> -   /**
>>   * Value assigned in the initializer of a variable declared "const"
>>   */
>>  ir_constant *constant_value;
>> @@ -818,6 +832,16 @@ private:
>>  unsigned *max_ifc_array_access;
>>/**
>> +* Built-in state that backs this uniform
>> +*
>> +* Once set at variable creation, \c state_slots must remain
>> invariant.
>> +*
>> +* If the variable is not a uniform, \c _num_state_slots will be
>> zero and
>> +* \c state_slots will be \c NULL.
>> +*/
>> +   ir_state_slot *state_slots;
>> +
>> +   /**
>>   * For variables that are in an interface block or are an
>> instance of an
>>   * interface block, this is the \c GLSL_TYPE_INTERFACE type for
>> that block.
>>   *
>> diff --git a/src/glsl/ir_clone.cpp b/src/glsl/ir_clone.cpp
>> index d594529..0cd35f0 100644
>> --- a/src/glsl/ir

Re: [Mesa-dev] [PATCH 11/21] glsl: Store ir_variable::ir_type in 8 bits instead of 32

[Ian Romanick]

On 05/28/2014 12:20 PM, Patrick Baggett wrote:
> On Wed, May 28, 2014 at 2:17 PM, Ian Romanick  > wrote:
> 
> On 05/27/2014 08:28 PM, Matt Turner wrote:
> > On Tue, May 27, 2014 at 7:49 PM, Ian Romanick  > wrote:
> >> From: Ian Romanick  >
> >>
> >> No change in the peak ir_variable memory usage in a trimmed
> apitrace of
> >> dota2 on 64-bit.
> >>
> >> No change in the peak ir_variable memory usage in a trimmed
> apitrace of
> >> dota2 on 32-bit.
> >>
> >> Signed-off-by: Ian Romanick  >
> >> ---
> >>  src/glsl/ir.h | 5 +++--
> >>  1 file changed, 3 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/src/glsl/ir.h b/src/glsl/ir.h
> >> index 7faee74..bc02f6e 100644
> >> --- a/src/glsl/ir.h
> >> +++ b/src/glsl/ir.h
> >> @@ -92,12 +92,13 @@ enum ir_node_type {
> >>   */
> >>  class ir_instruction : public exec_node {
> >>  private:
> >> -   enum ir_node_type ir_type;
> >> +   uint8_t ir_type;
> >>
> >>  public:
> >> inline enum ir_node_type get_ir_type() const
> >> {
> >> -  return this->ir_type;
> >> +  STATIC_ASSERT(ir_type_max < 256);
> >> +  return (enum ir_node_type) this->ir_type;
> >> }
> >>
> >> /**
> >> --
> >> 1.8.1.4
> >
> > Instead of doing this, you can mark the enum type with the PACKED
> > attribute. I did this in a similar change in i965 already. See
> >
> http://lists.freedesktop.org/archives/mesa-dev/2014-February/054643.html
> >
> > This way we still get enum type checking and warnings out of switch
> > statements and such.
> 
> Hmm... that would mean that patch 10 wouldn't strictly be necessary.
> The disadvantage is that the next patch would need (right?) some changes
> for MSVC, especially on 32-bit.  I think it would need to be
> 
> #if sizeof(ir_node_type) < sizeof(void *)
> 
> 
> I don't think the preprocessor can evaluate sizeof().

Yes, of course.  Ugh. :(

> # define PADDING_BYTES (sizeof(void *) - sizeof(ir_node_type))
> #else
> # define PADDING_BYTES sizeof(void *)
> #  if (__GNUC__ >= 3)
> #error "GCC did us wrong."
> #  endif
> #endif
> 
>   uint8_t padding[PADDING_BYTES];
> 
> Seems a little sketchy, but might still be better... hmm...
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Re: [Mesa-dev] [PATCH 11/21] glsl: Store ir_variable::ir_type in 8 bits instead of 32

[Ian Romanick]

On 05/28/2014 12:17 PM, Ian Romanick wrote:
> On 05/27/2014 08:28 PM, Matt Turner wrote:
>> On Tue, May 27, 2014 at 7:49 PM, Ian Romanick  wrote:
>>> From: Ian Romanick 
>>>
>>> No change in the peak ir_variable memory usage in a trimmed apitrace of
>>> dota2 on 64-bit.
>>>
>>> No change in the peak ir_variable memory usage in a trimmed apitrace of
>>> dota2 on 32-bit.
>>>
>>> Signed-off-by: Ian Romanick 
>>> ---
>>>  src/glsl/ir.h | 5 +++--
>>>  1 file changed, 3 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/src/glsl/ir.h b/src/glsl/ir.h
>>> index 7faee74..bc02f6e 100644
>>> --- a/src/glsl/ir.h
>>> +++ b/src/glsl/ir.h
>>> @@ -92,12 +92,13 @@ enum ir_node_type {
>>>   */
>>>  class ir_instruction : public exec_node {
>>>  private:
>>> -   enum ir_node_type ir_type;
>>> +   uint8_t ir_type;
>>>
>>>  public:
>>> inline enum ir_node_type get_ir_type() const
>>> {
>>> -  return this->ir_type;
>>> +  STATIC_ASSERT(ir_type_max < 256);
>>> +  return (enum ir_node_type) this->ir_type;
>>> }
>>>
>>> /**
>>> --
>>> 1.8.1.4
>>
>> Instead of doing this, you can mark the enum type with the PACKED
>> attribute. I did this in a similar change in i965 already. See
>> http://lists.freedesktop.org/archives/mesa-dev/2014-February/054643.html
>>
>> This way we still get enum type checking and warnings out of switch
>> statements and such.
> 
> Hmm... that would mean that patch 10 wouldn't strictly be necessary.
> The disadvantage is that the next patch would need (right?) some changes
> for MSVC, especially on 32-bit.  I think it would need to be
> 
> #if sizeof(ir_node_type) < sizeof(void *)
> # define PADDING_BYTES (sizeof(void *) - sizeof(ir_node_type))
> #else
> # define PADDING_BYTES sizeof(void *)
> #  if (__GNUC__ >= 3)
> #error "GCC did us wrong."
> #  endif
> #endif
> 
>   uint8_t padding[PADDING_BYTES];

After Patrick pointed out my obvious lack of C preprocessor skills, I
think the only alternative is:

   uint8_t padding[sizeof(ir_node_type) < sizeof(void *)
   ? sizeof(void *) - sizeof(ir_node_type)
   : sizeof(void *)];

I'd probably hide that with a #define and a big comment, but it's
still a bit ugly.

> Seems a little sketchy, but might still be better... hmm...
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Re: [Mesa-dev] [PATCH 2/3] i965: Add runtime checks for line antialiasing in Gen < 6.

[Kenneth Graunke]

On 05/27/2014 03:50 AM, Iago Toral Quiroga wrote:
> In Gen < 6 the hardware generates a runtime bit that indicates whether AA data
> has to be sent as part of the framebuffer write SEND message. This affects the
> specific case where we have setup antialiased line rendering and we render
> polygons which have one face setup in GL_LINE mode (line antialiasing
> will be used) and the other one in GL_FILL mode (no line antialiasing needed).
> 
> Currently we are not doing this runtime test and instead we always send AA
> data, which produces incorrect rendering of the GL_FILL face of the polygon in
> in the aforementioned scenario (verified in ironlake and gm45).
> 
> In Gen4 this is, likely, a regression introduced with commit 098acf6c843. In
> Gen5 this has never worked properly. Gen > 5 are not affected by this.
> 
> The patch fixes the problem by adding the appropriate runtime check and
> adjusting the framebuffer write message accordingly in the conflictive
> scenario (detected with fs_visitor::runtime_check_aads_emit == TRUE).
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78679
> ---
>  src/mesa/drivers/dri/i965/brw_fs.h   |  4 ++
>  src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 86 
> +---
>  2 files changed, 58 insertions(+), 32 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
> b/src/mesa/drivers/dri/i965/brw_fs.h
> index 60a4906..ab8912f 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> @@ -452,6 +452,10 @@ public:
>  
> void emit_color_write(int target, int index, int first_color_mrf);
> void emit_alpha_test();
> +   void do_emit_fb_write(int target, int base_mrf, int mlen, bool eot,
> + bool header_present);
> +   void emit_fb_write(int target, int base_mrf, int mlen, bool eot,
> +  bool header_present);
> void emit_fb_writes();
>  
> void emit_shader_time_begin();
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> index 171f063..4c3897b 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> @@ -2731,6 +2731,54 @@ fs_visitor::emit_alpha_test()
>  }
>  
>  void
> +fs_visitor::do_emit_fb_write(int target, int base_mrf, int mlen, bool eot,
> + bool header_present)
> +{
> +   fs_inst *inst = emit(FS_OPCODE_FB_WRITE);
> +   inst->target = target;
> +   inst->base_mrf = base_mrf;
> +   inst->mlen = mlen;
> +   inst->eot = eot;
> +   inst->header_present = header_present;
> +   if ((brw->gen >= 8 || brw->is_haswell) && fp->UsesKill) {
> +  inst->predicate = BRW_PREDICATE_NORMAL;
> +  inst->flag_subreg = 1;
> +   }
> +}
> +
> +void
> +fs_visitor::emit_fb_write(int target, int base_mrf, int mlen, bool eot,
> +  bool header_present)
> +{
> +   if (!runtime_check_aads_emit) {
> +  do_emit_fb_write(target, base_mrf, mlen, eot, header_present);
> +   } else {
> +  /* This can only happen in Gen < 6
> +   */
> +  fs_reg reg_tmp_ud = fs_reg(this, glsl_type::uint_type);
> +  emit(AND(reg_tmp_ud,
> +   fs_reg(get_element_ud(brw_vec8_grf(1,0), 6)),

I think

retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_UD)

might be a little clearer than:

get_element_ud(brw_vec8_grf(1,0), 6))

since it just refers to r1.6 right away, rather than r1.0 modified to
have a suboffset of 6.

> +   fs_reg(brw_imm_ud(1<<26;
> +  emit(CMP(reg_null_ud,
> +   reg_tmp_ud,
> +   fs_reg(brw_imm_ud(0)),
> +   BRW_CONDITIONAL_Z));

You can actually generate a flag condition directly from the AND
instruction, and eliminate the CMP:

fs_inst *inst =
   emit(AND(reg_null_ud,
fs_reg(retype(brw_vec1_grf(1, 6), BRW_REGISTER_TYPE_UD),
fs_reg(0)));
inst->conditional_mod = BRW_CONDITIONAL_Z;

(you might have to use vec1(retype(brw_null_reg), BRW_REGISTER_TYPE_UD),
rather than reg_null_ud.)

> +  emit(IF(BRW_PREDICATE_NORMAL));
> +  {
> + /* Shift message header one register since we are not sending
> +  * AA data stored in base_mrf+2
> +  */
> + do_emit_fb_write(target, base_mrf + 1, mlen - 1, eot, 
> header_present);
> +  }
> +  emit(BRW_OPCODE_ELSE);
> +  {
> + do_emit_fb_write(target, base_mrf, mlen, eot, header_present);
> +  }
> +  emit(BRW_OPCODE_ENDIF);

I suppose this probably works, but I've never seen a program end with an
ENDIF.  I'm not really comfortable with doing that, since the ENDIF
should never be executed.  With JMPI or ADD brw_ip_reg(), we'd just jump
over one instruction and then execute one FB write or the other, which
seems really straightforward.

But, looking at the bug, I see you tried both of those suggestions, and
it didn't work for some reason.  Huh.  It really should...maybe I can
look into why...

Re: [Mesa-dev] [PATCH 11/21] glsl: Store ir_variable::ir_type in 8 bits instead of 32

[Ilia Mirkin]

On Wed, May 28, 2014 at 3:39 PM, Ian Romanick  wrote:
> On 05/28/2014 12:17 PM, Ian Romanick wrote:
>> On 05/27/2014 08:28 PM, Matt Turner wrote:
>>> On Tue, May 27, 2014 at 7:49 PM, Ian Romanick  wrote:
 From: Ian Romanick 

 No change in the peak ir_variable memory usage in a trimmed apitrace of
 dota2 on 64-bit.

 No change in the peak ir_variable memory usage in a trimmed apitrace of
 dota2 on 32-bit.

 Signed-off-by: Ian Romanick 
 ---
  src/glsl/ir.h | 5 +++--
  1 file changed, 3 insertions(+), 2 deletions(-)

 diff --git a/src/glsl/ir.h b/src/glsl/ir.h
 index 7faee74..bc02f6e 100644
 --- a/src/glsl/ir.h
 +++ b/src/glsl/ir.h
 @@ -92,12 +92,13 @@ enum ir_node_type {
   */
  class ir_instruction : public exec_node {
  private:
 -   enum ir_node_type ir_type;
 +   uint8_t ir_type;

  public:
 inline enum ir_node_type get_ir_type() const
 {
 -  return this->ir_type;
 +  STATIC_ASSERT(ir_type_max < 256);
 +  return (enum ir_node_type) this->ir_type;
 }

 /**
 --
 1.8.1.4
>>>
>>> Instead of doing this, you can mark the enum type with the PACKED
>>> attribute. I did this in a similar change in i965 already. See
>>> http://lists.freedesktop.org/archives/mesa-dev/2014-February/054643.html
>>>
>>> This way we still get enum type checking and warnings out of switch
>>> statements and such.
>>
>> Hmm... that would mean that patch 10 wouldn't strictly be necessary.
>> The disadvantage is that the next patch would need (right?) some changes
>> for MSVC, especially on 32-bit.  I think it would need to be
>>
>> #if sizeof(ir_node_type) < sizeof(void *)
>> # define PADDING_BYTES (sizeof(void *) - sizeof(ir_node_type))
>> #else
>> # define PADDING_BYTES sizeof(void *)
>> #  if (__GNUC__ >= 3)
>> #error "GCC did us wrong."
>> #  endif
>> #endif
>>
>>   uint8_t padding[PADDING_BYTES];
>
> After Patrick pointed out my obvious lack of C preprocessor skills, I
> think the only alternative is:
>
>uint8_t padding[sizeof(ir_node_type) < sizeof(void *)
>? sizeof(void *) - sizeof(ir_node_type)
>: sizeof(void *)];
>
> I'd probably hide that with a #define and a big comment, but it's
> still a bit ugly.

Just a thought:

union {
  enum ir_node_type type;
  char *padding;
}

And start at padding[sizeof(type)]. Or you could do something a little
uglier like

union {
  struct {
enum ir_node_type type;
char data[0];
  }
  void *padding;
}

And then I think that data should point at the right place. BTW, all
of the above is untested... I could imagine that e.g. struct creates
funny alignment requirements... but you could pack it.

  -ilia
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Re: [Mesa-dev] [PATCH v2 3/4] glsl/tests: call create_test_cases.py in optimization-test

[Kenneth Graunke]

On 05/27/2014 06:23 PM, Connor Abbott wrote:
> This way, when someone modifies create_test_cases.py and forgets to
> commit their changes again, people will notice.
> 
> v2: make sure we parse the right directories and check for existance the
> right way.
> 
> Signed-off-by: Connor Abbott 
> ---
>  src/glsl/tests/optimization-test | 8 
>  1 file changed, 8 insertions(+)
> 
> diff --git a/src/glsl/tests/optimization-test 
> b/src/glsl/tests/optimization-test
> index 8ca7776..bf15153 100755
> --- a/src/glsl/tests/optimization-test
> +++ b/src/glsl/tests/optimization-test
> @@ -9,6 +9,14 @@ fi
>  total=0
>  pass=0
>  
> +echo "==   Generating tests  =="
> +for dir in tests/*/; do
> +if [ -e "${dir}create_test_cases.py" ]; then
> +cd $dir; python create_test_cases.py; cd ..

You want to use $PYTHON2 rather than "python" directly.  Otherwise, this
will break on distros like Arch which (against the Python Foundation's
recommendation), install Python 3 as /usr/bin/python.

With that fixed, this series is:
Reviewed-by: Kenneth Graunke 

It sounds like Matt may have some comments as well, so I'll hold off on
pushing these right away...

> +fi
> +echo "$dir"
> +done
> +
>  echo "== Testing optimization passes =="
>  for test in `find . -iname '*.opt_test'`; do
>  echo -n "Testing $test..."
> 



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Re: [Mesa-dev] [PATCH v2 3/4] glsl/tests: call create_test_cases.py in optimization-test

[Matt Turner]

On Wed, May 28, 2014 at 1:09 PM, Kenneth Graunke  wrote:
> On 05/27/2014 06:23 PM, Connor Abbott wrote:
>> This way, when someone modifies create_test_cases.py and forgets to
>> commit their changes again, people will notice.
>>
>> v2: make sure we parse the right directories and check for existance the
>> right way.
>>
>> Signed-off-by: Connor Abbott 
>> ---
>>  src/glsl/tests/optimization-test | 8 
>>  1 file changed, 8 insertions(+)
>>
>> diff --git a/src/glsl/tests/optimization-test 
>> b/src/glsl/tests/optimization-test
>> index 8ca7776..bf15153 100755
>> --- a/src/glsl/tests/optimization-test
>> +++ b/src/glsl/tests/optimization-test
>> @@ -9,6 +9,14 @@ fi
>>  total=0
>>  pass=0
>>
>> +echo "==   Generating tests  =="
>> +for dir in tests/*/; do
>> +if [ -e "${dir}create_test_cases.py" ]; then
>> +cd $dir; python create_test_cases.py; cd ..
>
> You want to use $PYTHON2 rather than "python" directly.  Otherwise, this
> will break on distros like Arch which (against the Python Foundation's
> recommendation), install Python 3 as /usr/bin/python.
>
> With that fixed, this series is:
> Reviewed-by: Kenneth Graunke 
>
> It sounds like Matt may have some comments as well, so I'll hold off on
> pushing these right away...

Nah, they're find with me. Nothing I can't change later if needed. The series is

Reviewed-by: Matt Turner 
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[Mesa-dev] [Bug 78318] [swrast] piglit glsl-kwin-blur-1 regression

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=78318

--- Comment #1 from Kenneth Graunke  ---
This is the first broken commit:

commit ca21cffebd063354291d561eadc2ded8795a5333
Author: Ian Romanick 
Date:   Tue Mar 25 18:34:31 2014 -0700

meta: Fix saving the program pipeline state

This code was broken in some odd ways before.  Too much state was being
saved, it was being restored in the wrong order, and in the wrong way.
The biggest problem was that the pipeline object was restored before
restoring the programs attached to the default pipeline.

Fixes a regression in the glean texgen test.

v3: Fairly significant re-write.  I think it's much cleaner now, and it
avoids a bug with some meta ops that use shaders (reported by Chia-I).

v4: Check Pipeline.Current against NULL instead of Pipeline.Default.
Suggested by Chia-I.

Signed-off-by: Ian Romanick 
Reviewed-by: Chia-I Wu 

The test passes with the previous commit.  With this commit, Mesa fails to
build due to a missing } in meta.c, but with that fixed, the test fails.

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[Mesa-dev] [Bug 79039] [TRACKER] Mesa 10.2 release tracker

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=79039

Kenneth Graunke  changed:

   What|Removed |Added

 Depends on|77161   |

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[Mesa-dev] [Bug 77161] [softpipe] piglit fbo-generatemipmap-cubemap S3TC_DXT1 regression

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=77161

Kenneth Graunke  changed:

   What|Removed |Added

 Blocks|79039   |

--- Comment #5 from Kenneth Graunke  ---
Removing from the blockers list due to Roland's comments.

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Re: [Mesa-dev] [PATCH 07/19] i965/fs: Add a function to resize fs_inst's sources array.

[Matt Turner]

On Wed, May 28, 2014 at 12:50 AM, Tapani Pälli  wrote:
> On 05/28/2014 04:47 AM, Matt Turner wrote:
>> ---
>>  src/mesa/drivers/dri/i965/brw_fs.cpp | 9 +
>>  src/mesa/drivers/dri/i965/brw_fs.h   | 2 ++
>>  2 files changed, 11 insertions(+)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
>> b/src/mesa/drivers/dri/i965/brw_fs.cpp
>> index f926d97..1f174d3 100644
>> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
>> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
>> @@ -111,6 +111,15 @@ fs_inst::fs_inst(const fs_inst &that)
>>this->src[i] = that.src[i];
>>  }
>>
>> +void
>> +fs_inst::resize_sources(uint8_t num_sources)
>> +{
>> +   if (this->sources != num_sources) {
>> +  this->src = reralloc(this, this->src, fs_reg, num_sources);
>> +  this->sources = num_sources;
>> +   }
>> +}
>> +
>
> This looks proper to me but it does not seem to be used anywhere by this
> series?

Hm. Nope. It's used in a later series that implements SSA.
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[Mesa-dev] [PATCH] mesa: Free the compiled shader IR after it has been linked.

[Eric Anholt]

If the shader compiled once, then we can compile it again.  Compiled
shaders almost always get used in just one program, so holding that
compiled IR until the program is freed is just a waste of memory.

On the other hand, if they are either reusing shader objects to compile
multiple times, or linking the same shader into multiple programs, we turn
off this memory savings hack to avoid spending CPU on recompiling.

Reduces peak memory allocation of glretrace of a trace of dolphin-emu by
5.5MB.  It seems like this should be a big deal to DOTA2, but it was
triggering RecompiledAnyShader, and I failed to see a benefit even if I
removed the RecompiledAnyShader check (which confuses me).
---
 src/mesa/main/mtypes.h  |  6 ++
 src/mesa/main/shaderapi.c   | 19 +++
 src/mesa/main/shaderapi.h   |  3 +++
 src/mesa/program/ir_to_mesa.cpp | 23 ++-
 4 files changed, 50 insertions(+), 1 deletion(-)

diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
index 917d071..79a1514 100644
--- a/src/mesa/main/mtypes.h
+++ b/src/mesa/main/mtypes.h
@@ -4210,6 +4210,12 @@ struct gl_context
/*@}*/
 
/**
+* Set if we've had to recompile any shaders in order to link them into a
+* new program after we'd freed their IR.
+*/
+   bool RecompiledAnyShaders;
+
+   /**
 * False if this context was created without a config. This is needed
 * because the initial state of glDrawBuffers depends on this
 */
diff --git a/src/mesa/main/shaderapi.c b/src/mesa/main/shaderapi.c
index 28739da..44e8db6 100644
--- a/src/mesa/main/shaderapi.c
+++ b/src/mesa/main/shaderapi.c
@@ -803,6 +803,8 @@ shader_source(struct gl_context *ctx, GLuint shader, const 
GLchar *source)
if (!sh)
   return;
 
+   _mesa_glsl_lazy_recompile_ir(ctx, sh);
+
/* free old shader source string and install new one */
free((void *)sh->Source);
sh->Source = source;
@@ -812,6 +814,23 @@ shader_source(struct gl_context *ctx, GLuint shader, const 
GLchar *source)
 #endif
 }
 
+/**
+ * Used to ensure that there is a valid set of IR in the program when we might
+ * have freed it after glLinkProgram() on the assumption that nobody would go
+ * looking for it again.
+*/
+void
+_mesa_glsl_lazy_recompile_ir(struct gl_context *ctx, struct gl_shader *sh)
+{
+   if (sh->ir || !sh->CompileStatus)
+  return;
+
+   _mesa_glsl_compile_shader(ctx, sh, false, false);
+   /* The recompile had better have succeeded! */
+   assert(sh->CompileStatus);
+
+   ctx->RecompiledAnyShaders = true;
+}
 
 /**
  * Compile a shader.
diff --git a/src/mesa/main/shaderapi.h b/src/mesa/main/shaderapi.h
index 17b05b3..4e6c31f 100644
--- a/src/mesa/main/shaderapi.h
+++ b/src/mesa/main/shaderapi.h
@@ -228,6 +228,9 @@ extern GLuint GLAPIENTRY
 _mesa_CreateShaderProgramv(GLenum type, GLsizei count,
const GLchar* const *strings);
 
+void
+_mesa_glsl_lazy_recompile_ir(struct gl_context *ctx, struct gl_shader *sh);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 59cf123..d4b66bf 100644
--- a/src/mesa/program/ir_to_mesa.cpp
+++ b/src/mesa/program/ir_to_mesa.cpp
@@ -3079,8 +3079,14 @@ _mesa_glsl_link_shader(struct gl_context *ctx, struct 
gl_shader_program *prog)
prog->LinkStatus = GL_TRUE;
 
for (i = 0; i < prog->NumShaders; i++) {
-  if (!prog->Shaders[i]->CompileStatus) {
+  struct gl_shader *sh = prog->Shaders[i];
+  if (!sh->CompileStatus) {
 linker_error(prog, "linking with uncompiled shader");
+  } else {
+ /* If we'd freed the compiled IR after a previous link in order to
+  * save memory, recreate it.
+  */
+ _mesa_glsl_lazy_recompile_ir(ctx, sh);
   }
}
 
@@ -3104,6 +3110,21 @@ _mesa_glsl_link_shader(struct gl_context *ctx, struct 
gl_shader_program *prog)
 fprintf(stderr, "%s\n", prog->InfoLog);
   }
}
+
+   /* Free the compiled shaders' IR now that they've been linked into a
+* program.  This saves memory in the common case of people using each
+* shader in one program, at the cost of needing to lazily recompile one
+* set of them if somebody does actually use the same gl_shader in multiple
+* gl_shader_programs.
+*/
+   if (prog->LinkStatus && !ctx->RecompiledAnyShaders) {
+  for (i = 0; i < prog->NumShaders; i++) {
+ struct gl_shader *sh = prog->Shaders[i];
+
+ ralloc_free(sh->ir);
+ sh->ir = NULL;
+  }
+   }
 }
 
 } /* extern "C" */
-- 
2.0.0.rc2

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Re: [Mesa-dev] [PATCH 06/16] mesa: Fix a "1" vs "i" typo in MVP setup.

[Eric Anholt]

Ian Romanick  writes:

> This should also get tagged for stable... probably 10.1 and 10.2.

Did you note the commit message where it said that it's a no-op change?


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Re: [Mesa-dev] Mesa IR as a list of instructions

[Eric Anholt]

Ian Romanick  writes:

> On 05/28/2014 11:37 AM, Eric Anholt wrote:
>> Here's a series I started back in January as a little experiment.
>> Basically, I feel guilty for pushing GLSL IR into the driver, and wish I'd
>> just fixed up Mesa IR back in the day.  But, given that we're still
>> feeding Mesa IR into drivers as well (ARB programs and fixed function
>> vertex programs), it made me think: What if I fixed it up now, and got
>> Mesa IR to the point that we could just garbage collect the GLSL IR input
>> paths to drivers?
>> 
>> Mesa IR has a bunch of weaknesses that need to get sorted out if it's
>> going to be useful:
>> 
>> - It's a single giant array of instructions, making modifications of the
>>   instruction stream (instruction lowering, optimization, etc.) more
>>   expensive in code and CPU time than it should be.
>> - It doesn't have any variable declarations, so if you have dynamic array
>>   indexing, optimization just shuts down (plus, no annotation on the
>>   temps, so debugging is irritating).
>> - It doesn't have integer instructions or anything else post-GLSL-1.30.
>> - The optimization passes for it are totally ad-hoc and fairly weak.
>> - It's not SSA.
>> 
>> I'm interested in fixing all of these.  How do people feel about this
>> goal?
>
> I'm not very excited about exposing i915, r200, and swrast to more
> potential breakage that nobody will notice until 5 minutes before a
> release... or 5 mintues after.  Not wanting to touch prog_exec is one of
> the reasons we avoided making changes to Mesa IR in the first place.

I have tested this on i915 and swrast (well, OK, I didn't retest swrast
after the last set of changes to fix i915).

i915 was quite an adventure.  If you screw up the optimization, more
programs fall back to sw, and then piglit tests start passing (because
i915's floats are so imprecise that tests fail when run on hardware)


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Re: [Mesa-dev] [PATCH 05/14] i965: Merge variable hashtables of fs and vec4 visitors

[Pohjolainen, Topi]

On Wed, May 28, 2014 at 10:46:42AM -0700, Matt Turner wrote:
> On Wed, May 28, 2014 at 10:43 AM, Matt Turner  wrote:
> > Doesn't backend_visitor need to have a destructor that calls 
> > hash_table_dtor?
> 
> Ah, next patch.

Good catch, it is a rebase error of mine. It definitely belongs here.
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Re: [Mesa-dev] [PATCH 09/19] i965/fs: Add SHADER_OPCODE_LOAD_PAYLOAD.

[Pohjolainen, Topi]

On Wed, May 28, 2014 at 10:06:03AM -0700, Matt Turner wrote:
> On Wed, May 28, 2014 at 7:43 AM, Pohjolainen, Topi
>  wrote:
> > On Tue, May 27, 2014 at 06:47:40PM -0700, Matt Turner wrote:
> >> Will be used to simplify the handling of large virtual GRFs in SSA form.
> >> ---
> >>  src/mesa/drivers/dri/i965/brw_defines.h|  2 ++
> >>  src/mesa/drivers/dri/i965/brw_fs.cpp   | 10 ++
> >>  src/mesa/drivers/dri/i965/brw_fs.h |  2 ++
> >>  src/mesa/drivers/dri/i965/brw_fs_generator.cpp |  3 +++
> >>  src/mesa/drivers/dri/i965/brw_shader.cpp   |  3 +++
> >>  5 files changed, 20 insertions(+)
> >>
> >> diff --git a/src/mesa/drivers/dri/i965/brw_defines.h 
> >> b/src/mesa/drivers/dri/i965/brw_defines.h
> >> index c38e447..34467e9 100644
> >> --- a/src/mesa/drivers/dri/i965/brw_defines.h
> >> +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> >> @@ -797,6 +797,8 @@ enum opcode {
> >> SHADER_OPCODE_TG4,
> >> SHADER_OPCODE_TG4_OFFSET,
> >>
> >> +   SHADER_OPCODE_LOAD_PAYLOAD,
> >> +
> >> SHADER_OPCODE_SHADER_TIME_ADD,
> >>
> >> SHADER_OPCODE_UNTYPED_ATOMIC,
> >> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
> >> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> >> index c86cb42..0856b6b 100644
> >> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> >> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> >> @@ -241,6 +241,16 @@ fs_visitor::CMP(fs_reg dst, fs_reg src0, fs_reg src1, 
> >> uint32_t condition)
> >> return inst;
> >>  }
> >>
> >> +fs_inst *
> >> +fs_visitor::LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources)
> >> +{
> >> +   fs_inst *inst = new(mem_ctx) fs_inst(SHADER_OPCODE_LOAD_PAYLOAD, dst, 
> >> src,
> >> +sources);
> >> +   inst->regs_written = sources;
> >> +
> >> +   return inst;
> >> +}
> >> +
> >>  exec_list
> >>  fs_visitor::VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
> >> const fs_reg &surf_index,
> >> diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
> >> b/src/mesa/drivers/dri/i965/brw_fs.h
> >> index 527c3f3..d0e459c 100644
> >> --- a/src/mesa/drivers/dri/i965/brw_fs.h
> >> +++ b/src/mesa/drivers/dri/i965/brw_fs.h
> >> @@ -338,6 +338,8 @@ public:
> >>  fs_inst *end,
> >>  const fs_reg ®);
> >>
> >> +   fs_inst *LOAD_PAYLOAD(const fs_reg &dst, fs_reg *src, int sources);
> >> +
> >> exec_list VARYING_PULL_CONSTANT_LOAD(const fs_reg &dst,
> >>  const fs_reg &surf_index,
> >>  const fs_reg &varying_offset,
> >> diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp 
> >> b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> >> index a5be0ec..26b963b 100644
> >> --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> >> +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> >> @@ -1713,6 +1713,9 @@ fs_generator::generate_code(exec_list *instructions,
> >>   generate_discard_jump(inst);
> >>   break;
> >>
> >> +  case SHADER_OPCODE_LOAD_PAYLOAD:
> >> + break;
> >> +
> >
> > Did I misunderstand but wasn't the idea to always lower this in the visitor
> > before generator? If that is the case then shouldn't this be dropped and let
> > the default case to issue an error?
> 
> I'll add an assert here confirming that it's never hit. Using the
> default case would yield an "Unsupported opcode" error message.

That makes sense. On my behalf it is then:

Reviewed-by: Topi Pohjolainen 
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Re: [Mesa-dev] [PATCH 12/19] i965/fs: Apply cube map array fixup and restore the payload.

[Chris Forbes]

It looks like the special handling of sources[0] in lowering
LOAD_PAYLOAD would break this -- or does it never see this?

On Wed, May 28, 2014 at 1:47 PM, Matt Turner  wrote:
> So that we don't have partial writes to a large VGRF. Will be cleaned up
> by register coalescing.
> ---
>  src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 15 ++-
>  1 file changed, 14 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> index 10ec254..b94141a 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
> @@ -1726,7 +1726,20 @@ fs_visitor::visit(ir_texture *ir)
>type->sampler_array) {
>   fs_reg depth = dst;
>   depth.reg_offset = 2;
> - emit_math(SHADER_OPCODE_INT_QUOTIENT, depth, depth, fs_reg(6));
> + fs_reg fixed_depth = fs_reg(this, glsl_type::int_type);
> + emit_math(SHADER_OPCODE_INT_QUOTIENT, fixed_depth, depth, 
> fs_reg(6));
> +
> + fs_reg *fixed_payload = ralloc_array(mem_ctx, fs_reg, 
> inst->regs_written);
> + fs_reg d = dst;
> + for (int i = 0; i < inst->regs_written; i++) {
> +if (i == 2) {
> +   fixed_payload[i] = fixed_depth;
> +} else {
> +   d.reg_offset = i;
> +   fixed_payload[i] = d;
> +}
> + }
> + emit(LOAD_PAYLOAD(dst, fixed_payload, inst->regs_written));
>}
> }
>
> --
> 1.8.3.2
>
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Re: [Mesa-dev] [PATCH 12/19] i965/fs: Apply cube map array fixup and restore the payload.

[Chris Forbes]

Oh, ignore that -- I had misread your lowering code.

On Thu, May 29, 2014 at 9:40 AM, Chris Forbes  wrote:
> It looks like the special handling of sources[0] in lowering
> LOAD_PAYLOAD would break this -- or does it never see this?
>
> On Wed, May 28, 2014 at 1:47 PM, Matt Turner  wrote:
>> So that we don't have partial writes to a large VGRF. Will be cleaned up
>> by register coalescing.
>> ---
>>  src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 15 ++-
>>  1 file changed, 14 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp 
>> b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
>> index 10ec254..b94141a 100644
>> --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
>> +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
>> @@ -1726,7 +1726,20 @@ fs_visitor::visit(ir_texture *ir)
>>type->sampler_array) {
>>   fs_reg depth = dst;
>>   depth.reg_offset = 2;
>> - emit_math(SHADER_OPCODE_INT_QUOTIENT, depth, depth, fs_reg(6));
>> + fs_reg fixed_depth = fs_reg(this, glsl_type::int_type);
>> + emit_math(SHADER_OPCODE_INT_QUOTIENT, fixed_depth, depth, 
>> fs_reg(6));
>> +
>> + fs_reg *fixed_payload = ralloc_array(mem_ctx, fs_reg, 
>> inst->regs_written);
>> + fs_reg d = dst;
>> + for (int i = 0; i < inst->regs_written; i++) {
>> +if (i == 2) {
>> +   fixed_payload[i] = fixed_depth;
>> +} else {
>> +   d.reg_offset = i;
>> +   fixed_payload[i] = d;
>> +}
>> + }
>> + emit(LOAD_PAYLOAD(dst, fixed_payload, inst->regs_written));
>>}
>> }
>>
>> --
>> 1.8.3.2
>>
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Re: [Mesa-dev] Mesa IR as a list of instructions

[Connor Abbott]

On Wed, May 28, 2014 at 2:37 PM, Eric Anholt  wrote:
> Here's a series I started back in January as a little experiment.
> Basically, I feel guilty for pushing GLSL IR into the driver, and wish I'd
> just fixed up Mesa IR back in the day.  But, given that we're still
> feeding Mesa IR into drivers as well (ARB programs and fixed function
> vertex programs), it made me think: What if I fixed it up now, and got
> Mesa IR to the point that we could just garbage collect the GLSL IR input
> paths to drivers?
>
> Mesa IR has a bunch of weaknesses that need to get sorted out if it's
> going to be useful:
>
> - It's a single giant array of instructions, making modifications of the
>   instruction stream (instruction lowering, optimization, etc.) more
>   expensive in code and CPU time than it should be.
> - It doesn't have any variable declarations, so if you have dynamic array
>   indexing, optimization just shuts down (plus, no annotation on the
>   temps, so debugging is irritating).
> - It doesn't have integer instructions or anything else post-GLSL-1.30.
> - The optimization passes for it are totally ad-hoc and fairly weak.
> - It's not SSA.
>
> I'm interested in fixing all of these.  How do people feel about this
> goal?

I don't know much about Mesa IR, but this seems like a huge pile of
work... is this any easier than just making GLSL IR flatter, like with
my flatland idea that I posted a while ago? Also, iirc, there was an
effort a while ago to make ARB programs go through GLSL IR but it was
abandoned - why was it so difficult? I'm skeptical that basically
bringing an older IR from 1999 to 2014 is going to be less effort than
modifying a newer one that had some good ideas and some bad ones.

By the way, correct me if I'm wrong, but I think you're still missing
a bullet point there. You've changed Mesa IR to be a list of
instructions, but it's still just one list. Ideally, you'd have both
the graph structure (the basic blocks) and the tree structure (if
statements and loops) available in the IR, since both of them are
going to be needed for different reasons, especially with converting
to SSA (or doing basically any non-trivial optimization). As of now,
GLSL IR has the former (I think Ian had some patches to introduce the
latter through an analysis pass as part of an experiment with
introducing def-use chains to GLSL IR...) but Mesa IR has neither - in
the end, I think it's much more practical to have a tree of if
statements and loops like in GLSL IR than a simple list of
instructions. Again, I don't think it's less effort than just fixing
GLSL IR.

>
> This series fixes the first bullet point above.  Patch 15 is huge, but I
> didn't see a way to chop it up smaller without maintaining the list
> alongside the array for some intermediate patches.  I'd be willing to do
> so if needed, though, to make review doable.  You can also find the
> changes in the "mesa-ir" branch of my git tree.
>
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Re: [Mesa-dev] [PATCH v2 3/4] glsl/tests: call create_test_cases.py in optimization-test

[Kenneth Graunke]

On 05/28/2014 01:17 PM, Matt Turner wrote:
> On Wed, May 28, 2014 at 1:09 PM, Kenneth Graunke  
> wrote:
>> On 05/27/2014 06:23 PM, Connor Abbott wrote:
>>> This way, when someone modifies create_test_cases.py and forgets to
>>> commit their changes again, people will notice.
>>>
>>> v2: make sure we parse the right directories and check for existance the
>>> right way.
>>>
>>> Signed-off-by: Connor Abbott 
>>> ---
>>>  src/glsl/tests/optimization-test | 8 
>>>  1 file changed, 8 insertions(+)
>>>
>>> diff --git a/src/glsl/tests/optimization-test 
>>> b/src/glsl/tests/optimization-test
>>> index 8ca7776..bf15153 100755
>>> --- a/src/glsl/tests/optimization-test
>>> +++ b/src/glsl/tests/optimization-test
>>> @@ -9,6 +9,14 @@ fi
>>>  total=0
>>>  pass=0
>>>
>>> +echo "==   Generating tests  =="
>>> +for dir in tests/*/; do
>>> +if [ -e "${dir}create_test_cases.py" ]; then
>>> +cd $dir; python create_test_cases.py; cd ..
>>
>> You want to use $PYTHON2 rather than "python" directly.  Otherwise, this
>> will break on distros like Arch which (against the Python Foundation's
>> recommendation), install Python 3 as /usr/bin/python.
>>
>> With that fixed, this series is:
>> Reviewed-by: Kenneth Graunke 
>>
>> It sounds like Matt may have some comments as well, so I'll hold off on
>> pushing these right away...
> 
> Nah, they're find with me. Nothing I can't change later if needed. The series 
> is
> 
> Reviewed-by: Matt Turner 

In that case...I fixed up the one $PYTHON2 thing and pushed them.

Thanks for doing this, Connor!




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[Mesa-dev] [Bug 79263] Linking error in egl_gallium.la when compiling 32 bit on multiarch

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=79263

--- Comment #3 from Emil Velikov  ---
Jose has pushed a patch that adds the symbol back, although it causes a
multiple definition of loader* as expected - bug 79382.

Proper fix is available http://patchwork.freedesktop.org/patch/26746/

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[Mesa-dev] [Bug 79382] build error: multiple definition of `loader_get_pci_id_for_fd'

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=79382

--- Comment #1 from Emil Velikov  ---
Does the following patch help ? http://patchwork.freedesktop.org/patch/26746/

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