[Mesa-dev] st/mesa depth mode + sampler

2012-01-29 Thread Dave Airlie
Hi guys,

on softpipe, the 2D sampler tests which use an ALPHA depthmode are
failing, now the reason seems to be that the texture sampling puts the
compare value into A and 0 into RGB, but the writemask only stores the
X component from R and doesn't take the fact that it should be using
A.

I'm not 100% sure where this should be fixed, so maybe someone who
knows how it was meant to work can enlighten me.

Dave.
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Re: [Mesa-dev] [PATCH] add wayland cflags when building wayland-egl

2012-01-29 Thread Benjamin Franzke
Thanks, commited.

2012/1/29  :
> From: Juan Zhao 
>
> to fix the header file missing when building wayland-egl
> ---
>  src/egl/wayland/wayland-egl/Makefile.am |    3 ++-
>  1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/src/egl/wayland/wayland-egl/Makefile.am 
> b/src/egl/wayland/wayland-egl/Makefile.am
> index a19a5fc..7d20a1a 100644
> --- a/src/egl/wayland/wayland-egl/Makefile.am
> +++ b/src/egl/wayland/wayland-egl/Makefile.am
> @@ -1,7 +1,8 @@
>  pkgconfigdir = $(libdir)/pkgconfig
>  pkgconfig_DATA = wayland-egl.pc
>
> -AM_CFLAGS = $(DEFINES)
> +AM_CFLAGS = $(DEFINES) \
> +           $(WAYLAND_CFLAGS)
>
>  lib_LTLIBRARIES = libwayland-egl.la
>  noinst_HEADERS = wayland-egl-priv.h
> --
> 1.7.2.2
>
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[Mesa-dev] [PATCH] mesa/format_unpack: add LUMINANCE 8/16 UINT/INT

2012-01-29 Thread Dave Airlie
From: Dave Airlie 

This just copies what the LUMINANCE_ALPHA bits do.

Fixes piglit tests on softpipe complaining about missing unpack.

Signed-off-by: Dave Airlie 
---
 src/mesa/main/format_unpack.c |   59 +
 1 files changed, 59 insertions(+), 0 deletions(-)

diff --git a/src/mesa/main/format_unpack.c b/src/mesa/main/format_unpack.c
index a2d8891..a4acdcc 100644
--- a/src/mesa/main/format_unpack.c
+++ b/src/mesa/main/format_unpack.c
@@ -2392,6 +2392,52 @@ unpack_int_rgba_LUMINANCE_UINT32(const GLuint *src, 
GLuint dst[][4], GLuint n)
}
 }
 
+
+static void
+unpack_int_rgba_LUMINANCE_UINT16(const GLushort *src, GLuint dst[][4], GLuint 
n)
+{
+   unsigned int i;
+
+   for (i = 0; i < n; i++) {
+  dst[i][0] = dst[i][1] = dst[i][2] = src[i * 2 + 0];
+  dst[i][3] = 1;
+   }
+}
+
+static void
+unpack_int_rgba_LUMINANCE_INT16(const GLshort *src, GLuint dst[][4], GLuint n)
+{
+   unsigned int i;
+
+   for (i = 0; i < n; i++) {
+  dst[i][0] = dst[i][1] = dst[i][2] = src[i * 2 + 0];
+  dst[i][3] = 1;
+   }
+}
+
+static void
+unpack_int_rgba_LUMINANCE_UINT8(const GLubyte *src, GLuint dst[][4], GLuint n)
+{
+   unsigned int i;
+
+   for (i = 0; i < n; i++) {
+  dst[i][0] = dst[i][1] = dst[i][2] = src[i * 2 + 0];
+  dst[i][3] = 1;
+   }
+}
+
+static void
+unpack_int_rgba_LUMINANCE_INT8(const GLbyte *src, GLuint dst[][4], GLuint n)
+{
+   unsigned int i;
+
+   for (i = 0; i < n; i++) {
+  dst[i][0] = dst[i][1] = dst[i][2] = src[i * 2 + 0];
+  dst[i][3] = 1;
+   }
+}
+
+
 static void
 unpack_int_rgba_LUMINANCE_ALPHA_UINT32(const GLuint *src, GLuint dst[][4], 
GLuint n)
 {
@@ -2618,6 +2664,19 @@ _mesa_unpack_uint_rgba_row(gl_format format, GLuint n,
case MESA_FORMAT_LUMINANCE_INT32:
   unpack_int_rgba_LUMINANCE_UINT32(src, dst, n);
   break;
+   case MESA_FORMAT_LUMINANCE_UINT16:
+  unpack_int_rgba_LUMINANCE_UINT16(src, dst, n);
+  break;
+   case MESA_FORMAT_LUMINANCE_INT16:
+  unpack_int_rgba_LUMINANCE_INT16(src, dst, n);
+  break;
+
+   case MESA_FORMAT_LUMINANCE_UINT8:
+  unpack_int_rgba_LUMINANCE_UINT8(src, dst, n);
+  break;
+   case MESA_FORMAT_LUMINANCE_INT8:
+  unpack_int_rgba_LUMINANCE_INT8(src, dst, n);
+  break;
 
case MESA_FORMAT_LUMINANCE_ALPHA_UINT32:
case MESA_FORMAT_LUMINANCE_ALPHA_INT32:
-- 
1.7.7.4

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[Mesa-dev] [PATCH 1/2] softpipe: don't attempt to blend integer formats.

2012-01-29 Thread Dave Airlie
From: Dave Airlie 

This blocks blending in the simple path, need to look at the more
complicated paths.

Signed-off-by: Dave Airlie 
---
 src/gallium/drivers/softpipe/sp_quad_blend.c |3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/src/gallium/drivers/softpipe/sp_quad_blend.c 
b/src/gallium/drivers/softpipe/sp_quad_blend.c
index d546b14..d2a5269 100644
--- a/src/gallium/drivers/softpipe/sp_quad_blend.c
+++ b/src/gallium/drivers/softpipe/sp_quad_blend.c
@@ -1155,7 +1155,8 @@ choose_blend_quad(struct quad_stage *qs,
 softpipe->blend->rt[0].colormask == 0xf &&
 softpipe->framebuffer.nr_cbufs == 1)
{
-  if (!blend->rt[0].blend_enable) {
+  if (!blend->rt[0].blend_enable ||
+ util_format_is_pure_integer(softpipe->framebuffer.cbufs[0]->format)) {
  qs->run = single_output_color;
   }
   else if (blend->rt[0].rgb_src_factor == blend->rt[0].alpha_src_factor &&
-- 
1.7.7.4

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[Mesa-dev] [PATCH 2/2] softpipe: don't alpha test when integer color buffer.

2012-01-29 Thread Dave Airlie
From: Dave Airlie 

This helps pass one of the texture integer tests.

Signed-off-by: Dave Airlie 
---
 src/gallium/drivers/softpipe/sp_quad_depth_test.c |4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/src/gallium/drivers/softpipe/sp_quad_depth_test.c 
b/src/gallium/drivers/softpipe/sp_quad_depth_test.c
index 529a5ad..e0c1fe4 100644
--- a/src/gallium/drivers/softpipe/sp_quad_depth_test.c
+++ b/src/gallium/drivers/softpipe/sp_quad_depth_test.c
@@ -776,7 +776,9 @@ depth_test_quads_fallback(struct quad_stage *qs,
data.use_shader_stencil_refs = FALSE;
 
if (qs->softpipe->depth_stencil->alpha.enabled) {
-  nr = alpha_test_quads(qs, quads, nr);
+  if (!(qs->softpipe->framebuffer.nr_cbufs &&
+
util_format_is_pure_integer(qs->softpipe->framebuffer.cbufs[0]->format)))
+nr = alpha_test_quads(qs, quads, nr);
}
 
if (qs->softpipe->framebuffer.zsbuf &&
-- 
1.7.7.4

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[Mesa-dev] [PATCH] st/dri: Support 24bit formats in dri2_allocate_buffer

2012-01-29 Thread Benjamin Franzke
Prior commit 576161289df68eedade591fbca4013329c9e5ded,
the parameter format was bpp, thus both 24bit and 32bit formats were
requested with format set to 32. Handle 24bit seperately now.

Fixes RGBX formats in wayland platform for egl_dri2 (EGL_ALPHA_SIZE=0).

Note: This is a candidate for the 8.0 branch.
---
 src/gallium/state_trackers/dri/drm/dri2.c |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/src/gallium/state_trackers/dri/drm/dri2.c 
b/src/gallium/state_trackers/dri/drm/dri2.c
index afd91ee..4c08a02 100644
--- a/src/gallium/state_trackers/dri/drm/dri2.c
+++ b/src/gallium/state_trackers/dri/drm/dri2.c
@@ -316,6 +316,9 @@ dri2_allocate_buffer(__DRIscreen *sPriv,
 
switch (format) {
   case 32:
+ pf = PIPE_FORMAT_B8G8R8A8_UNORM;
+ break;
+  case 24:
  pf = PIPE_FORMAT_B8G8R8X8_UNORM;
  break;
   case 16:
-- 
1.7.3.4

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[Mesa-dev] [PATCH] mesa: pack int from uint with clamping.

2012-01-29 Thread Dave Airlie
From: Dave Airlie 

if the test I wrote in piglit for sint-uint is correct, this fixes
things in one direction, reading a UINT32 buffer into a INT32 output.

The other case will need a bit more work.

Signed-off-by: Dave Airlie 
---
 src/mesa/main/pack.c |   11 +--
 1 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/src/mesa/main/pack.c b/src/mesa/main/pack.c
index d07e2aa..18848cf 100644
--- a/src/mesa/main/pack.c
+++ b/src/mesa/main/pack.c
@@ -461,6 +461,14 @@ get_type_min_max(GLenum type, GLfloat *min, GLfloat *max)
 #undef SRC_CONVERT
 #undef FN_NAME
 
+#define DST_TYPE GLint
+#define SRC_CONVERT(x) MIN2(x, 0x7fff)
+#define FN_NAME pack_int_from_uint_rgba
+#include "pack_tmp.h"
+#undef DST_TYPE
+#undef SRC_CONVERT
+#undef FN_NAME
+
 #define DST_TYPE GLushort
 #define SRC_CONVERT(x) MIN2(x, 0x)
 #define FN_NAME pack_ushort_from_uint_rgba
@@ -503,8 +511,7 @@ _mesa_pack_rgba_span_int(struct gl_context *ctx, GLuint n, 
GLuint rgba[][4],
   pack_uint_from_uint_rgba(dstAddr, dstFormat, rgba, n);
   break;
case GL_INT:
-  /* No conversion necessary. */
-  pack_uint_from_uint_rgba(dstAddr, dstFormat, rgba, n);
+  pack_int_from_uint_rgba(dstAddr, dstFormat, rgba, n);
   break;
case GL_UNSIGNED_SHORT:
   pack_ushort_from_uint_rgba(dstAddr, dstFormat, rgba, n);
-- 
1.7.7.4

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Re: [Mesa-dev] [PATCH] mesa/format_unpack: add LUMINANCE 8/16 UINT/INT

2012-01-29 Thread Brian Paul
On Sun, Jan 29, 2012 at 9:27 AM, Dave Airlie  wrote:
> From: Dave Airlie 
>
> This just copies what the LUMINANCE_ALPHA bits do.
>
> Fixes piglit tests on softpipe complaining about missing unpack.
>
> Signed-off-by: Dave Airlie 
> ---
>  src/mesa/main/format_unpack.c |   59 
> +
>  1 files changed, 59 insertions(+), 0 deletions(-)
>
> diff --git a/src/mesa/main/format_unpack.c b/src/mesa/main/format_unpack.c
> index a2d8891..a4acdcc 100644
> --- a/src/mesa/main/format_unpack.c
> +++ b/src/mesa/main/format_unpack.c
> @@ -2392,6 +2392,52 @@ unpack_int_rgba_LUMINANCE_UINT32(const GLuint *src, 
> GLuint dst[][4], GLuint n)
>    }
>  }
>
> +
> +static void
> +unpack_int_rgba_LUMINANCE_UINT16(const GLushort *src, GLuint dst[][4], 
> GLuint n)
> +{
> +   unsigned int i;
> +
> +   for (i = 0; i < n; i++) {
> +      dst[i][0] = dst[i][1] = dst[i][2] = src[i * 2 + 0];

I think the [i * 2 + 0] indexing is wrong.  If the source data is just
luminance, the index should be [i].


> +      dst[i][3] = 1;
> +   }
> +}
> +
> +static void
> +unpack_int_rgba_LUMINANCE_INT16(const GLshort *src, GLuint dst[][4], GLuint 
> n)
> +{
> +   unsigned int i;
> +
> +   for (i = 0; i < n; i++) {
> +      dst[i][0] = dst[i][1] = dst[i][2] = src[i * 2 + 0];
> +      dst[i][3] = 1;
> +   }
> +}
> +
> +static void
> +unpack_int_rgba_LUMINANCE_UINT8(const GLubyte *src, GLuint dst[][4], GLuint 
> n)
> +{
> +   unsigned int i;
> +
> +   for (i = 0; i < n; i++) {
> +      dst[i][0] = dst[i][1] = dst[i][2] = src[i * 2 + 0];
> +      dst[i][3] = 1;
> +   }
> +}
> +
> +static void
> +unpack_int_rgba_LUMINANCE_INT8(const GLbyte *src, GLuint dst[][4], GLuint n)
> +{
> +   unsigned int i;
> +
> +   for (i = 0; i < n; i++) {
> +      dst[i][0] = dst[i][1] = dst[i][2] = src[i * 2 + 0];
> +      dst[i][3] = 1;
> +   }
> +}
> +
> +
>  static void
>  unpack_int_rgba_LUMINANCE_ALPHA_UINT32(const GLuint *src, GLuint dst[][4], 
> GLuint n)
>  {
> @@ -2618,6 +2664,19 @@ _mesa_unpack_uint_rgba_row(gl_format format, GLuint n,
>    case MESA_FORMAT_LUMINANCE_INT32:
>       unpack_int_rgba_LUMINANCE_UINT32(src, dst, n);
>       break;
> +   case MESA_FORMAT_LUMINANCE_UINT16:
> +      unpack_int_rgba_LUMINANCE_UINT16(src, dst, n);
> +      break;
> +   case MESA_FORMAT_LUMINANCE_INT16:
> +      unpack_int_rgba_LUMINANCE_INT16(src, dst, n);
> +      break;
> +
> +   case MESA_FORMAT_LUMINANCE_UINT8:
> +      unpack_int_rgba_LUMINANCE_UINT8(src, dst, n);
> +      break;
> +   case MESA_FORMAT_LUMINANCE_INT8:
> +      unpack_int_rgba_LUMINANCE_INT8(src, dst, n);
> +      break;
>
>    case MESA_FORMAT_LUMINANCE_ALPHA_UINT32:
>    case MESA_FORMAT_LUMINANCE_ALPHA_INT32:
> --
> 1.7.7.4
>
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Re: [Mesa-dev] [PATCH 1/2] softpipe: don't attempt to blend integer formats.

2012-01-29 Thread Brian Paul
On Sun, Jan 29, 2012 at 9:35 AM, Dave Airlie  wrote:
> From: Dave Airlie 
>
> This blocks blending in the simple path, need to look at the more
> complicated paths.
>
> Signed-off-by: Dave Airlie 
> ---
>  src/gallium/drivers/softpipe/sp_quad_blend.c |    3 ++-
>  1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/src/gallium/drivers/softpipe/sp_quad_blend.c 
> b/src/gallium/drivers/softpipe/sp_quad_blend.c
> index d546b14..d2a5269 100644
> --- a/src/gallium/drivers/softpipe/sp_quad_blend.c
> +++ b/src/gallium/drivers/softpipe/sp_quad_blend.c
> @@ -1155,7 +1155,8 @@ choose_blend_quad(struct quad_stage *qs,
>             softpipe->blend->rt[0].colormask == 0xf &&
>             softpipe->framebuffer.nr_cbufs == 1)
>    {
> -      if (!blend->rt[0].blend_enable) {
> +      if (!blend->rt[0].blend_enable ||
> +         
> util_format_is_pure_integer(softpipe->framebuffer.cbufs[0]->format)) {
>          qs->run = single_output_color;
>       }
>       else if (blend->rt[0].rgb_src_factor == blend->rt[0].alpha_src_factor &&
> --

How about checking for integer color buffers in the state tracker and
turning off blending (and alpha test) there?

If you have integer buffers and try to enable blending with a hardware
driver, does hardware typically no-opt the blend or does the driver
have to disable blending?

-Brian
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[Mesa-dev] [Bug 45277] [bisected] Shading not working properly in Heroes of Newerth

2012-01-29 Thread bugzilla-daemon
https://bugs.freedesktop.org/show_bug.cgi?id=45277

maxi...@free.fr changed:

   What|Removed |Added

 CC||maxi...@free.fr

-- 
Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email
--- You are receiving this mail because: ---
You are the assignee for the bug.
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Re: [Mesa-dev] [PATCH 1/2] softpipe: don't attempt to blend integer formats.

2012-01-29 Thread Dave Airlie
On Sun, Jan 29, 2012 at 5:26 PM, Brian Paul  wrote:
> On Sun, Jan 29, 2012 at 9:35 AM, Dave Airlie  wrote:
>> From: Dave Airlie 
>>
>> This blocks blending in the simple path, need to look at the more
>> complicated paths.
>>
>> Signed-off-by: Dave Airlie 
>> ---
>>  src/gallium/drivers/softpipe/sp_quad_blend.c |    3 ++-
>>  1 files changed, 2 insertions(+), 1 deletions(-)
>>
>> diff --git a/src/gallium/drivers/softpipe/sp_quad_blend.c 
>> b/src/gallium/drivers/softpipe/sp_quad_blend.c
>> index d546b14..d2a5269 100644
>> --- a/src/gallium/drivers/softpipe/sp_quad_blend.c
>> +++ b/src/gallium/drivers/softpipe/sp_quad_blend.c
>> @@ -1155,7 +1155,8 @@ choose_blend_quad(struct quad_stage *qs,
>>             softpipe->blend->rt[0].colormask == 0xf &&
>>             softpipe->framebuffer.nr_cbufs == 1)
>>    {
>> -      if (!blend->rt[0].blend_enable) {
>> +      if (!blend->rt[0].blend_enable ||
>> +         
>> util_format_is_pure_integer(softpipe->framebuffer.cbufs[0]->format)) {
>>          qs->run = single_output_color;
>>       }
>>       else if (blend->rt[0].rgb_src_factor == blend->rt[0].alpha_src_factor 
>> &&
>> --
>
> How about checking for integer color buffers in the state tracker and
> turning off blending (and alpha test) there?
>
> If you have integer buffers and try to enable blending with a hardware
> driver, does hardware typically no-opt the blend or does the driver
> have to disable blending?

Just not sure about the case where you bind multiple color buffers,
some blendable, some integer (I think that is legal).

For r600 at least we have to set a blend bypass bit on the CB setup
for int types, similiar to what I'm doing here in softpipe really.

Dave.
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Re: [Mesa-dev] [PATCH] mesa/format_unpack: add LUMINANCE 8/16 UINT/INT

2012-01-29 Thread Dave Airlie
>
> I think the [i * 2 + 0] indexing is wrong.  If the source data is just
> luminance, the index should be [i].

doh, yes, will send a fixed version.

thanks,
Dave.
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Re: [Mesa-dev] [PATCH 1/2] softpipe: don't attempt to blend integer formats.

2012-01-29 Thread Dave Airlie
On Sun, Jan 29, 2012 at 5:51 PM, Dave Airlie  wrote:
> On Sun, Jan 29, 2012 at 5:26 PM, Brian Paul  wrote:
>> On Sun, Jan 29, 2012 at 9:35 AM, Dave Airlie  wrote:
>>> From: Dave Airlie 
>>>
>>> This blocks blending in the simple path, need to look at the more
>>> complicated paths.
>>>
>>> Signed-off-by: Dave Airlie 
>>> ---
>>>  src/gallium/drivers/softpipe/sp_quad_blend.c |    3 ++-
>>>  1 files changed, 2 insertions(+), 1 deletions(-)
>>>
>>> diff --git a/src/gallium/drivers/softpipe/sp_quad_blend.c 
>>> b/src/gallium/drivers/softpipe/sp_quad_blend.c
>>> index d546b14..d2a5269 100644
>>> --- a/src/gallium/drivers/softpipe/sp_quad_blend.c
>>> +++ b/src/gallium/drivers/softpipe/sp_quad_blend.c
>>> @@ -1155,7 +1155,8 @@ choose_blend_quad(struct quad_stage *qs,
>>>             softpipe->blend->rt[0].colormask == 0xf &&
>>>             softpipe->framebuffer.nr_cbufs == 1)
>>>    {
>>> -      if (!blend->rt[0].blend_enable) {
>>> +      if (!blend->rt[0].blend_enable ||
>>> +         
>>> util_format_is_pure_integer(softpipe->framebuffer.cbufs[0]->format)) {
>>>          qs->run = single_output_color;
>>>       }
>>>       else if (blend->rt[0].rgb_src_factor == blend->rt[0].alpha_src_factor 
>>> &&
>>> --
>>
>> How about checking for integer color buffers in the state tracker and
>> turning off blending (and alpha test) there?
>>
>> If you have integer buffers and try to enable blending with a hardware
>> driver, does hardware typically no-opt the blend or does the driver
>> have to disable blending?
>
> Just not sure about the case where you bind multiple color buffers,
> some blendable, some integer (I think that is legal).
>
> For r600 at least we have to set a blend bypass bit on the CB setup
> for int types, similiar to what I'm doing here in softpipe really.
>

So I'm not sure why we couldn't force rt[x] blending to 0 for all CBs
with integer formats, but if the gallium interface reflects the
hardware I see no real reason to do it that way, and at least for r600
hw seems to take per-MRT blend enable flags separate from CB blend
bypass.

Dave.
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[Mesa-dev] [PATCH 00/19] Remove all uses of the register mask

2012-01-29 Thread Marek Olšák
Hi everyone,

This is a cleanup in a series of cleanups I am going to make to improve the 
horribly over-engineered and slow state management of r600g. This particular 
patch series brings nothing new or special, it's merely a preparation for 
future work.

This series removes any uses of the register mask, which was used for partial 
updates of registers. These patches show that sometimes we used it even when we 
didn't have to, and the few cases that are valid can be handled separately 
without much effort anyway. The majority of registers don't need this feature.

Later on when we start using a more direct way to emit immutable states, we 
should be able to bypass r600_pipe_state and memcpy state vectors into the 
command stream directly. Getting rid of the register mask is a prerequisite for 
that.

There are no piglit regressions. Tested with RV670, RV730, and REDWOOD.

The patches are also available at:
  git://people.freedesktop.org/~mareko/mesa r600-kill-regmask

Please review.

Marek Olšák (19):
  r600g: don't use register mask for SQ_GPR_RESOURCE_MGMT_1
  r600g: rework and consolidate stencilref state setting
  r600g: cleanup setting DB_SHADER_CONTROL
  r600g: don't use register mask for DB_RENDER_CONTROL
  r600g: use a more clever way to disable per-vertex point size
  r600g: set full register mask for CB_COLOR_CONTROL on evergreen
  r600g: don't set CB_TARGET_MASK in set_framebuffer_state
  r600g: don't use register mask for CB_COLOR_CONTROL on r6xx-r7xx
  r600g: don't add PA_SC_LINE_STIPPLE to rasterizer_state
  r600g: don't use register mask for PA_SU_SC_MODE_CNTL
  r600g: set full register mask for PA_CL_CLIP_CNTL
  r600g: don't use register mask for PA_CL_VS_OUT_CNTL
  r600g: don't use register mask for PA_CL_CLIP_CNTL
  r600g: don't use register mask for TA_CNTL_AUX
  r600g: get rid of the mask parameter in pipe_state_add_reg
  r600g: get rid of the mask in r600_pipe_reg
  r600g: don't use r600_context_reg on evergreen
  r600g: don't use r600_context_reg on r6xx-r7xx
  r600g: get rid of r600_context_reg

 src/gallium/drivers/r600/evergreen_hw_context.c |   30 +-
 src/gallium/drivers/r600/evergreen_state.c  |  721 +++
 src/gallium/drivers/r600/r600.h |9 +-
 src/gallium/drivers/r600/r600_hw_context.c  |   75 +--
 src/gallium/drivers/r600/r600_hw_context_priv.h |5 +-
 src/gallium/drivers/r600/r600_pipe.h|   27 +-
 src/gallium/drivers/r600/r600_shader.c  |1 +
 src/gallium/drivers/r600/r600_shader.h  |1 +
 src/gallium/drivers/r600/r600_state.c   |  537 --
 src/gallium/drivers/r600/r600_state_common.c|  157 --
 10 files changed, 758 insertions(+), 805 deletions(-)

Marek
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[Mesa-dev] [PATCH 01/19] r600g: don't use register mask for SQ_GPR_RESOURCE_MGMT_1

2012-01-29 Thread Marek Olšák
---
 src/gallium/drivers/r600/r600_pipe.h  |1 +
 src/gallium/drivers/r600/r600_state.c |4 +++-
 2 files changed, 4 insertions(+), 1 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_pipe.h 
b/src/gallium/drivers/r600/r600_pipe.h
index 7d0d697..b4898a4 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -188,6 +188,7 @@ struct r600_pipe_context {
struct blitter_context  *blitter;
enum radeon_family  family;
enum chip_class chip_class;
+   unsignedr6xx_num_clause_temp_gprs;
void*custom_dsa_flush;
struct r600_screen  *screen;
struct radeon_winsys*ws;
diff --git a/src/gallium/drivers/r600/r600_state.c 
b/src/gallium/drivers/r600/r600_state.c
index 441802d..2530dfb 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1818,8 +1818,9 @@ void r600_adjust_gprs(struct r600_pipe_context *rctx)
tmp = 0;
tmp |= S_008C04_NUM_PS_GPRS(num_ps_gprs);
tmp |= S_008C04_NUM_VS_GPRS(num_vs_gprs);
+   tmp |= S_008C04_NUM_CLAUSE_TEMP_GPRS(rctx->r6xx_num_clause_temp_gprs);
rstate.nregs = 0;
-   r600_pipe_state_add_reg(&rstate, R_008C04_SQ_GPR_RESOURCE_MGMT_1, tmp, 
0x0FFF, NULL, 0);
+   r600_pipe_state_add_reg(&rstate, R_008C04_SQ_GPR_RESOURCE_MGMT_1, tmp, 
0x, NULL, 0);
 
r600_context_pipe_state_set(&rctx->ctx, &rstate);
 }
@@ -1997,6 +1998,7 @@ void r600_init_config(struct r600_pipe_context *rctx)
tmp |= S_008C04_NUM_PS_GPRS(num_ps_gprs);
tmp |= S_008C04_NUM_VS_GPRS(num_vs_gprs);
tmp |= S_008C04_NUM_CLAUSE_TEMP_GPRS(num_temp_gprs);
+   rctx->r6xx_num_clause_temp_gprs = num_temp_gprs;
r600_pipe_state_add_reg(rstate, R_008C04_SQ_GPR_RESOURCE_MGMT_1, tmp, 
0x, NULL, 0);
 
/* SQ_GPR_RESOURCE_MGMT_2 */
-- 
1.7.5.4

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[Mesa-dev] [PATCH 02/19] r600g: rework and consolidate stencilref state setting

2012-01-29 Thread Marek Olšák
Stop using the register mask.
---
 src/gallium/drivers/r600/evergreen_state.c   |   48 +++-
 src/gallium/drivers/r600/r600_pipe.h |   13 +-
 src/gallium/drivers/r600/r600_state.c|   48 +++-
 src/gallium/drivers/r600/r600_state_common.c |   60 ++
 4 files changed, 85 insertions(+), 84 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index 86d168c..97be6ca 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -799,20 +799,23 @@ static void *evergreen_create_dsa_state(struct 
pipe_context *ctx,
struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
struct r600_pipe_dsa *dsa = CALLOC_STRUCT(r600_pipe_dsa);
unsigned db_depth_control, alpha_test_control, alpha_ref, 
db_shader_control;
-   unsigned stencil_ref_mask, stencil_ref_mask_bf, db_render_override, 
db_render_control;
+   unsigned db_render_override, db_render_control;
struct r600_pipe_state *rstate;
 
if (dsa == NULL) {
return NULL;
}
 
+   dsa->valuemask[0] = state->stencil[0].valuemask;
+   dsa->valuemask[1] = state->stencil[1].valuemask;
+   dsa->writemask[0] = state->stencil[0].writemask;
+   dsa->writemask[1] = state->stencil[1].writemask;
+
rstate = &dsa->rstate;
 
rstate->id = R600_PIPE_STATE_DSA;
/* depth TODO some of those db_shader_control field depend on shader 
adjust mask & add it to shader */
db_shader_control = S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z);
-   stencil_ref_mask = 0;
-   stencil_ref_mask_bf = 0;
db_depth_control = S_028800_Z_ENABLE(state->depth.enabled) |
S_028800_Z_WRITE_ENABLE(state->depth.writemask) |
S_028800_ZFUNC(state->depth.func);
@@ -825,17 +828,12 @@ static void *evergreen_create_dsa_state(struct 
pipe_context *ctx,
db_depth_control |= 
S_028800_STENCILZPASS(r600_translate_stencil_op(state->stencil[0].zpass_op));
db_depth_control |= 
S_028800_STENCILZFAIL(r600_translate_stencil_op(state->stencil[0].zfail_op));
 
-
-   stencil_ref_mask = 
S_028430_STENCILMASK(state->stencil[0].valuemask) |
-   S_028430_STENCILWRITEMASK(state->stencil[0].writemask);
if (state->stencil[1].enabled) {
db_depth_control |= S_028800_BACKFACE_ENABLE(1);
db_depth_control |= 
S_028800_STENCILFUNC_BF(r600_translate_ds_func(state->stencil[1].func));
db_depth_control |= 
S_028800_STENCILFAIL_BF(r600_translate_stencil_op(state->stencil[1].fail_op));
db_depth_control |= 
S_028800_STENCILZPASS_BF(r600_translate_stencil_op(state->stencil[1].zpass_op));
db_depth_control |= 
S_028800_STENCILZFAIL_BF(r600_translate_stencil_op(state->stencil[1].zfail_op));
-   stencil_ref_mask_bf = 
S_028434_STENCILMASK_BF(state->stencil[1].valuemask) |
-   
S_028434_STENCILWRITEMASK_BF(state->stencil[1].writemask);
}
}
 
@@ -858,12 +856,6 @@ static void *evergreen_create_dsa_state(struct 
pipe_context *ctx,
r600_pipe_state_add_reg(rstate, R_028028_DB_STENCIL_CLEAR, 0x, 
0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_02802C_DB_DEPTH_CLEAR, 0x3F80, 
0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_028410_SX_ALPHA_TEST_CONTROL, 
alpha_test_control, 0x, NULL, 0);
-   r600_pipe_state_add_reg(rstate,
-   R_028430_DB_STENCILREFMASK, stencil_ref_mask,
-   0x & C_028430_STENCILREF, NULL, 0);
-   r600_pipe_state_add_reg(rstate,
-   R_028434_DB_STENCILREFMASK_BF, 
stencil_ref_mask_bf,
-   0x & C_028434_STENCILREF_BF, NULL, 0);
r600_pipe_state_add_reg(rstate, R_0286DC_SPI_FOG_CNTL, 0x, 
0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_028800_DB_DEPTH_CONTROL, 
db_depth_control, 0x, NULL, 0);
/* The DB_SHADER_CONTROL mask is 0xFFBC since Z_EXPORT_ENABLE,
@@ -1298,32 +1290,6 @@ static void evergreen_set_scissor_state(struct 
pipe_context *ctx,
r600_context_pipe_state_set(&rctx->ctx, rstate);
 }
 
-static void evergreen_set_stencil_ref(struct pipe_context *ctx,
-   const struct pipe_stencil_ref *state)
-{
-   struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
-   struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
-   u32 tmp;
-
-   if (rstate == NULL)
-   return;
-
-   rctx->stencil_ref = *state;
-   rstate->id = R600_PIPE_STATE_STENCIL_REF;
-   tmp = S_028430_STENCILREF(state->ref_value[0]);
-   

[Mesa-dev] [PATCH 03/19] r600g: cleanup setting DB_SHADER_CONTROL

2012-01-29 Thread Marek Olšák
---
 src/gallium/drivers/r600/evergreen_state.c |   20 
 src/gallium/drivers/r600/r600_state.c  |   19 +++
 2 files changed, 7 insertions(+), 32 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index 97be6ca..91d894d 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -798,7 +798,7 @@ static void *evergreen_create_dsa_state(struct pipe_context 
*ctx,
 {
struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
struct r600_pipe_dsa *dsa = CALLOC_STRUCT(r600_pipe_dsa);
-   unsigned db_depth_control, alpha_test_control, alpha_ref, 
db_shader_control;
+   unsigned db_depth_control, alpha_test_control, alpha_ref;
unsigned db_render_override, db_render_control;
struct r600_pipe_state *rstate;
 
@@ -814,8 +814,6 @@ static void *evergreen_create_dsa_state(struct pipe_context 
*ctx,
rstate = &dsa->rstate;
 
rstate->id = R600_PIPE_STATE_DSA;
-   /* depth TODO some of those db_shader_control field depend on shader 
adjust mask & add it to shader */
-   db_shader_control = S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z);
db_depth_control = S_028800_Z_ENABLE(state->depth.enabled) |
S_028800_Z_WRITE_ENABLE(state->depth.writemask) |
S_028800_ZFUNC(state->depth.func);
@@ -861,7 +859,6 @@ static void *evergreen_create_dsa_state(struct pipe_context 
*ctx,
/* The DB_SHADER_CONTROL mask is 0xFFBC since Z_EXPORT_ENABLE,
 * STENCIL_EXPORT_ENABLE and KILL_ENABLE are controlled by
 * evergreen_pipe_shader_ps().*/
-   r600_pipe_state_add_reg(rstate, R_02880C_DB_SHADER_CONTROL, 
db_shader_control, 0xFFBC, NULL, 0);
r600_pipe_state_add_reg(rstate, R_028000_DB_RENDER_CONTROL, 
db_render_control, 0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_02800C_DB_RENDER_OVERRIDE, 
db_render_override, 0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_028AC0_DB_SRESULTS_COMPARE_STATE0, 
0x0, 0x, NULL, 0);
@@ -2258,7 +2255,7 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, 
struct r600_pipe_shader
 
rstate->nregs = 0;
 
-   db_shader_control = 0;
+   db_shader_control = S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z);
for (i = 0; i < rshader->ninput; i++) {
/* evergreen NUM_INTERP only contains values interpolated into 
the LDS,
   POSITION goes via GPRs from the SC so isn't counted */
@@ -2391,14 +2388,9 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, 
struct r600_pipe_shader
r600_pipe_state_add_reg(rstate,
R_02884C_SQ_PGM_EXPORTS_PS,
exports_ps, 0x, NULL, 0);
-   /* only set some bits here, the other bits are set in the dsa state */
-   r600_pipe_state_add_reg(rstate,
-   R_02880C_DB_SHADER_CONTROL,
+   r600_pipe_state_add_reg(rstate, R_02880C_DB_SHADER_CONTROL,
db_shader_control,
-   S_02880C_Z_EXPORT_ENABLE(1) |
-   S_02880C_STENCIL_EXPORT_ENABLE(1) |
-   S_02880C_KILL_ENABLE(1),
-   NULL, 0);
+   0x, NULL, 0);
r600_pipe_state_add_reg(rstate,
R_03A200_SQ_LOOP_CONST_0, 0x01000FFF,
0x, NULL, 0);
@@ -2496,10 +2488,6 @@ void *evergreen_create_db_flush_dsa(struct 
r600_pipe_context *rctx)
 
rstate = rctx->context.create_depth_stencil_alpha_state(&rctx->context, 
&dsa);
r600_pipe_state_add_reg(rstate,
-   R_02880C_DB_SHADER_CONTROL,
-   0x0,
-   S_02880C_DUAL_EXPORT_ENABLE(1), NULL, 0);
-   r600_pipe_state_add_reg(rstate,
R_028000_DB_RENDER_CONTROL,
S_028000_DEPTH_COPY_ENABLE(1) |
S_028000_STENCIL_COPY_ENABLE(1) |
diff --git a/src/gallium/drivers/r600/r600_state.c 
b/src/gallium/drivers/r600/r600_state.c
index 57a1ca1..97c25f6 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -855,7 +855,7 @@ static void *r600_create_dsa_state(struct pipe_context *ctx,
 {
struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
struct r600_pipe_dsa *dsa = CALLOC_STRUCT(r600_pipe_dsa);
-   unsigned db_depth_control, alpha_test_control, alpha_ref, 
db_shader_control;
+   unsigned db_depth_control, alpha_test_control, alpha_ref;
unsigned db_render_override, db_render_control;
struct r600_pipe_state *rstate;
 
@@ -871,8 +871,6 @@ static void *r600_create_dsa_state(struct pipe_contex

[Mesa-dev] [PATCH 04/19] r600g: don't use register mask for DB_RENDER_CONTROL

2012-01-29 Thread Marek Olšák
We don't set the other bits anywhere else except the other DSA states,
which are mutually-exclusive with this one.
---
 src/gallium/drivers/r600/evergreen_state.c |4 +---
 src/gallium/drivers/r600/r600_state.c  |4 +---
 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index 91d894d..5aaf235 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2492,9 +2492,7 @@ void *evergreen_create_db_flush_dsa(struct 
r600_pipe_context *rctx)
S_028000_DEPTH_COPY_ENABLE(1) |
S_028000_STENCIL_COPY_ENABLE(1) |
S_028000_COPY_CENTROID(1),
-   S_028000_DEPTH_COPY_ENABLE(1) |
-   S_028000_STENCIL_COPY_ENABLE(1) |
-   S_028000_COPY_CENTROID(1), NULL, 0);
+   0x, NULL, 0);
return rstate;
 }
 
diff --git a/src/gallium/drivers/r600/r600_state.c 
b/src/gallium/drivers/r600/r600_state.c
index 97c25f6..6e0f26c 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -2284,9 +2284,7 @@ void *r600_create_db_flush_dsa(struct r600_pipe_context 
*rctx)
S_028D0C_DEPTH_COPY_ENABLE(1) |
S_028D0C_STENCIL_COPY_ENABLE(1) |
S_028D0C_COPY_CENTROID(1),
-   S_028D0C_DEPTH_COPY_ENABLE(1) |
-   S_028D0C_STENCIL_COPY_ENABLE(1) |
-   S_028D0C_COPY_CENTROID(1), NULL, 0);
+   0x, NULL, 0);
return rstate;
 }
 
-- 
1.7.5.4

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[Mesa-dev] [PATCH 05/19] r600g: use a more clever way to disable per-vertex point size

2012-01-29 Thread Marek Olšák
This uses point size clamping to force point size to a particular value,
making the vertex shader output irrelevant.
---
 src/gallium/drivers/r600/evergreen_state.c |   19 ---
 src/gallium/drivers/r600/r600_shader.c |1 +
 src/gallium/drivers/r600/r600_shader.h |1 +
 src/gallium/drivers/r600/r600_state.c  |   19 ---
 4 files changed, 26 insertions(+), 14 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index 5aaf235..57942fb 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -925,16 +925,19 @@ static void *evergreen_create_rs_state(struct 
pipe_context *ctx,
S_028814_POLY_MODE(polygon_dual_mode) |

S_028814_POLYMODE_FRONT_PTYPE(r600_translate_fill(state->fill_front)) |

S_028814_POLYMODE_BACK_PTYPE(r600_translate_fill(state->fill_back)), 
0x, NULL, 0);
-   r600_pipe_state_add_reg(rstate, R_02881C_PA_CL_VS_OUT_CNTL,
-   
S_02881C_USE_VTX_POINT_SIZE(state->point_size_per_vertex),
-   S_02881C_USE_VTX_POINT_SIZE(1), NULL, 0);
r600_pipe_state_add_reg(rstate, R_028820_PA_CL_NANINF_CNTL, 0x, 
0x, NULL, 0);
/* point size 12.4 fixed point */
tmp = (unsigned)(state->point_size * 8.0);
r600_pipe_state_add_reg(rstate, R_028A00_PA_SU_POINT_SIZE, 
S_028A00_HEIGHT(tmp) | S_028A00_WIDTH(tmp), 0x, NULL, 0);
 
-   psize_min = util_get_min_point_size(state);
-   psize_max = 8192;
+   if (state->point_size_per_vertex) {
+   psize_min = util_get_min_point_size(state);
+   psize_max = 8192;
+   } else {
+   /* Force the point size to be as if the vertex output was 
disabled. */
+   psize_min = state->point_size;
+   psize_max = state->point_size;
+   }
/* Divide by two, because 0.5 = 1 pixel. */
r600_pipe_state_add_reg(rstate, R_028A04_PA_SU_POINT_MINMAX,

S_028A04_MIN_SIZE(r600_pack_float_12p4(psize_min/2)) |
@@ -2458,10 +2461,12 @@ void evergreen_pipe_shader_vs(struct pipe_context *ctx, 
struct r600_pipe_shader
R_02881C_PA_CL_VS_OUT_CNTL,

S_02881C_VS_OUT_CCDIST0_VEC_ENA((rshader->clip_dist_write & 0x0F) != 0) |

S_02881C_VS_OUT_CCDIST1_VEC_ENA((rshader->clip_dist_write & 0xF0) != 0) |
-   
S_02881C_VS_OUT_MISC_VEC_ENA(rshader->vs_out_misc_write),
+   
S_02881C_VS_OUT_MISC_VEC_ENA(rshader->vs_out_misc_write) |
+   
S_02881C_USE_VTX_POINT_SIZE(rshader->vs_out_point_size),
S_02881C_VS_OUT_CCDIST0_VEC_ENA(1) |
S_02881C_VS_OUT_CCDIST1_VEC_ENA(1) |
-   S_02881C_VS_OUT_MISC_VEC_ENA(1),
+   S_02881C_VS_OUT_MISC_VEC_ENA(1) |
+   S_02881C_USE_VTX_POINT_SIZE(1),
NULL, 0);
 }
 
diff --git a/src/gallium/drivers/r600/r600_shader.c 
b/src/gallium/drivers/r600/r600_shader.c
index 08858e7..7011960 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -487,6 +487,7 @@ static int tgsi_declaration(struct r600_shader_ctx *ctx)
break;
case TGSI_SEMANTIC_PSIZE:
ctx->shader->vs_out_misc_write = 1;
+   ctx->shader->vs_out_point_size = 1;
break;
case TGSI_SEMANTIC_CLIPVERTEX:
ctx->clip_vertex_write = TRUE;
diff --git a/src/gallium/drivers/r600/r600_shader.h 
b/src/gallium/drivers/r600/r600_shader.h
index fd98d09..2d35e77 100644
--- a/src/gallium/drivers/r600/r600_shader.h
+++ b/src/gallium/drivers/r600/r600_shader.h
@@ -54,6 +54,7 @@ struct r600_shader {
unsignedclip_dist_write;
/* flag is set if the shader writes VS_OUT_MISC_VEC (e.g. for PSIZE) */
boolean vs_out_misc_write;
+   boolean vs_out_point_size;
 };
 
 #endif
diff --git a/src/gallium/drivers/r600/r600_state.c 
b/src/gallium/drivers/r600/r600_state.c
index 6e0f26c..98c22f6 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -980,16 +980,19 @@ static void *r600_create_rs_state(struct pipe_context 
*ctx,
S_028814_POLY_MODE(polygon_dual_mode) |

S_028814_POLYMODE_FRONT_PTYPE(r600_translate_fill(state->fill_front)) |

S_028814_POLYMODE_BACK_PTYPE(r600_translate_fill(state->fill_back)), 
0x, NULL, 0);
-   r600_pipe_state_add_reg(rstate, R_02881C_PA_CL_VS_OUT_CNTL,
-  

[Mesa-dev] [PATCH 06/19] r600g: set full register mask for CB_COLOR_CONTROL on evergreen

2012-01-29 Thread Marek Olšák
We don't set the other bits anywhere else.
---
 src/gallium/drivers/r600/evergreen_state.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index 57942fb..7fd3a36 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -750,7 +750,7 @@ static void *evergreen_create_blend_state(struct 
pipe_context *ctx,
blend->cb_target_mask = target_mask;

r600_pipe_state_add_reg(rstate, R_028808_CB_COLOR_CONTROL,
-   color_control, 0xFFFD, NULL, 0);
+   color_control, 0x, NULL, 0);
 
if (rctx->chip_class != CAYMAN)
r600_pipe_state_add_reg(rstate, R_028C3C_PA_SC_AA_MASK, 
0x, 0x, NULL, 0);
-- 
1.7.5.4

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[Mesa-dev] [PATCH 07/19] r600g: don't set CB_TARGET_MASK in set_framebuffer_state

2012-01-29 Thread Marek Olšák
It's emitted in draw_vbo, always.
---
 src/gallium/drivers/r600/evergreen_state.c |8 +---
 src/gallium/drivers/r600/r600_state.c  |7 +--
 2 files changed, 2 insertions(+), 13 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index 7fd3a36..9f9a6a1 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1523,7 +1523,7 @@ static void evergreen_set_framebuffer_state(struct 
pipe_context *ctx,
 {
struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
-   u32 shader_mask, tl, br, target_mask;
+   u32 shader_mask, tl, br;
int tl_x, tl_y, br_x, br_y;
 
if (rstate == NULL)
@@ -1548,11 +1548,8 @@ static void evergreen_set_framebuffer_state(struct 
pipe_context *ctx,
rctx->ctx.num_dest_buffers++;
}
 
-   target_mask = 0x;
-   target_mask = 0x;
shader_mask = 0;
for (int i = 0; i < state->nr_cbufs; i++) {
-   target_mask ^= 0xf << (i * 4);
shader_mask |= 0xf << (i * 4);
}
tl_x = 0;
@@ -1602,9 +1599,6 @@ static void evergreen_set_framebuffer_state(struct 
pipe_context *ctx,
r600_pipe_state_add_reg(rstate,
R_028230_PA_SC_EDGERULE, 0x,
0x, NULL, 0);
-
-   r600_pipe_state_add_reg(rstate, R_028238_CB_TARGET_MASK,
-   0x, target_mask, NULL, 0);
r600_pipe_state_add_reg(rstate, R_02823C_CB_SHADER_MASK,
shader_mask, 0x, NULL, 0);
 
diff --git a/src/gallium/drivers/r600/r600_state.c 
b/src/gallium/drivers/r600/r600_state.c
index 98c22f6..895d46e 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1593,7 +1593,7 @@ static void r600_set_framebuffer_state(struct 
pipe_context *ctx,
 {
struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
struct r600_pipe_state *rstate = CALLOC_STRUCT(r600_pipe_state);
-   u32 shader_mask, tl, br, shader_control, target_mask;
+   u32 shader_mask, tl, br, shader_control;
 
if (rstate == NULL)
return;
@@ -1616,12 +1616,9 @@ static void r600_set_framebuffer_state(struct 
pipe_context *ctx,
rctx->ctx.num_dest_buffers++;
}
 
-   target_mask = 0x;
-   target_mask = 0x;
shader_mask = 0;
shader_control = 0;
for (int i = 0; i < state->nr_cbufs; i++) {
-   target_mask ^= 0xf << (i * 4);
shader_mask |= 0xf << (i * 4);
shader_control |= 1 << i;
}
@@ -1663,8 +1660,6 @@ static void r600_set_framebuffer_state(struct 
pipe_context *ctx,
 
r600_pipe_state_add_reg(rstate, R_0287A0_CB_SHADER_CONTROL,
shader_control, 0x, NULL, 0);
-   r600_pipe_state_add_reg(rstate, R_028238_CB_TARGET_MASK,
-   0x, target_mask, NULL, 0);
r600_pipe_state_add_reg(rstate, R_02823C_CB_SHADER_MASK,
shader_mask, 0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_028C04_PA_SC_AA_CONFIG,
-- 
1.7.5.4

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[Mesa-dev] [PATCH 08/19] r600g: don't use register mask for CB_COLOR_CONTROL on r6xx-r7xx

2012-01-29 Thread Marek Olšák
---
 src/gallium/drivers/r600/r600_pipe.h |2 ++
 src/gallium/drivers/r600/r600_state.c|8 +---
 src/gallium/drivers/r600/r600_state_common.c |   14 ++
 3 files changed, 17 insertions(+), 7 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_pipe.h 
b/src/gallium/drivers/r600/r600_pipe.h
index 169d581..b7c5e55 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -116,6 +116,7 @@ struct r600_pipe_rasterizer {
 struct r600_pipe_blend {
struct r600_pipe_state  rstate;
unsignedcb_target_mask;
+   unsignedcb_color_control;
 };
 
 struct r600_pipe_dsa {
@@ -207,6 +208,7 @@ struct r600_pipe_context {
struct r600_pipe_resource_state fs_resource[PIPE_MAX_ATTRIBS];
struct pipe_framebuffer_state   framebuffer;
unsignedcb_target_mask;
+   unsignedcb_color_control;
/* for saving when using blitter */
struct pipe_stencil_ref stencil_ref;
struct pipe_viewport_state  viewport;
diff --git a/src/gallium/drivers/r600/r600_state.c 
b/src/gallium/drivers/r600/r600_state.c
index 895d46e..bb7690a 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -810,9 +810,7 @@ static void *r600_create_blend_state(struct pipe_context 
*ctx,
}
}
blend->cb_target_mask = target_mask;
-   /* MULTIWRITE_ENABLE is controlled by r600_pipe_shader_ps(). */
-   r600_pipe_state_add_reg(rstate, R_028808_CB_COLOR_CONTROL,
-   color_control, 0xFFFD, NULL, 0);
+   blend->cb_color_control = color_control;
 
for (int i = 0; i < 8; i++) {
/* state->rt entries > 0 only written if independent blending */
@@ -2155,10 +2153,6 @@ void r600_pipe_shader_ps(struct pipe_context *ctx, 
struct r600_pipe_shader *shad
r600_pipe_state_add_reg(rstate,
R_0288CC_SQ_PGM_CF_OFFSET_PS,
0x, 0x, NULL, 0);
-   r600_pipe_state_add_reg(rstate, R_028808_CB_COLOR_CONTROL,
-   
S_028808_MULTIWRITE_ENABLE(!!rshader->fs_write_all),
-   S_028808_MULTIWRITE_ENABLE(1),
-   NULL, 0);
/* only set some bits here, the other bits are set in the dsa state */
r600_pipe_state_add_reg(rstate, R_02880C_DB_SHADER_CONTROL,
db_shader_control,
diff --git a/src/gallium/drivers/r600/r600_state_common.c 
b/src/gallium/drivers/r600/r600_state_common.c
index 8bf5513..9833de0 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -73,6 +73,11 @@ void r600_bind_blend_state(struct pipe_context *ctx, void 
*state)
rstate = &blend->rstate;
rctx->states[rstate->id] = rstate;
rctx->cb_target_mask = blend->cb_target_mask;
+
+   /* Replace every bit except MULTIWRITE_ENABLE. */
+   rctx->cb_color_control &= ~C_028808_MULTIWRITE_ENABLE;
+   rctx->cb_color_control |= blend->cb_color_control & 
C_028808_MULTIWRITE_ENABLE;
+
r600_context_pipe_state_set(&rctx->ctx, rstate);
 }
 
@@ -326,6 +331,9 @@ void r600_bind_ps_shader(struct pipe_context *ctx, void 
*state)
rctx->ps_shader = (struct r600_pipe_shader *)state;
if (state) {
r600_context_pipe_state_set(&rctx->ctx, 
&rctx->ps_shader->rstate);
+
+   rctx->cb_color_control &= C_028808_MULTIWRITE_ENABLE;
+   rctx->cb_color_control |= 
S_028808_MULTIWRITE_ENABLE(!!rctx->ps_shader->shader.fs_write_all);
}
if (rctx->ps_shader && rctx->vs_shader) {
r600_adjust_gprs(rctx);
@@ -750,6 +758,8 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct 
pipe_draw_info *dinfo)
r600_pipe_state_add_reg(&rctx->vgt, R_028814_PA_SU_SC_MODE_CNTL,
0,
S_028814_PROVOKING_VTX_LAST(1), NULL, 
0);
+   if (rctx->chip_class <= R700)
+   r600_pipe_state_add_reg(&rctx->vgt, 
R_028808_CB_COLOR_CONTROL, rctx->cb_color_control, 0x, NULL, 0);
}
 
rctx->vgt.nregs = 0;
@@ -771,7 +781,11 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct 
pipe_draw_info *dinfo)
 
if (info.mode == PIPE_PRIM_QUADS || info.mode == PIPE_PRIM_QUAD_STRIP 
|| info.mode == PIPE_PRIM_POLYGON) {
r600_pipe_state_mod_reg(&rctx->vgt, 
S_028814_PROVOKING_VTX_LAST(1));
+   } else {
+   r600_pipe_state_mod_reg(&rctx->vgt, 0);
}
+   if (rctx->chip_class <= R700)
+   r600_pipe_state_mod_reg(&rctx->vgt, rctx->cb_color_control);
 
r600_context_pipe_state_set(&rctx->ctx, &rctx->vgt);
 
-- 
1.7.5.4

_

[Mesa-dev] [PATCH 09/19] r600g: don't add PA_SC_LINE_STIPPLE to rasterizer_state

2012-01-29 Thread Marek Olšák
It's always emitted in draw_vbo.
---
 src/gallium/drivers/r600/evergreen_state.c   |   11 +++
 src/gallium/drivers/r600/r600_pipe.h |2 ++
 src/gallium/drivers/r600/r600_state.c|   10 +++---
 src/gallium/drivers/r600/r600_state_common.c |7 +++
 4 files changed, 11 insertions(+), 19 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index 9f9a6a1..a5a443c 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -889,6 +889,9 @@ static void *evergreen_create_rs_state(struct pipe_context 
*ctx,
rs->sprite_coord_enable = state->sprite_coord_enable;
rs->two_side = state->light_twoside;
rs->clip_plane_enable = state->clip_plane_enable;
+   rs->pa_sc_line_stipple = state->line_stipple_enable ?
+   
S_028A0C_LINE_PATTERN(state->line_stipple_pattern) |
+   
S_028A0C_REPEAT_COUNT(state->line_stipple_factor) : 0;
 
clip_rule = state->scissor ? 0x : 0x;
 
@@ -946,14 +949,6 @@ static void *evergreen_create_rs_state(struct pipe_context 
*ctx,
 
tmp = (unsigned)state->line_width * 8;
r600_pipe_state_add_reg(rstate, R_028A08_PA_SU_LINE_CNTL, 
S_028A08_WIDTH(tmp), 0x, NULL, 0);
-
-   if (state->line_stipple_enable) {
-   r600_pipe_state_add_reg(rstate, R_028A0C_PA_SC_LINE_STIPPLE,
-   
S_028A0C_LINE_PATTERN(state->line_stipple_pattern) |
-   
S_028A0C_REPEAT_COUNT(state->line_stipple_factor),
-   0x9FFF, NULL, 0);
-   }
-
r600_pipe_state_add_reg(rstate, R_028A48_PA_SC_MODE_CNTL_0,

S_028A48_LINE_STIPPLE_ENABLE(state->line_stipple_enable),
0x, NULL, 0);
diff --git a/src/gallium/drivers/r600/r600_pipe.h 
b/src/gallium/drivers/r600/r600_pipe.h
index b7c5e55..d4578bd 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -109,6 +109,7 @@ struct r600_pipe_rasterizer {
boolean two_side;
unsignedsprite_coord_enable;
unsignedclip_plane_enable;
+   unsignedpa_sc_line_stipple;
float   offset_units;
float   offset_scale;
 };
@@ -209,6 +210,7 @@ struct r600_pipe_context {
struct pipe_framebuffer_state   framebuffer;
unsignedcb_target_mask;
unsignedcb_color_control;
+   unsignedpa_sc_line_stipple;
/* for saving when using blitter */
struct pipe_stencil_ref stencil_ref;
struct pipe_viewport_state  viewport;
diff --git a/src/gallium/drivers/r600/r600_state.c 
b/src/gallium/drivers/r600/r600_state.c
index bb7690a..9d553a6 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -943,6 +943,9 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
rs->sprite_coord_enable = state->sprite_coord_enable;
rs->two_side = state->light_twoside;
rs->clip_plane_enable = state->clip_plane_enable;
+   rs->pa_sc_line_stipple = state->line_stipple_enable ?
+   
S_028A0C_LINE_PATTERN(state->line_stipple_pattern) |
+   
S_028A0C_REPEAT_COUNT(state->line_stipple_factor) : 0;
 
clip_rule = state->scissor ? 0x : 0x;
/* offset */
@@ -1000,13 +1003,6 @@ static void *r600_create_rs_state(struct pipe_context 
*ctx,
tmp = (unsigned)state->line_width * 8;
r600_pipe_state_add_reg(rstate, R_028A08_PA_SU_LINE_CNTL, 
S_028A08_WIDTH(tmp), 0x, NULL, 0);
 
-   if (state->line_stipple_enable) {
-   r600_pipe_state_add_reg(rstate, R_028A0C_PA_SC_LINE_STIPPLE,
-   
S_028A0C_LINE_PATTERN(state->line_stipple_pattern) |
-   
S_028A0C_REPEAT_COUNT(state->line_stipple_factor),
-   0x9FFF, NULL, 0);
-   }
-
if (rctx->chip_class >= R700)
sc_mode_cntl = 0x514002;
else
diff --git a/src/gallium/drivers/r600/r600_state_common.c 
b/src/gallium/drivers/r600/r600_state_common.c
index 9833de0..84ccd5e 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -166,6 +166,7 @@ void r600_bind_rs_state(struct pipe_context *ctx, void 
*state)
 
rctx->sprite_coord_enable = rs->sprite_coord_enable;
rctx->two_side = rs->two_side;
+   rctx->pa_sc_line_stipple = rs->pa_sc_line_stipple;
 
rctx->rasterizer = rs;
 
@@ -752,9 +753,7 @@ void r600

[Mesa-dev] [PATCH 10/19] r600g: don't use register mask for PA_SU_SC_MODE_CNTL

2012-01-29 Thread Marek Olšák
It's always emitted in draw_vbo.
---
 src/gallium/drivers/r600/evergreen_state.c   |   32 +
 src/gallium/drivers/r600/r600_pipe.h |2 +
 src/gallium/drivers/r600/r600_state.c|   32 +
 src/gallium/drivers/r600/r600_state_common.c |9 +++
 4 files changed, 40 insertions(+), 35 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index a5a443c..09e029f 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -884,6 +884,12 @@ static void *evergreen_create_rs_state(struct pipe_context 
*ctx,
return NULL;
}
 
+   polygon_dual_mode = (state->fill_front != PIPE_POLYGON_MODE_FILL ||
+   state->fill_back != PIPE_POLYGON_MODE_FILL);
+
+   if (state->flatshade_first)
+   prov_vtx = 0;
+
rstate = &rs->rstate;
rs->flatshade = state->flatshade;
rs->sprite_coord_enable = state->sprite_coord_enable;
@@ -892,6 +898,17 @@ static void *evergreen_create_rs_state(struct pipe_context 
*ctx,
rs->pa_sc_line_stipple = state->line_stipple_enable ?

S_028A0C_LINE_PATTERN(state->line_stipple_pattern) |

S_028A0C_REPEAT_COUNT(state->line_stipple_factor) : 0;
+   rs->pa_su_sc_mode_cntl =
+   S_028814_PROVOKING_VTX_LAST(prov_vtx) |
+   S_028814_CULL_FRONT(state->rasterizer_discard || 
(state->cull_face & PIPE_FACE_FRONT) ? 1 : 0) |
+   S_028814_CULL_BACK(state->rasterizer_discard || 
(state->cull_face & PIPE_FACE_BACK) ? 1 : 0) |
+   S_028814_FACE(!state->front_ccw) |
+   S_028814_POLY_OFFSET_FRONT_ENABLE(state->offset_tri) |
+   S_028814_POLY_OFFSET_BACK_ENABLE(state->offset_tri) |
+   S_028814_POLY_OFFSET_PARA_ENABLE(state->offset_tri) |
+   S_028814_POLY_MODE(polygon_dual_mode) |
+   
S_028814_POLYMODE_FRONT_PTYPE(r600_translate_fill(state->fill_front)) |
+   
S_028814_POLYMODE_BACK_PTYPE(r600_translate_fill(state->fill_back));
 
clip_rule = state->scissor ? 0x : 0x;
 
@@ -900,8 +917,6 @@ static void *evergreen_create_rs_state(struct pipe_context 
*ctx,
rs->offset_scale = state->offset_scale * 12.0f;
 
rstate->id = R600_PIPE_STATE_RASTERIZER;
-   if (state->flatshade_first)
-   prov_vtx = 0;
tmp = S_0286D4_FLAT_SHADE_ENA(1);
if (state->sprite_coord_enable) {
tmp |= S_0286D4_PNT_SPRITE_ENA(1) |
@@ -915,19 +930,6 @@ static void *evergreen_create_rs_state(struct pipe_context 
*ctx,
}
r600_pipe_state_add_reg(rstate, R_0286D4_SPI_INTERP_CONTROL_0, tmp, 
0x, NULL, 0);
 
-   polygon_dual_mode = (state->fill_front != PIPE_POLYGON_MODE_FILL ||
-   state->fill_back != PIPE_POLYGON_MODE_FILL);
-   r600_pipe_state_add_reg(rstate, R_028814_PA_SU_SC_MODE_CNTL,
-   S_028814_PROVOKING_VTX_LAST(prov_vtx) |
-   S_028814_CULL_FRONT(state->rasterizer_discard || 
(state->cull_face & PIPE_FACE_FRONT) ? 1 : 0) |
-   S_028814_CULL_BACK(state->rasterizer_discard || 
(state->cull_face & PIPE_FACE_BACK) ? 1 : 0) |
-   S_028814_FACE(!state->front_ccw) |
-   S_028814_POLY_OFFSET_FRONT_ENABLE(state->offset_tri) |
-   S_028814_POLY_OFFSET_BACK_ENABLE(state->offset_tri) |
-   S_028814_POLY_OFFSET_PARA_ENABLE(state->offset_tri) |
-   S_028814_POLY_MODE(polygon_dual_mode) |
-   
S_028814_POLYMODE_FRONT_PTYPE(r600_translate_fill(state->fill_front)) |
-   
S_028814_POLYMODE_BACK_PTYPE(r600_translate_fill(state->fill_back)), 
0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_028820_PA_CL_NANINF_CNTL, 0x, 
0x, NULL, 0);
/* point size 12.4 fixed point */
tmp = (unsigned)(state->point_size * 8.0);
diff --git a/src/gallium/drivers/r600/r600_pipe.h 
b/src/gallium/drivers/r600/r600_pipe.h
index d4578bd..e4eaf94 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -110,6 +110,7 @@ struct r600_pipe_rasterizer {
unsignedsprite_coord_enable;
unsignedclip_plane_enable;
unsignedpa_sc_line_stipple;
+   unsignedpa_su_sc_mode_cntl;
float   offset_units;
float   offset_scale;
 };
@@ -211,6 +212,7 @@ struct r600_pipe_context {
unsignedcb_target_mask;
unsignedcb_color_control;
unsignedpa_sc_line_stipple;
+   unsignedpa_su_sc_mode_cntl;
/* for saving when using 

[Mesa-dev] [PATCH 11/19] r600g: set full register mask for PA_CL_CLIP_CNTL

2012-01-29 Thread Marek Olšák
We don't set the other bits anywhere else.
---
 src/gallium/drivers/r600/evergreen_state.c |4 +---
 src/gallium/drivers/r600/r600_state.c  |4 +---
 2 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index 09e029f..da09522 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -984,9 +984,7 @@ static void *evergreen_create_rs_state(struct pipe_context 
*ctx,
S_028810_PS_UCP_MODE(3) | 
S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) |
S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip) |
S_028810_DX_LINEAR_ATTR_CLIP_ENA(1),
-   ~(C_028810_PS_UCP_MODE & C_028810_ZCLIP_NEAR_DISABLE &
-   C_028810_ZCLIP_FAR_DISABLE &
-   C_028810_DX_LINEAR_ATTR_CLIP_ENA), NULL, 0);
+   0x, NULL, 0);
return rstate;
 }
 
diff --git a/src/gallium/drivers/r600/r600_state.c 
b/src/gallium/drivers/r600/r600_state.c
index a9940d6..d666a06 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1030,9 +1030,7 @@ static void *r600_create_rs_state(struct pipe_context 
*ctx,
S_028810_PS_UCP_MODE(3) | 
S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) |
S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip) |
S_028810_DX_LINEAR_ATTR_CLIP_ENA(1),
-   ~(C_028810_PS_UCP_MODE & C_028810_ZCLIP_NEAR_DISABLE &
-   C_028810_ZCLIP_FAR_DISABLE &
-   C_028810_DX_LINEAR_ATTR_CLIP_ENA), NULL, 0);
+   0x, NULL, 0);
return rstate;
 }
 
-- 
1.7.5.4

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[Mesa-dev] [PATCH 12/19] r600g: don't use register mask for PA_CL_VS_OUT_CNTL

2012-01-29 Thread Marek Olšák
---
 src/gallium/drivers/r600/evergreen_state.c   |   16 +---
 src/gallium/drivers/r600/r600_pipe.h |2 +-
 src/gallium/drivers/r600/r600_state.c|   16 +---
 src/gallium/drivers/r600/r600_state_common.c |   11 ---
 4 files changed, 15 insertions(+), 30 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index da09522..0d636d7 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2446,17 +2446,11 @@ void evergreen_pipe_shader_vs(struct pipe_context *ctx, 
struct r600_pipe_shader
R_03A200_SQ_LOOP_CONST_0 + (32 * 4), 0x01000FFF,
0x, NULL, 0);
 
-   r600_pipe_state_add_reg(rstate,
-   R_02881C_PA_CL_VS_OUT_CNTL,
-   
S_02881C_VS_OUT_CCDIST0_VEC_ENA((rshader->clip_dist_write & 0x0F) != 0) |
-   
S_02881C_VS_OUT_CCDIST1_VEC_ENA((rshader->clip_dist_write & 0xF0) != 0) |
-   
S_02881C_VS_OUT_MISC_VEC_ENA(rshader->vs_out_misc_write) |
-   
S_02881C_USE_VTX_POINT_SIZE(rshader->vs_out_point_size),
-   S_02881C_VS_OUT_CCDIST0_VEC_ENA(1) |
-   S_02881C_VS_OUT_CCDIST1_VEC_ENA(1) |
-   S_02881C_VS_OUT_MISC_VEC_ENA(1) |
-   S_02881C_USE_VTX_POINT_SIZE(1),
-   NULL, 0);
+   shader->pa_cl_vs_out_cntl =
+   S_02881C_VS_OUT_CCDIST0_VEC_ENA((rshader->clip_dist_write & 
0x0F) != 0) |
+   S_02881C_VS_OUT_CCDIST1_VEC_ENA((rshader->clip_dist_write & 
0xF0) != 0) |
+   S_02881C_VS_OUT_MISC_VEC_ENA(rshader->vs_out_misc_write) |
+   S_02881C_USE_VTX_POINT_SIZE(rshader->vs_out_point_size);
 }
 
 void evergreen_fetch_shader(struct pipe_context *ctx,
diff --git a/src/gallium/drivers/r600/r600_pipe.h 
b/src/gallium/drivers/r600/r600_pipe.h
index e4eaf94..9459dce 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -152,6 +152,7 @@ struct r600_pipe_shader {
struct tgsi_token   *tokens;
unsignedsprite_coord_enable;
unsignedflatshade;
+   unsignedpa_cl_vs_out_cntl;
struct pipe_stream_output_info  so;
 };
 
@@ -234,7 +235,6 @@ struct r600_pipe_context {
/* shader information */
boolean two_side;
unsigneduser_clip_plane_enable;
-   unsignedclip_dist_enable;
unsignedsprite_coord_enable;
boolean export_16bpc;
unsignedalpha_ref;
diff --git a/src/gallium/drivers/r600/r600_state.c 
b/src/gallium/drivers/r600/r600_state.c
index d666a06..1f6f4d6 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -2215,17 +2215,11 @@ void r600_pipe_shader_vs(struct pipe_context *ctx, 
struct r600_pipe_shader *shad
R_03E200_SQ_LOOP_CONST_0 + (32 * 4), 0x01000FFF,
0x, NULL, 0);
 
-   r600_pipe_state_add_reg(rstate,
-   R_02881C_PA_CL_VS_OUT_CNTL,
-   
S_02881C_VS_OUT_CCDIST0_VEC_ENA((rshader->clip_dist_write & 0x0F) != 0) |
-   
S_02881C_VS_OUT_CCDIST1_VEC_ENA((rshader->clip_dist_write & 0xF0) != 0) |
-   
S_02881C_VS_OUT_MISC_VEC_ENA(rshader->vs_out_misc_write) |
-   
S_02881C_USE_VTX_POINT_SIZE(rshader->vs_out_point_size),
-   S_02881C_VS_OUT_CCDIST0_VEC_ENA(1) |
-   S_02881C_VS_OUT_CCDIST1_VEC_ENA(1) |
-   S_02881C_VS_OUT_MISC_VEC_ENA(1) |
-   S_02881C_USE_VTX_POINT_SIZE(1),
-   NULL, 0);
+   shader->pa_cl_vs_out_cntl =
+   S_02881C_VS_OUT_CCDIST0_VEC_ENA((rshader->clip_dist_write & 
0x0F) != 0) |
+   S_02881C_VS_OUT_CCDIST1_VEC_ENA((rshader->clip_dist_write & 
0xF0) != 0) |
+   S_02881C_VS_OUT_MISC_VEC_ENA(rshader->vs_out_misc_write) |
+   S_02881C_USE_VTX_POINT_SIZE(rshader->vs_out_point_size);
 }
 
 void r600_fetch_shader(struct pipe_context *ctx,
diff --git a/src/gallium/drivers/r600/r600_state_common.c 
b/src/gallium/drivers/r600/r600_state_common.c
index ec28552..345e442 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -623,14 +623,12 @@ static void r600_update_derived_state(struct 
r600_pipe_context *rctx)
struct pipe_context * ctx = (struct pipe_context*)rctx;
st

[Mesa-dev] [PATCH 13/19] r600g: don't use register mask for PA_CL_CLIP_CNTL

2012-01-29 Thread Marek Olšák
---
 src/gallium/drivers/r600/evergreen_state.c   |   10 +-
 src/gallium/drivers/r600/r600_pipe.h |3 ++-
 src/gallium/drivers/r600/r600_state.c|   10 +-
 src/gallium/drivers/r600/r600_state_common.c |   18 +++---
 4 files changed, 19 insertions(+), 22 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index 0d636d7..94c1a65 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -909,6 +909,11 @@ static void *evergreen_create_rs_state(struct pipe_context 
*ctx,
S_028814_POLY_MODE(polygon_dual_mode) |

S_028814_POLYMODE_FRONT_PTYPE(r600_translate_fill(state->fill_front)) |

S_028814_POLYMODE_BACK_PTYPE(r600_translate_fill(state->fill_back));
+   rs->pa_cl_clip_cntl =
+   S_028810_PS_UCP_MODE(3) |
+   S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) |
+   S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip) |
+   S_028810_DX_LINEAR_ATTR_CLIP_ENA(1);
 
clip_rule = state->scissor ? 0x : 0x;
 
@@ -980,11 +985,6 @@ static void *evergreen_create_rs_state(struct pipe_context 
*ctx,
}
r600_pipe_state_add_reg(rstate, R_028B7C_PA_SU_POLY_OFFSET_CLAMP, 
fui(state->offset_clamp), 0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_02820C_PA_SC_CLIPRECT_RULE, 
clip_rule, 0x, NULL, 0);
-   r600_pipe_state_add_reg(rstate, R_028810_PA_CL_CLIP_CNTL,
-   S_028810_PS_UCP_MODE(3) | 
S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) |
-   S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip) |
-   S_028810_DX_LINEAR_ATTR_CLIP_ENA(1),
-   0x, NULL, 0);
return rstate;
 }
 
diff --git a/src/gallium/drivers/r600/r600_pipe.h 
b/src/gallium/drivers/r600/r600_pipe.h
index 9459dce..bf32ddc 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -111,6 +111,7 @@ struct r600_pipe_rasterizer {
unsignedclip_plane_enable;
unsignedpa_sc_line_stipple;
unsignedpa_su_sc_mode_cntl;
+   unsignedpa_cl_clip_cntl;
float   offset_units;
float   offset_scale;
 };
@@ -214,6 +215,7 @@ struct r600_pipe_context {
unsignedcb_color_control;
unsignedpa_sc_line_stipple;
unsignedpa_su_sc_mode_cntl;
+   unsignedpa_cl_clip_cntl;
/* for saving when using blitter */
struct pipe_stencil_ref stencil_ref;
struct pipe_viewport_state  viewport;
@@ -234,7 +236,6 @@ struct r600_pipe_context {
unsignedsaved_render_cond_mode;
/* shader information */
boolean two_side;
-   unsigneduser_clip_plane_enable;
unsignedsprite_coord_enable;
boolean export_16bpc;
unsignedalpha_ref;
diff --git a/src/gallium/drivers/r600/r600_state.c 
b/src/gallium/drivers/r600/r600_state.c
index 1f6f4d6..73c0608 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -963,6 +963,11 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
S_028814_POLY_MODE(polygon_dual_mode) |

S_028814_POLYMODE_FRONT_PTYPE(r600_translate_fill(state->fill_front)) |

S_028814_POLYMODE_BACK_PTYPE(r600_translate_fill(state->fill_back));
+   rs->pa_cl_clip_cntl =
+   S_028810_PS_UCP_MODE(3) |
+   S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) |
+   S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip) |
+   S_028810_DX_LINEAR_ATTR_CLIP_ENA(1);
 
clip_rule = state->scissor ? 0x : 0x;
/* offset */
@@ -1026,11 +1031,6 @@ static void *r600_create_rs_state(struct pipe_context 
*ctx,
r600_pipe_state_add_reg(rstate, R_028C18_PA_CL_GB_HORZ_DISC_ADJ, 
0x3F80, 0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_028DFC_PA_SU_POLY_OFFSET_CLAMP, 
fui(state->offset_clamp), 0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_02820C_PA_SC_CLIPRECT_RULE, 
clip_rule, 0x, NULL, 0);
-   r600_pipe_state_add_reg(rstate, R_028810_PA_CL_CLIP_CNTL,
-   S_028810_PS_UCP_MODE(3) | 
S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) |
-   S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip) |
-   S_028810_DX_LINEAR_ATTR_CLIP_ENA(1),
-   0x, NULL, 0);
return rstate;
 }
 
diff --git a/src/g

[Mesa-dev] [PATCH 14/19] r600g: don't use register mask for TA_CNTL_AUX

2012-01-29 Thread Marek Olšák
---
 src/gallium/drivers/r600/r600_state.c |   20 
 1 files changed, 8 insertions(+), 12 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_state.c 
b/src/gallium/drivers/r600/r600_state.c
index 73c0608..e27ab2b 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1227,8 +1227,12 @@ static void r600_set_seamless_cubemap(struct 
r600_pipe_context *rctx, boolean en
 
rstate->id = R600_PIPE_STATE_SEAMLESS_CUBEMAP;
r600_pipe_state_add_reg(rstate, R_009508_TA_CNTL_AUX,
-   (enable ? 0 : S_009508_DISABLE_CUBE_WRAP(1)),
-   1, NULL, 0);
+   (enable ? 0 : S_009508_DISABLE_CUBE_WRAP(1)) |
+   S_009508_DISABLE_CUBE_ANISO(1) |
+   S_009508_SYNC_GRADIENT(1) |
+   S_009508_SYNC_WALKER(1) |
+   S_009508_SYNC_ALIGNER(1),
+   0x, NULL, 0);
 
free(rctx->states[R600_PIPE_STATE_SEAMLESS_CUBEMAP]);
rctx->states[R600_PIPE_STATE_SEAMLESS_CUBEMAP] = rstate;
@@ -1984,21 +1988,11 @@ void r600_init_config(struct r600_pipe_context *rctx)
 
if (rctx->chip_class >= R700) {
r600_pipe_state_add_reg(rstate, 
R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0x4000, 0x, NULL, 0);
-   r600_pipe_state_add_reg(rstate, R_009508_TA_CNTL_AUX,
-   S_009508_DISABLE_CUBE_ANISO(1) |
-   S_009508_SYNC_GRADIENT(1) |
-   S_009508_SYNC_WALKER(1) |
-   S_009508_SYNC_ALIGNER(1), 0x, 
NULL, 0);
r600_pipe_state_add_reg(rstate, R_009830_DB_DEBUG, 0x, 
0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_009838_DB_WATERMARKS, 
0x00420204, 0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_0286C8_SPI_THREAD_GROUPING, 
0x, 0x, NULL, 0);
} else {
r600_pipe_state_add_reg(rstate, 
R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0x, 0x, NULL, 0);
-   r600_pipe_state_add_reg(rstate, R_009508_TA_CNTL_AUX,
-   S_009508_DISABLE_CUBE_ANISO(1) |
-   S_009508_SYNC_GRADIENT(1) |
-   S_009508_SYNC_WALKER(1) |
-   S_009508_SYNC_ALIGNER(1), 0x, 
NULL, 0);
r600_pipe_state_add_reg(rstate, R_009830_DB_DEBUG, 0x8200, 
0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_009838_DB_WATERMARKS, 
0x01020204, 0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_0286C8_SPI_THREAD_GROUPING, 
0x0001, 0x, NULL, 0);
@@ -2036,6 +2030,8 @@ void r600_init_config(struct r600_pipe_context *rctx)
r600_pipe_state_add_reg(rstate, R_028AA0_VGT_INSTANCE_STEP_RATE_0, 
0x, 0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_028AA4_VGT_INSTANCE_STEP_RATE_1, 
0x, 0x, NULL, 0);
r600_context_pipe_state_set(&rctx->ctx, rstate);
+
+   r600_set_seamless_cubemap(rctx, FALSE);
 }
 
 void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader 
*shader)
-- 
1.7.5.4

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[Mesa-dev] [PATCH 16/19] r600g: get rid of the mask in r600_pipe_reg

2012-01-29 Thread Marek Olšák
---
 src/gallium/drivers/r600/r600.h  |1 -
 src/gallium/drivers/r600/r600_hw_context.c   |8 ++--
 src/gallium/drivers/r600/r600_state_common.c |2 --
 3 files changed, 2 insertions(+), 9 deletions(-)

diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h
index c6a2790..a51e6af 100644
--- a/src/gallium/drivers/r600/r600.h
+++ b/src/gallium/drivers/r600/r600.h
@@ -111,7 +111,6 @@ struct r600_resource {
 
 struct r600_pipe_reg {
u32 value;
-   u32 mask;
struct r600_block   *block;
struct r600_resource*bo;
enum radeon_bo_usagebo_usage;
diff --git a/src/gallium/drivers/r600/r600_hw_context.c 
b/src/gallium/drivers/r600/r600_hw_context.c
index ad568c6..0dfce01 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -1077,7 +1077,6 @@ void r600_context_dirty_block(struct r600_context *ctx,
 void r600_context_pipe_state_set(struct r600_context *ctx, struct 
r600_pipe_state *state)
 {
struct r600_block *block;
-   unsigned new_val;
int dirty;
for (int i = 0; i < state->nregs; i++) {
unsigned id, reloc_id;
@@ -1088,11 +1087,8 @@ void r600_context_pipe_state_set(struct r600_context 
*ctx, struct r600_pipe_stat
 
dirty = block->status & R600_BLOCK_STATUS_DIRTY;
 
-   new_val = block->reg[id];
-   new_val &= ~reg->mask;
-   new_val |= reg->value;
-   if (new_val != block->reg[id]) {
-   block->reg[id] = new_val;
+   if (reg->value != block->reg[id]) {
+   block->reg[id] = reg->value;
dirty |= R600_BLOCK_STATUS_DIRTY;
}
if (block->flags & REG_FLAG_DIRTY_ALWAYS)
diff --git a/src/gallium/drivers/r600/r600_state_common.c 
b/src/gallium/drivers/r600/r600_state_common.c
index ca43ec7..09a7d73 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -814,7 +814,6 @@ void _r600_pipe_state_add_reg(struct r600_context *ctx,
state->regs[state->nregs].id = (offset - block->start_offset) >> 2;
 
state->regs[state->nregs].value = value;
-   state->regs[state->nregs].mask = 0x;
state->regs[state->nregs].bo = bo;
state->regs[state->nregs].bo_usage = usage;
 
@@ -832,7 +831,6 @@ void r600_pipe_state_add_reg_noblock(struct r600_pipe_state 
*state,
state->regs[state->nregs].id = offset;
state->regs[state->nregs].block = NULL;
state->regs[state->nregs].value = value;
-   state->regs[state->nregs].mask = 0x;
state->regs[state->nregs].bo = bo;
state->regs[state->nregs].bo_usage = usage;
 
-- 
1.7.5.4

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[Mesa-dev] [PATCH 17/19] r600g: don't use r600_context_reg on evergreen

2012-01-29 Thread Marek Olšák
Just getting rid of things which use the register mask.
---
 src/gallium/drivers/r600/evergreen_hw_context.c |   30 +--
 src/gallium/drivers/r600/evergreen_state.c  |1 +
 src/gallium/drivers/r600/r600.h |1 +
 src/gallium/drivers/r600/r600_hw_context_priv.h |2 +-
 src/gallium/drivers/r600/r600_pipe.h|1 +
 src/gallium/drivers/r600/r600_state_common.c|2 +
 6 files changed, 23 insertions(+), 14 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_hw_context.c 
b/src/gallium/drivers/r600/evergreen_hw_context.c
index 0463922..f732ea3 100644
--- a/src/gallium/drivers/r600/evergreen_hw_context.c
+++ b/src/gallium/drivers/r600/evergreen_hw_context.c
@@ -1148,22 +1148,12 @@ void evergreen_context_draw(struct r600_context *ctx, 
const struct r600_draw *dr
if (draw->indices) {
ndwords = 11;
}
+   if (ctx->num_cs_dw_queries_suspend)
+   ndwords += 6;
+
/* when increasing ndwords, bump the max limit too */
assert(ndwords <= R600_MAX_DRAW_CS_DWORDS);
 
-   /* queries need some special values
-* (this is non-zero if any query is active) */
-   if (ctx->num_cs_dw_queries_suspend) {
-   r600_context_reg(ctx,
-   R_028004_DB_COUNT_CONTROL,
-   S_028004_PERFECT_ZPASS_COUNTS(1),
-   S_028004_PERFECT_ZPASS_COUNTS(1));
-   r600_context_reg(ctx,
-   R_02800C_DB_RENDER_OVERRIDE,
-   S_02800C_NOOP_CULL_DISABLE(1),
-   S_02800C_NOOP_CULL_DISABLE(1));
-   }
-
r600_need_cs_space(ctx, 0, TRUE);
assert(ctx->pm4_cdwords + ctx->pm4_dirty_cdwords + ndwords < 
RADEON_MAX_CMDBUF_DWORDS);
 
@@ -1182,6 +1172,20 @@ void evergreen_context_draw(struct r600_context *ctx, 
const struct r600_draw *dr
ctx->streamout_start = FALSE;
}
 
+   /* queries need some special values
+* (this is non-zero if any query is active) */
+   if (ctx->num_cs_dw_queries_suspend) {
+   pm4 = &ctx->pm4[ctx->pm4_cdwords];
+   pm4[0] = PKT3(PKT3_SET_CONTEXT_REG, 1, 0);
+   pm4[1] = (R_028004_DB_COUNT_CONTROL - 
EVERGREEN_CONTEXT_REG_OFFSET) >> 2;
+   pm4[2] = S_028004_PERFECT_ZPASS_COUNTS(1);
+   pm4[3] = PKT3(PKT3_SET_CONTEXT_REG, 1, 0);
+   pm4[4] = (R_02800C_DB_RENDER_OVERRIDE - 
EVERGREEN_CONTEXT_REG_OFFSET) >> 2;
+   pm4[5] = draw->db_render_override | 
S_02800C_NOOP_CULL_DISABLE(1);
+   ctx->pm4_cdwords += 6;
+   ndwords -= 6;
+   }
+
/* draw packet */
pm4 = &ctx->pm4[ctx->pm4_cdwords];
pm4[0] = PKT3(PKT3_INDEX_TYPE, 0, ctx->predicate_drawing);
diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index 8aa8b77..2484110 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -865,6 +865,7 @@ static void *evergreen_create_dsa_state(struct pipe_context 
*ctx,
r600_pipe_state_add_reg(rstate, R_028AC4_DB_SRESULTS_COMPARE_STATE1, 
0x0, NULL, 0);
r600_pipe_state_add_reg(rstate, R_028AC8_DB_PRELOAD_CONTROL, 0x0, NULL, 
0);
r600_pipe_state_add_reg(rstate, R_028B70_DB_ALPHA_TO_MASK, 0xAA00, 
NULL, 0);
+   dsa->db_render_override = db_render_override;
 
return rstate;
 }
diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h
index a51e6af..c3de51f 100644
--- a/src/gallium/drivers/r600/r600.h
+++ b/src/gallium/drivers/r600/r600.h
@@ -256,6 +256,7 @@ struct r600_draw {
u32 vgt_index_type;
u32 vgt_draw_initiator;
u32 indices_bo_offset;
+   unsigneddb_render_override;
struct r600_resource*indices;
 };
 
diff --git a/src/gallium/drivers/r600/r600_hw_context_priv.h 
b/src/gallium/drivers/r600/r600_hw_context_priv.h
index 2ad5624..c7d5b6a 100644
--- a/src/gallium/drivers/r600/r600_hw_context_priv.h
+++ b/src/gallium/drivers/r600/r600_hw_context_priv.h
@@ -30,7 +30,7 @@
 #include "util/u_hash_table.h"
 #include "os/os_thread.h"
 
-#define R600_MAX_DRAW_CS_DWORDS 11
+#define R600_MAX_DRAW_CS_DWORDS 17
 
 #define PKT_COUNT_C 0xC000
 #define PKT_COUNT_S(x)  (((x) & 0x3FFF) << 16)
diff --git a/src/gallium/drivers/r600/r600_pipe.h 
b/src/gallium/drivers/r600/r600_pipe.h
index bf32ddc..0c6d72d 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -125,6 +125,7 @@ struct r600_pipe_blend {
 struct r600_pipe_dsa {
struct r600_pipe_state  rstate;
unsignedalpha_ref;
+   unsigneddb_render_override;
ubyte 

[Mesa-dev] [PATCH 18/19] r600g: don't use r600_context_reg on r6xx-r7xx

2012-01-29 Thread Marek Olšák
---
 src/gallium/drivers/r600/r600.h  |1 +
 src/gallium/drivers/r600/r600_hw_context.c   |   40 -
 src/gallium/drivers/r600/r600_pipe.h |1 +
 src/gallium/drivers/r600/r600_state.c|   22 ++
 src/gallium/drivers/r600/r600_state_common.c |6 ++-
 5 files changed, 47 insertions(+), 23 deletions(-)

diff --git a/src/gallium/drivers/r600/r600.h b/src/gallium/drivers/r600/r600.h
index c3de51f..515d122 100644
--- a/src/gallium/drivers/r600/r600.h
+++ b/src/gallium/drivers/r600/r600.h
@@ -257,6 +257,7 @@ struct r600_draw {
u32 vgt_draw_initiator;
u32 indices_bo_offset;
unsigneddb_render_override;
+   unsigneddb_render_control;
struct r600_resource*indices;
 };
 
diff --git a/src/gallium/drivers/r600/r600_hw_context.c 
b/src/gallium/drivers/r600/r600_hw_context.c
index 0dfce01..e9f92a1 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -1452,24 +1452,15 @@ void r600_context_draw(struct r600_context *ctx, const 
struct r600_draw *draw)
if (draw->indices) {
ndwords = 11;
}
-   /* when increasing ndwords, bump the max limit too */
-   assert(ndwords <= R600_MAX_DRAW_CS_DWORDS);
-
-   /* queries need some special values
-* (this is non-zero if any query is active) */
if (ctx->num_cs_dw_queries_suspend) {
-   if (ctx->screen->family >= CHIP_RV770) {
-   r600_context_reg(ctx,
-   R_028D0C_DB_RENDER_CONTROL,
-   S_028D0C_R700_PERFECT_ZPASS_COUNTS(1),
-   S_028D0C_R700_PERFECT_ZPASS_COUNTS(1));
-   }
-   r600_context_reg(ctx,
-   R_028D10_DB_RENDER_OVERRIDE,
-   S_028D10_NOOP_CULL_DISABLE(1),
-   S_028D10_NOOP_CULL_DISABLE(1));
+   if (ctx->screen->family >= CHIP_RV770)
+   ndwords += 3;
+   ndwords += 3;
}
 
+   /* when increasing ndwords, bump the max limit too */
+   assert(ndwords <= R600_MAX_DRAW_CS_DWORDS);
+
r600_need_cs_space(ctx, 0, TRUE);
assert(ctx->pm4_cdwords + ctx->pm4_dirty_cdwords + ndwords < 
RADEON_MAX_CMDBUF_DWORDS);
 
@@ -1488,6 +1479,25 @@ void r600_context_draw(struct r600_context *ctx, const 
struct r600_draw *draw)
ctx->streamout_start = FALSE;
}
 
+   /* queries need some special values
+* (this is non-zero if any query is active) */
+   if (ctx->num_cs_dw_queries_suspend) {
+   if (ctx->screen->family >= CHIP_RV770) {
+   pm4 = &ctx->pm4[ctx->pm4_cdwords];
+   pm4[0] = PKT3(PKT3_SET_CONTEXT_REG, 1, 0);
+   pm4[1] = (R_028D0C_DB_RENDER_CONTROL - 
R600_CONTEXT_REG_OFFSET) >> 2;
+   pm4[2] = draw->db_render_control | 
S_028D0C_R700_PERFECT_ZPASS_COUNTS(1);
+   ctx->pm4_cdwords += 3;
+   ndwords -= 3;
+   }
+   pm4 = &ctx->pm4[ctx->pm4_cdwords];
+   pm4[0] = PKT3(PKT3_SET_CONTEXT_REG, 1, 0);
+   pm4[1] = (R_028D10_DB_RENDER_OVERRIDE - 
R600_CONTEXT_REG_OFFSET) >> 2;
+   pm4[2] = draw->db_render_override | 
S_028D10_NOOP_CULL_DISABLE(1);
+   ctx->pm4_cdwords += 3;
+   ndwords -= 3;
+   }
+
/* draw packet */
pm4 = &ctx->pm4[ctx->pm4_cdwords];
 
diff --git a/src/gallium/drivers/r600/r600_pipe.h 
b/src/gallium/drivers/r600/r600_pipe.h
index 0c6d72d..4ba4b1b 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -126,6 +126,7 @@ struct r600_pipe_dsa {
struct r600_pipe_state  rstate;
unsignedalpha_ref;
unsigneddb_render_override;
+   unsigneddb_render_control;
ubyte   valuemask[2];
ubyte   writemask[2];
 };
diff --git a/src/gallium/drivers/r600/r600_state.c 
b/src/gallium/drivers/r600/r600_state.c
index 44240fd..7abd678 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -919,6 +919,9 @@ static void *r600_create_dsa_state(struct pipe_context *ctx,
r600_pipe_state_add_reg(rstate, R_028D30_DB_PRELOAD_CONTROL, 
0x, NULL, 0);
r600_pipe_state_add_reg(rstate, R_028D44_DB_ALPHA_TO_MASK, 0xAA00, 
NULL, 0);
 
+   dsa->db_render_override = db_render_override;
+   dsa->db_render_control = db_render_control;
+
return rstate;
 }
 
@@ -2240,6 +2243,8 @@ void *r600_create_db_flush_dsa(struct r600_pipe_context 
*rctx)
 {
struct pipe

[Mesa-dev] [PATCH 19/19] r600g: get rid of r600_context_reg

2012-01-29 Thread Marek Olšák
---
 src/gallium/drivers/r600/r600_hw_context.c  |   27 ---
 src/gallium/drivers/r600/r600_hw_context_priv.h |3 --
 2 files changed, 0 insertions(+), 30 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_hw_context.c 
b/src/gallium/drivers/r600/r600_hw_context.c
index e9f92a1..8677961 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -1025,33 +1025,6 @@ void r600_context_bo_flush(struct r600_context *ctx, 
unsigned flush_flags,
bo->cs_buf->last_flush = (bo->cs_buf->last_flush | flush_flags) & 
flush_mask;
 }
 
-void r600_context_reg(struct r600_context *ctx,
- unsigned offset, unsigned value,
- unsigned mask)
-{
-   struct r600_range *range;
-   struct r600_block *block;
-   unsigned id;
-   unsigned new_val;
-   int dirty;
-
-   range = &ctx->range[CTX_RANGE_ID(offset)];
-   block = range->blocks[CTX_BLOCK_ID(offset)];
-   id = (offset - block->start_offset) >> 2;
-
-   dirty = block->status & R600_BLOCK_STATUS_DIRTY;
-
-   new_val = block->reg[id];
-   new_val &= ~mask;
-   new_val |= value;
-   if (new_val != block->reg[id]) {
-   dirty |= R600_BLOCK_STATUS_DIRTY;
-   block->reg[id] = new_val;
-   }
-   if (dirty)
-   r600_context_dirty_block(ctx, block, dirty, id);
-}
-
 void r600_context_dirty_block(struct r600_context *ctx,
  struct r600_block *block,
  int dirty, int index)
diff --git a/src/gallium/drivers/r600/r600_hw_context_priv.h 
b/src/gallium/drivers/r600/r600_hw_context_priv.h
index c7d5b6a..e2ede0f 100644
--- a/src/gallium/drivers/r600/r600_hw_context_priv.h
+++ b/src/gallium/drivers/r600/r600_hw_context_priv.h
@@ -70,9 +70,6 @@ void r600_context_block_resource_emit_dirty(struct 
r600_context *ctx, struct r60
 void r600_context_dirty_block(struct r600_context *ctx, struct r600_block 
*block,
  int dirty, int index);
 int r600_setup_block_table(struct r600_context *ctx);
-void r600_context_reg(struct r600_context *ctx,
- unsigned offset, unsigned value,
- unsigned mask);
 void r600_init_cs(struct r600_context *ctx);
 int r600_resource_init(struct r600_context *ctx, struct r600_range *range, 
unsigned offset, unsigned nblocks, unsigned stride, struct r600_reg *reg, int 
nreg, unsigned offset_base);
 
-- 
1.7.5.4

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Re: [Mesa-dev] [PATCH 1/2] softpipe: don't attempt to blend integer formats.

2012-01-29 Thread Christoph Bumiller
On 01/29/2012 06:26 PM, Brian Paul wrote:
> On Sun, Jan 29, 2012 at 9:35 AM, Dave Airlie  wrote:
>> From: Dave Airlie 
>>
>> This blocks blending in the simple path, need to look at the more
>> complicated paths.
>>
>> Signed-off-by: Dave Airlie 
>> ---
>>  src/gallium/drivers/softpipe/sp_quad_blend.c |3 ++-
>>  1 files changed, 2 insertions(+), 1 deletions(-)
>>
>> diff --git a/src/gallium/drivers/softpipe/sp_quad_blend.c 
>> b/src/gallium/drivers/softpipe/sp_quad_blend.c
>> index d546b14..d2a5269 100644
>> --- a/src/gallium/drivers/softpipe/sp_quad_blend.c
>> +++ b/src/gallium/drivers/softpipe/sp_quad_blend.c
>> @@ -1155,7 +1155,8 @@ choose_blend_quad(struct quad_stage *qs,
>> softpipe->blend->rt[0].colormask == 0xf &&
>> softpipe->framebuffer.nr_cbufs == 1)
>>{
>> -  if (!blend->rt[0].blend_enable) {
>> +  if (!blend->rt[0].blend_enable ||
>> + 
>> util_format_is_pure_integer(softpipe->framebuffer.cbufs[0]->format)) {
>>  qs->run = single_output_color;
>>   }
>>   else if (blend->rt[0].rgb_src_factor == blend->rt[0].alpha_src_factor 
>> &&
>> --
> 
> How about checking for integer color buffers in the state tracker and
> turning off blending (and alpha test) there?
> 

That's a waste of CPU time.

Sane users will have disabled blending on them already, and for the
rest, they can rely on the hardware to ignore blending for integer
render targets (at least NV hardware does it automatically, telling from
the RT format; they're nice that way).

> If you have integer buffers and try to enable blending with a hardware
> driver, does hardware typically no-opt the blend or does the driver
> have to disable blending?
> 
> -Brian
> ___
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> mesa-dev@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/mesa-dev
> 

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Re: [Mesa-dev] [PATCH 00/19] Remove all uses of the register mask

2012-01-29 Thread Dave Airlie
> Hi everyone,
>
> This is a cleanup in a series of cleanups I am going to make to improve the 
> horribly over-engineered and slow state management of r600g. This particular 
> patch series brings nothing new or special, it's merely a preparation for 
> future work.
>
> This series removes any uses of the register mask, which was used for partial 
> updates of registers. These patches show that sometimes we used it even when 
> we didn't have to, and the few cases that are valid can be handled separately 
> without much effort anyway. The majority of registers don't need this feature.
>
> Later on when we start using a more direct way to emit immutable states, we 
> should be able to bypass r600_pipe_state and memcpy state vectors into the 
> command stream directly. Getting rid of the register mask is a prerequisite 
> for that.
>
> There are no piglit regressions. Tested with RV670, RV730, and REDWOOD.
>
> The patches are also available at:
>  git://people.freedesktop.org/~mareko/mesa r600-kill-regmask
>

I've looked over this and I've wanted to do something like this since
I first ran callgrind on r600g, reducing the CPU overhead here is a
good plan.

Reviewed-by: Dave Airlie 

Dave.
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[Mesa-dev] [PATCH] gallium: add PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION

2012-01-29 Thread Christoph Bumiller
Just let the hardware do it if it can and avoid drivers having to
check for the special case on each draw call.
---
 src/gallium/docs/source/cso/rasterizer.rst   |7 ---
 src/gallium/docs/source/screen.rst   |2 ++
 src/gallium/drivers/i915/i915_screen.c   |1 +
 src/gallium/drivers/llvmpipe/lp_screen.c |2 ++
 src/gallium/drivers/nv50/nv50_screen.c   |1 +
 src/gallium/drivers/nvc0/nvc0_screen.c   |1 +
 src/gallium/drivers/nvfx/nvfx_screen.c   |1 +
 src/gallium/drivers/r300/r300_screen.c   |1 +
 src/gallium/drivers/r600/r600_pipe.c |1 +
 src/gallium/drivers/r600/r600_state_common.c |4 
 src/gallium/drivers/softpipe/sp_screen.c |2 ++
 src/gallium/drivers/svga/svga_screen.c   |3 +++
 src/gallium/include/pipe/p_defines.h |1 +
 src/mesa/state_tracker/st_extensions.c   |4 ++--
 14 files changed, 22 insertions(+), 9 deletions(-)

diff --git a/src/gallium/docs/source/cso/rasterizer.rst 
b/src/gallium/docs/source/cso/rasterizer.rst
index 482b1ea..150e6df 100644
--- a/src/gallium/docs/source/cso/rasterizer.rst
+++ b/src/gallium/docs/source/cso/rasterizer.rst
@@ -59,13 +59,14 @@ flatshade_first
 Whether the first vertex should be the provoking vertex, for most primitives.
 If not set, the last vertex is the provoking vertex.
 
-There are several important exceptions to the specification of this rule.
+There are a few important exceptions to the specification of this rule.
 
 * ``PIPE_PRIMITIVE_POLYGON``: The provoking vertex is always the first
   vertex. If the caller wishes to change the provoking vertex, they merely
   need to rotate the vertices themselves.
-* ``PIPE_PRIMITIVE_QUAD``, ``PIPE_PRIMITIVE_QUAD_STRIP``: This option has no
-  effect; the provoking vertex is always the last vertex.
+* ``PIPE_PRIMITIVE_QUAD``, ``PIPE_PRIMITIVE_QUAD_STRIP``: The option only has
+  an effect if ``PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION`` is true.
+  If it is not, the provoking vertex is always the last vertex.
 * ``PIPE_PRIMITIVE_TRIANGLE_FAN``: When set, the provoking vertex is the
   second vertex, not the first. This permits each segment of the fan to have
   a different color.
diff --git a/src/gallium/docs/source/screen.rst 
b/src/gallium/docs/source/screen.rst
index 2af9f74..51d9464 100644
--- a/src/gallium/docs/source/screen.rst
+++ b/src/gallium/docs/source/screen.rst
@@ -96,6 +96,8 @@ The integer capabilities:
   controlled through pipe_rasterizer_state.
 * ``PIPE_CAP_GLSL_FEATURE_LEVEL``: Whether the driver supports features
   equivalent to a specific GLSL version. E.g. for GLSL 1.3, report 130.
+* ``PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION``: Whether quads adhere 
to
+  the flatshade_first setting in ``pipe_rasterizer_state``.
 
 
 
diff --git a/src/gallium/drivers/i915/i915_screen.c 
b/src/gallium/drivers/i915/i915_screen.c
index aef0ed6..a37241f 100644
--- a/src/gallium/drivers/i915/i915_screen.c
+++ b/src/gallium/drivers/i915/i915_screen.c
@@ -204,6 +204,7 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap 
cap)
case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
+   case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
   return 0;
 
/* Features we can lie about (boolean caps). */
diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c 
b/src/gallium/drivers/llvmpipe/lp_screen.c
index fd6e439..7f0f17e 100644
--- a/src/gallium/drivers/llvmpipe/lp_screen.c
+++ b/src/gallium/drivers/llvmpipe/lp_screen.c
@@ -157,6 +157,8 @@ llvmpipe_get_param(struct pipe_screen *screen, enum 
pipe_cap param)
case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
case PIPE_CAP_CONDITIONAL_RENDER:
   return 1;
+   case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
+  return 0;
default:
   return 0;
}
diff --git a/src/gallium/drivers/nv50/nv50_screen.c 
b/src/gallium/drivers/nv50/nv50_screen.c
index 904f39a..1d53593 100644
--- a/src/gallium/drivers/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nv50/nv50_screen.c
@@ -146,6 +146,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum 
pipe_cap param)
case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
case PIPE_CAP_CONDITIONAL_RENDER:
case PIPE_CAP_TEXTURE_BARRIER:
+   case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
   return 1;
case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
diff --git a/src/gallium/drivers/nvc0/nvc0_screen.c 
b/src/gallium/drivers/nvc0/nvc0_screen.c
index 676af76..abc04ab 100644
--- a/src/gallium/drivers/nvc0/nvc0_screen.c
+++ b/src/gallium/drivers/nvc0/nvc0_screen.c
@@ -132,6 +132,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum 
pipe_cap param)
case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
case PIPE_CAP_CONDITIONAL_RENDER:
case PIPE_CAP_TEXTURE_BARRIER:
+   case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
   return 1;

Re: [Mesa-dev] [PATCH 1/2] softpipe: don't attempt to blend integer formats.

2012-01-29 Thread Jose Fonseca


- Original Message -
> On 01/29/2012 06:26 PM, Brian Paul wrote:
> > On Sun, Jan 29, 2012 at 9:35 AM, Dave Airlie 
> > wrote:
> >> From: Dave Airlie 
> >>
> >> This blocks blending in the simple path, need to look at the more
> >> complicated paths.
> >>
> >> Signed-off-by: Dave Airlie 
> >> ---
> >>  src/gallium/drivers/softpipe/sp_quad_blend.c |3 ++-
> >>  1 files changed, 2 insertions(+), 1 deletions(-)
> >>
> >> diff --git a/src/gallium/drivers/softpipe/sp_quad_blend.c
> >> b/src/gallium/drivers/softpipe/sp_quad_blend.c
> >> index d546b14..d2a5269 100644
> >> --- a/src/gallium/drivers/softpipe/sp_quad_blend.c
> >> +++ b/src/gallium/drivers/softpipe/sp_quad_blend.c
> >> @@ -1155,7 +1155,8 @@ choose_blend_quad(struct quad_stage *qs,
> >> softpipe->blend->rt[0].colormask == 0xf &&
> >> softpipe->framebuffer.nr_cbufs == 1)
> >>{
> >> -  if (!blend->rt[0].blend_enable) {
> >> +  if (!blend->rt[0].blend_enable ||
> >> +
> >> 
> >> util_format_is_pure_integer(softpipe->framebuffer.cbufs[0]->format))
> >> {
> >>  qs->run = single_output_color;
> >>   }
> >>   else if (blend->rt[0].rgb_src_factor ==
> >>   blend->rt[0].alpha_src_factor &&
> >> --
> > 
> > How about checking for integer color buffers in the state tracker
> > and
> > turning off blending (and alpha test) there?

My feeling too.

> That's a waste of CPU time.

I sincerely doubt CPU time would be even measurable, as this could easily be 
done once per fbo, i.e., extremely low frequency.

> Sane users will have disabled blending on them already, and for the
> rest, they can rely on the hardware to ignore blending for integer
> render targets (at least NV hardware does it automatically, telling
> from
> the RT format; they're nice that way).

Even if some hardware already ignores integer blending, given that this means 
_zero_ performance improvement per fragment or primitive, I don't think that it 
justifies having to force upon the sanitization upon every other driver.  IMH, 
doing this once in Mesa would mean one less gotcha for driver implementers to 
worry about...

Jose
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[Mesa-dev] [PATCH 1/3] mesa: added _mesa_pack_ubyte_rgba_rect() function

2012-01-29 Thread Brian Paul
From: Brian Paul 

---
 src/mesa/main/format_pack.c |   42 ++
 src/mesa/main/format_pack.h |4 
 2 files changed, 46 insertions(+), 0 deletions(-)

diff --git a/src/mesa/main/format_pack.c b/src/mesa/main/format_pack.c
index 85b2c69..ea1d95e 100644
--- a/src/mesa/main/format_pack.c
+++ b/src/mesa/main/format_pack.c
@@ -2050,6 +2050,48 @@ _mesa_pack_ubyte_rgba_row(gl_format format, GLuint n,
 
 
 /**
+ * Pack a 2D image of ubyte RGBA pixels in the given format.
+ * \param srcRowStride  source image row stride in bytes
+ * \param dstRowStride  destination image row stride in bytes
+ */
+void
+_mesa_pack_ubyte_rgba_rect(gl_format format, GLuint width, GLuint height,
+   const GLubyte *src, GLint srcRowStride,
+   void *dst, GLint dstRowStride)
+{
+   pack_ubyte_rgba_row_func packrow = get_pack_ubyte_rgba_row_function(format);
+   GLubyte *dstUB = (GLubyte *) dst;
+   GLuint i;
+
+   if (packrow) {
+  if (srcRowStride == width * 4 * sizeof(GLubyte) &&
+  dstRowStride == _mesa_format_row_stride(format, width)) {
+ /* do whole image at once */
+ packrow(width * height, (const GLubyte (*)[4]) src, dst);
+  }
+  else {
+ /* row by row */
+ for (i = 0; i < height; i++) {
+packrow(width, (const GLubyte (*)[4]) src, dstUB);
+src += srcRowStride;
+dstUB += dstRowStride;
+ }
+  }
+   }
+   else {
+  /* slower fallback */
+  for (i = 0; i < height; i++) {
+ _mesa_pack_ubyte_rgba_row(format, width,
+   (const GLubyte (*)[4]) src, dstUB);
+ src += srcRowStride;
+ dstUB += dstRowStride;
+  }
+   }
+}
+
+
+
+/**
  ** Pack float Z pixels
  **/
 
diff --git a/src/mesa/main/format_pack.h b/src/mesa/main/format_pack.h
index f1b4805..20b2ad8 100644
--- a/src/mesa/main/format_pack.h
+++ b/src/mesa/main/format_pack.h
@@ -77,6 +77,10 @@ _mesa_pack_ubyte_rgba_row(gl_format format, GLuint n,
   const GLubyte src[][4], void *dst);
 
 
+extern void
+_mesa_pack_ubyte_rgba_rect(gl_format format, GLuint width, GLuint height,
+   const GLubyte *src, GLint srcRowStride,
+   void *dst, GLint dstRowStride);
 
 extern void
 _mesa_pack_float_z_row(gl_format format, GLuint n,
-- 
1.7.1

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[Mesa-dev] [PATCH 2/3] mesa: use _mesa_pack_ubyte_rgba_rect() in texstore code

2012-01-29 Thread Brian Paul
From: Brian Paul 

Simplifies the general case code in the ubyte-valued texture format
functions.  More consolidation to come in subsequent commits.
---
 src/mesa/main/texstore.c |  283 +++---
 1 files changed, 64 insertions(+), 219 deletions(-)

diff --git a/src/mesa/main/texstore.c b/src/mesa/main/texstore.c
index 827fcb7..2f5686e 100644
--- a/src/mesa/main/texstore.c
+++ b/src/mesa/main/texstore.c
@@ -55,6 +55,7 @@
 #include "glheader.h"
 #include "bufferobj.h"
 #include "colormac.h"
+#include "format_pack.h"
 #include "image.h"
 #include "macros.h"
 #include "mipmap.h"
@@ -1132,8 +1133,6 @@ _mesa_texstore_z16(TEXSTORE_PARAMS)
 static GLboolean
 _mesa_texstore_rgb565(TEXSTORE_PARAMS)
 {
-   const GLenum baseFormat = _mesa_get_format_base_format(dstFormat);
-
ASSERT(dstFormat == MESA_FORMAT_RGB565 ||
   dstFormat == MESA_FORMAT_RGB565_REV);
ASSERT(_mesa_get_format_bytes(dstFormat) == 2);
@@ -1187,37 +1186,20 @@ _mesa_texstore_rgb565(TEXSTORE_PARAMS)
   /* general path */
   const GLubyte *tempImage = _mesa_make_temp_ubyte_image(ctx, dims,
  baseInternalFormat,
- baseFormat,
+ GL_RGBA,
  srcWidth, srcHeight, srcDepth,
  srcFormat, srcType, srcAddr,
  srcPacking);
   const GLubyte *src = tempImage;
-  GLint img, row, col;
+  const GLint srcRowStride = srcWidth * 4 * sizeof(GLubyte);
+  GLint img;
   if (!tempImage)
  return GL_FALSE;
   for (img = 0; img < srcDepth; img++) {
- GLubyte *dstRow = dstSlices[img];
- for (row = 0; row < srcHeight; row++) {
-GLushort *dstUS = (GLushort *) dstRow;
-/* check for byteswapped format */
-if (dstFormat == MESA_FORMAT_RGB565) {
-   for (col = 0; col < srcWidth; col++) {
-  dstUS[col] = PACK_COLOR_565( src[RCOMP],
-   src[GCOMP],
-   src[BCOMP] );
-  src += 3;
-   }
-}
-else {
-   for (col = 0; col < srcWidth; col++) {
-  dstUS[col] = PACK_COLOR_565_REV( src[RCOMP],
-   src[GCOMP],
-   src[BCOMP] );
-  src += 3;
-   }
-}
-dstRow += dstRowStride;
- }
+ _mesa_pack_ubyte_rgba_rect(dstFormat, srcWidth, srcHeight,
+src, srcRowStride,
+dstSlices[img], dstRowStride);
+ src += srcHeight * srcRowStride;
   }
   free((void *) tempImage);
}
@@ -1232,7 +1214,6 @@ static GLboolean
 _mesa_texstore_rgba(TEXSTORE_PARAMS)
 {
const GLboolean littleEndian = _mesa_little_endian();
-   const GLenum baseFormat = _mesa_get_format_base_format(dstFormat);
 
ASSERT(dstFormat == MESA_FORMAT_RGBA ||
   dstFormat == MESA_FORMAT_RGBA_REV ||
@@ -1291,39 +1272,20 @@ _mesa_texstore_rgba(TEXSTORE_PARAMS)
   /* general path */
   const GLubyte *tempImage = _mesa_make_temp_ubyte_image(ctx, dims,
  baseInternalFormat,
- baseFormat,
+ GL_RGBA,
  srcWidth, srcHeight, srcDepth,
  srcFormat, srcType, srcAddr,
  srcPacking);
   const GLubyte *src = tempImage;
-  GLint img, row, col;
+  const GLint srcRowStride = srcWidth * 4 * sizeof(GLubyte);
+  GLint img;
   if (!tempImage)
  return GL_FALSE;
   for (img = 0; img < srcDepth; img++) {
- GLubyte *dstRow = dstSlices[img];
- for (row = 0; row < srcHeight; row++) {
-GLuint *dstUI = (GLuint *) dstRow;
-if (dstFormat == MESA_FORMAT_RGBA ||
-dstFormat == MESA_FORMAT_RGBX) {
-   for (col = 0; col < srcWidth; col++) {
-  dstUI[col] = PACK_COLOR_( src[RCOMP],
-src[GCOMP],
-src[BCOMP],
-src[ACOMP] );
-  src += 4;
-   }
-}
-else {
-   for (col = 0; col < srcWidth; col++) {
-  dstUI[col] = PACK_COLOR__REV( src[RCOMP],
-src[GCOMP],
- 

[Mesa-dev] [PATCH 3/3] mesa: consolidate general ubyte texstore code

2012-01-29 Thread Brian Paul
From: Brian Paul 

---
 src/mesa/main/texstore.c |  242 ++
 1 files changed, 71 insertions(+), 171 deletions(-)

diff --git a/src/mesa/main/texstore.c b/src/mesa/main/texstore.c
index 2f5686e..8c51a94 100644
--- a/src/mesa/main/texstore.c
+++ b/src/mesa/main/texstore.c
@@ -968,6 +968,41 @@ memcpy_texture(struct gl_context *ctx,
 }
 
 
+/**
+ * General-case function for storing a color texture images with
+ * components that can be represented with ubytes.  Example destination
+ * texture formats are MESA_FORMAT_ARGB888, ARGB, RGB565.
+ */
+static GLboolean
+store_ubyte_texture(TEXSTORE_PARAMS)
+{
+   const GLint srcRowStride = srcWidth * 4 * sizeof(GLubyte);
+   GLubyte *tempImage, *src;
+   GLint img;
+
+   tempImage = _mesa_make_temp_ubyte_image(ctx, dims,
+   baseInternalFormat,
+   GL_RGBA,
+   srcWidth, srcHeight, srcDepth,
+   srcFormat, srcType, srcAddr,
+   srcPacking);
+   if (!tempImage)
+  return GL_FALSE;
+
+   src = tempImage;
+   for (img = 0; img < srcDepth; img++) {
+  _mesa_pack_ubyte_rgba_rect(dstFormat, srcWidth, srcHeight,
+ src, srcRowStride,
+ dstSlices[img], dstRowStride);
+  src += srcHeight * srcRowStride;
+   }
+   free(tempImage);
+
+   return GL_TRUE;
+}
+
+
+
 
 /**
  * Store a 32-bit integer or float depth component texture image.
@@ -1183,25 +1218,10 @@ _mesa_texstore_rgb565(TEXSTORE_PARAMS)
   }
}
else {
-  /* general path */
-  const GLubyte *tempImage = _mesa_make_temp_ubyte_image(ctx, dims,
- baseInternalFormat,
- GL_RGBA,
- srcWidth, srcHeight, srcDepth,
- srcFormat, srcType, srcAddr,
- srcPacking);
-  const GLubyte *src = tempImage;
-  const GLint srcRowStride = srcWidth * 4 * sizeof(GLubyte);
-  GLint img;
-  if (!tempImage)
- return GL_FALSE;
-  for (img = 0; img < srcDepth; img++) {
- _mesa_pack_ubyte_rgba_rect(dstFormat, srcWidth, srcHeight,
-src, srcRowStride,
-dstSlices[img], dstRowStride);
- src += srcHeight * srcRowStride;
-  }
-  free((void *) tempImage);
+  return store_ubyte_texture(ctx, dims, baseInternalFormat,
+ dstFormat, dstRowStride, dstSlices,
+ srcWidth, srcHeight, srcDepth,
+ srcFormat, srcType, srcAddr, srcPacking);
}
return GL_TRUE;
 }
@@ -1269,25 +1289,10 @@ _mesa_texstore_rgba(TEXSTORE_PARAMS)
srcPacking);  
}
else {
-  /* general path */
-  const GLubyte *tempImage = _mesa_make_temp_ubyte_image(ctx, dims,
- baseInternalFormat,
- GL_RGBA,
- srcWidth, srcHeight, srcDepth,
- srcFormat, srcType, srcAddr,
- srcPacking);
-  const GLubyte *src = tempImage;
-  const GLint srcRowStride = srcWidth * 4 * sizeof(GLubyte);
-  GLint img;
-  if (!tempImage)
- return GL_FALSE;
-  for (img = 0; img < srcDepth; img++) {
- _mesa_pack_ubyte_rgba_rect(dstFormat, srcWidth, srcHeight,
-src, srcRowStride,
-dstSlices[img], dstRowStride);
- src += srcHeight * srcRowStride;
-  }
-  free((void *) tempImage);
+  return store_ubyte_texture(ctx, dims, baseInternalFormat,
+ dstFormat, dstRowStride, dstSlices,
+ srcWidth, srcHeight, srcDepth,
+ srcFormat, srcType, srcAddr, srcPacking);
}
return GL_TRUE;
 }
@@ -1418,25 +1423,10 @@ _mesa_texstore_argb(TEXSTORE_PARAMS)
srcPacking);  
}
else {
-  /* general path */
-  const GLubyte *tempImage = _mesa_make_temp_ubyte_image(ctx, dims,
- baseInternalFormat,
- GL_RGBA,
- srcWidth, srcHeight, srcDepth,
- srcFormat, srcType, srcAddr,
- srcPacking);
-  const GLubyte *src = tempImage;
-  const GLint srcRowStride = srcWidth 

[Mesa-dev] Automaking src/glsl

2012-01-29 Thread Matt Turner
Here's a patch series to convert the glsl directory to automake. 
I've worked out all the kinks I could find, and the meat of this
series has been posted for review a couple of times already, so
I plan to commit this after Kenneth's two variable_entry patches
go in, probably Monday. (It also trivially depends on automaking
osmesa)

Patches 1, 4, and 5 are new, but 1 is just a rename. 4 and 5 wire
up glcpp's test suite to make check.

Really, I'm just trolling for reviewers and testers. I like knowing
beforehand if I break your build. :)

TODO later:
 - add glsl_test to make check
 - fix FDO 44618

Thanks,
Matt

 bin/.gitignore  |1 +
 configs/autoconf.in |4 +-
 configure.ac|   15 ++-
 src/glsl/.gitignore |8 ++
 src/glsl/Makefile   |  172 ---
 src/glsl/Makefile.am|   81 
 src/glsl/glcpp/.gitignore   |3 +
 src/glsl/glcpp/Makefile.am  |   46 +
 src/glsl/glcpp/tests/glcpp-test |8 +-
 src/mesa/drivers/osmesa/Makefile.am |2 +-
 src/mesa/sources.mak|2 +-
 11 files changed, 159 insertions(+), 183 deletions(-)

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[Mesa-dev] [PATCH 1/5] glsl: rename Makefile.sources' _SOURCES variables

2012-01-29 Thread Matt Turner
automake uses variables named *_SOURCES.
---
 src/glsl/Android.mk   |   18 +-
 src/glsl/Makefile |   16 
 src/glsl/Makefile.sources |   18 +-
 src/glsl/SConscript   |6 +++---
 4 files changed, 29 insertions(+), 29 deletions(-)

diff --git a/src/glsl/Android.mk b/src/glsl/Android.mk
index d7d17dd..754f3cc 100644
--- a/src/glsl/Android.mk
+++ b/src/glsl/Android.mk
@@ -34,9 +34,9 @@ include $(LOCAL_PATH)/Makefile.sources
 include $(CLEAR_VARS)
 
 LOCAL_SRC_FILES := \
-   $(LIBGLCPP_SOURCES) \
-   $(LIBGLSL_SOURCES) \
-   $(LIBGLSL_CXX_SOURCES)
+   $(LIBGLCPP_FILES) \
+   $(LIBGLSL_FILES) \
+   $(LIBGLSL_CXX_FILES)
 
 LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mapi \
@@ -55,11 +55,11 @@ include $(BUILD_STATIC_LIBRARY)
 include $(CLEAR_VARS)
 
 LOCAL_SRC_FILES := \
-   $(LIBGLCPP_SOURCES) \
-   $(LIBGLSL_SOURCES) \
-   $(LIBGLSL_CXX_SOURCES) \
-   $(BUILTIN_COMPILER_CXX_SOURCES) \
-   $(GLSL_COMPILER_CXX_SOURCES)
+   $(LIBGLCPP_FILES) \
+   $(LIBGLSL_FILES) \
+   $(LIBGLSL_CXX_FILES) \
+   $(BUILTIN_COMPILER_CXX_FILES) \
+   $(GLSL_COMPILER_CXX_FILES)
 
 LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mapi \
@@ -82,7 +82,7 @@ include $(BUILD_HOST_EXECUTABLE)
 include $(CLEAR_VARS)
 
 LOCAL_SRC_FILES := \
-   $(GLSL_COMPILER_CXX_SOURCES)
+   $(GLSL_COMPILER_CXX_FILES)
 
 LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mapi \
diff --git a/src/glsl/Makefile b/src/glsl/Makefile
index d9ecbc8..f6c7229 100644
--- a/src/glsl/Makefile
+++ b/src/glsl/Makefile
@@ -10,20 +10,20 @@ LIBNAME = glsl
 include Makefile.sources
 
 GLCPP_SOURCES = \
-   $(LIBGLCPP_GENERATED_SOURCES) \
-   $(LIBGLCPP_SOURCES) \
+   $(LIBGLCPP_GENERATED_FILES) \
+   $(LIBGLCPP_FILES) \
ralloc.c \
glcpp/glcpp.c
 
 C_SOURCES = \
-   $(LIBGLCPP_GENERATED_SOURCES) \
-   $(LIBGLCPP_SOURCES) \
-   $(LIBGLSL_SOURCES)
+   $(LIBGLCPP_GENERATED_FILES) \
+   $(LIBGLCPP_FILES) \
+   $(LIBGLSL_FILES)
 
 # common sources for builtin_compiler and libglsl
 CXX_SOURCES = \
-   $(BUILTIN_COMPILER_GENERATED_CXX_SOURCES) \
-   $(LIBGLSL_CXX_SOURCES)
+   $(BUILTIN_COMPILER_GENERATED_CXX_FILES) \
+   $(LIBGLSL_CXX_FILES)
 
 LIBS = \
$(TOP)/src/glsl/libglsl.a
@@ -34,7 +34,7 @@ GLSL2_C_SOURCES = \
../mesa/program/hash_table.c \
../mesa/program/symbol_table.c
 GLSL2_CXX_SOURCES = \
-   $(GLSL_COMPILER_CXX_SOURCES)
+   $(GLSL_COMPILER_CXX_FILES)
 
 GLSL2_OBJECTS = \
$(GLSL2_C_SOURCES:.c=.o) \
diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources
index 5e80af2..06728da 100644
--- a/src/glsl/Makefile.sources
+++ b/src/glsl/Makefile.sources
@@ -2,20 +2,20 @@
 
 # libglcpp
 
-LIBGLCPP_SOURCES := \
+LIBGLCPP_FILES := \
glcpp/pp.c
 
-LIBGLCPP_GENERATED_SOURCES := \
+LIBGLCPP_GENERATED_FILES := \
glcpp/glcpp-lex.c \
glcpp/glcpp-parse.c
 
 # libglsl
 
-LIBGLSL_SOURCES := \
+LIBGLSL_FILES := \
strtod.c \
ralloc.c
 
-LIBGLSL_CXX_SOURCES := \
+LIBGLSL_CXX_FILES := \
ast_expr.cpp \
ast_function.cpp \
ast_to_hir.cpp \
@@ -82,7 +82,7 @@ LIBGLSL_CXX_SOURCES := \
 
 # glsl_compiler
 
-GLSL_COMPILER_CXX_SOURCES := \
+GLSL_COMPILER_CXX_FILES := \
standalone_scaffolding.cpp \
main.cpp
 
@@ -92,14 +92,14 @@ GLSL_COMPILER_CXX_SOURCES := \
 # For this to work, a dummy version of builtin_function.cpp,
 # builtin_stubs.cpp, is used.
 
-BUILTIN_COMPILER_CXX_SOURCES := \
+BUILTIN_COMPILER_CXX_FILES := \
builtin_stubs.cpp
 
-BUILTIN_COMPILER_GENERATED_CXX_SOURCES := \
+BUILTIN_COMPILER_GENERATED_CXX_FILES := \
glsl_lexer.cpp \
glsl_parser.cpp
 
 # libglsl generated sources
-LIBGLSL_GENERATED_CXX_SOURCES := \
-   $(BUILTIN_COMPILER_GENERATED_CXX_SOURCES) \
+LIBGLSL_GENERATED_CXX_FILES := \
+   $(BUILTIN_COMPILER_GENERATED_CXX_FILES) \
builtin_function.cpp
diff --git a/src/glsl/SConscript b/src/glsl/SConscript
index b8154d6..f8e8723 100644
--- a/src/glsl/SConscript
+++ b/src/glsl/SConscript
@@ -42,7 +42,7 @@ glsl_sources = [
 source_lists = env.ParseSourceList('Makefile.sources')
 
 # add non-generated sources
-for l in ('LIBGLCPP_SOURCES', 'LIBGLSL_SOURCES', 'LIBGLSL_CXX_SOURCES'):
+for l in ('LIBGLCPP_FILES', 'LIBGLSL_FILES', 'LIBGLSL_CXX_FILES'):
 glsl_sources += source_lists[l]
 
 if env['msvc']:
@@ -57,7 +57,7 @@ else:
 env.Command('hash_table.c', '#src/mesa/program/hash_table.c', 
Copy('$TARGET', '$SOURCE'))
 env.Command('symbol_table.c', '#src/mesa/program/symbol_table.c', 
Copy('$TARGET', '$SOURCE'))
 
-compiler_objs = env.StaticObject(source_lists['GLSL_COMPILER_CXX_SOURCES'])
+compiler_objs = env.StaticObject(source_lists['GLSL_COMPILER_CXX_FILES'])
 
 mesa_objs = env.StaticObject([
 'hash_table.c',
@@ -69,7 +69,7 @@ else:
 builtin_compiler = env.Program(
 target = 'builti

[Mesa-dev] [PATCH 2/5] autoconf: use AC_PROG_YACC/LEX

2012-01-29 Thread Matt Turner
Needed for automake. Using AC_PROG_PATH(bison/flex) causes automake to
fail to build .y and .l files.

It is up to the builder to use bison/flex instead of yacc/lex.
---
 bin/.gitignore  |1 +
 configs/autoconf.in |4 ++--
 configure.ac|   13 -
 3 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/bin/.gitignore b/bin/.gitignore
index 3b3f168..5cf62d9 100644
--- a/bin/.gitignore
+++ b/bin/.gitignore
@@ -1,2 +1,3 @@
 /depcomp
 /missing
+ylwrap
diff --git a/configs/autoconf.in b/configs/autoconf.in
index a8aa42dd..bb8f2c3 100644
--- a/configs/autoconf.in
+++ b/configs/autoconf.in
@@ -63,8 +63,8 @@ PYTHON2 = @PYTHON2@
 PYTHON_FLAGS = -t -O -O
 
 # Flex and Bison for GLSL compiler
-FLEX = @FLEX@
-BISON = @BISON@
+FLEX = @LEX@
+BISON = @YACC@
 
 # Library names (base name)
 GL_LIB = @GL_LIB@
diff --git a/configure.ac b/configure.ac
index 4816db1..ef560a8 100644
--- a/configure.ac
+++ b/configure.ac
@@ -54,11 +54,14 @@ if test "x$MKDEP" = "x"; then
 AC_MSG_ERROR([makedepend is required to build Mesa])
 fi
 
-AC_PATH_PROG([FLEX], [flex])
-test "x$FLEX" = "x" && AC_MSG_ERROR([flex is needed to build Mesa])
-
-AC_PATH_PROG([BISON], [bison])
-test "x$BISON" = "x" && AC_MSG_ERROR([bison is needed to build Mesa])
+AC_PROG_YACC
+AC_PATH_PROG([YACC_INST], $YACC)
+if test ! -f "$srcdir/src/glsl/glcpp/glcpp-parse.y"; then
+if test -z "$YACC_INST"; then
+AC_MSG_ERROR([yacc not found - unable to compile glcpp-parse.y])
+fi
+fi
+AC_PROG_LEX
 
 dnl Our fallback install-sh is a symlink to minstall. Use the existing
 dnl configuration in that case.
-- 
1.7.3.4

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[Mesa-dev] [PATCH 3/5] automake: src/glsl and src/glsl/glcpp

2012-01-29 Thread Matt Turner
---
 configure.ac|2 +
 src/glsl/.gitignore |8 ++
 src/glsl/Makefile   |  172 ---
 src/glsl/Makefile.am|   81 
 src/glsl/glcpp/.gitignore   |3 +
 src/glsl/glcpp/Makefile.am  |   44 +
 src/mesa/drivers/osmesa/Makefile.am |2 +-
 src/mesa/sources.mak|2 +-
 8 files changed, 140 insertions(+), 174 deletions(-)
 delete mode 100644 src/glsl/Makefile
 create mode 100644 src/glsl/Makefile.am
 create mode 100644 src/glsl/glcpp/Makefile.am

diff --git a/configure.ac b/configure.ac
index ef560a8..eb3540b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1908,6 +1908,8 @@ dnl Substitute the config
 AC_CONFIG_FILES([configs/autoconf
src/gbm/Makefile
src/gbm/main/gbm.pc
+   src/glsl/Makefile
+   src/glsl/glcpp/Makefile
src/egl/wayland/Makefile
src/egl/wayland/wayland-egl/Makefile
src/egl/wayland/wayland-egl/wayland-egl.pc
diff --git a/src/glsl/.gitignore b/src/glsl/.gitignore
index d26839a..c692f49 100644
--- a/src/glsl/.gitignore
+++ b/src/glsl/.gitignore
@@ -1,5 +1,13 @@
+.deps
+.libs
+Makefile
+Makefile.in
+libglsl.la
+libglslcore.la
 glsl_compiler
+glsl_lexer.cc
 glsl_lexer.cpp
+glsl_parser.cc
 glsl_parser.cpp
 glsl_parser.h
 glsl_parser.output
diff --git a/src/glsl/Makefile b/src/glsl/Makefile
deleted file mode 100644
index f6c7229..000
--- a/src/glsl/Makefile
+++ /dev/null
@@ -1,172 +0,0 @@
-
-#src/glsl/pp/Makefile
-
-TOP = ../..
-
-include $(TOP)/configs/current
-
-LIBNAME = glsl
-
-include Makefile.sources
-
-GLCPP_SOURCES = \
-   $(LIBGLCPP_GENERATED_FILES) \
-   $(LIBGLCPP_FILES) \
-   ralloc.c \
-   glcpp/glcpp.c
-
-C_SOURCES = \
-   $(LIBGLCPP_GENERATED_FILES) \
-   $(LIBGLCPP_FILES) \
-   $(LIBGLSL_FILES)
-
-# common sources for builtin_compiler and libglsl
-CXX_SOURCES = \
-   $(BUILTIN_COMPILER_GENERATED_CXX_FILES) \
-   $(LIBGLSL_CXX_FILES)
-
-LIBS = \
-   $(TOP)/src/glsl/libglsl.a
-
-APPS = glsl_compiler glsl_test glcpp/glcpp
-
-GLSL2_C_SOURCES = \
-   ../mesa/program/hash_table.c \
-   ../mesa/program/symbol_table.c
-GLSL2_CXX_SOURCES = \
-   $(GLSL_COMPILER_CXX_FILES)
-
-GLSL2_OBJECTS = \
-   $(GLSL2_C_SOURCES:.c=.o) \
-   $(GLSL2_CXX_SOURCES:.cpp=.o)
-
-TEST_C_SOURCES = \
-   ../mesa/program/hash_table.c \
-   ../mesa/program/symbol_table.c
-
-TEST_CXX_SOURCES = \
-   standalone_scaffolding.cpp \
-   test.cpp \
-   test_optpass.cpp
-
-TEST_OBJECTS = \
-   $(TEST_C_SOURCES:.c=.o) \
-   $(TEST_CXX_SOURCES:.cpp=.o)
-
-### Basic defines ###
-
-DEFINES += \
-   $(LIBRARY_DEFINES) \
-   $(API_DEFINES)
-
-GLCPP_OBJECTS = \
-   $(GLCPP_SOURCES:.c=.o) \
-   ../mesa/program/hash_table.o
-
-OBJECTS = \
-   $(C_SOURCES:.c=.o) \
-   $(CXX_SOURCES:.cpp=.o)
-
-DRICORE_OBJ_DIR = obj-visible
-OBJECTS_DRICORE = $(addprefix $(DRICORE_OBJ_DIR)/,$(OBJECTS))
-
-INCLUDES = \
-   -I. \
-   -I../mesa \
-   -I../mapi \
-   -I../../include \
-   $(LIBRARY_INCLUDES)
-
-ALL_SOURCES = \
-   $(C_SOURCES) \
-   $(CXX_SOURCES) \
-   $(GLSL2_CXX_SOURCES) \
-   $(GLSL2_C_SOURCES) \
-   $(TEST_CXX_SOURCES) \
-   $(TEST_C_SOURCES)
-
-# TARGETS #
-
-default: depend lib$(LIBNAME).a $(APPS) $(DRICORE_GLSL_LIBS)
-
-$(TOP)/$(LIB_DIR)/libglsl.so: $(OBJECTS_DRICORE) builtin_function.o Makefile 
$(TOP)/src/glsl/Makefile.template
-   $(MKLIB) -o $@ -linker '$(CXX)' -ldflags '$(LDFLAGS)' \
-   -cplusplus -noprefix \
-   -install $(TOP)/$(LIB_DIR) -id $(INSTALL_LIB_DIR)/$@.dylib \
-   $(OBJECTS_DRICORE) builtin_function.o
-
-lib$(LIBNAME).a: $(OBJECTS) builtin_function.o Makefile 
$(TOP)/src/glsl/Makefile.template
-   $(MKLIB) -cplusplus -o $(LIBNAME) -static $(OBJECTS) builtin_function.o
-
-depend: $(ALL_SOURCES) Makefile
-   rm -f depend
-   touch depend
-   $(MKDEP) $(MKDEP_OPTIONS) $(INCLUDES) $(ALL_SOURCES) 2> /dev/null
-   $(MKDEP) $(MKDEP_OPTIONS) -a -p $(DRICORE_OBJ_DIR)/ $(INCLUDES) 
$(ALL_SOURCES) 2> /dev/null
-
-# Remove .o and backup files
-clean: clean-dricore
-   rm -f $(GLCPP_OBJECTS) $(GLSL2_OBJECTS) $(TEST_OBJECTS) $(OBJECTS) 
lib$(LIBNAME).a depend depend.bak builtin_function.cpp builtin_function.o 
builtin_stubs.o builtin_compiler
-   -rm -f $(APPS)
-
-clean-dricore:
-   -rm -f $(OBJECTS_DRICORE) $(TOP)/$(LIB_DIR)/libglsl.so libglsl.so
-
-ifneq (,$(DRICORE_GLSL_LIBS))
-DRICORE_INSTALL_TARGET = install-dricore
-endif
-
-# Dummy target
-install: $(DRICORE_INSTALL_TARGET)
-   @echo -n ""
-
-install-dricore: default
-   $(INSTALL) -d $(DESTDIR)$(DRI_DRIVER_INSTALL_DIR)
-   $(INSTALL) -m 755 $(DRICORE_GLSL_LIBS) 
$(DESTDIR)$(DRI_DRIVER_INSTALL_DIR)
-
-# RULES #
-
-glsl_compiler: $(GLSL2_OBJECTS) libglsl

[Mesa-dev] [PATCH 4/5] glcpp-test: don't return failure if valgrind tests aren't run

2012-01-29 Thread Matt Turner
Success was (tests-passed AND valgrind-tests-passed) but this meant that
if the valgrind tests weren't run it would be considered a failure.

The logic is now (tests-passed AND (!valgrind OR valgrind-tests-passed))
which lets us return success if the valgrind tests aren't run.
---
 src/glsl/glcpp/tests/glcpp-test |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/src/glsl/glcpp/tests/glcpp-test b/src/glsl/glcpp/tests/glcpp-test
index e8f3b54..1db7523 100755
--- a/src/glsl/glcpp/tests/glcpp-test
+++ b/src/glsl/glcpp/tests/glcpp-test
@@ -72,7 +72,7 @@ if [ "$do_valgrind" = "yes" ]; then
 echo "$clean/$total tests are valgrind-clean"
 fi
 
-if [ "$pass" = "$total" ] && [ "$clean" = "$total" ]; then
+if [ "$pass" = "$total" ] && [ "$do_valgrind" != "yes" ] || [ "$pass" = 
"$total" ]; then
 exit 0
 else
 exit 1
-- 
1.7.3.4

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[Mesa-dev] [PATCH 5/5] src/glsl/glcpp: wire up glcpp-test to make check

2012-01-29 Thread Matt Turner
---
 src/glsl/glcpp/Makefile.am  |2 ++
 src/glsl/glcpp/tests/glcpp-test |6 +-
 2 files changed, 7 insertions(+), 1 deletions(-)

diff --git a/src/glsl/glcpp/Makefile.am b/src/glsl/glcpp/Makefile.am
index 198908c..68f55dc 100644
--- a/src/glsl/glcpp/Makefile.am
+++ b/src/glsl/glcpp/Makefile.am
@@ -24,6 +24,8 @@
 noinst_LTLIBRARIES = libglcpp.la
 check_PROGRAMS = glcpp
 
+TESTS = tests/glcpp-test
+
 AM_CPPFLAGS = \
-I$(top_srcdir)/src/mesa \
-I$(top_srcdir)/src/mapi \
diff --git a/src/glsl/glcpp/tests/glcpp-test b/src/glsl/glcpp/tests/glcpp-test
index 1db7523..1f37139 100755
--- a/src/glsl/glcpp/tests/glcpp-test
+++ b/src/glsl/glcpp/tests/glcpp-test
@@ -34,10 +34,14 @@ total=0
 pass=0
 clean=0
 
+builddir=`pwd`
+testdir=`dirname $0`
+cd $testdir
+
 echo "== Testing for correctness =="
 for test in *.c; do
 echo -n "Testing $test..."
-../glcpp < $test > $test.out 2>&1
+$builddir/glcpp < $test > $test.out 2>&1
 total=$((total+1))
 if cmp $test.expected $test.out >/dev/null 2>&1; then
echo "PASS"
-- 
1.7.3.4

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[Mesa-dev] [PATCH/RFC] glsl: Avoid excessive loop unrolling.

2012-01-29 Thread Mathias Fröhlich

Hi,

I am trying to make the shaders from a sky scattering shader work with mesa.
One of the problems is that the shader contains a nested 16 x 32 loop with an 
instruction intensive body. The glsl loop unrolling pass is trying to unroll 
both loops since both of them have a fixed size <=32. Compiling this shader 
gets stuck in do_common_optimization (= takes more than 10 minutes) since 
unrolling and then optimizing that huge 16*32*(function body) intruction count 
kills the runtime behavour of other optimization passes.

Attached is a change that additionally skips loop unrolling if either the loop 
is a nested loop or the instruction count of the body times the constant 
iteration count exceeds the former max iteration count times 5 instructions.
This makes the above shaders at least compile within the usual fraction of a 
second.

Comments/Review?

Thanks

Mathias>From d6a2a0ac66b8594c258468fc5f42b0dae720e632 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Mathias=20Fr=C3=B6hlich?= 
Date: Wed, 25 Jan 2012 17:35:01 +0100
Subject: [PATCH] glsl: Avoid excessive loop unrolling.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Avoid unrollong loops that are either nested loops or
where the loop body times the unroll count is huge.

The change is far from being perfect but it extends the
loop unrolling decision heuristic by some additional
safeguard. In particular this cuts down compilation of
a shader precomputing atmospheric scattering integral
tables containing two nesting levels in a loop from
something way beyond some minutes (I never waited for
it to finish) to some fractions of a second.

Signed-off-by: Mathias Fröhlich 
---
 src/glsl/loop_unroll.cpp |   15 +++
 1 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/src/glsl/loop_unroll.cpp b/src/glsl/loop_unroll.cpp
index 5b84e10..d0bcaa6 100644
--- a/src/glsl/loop_unroll.cpp
+++ b/src/glsl/loop_unroll.cpp
@@ -56,6 +56,7 @@ loop_unroll_visitor::visit_leave(ir_loop *ir)
 {
loop_variable_state *const ls = this->state->get(ir);
int iterations;
+   unsigned ir_count;
 
/* If we've entered a loop that hasn't been analyzed, something really,
 * really bad has happened.
@@ -78,6 +79,20 @@ loop_unroll_visitor::visit_leave(ir_loop *ir)
if (iterations > (int) max_iterations)
   return visit_continue;
 
+   /* Don't try to unroll nested loops and loops with a huge body.
+*/
+   ir_count = 0;
+   foreach_list(node, &ir->body_instructions) {
+  ++ir_count;
+
+  /* If the loop body gets to huge, do not unroll. */
+  if (5*max_iterations < ir_count*iterations)
+  return visit_continue;
+  /* Do not unroll loops with child loop nodes. */
+  if (((ir_instruction *) node)->as_loop())
+  return visit_continue;
+   }
+
if (ls->num_loop_jumps > 1)
   return visit_continue;
else if (ls->num_loop_jumps) {
-- 
1.7.7.6

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Re: [Mesa-dev] Help required in configuring mesa 3d in non X environment.

2012-01-29 Thread Sanjoy Saha - ERS, HCL Tech
Mat,
   Thanks for your reply. Just to update you on my requirement i wanted to run 
mesa on HPCN8641 (PPC) without X server, Graphics card PCIE ATI radeon E4690.
I ran ./autogen.sh and i get the below error (No X server 
present/header/library). I patched up the configure script to ignore dependency.
Can you suggest me a way where i can run mesa with 3d acceleration ? I have 
back ported the DRM kernel module.
As per my project requirement i have to run mesa 3d with OpenGL ES1.0 / 1.1 
with hardware acceleration enabled. Earlier post suggested me to run mesa with 
EGL to support HW acceleration.

./configure --enable-gallium-egl --with-egl-platforms=drm --enable-shared-glapi 
--with-gallium-drivers=r600 --enable-gles1

But i run into same error "No X server present / missing header and library).

root@MPC8641HPCN:~/working/mesa-8.0-rc2# ./autogen.sh
autoreconf: Entering directory `.'
autoreconf: configure.ac: not using Gettext
autoreconf: running: aclocal
configure.ac:15: warning: AC_INIT: not a literal: 
https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa
autoreconf: configure.ac: tracing
configure.ac:15: warning: AC_INIT: not a literal: 
https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa
autoreconf: configure.ac: not using Libtool
autoreconf: running: /usr/bin/autoconf
configure.ac:15: warning: AC_INIT: not a literal: 
https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa
autoreconf: configure.ac: not using Autoheader
autoreconf: running: automake --add-missing --copy --no-force
configure.ac:15: warning: AC_INIT: not a literal: 
https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa
configure.ac:19: installing `bin/missing'
tests/glx/Makefile.am: installing `bin/depcomp'
autoreconf: Leaving directory `.'
checking build system type... powerpc-unknown-linux-gnu
checking host system type... powerpc-unknown-linux-gnu
checking for a BSD-compatible install... /usr/bin/install -c
checking whether build environment is sane... yes
checking for a thread-safe mkdir -p... /bin/mkdir -p
checking for gawk... no
checking for mawk... mawk
checking whether make sets $(MAKE)... yes
checking for style of include used by make... GNU
checking for gcc... gcc
checking whether the C compiler works... yes
checking for C compiler default output file name... a.out
checking for suffix of executables...
checking whether we are cross compiling... no
checking for suffix of object files... o
checking whether we are using the GNU C compiler... yes
checking whether gcc accepts -g... yes
checking for gcc option to accept ISO C89... none needed
checking dependency style of gcc... gcc3
checking how to run the C preprocessor... gcc -E
checking for gcc... (cached) gcc
checking whether we are using the GNU C compiler... (cached) yes
checking whether gcc accepts -g... (cached) yes
checking for gcc option to accept ISO C89... (cached) none needed
checking dependency style of gcc... (cached) gcc3
checking for g++... g++
checking whether we are using the GNU C++ compiler... yes
checking whether g++ accepts -g... yes
checking dependency style of g++... gcc3
checking for gmake... no
checking for make... make
checking for python2... no
checking for python... python
checking for a sed that does not truncate output... /bin/sed
checking for makedepend... /usr/bin/makedepend
checking for flex... /usr/bin/flex
checking for bison... /usr/bin/bison
checking for gtest-config... no
checking if compiling with clang... no
checking whether gcc version is sufficient... yes
checking for pkg-config... /usr/bin/pkg-config
checking pkg-config is at least version 0.9.0... yes
checking whether gcc supports -fvisibility=hidden... yes
checking whether g++ supports -fvisibility=hidden... yes
checking whether to enable assembly... yes, ppc
checking for gcc option to produce PIC... -fPIC
checking for dlopen... no
checking for dlopen in -ldl... yes
checking for posix_memalign... yes
checking for LIBDRM... yes
checking pkg-config files for X11 are available... no
checking for X... no
configure: error: X11 development libraries needed for GLX

Thank You
Sanjoy Saha

From: Matt Turner [matts...@gmail.com]
Sent: Friday, January 27, 2012 9:22 PM
To: Sanjoy Saha - ERS, HCL Tech
Cc: Michel Dänzer; mesa-dev@lists.freedesktop.org
Subject: Re: [Mesa-dev] Help required in configuring mesa 3d in non X 
environment.

2012/1/26 Sanjoy Saha - ERS, HCL Tech :
> Michel,
>As per the below instructions i tried to compile mesa as follows. But i 
> get a compilation error in make process. Can you please help me out here ?
>
> ./configure --enable-gallium-egl --with-egl-platforms=drm 
> --enable-shared-glapi --with-gallium-drivers=r600 --enable-gles1

Related to conversation in another thread -- did you realize that
without --with-dri-drivers="" that you were building the i915, i965,
radeon, r200, nouveau, and swrast DRI drivers (see configure output
below)?

>prefix:  /usr/local
>exec_prefix: ${prefix}
>