[llvm-commits] [llvm] r44999 - /llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
Author: wmat
Date: Thu Dec 13 10:22:58 2007
New Revision: 44999
URL: http://llvm.org/viewvc/llvm-project?rev=44999&view=rev
Log:
Make these loops follow GetGEPOperands() behavior.
Let: %q = GEP %p, X, ...
If %p is a GEP, we can chase baseptr further, only if X==0.
Modified:
llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
Modified: llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp?rev=44999&r1=44998&r2=44999&view=diff
==
--- llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp (original)
+++ llvm/trunk/lib/Analysis/BasicAliasAnalysis.cpp Thu Dec 13 10:22:58 2007
@@ -391,17 +391,19 @@
if (isGEP(V1) && isGEP(V2)) {
// Drill down into the first non-gep value, to test for must-aliasing of
// the base pointers.
-const Value *BasePtr1 = V1, *BasePtr2 = V2;
-do {
- BasePtr1 = cast(BasePtr1)->getOperand(0);
-} while (isGEP(BasePtr1) &&
- cast(BasePtr1)->getOperand(1) ==
- Constant::getNullValue(cast(BasePtr1)->getOperand(1)->getType()));
-do {
- BasePtr2 = cast(BasePtr2)->getOperand(0);
-} while (isGEP(BasePtr2) &&
- cast(BasePtr2)->getOperand(1) ==
- Constant::getNullValue(cast(BasePtr2)->getOperand(1)->getType()));
+const User *G = cast(V1);
+while (isGEP(G->getOperand(0)) &&
+ G->getOperand(1) ==
+ Constant::getNullValue(G->getOperand(1)->getType()))
+ G = cast(G->getOperand(0));
+const Value *BasePtr1 = G->getOperand(0);
+
+G = cast(V2);
+while (isGEP(G->getOperand(0)) &&
+ G->getOperand(1) ==
+ Constant::getNullValue(G->getOperand(1)->getType()))
+ G = cast(G->getOperand(0));
+const Value *BasePtr2 = G->getOperand(0);
// Do the base pointers alias?
AliasResult BaseAlias = alias(BasePtr1, ~0U, BasePtr2, ~0U);
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Re: [llvm-commits] RFC: patch for PR1782 (BasicAliasAnalyis)
Chris Lattner wrote: >> Suppose, we have a target with 32-bit pointers and the following >> instructions: >> >> %p = getelementptr i32* %x, i32 -1 >> %q = getelementptr i32* %x, i32 1073741823 ;(1073741823 == 2^30 - 1) >> >> TargetData::getIndexedOffset() uses 64-bit arithmetic to perform >> offset >> computation and return 64-bit values. Hence, it will return -4 as an >> offset for %p, and 2^32 - 4 for %q. Based on these offsets, it may >> seem >> that %p and %q point to different memory objects. However, they don't, >> taking into account that pointers are 32-bit long. > > Ok. > >> I guess, such a large positive index in GEP as seen above can be >> introduced by -instcombine pass. > > Ok. This is somewhat dubious though, as it is wrapping around the end > of the address space which is undefined in C. I've found one place in instcombine, where something like this can be introduced. Fixed with this patch: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20071210/056253.html >> I think, the simplest way to fix it is to truncate the computed offset >> to the target pointer size before returning it in >> TargetData::getIndexedOffset(). If you think this is the correct >> approach, I may prepare a patch. > > Ah, that does make a lot of sense. Since the fix is simple, please go > for it! I've rethought the issue. If you say that, wrapping around the memory by getelementptr is undefined, I think it's better to leave it as it is. This way we'll be able to catch other optimizer bugs, if there are any of the above kind. -Wojtek ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.0] r45009 - in /llvm-gcc-4.0/trunk/gcc: config/darwin.h except.c llvm-convert.cpp unwind-dw2.c
Author: johannes
Date: Thu Dec 13 12:32:10 2007
New Revision: 45009
URL: http://llvm.org/viewvc/llvm-project?rev=45009&view=rev
Log:
Make exceptions work on Darwin
Modified:
llvm-gcc-4.0/trunk/gcc/config/darwin.h
llvm-gcc-4.0/trunk/gcc/except.c
llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
llvm-gcc-4.0/trunk/gcc/unwind-dw2.c
Modified: llvm-gcc-4.0/trunk/gcc/config/darwin.h
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/config/darwin.h?rev=45009&r1=45008&r2=45009&view=diff
==
--- llvm-gcc-4.0/trunk/gcc/config/darwin.h (original)
+++ llvm-gcc-4.0/trunk/gcc/config/darwin.h Thu Dec 13 12:32:10 2007
@@ -1748,6 +1748,10 @@
else if (!MACHO_DYNAMIC_NO_PIC_P) \
argvec.push_back ("--relocation-model=static")
#endif /* defined (TARGET_386) */
+
+/* On Darwin _Unwind_Resume is sensitive to the dynamic stack layout; we
+ use _Unwind_Resume_or_Rethrow instead. */
+#define LLVM_STACKSENSITIVE_UNWIND_RESUME 1
#endif
/* APPLE LOCAL end LLVM */
Modified: llvm-gcc-4.0/trunk/gcc/except.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/except.c?rev=45009&r1=45008&r2=45009&view=diff
==
--- llvm-gcc-4.0/trunk/gcc/except.c (original)
+++ llvm-gcc-4.0/trunk/gcc/except.c Thu Dec 13 12:32:10 2007
@@ -3510,9 +3510,13 @@
default_init_unwind_resume_libfunc (void)
{
/* The default c++ routines aren't actually c++ specific, so use those. */
- unwind_resume_libfunc =
-init_one_libfunc ( USING_SJLJ_EXCEPTIONS ? "_Unwind_SjLj_Resume"
-: "_Unwind_Resume");
+ unwind_resume_libfunc = init_one_libfunc ( USING_SJLJ_EXCEPTIONS ?
+ "_Unwind_SjLj_Resume"
+#ifdef LLVM_STACKSENSITIVE_UNWIND_RESUME
+ : "_Unwind_Resume_or_Rethrow");
+#else
+ : "_Unwind_Resume");
+#endif
}
/* APPLE LOCAL end LLVM */
Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp?rev=45009&r1=45008&r2=45009&view=diff
==
--- llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Thu Dec 13 12:32:10 2007
@@ -2178,7 +2178,12 @@
NULL);
FuncUnwindResume =
-TheModule->getOrInsertFunction("_Unwind_Resume",
+TheModule->getOrInsertFunction(
+#ifdef LLVM_STACKSENSITIVE_UNWIND_RESUME
+ "_Unwind_Resume_or_Rethrow",
+#else
+ "_Unwind_Resume",
+#endif
Type::getPrimitiveType(Type::VoidTyID),
PointerType::get(Type::Int8Ty),
NULL);
Modified: llvm-gcc-4.0/trunk/gcc/unwind-dw2.c
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/unwind-dw2.c?rev=45009&r1=45008&r2=45009&view=diff
==
--- llvm-gcc-4.0/trunk/gcc/unwind-dw2.c (original)
+++ llvm-gcc-4.0/trunk/gcc/unwind-dw2.c Thu Dec 13 12:32:10 2007
@@ -1318,7 +1318,14 @@
static inline _Unwind_Ptr
uw_identify_context (struct _Unwind_Context *context)
{
+/* LLVM LOCAL begin
+ This change is needed to match Apple's installed libgcc. */
+#ifdef LLVM_STACKSENSITIVE_UNWIND_RESUME
+ return _Unwind_GetCFA (context);
+#else
return _Unwind_GetIP (context);
+#endif
+/* LLVM LOCAL end */
}
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[llvm-commits] [llvm] r45010 - /llvm/tags/Apple/llvmCore-2005/
Author: void Date: Thu Dec 13 12:53:57 2007 New Revision: 45010 URL: http://llvm.org/viewvc/llvm-project?rev=45010&view=rev Log: Creating llvmCore-2005 tag. Added: llvm/tags/Apple/llvmCore-2005/ - copied from r45009, llvm/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
Re: [llvm-commits] [llvm] r44954 - in /llvm/trunk: lib/CodeGen/SelectionDAG/SelectionDAG.cpp lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/vec_ctbits.ll
>> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original) >> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Wed Dec 12 >> 16:21:26 2007 >> @@ -483,6 +483,12 @@ >> setOperationAction(ISD::CTPOP, (MVT::ValueType)VT, Expand); >> setOperationAction(ISD::CTTZ, (MVT::ValueType)VT, Expand); >> setOperationAction(ISD::CTLZ, (MVT::ValueType)VT, Expand); >> +setOperationAction(ISD::SHL, (MVT::ValueType)VT, Expand); >> +setOperationAction(ISD::SRA, (MVT::ValueType)VT, Expand); >> +setOperationAction(ISD::SRL, (MVT::ValueType)VT, Expand); >> +setOperationAction(ISD::ROTL, (MVT::ValueType)VT, Expand); >> +setOperationAction(ISD::ROTR, (MVT::ValueType)VT, Expand); >> +setOperationAction(ISD::BSWAP, (MVT::ValueType)VT, Expand); >>} > > Hi Dan, > > How do you create these nodes with vector types (in C)? I don't think > the legalizer is capable of expanding these ops with vector types? SelectionDAGLegalize::ExpandBitCount uses ISD::SRL when lowering ISD::CTPOP, so a vector CTPOP gets a vector SRL, for example. I noticed a bug with the way this works though; I'll fix that shortly. Also, in C, one could vectorize a[i] << b[i], though LLVM doesn't currently support that. The legalizer expands these by running SplitVectorOp and ScalarizeVectorOp as necessary, just as with other operations. Dan -- Dan Gohman, Cray Inc. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [test-suite] r45011 - /test-suite/trunk/Makefile.programs
Author: evancheng Date: Thu Dec 13 12:58:22 2007 New Revision: 45011 URL: http://llvm.org/viewvc/llvm-project?rev=45011&view=rev Log: Change x86 llcbeta back to -new-coalescer-heuristic=true Modified: test-suite/trunk/Makefile.programs Modified: test-suite/trunk/Makefile.programs URL: http://llvm.org/viewvc/llvm-project/test-suite/trunk/Makefile.programs?rev=45011&r1=45010&r2=45011&view=diff == --- test-suite/trunk/Makefile.programs (original) +++ test-suite/trunk/Makefile.programs Thu Dec 13 12:58:22 2007 @@ -222,8 +222,7 @@ LLCBETAOPTION := -sched=simple endif ifeq ($(ARCH),x86) -LLCBETAOPTION := -optimize-ext-uses -#-new-coalescer-heuristic=true +LLCBETAOPTION := -new-coalescer-heuristic=true #-tailcallopt #-regalloc=local -fast #-disable-rematerialization ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r45012 - /llvm-gcc-4.2/tags/Apple/llvmgcc42-2003/
Author: void Date: Thu Dec 13 13:01:20 2007 New Revision: 45012 URL: http://llvm.org/viewvc/llvm-project?rev=45012&view=rev Log: Creating llvmgcc-2003 tag. Added: llvm-gcc-4.2/tags/Apple/llvmgcc42-2003/ - copied from r45011, llvm-gcc-4.2/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45013 - /llvm/trunk/docs/CodeGenerator.html
Author: djg Date: Thu Dec 13 14:43:47 2007 New Revision: 45013 URL: http://llvm.org/viewvc/llvm-project?rev=45013&view=rev Log: Make it more clear that some things that can't be done in .td files can still be done in the LLVM code generator. And update the summary for the X86 target. Modified: llvm/trunk/docs/CodeGenerator.html Modified: llvm/trunk/docs/CodeGenerator.html URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/docs/CodeGenerator.html?rev=45013&r1=45012&r2=45013&view=diff == --- llvm/trunk/docs/CodeGenerator.html (original) +++ llvm/trunk/docs/CodeGenerator.html Thu Dec 13 14:43:47 2007 @@ -754,7 +754,8 @@ Portions of the DAG instruction selector are generated from the target description (*.td) files. Our goal is for the entire instruction -selector to be generated from these .td files. +selector to be generated from these .td files, though currently +there are still things that require custom C++ code. @@ -1112,7 +1113,8 @@ There is no great way to support matching complex addressing modes yet. In the future, we will extend pattern fragments to allow them to define multiple values (e.g. the four operands of the X86 -addressing mode). In addition, we'll extend fragments so that a +addressing mode, which are currently matched with custom C++ code). +In addition, we'll extend fragments so that a fragment can match multiple different patterns. We don't automatically infer flags like isStore/isLoad yet. We don't automatically generate the set of supported registers and @@ -1629,11 +1631,9 @@ The X86 code generator lives in the lib/Target/X86 directory. This -code generator currently targets a generic P6-like processor. As such, it -produces a few P6-and-above instructions (like conditional moves), but it does -not make use of newer features like MMX or SSE. In the future, the X86 backend -will have sub-target support added for specific processor families and -implementations. +code generator is capable of targeting a variety of x86-32 and x86-64 +processors, and includes support for ISA extensions such as MMX and SSE. + ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r45016 - /llvm-gcc-4.2/trunk/gcc/config/darwin.h
Author: johannes
Date: Thu Dec 13 17:56:08 2007
New Revision: 45016
URL: http://llvm.org/viewvc/llvm-project?rev=45016&view=rev
Log:
Do not invoke dsymutil at -O1 or higher, it whines
about the lack of debug info which breaks many
testcases.
Modified:
llvm-gcc-4.2/trunk/gcc/config/darwin.h
Modified: llvm-gcc-4.2/trunk/gcc/config/darwin.h
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/config/darwin.h?rev=45016&r1=45015&r2=45016&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/config/darwin.h (original)
+++ llvm-gcc-4.2/trunk/gcc/config/darwin.h Thu Dec 13 17:56:08 2007
@@ -315,7 +315,9 @@
%{!fdump=*:%{!fsyntax-only:%{!c:%{!M:%{!MM:%{!E:%{!S:\
"/* APPLE LOCAL end mainline 4.3 2006-10-31 4370146 */"\
"/* APPLE LOCAL ARM 5342595 */"\
-%{.c|.cc|.C|.cpp|.cp|.c++|.cxx|.CPP|.m|.mm: %(darwin_dsymutil) "
+"/* LLVM LOCAL do not use dsymutil with -O1 or higher */"\
+%{.c|.cc|.C|.cpp|.cp|.c++|.cxx|.CPP|.m|.mm: \
+%{!O1: %{!O2: %{!O3: %{!O4: %{!Os: %(darwin_dsymutil) }"
/* APPLE LOCAL end mainline */
#ifdef TARGET_SYSTEM_ROOT
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Re: [llvm-commits] RFC: patch for PR1782 (BasicAliasAnalyis)
>>> I guess, such a large positive index in GEP as seen above can be >>> introduced by -instcombine pass. >> >> Ok. This is somewhat dubious though, as it is wrapping around the >> end >> of the address space which is undefined in C. > > I've found one place in instcombine, where something like this can be > introduced. Fixed with this patch: > http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of- > Mon-20071210/056253.html I agree, that is definitely an instcombine bug, thanks! >>> I think, the simplest way to fix it is to truncate the computed >>> offset >>> to the target pointer size before returning it in >>> TargetData::getIndexedOffset(). If you think this is the correct >>> approach, I may prepare a patch. >> >> Ah, that does make a lot of sense. Since the fix is simple, >> please go >> for it! > > I've rethought the issue. If you say that, wrapping around the > memory by > getelementptr is undefined, I think it's better to leave it as it is. > This way we'll be able to catch other optimizer bugs, if there are any > of the above kind. Excellent, thanks! -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r45017 - /llvm-gcc-4.2/trunk/gcc/Makefile.in
Author: dpatel Date: Thu Dec 13 18:54:36 2007 New Revision: 45017 URL: http://llvm.org/viewvc/llvm-project?rev=45017&view=rev Log: Set libllvmgcc.dylib compatibility version number. Modified: llvm-gcc-4.2/trunk/gcc/Makefile.in Modified: llvm-gcc-4.2/trunk/gcc/Makefile.in URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/Makefile.in?rev=45017&r1=45016&r2=45017&view=diff == --- llvm-gcc-4.2/trunk/gcc/Makefile.in (original) +++ llvm-gcc-4.2/trunk/gcc/Makefile.in Thu Dec 13 18:54:36 2007 @@ -1209,7 +1209,7 @@ echo $(LLVMLIBFILES) $(CXX) $(DYLIB_COMPILE_FLAGS) $(INCLUDES) -o $@ \ $< $(LLVMLIBFILES) -L/usr/lib/gcc/$(build)/4.0.1/ -dynamiclib -single_module \ - -install_name @executable_path/$@ + -compatibility_version 1.0.0 -current_version 1.0.0 -install_name @executable_path/$@ LLVMBACKENDFILES := libllvmgcc$(LLVM_STAGE).dylib ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r45018 - /llvm-gcc-4.2/tags/Apple/llvmgcc42-2004/
Author: void Date: Thu Dec 13 19:02:33 2007 New Revision: 45018 URL: http://llvm.org/viewvc/llvm-project?rev=45018&view=rev Log: Need to grab a patch that makes building happy. Added: llvm-gcc-4.2/tags/Apple/llvmgcc42-2004/ - copied from r45017, llvm-gcc-4.2/trunk/ ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.0] r45021 - /llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
Author: johannes
Date: Thu Dec 13 19:11:55 2007
New Revision: 45021
URL: http://llvm.org/viewvc/llvm-project?rev=45021&view=rev
Log:
Fix broken IR gen for complex int != .
Modified:
llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp?rev=45021&r1=45020&r2=45021&view=diff
==
--- llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.0/trunk/gcc/llvm-convert.cpp Thu Dec 13 19:11:55 2007
@@ -5211,8 +5211,8 @@
DSTr = Builder.CreateFCmpUNE(LHSr, RHSr, "tmpr");
DSTi = Builder.CreateFCmpUNE(LHSi, RHSi, "tmpi");
} else {
- DSTr = Builder.CreateICmpEQ(LHSr, RHSr, "tmpr");
- DSTi = Builder.CreateICmpEQ(LHSi, RHSi, "tmpi");
+ DSTr = Builder.CreateICmpNE(LHSr, RHSr, "tmpr");
+ DSTi = Builder.CreateICmpNE(LHSi, RHSi, "tmpi");
}
return Builder.CreateOr(DSTr, DSTi, "tmp");
}
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[llvm-commits] [llvm-gcc-4.2] r45019 - /llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Author: johannes
Date: Thu Dec 13 19:06:35 2007
New Revision: 45019
URL: http://llvm.org/viewvc/llvm-project?rev=45019&view=rev
Log:
Fix broken IR gen for complex int != .
Modified:
llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
Modified: llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp?rev=45019&r1=45018&r2=45019&view=diff
==
--- llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp (original)
+++ llvm-gcc-4.2/trunk/gcc/llvm-convert.cpp Thu Dec 13 19:06:35 2007
@@ -4753,8 +4753,8 @@
DSTr = Builder.CreateFCmpUNE(LHSr, RHSr, "tmpr");
DSTi = Builder.CreateFCmpUNE(LHSi, RHSi, "tmpi");
} else {
- DSTr = Builder.CreateICmpEQ(LHSr, RHSr, "tmpr");
- DSTi = Builder.CreateICmpEQ(LHSi, RHSi, "tmpi");
+ DSTr = Builder.CreateICmpNE(LHSr, RHSr, "tmpr");
+ DSTi = Builder.CreateICmpNE(LHSi, RHSi, "tmpi");
}
return Builder.CreateOr(DSTr, DSTi, "tmp");
}
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[llvm-commits] [llvm] r45022 - in /llvm/trunk: include/llvm/Target/TargetInstrInfo.h lib/Target/Target.td utils/TableGen/CodeGenInstruction.h utils/TableGen/CodeGenTarget.cpp utils/TableGen/InstrInfoE
Author: void
Date: Thu Dec 13 19:48:59 2007
New Revision: 45022
URL: http://llvm.org/viewvc/llvm-project?rev=45022&view=rev
Log:
Add flags to indicate that there are "never" side effects or that there "may be"
side effects for machine instructions.
Modified:
llvm/trunk/include/llvm/Target/TargetInstrInfo.h
llvm/trunk/lib/Target/Target.td
llvm/trunk/utils/TableGen/CodeGenInstruction.h
llvm/trunk/utils/TableGen/CodeGenTarget.cpp
llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=45022&r1=45021&r2=45022&view=diff
==
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Thu Dec 13 19:48:59 2007
@@ -91,6 +91,18 @@
// ARM instructions which can set condition code if 's' bit is set.
const unsigned M_HAS_OPTIONAL_DEF = 1 << 17;
+// M_MAY_HAVE_SIDE_EFFECTS - Set if this instruction *might* have side effects,
+// e.g. load instructions. Note: This and M_NEVER_HAS_SIDE_EFFECTS are mutually
+// exclusive. You can't set both! If neither flag is set, then the instruction
+// *always* has side effects.
+const unsigned M_MAY_HAVE_SIDE_EFFECTS = 1 << 18;
+
+// M_NEVER_HAS_SIDE_EFFECTS - Set if this instruction *never* has side effects,
+// e.g., xor on X86. Note: This and M_MAY_HAVE_SIDE_EFFECTS are mutually
+// exclusive. You can't set both! If neither flag is set, then the instruction
+// *always* has side effects.
+const unsigned M_NEVER_HAS_SIDE_EFFECTS = 1 << 19;
+
// Machine operand flags
// M_LOOK_UP_PTR_REG_CLASS - Set if this operand is a pointer value and it
// requires a callback to look up its register class.
Modified: llvm/trunk/lib/Target/Target.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Target.td?rev=45022&r1=45021&r2=45022&view=diff
==
--- llvm/trunk/lib/Target/Target.td (original)
+++ llvm/trunk/lib/Target/Target.td Thu Dec 13 19:48:59 2007
@@ -203,6 +203,11 @@
bit usesCustomDAGSchedInserter = 0; // Pseudo instr needing special help.
bit hasCtrlDep = 0; // Does this instruction r/w ctrl-flow chains?
bit isNotDuplicable = 0; // Is it unsafe to duplicate this instruction?
+
+ // Side effect flags - If neither of these flags is set, then the instruction
+ // *always* has side effects. Otherwise, it's one or the other.
+ bit mayHaveSideEffects = 0; // This instruction *may* have side effects.
+ bit neverHasSideEffects = 0; // This instruction never has side effects.
InstrItinClass Itinerary = NoItinerary;// Execution steps used for
scheduling.
Modified: llvm/trunk/utils/TableGen/CodeGenInstruction.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenInstruction.h?rev=45022&r1=45021&r2=45022&view=diff
==
--- llvm/trunk/utils/TableGen/CodeGenInstruction.h (original)
+++ llvm/trunk/utils/TableGen/CodeGenInstruction.h Thu Dec 13 19:48:59 2007
@@ -104,6 +104,8 @@
bool hasCtrlDep;
bool isNotDuplicable;
bool hasOptionalDef;
+bool mayHaveSideEffects;
+bool neverHasSideEffects;
/// ParseOperandName - Parse an operand name like "$foo" or "$foo.bar",
/// where $foo is a whole operand and $foo.bar refers to a suboperand.
Modified: llvm/trunk/utils/TableGen/CodeGenTarget.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/CodeGenTarget.cpp?rev=45022&r1=45021&r2=45022&view=diff
==
--- llvm/trunk/utils/TableGen/CodeGenTarget.cpp (original)
+++ llvm/trunk/utils/TableGen/CodeGenTarget.cpp Thu Dec 13 19:48:59 2007
@@ -395,9 +395,15 @@
usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter");
hasCtrlDep = R->getValueAsBit("hasCtrlDep");
isNotDuplicable = R->getValueAsBit("isNotDuplicable");
+ mayHaveSideEffects = R->getValueAsBit("mayHaveSideEffects");
+ neverHasSideEffects = R->getValueAsBit("neverHasSideEffects");
hasOptionalDef = false;
hasVariableNumberOfOperands = false;
-
+
+ if (mayHaveSideEffects && neverHasSideEffects)
+throw R->getName() +
+ ": cannot have both 'mayHaveSideEffects' and 'neverHasSideEffects' set!";
+
DagInit *DI;
try {
DI = R->getValueAsDag("OutOperandList");
Modified: llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp?rev=45022&r1=45021&r2=45022&view=diff
==
--- llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp (original)
+++ llvm/trunk/utils/TableGen/InstrInfoEmitter.cpp Thu Dec 13 19:48:59 2007
@@ -
Re: [llvm-commits] [llvm-gcc-4.2] r45017 - /llvm-gcc-4.2/trunk/gcc/Makefile.in
On Dec 13, 2007, at 4:54 PM, Devang Patel wrote: > URL: http://llvm.org/viewvc/llvm-project?rev=45017&view=rev > Log: > Set libllvmgcc.dylib compatibility version number. > > Modified: > llvm-gcc-4.2/trunk/gcc/Makefile.in > > Modified: llvm-gcc-4.2/trunk/gcc/Makefile.in > URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/ > Makefile.in?rev=45017&r1=45016&r2=45017&view=diff > > == > > --- llvm-gcc-4.2/trunk/gcc/Makefile.in (original) > +++ llvm-gcc-4.2/trunk/gcc/Makefile.in Thu Dec 13 18:54:36 2007 > @@ -1209,7 +1209,7 @@ > echo $(LLVMLIBFILES) > $(CXX) $(DYLIB_COMPILE_FLAGS) $(INCLUDES) -o $@ \ > $< $(LLVMLIBFILES) -L/usr/lib/gcc/$(build)/4.0.1/ - > dynamiclib -single_module \ > - -install_name @executable_path/$@ > + -compatibility_version 1.0.0 -current_version 1.0.0 - > install_name @executable_path/$@ is -L.../4.0.1 really right? -Chris ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45024 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86ISelLowering.h lib/Target/X86/X86InstrInfo.td lib/Target/X86/X86InstrX86-64.td test/CodeGen/X86/clz.
Author: evancheng
Date: Thu Dec 13 20:13:44 2007
New Revision: 45024
URL: http://llvm.org/viewvc/llvm-project?rev=45024&view=rev
Log:
Implement ctlz and cttz with bsr and bsf.
Added:
llvm/trunk/test/CodeGen/X86/clz.ll
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/lib/Target/X86/X86ISelLowering.h
llvm/trunk/lib/Target/X86/X86InstrInfo.td
llvm/trunk/lib/Target/X86/X86InstrX86-64.td
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=45024&r1=45023&r2=45024&view=diff
==
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Dec 13 20:13:44 2007
@@ -210,18 +210,18 @@
setOperationAction(ISD::FLT_ROUNDS , MVT::i32 , Custom);
setOperationAction(ISD::CTPOP, MVT::i8 , Expand);
- setOperationAction(ISD::CTTZ , MVT::i8 , Expand);
- setOperationAction(ISD::CTLZ , MVT::i8 , Expand);
+ setOperationAction(ISD::CTTZ , MVT::i8 , Custom);
+ setOperationAction(ISD::CTLZ , MVT::i8 , Custom);
setOperationAction(ISD::CTPOP, MVT::i16 , Expand);
- setOperationAction(ISD::CTTZ , MVT::i16 , Expand);
- setOperationAction(ISD::CTLZ , MVT::i16 , Expand);
+ setOperationAction(ISD::CTTZ , MVT::i16 , Custom);
+ setOperationAction(ISD::CTLZ , MVT::i16 , Custom);
setOperationAction(ISD::CTPOP, MVT::i32 , Expand);
- setOperationAction(ISD::CTTZ , MVT::i32 , Expand);
- setOperationAction(ISD::CTLZ , MVT::i32 , Expand);
+ setOperationAction(ISD::CTTZ , MVT::i32 , Custom);
+ setOperationAction(ISD::CTLZ , MVT::i32 , Custom);
if (Subtarget->is64Bit()) {
setOperationAction(ISD::CTPOP , MVT::i64 , Expand);
-setOperationAction(ISD::CTTZ , MVT::i64 , Expand);
-setOperationAction(ISD::CTLZ , MVT::i64 , Expand);
+setOperationAction(ISD::CTTZ , MVT::i64 , Custom);
+setOperationAction(ISD::CTLZ , MVT::i64 , Custom);
}
setOperationAction(ISD::READCYCLECOUNTER , MVT::i64 , Custom);
@@ -5345,6 +5345,42 @@
ISD::TRUNCATE : ISD::ZERO_EXTEND), VT, RetVal);
}
+SDOperand X86TargetLowering::LowerCTLZ(SDOperand Op, SelectionDAG &DAG) {
+ MVT::ValueType VT = Op.getValueType();
+ MVT::ValueType OpVT = VT;
+ unsigned NumBits = MVT::getSizeInBits(VT);
+
+ Op = Op.getOperand(0);
+ if (VT == MVT::i8) {
+OpVT = MVT::i32;
+Op = DAG.getNode(ISD::ZERO_EXTEND, OpVT, Op);
+ }
+ if (VT == MVT::i32 || VT == MVT::i64)
+return DAG.getNode(ISD::XOR, OpVT, DAG.getNode(X86ISD::BSR, OpVT, Op),
+ DAG.getConstant(NumBits-1, OpVT));
+
+ Op = DAG.getNode(ISD::SUB, OpVT, DAG.getConstant(NumBits-1, OpVT),
+ DAG.getNode(X86ISD::BSR, OpVT, Op));
+ if (VT == MVT::i8)
+Op = DAG.getNode(ISD::TRUNCATE, MVT::i8, Op);
+ return Op;
+}
+
+SDOperand X86TargetLowering::LowerCTTZ(SDOperand Op, SelectionDAG &DAG) {
+ MVT::ValueType VT = Op.getValueType();
+ MVT::ValueType OpVT = VT;
+
+ Op = Op.getOperand(0);
+ if (VT == MVT::i8) {
+OpVT = MVT::i32;
+Op = DAG.getNode(ISD::ZERO_EXTEND, OpVT, Op);
+ }
+ Op = DAG.getNode(X86ISD::BSF, OpVT, Op);
+ if (VT == MVT::i8)
+Op = DAG.getNode(ISD::TRUNCATE, MVT::i8, Op);
+ return Op;
+}
+
/// LowerOperation - Provide custom lowering hooks for some operations.
///
SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
@@ -5387,7 +5423,8 @@
case ISD::EH_RETURN: return LowerEH_RETURN(Op, DAG);
case ISD::TRAMPOLINE: return LowerTRAMPOLINE(Op, DAG);
case ISD::FLT_ROUNDS: return LowerFLT_ROUNDS(Op, DAG);
-
+ case ISD::CTLZ: return LowerCTLZ(Op, DAG);
+ case ISD::CTTZ: return LowerCTTZ(Op, DAG);
// FIXME: REMOVE THIS WHEN LegalizeDAGTypes lands.
case ISD::READCYCLECOUNTER:
@@ -5407,6 +5444,8 @@
const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
switch (Opcode) {
default: return NULL;
+ case X86ISD::BSF:return "X86ISD::BSF";
+ case X86ISD::BSR:return "X86ISD::BSR";
case X86ISD::SHLD: return "X86ISD::SHLD";
case X86ISD::SHRD: return "X86ISD::SHRD";
case X86ISD::FAND: return "X86ISD::FAND";
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.h
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.h?rev=45024&r1=45023&r2=45024&view=diff
==
--- llvm/trunk/lib/Target/X86/X86ISelLowering.h (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.h Thu De
Re: [llvm-commits] [llvm-gcc-4.2] r45017 - /llvm-gcc-4.2/trunk/gcc/Makefile.in
On Dec 13, 2007, at 5:52 PM, Chris Lattner wrote: > > On Dec 13, 2007, at 4:54 PM, Devang Patel wrote: >> URL: http://llvm.org/viewvc/llvm-project?rev=45017&view=rev >> Log: >> Set libllvmgcc.dylib compatibility version number. >> >> Modified: >>llvm-gcc-4.2/trunk/gcc/Makefile.in >> >> Modified: llvm-gcc-4.2/trunk/gcc/Makefile.in >> URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/ >> Makefile.in?rev=45017&r1=45016&r2=45017&view=diff >> >> = >> = >> >> --- llvm-gcc-4.2/trunk/gcc/Makefile.in (original) >> +++ llvm-gcc-4.2/trunk/gcc/Makefile.in Thu Dec 13 18:54:36 2007 >> @@ -1209,7 +1209,7 @@ >> echo $(LLVMLIBFILES) >> $(CXX) $(DYLIB_COMPILE_FLAGS) $(INCLUDES) -o $@ \ >>$< $(LLVMLIBFILES) -L/usr/lib/gcc/$(build)/4.0.1/ - >> dynamiclib -single_module \ >> - -install_name @executable_path/$@ >> + -compatibility_version 1.0.0 -current_version 1.0.0 - >> install_name @executable_path/$@ > > is -L.../4.0.1 really right? hmm.. no. Actually, I don't understand why -L../4.x.1 is required here. I'll investigate. - Devang ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm-gcc-4.2] r45026 - /llvm-gcc-4.2/trunk/gcc/Makefile.in
Author: dpatel Date: Fri Dec 14 00:02:16 2007 New Revision: 45026 URL: http://llvm.org/viewvc/llvm-project?rev=45026&view=rev Log: Remove unnecessary -L path. Modified: llvm-gcc-4.2/trunk/gcc/Makefile.in Modified: llvm-gcc-4.2/trunk/gcc/Makefile.in URL: http://llvm.org/viewvc/llvm-project/llvm-gcc-4.2/trunk/gcc/Makefile.in?rev=45026&r1=45025&r2=45026&view=diff == --- llvm-gcc-4.2/trunk/gcc/Makefile.in (original) +++ llvm-gcc-4.2/trunk/gcc/Makefile.in Fri Dec 14 00:02:16 2007 @@ -1208,8 +1208,9 @@ libllvmgcc$(LLVM_STAGE).dylib: llvm-linker-hack.cpp $(LLVMLIBFILES) echo $(LLVMLIBFILES) $(CXX) $(DYLIB_COMPILE_FLAGS) $(INCLUDES) -o $@ \ - $< $(LLVMLIBFILES) -L/usr/lib/gcc/$(build)/4.0.1/ -dynamiclib -single_module \ - -compatibility_version 1.0.0 -current_version 1.0.0 -install_name @executable_path/$@ + $< $(LLVMLIBFILES) -dynamiclib -single_module \ + -compatibility_version 1.0.0 -current_version 1.0.0 \ + -install_name @executable_path/$@ LLVMBACKENDFILES := libllvmgcc$(LLVM_STAGE).dylib ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] [llvm] r45027 - in /llvm/trunk: include/llvm/IntrinsicsX86.td lib/VMCore/AutoUpgrade.cpp test/Assembler/AutoUpgradeIntrinsics.ll
Author: andersca
Date: Fri Dec 14 00:38:54 2007
New Revision: 45027
URL: http://llvm.org/viewvc/llvm-project?rev=45027&view=rev
Log:
All MMX shift instructions took a <2 x i32> vector as the shift amount
parameter. Change this to be <1 x i64> instead, which matches the assembler
instruction.
Modified:
llvm/trunk/include/llvm/IntrinsicsX86.td
llvm/trunk/lib/VMCore/AutoUpgrade.cpp
llvm/trunk/test/Assembler/AutoUpgradeIntrinsics.ll
Modified: llvm/trunk/include/llvm/IntrinsicsX86.td
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsX86.td?rev=45027&r1=45026&r2=45027&view=diff
==
--- llvm/trunk/include/llvm/IntrinsicsX86.td (original)
+++ llvm/trunk/include/llvm/IntrinsicsX86.td Fri Dec 14 00:38:54 2007
@@ -767,30 +767,30 @@
// Shift left logical
def int_x86_mmx_psll_w : GCCBuiltin<"__builtin_ia32_psllw">,
Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
def int_x86_mmx_psll_d : GCCBuiltin<"__builtin_ia32_pslld">,
Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
def int_x86_mmx_psll_q : GCCBuiltin<"__builtin_ia32_psllq">,
Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
def int_x86_mmx_psrl_w : GCCBuiltin<"__builtin_ia32_psrlw">,
Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
def int_x86_mmx_psrl_d : GCCBuiltin<"__builtin_ia32_psrld">,
Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
def int_x86_mmx_psrl_q : GCCBuiltin<"__builtin_ia32_psrlq">,
Intrinsic<[llvm_v1i64_ty, llvm_v1i64_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
def int_x86_mmx_psra_w : GCCBuiltin<"__builtin_ia32_psraw">,
Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
def int_x86_mmx_psra_d : GCCBuiltin<"__builtin_ia32_psrad">,
Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
- llvm_v2i32_ty], [IntrNoMem]>;
+ llvm_v1i64_ty], [IntrNoMem]>;
}
// Pack ops.
Modified: llvm/trunk/lib/VMCore/AutoUpgrade.cpp
URL:
http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AutoUpgrade.cpp?rev=45027&r1=45026&r2=45027&view=diff
==
--- llvm/trunk/lib/VMCore/AutoUpgrade.cpp (original)
+++ llvm/trunk/lib/VMCore/AutoUpgrade.cpp Fri Dec 14 00:38:54 2007
@@ -12,6 +12,7 @@
//===--===//
#include "llvm/AutoUpgrade.h"
+#include "llvm/Constants.h"
#include "llvm/Function.h"
#include "llvm/Module.h"
#include "llvm/Instructions.h"
@@ -110,6 +111,39 @@
}
break;
+ case 'x':
+// This fixes all MMX shift intrinsic instructions to take a
+// v1i64 instead of a v2i32 as the second parameter.
+if (Name.compare(5,10,"x86.mmx.ps",10) == 0 &&
+(Name.compare(13,4,"psll", 4) == 0 ||
+ Name.compare(13,4,"psra", 4) == 0 ||
+ Name.compare(13,4,"psrl", 4) == 0)) {
+
+ const llvm::Type *VT = VectorType::get(IntegerType::get(64), 1);
+
+ // We don't have to do anything if the parameter already has
+ // the correct type.
+ if (FTy->getParamType(1) == VT)
+break;
+
+ // We first need to change the name of the old (bad) intrinsic, because
+ // its type is incorrect, but we cannot overload that name. We
+ // arbitrarily unique it here allowing us to construct a correctly
named
+ // and typed function below.
+ F->setName("");
+
+ assert(FTy->getNumParams() == 2 && "MMX shift intrinsics take 2 args!");
+
+ // Now construct the new intrinsic with the correct name and type. We
+ // leave the old function around in order to query its type, whatever
it
+ // may be, and correctly convert up to the new type.
+ return cast(M->getOrInsertFunction(Name,
+ FTy->getReturnType(),
+ FTy->getParamType(0),
+ VT,
+ (Type *)0));
+}
+break;
}
// This may not belong here. This function is eff
