[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.421 -> 1.422
---
Log message:
Generalize MaskedValueIsZero into a ComputeMaskedNonZeroBits function, which
is just as efficient as MVIZ and is also more general.
Fix a few minor bugs introduced in recent patches
---
Diffs of the changes: (+53 -44)
InstructionCombining.cpp | 97 +--
1 files changed, 53 insertions(+), 44 deletions(-)
Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.421
llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.422
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.421 Tue Feb 7
01:27:52 2006
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Tue Feb 7 02:05:22 2006
@@ -405,65 +405,66 @@
ConstantInt::get(C->getType(), 1)));
}
-/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
-/// this predicate to simplify operations downstream. Mask is known to be zero
-/// for bits that V cannot have.
-static bool MaskedValueIsZero(Value *V, uint64_t Mask, unsigned Depth = 0) {
+/// ComputeMaskedNonZeroBits - Determine which of the bits specified in Mask
are
+/// not known to be zero and return them as a bitmask. The bits that we can
+/// guarantee to be zero are returned as zero bits in the result.
+static uint64_t ComputeMaskedNonZeroBits(Value *V, uint64_t Mask,
+ unsigned Depth = 0) {
// Note, we cannot consider 'undef' to be "IsZero" here. The problem is that
// we cannot optimize based on the assumption that it is zero without
changing
// it to be an explicit zero. If we don't change it to zero, other code
could
// optimized based on the contradictory assumption that it is non-zero.
// Because instcombine aggressively folds operations with undef args anyway,
// this won't lose us code quality.
- if (Mask == 0)
-return true;
if (ConstantIntegral *CI = dyn_cast(V))
-return (CI->getRawValue() & Mask) == 0;
-
- if (Depth == 6) return false; // Limit search depth.
+return CI->getRawValue() & Mask;
+ if (Depth == 6 || Mask == 0)
+return Mask; // Limit search depth.
if (Instruction *I = dyn_cast(V)) {
switch (I->getOpcode()) {
case Instruction::And:
// (X & C1) & C2 == 0 iff C1 & C2 == 0.
if (ConstantIntegral *CI = dyn_cast(I->getOperand(1)))
-return MaskedValueIsZero(I->getOperand(0), CI->getRawValue() & Mask,
- Depth+1);
+return ComputeMaskedNonZeroBits(I->getOperand(0),
+CI->getRawValue() & Mask, Depth+1);
// If either the LHS or the RHS are MaskedValueIsZero, the result is
zero.
- return MaskedValueIsZero(I->getOperand(1), Mask, Depth+1) ||
- MaskedValueIsZero(I->getOperand(0), Mask, Depth+1);
+ Mask = ComputeMaskedNonZeroBits(I->getOperand(1), Mask, Depth+1);
+ Mask = ComputeMaskedNonZeroBits(I->getOperand(0), Mask, Depth+1);
+ return Mask;
case Instruction::Or:
case Instruction::Xor:
- // If the LHS and the RHS are MaskedValueIsZero, the result is also zero.
- return MaskedValueIsZero(I->getOperand(1), Mask, Depth+1) &&
- MaskedValueIsZero(I->getOperand(0), Mask, Depth+1);
+ // Any non-zero bits in the LHS or RHS are potentially non-zero in the
+ // result.
+ return ComputeMaskedNonZeroBits(I->getOperand(1), Mask, Depth+1) |
+ ComputeMaskedNonZeroBits(I->getOperand(0), Mask, Depth+1);
case Instruction::Select:
- // If the T and F values are MaskedValueIsZero, the result is also zero.
- return MaskedValueIsZero(I->getOperand(2), Mask, Depth+1) &&
- MaskedValueIsZero(I->getOperand(1), Mask, Depth+1);
+ // Any non-zero bits in the T or F values are potentially non-zero in the
+ // result.
+ return ComputeMaskedNonZeroBits(I->getOperand(2), Mask, Depth+1) |
+ ComputeMaskedNonZeroBits(I->getOperand(1), Mask, Depth+1);
case Instruction::Cast: {
const Type *SrcTy = I->getOperand(0)->getType();
if (SrcTy == Type::BoolTy)
-return (Mask & 1) == 0;
- if (!SrcTy->isInteger()) return false;
+return ComputeMaskedNonZeroBits(I->getOperand(0), Mask & 1, Depth+1);
+ if (!SrcTy->isInteger()) return Mask;
// (cast X to int) & C2 == 0 iff could not have contained C2.
- if (SrcTy->isUnsigned()) // Only handle zero ext.
-return MaskedValueIsZero(I->getOperand(0),
- Mask & SrcTy->getIntegralTypeMask(), Depth+1);
-
- // If this is a noop or trunc cast, recurse.
- if (SrcTy->getPrimitiveSizeInBits() >=
- I->getType()->getPrimitiveSizeInBits())
-return MaskedValueIsZero(I->getOperand(0),
-
[llvm-commits] CVS: llvm/lib/Target/X86/README.txt
Changes in directory llvm/lib/Target/X86: README.txt updated: 1.46 -> 1.47 --- Log message: Remind myself to add PIC and static asm printer support. --- Diffs of the changes: (+4 -0) README.txt |4 1 files changed, 4 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.46 llvm/lib/Target/X86/README.txt:1.47 --- llvm/lib/Target/X86/README.txt:1.46 Fri Feb 3 00:22:11 2006 +++ llvm/lib/Target/X86/README.txt Tue Feb 7 02:35:44 2006 @@ -382,3 +382,7 @@ addl $12, %esp ret +//===-===// + +The x86 backend currently supports dynamic-no-pic. Need to add asm +printer support for static and PIC. ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp X86AsmPrinter.cpp X86ISelLowering.cpp X86IntelAsmPrinter.cpp
Changes in directory llvm/lib/Target/X86:
X86ATTAsmPrinter.cpp updated: 1.21 -> 1.22
X86AsmPrinter.cpp updated: 1.160 -> 1.161
X86ISelLowering.cpp updated: 1.78 -> 1.79
X86IntelAsmPrinter.cpp updated: 1.15 -> 1.16
---
Log message:
Darwin ABI issues: weak, linkonce, etc. dynamic-no-pic support is complete.
Also fixed a function stub bug. Added weak and linkonce support for
x86 Linux.
---
Diffs of the changes: (+109 -109)
X86ATTAsmPrinter.cpp | 70 --
X86AsmPrinter.cpp | 130 -
X86ISelLowering.cpp| 12 ++--
X86IntelAsmPrinter.cpp |6 +-
4 files changed, 109 insertions(+), 109 deletions(-)
Index: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.21
llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.22
--- llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.21 Mon Feb 6 17:41:19 2006
+++ llvm/lib/Target/X86/X86ATTAsmPrinter.cppTue Feb 7 02:38:37 2006
@@ -33,12 +33,32 @@
EmitConstantPool(MF.getConstantPool());
// Print out labels for the function.
- SwitchSection("\t.text\n", MF.getFunction());
- EmitAlignment(4); // FIXME: This should be parameterized somewhere.
- if (!MF.getFunction()->hasInternalLinkage())
+ const Function *F = MF.getFunction();
+ switch (F->getLinkage()) {
+ default: assert(0 && "Unknown linkage type!");
+ case Function::InternalLinkage: // Symbols default to internal.
+SwitchSection(".text", F);
+EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
+break;
+ case Function::ExternalLinkage:
+SwitchSection(".text", F);
+EmitAlignment(4, F); // FIXME: This should be parameterized somewhere.
O << "\t.globl\t" << CurrentFnName << "\n";
- if (HasDotTypeDotSizeDirective)
-O << "\t.type\t" << CurrentFnName << ", @function\n";
+break;
+ case Function::WeakLinkage:
+ case Function::LinkOnceLinkage:
+if (forDarwin) {
+ SwitchSection(".section
__TEXT,__textcoal_nt,coalesced,pure_instructions",
+F);
+ O << "\t.weak_definition\t" << CurrentFnName << "\n";
+} else {
+ EmitAlignment(4, F); // FIXME: This should be parameterized
somewhere.
+ O << "\t.section\t.llvm.linkonce.t." << CurrentFnName
+<< ",\"ax\",@progbits\n";
+ O << "\t.weak " << CurrentFnName << "\n";
+}
+break;
+ }
O << CurrentFnName << ":\n";
// Print out code for the function.
@@ -95,27 +115,24 @@
return;
case MachineOperand::MO_GlobalAddress: {
bool isCallOp = Modifier && !strcmp(Modifier, "call");
-// Darwin block shameless ripped from PowerPCAsmPrinter.cpp
+bool isMemOp = Modifier && !strcmp(Modifier, "mem");
+// Darwin block shameless ripped from PPCAsmPrinter.cpp
if (forDarwin) {
- if (!isCallOp) O << '$';
+ if (!isMemOp && !isCallOp) O << '$';
GlobalValue *GV = MO.getGlobal();
std::string Name = Mang->getValueName(GV);
-
- // Dynamically-resolved functions need a stub for the function. Be
- // wary however not to output $stub for external functions whose
addresses
- // are taken. Those should be emitted as $non_lazy_ptr below.
- Function *F = dyn_cast(GV);
- if (F && isCallOp && F->isExternal()) {
-FnStubs.insert(Name);
-O << "L" << Name << "$stub";
- } else if (GV->hasLinkOnceLinkage()) {
-// Link-once, External, or Weakly-linked global variables need
-// non-lazily-resolved stubs
-LinkOnceStubs.insert(Name);
-O << "L" << Name << "$non_lazy_ptr";
- } else if (GV->isExternal() || GV->hasWeakLinkage()) {
-GVStubs.insert(Name);
-O << "L" << Name << "$non_lazy_ptr";
+ // Link-once, External, or Weakly-linked global variables need
+ // non-lazily-resolved stubs
+ if (GV->isExternal() || GV->hasWeakLinkage() ||
+ GV->hasLinkOnceLinkage()) {
+// Dynamically-resolved functions need a stub for the function.
+if (isCallOp && isa(GV) && cast(GV)->isExternal())
{
+ FnStubs.insert(Name);
+ O << "L" << Name << "$stub";
+} else {
+ GVStubs.insert(Name);
+ O << "L" << Name << "$non_lazy_ptr";
+}
} else {
O << Mang->getValueName(GV);
}
@@ -126,7 +143,7 @@
O << Offset;
return;
}
-if (!isCallOp) O << '$';
+if (!isMemOp && !isCallOp) O << '$';
O << Mang->getValueName(MO.getGlobal());
int Offset = MO.getOffset();
if (Offset > 0)
@@ -137,13 +154,14 @@
}
case MachineOperand::MO_ExternalSymbol: {
bool isCallOp = Modifier && !strcmp(Modifier, "call");
+bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (isCallOp && forDarwin) {
std::string Name(GlobalPrefix); Name += MO.getSymbolName();
FnStubs.insert(Name);
O << "L" << Name << "$stub";
return;
}
-if (!isCallOp) O << '$';
+if (!i
[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.422 -> 1.423
---
Log message:
Fix Transforms/InstCombine/2006-02-07-SextZextCrash.ll
---
Diffs of the changes: (+5 -3)
InstructionCombining.cpp |8 +---
1 files changed, 5 insertions(+), 3 deletions(-)
Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.422
llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.423
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.422 Tue Feb 7
02:05:22 2006
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Tue Feb 7 13:07:40 2006
@@ -563,10 +563,12 @@
// extend instead of a sign extend.
if ((Mask & ((1ULL << SrcBits)-1)) == 0) {
// Convert to unsigned first.
-Value *NewVal;
+Instruction *NewVal;
NewVal = new CastInst(I->getOperand(0), SrcTy->getUnsignedVersion(),
- I->getOperand(0)->getName(), I);
-NewVal = new CastInst(I->getOperand(0), I->getType(), I->getName());
+ I->getOperand(0)->getName());
+InsertNewInstBefore(NewVal, *I);
+NewVal = new CastInst(NewVal, I->getType(), I->getName());
+InsertNewInstBefore(NewVal, *I);
return UpdateValueUsesWith(I, NewVal);
}
___
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[llvm-commits] CVS: llvm/test/Regression/Transforms/InstCombine/2006-02-07-SextZextCrash.ll
Changes in directory llvm/test/Regression/Transforms/InstCombine:
2006-02-07-SextZextCrash.ll added (r1.1)
---
Log message:
new testcase that caused instcombine to crash on 176.gcc last night.
---
Diffs of the changes: (+22 -0)
2006-02-07-SextZextCrash.ll | 22 ++
1 files changed, 22 insertions(+)
Index: llvm/test/Regression/Transforms/InstCombine/2006-02-07-SextZextCrash.ll
diff -c /dev/null
llvm/test/Regression/Transforms/InstCombine/2006-02-07-SextZextCrash.ll:1.1
*** /dev/null Tue Feb 7 13:07:36 2006
--- llvm/test/Regression/Transforms/InstCombine/2006-02-07-SextZextCrash.ll
Tue Feb 7 13:07:25 2006
***
*** 0
--- 1,22
+ ; RUN: llvm-as < %s | opt -instcombine -disable-output
+
+ %struct.rtx_const = type { uint, { %union.real_extract } }
+ %struct.rtx_def = type { int, [1 x %union.rtunion_def] }
+ %union.real_extract = type { double }
+ %union.rtunion_def = type { uint }
+
+ implementation ; Functions:
+
+ fastcc void %decode_rtx_const(%struct.rtx_def* %x, %struct.rtx_const* %value)
{
+ %tmp.54 = getelementptr %struct.rtx_const* %value, int 0, uint 0
; [#uses=1]
+ %tmp.56 = getelementptr %struct.rtx_def* %x, int 0, uint 0
; [#uses=1]
+ %tmp.57 = load int* %tmp.56 ; [#uses=1]
+ %tmp.58 = shl int %tmp.57, ubyte 8 ; [#uses=1]
+ %tmp.59 = shr int %tmp.58, ubyte 24 ; [#uses=1]
+ %tmp.60 = cast int %tmp.59 to ushort; [#uses=1]
+ %tmp.61 = cast ushort %tmp.60 to uint ; [#uses=1]
+ %tmp.62 = shl uint %tmp.61, ubyte 16; [#uses=1]
+ %tmp.65 = or uint 0, %tmp.62; [#uses=1]
+ store uint %tmp.65, uint* %tmp.54
+ ret void
+ }
___
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[llvm-commits] CVS: llvm/include/llvm/Target/TargetLowering.h
Changes in directory llvm/include/llvm/Target: TargetLowering.h updated: 1.47 -> 1.48 --- Log message: getConstraintType should be virtual. --- Diffs of the changes: (+3 -1) TargetLowering.h |4 +++- 1 files changed, 3 insertions(+), 1 deletion(-) Index: llvm/include/llvm/Target/TargetLowering.h diff -u llvm/include/llvm/Target/TargetLowering.h:1.47 llvm/include/llvm/Target/TargetLowering.h:1.48 --- llvm/include/llvm/Target/TargetLowering.h:1.47 Fri Feb 3 20:12:09 2006 +++ llvm/include/llvm/Target/TargetLowering.h Tue Feb 7 14:13:44 2006 @@ -451,7 +451,7 @@ /// getConstraintType - Given a constraint letter, return the type of /// constraint it is for this target. - ConstraintType getConstraintType(char ConstraintLetter) const; + virtual ConstraintType getConstraintType(char ConstraintLetter) const; /// getRegForInlineAsmConstraint - Given a constraint letter or register /// name (e.g. "r" or "edx"), return a list of registers that can be used to @@ -460,6 +460,8 @@ virtual std::vector getRegForInlineAsmConstraint(const std::string &Constraint) const; + /// isOperandValidForConstraint - Return true if the specified SDOperand is + /// valid for the specified target constraint letter. virtual bool isOperandValidForConstraint(SDOperand Op, char ConstraintLetter); //======// ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp PPCISelLowering.h
Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.85 -> 1.86
PPCISelLowering.h updated: 1.20 -> 1.21
---
Log message:
Implement getConstraintType for PPC.
---
Diffs of the changes: (+18 -0)
PPCISelLowering.cpp | 17 +
PPCISelLowering.h |1 +
2 files changed, 18 insertions(+)
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.85
llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.86
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.85Mon Feb 6 18:47:13 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Tue Feb 7 14:16:30 2006
@@ -980,6 +980,23 @@
return BB;
}
+/// getConstraintType - Given a constraint letter, return the type of
+/// constraint it is for this target.
+PPCTargetLowering::ConstraintType
+PPCTargetLowering::getConstraintType(char ConstraintLetter) const {
+ switch (ConstraintLetter) {
+ default: break;
+ case 'b':
+ case 'r':
+ case 'f':
+ case 'v':
+ case 'y':
+return C_RegisterClass;
+ }
+ return TargetLowering::getConstraintType(ConstraintLetter);
+}
+
+
std::vector PPCTargetLowering::
getRegForInlineAsmConstraint(const std::string &Constraint) const {
if (Constraint.size() == 1) {
Index: llvm/lib/Target/PowerPC/PPCISelLowering.h
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.h:1.20
llvm/lib/Target/PowerPC/PPCISelLowering.h:1.21
--- llvm/lib/Target/PowerPC/PPCISelLowering.h:1.20 Mon Feb 6 18:47:13 2006
+++ llvm/lib/Target/PowerPC/PPCISelLowering.h Tue Feb 7 14:16:30 2006
@@ -97,6 +97,7 @@
virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI,
MachineBasicBlock *MBB);
+ConstraintType getConstraintType(char ConstraintLetter) const;
std::vector
getRegForInlineAsmConstraint(const std::string &Constraint) const;
bool isOperandValidForConstraint(SDOperand Op, char ConstraintLetter);
___
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[llvm-commits] CVS: llvm/lib/Target/X86/X86AsmPrinter.cpp
Changes in directory llvm/lib/Target/X86:
X86AsmPrinter.cpp updated: 1.161 -> 1.162
---
Log message:
For ELF, .comm takes alignment value as the optional 3rd argument. It must be
specified in bytes.
---
Diffs of the changes: (+3 -1)
X86AsmPrinter.cpp |4 +++-
1 files changed, 3 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/X86/X86AsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86AsmPrinter.cpp:1.161
llvm/lib/Target/X86/X86AsmPrinter.cpp:1.162
--- llvm/lib/Target/X86/X86AsmPrinter.cpp:1.161 Tue Feb 7 02:38:37 2006
+++ llvm/lib/Target/X86/X86AsmPrinter.cpp Tue Feb 7 15:54:08 2006
@@ -105,7 +105,9 @@
O << COMMDirective << name << "," << Size;
} else {
SwitchSection(".local", I);
-O << COMMDirective << name << "," << Size << "," << Align;
+O << COMMDirective << name << "," << Size;
+if (COMMDirectiveTakesAlignment)
+ O << "," << (AlignmentIsInBytes ? (1 << Align) : Align);
}
O << "\t\t" << CommentString << " '" << I->getName() << "'\n";
} else {
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[llvm-commits] CVS: llvm/lib/Target/X86/X86AsmPrinter.cpp
Changes in directory llvm/lib/Target/X86:
X86AsmPrinter.cpp updated: 1.162 -> 1.163
---
Log message:
Fixed a local common symbol bug.
---
Diffs of the changes: (+17 -11)
X86AsmPrinter.cpp | 28 +---
1 files changed, 17 insertions(+), 11 deletions(-)
Index: llvm/lib/Target/X86/X86AsmPrinter.cpp
diff -u llvm/lib/Target/X86/X86AsmPrinter.cpp:1.162
llvm/lib/Target/X86/X86AsmPrinter.cpp:1.163
--- llvm/lib/Target/X86/X86AsmPrinter.cpp:1.162 Tue Feb 7 15:54:08 2006
+++ llvm/lib/Target/X86/X86AsmPrinter.cpp Tue Feb 7 17:32:58 2006
@@ -97,26 +97,29 @@
(I->hasInternalLinkage() || I->hasWeakLinkage() ||
I->hasLinkOnceLinkage())) {
if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
- if (forDarwin) {
-SwitchSection(".data", I);
-if (I->hasInternalLinkage())
- O << LCOMMDirective << name << "," << Size << "," << Align;
-else
+ SwitchSection(".data", I);
+ if (LCOMMDirective != NULL) {
+if (I->hasInternalLinkage()) {
+ O << LCOMMDirective << name << "," << Size;
+ if (forDarwin)
+O << "," << (AlignmentIsInBytes ? (1 << Align) : Align);
+} else
O << COMMDirective << name << "," << Size;
} else {
-SwitchSection(".local", I);
+if (I->hasInternalLinkage())
+ O <<"\t.local\t" << name << "\n";
O << COMMDirective << name << "," << Size;
if (COMMDirectiveTakesAlignment)
O << "," << (AlignmentIsInBytes ? (1 << Align) : Align);
}
- O << "\t\t" << CommentString << " '" << I->getName() << "'\n";
+ O << "\t\t" << CommentString << " " << I->getName() << "\n";
} else {
switch (I->getLinkage()) {
case GlobalValue::LinkOnceLinkage:
case GlobalValue::WeakLinkage:
if (forDarwin) {
- O << "\t.globl " << name << '\n'
-<< "\t.weak_definition " << name << '\n';
+ O << "\t.globl " << name << "\n"
+<< "\t.weak_definition " << name << "\n";
SwitchSection(".section __DATA,__datacoal_nt,coalesced", I);
} else {
O << "\t.section\t.llvm.linkonce.d." << name <<
",\"aw\",@progbits\n";
@@ -138,8 +141,11 @@
}
EmitAlignment(Align, I);
- O << name << ":\t\t\t\t" << CommentString << " '" << I->getName()
-<< "'\n";
+ O << name << ":\t\t\t\t" << CommentString << " " << I->getName()
+<< "\n";
+ if (HasDotTypeDotSizeDirective)
+O << "\t.size " << name << ", " << Size << "\n";
+
EmitGlobalConstant(C);
O << '\n';
}
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.423 -> 1.424
---
Log message:
Fix a problem in my patch yesterday, causing a miscompilation of 176.gcc
---
Diffs of the changes: (+3 -2)
InstructionCombining.cpp |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.423
llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.424
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.423 Tue Feb 7
13:07:40 2006
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Tue Feb 7 19:20:23 2006
@@ -464,7 +464,7 @@
// (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
if (ConstantUInt *SA = dyn_cast(I->getOperand(1)))
return ComputeMaskedNonZeroBits(I->getOperand(0),Mask >>
SA->getValue(),
-Depth+1);
+Depth+1) << SA->getValue();
break;
case Instruction::Shr:
// (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
@@ -472,7 +472,8 @@
if (I->getType()->isUnsigned()) {
Mask <<= SA->getValue();
Mask &= I->getType()->getIntegralTypeMask();
- return ComputeMaskedNonZeroBits(I->getOperand(0), Mask, Depth+1);
+ return ComputeMaskedNonZeroBits(I->getOperand(0), Mask, Depth+1)
+ >> SA->getValue();
}
break;
}
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[llvm-commits] CVS: llvm/include/llvm/CodeGen/ValueTypes.h
Changes in directory llvm/include/llvm/CodeGen:
ValueTypes.h updated: 1.16 -> 1.17
---
Log message:
Add some happy helper methods.
---
Diffs of the changes: (+15 -1)
ValueTypes.h | 16 +++-
1 files changed, 15 insertions(+), 1 deletion(-)
Index: llvm/include/llvm/CodeGen/ValueTypes.h
diff -u llvm/include/llvm/CodeGen/ValueTypes.h:1.16
llvm/include/llvm/CodeGen/ValueTypes.h:1.17
--- llvm/include/llvm/CodeGen/ValueTypes.h:1.16 Thu Dec 29 18:09:56 2005
+++ llvm/include/llvm/CodeGen/ValueTypes.h Tue Feb 7 20:05:45 2006
@@ -17,6 +17,7 @@
#define LLVM_CODEGEN_VALUETYPES_H
#include
+#include "llvm/Support/DataTypes.h"
namespace llvm {
class Type;
@@ -67,7 +68,7 @@
static inline bool isVector(ValueType VT) {
return (VT >= v16i8 && VT <= v2f64);
}
-
+
/// getVectorType - Returns the ValueType that represents a vector
NumElements
/// in length, where each element is of type VT. If there is no ValueType
/// that represents this vector, a ValueType of Other is returned.
@@ -107,6 +108,19 @@
case MVT::v2f64: return 128;
}
}
+
+ /// getIntVTBitMask - Return an integer with 1's every place there are bits
+ /// in the specified integer value type.
+ static inline uint64_t getIntVTBitMask(ValueType VT) {
+assert(isInteger(VT) && !isVector(VT) && "Only applies to int scalars!");
+return ~0ULL >> (64-getSizeInBits(VT));
+ }
+ /// getIntVTSignBit - Return an integer with a 1 in the position of the sign
+ /// bit for the specified integer value type.
+ static inline uint64_t getIntVTSignBit(ValueType VT) {
+assert(isInteger(VT) && !isVector(VT) && "Only applies to int scalars!");
+return 1ULL << (getSizeInBits(VT)-1);
+ }
/// MVT::getValueTypeString - This function returns value type as a string,
/// e.g. "i32".
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[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Changes in directory llvm/lib/CodeGen/SelectionDAG:
DAGCombiner.cpp updated: 1.99 -> 1.100
---
Log message:
Compile this:
xori r6, r2, 1
rlwinm r6, r6, 0, 31, 31
cmpwi cr0, r6, 0
bne cr0, LBB1_3 ; endif
to this:
rlwinm r6, r2, 0, 31, 31
cmpwi cr0, r6, 0
beq cr0, LBB1_3 ; endif
---
Diffs of the changes: (+26 -0)
DAGCombiner.cpp | 26 ++
1 files changed, 26 insertions(+)
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.99
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.100
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:1.99 Sun Feb 5 02:23:00 2006
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Feb 7 20:13:15 2006
@@ -2544,6 +2544,32 @@
DAG.getConstant(C1 & (~0ULL>>(64-ExtSrcTyBits)),
ExtDstTy),
Cond);
+ } else if ((N1C->getValue() == 0 || N1C->getValue() == 1) &&
+ (Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
+ (N0.getOpcode() == ISD::XOR ||
+ (N0.getOpcode() == ISD::AND &&
+ N0.getOperand(0).getOpcode() == ISD::XOR &&
+ N0.getOperand(1) == N0.getOperand(0).getOperand(1))) &&
+ isa(N0.getOperand(1)) &&
+ cast(N0.getOperand(1))->getValue() == 1) {
+// If this is (X^1) == 0/1, swap the RHS and eliminate the xor. We can
+// only do this if the top bits are known zero.
+if (TLI.MaskedValueIsZero(N1,
+ MVT::getIntVTBitMask(N0.getValueType())-1)) {
+ // Okay, get the un-inverted input value.
+ SDOperand Val;
+ if (N0.getOpcode() == ISD::XOR)
+Val = N0.getOperand(0);
+ else {
+assert(N0.getOpcode() == ISD::AND &&
+ N0.getOperand(0).getOpcode() == ISD::XOR);
+// ((X^1)&1)^1 -> X & 1
+Val = DAG.getNode(ISD::AND, N0.getValueType(),
+ N0.getOperand(0).getOperand(0),
N0.getOperand(1));
+ }
+ return DAG.getSetCC(VT, Val, N1,
+ Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ);
+}
}
uint64_t MinVal, MaxVal;
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[llvm-commits] CVS: llvm/test/Regression/Transforms/SCCP/select.ll
Changes in directory llvm/test/Regression/Transforms/SCCP:
select.ll added (r1.1)
---
Log message:
new testcase for more interesting select sccp cases
---
Diffs of the changes: (+12 -0)
select.ll | 12
1 files changed, 12 insertions(+)
Index: llvm/test/Regression/Transforms/SCCP/select.ll
diff -c /dev/null llvm/test/Regression/Transforms/SCCP/select.ll:1.1
*** /dev/null Tue Feb 7 20:37:50 2006
--- llvm/test/Regression/Transforms/SCCP/select.ll Tue Feb 7 20:37:40 2006
***
*** 0
--- 1,12
+ ; RUN: llvm-as < %s | opt -sccp -disable-output &&
+ ; RUN: llvm-as < %s | opt -sccp | llvm-dis | not grep select
+
+ int %test1(bool %C) {
+ %X = select bool %C, int 0, int 0
+ ret int %X
+ }
+
+ int %test2(bool %C) {
+ %X = select bool %C, int 0, int undef
+ ret int %X
+ }
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/SCCP.cpp
Changes in directory llvm/lib/Transforms/Scalar:
SCCP.cpp updated: 1.128 -> 1.129
---
Log message:
Implement some more interesting select sccp cases. This implements:
test/Regression/Transforms/SCCP/select.ll
---
Diffs of the changes: (+35 -15)
SCCP.cpp | 50 +++---
1 files changed, 35 insertions(+), 15 deletions(-)
Index: llvm/lib/Transforms/Scalar/SCCP.cpp
diff -u llvm/lib/Transforms/Scalar/SCCP.cpp:1.128
llvm/lib/Transforms/Scalar/SCCP.cpp:1.129
--- llvm/lib/Transforms/Scalar/SCCP.cpp:1.128 Sun Jan 22 17:32:06 2006
+++ llvm/lib/Transforms/Scalar/SCCP.cpp Tue Feb 7 20:38:11 2006
@@ -241,6 +241,11 @@
else if (IV.getConstant() != MergeWithV.getConstant())
markOverdefined(IV, V);
}
+
+ inline void mergeInValue(Value *V, LatticeVal &MergeWithV) {
+return mergeInValue(ValueState[V], V, MergeWithV);
+ }
+
// getValueState - Return the LatticeVal object that corresponds to the
value.
// This function is necessary because not all values should start out in the
@@ -589,23 +594,38 @@
void SCCPSolver::visitSelectInst(SelectInst &I) {
LatticeVal &CondValue = getValueState(I.getCondition());
- if (CondValue.isOverdefined())
-markOverdefined(&I);
- else if (CondValue.isConstant()) {
+ if (CondValue.isUndefined())
+return;
+ if (CondValue.isConstant()) {
+Value *InVal = 0;
if (CondValue.getConstant() == ConstantBool::True) {
- LatticeVal &Val = getValueState(I.getTrueValue());
- if (Val.isOverdefined())
-markOverdefined(&I);
- else if (Val.isConstant())
-markConstant(&I, Val.getConstant());
+ mergeInValue(&I, getValueState(I.getTrueValue()));
+ return;
} else if (CondValue.getConstant() == ConstantBool::False) {
- LatticeVal &Val = getValueState(I.getFalseValue());
- if (Val.isOverdefined())
-markOverdefined(&I);
- else if (Val.isConstant())
-markConstant(&I, Val.getConstant());
-} else
- markOverdefined(&I);
+ mergeInValue(&I, getValueState(I.getFalseValue()));
+ return;
+}
+ }
+
+ // Otherwise, the condition is overdefined or a constant we can't evaluate.
+ // See if we can produce something better than overdefined based on the T/F
+ // value.
+ LatticeVal &TVal = getValueState(I.getTrueValue());
+ LatticeVal &FVal = getValueState(I.getFalseValue());
+
+ // select ?, C, C -> C.
+ if (TVal.isConstant() && FVal.isConstant() &&
+ TVal.getConstant() == FVal.getConstant()) {
+markConstant(&I, FVal.getConstant());
+return;
+ }
+
+ if (TVal.isUndefined()) { // select ?, undef, X -> X.
+mergeInValue(&I, FVal);
+ } else if (FVal.isUndefined()) { // select ?, X, undef -> X.
+mergeInValue(&I, TVal);
+ } else {
+markOverdefined(&I);
}
}
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.424 -> 1.425
---
Log message:
Use EraseInstFromFunction in a few cases to put the uses of the removed
instruction onto the worklist (in case they are now dead).
Add a really trivial local DSE implementation to help out bitfield code.
We now fold this:
struct S {
unsigned char a : 1, b : 1, c : 1, d : 2, e : 3;
S();
};
S::S() : a(0), b(0), c(1), d(0), e(6) {}
to this:
void %_ZN1SC1Ev(%struct.S* %this) {
entry:
%tmp.1 = getelementptr %struct.S* %this, int 0, uint 0
store ubyte 38, ubyte* %tmp.1
ret void
}
much earlier (in gccas instead of only in gccld after DSE runs).
---
Diffs of the changes: (+37 -15)
InstructionCombining.cpp | 52 +--
1 files changed, 37 insertions(+), 15 deletions(-)
Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.424
llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.425
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.424 Tue Feb 7
19:20:23 2006
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Tue Feb 7 21:25:32 2006
@@ -60,6 +60,7 @@
Statistic<> NumCombined ("instcombine", "Number of insts combined");
Statistic<> NumConstProp("instcombine", "Number of constant folds");
Statistic<> NumDeadInst ("instcombine", "Number of dead inst eliminated");
+ Statistic<> NumDeadStore("instcombine", "Number of dead stores eliminated");
Statistic<> NumSunkInst ("instcombine", "Number of instructions sunk");
class InstCombiner : public FunctionPass,
@@ -1923,6 +1924,11 @@
if (Op0 == Op1)
return ReplaceInstUsesWith(I, Op1);
+ // See if we can simplify any instructions used by the LHS whose sole
+ // purpose is to compute bits we don't care about.
+ if (SimplifyDemandedBits(&I, I.getType()->getIntegralTypeMask()))
+return &I;
+
if (ConstantIntegral *AndRHS = dyn_cast(Op1)) {
// and X, -1 == X
if (AndRHS->isAllOnesValue())
@@ -1947,11 +1953,6 @@
if (MaskedValueIsZero(Op0, NotAndRHS))
return ReplaceInstUsesWith(I, Op0);
-// See if we can simplify any instructions used by the LHS whose sole
-// purpose is to compute bits we don't care about.
-if (SimplifyDemandedBits(Op0, AndRHS->getRawValue()))
- return &I;
-
// Optimize a variety of ((val OP C1) & C2) combinations...
if (isa(Op0) || isa(Op0)) {
Instruction *Op0I = cast(Op0);
@@ -5898,13 +5899,37 @@
Value *Ptr = SI.getOperand(1);
if (isa(Ptr)) { // store X, undef -> noop (even if volatile)
-removeFromWorkList(&SI);
-SI.eraseFromParent();
+EraseInstFromFunction(SI);
++NumCombined;
return 0;
}
- if (SI.isVolatile()) return 0; // Don't hack volatile loads.
+ // Do really simple DSE, to catch cases where there are several consequtive
+ // stores to the same location, separated by a few arithmetic operations.
This
+ // situation often occurs with bitfield accesses.
+ BasicBlock::iterator BBI = &SI;
+ for (unsigned ScanInsts = 6; BBI != SI.getParent()->begin() && ScanInsts;
+ --ScanInsts) {
+--BBI;
+
+if (StoreInst *PrevSI = dyn_cast(BBI)) {
+ // Prev store isn't volatile, and stores to the same location?
+ if (!PrevSI->isVolatile() && PrevSI->getOperand(1) == SI.getOperand(1)) {
+++NumDeadStore;
+++BBI;
+EraseInstFromFunction(*PrevSI);
+continue;
+ }
+ break;
+}
+
+// Don't skip over loads or things that can modify memory.
+if (BBI->mayWriteToMemory() || isa(BBI))
+ break;
+ }
+
+
+ if (SI.isVolatile()) return 0; // Don't hack volatile stores.
// store X, null-> turns into 'unreachable' in SimplifyCFG
if (isa(Ptr)) {
@@ -5919,8 +5944,7 @@
// store undef, Ptr -> noop
if (isa(Val)) {
-removeFromWorkList(&SI);
-SI.eraseFromParent();
+EraseInstFromFunction(SI);
++NumCombined;
return 0;
}
@@ -5938,7 +5962,7 @@
// If this store is the last instruction in the basic block, and if the block
// ends with an unconditional branch, try to move it to the successor block.
- BasicBlock::iterator BBI = &SI; ++BBI;
+ BBI = &SI; ++BBI;
if (BranchInst *BI = dyn_cast(BBI))
if (BI->isUnconditional()) {
// Check to see if the successor block has exactly two incoming edges.
If
@@ -5990,10 +6014,8 @@
OtherStore->isVolatile()), *BBI);
// Nuke the old stores.
-removeFromWorkList(&SI);
-removeFromWorkList(OtherStore);
-SI.eraseFromParent();
-OtherStore->eraseFromParent();
+EraseInstFromFunction(SI);
+EraseInstFromFunction(*OtherStore);
++NumCombined;
return 0;
}
___
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/README.txt
Changes in directory llvm/lib/Target/PowerPC: README.txt updated: 1.62 -> 1.63 --- Log message: Move emails from nate into public places --- Diffs of the changes: (+17 -0) README.txt | 17 + 1 files changed, 17 insertions(+) Index: llvm/lib/Target/PowerPC/README.txt diff -u llvm/lib/Target/PowerPC/README.txt:1.62 llvm/lib/Target/PowerPC/README.txt:1.63 --- llvm/lib/Target/PowerPC/README.txt:1.62 Sat Feb 4 23:27:35 2006 +++ llvm/lib/Target/PowerPC/README.txt Wed Feb 8 00:43:51 2006 @@ -279,6 +279,23 @@ cmpwi cr0, r7, 0 bne cr0, LBB_compare_4 ; loopexit +FreeBench/mason has a basic block that looks like this: + + %tmp.130 = seteq int %p.0__, 5 ; [#uses=1] + %tmp.134 = seteq int %p.1__, 6 ; [#uses=1] + %tmp.139 = seteq int %p.2__, 12 ; [#uses=1] + %tmp.144 = seteq int %p.3__, 13 ; [#uses=1] + %tmp.149 = seteq int %p.4__, 14 ; [#uses=1] + %tmp.154 = seteq int %p.5__, 15 ; [#uses=1] + %bothcond = and bool %tmp.134, %tmp.130 ; [#uses=1] + %bothcond123 = and bool %bothcond, %tmp.139 ; + %bothcond124 = and bool %bothcond123, %tmp.144 ; + %bothcond125 = and bool %bothcond124, %tmp.149 ; + %bothcond126 = and bool %bothcond125, %tmp.154 ; + br bool %bothcond126, label %shortcirc_next.5, label %else.0 + +This is a particularly important case where handling CRs better will help. + ===-=== Simple IPO for argument passing, change: ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/Target/X86/README.txt
Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.47 -> 1.48
---
Log message:
Add some random notes, not high-prio
---
Diffs of the changes: (+21 -0)
README.txt | 21 +
1 files changed, 21 insertions(+)
Index: llvm/lib/Target/X86/README.txt
diff -u llvm/lib/Target/X86/README.txt:1.47 llvm/lib/Target/X86/README.txt:1.48
--- llvm/lib/Target/X86/README.txt:1.47 Tue Feb 7 02:35:44 2006
+++ llvm/lib/Target/X86/README.txt Wed Feb 8 00:52:06 2006
@@ -161,6 +161,14 @@
Combine: a = sin(x), b = cos(x) into a,b = sincos(x).
+Expand these to calls of sin/cos and stores:
+ double sincos(double x, double *sin, double *cos);
+ float sincosf(float x, float *sin, float *cos);
+ long double sincosl(long double x, long double *sin, long double *cos);
+
+Doing so could allow SROA of the destination pointers. See also:
+http://gcc.gnu.org/bugzilla/show_bug.cgi?id=17687
+
//===-===//
The instruction selector sometimes misses folding a load into a compare. The
@@ -386,3 +394,16 @@
The x86 backend currently supports dynamic-no-pic. Need to add asm
printer support for static and PIC.
+
+//===-===//
+
+We should generate bts/btr/etc instructions on targets where they are cheap or
+when codesize is important. e.g., for:
+
+void setbit(int *target, int bit) {
+*target |= (1 << bit);
+}
+void clearbit(int *target, int bit) {
+*target &= ~(1 << bit);
+}
+
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[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
Changes in directory llvm/lib/Target/PowerPC:
PPCAsmPrinter.cpp updated: 1.147 -> 1.148
---
Log message:
Emit the 'mr' pseudoop for easier reading.
---
Diffs of the changes: (+9 -0)
PPCAsmPrinter.cpp |9 +
1 files changed, 9 insertions(+)
Index: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
diff -u llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.147
llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.148
--- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:1.147 Mon Feb 6 16:18:19 2006
+++ llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Wed Feb 8 00:56:40 2006
@@ -422,6 +422,15 @@
O << ", " << (unsigned int)SH << "\n";
return;
}
+ } else if (MI->getOpcode() == PPC::OR4 || MI->getOpcode() == PPC::OR8) {
+if (MI->getOperand(1).getReg() == MI->getOperand(2).getReg()) {
+ O << "mr ";
+ printOperand(MI, 0);
+ O << ", ";
+ printOperand(MI, 1);
+ O << "\n";
+ return;
+}
}
if (printInstruction(MI))
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[llvm-commits] CVS: llvm/lib/Target/X86/README.txt
Changes in directory llvm/lib/Target/X86: README.txt updated: 1.48 -> 1.49 --- Log message: more email -> README moving --- Diffs of the changes: (+4 -0) README.txt |4 1 files changed, 4 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.48 llvm/lib/Target/X86/README.txt:1.49 --- llvm/lib/Target/X86/README.txt:1.48 Wed Feb 8 00:52:06 2006 +++ llvm/lib/Target/X86/README.txt Wed Feb 8 01:12:07 2006 @@ -93,6 +93,10 @@ 2. Code duplication (addressing mode) during isel. 3. Other ideas from "Register-Sensitive Selection, Duplication, and Sequencing of Instructions". +4. Scheduling for reduced register pressure. E.g. "Minimum Register + Instruction Sequence Problem: Revisiting Optimal Code Generation for DAGs" + and other related papers. + http://citeseer.ist.psu.edu/govindarajan01minimum.html //===-===// ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/utils/NightlyTest.pl
Changes in directory llvm/utils:
NightlyTest.pl updated: 1.102 -> 1.103
---
Log message:
Remove -pedantic. It no longer works.
---
Diffs of the changes: (+0 -5)
NightlyTest.pl |5 -
1 files changed, 5 deletions(-)
Index: llvm/utils/NightlyTest.pl
diff -u llvm/utils/NightlyTest.pl:1.102 llvm/utils/NightlyTest.pl:1.103
--- llvm/utils/NightlyTest.pl:1.102 Tue Jan 31 10:10:53 2006
+++ llvm/utils/NightlyTest.pl Wed Feb 8 01:28:22 2006
@@ -22,7 +22,6 @@
# -nodejagnu Do not run feature or regression tests
# -parallelRun two parallel jobs with GNU Make.
# -release Build an LLVM Release version
-# -pedanticEnable additional GCC warnings to detect possible errors.
# -enable-llcbeta Enable testing of beta features in llc.
# -disable-llc Disable LLC tests in the nightly tester.
# -disable-jit Disable JIT tests in the nightly tester.
@@ -280,10 +279,6 @@
if (/^-norunningtests$/) { $NORUNNINGTESTS = 1; next; }
if (/^-parallel$/) { $MAKEOPTS = "$MAKEOPTS -j2 -l3.0"; next; }
if (/^-release$/){ $MAKEOPTS = "$MAKEOPTS ENABLE_OPTIMIZED=1"; next;
}
- if (/^-pedantic$/) {
- $MAKEOPTS = "$MAKEOPTS CompileOptimizeOpts='-O3 -DNDEBUG
-finline-functions -Wpointer-arith -Wcast-align -Wno-deprecated
-Wold-style-cast -Wabi -Woverloaded-virtual -ffor-scope'";
- next;
- }
if (/^-enable-llcbeta$/) { $PROGTESTOPTS .= " ENABLE_LLCBETA=1"; next; }
if (/^-disable-llc$/){ $PROGTESTOPTS .= " DISABLE_LLC=1";
$CONFIGUREARGS .= " --disable-llc_diffs"; next; }
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[llvm-commits] CVS: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
Changes in directory llvm/lib/Transforms/Scalar:
InstructionCombining.cpp updated: 1.425 -> 1.426
---
Log message:
Simplify some code, reducing calls to MaskedValueIsZero. Implement a minor
optimization where we reduce the number of bits in AND masks when possible.
---
Diffs of the changes: (+33 -17)
InstructionCombining.cpp | 50 +++
1 files changed, 33 insertions(+), 17 deletions(-)
Index: llvm/lib/Transforms/Scalar/InstructionCombining.cpp
diff -u llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.425
llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.426
--- llvm/lib/Transforms/Scalar/InstructionCombining.cpp:1.425 Tue Feb 7
21:25:32 2006
+++ llvm/lib/Transforms/Scalar/InstructionCombining.cpp Wed Feb 8 01:34:50 2006
@@ -1930,28 +1930,44 @@
return &I;
if (ConstantIntegral *AndRHS = dyn_cast(Op1)) {
-// and X, -1 == X
-if (AndRHS->isAllOnesValue())
+uint64_t AndRHSMask = AndRHS->getZExtValue();
+uint64_t TypeMask = Op0->getType()->getIntegralTypeMask();
+
+if (AndRHSMask == TypeMask) // and X, -1 == X
return ReplaceInstUsesWith(I, Op0);
+else if (AndRHSMask == 0)// and X, 0 == 0
+ return ReplaceInstUsesWith(I, AndRHS);
// and (and X, c1), c2 -> and (x, c1&c2). Handle this case here, before
-// calling MaskedValueIsZero, to avoid inefficient cases where we traipse
-// through many levels of ands.
+// calling ComputeMaskedNonZeroBits, to avoid inefficient cases where we
+// traipse through many levels of ands.
{
Value *X = 0; ConstantInt *C1 = 0;
if (match(Op0, m_And(m_Value(X), m_ConstantInt(C1
return BinaryOperator::createAnd(X, ConstantExpr::getAnd(C1, AndRHS));
}
-if (MaskedValueIsZero(Op0, AndRHS->getZExtValue())) // LHS & RHS == 0
- return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType()));
-
-// If the mask is not masking out any bits, there is no reason to do the
-// and in the first place.
-uint64_t NotAndRHS = // ~ANDRHS
- AndRHS->getZExtValue()^Op0->getType()->getIntegralTypeMask();
-if (MaskedValueIsZero(Op0, NotAndRHS))
+// Figure out which of the input bits are not known to be zero, and which
+// bits are known to be zero.
+uint64_t NonZeroBits = ComputeMaskedNonZeroBits(Op0, TypeMask);
+uint64_t ZeroBits = NonZeroBits^TypeMask;
+
+// If the mask is not masking out any bits (i.e. all of the zeros in the
+// mask are already known to be zero), there is no reason to do the and in
+// the first place.
+uint64_t NotAndRHS = AndRHSMask^TypeMask;
+if ((NotAndRHS & ZeroBits) == NotAndRHS)
return ReplaceInstUsesWith(I, Op0);
+
+// If the AND mask contains bits that are known zero, remove them. A
+// special case is when there are no bits in common, in which case we
+// implicitly turn this into an AND X, 0, which is later simplified into 0.
+if ((AndRHSMask & NonZeroBits) != AndRHSMask) {
+ Constant *NewRHS =
+ ConstantUInt::get(Type::ULongTy, AndRHSMask & NonZeroBits);
+ I.setOperand(1, ConstantExpr::getCast(NewRHS, I.getType()));
+ return &I;
+}
// Optimize a variety of ((val OP C1) & C2) combinations...
if (isa(Op0) || isa(Op0)) {
@@ -1963,9 +1979,9 @@
case Instruction::Or:
// (X ^ V) & C2 --> (X & C2) iff (V & C2) == 0
// (X | V) & C2 --> (X & C2) iff (V & C2) == 0
-if (MaskedValueIsZero(Op0LHS, AndRHS->getZExtValue()))
+if (MaskedValueIsZero(Op0LHS, AndRHSMask))
return BinaryOperator::createAnd(Op0RHS, AndRHS);
-if (MaskedValueIsZero(Op0RHS, AndRHS->getZExtValue()))
+if (MaskedValueIsZero(Op0RHS, AndRHSMask))
return BinaryOperator::createAnd(Op0LHS, AndRHS);
// If the mask is only needed on one incoming arm, push it up.
@@ -1992,8 +2008,8 @@
break;
case Instruction::And:
// (X & V) & C2 --> 0 iff (V & C2) == 0
-if (MaskedValueIsZero(Op0LHS, AndRHS->getZExtValue()) ||
-MaskedValueIsZero(Op0RHS, AndRHS->getZExtValue()))
+if (MaskedValueIsZero(Op0LHS, AndRHSMask) ||
+MaskedValueIsZero(Op0RHS, AndRHSMask))
return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType()));
break;
case Instruction::Add:
@@ -2028,7 +2044,7 @@
if (SrcTy->getPrimitiveSizeInBits() >=
I.getType()->getPrimitiveSizeInBits() &&
CastOp->getNumOperands() == 2)
- if (ConstantInt *AndCI =dyn_cast(CastOp->getOperand(1)))
+ if (ConstantInt *AndCI =
dyn_cast(CastOp->getOperand(1)))
if (CastOp->getOpcode() == Instruction::And) {
// Change: and (cast (and X, C1) to T), C2
// into : and (cast X to T), trunc(C1)&C2
___
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