Changes in directory llvm/lib/Target/X86:
README.txt updated: 1.47 -> 1.48 --- Log message: Add some random notes, not high-prio --- Diffs of the changes: (+21 -0) README.txt | 21 +++++++++++++++++++++ 1 files changed, 21 insertions(+) Index: llvm/lib/Target/X86/README.txt diff -u llvm/lib/Target/X86/README.txt:1.47 llvm/lib/Target/X86/README.txt:1.48 --- llvm/lib/Target/X86/README.txt:1.47 Tue Feb 7 02:35:44 2006 +++ llvm/lib/Target/X86/README.txt Wed Feb 8 00:52:06 2006 @@ -161,6 +161,14 @@ Combine: a = sin(x), b = cos(x) into a,b = sincos(x). +Expand these to calls of sin/cos and stores: + double sincos(double x, double *sin, double *cos); + float sincosf(float x, float *sin, float *cos); + long double sincosl(long double x, long double *sin, long double *cos); + +Doing so could allow SROA of the destination pointers. See also: +http://gcc.gnu.org/bugzilla/show_bug.cgi?id=17687 + //===---------------------------------------------------------------------===// The instruction selector sometimes misses folding a load into a compare. The @@ -386,3 +394,16 @@ The x86 backend currently supports dynamic-no-pic. Need to add asm printer support for static and PIC. + +//===---------------------------------------------------------------------===// + +We should generate bts/btr/etc instructions on targets where they are cheap or +when codesize is important. e.g., for: + +void setbit(int *target, int bit) { + *target |= (1 << bit); +} +void clearbit(int *target, int bit) { + *target &= ~(1 << bit); +} + _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
