[Intel-wired-lan] [tnguy-net-queue:dev-queue] BUILD SUCCESS cef3450b7554872344aa4679940972a6f59af285
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue.git dev-queue branch HEAD: cef3450b7554872344aa4679940972a6f59af285 idpf: add read memory barrier when checking descriptor done bit elapsed time: 1115m configs tested: 191 configs skipped: 21 The following configs have been built successfully. More configs may be tested in the coming days. tested configs: alpha allnoconfiggcc-14.2.0 alphaallyesconfigclang-20 alphaallyesconfiggcc-14.2.0 arc allmodconfigclang-20 arc allnoconfiggcc-14.2.0 arc allyesconfigclang-20 arc axs101_defconfiggcc-14.2.0 arc axs103_smp_defconfiggcc-13.2.0 arc haps_hs_smp_defconfiggcc-14.2.0 archsdk_defconfiggcc-14.2.0 arc randconfig-001-20241126gcc-14.2.0 arc randconfig-002-20241126gcc-14.2.0 arcvdk_hs38_defconfiggcc-14.2.0 arm allmodconfigclang-20 arm allnoconfiggcc-14.2.0 arm allyesconfigclang-20 arm aspeed_g5_defconfiggcc-13.2.0 arm ep93xx_defconfigclang-14 arm integrator_defconfiggcc-14.2.0 arm ixp4xx_defconfiggcc-14.2.0 arm multi_v4t_defconfiggcc-13.2.0 arm multi_v4t_defconfiggcc-14.2.0 armmvebu_v5_defconfiggcc-13.2.0 arm mxs_defconfiggcc-14.2.0 arm pxa_defconfigclang-14 arm randconfig-001-20241126gcc-14.2.0 arm randconfig-002-20241126gcc-14.2.0 arm randconfig-003-20241126gcc-14.2.0 arm randconfig-004-20241126gcc-14.2.0 arm s3c6400_defconfiggcc-14.2.0 arm sama7_defconfiggcc-14.2.0 arm vf610m4_defconfiggcc-14.2.0 armvt8500_v6_v7_defconfiggcc-14.2.0 arm wpcm450_defconfiggcc-14.2.0 arm64allmodconfigclang-20 arm64 allnoconfiggcc-14.2.0 arm64 randconfig-001-20241126gcc-14.2.0 arm64 randconfig-002-20241126gcc-14.2.0 arm64 randconfig-003-20241126gcc-14.2.0 arm64 randconfig-004-20241126gcc-14.2.0 csky allnoconfiggcc-14.2.0 csky randconfig-001-20241126gcc-14.2.0 csky randconfig-002-20241126gcc-14.2.0 hexagon allmodconfigclang-20 hexagon allnoconfiggcc-14.2.0 hexagon allyesconfigclang-20 hexagon randconfig-001-20241126gcc-14.2.0 hexagon randconfig-002-20241126gcc-14.2.0 i386buildonly-randconfig-001-20241126gcc-12 i386buildonly-randconfig-002-20241126gcc-12 i386buildonly-randconfig-003-20241126gcc-12 i386buildonly-randconfig-004-20241126gcc-12 i386buildonly-randconfig-005-20241126gcc-12 i386buildonly-randconfig-006-20241126gcc-12 i386 randconfig-001-20241126gcc-12 i386 randconfig-002-20241126gcc-12 i386 randconfig-003-20241126gcc-12 i386 randconfig-004-20241126gcc-12 i386 randconfig-005-20241126gcc-12 i386 randconfig-006-20241126gcc-12 i386 randconfig-011-20241126gcc-12 i386 randconfig-012-20241126gcc-12 i386 randconfig-013-20241126gcc-12 i386 randconfig-014-20241126gcc-12 i386 randconfig-015-20241126gcc-12 i386 randconfig-016-20241126gcc-12 loongarchallmodconfiggcc-14.2.0 loongarch allnoconfiggcc-14.2.0 loongarch randconfig-001-20241126gcc-14.2.0 loongarch randconfig-002-20241126gcc-14.2.0 m68k alldefconfigclang-14 m68k allmodconfiggcc-14.2.0 m68k allnoconfiggcc-14.2.0 m68k allyesconfiggcc-14.2.0 m68k bvme6000_defconfiggcc-14.2.0 m68k m5275evb_defconfiggcc-14.2.0 m68kstmark2_defconfiggcc-13.2.0 m68k sun3x_defconfigclang-14 microblaze
Re: [Intel-wired-lan] [PATCH iwl-net 2/2] idpf: trigger SW interrupt when exiting wb_on_itr mode
From: Joshua Hay
Date: Mon, 25 Nov 2024 15:58:55 -0800
> There is a race condition between exiting wb_on_itr and completion write
> backs. For example, we are in wb_on_itr mode and a Tx completion is
> generated by HW, ready to be written back, as we are re-enabling
> interrupts:
>
> HW SW
> | |
> | | idpf_tx_splitq_clean_all
> | | napi_complete_done
> | |
> | tx_completion_wb | idpf_vport_intr_update_itr_ena_irq
>
> That tx_completion_wb happens before the vector is fully re-enabled.
> Continuing with this example, it is a UDP stream and the
> tx_completion_wb is the last one in the flow (there are no rx packets).
> Because the HW generated the completion before the interrupt is fully
> enabled, the HW will not fire the interrupt once the timer expires and
> the write back will not happen. NAPI poll won't be called. We have
> indicated we're back in interrupt mode but nothing else will trigger the
> interrupt. Therefore, the completion goes unprocessed, triggering a Tx
> timeout.
>
> To mitigate this, fire a SW triggered interrupt upon exiting wb_on_itr.
> This interrupt will catch the rogue completion and avoid the timeout.
> Add logic to set the appropriate bits in the vector's dyn_ctl register.
>
> Fixes: 9c4a27da0ecc ("idpf: enable WB_ON_ITR")
> Reviewed-by: Madhu Chittim
> Signed-off-by: Joshua Hay
> ---
> drivers/net/ethernet/intel/idpf/idpf_txrx.c | 30 ++---
> 1 file changed, 20 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/net/ethernet/intel/idpf/idpf_txrx.c
> b/drivers/net/ethernet/intel/idpf/idpf_txrx.c
> index a8989dd98272..9558b90469c8 100644
> --- a/drivers/net/ethernet/intel/idpf/idpf_txrx.c
> +++ b/drivers/net/ethernet/intel/idpf/idpf_txrx.c
> @@ -3604,21 +3604,32 @@ static void idpf_vport_intr_dis_irq_all(struct
> idpf_vport *vport)
> /**
> * idpf_vport_intr_buildreg_itr - Enable default interrupt generation
> settings
> * @q_vector: pointer to q_vector
> - * @type: itr index
> - * @itr: itr value
> */
> -static u32 idpf_vport_intr_buildreg_itr(struct idpf_q_vector *q_vector,
> - const int type, u16 itr)
> +static u32 idpf_vport_intr_buildreg_itr(struct idpf_q_vector *q_vector)
> {
> - u32 itr_val;
> + u32 itr_val = q_vector->intr_reg.dyn_ctl_intena_m;
> + int type = IDPF_NO_ITR_UPDATE_IDX;
> + u16 itr = 0;
> +
> + if (q_vector->wb_on_itr) {
> + /*
> + * Trigger a software interrupt when exiting wb_on_itr, to make
> + * sure we catch any pending write backs that might have been
> + * missed due to interrupt state transition.
> + */
> +
This empty newline is not needed I'd say.
> + itr_val |= q_vector->intr_reg.dyn_ctl_swint_trig_m |
> +q_vector->intr_reg.dyn_ctl_sw_itridx_ena_m;
> + type = IDPF_SW_ITR_UPDATE_IDX;
> + itr = IDPF_ITR_20K;
> + }
>
> itr &= IDPF_ITR_MASK;
> /* Don't clear PBA because that can cause lost interrupts that
>* came in while we were cleaning/polling
>*/
> - itr_val = q_vector->intr_reg.dyn_ctl_intena_m |
> - (type << q_vector->intr_reg.dyn_ctl_itridx_s) |
> - (itr << (q_vector->intr_reg.dyn_ctl_intrvl_s - 1));
> + itr_val |= (type << q_vector->intr_reg.dyn_ctl_itridx_s) |
> +(itr << (q_vector->intr_reg.dyn_ctl_intrvl_s - 1));
>
> return itr_val;
> }
> @@ -3716,9 +3727,8 @@ void idpf_vport_intr_update_itr_ena_irq(struct
> idpf_q_vector *q_vector)
> /* net_dim() updates ITR out-of-band using a work item */
> idpf_net_dim(q_vector);
>
> + intval = idpf_vport_intr_buildreg_itr(q_vector);
> q_vector->wb_on_itr = false;
> - intval = idpf_vport_intr_buildreg_itr(q_vector,
> - IDPF_NO_ITR_UPDATE_IDX, 0);
Is there a reason for changing the order of these two?
>
> writel(intval, q_vector->intr_reg.dyn_ctl);
> }
Thanks,
Olek
[Intel-wired-lan] [tnguy-next-queue:dev-queue] BUILD SUCCESS be9bc5f29544142931d3958e972623a1db595af4
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue.git dev-queue branch HEAD: be9bc5f29544142931d3958e972623a1db595af4 idpf: add read memory barrier when checking descriptor done bit elapsed time: 1035m configs tested: 112 configs skipped: 19 The following configs have been built successfully. More configs may be tested in the coming days. tested configs: alpha allnoconfiggcc-14.2.0 alphaallyesconfigclang-20 alphaallyesconfiggcc-14.2.0 arc allmodconfiggcc-13.2.0 arc allnoconfiggcc-13.2.0 arc allyesconfiggcc-13.2.0 arc haps_hs_defconfiggcc-13.2.0 arcvdk_hs38_defconfiggcc-13.2.0 arm allnoconfigclang-20 arm allyesconfiggcc-14.2.0 arm ep93xx_defconfigclang-14 arm pxa_defconfigclang-14 arm sama7_defconfigclang-20 arm vf610m4_defconfiggcc-14.2.0 arm64allmodconfigclang-20 arm64 allnoconfiggcc-14.2.0 csky allnoconfiggcc-14.2.0 hexagon allmodconfigclang-20 hexagon allnoconfigclang-20 hexagon allyesconfigclang-20 i386buildonly-randconfig-001-20241126gcc-12 i386buildonly-randconfig-002-20241126gcc-12 i386buildonly-randconfig-003-20241126clang-19 i386buildonly-randconfig-003-20241126gcc-12 i386buildonly-randconfig-004-20241126gcc-12 i386buildonly-randconfig-005-20241126clang-19 i386buildonly-randconfig-005-20241126gcc-12 i386buildonly-randconfig-006-20241126gcc-12 i386 randconfig-001-20241126gcc-12 i386 randconfig-002-20241126gcc-12 i386 randconfig-003-20241126gcc-12 i386 randconfig-004-20241126gcc-11 i386 randconfig-004-20241126gcc-12 i386 randconfig-005-20241126clang-19 i386 randconfig-005-20241126gcc-12 i386 randconfig-006-20241126clang-19 i386 randconfig-006-20241126gcc-12 i386 randconfig-011-20241126clang-19 i386 randconfig-011-20241126gcc-12 i386 randconfig-012-20241126clang-19 i386 randconfig-012-20241126gcc-12 i386 randconfig-013-20241126clang-19 i386 randconfig-013-20241126gcc-12 i386 randconfig-014-20241126gcc-12 i386 randconfig-015-20241126clang-19 i386 randconfig-015-20241126gcc-12 i386 randconfig-016-20241126clang-19 i386 randconfig-016-20241126gcc-12 loongarchallmodconfiggcc-14.2.0 loongarch allnoconfiggcc-14.2.0 m68k alldefconfigclang-14 m68k allmodconfiggcc-14.2.0 m68k allnoconfiggcc-14.2.0 m68k allyesconfiggcc-14.2.0 m68k m5275evb_defconfiggcc-14.2.0 m68k sun3_defconfigclang-20 m68k sun3x_defconfigclang-14 microblaze allmodconfiggcc-14.2.0 microblazeallnoconfiggcc-14.2.0 microblaze allyesconfiggcc-14.2.0 mips allnoconfiggcc-14.2.0 mips ath79_defconfigclang-14 mips db1xxx_defconfigclang-20 mips jazz_defconfigclang-20 mips xway_defconfigclang-14 nios2 allnoconfiggcc-14.2.0 openrisc allnoconfigclang-20 openrisc allnoconfiggcc-14.2.0 openrisc allyesconfiggcc-14.2.0 parisc allmodconfiggcc-14.2.0 pariscallnoconfigclang-20 pariscallnoconfiggcc-14.2.0 parisc allyesconfiggcc-14.2.0 powerpc allmodconfiggcc-14.2.0 powerpc allnoconfigclang-20 powerpc allnoconfiggcc-14.2.0 powerpc allyesconfigclang-20 powerpc allyesconfiggcc-14.2.0 powerpc currituck_defconfigclang-20
Re: [Intel-wired-lan] [PATCH iwl-net] ice: fix incorrect PHY settings for 100 GB/s
On Tue, Nov 26, 2024 at 11:23:11AM +0100, Przemyslaw Korba wrote: > ptp4l application reports too high offset when ran on E823 device > with a 100GB/s link. Those values cannot go under 100ns, like in a > PTP working case when using 100 GB/s cable. > This is due to incorrect frequency settings on the PHY clocks for > 100 GB/s speed. Changes are introduced to align with the internal > hardware documentation, and correctly initialize frequency in PHY > clocks with the frequency values that are in our HW spec. > To reproduce the issue run ptp4l as a Time Receiver on E823 device, > and observe the offset, which will never approach values seen > in the PTP working case. You forgot to Cc: the PTP maintainer. If i spent the time to measure the latency and configured ptp4l correctly to take into account the latency, would i not see this issue? And will this change then cause a regression because it changes the latency invalidating my measurements? Andrew
Re: [Intel-wired-lan] [PATCH iwl-net] ice: fix max values for dpll pin phase adjust
> -Original Message-
> From: Intel-wired-lan On Behalf Of
> Arkadiusz Kubalewski
> Sent: 20 November 2024 13:21
> To: intel-wired-...@lists.osuosl.org
> Cc: net...@vger.kernel.org; Kubalewski, Arkadiusz
> ; Kitszel, Przemyslaw
>
> Subject: [Intel-wired-lan] [PATCH iwl-net] ice: fix max values for dpll pin
> phase adjust
>
> Mask admin command returned max phase adjust value for both input and output
> pins. Only 31 bits are relevant, last released data sheet wrongly points that
> 32 bits are valid - see [1] 3.2.6.4.1 Get CCU > Capabilities Command for
> reference. Fix of the datasheet itself is in progress.
>
> Fix the min/max assignment logic, previously the value was wrongly considered
> as negative value due to most significant bit being set.
>
> Example of previous broken behavior:
> $ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ --do
> pin-get --json '{"id":1}'| grep phase-adjust
> 'phase-adjust': 0,
> 'phase-adjust-max': 16723,
> 'phase-adjust-min': -16723,
>
> Correct behavior with the fix:
> $ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ --do
> pin-get --json '{"id":1}'| grep phase-adjust
> 'phase-adjust': 0,
> 'phase-adjust-max': 2147466925,
> 'phase-adjust-min': -2147466925,
>
> [1] https://cdrdv2.intel.com/v1/dl/getContent/613875?explicitVersion=true
>
> Fixes: 90e1c90750d7 ("ice: dpll: implement phase related callbacks")
> Reviewed-by: Przemek Kitszel
> Signed-off-by: Arkadiusz Kubalewski
> ---
> .../net/ethernet/intel/ice/ice_adminq_cmd.h | 2 ++
> drivers/net/ethernet/intel/ice/ice_dpll.c | 35 ---
> 2 files changed, 25 insertions(+), 12 deletions(-)
>
Tested-by: Pucha Himasekhar Reddy (A
Contingent worker at Intel)
[Intel-wired-lan] [PATCH iwl-net] ice: fix incorrect PHY settings for 100 GB/s
ptp4l application reports too high offset when ran on E823 device
with a 100GB/s link. Those values cannot go under 100ns, like in a
PTP working case when using 100 GB/s cable.
This is due to incorrect frequency settings on the PHY clocks for
100 GB/s speed. Changes are introduced to align with the internal
hardware documentation, and correctly initialize frequency in PHY
clocks with the frequency values that are in our HW spec.
To reproduce the issue run ptp4l as a Time Receiver on E823 device,
and observe the offset, which will never approach values seen
in the PTP working case.
Fixes: 3a7496234d17 ("ice: implement basic E822 PTP support")
Reviewed-by: Milena Olech
Signed-off-by: Przemyslaw Korba
---
drivers/net/ethernet/intel/ice/ice_ptp_consts.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_consts.h
b/drivers/net/ethernet/intel/ice/ice_ptp_consts.h
index 6620642077bb..bdb1020147d1 100644
--- a/drivers/net/ethernet/intel/ice/ice_ptp_consts.h
+++ b/drivers/net/ethernet/intel/ice/ice_ptp_consts.h
@@ -761,9 +761,9 @@ const struct ice_vernier_info_e82x
e822_vernier[NUM_ICE_PTP_LNK_SPD] = {
/* rx_desk_rsgb_par */
644531250, /* 644.53125 MHz Reed Solomon gearbox */
/* tx_desk_rsgb_pcs */
- 644531250, /* 644.53125 MHz Reed Solomon gearbox */
+ 390625000, /* 390.625 MHz Reed Solomon gearbox */
/* rx_desk_rsgb_pcs */
- 644531250, /* 644.53125 MHz Reed Solomon gearbox */
+ 390625000, /* 390.625 MHz Reed Solomon gearbox */
/* tx_fixed_delay */
1620,
/* pmd_adj_divisor */
base-commit: 6ef5f61a4aa7d4df94a855a44f996bff08b0be83
--
2.31.1
Re: [Intel-wired-lan] [PATCH iwl-net] ice: fix incorrect PHY settings for 100 GB/s
Dear Przemyslaw,
Thank you for your patch.
Am 26.11.24 um 11:23 schrieb Przemyslaw Korba:
ptp4l application reports too high offset when ran on E823 device
with a 100GB/s link. Those values cannot go under 100ns, like in a
PTP working case when using 100 GB/s cable.
This is due to incorrect frequency settings on the PHY clocks for
100 GB/s speed. Changes are introduced to align with the internal
hardware documentation, and correctly initialize frequency in PHY
It’d be great if you added the documentation name.
clocks with the frequency values that are in our HW spec.
To reproduce the issue run ptp4l as a Time Receiver on E823 device,
and observe the offset, which will never approach values seen
in the PTP working case.
(I’d add a blank line between paragraphs.)
Also, I always like to see pastes from the commands you ran to reproduce
this. It’s always good for comparison.
Fixes: 3a7496234d17 ("ice: implement basic E822 PTP support")
Any idea, where the wrong values came from? Will your test be added to
the test procedure?
Reviewed-by: Milena Olech
Signed-off-by: Przemyslaw Korba
---
drivers/net/ethernet/intel/ice/ice_ptp_consts.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_consts.h
b/drivers/net/ethernet/intel/ice/ice_ptp_consts.h
index 6620642077bb..bdb1020147d1 100644
--- a/drivers/net/ethernet/intel/ice/ice_ptp_consts.h
+++ b/drivers/net/ethernet/intel/ice/ice_ptp_consts.h
@@ -761,9 +761,9 @@ const struct ice_vernier_info_e82x
e822_vernier[NUM_ICE_PTP_LNK_SPD] = {
/* rx_desk_rsgb_par */
644531250, /* 644.53125 MHz Reed Solomon gearbox */
/* tx_desk_rsgb_pcs */
- 644531250, /* 644.53125 MHz Reed Solomon gearbox */
+ 390625000, /* 390.625 MHz Reed Solomon gearbox */
/* rx_desk_rsgb_pcs */
- 644531250, /* 644.53125 MHz Reed Solomon gearbox */
+ 390625000, /* 390.625 MHz Reed Solomon gearbox */
/* tx_fixed_delay */
1620,
/* pmd_adj_divisor */
Kind regards,
Paul
[Intel-wired-lan] [PATCH v2 iwl-next 03/10] idpf: move virtchnl structures to the header file
Move virtchnl structures to the header file to expose them for the PTP
virtchnl file.
Reviewed-by: Alexander Lobakin
Reviewed-by: Willem de Bruijn
Signed-off-by: Milena Olech
---
v1 -> v2: fix commit message title
.../net/ethernet/intel/idpf/idpf_virtchnl.c | 86 +--
.../net/ethernet/intel/idpf/idpf_virtchnl.h | 84 ++
2 files changed, 86 insertions(+), 84 deletions(-)
diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c
b/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c
index c73c38511ea3..6f80f752fe05 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_virtchnl.c
@@ -7,88 +7,6 @@
#include "idpf_virtchnl.h"
#include "idpf_ptp.h"
-#define IDPF_VC_XN_MIN_TIMEOUT_MSEC2000
-#define IDPF_VC_XN_DEFAULT_TIMEOUT_MSEC(60 * 1000)
-#define IDPF_VC_XN_IDX_M GENMASK(7, 0)
-#define IDPF_VC_XN_SALT_M GENMASK(15, 8)
-#define IDPF_VC_XN_RING_LENU8_MAX
-
-/**
- * enum idpf_vc_xn_state - Virtchnl transaction status
- * @IDPF_VC_XN_IDLE: not expecting a reply, ready to be used
- * @IDPF_VC_XN_WAITING: expecting a reply, not yet received
- * @IDPF_VC_XN_COMPLETED_SUCCESS: a reply was expected and received,
- * buffer updated
- * @IDPF_VC_XN_COMPLETED_FAILED: a reply was expected and received, but there
- * was an error, buffer not updated
- * @IDPF_VC_XN_SHUTDOWN: transaction object cannot be used, VC torn down
- * @IDPF_VC_XN_ASYNC: transaction sent asynchronously and doesn't have the
- * return context; a callback may be provided to handle
- * return
- */
-enum idpf_vc_xn_state {
- IDPF_VC_XN_IDLE = 1,
- IDPF_VC_XN_WAITING,
- IDPF_VC_XN_COMPLETED_SUCCESS,
- IDPF_VC_XN_COMPLETED_FAILED,
- IDPF_VC_XN_SHUTDOWN,
- IDPF_VC_XN_ASYNC,
-};
-
-struct idpf_vc_xn;
-/* Callback for asynchronous messages */
-typedef int (*async_vc_cb) (struct idpf_adapter *, struct idpf_vc_xn *,
- const struct idpf_ctlq_msg *);
-
-/**
- * struct idpf_vc_xn - Data structure representing virtchnl transactions
- * @completed: virtchnl event loop uses that to signal when a reply is
- *available, uses kernel completion API
- * @state: virtchnl event loop stores the data below, protected by the
- *completion's lock.
- * @reply_sz: Original size of reply, may be > reply_buf.iov_len; it will be
- * truncated on its way to the receiver thread according to
- * reply_buf.iov_len.
- * @reply: Reference to the buffer(s) where the reply data should be written
- *to. May be 0-length (then NULL address permitted) if the reply data
- *should be ignored.
- * @async_handler: if sent asynchronously, a callback can be provided to handle
- *the reply when it's received
- * @vc_op: corresponding opcode sent with this transaction
- * @idx: index used as retrieval on reply receive, used for cookie
- * @salt: changed every message to make unique, used for cookie
- */
-struct idpf_vc_xn {
- struct completion completed;
- enum idpf_vc_xn_state state;
- size_t reply_sz;
- struct kvec reply;
- async_vc_cb async_handler;
- u32 vc_op;
- u8 idx;
- u8 salt;
-};
-
-/**
- * struct idpf_vc_xn_params - Parameters for executing transaction
- * @send_buf: kvec for send buffer
- * @recv_buf: kvec for recv buffer, may be NULL, must then have zero length
- * @timeout_ms: timeout to wait for reply
- * @async: send message asynchronously, will not wait on completion
- * @async_handler: If sent asynchronously, optional callback handler. The user
- *must be careful when using async handlers as the memory for
- *the recv_buf _cannot_ be on stack if this is async.
- * @vc_op: virtchnl op to send
- */
-struct idpf_vc_xn_params {
- struct kvec send_buf;
- struct kvec recv_buf;
- int timeout_ms;
- bool async;
- async_vc_cb async_handler;
- u32 vc_op;
-};
-
/**
* struct idpf_vc_xn_manager - Manager for tracking transactions
* @ring: backing and lookup for transactions
@@ -450,8 +368,8 @@ static void idpf_vc_xn_push_free(struct idpf_vc_xn_manager
*vcxn_mngr,
* >= @recv_buf.iov_len, but we never overflow @@recv_buf_iov_base). < 0 for
* error.
*/
-static ssize_t idpf_vc_xn_exec(struct idpf_adapter *adapter,
- const struct idpf_vc_xn_params *params)
+ssize_t idpf_vc_xn_exec(struct idpf_adapter *adapter,
+ const struct idpf_vc_xn_params *params)
{
const struct kvec *send_buf = ¶ms->send_buf;
struct idpf_vc_xn *xn;
diff --git a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h
b/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h
index 83da5d8da56b..3522c1238ea2 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_virtchnl.h
+++ b/drivers/net/ethe
[Intel-wired-lan] [PATCH v2 iwl-next 04/10] idpf: negotiate PTP capabilities and get PTP clock
PTP capabilities are negotiated using virtchnl command. Add get
capabilities function, direct access to read the PTP clock time and
direct access to read the cross timestamp - system time and PTP clock
time. Set initial PTP capabilities exposed to the stack.
Reviewed-by: Alexander Lobakin
Tested-by: Willem de Bruijn
Signed-off-by: Milena Olech
---
v1 -> v2: change the size of access fields in ptp struct
drivers/net/ethernet/intel/idpf/Makefile | 2 +
drivers/net/ethernet/intel/idpf/idpf.h| 2 +
drivers/net/ethernet/intel/idpf/idpf_dev.c| 14 +
.../ethernet/intel/idpf/idpf_lan_pf_regs.h| 4 +
drivers/net/ethernet/intel/idpf/idpf_ptp.c| 263 ++
drivers/net/ethernet/intel/idpf/idpf_ptp.h| 89 ++
.../ethernet/intel/idpf/idpf_virtchnl_ptp.c | 95 +++
7 files changed, 469 insertions(+)
create mode 100644 drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c
diff --git a/drivers/net/ethernet/intel/idpf/Makefile
b/drivers/net/ethernet/intel/idpf/Makefile
index 1f38a9d7125c..83ac5e296382 100644
--- a/drivers/net/ethernet/intel/idpf/Makefile
+++ b/drivers/net/ethernet/intel/idpf/Makefile
@@ -17,4 +17,6 @@ idpf-y := \
idpf_vf_dev.o
idpf-$(CONFIG_IDPF_SINGLEQ)+= idpf_singleq_txrx.o
+
idpf-$(CONFIG_PTP_1588_CLOCK) += idpf_ptp.o
+idpf-$(CONFIG_PTP_1588_CLOCK) += idpf_virtchnl_ptp.o
diff --git a/drivers/net/ethernet/intel/idpf/idpf.h
b/drivers/net/ethernet/intel/idpf/idpf.h
index fc1eef2d5667..1607e9641b23 100644
--- a/drivers/net/ethernet/intel/idpf/idpf.h
+++ b/drivers/net/ethernet/intel/idpf/idpf.h
@@ -189,6 +189,7 @@ struct idpf_vport_max_q {
* @mb_intr_reg_init: Mailbox interrupt register initialization
* @reset_reg_init: Reset register initialization
* @trigger_reset: Trigger a reset to occur
+ * @ptp_reg_init: PTP register initialization
*/
struct idpf_reg_ops {
void (*ctlq_reg_init)(struct idpf_ctlq_create_info *cq);
@@ -197,6 +198,7 @@ struct idpf_reg_ops {
void (*reset_reg_init)(struct idpf_adapter *adapter);
void (*trigger_reset)(struct idpf_adapter *adapter,
enum idpf_flags trig_cause);
+ void (*ptp_reg_init)(const struct idpf_adapter *adapter);
};
/**
diff --git a/drivers/net/ethernet/intel/idpf/idpf_dev.c
b/drivers/net/ethernet/intel/idpf/idpf_dev.c
index 6c913a703df6..149f2c0afe92 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_dev.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_dev.c
@@ -4,6 +4,7 @@
#include "idpf.h"
#include "idpf_lan_pf_regs.h"
#include "idpf_virtchnl.h"
+#include "idpf_ptp.h"
#define IDPF_PF_ITR_IDX_SPACING0x4
@@ -145,6 +146,18 @@ static void idpf_trigger_reset(struct idpf_adapter
*adapter,
idpf_get_reg_addr(adapter, PFGEN_CTRL));
}
+/**
+ * idpf_ptp_reg_init - Initialize required registers
+ * @adapter: Driver specific private structure
+ *
+ * Set the bits required for enabling shtime and cmd execution
+ */
+static void idpf_ptp_reg_init(const struct idpf_adapter *adapter)
+{
+ adapter->ptp->cmd.shtime_enable_mask = PF_GLTSYN_CMD_SYNC_SHTIME_EN_M;
+ adapter->ptp->cmd.exec_cmd_mask = PF_GLTSYN_CMD_SYNC_EXEC_CMD_M;
+}
+
/**
* idpf_reg_ops_init - Initialize register API function pointers
* @adapter: Driver specific private structure
@@ -156,6 +169,7 @@ static void idpf_reg_ops_init(struct idpf_adapter *adapter)
adapter->dev_ops.reg_ops.mb_intr_reg_init = idpf_mb_intr_reg_init;
adapter->dev_ops.reg_ops.reset_reg_init = idpf_reset_reg_init;
adapter->dev_ops.reg_ops.trigger_reset = idpf_trigger_reset;
+ adapter->dev_ops.reg_ops.ptp_reg_init = idpf_ptp_reg_init;
}
/**
diff --git a/drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h
b/drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h
index 24edb8a6ec2e..cc9aa2b6a14a 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h
+++ b/drivers/net/ethernet/intel/idpf/idpf_lan_pf_regs.h
@@ -53,6 +53,10 @@
#define PF_FW_ATQH_ATQH_M GENMASK(9, 0)
#define PF_FW_ATQT (PF_FW_BASE + 0x24)
+/* Timesync registers */
+#define PF_GLTSYN_CMD_SYNC_EXEC_CMD_M GENMASK(1, 0)
+#define PF_GLTSYN_CMD_SYNC_SHTIME_EN_M BIT(2)
+
/* Interrupts */
#define PF_GLINT_BASE 0x0890
#define PF_GLINT_DYN_CTL(_INT) (PF_GLINT_BASE + ((_INT) * 0x1000))
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
index 1ac6367f5989..12caeaf4c1a1 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
@@ -4,6 +4,258 @@
#include "idpf.h"
#include "idpf_ptp.h"
+/**
+ * idpf_ptp_get_access - Determine the access type of the PTP features
+ * @adapter: Driver specific private structure
+ * @direct: Capability that indicates the direct access
+ * @mailbox: Capability that indicates the mailbox access
+ *
+ * Return: the type of supported access for the PTP feature.
+ */
[Intel-wired-lan] [PATCH v2 iwl-next 01/10] idpf: add initial PTP support
PTP feature is supported if the VIRTCHNL2_CAP_PTP is negotiated during the
capabilities recognition. Initial PTP support includes PTP initialization
and registration of the clock.
Reviewed-by: Alexander Lobakin
Reviewed-by: Vadim Fedorenko
Reviewed-by: Willem de Bruijn
Signed-off-by: Milena Olech
---
drivers/net/ethernet/intel/idpf/Kconfig | 1 +
drivers/net/ethernet/intel/idpf/Makefile | 1 +
drivers/net/ethernet/intel/idpf/idpf.h| 3 +
drivers/net/ethernet/intel/idpf/idpf_main.c | 4 +
drivers/net/ethernet/intel/idpf/idpf_ptp.c| 89 +++
drivers/net/ethernet/intel/idpf/idpf_ptp.h| 32 +++
.../net/ethernet/intel/idpf/idpf_virtchnl.c | 9 +-
7 files changed, 138 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ethernet/intel/idpf/idpf_ptp.c
create mode 100644 drivers/net/ethernet/intel/idpf/idpf_ptp.h
diff --git a/drivers/net/ethernet/intel/idpf/Kconfig
b/drivers/net/ethernet/intel/idpf/Kconfig
index 1addd663acad..2c359a8551c7 100644
--- a/drivers/net/ethernet/intel/idpf/Kconfig
+++ b/drivers/net/ethernet/intel/idpf/Kconfig
@@ -4,6 +4,7 @@
config IDPF
tristate "Intel(R) Infrastructure Data Path Function Support"
depends on PCI_MSI
+ depends on PTP_1588_CLOCK_OPTIONAL
select DIMLIB
select LIBETH
help
diff --git a/drivers/net/ethernet/intel/idpf/Makefile
b/drivers/net/ethernet/intel/idpf/Makefile
index 2ce01a0b5898..1f38a9d7125c 100644
--- a/drivers/net/ethernet/intel/idpf/Makefile
+++ b/drivers/net/ethernet/intel/idpf/Makefile
@@ -17,3 +17,4 @@ idpf-y := \
idpf_vf_dev.o
idpf-$(CONFIG_IDPF_SINGLEQ)+= idpf_singleq_txrx.o
+idpf-$(CONFIG_PTP_1588_CLOCK) += idpf_ptp.o
diff --git a/drivers/net/ethernet/intel/idpf/idpf.h
b/drivers/net/ethernet/intel/idpf/idpf.h
index 34dbdc7d6c88..fc1eef2d5667 100644
--- a/drivers/net/ethernet/intel/idpf/idpf.h
+++ b/drivers/net/ethernet/intel/idpf/idpf.h
@@ -531,6 +531,7 @@ struct idpf_vc_xn_manager;
* @vector_lock: Lock to protect vector distribution
* @queue_lock: Lock to protect queue distribution
* @vc_buf_lock: Lock to protect virtchnl buffer
+ * @ptp: Storage for PTP-related data
*/
struct idpf_adapter {
struct pci_dev *pdev;
@@ -589,6 +590,8 @@ struct idpf_adapter {
struct mutex vector_lock;
struct mutex queue_lock;
struct mutex vc_buf_lock;
+
+ struct idpf_ptp *ptp;
};
/**
diff --git a/drivers/net/ethernet/intel/idpf/idpf_main.c
b/drivers/net/ethernet/intel/idpf/idpf_main.c
index 082026c2a7ab..9fe0940f81b0 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_main.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_main.c
@@ -187,6 +187,10 @@ static int idpf_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
goto err_free;
}
+ err = pci_enable_ptm(pdev, NULL);
+ if (err)
+ pci_dbg(pdev, "PCIe PTM is not supported by PCIe
bus/controller\n");
+
/* set up for high or low dma */
err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
if (err) {
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
new file mode 100644
index ..1ac6367f5989
--- /dev/null
+++ b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
@@ -0,0 +1,89 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/* Copyright (C) 2024 Intel Corporation */
+
+#include "idpf.h"
+#include "idpf_ptp.h"
+
+/**
+ * idpf_ptp_create_clock - Create PTP clock device for userspace
+ * @adapter: Driver specific private structure
+ *
+ * This function creates a new PTP clock device.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int idpf_ptp_create_clock(const struct idpf_adapter *adapter)
+{
+ struct ptp_clock *clock;
+
+ /* Attempt to register the clock before enabling the hardware. */
+ clock = ptp_clock_register(&adapter->ptp->info,
+ &adapter->pdev->dev);
+ if (IS_ERR(clock)) {
+ pci_err(adapter->pdev, "PTP clock creation failed: %pe\n",
clock);
+ return PTR_ERR(clock);
+ }
+
+ adapter->ptp->clock = clock;
+
+ return 0;
+}
+
+/**
+ * idpf_ptp_init - Initialize PTP hardware clock support
+ * @adapter: Driver specific private structure
+ *
+ * Set up the device for interacting with the PTP hardware clock for all
+ * functions. Function will allocate and register a ptp_clock with the
+ * PTP_1588_CLOCK infrastructure.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+int idpf_ptp_init(struct idpf_adapter *adapter)
+{
+ int err;
+
+ if (!idpf_is_cap_ena(adapter, IDPF_OTHER_CAPS, VIRTCHNL2_CAP_PTP)) {
+ pci_dbg(adapter->pdev, "PTP capability is not detected\n");
+ return -EOPNOTSUPP;
+ }
+
+ adapter->ptp = kzalloc(sizeof(*adapter->ptp), GFP_KERNEL);
+ if (!adapter->ptp)
+ return -ENOMEM;
+
+ /* add a back pointer to adapte
[Intel-wired-lan] [PATCH v2 iwl-next 08/10] idpf: add Tx timestamp flows
Add functions to request Tx timestamp for the PTP packets, read the Tx
timestamp when the completion tag for that packet is being received,
extend the Tx timestamp value and set the supported timestamping modes.
Tx timestamp is requested for the PTP packets by setting a TSYN bit and
index value in the Tx context descriptor. The driver assumption is that
the Tx timestamp value is ready to be read when the completion tag is
received. Then the driver schedules delayed work and the Tx timestamp
value read is requested through virtchnl message. At the end, the Tx
timestamp value is extended to 64-bit and provided back to the skb.
Co-developed-by: Josh Hay
Signed-off-by: Josh Hay
Signed-off-by: Milena Olech
---
v1 -> v2: add timestamping stats, use ndo_hwtamp_get/ndo_hwstamp_set
drivers/net/ethernet/intel/idpf/idpf.h| 19 ++
.../net/ethernet/intel/idpf/idpf_ethtool.c| 65 +
.../net/ethernet/intel/idpf/idpf_lan_txrx.h | 13 +-
drivers/net/ethernet/intel/idpf/idpf_lib.c| 47
drivers/net/ethernet/intel/idpf/idpf_ptp.c| 229 -
drivers/net/ethernet/intel/idpf/idpf_ptp.h| 52
drivers/net/ethernet/intel/idpf/idpf_txrx.c | 138 ++-
drivers/net/ethernet/intel/idpf/idpf_txrx.h | 10 +-
.../net/ethernet/intel/idpf/idpf_virtchnl.c | 6 +-
.../ethernet/intel/idpf/idpf_virtchnl_ptp.c | 234 ++
10 files changed, 800 insertions(+), 13 deletions(-)
diff --git a/drivers/net/ethernet/intel/idpf/idpf.h
b/drivers/net/ethernet/intel/idpf/idpf.h
index 14b82e93dab5..21ceaf14f501 100644
--- a/drivers/net/ethernet/intel/idpf/idpf.h
+++ b/drivers/net/ethernet/intel/idpf/idpf.h
@@ -249,6 +249,19 @@ struct idpf_port_stats {
struct virtchnl2_vport_stats vport_stats;
};
+/**
+ * struct idpf_tx_tstamp_stats - Tx timestamp statistics
+ * @tx_hwtstamp_skipped: number of Tx time stamp requests skipped
+ * @tx_hwtstamp_skipped: number of Tx skbs discarded due to cached PHC time
+ * being too old to correctly extend timestamp
+ * @tx_hwtstamp_flushed: number of Tx skbs flushed due to interface closed
+ */
+struct idpf_tx_tstamp_stats {
+ u32 tx_hwtstamp_skipped;
+ u32 tx_hwtstamp_discarded;
+ u32 tx_hwtstamp_flushed;
+};
+
/**
* struct idpf_vport - Handle for netdevices and queue resources
* @num_txq: Number of allocated TX queues
@@ -293,6 +306,9 @@ struct idpf_port_stats {
* @link_up: True if link is up
* @sw_marker_wq: workqueue for marker packets
* @tx_tstamp_caps: The capabilities negotiated for Tx timestamping
+ * @tstamp_config: The Tx tstamp config
+ * @tstamp_task: Tx timestamping task
+ * @tstamp_stats: Tx timestamping statistics
*/
struct idpf_vport {
u16 num_txq;
@@ -339,6 +355,9 @@ struct idpf_vport {
wait_queue_head_t sw_marker_wq;
struct idpf_ptp_vport_tx_tstamp_caps *tx_tstamp_caps;
+ struct kernel_hwtstamp_config tstamp_config;
+ struct work_struct tstamp_task;
+ struct idpf_tx_tstamp_stats tstamp_stats;
};
/**
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
b/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
index b3ed1d9a80ae..31056fba484e 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
@@ -2,6 +2,7 @@
/* Copyright (C) 2023 Intel Corporation */
#include "idpf.h"
+#include "idpf_ptp.h"
/**
* idpf_get_rxnfc - command to get RX flow classification rules
@@ -480,6 +481,9 @@ static const struct idpf_stats idpf_gstrings_port_stats[] =
{
IDPF_PORT_STAT("tx-unicast_pkts", port_stats.vport_stats.tx_unicast),
IDPF_PORT_STAT("tx-multicast_pkts",
port_stats.vport_stats.tx_multicast),
IDPF_PORT_STAT("tx-broadcast_pkts",
port_stats.vport_stats.tx_broadcast),
+ IDPF_PORT_STAT("tx_hwtstamp_skipped", tstamp_stats.tx_hwtstamp_skipped),
+ IDPF_PORT_STAT("tx_hwtstamp_flushed", tstamp_stats.tx_hwtstamp_flushed),
+ IDPF_PORT_STAT("tx_hwtstamp_discarded",
tstamp_stats.tx_hwtstamp_discarded),
};
#define IDPF_PORT_STATS_LEN ARRAY_SIZE(idpf_gstrings_port_stats)
@@ -1317,6 +1321,66 @@ static int idpf_get_link_ksettings(struct net_device
*netdev,
return 0;
}
+/**
+ * idpf_set_timestamp_filters - Set the supported timestamping mode
+ * @vport: Virtual port structure
+ * @info: ethtool timestamping info structure
+ *
+ * Set the Tx/Rx timestamp filters.
+ */
+static void idpf_set_timestamp_filters(const struct idpf_vport *vport,
+ struct kernel_ethtool_ts_info *info)
+{
+ if (!vport->tx_tstamp_caps ||
+ vport->adapter->ptp->tx_tstamp_access == IDPF_PTP_NONE)
+ return;
+
+ info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
+ SOF_TIMESTAMPING_TX_HARDWARE |
+ SOF_TIMESTAMPING_RX_HARDWARE |
+ SOF_TIMESTAMPING_RAW_HARDWARE;
+
+ info->tx_t
[Intel-wired-lan] [PATCH v2 iwl-next 02/10] virtchnl: add PTP virtchnl definitions
PTP capabilities are negotiated using virtchnl commands. There are two
available modes of the PTP support: direct and mailbox. When the direct
access to PTP resources is negotiated, virtchnl messages returns a set
of registers that allow read/write directly. When the mailbox access to
PTP resources is negotiated, virtchnl messages are used to access
PTP clock and to read the timestamp values.
Virtchnl API covers both modes and exposes a set of PTP capabilities.
Using virtchnl API, the driver recognizes also HW abilities - maximum
adjustment of the clock and the basic increment value.
Additionally, API allows to configure the secondary mailbox, dedicated
exclusively for PTP purposes.
Reviewed-by: Alexander Lobakin
Reviewed-by: Willem de Bruijn
Signed-off-by: Milena Olech
---
v1 -> v2: fix struct description
drivers/net/ethernet/intel/idpf/virtchnl2.h | 302
1 file changed, 302 insertions(+)
diff --git a/drivers/net/ethernet/intel/idpf/virtchnl2.h
b/drivers/net/ethernet/intel/idpf/virtchnl2.h
index 63deb120359c..44a5ee84ed60 100644
--- a/drivers/net/ethernet/intel/idpf/virtchnl2.h
+++ b/drivers/net/ethernet/intel/idpf/virtchnl2.h
@@ -68,6 +68,16 @@ enum virtchnl2_op {
VIRTCHNL2_OP_ADD_MAC_ADDR = 535,
VIRTCHNL2_OP_DEL_MAC_ADDR = 536,
VIRTCHNL2_OP_CONFIG_PROMISCUOUS_MODE= 537,
+
+ /* TimeSync opcodes */
+ VIRTCHNL2_OP_PTP_GET_CAPS = 541,
+ VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP= 542,
+ VIRTCHNL2_OP_PTP_GET_DEV_CLK_TIME = 543,
+ VIRTCHNL2_OP_PTP_GET_CROSS_TIME = 544,
+ VIRTCHNL2_OP_PTP_SET_DEV_CLK_TIME = 545,
+ VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_FINE = 546,
+ VIRTCHNL2_OP_PTP_ADJ_DEV_CLK_TIME = 547,
+ VIRTCHNL2_OP_PTP_GET_VPORT_TX_TSTAMP_CAPS = 548,
};
/**
@@ -1270,4 +1280,296 @@ struct virtchnl2_promisc_info {
};
VIRTCHNL2_CHECK_STRUCT_LEN(8, virtchnl2_promisc_info);
+/**
+ * enum virtchnl2_ptp_caps - PTP capabilities
+ * @VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME: direct access to get the time of
+ *device clock
+ * @VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME_MB: mailbox access to get the time of
+ * device clock
+ * @VIRTCHNL2_CAP_PTP_GET_CROSS_TIME: direct access to cross timestamp
+ * @VIRTCHNL2_CAP_PTP_GET_CROSS_TIME_MB: mailbox access to cross timestamp
+ * @VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME: direct access to set the time of
+ *device clock
+ * @VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME_MB: mailbox access to set the time of
+ * device clock
+ * @VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK: direct access to adjust the time of
device
+ * clock
+ * @VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK_MB: mailbox access to adjust the time of
+ * device clock
+ * @VIRTCHNL2_CAP_PTP_TX_TSTAMPS: direct access to the Tx timestamping
+ * @VIRTCHNL2_CAP_PTP_TX_TSTAMPS_MB: mailbox access to the Tx timestamping
+ *
+ * PF/VF negotiates a set of supported PTP capabilities with the Control Plane.
+ * There are two access methods - mailbox (_MB) and direct.
+ * PTP capabilities enables Main Timer operations: get/set/adjust Main Timer,
+ * cross timestamping and the Tx timestamping.
+ */
+enum virtchnl2_ptp_caps {
+ VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME = BIT(0),
+ VIRTCHNL2_CAP_PTP_GET_DEVICE_CLK_TIME_MB= BIT(1),
+ VIRTCHNL2_CAP_PTP_GET_CROSS_TIME= BIT(2),
+ VIRTCHNL2_CAP_PTP_GET_CROSS_TIME_MB = BIT(3),
+ VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME = BIT(4),
+ VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME_MB= BIT(5),
+ VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK= BIT(6),
+ VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK_MB = BIT(7),
+ VIRTCHNL2_CAP_PTP_TX_TSTAMPS= BIT(8),
+ VIRTCHNL2_CAP_PTP_TX_TSTAMPS_MB = BIT(9),
+};
+
+/**
+ * struct virtchnl2_ptp_clk_reg_offsets - Offsets of device and PHY clocks
+ * registers.
+ * @dev_clk_ns_l: Device clock low register offset
+ * @dev_clk_ns_h: Device clock high register offset
+ * @phy_clk_ns_l: PHY clock low register offset
+ * @phy_clk_ns_h: PHY clock high register offset
+ * @cmd_sync_trigger: The command sync trigger register offset
+ * @pad: Padding for future extensions
+ */
+struct virtchnl2_ptp_clk_reg_offsets {
+ __le32 dev_clk_ns_l;
+ __le32 dev_clk_ns_h;
+ __le32 phy_clk_ns_l;
+ __le32 phy_clk_ns_h;
+ __le32 cmd_sync_trigger;
+ u8 pad[4];
+};
+VIRTCHNL2_CHECK_STRUCT_LEN(24, virtchnl2_ptp_clk_reg_offsets);
+
+/**
+ * struct virtchnl2_ptp_cross_time_reg_offsets - Offsets of the device cross
+ *
[Intel-wired-lan] [PATCH v2 iwl-next 07/10] idpf: add Tx timestamp capabilities negotiation
Tx timestamp capabilities are negotiated for the uplink Vport.
Driver receives information about the number of available Tx timestamp
latches, the size of Tx timestamp value and the set of indexes used
for Tx timestamping.
Add function to get the Tx timestamp capabilities and parse the uplink
vport flag.
Reviewed-by: Alexander Lobakin
Co-developed-by: Emil Tantilov
Signed-off-by: Emil Tantilov
Co-developed-by: Pavan Kumar Linga
Signed-off-by: Pavan Kumar Linga
Signed-off-by: Milena Olech
---
v1 -> v2: change the idpf_for_each_vport macro
drivers/net/ethernet/intel/idpf/idpf.h| 6 +
drivers/net/ethernet/intel/idpf/idpf_ptp.c| 69 ++
drivers/net/ethernet/intel/idpf/idpf_ptp.h| 96 -
.../net/ethernet/intel/idpf/idpf_virtchnl.c | 11 ++
.../ethernet/intel/idpf/idpf_virtchnl_ptp.c | 128 +-
drivers/net/ethernet/intel/idpf/virtchnl2.h | 10 +-
6 files changed, 317 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/intel/idpf/idpf.h
b/drivers/net/ethernet/intel/idpf/idpf.h
index 1607e9641b23..14b82e93dab5 100644
--- a/drivers/net/ethernet/intel/idpf/idpf.h
+++ b/drivers/net/ethernet/intel/idpf/idpf.h
@@ -292,6 +292,7 @@ struct idpf_port_stats {
* @port_stats: per port csum, header split, and other offload stats
* @link_up: True if link is up
* @sw_marker_wq: workqueue for marker packets
+ * @tx_tstamp_caps: The capabilities negotiated for Tx timestamping
*/
struct idpf_vport {
u16 num_txq;
@@ -336,6 +337,8 @@ struct idpf_vport {
bool link_up;
wait_queue_head_t sw_marker_wq;
+
+ struct idpf_ptp_vport_tx_tstamp_caps *tx_tstamp_caps;
};
/**
@@ -480,6 +483,9 @@ struct idpf_vport_config {
struct idpf_vc_xn_manager;
+#define idpf_for_each_vport(adapter, i) \
+ for ((i) = 0; (i) < (adapter)->num_alloc_vports; (i)++)
+
/**
* struct idpf_adapter - Device data struct generated on probe
* @pdev: PCI device struct given on probe
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
index 54b7ccb16da0..cf8d5fea02f8 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
@@ -62,6 +62,13 @@ void idpf_ptp_get_features_access(const struct idpf_adapter
*adapter)
ptp->adj_dev_clk_time_access = idpf_ptp_get_access(adapter,
direct,
mailbox);
+
+ /* Tx timestamping */
+ direct = VIRTCHNL2_CAP_PTP_TX_TSTAMPS;
+ mailbox = VIRTCHNL2_CAP_PTP_TX_TSTAMPS_MB;
+ ptp->tx_tstamp_access = idpf_ptp_get_access(adapter,
+ direct,
+ mailbox);
}
/**
@@ -517,6 +524,65 @@ static int idpf_ptp_create_clock(const struct idpf_adapter
*adapter)
return 0;
}
+/**
+ * idpf_ptp_release_vport_tstamp - Release the Tx timestamps trakcers for a
+ *given vport.
+ * @vport: Virtual port structure
+ *
+ * Remove the queues and delete lists that tracks Tx timestamp entries for a
+ * given vport.
+ */
+static void idpf_ptp_release_vport_tstamp(struct idpf_vport *vport)
+{
+ struct idpf_ptp_tx_tstamp *ptp_tx_tstamp, *tmp;
+ struct list_head *head;
+
+ if (!idpf_ptp_get_vport_tstamp_capability(vport))
+ return;
+
+ /* Remove list with free latches */
+ spin_lock(&vport->tx_tstamp_caps->lock_free);
+
+ head = &vport->tx_tstamp_caps->latches_free;
+ list_for_each_entry_safe(ptp_tx_tstamp, tmp, head, list_member) {
+ list_del(&ptp_tx_tstamp->list_member);
+ kfree(ptp_tx_tstamp);
+ }
+
+ spin_unlock(&vport->tx_tstamp_caps->lock_free);
+
+ /* Remove list with latches in use */
+ spin_lock(&vport->tx_tstamp_caps->lock_in_use);
+
+ head = &vport->tx_tstamp_caps->latches_in_use;
+ list_for_each_entry_safe(ptp_tx_tstamp, tmp, head, list_member) {
+ list_del(&ptp_tx_tstamp->list_member);
+ kfree(ptp_tx_tstamp);
+ }
+
+ spin_unlock(&vport->tx_tstamp_caps->lock_in_use);
+
+ kfree(vport->tx_tstamp_caps);
+ vport->tx_tstamp_caps = NULL;
+}
+
+/**
+ * idpf_ptp_release_tstamp - Release the Tx timestamps trackers
+ * @adapter: Driver specific private structure
+ *
+ * Remove the queues and delete lists that tracks Tx timestamp entries.
+ */
+static void idpf_ptp_release_tstamp(struct idpf_adapter *adapter)
+{
+ int i;
+
+ idpf_for_each_vport(adapter, i) {
+ struct idpf_vport *vport = adapter->vports[i];
+
+ idpf_ptp_release_vport_tstamp(vport);
+ }
+}
+
/**
* idpf_ptp_init - Initialize PTP hardware clock support
* @adapter: Driver specific private structure
@@ -601,6 +667,9 @@ void idpf_ptp_release(struct idpf_adapter *adapter)
[Intel-wired-lan] [PATCH v2 iwl-next 06/10] idpf: add PTP clock configuration
PTP clock configuration operations - set time, adjust time and adjust
frequency are required to control the clock and maintain synchronization
process.
Extend get PTP capabilities function to request for the clock adjustments
and add functions to enable these actions using dedicated virtchnl
messages.
Reviewed-by: Alexander Lobakin
Reviewed-by: Willem de Bruijn
Signed-off-by: Milena Olech
---
drivers/net/ethernet/intel/idpf/idpf_ptp.c| 191 ++
drivers/net/ethernet/intel/idpf/idpf_ptp.h| 43 +++-
.../net/ethernet/intel/idpf/idpf_virtchnl.c | 3 +
.../ethernet/intel/idpf/idpf_virtchnl_ptp.c | 142 -
4 files changed, 376 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
index 01e28085eb39..54b7ccb16da0 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
@@ -48,6 +48,20 @@ void idpf_ptp_get_features_access(const struct idpf_adapter
*adapter)
ptp->get_cross_tstamp_access = idpf_ptp_get_access(adapter,
direct,
mailbox);
+
+ /* Set the device clock time */
+ direct = VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME;
+ mailbox = VIRTCHNL2_CAP_PTP_SET_DEVICE_CLK_TIME;
+ ptp->set_dev_clk_time_access = idpf_ptp_get_access(adapter,
+ direct,
+ mailbox);
+
+ /* Adjust the device clock time */
+ direct = VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK;
+ mailbox = VIRTCHNL2_CAP_PTP_ADJ_DEVICE_CLK_MB;
+ ptp->adj_dev_clk_time_access = idpf_ptp_get_access(adapter,
+ direct,
+ mailbox);
}
/**
@@ -296,6 +310,154 @@ static int idpf_ptp_gettimex64(struct ptp_clock_info
*info,
return 0;
}
+/**
+ * idpf_ptp_settime64 - Set the time of the clock
+ * @info: the driver's PTP info structure
+ * @ts: timespec64 structure that holds the new time value
+ *
+ * Set the device clock to the user input value. The conversion from timespec
+ * to ns happens in the write function.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int idpf_ptp_settime64(struct ptp_clock_info *info,
+ const struct timespec64 *ts)
+{
+ struct idpf_adapter *adapter = idpf_ptp_info_to_adapter(info);
+ enum idpf_ptp_access access;
+ int err;
+ u64 ns;
+
+ access = adapter->ptp->set_dev_clk_time_access;
+ if (access != IDPF_PTP_MAILBOX)
+ return -EOPNOTSUPP;
+
+ ns = timespec64_to_ns(ts);
+
+ err = idpf_ptp_set_dev_clk_time(adapter, ns);
+ if (err) {
+ pci_err(adapter->pdev, "Failed to set the time, err: %pe\n",
ERR_PTR(err));
+ return err;
+ }
+
+ return 0;
+}
+
+/**
+ * idpf_ptp_adjtime_nonatomic - Do a non-atomic clock adjustment
+ * @info: the driver's PTP info structure
+ * @delta: Offset in nanoseconds to adjust the time by
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int idpf_ptp_adjtime_nonatomic(struct ptp_clock_info *info, s64 delta)
+{
+ struct timespec64 now, then;
+ int err;
+
+ err = idpf_ptp_gettimex64(info, &now, NULL);
+ if (err)
+ return err;
+
+ then = ns_to_timespec64(delta);
+ now = timespec64_add(now, then);
+
+ return idpf_ptp_settime64(info, &now);
+}
+
+/**
+ * idpf_ptp_adjtime - Adjust the time of the clock by the indicated delta
+ * @info: the driver's PTP info structure
+ * @delta: Offset in nanoseconds to adjust the time by
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int idpf_ptp_adjtime(struct ptp_clock_info *info, s64 delta)
+{
+ struct idpf_adapter *adapter = idpf_ptp_info_to_adapter(info);
+ enum idpf_ptp_access access;
+ int err;
+
+ access = adapter->ptp->adj_dev_clk_time_access;
+ if (access != IDPF_PTP_MAILBOX)
+ return -EOPNOTSUPP;
+
+ /* Hardware only supports atomic adjustments using signed 32-bit
+* integers. For any adjustment outside this range, perform
+* a non-atomic get->adjust->set flow.
+*/
+ if (delta > S32_MAX || delta < S32_MIN)
+ return idpf_ptp_adjtime_nonatomic(info, delta);
+
+ err = idpf_ptp_adj_dev_clk_time(adapter, delta);
+ if (err) {
+ pci_err(adapter->pdev, "Failed to adjust the clock with delta
%lld err: %pe\n", delta, ERR_PTR(err));
+ return err;
+ }
+
+ return 0;
+}
+
+/**
+ * idpf_ptp_adjfine - Adjust clock increment rate
+ * @info: the driver's PTP info structure
+ * @scaled_ppm: Parts per million with 16-bit fractional field
+ *
+ * Adjust the frequency of
[Intel-wired-lan] [PATCH v2 iwl-next 05/10] idpf: add mailbox access to read PTP clock time
When the access to read PTP clock is specified as mailbox, the driver
needs to send virtchnl message to perform PTP actions. Message is sent
using idpf_mbq_opc_send_msg_to_peer_drv mailbox opcode, with the parameters
received during PTP capabilities negotiation.
Add functions to recognize PTP messages, move them to dedicated secondary
mailbox, read the PTP clock time and cross timestamp using mailbox
messages.
Reviewed-by: Alexander Lobakin
Reviewed-by: Willem de Bruijn
Signed-off-by: Milena Olech
---
.../ethernet/intel/idpf/idpf_controlq_api.h | 3 +
drivers/net/ethernet/intel/idpf/idpf_ptp.c| 66 +++
drivers/net/ethernet/intel/idpf/idpf_ptp.h| 43 ++
.../net/ethernet/intel/idpf/idpf_virtchnl.c | 47 +++
.../ethernet/intel/idpf/idpf_virtchnl_ptp.c | 83 +++
5 files changed, 242 insertions(+)
diff --git a/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h
b/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h
index e8e046ef2f0d..9642494a67d8 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h
+++ b/drivers/net/ethernet/intel/idpf/idpf_controlq_api.h
@@ -123,9 +123,12 @@ struct idpf_ctlq_info {
/**
* enum idpf_mbx_opc - PF/VF mailbox commands
* @idpf_mbq_opc_send_msg_to_cp: used by PF or VF to send a message to its CP
+ * @idpf_mbq_opc_send_msg_to_peer_drv: used by PF or VF to send a message to
+ *any peer driver
*/
enum idpf_mbx_opc {
idpf_mbq_opc_send_msg_to_cp = 0x0801,
+ idpf_mbq_opc_send_msg_to_peer_drv = 0x0804,
};
/* API supported for control queue management */
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
index 12caeaf4c1a1..01e28085eb39 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
@@ -95,6 +95,37 @@ static u64 idpf_ptp_read_src_clk_reg_direct(struct
idpf_adapter *adapter,
return ((u64)hi << 32) | lo;
}
+/**
+ * idpf_ptp_read_src_clk_reg_mailbox - Read the main timer value through
mailbox
+ * @adapter: Driver specific private structure
+ * @sts: Optional parameter for holding a pair of system timestamps from
+ * the system clock. Will be ignored when NULL is given.
+ * @src_clk: Returned main timer value in nanoseconds unit
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+static int idpf_ptp_read_src_clk_reg_mailbox(struct idpf_adapter *adapter,
+struct ptp_system_timestamp *sts,
+u64 *src_clk)
+{
+ struct idpf_ptp_dev_timers clk_time;
+ int err;
+
+ /* Read the system timestamp pre PHC read */
+ ptp_read_system_prets(sts);
+
+ err = idpf_ptp_get_dev_clk_time(adapter, &clk_time);
+ if (err)
+ return err;
+
+ /* Read the system timestamp post PHC read */
+ ptp_read_system_postts(sts);
+
+ *src_clk = clk_time.dev_clk_time_ns;
+
+ return 0;
+}
+
/**
* idpf_ptp_read_src_clk_reg - Read the main timer value
* @adapter: Driver specific private structure
@@ -110,6 +141,8 @@ static int idpf_ptp_read_src_clk_reg(struct idpf_adapter
*adapter, u64 *src_clk,
switch (adapter->ptp->get_dev_clk_time_access) {
case IDPF_PTP_NONE:
return -EOPNOTSUPP;
+ case IDPF_PTP_MAILBOX:
+ return idpf_ptp_read_src_clk_reg_mailbox(adapter, sts, src_clk);
case IDPF_PTP_DIRECT:
*src_clk = idpf_ptp_read_src_clk_reg_direct(adapter, sts);
break;
@@ -146,6 +179,31 @@ static void idpf_ptp_get_sync_device_time_direct(struct
idpf_adapter *adapter,
*sys_time = ((u64)sys_time_hi << 32) | sys_time_lo;
}
+/**
+ * idpf_ptp_get_sync_device_time_mailbox - Get the cross time stamp values
+ *through mailbox
+ * @adapter: Driver specific private structure
+ * @dev_time: 64bit main timer value expressed in nanoseconds
+ * @sys_time: 64bit system time value expressed in nanoseconds
+ *
+ * Return: a pair of cross timestamp values on success, -errno otherwise.
+ */
+static int idpf_ptp_get_sync_device_time_mailbox(struct idpf_adapter *adapter,
+u64 *dev_time, u64 *sys_time)
+{
+ struct idpf_ptp_dev_timers cross_time;
+ int err;
+
+ err = idpf_ptp_get_cross_time(adapter, &cross_time);
+ if (err)
+ return err;
+
+ *dev_time = cross_time.dev_clk_time_ns;
+ *sys_time = cross_time.sys_time_ns;
+
+ return err;
+}
+
/**
* idpf_ptp_get_sync_device_time - Get the cross time stamp info
* @device: Current device time
@@ -161,10 +219,18 @@ static int idpf_ptp_get_sync_device_time(ktime_t *device,
{
struct idpf_adapter *adapter = ctx;
u64 ns_time_dev, ns_time_sys;
+ int err;
switch (adapter->ptp->get_cross_tstamp_access) {
[Intel-wired-lan] [PATCH v2 iwl-next 09/10] idpf: add support for Rx timestamping
Add Rx timestamp function when the Rx timestamp value is read directly
from the Rx descriptor. In order to extend the Rx timestamp value to 64
bit in hot path, the PHC time is cached in the receive groups.
Add supported Rx timestamp modes.
Reviewed-by: Alexander Lobakin
Signed-off-by: Milena Olech
---
v1 -> v2: extend commit message
drivers/net/ethernet/intel/idpf/idpf_ptp.c | 77 -
drivers/net/ethernet/intel/idpf/idpf_txrx.c | 30
drivers/net/ethernet/intel/idpf/idpf_txrx.h | 7 +-
3 files changed, 111 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
index 2460d27f004f..86611f2f26c5 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_ptp.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_ptp.c
@@ -317,12 +317,41 @@ static int idpf_ptp_gettimex64(struct ptp_clock_info
*info,
return 0;
}
+/**
+ * idpf_ptp_update_phctime_rxq_grp - Update the cached PHC time for a given Rx
+ * queue group.
+ * @grp: receive queue group in which Rx timestamp is enabled
+ * @split: Indicates whether the queue model is split or single queue
+ * @systime: Cached system time
+ */
+static void
+idpf_ptp_update_phctime_rxq_grp(const struct idpf_rxq_group *grp, bool split,
+ u64 systime)
+{
+ struct idpf_rx_queue *rxq;
+ u16 i;
+
+ if (!split) {
+ for (i = 0; i < grp->singleq.num_rxq; i++) {
+ rxq = grp->singleq.rxqs[i];
+ if (rxq)
+ WRITE_ONCE(rxq->cached_phc_time, systime);
+ }
+ } else {
+ for (i = 0; i < grp->splitq.num_rxq_sets; i++) {
+ rxq = &grp->splitq.rxq_sets[i]->rxq;
+ if (rxq)
+ WRITE_ONCE(rxq->cached_phc_time, systime);
+ }
+ }
+}
+
/**
* idpf_ptp_update_cached_phctime - Update the cached PHC time values
* @adapter: Driver specific private structure
*
* This function updates the system time values which are cached in the adapter
- * structure.
+ * structure and the Rx queues.
*
* This function must be called periodically to ensure that the cached value
* is never more than 2 seconds old.
@@ -332,7 +361,7 @@ static int idpf_ptp_gettimex64(struct ptp_clock_info *info,
static int idpf_ptp_update_cached_phctime(struct idpf_adapter *adapter)
{
u64 systime;
- int err;
+ int err, i;
err = idpf_ptp_read_src_clk_reg(adapter, &systime, NULL);
if (err)
@@ -345,6 +374,22 @@ static int idpf_ptp_update_cached_phctime(struct
idpf_adapter *adapter)
WRITE_ONCE(adapter->ptp->cached_phc_time, systime);
WRITE_ONCE(adapter->ptp->cached_phc_jiffies, jiffies);
+ idpf_for_each_vport(adapter, i) {
+ struct idpf_vport *vport = adapter->vports[i];
+ bool split;
+
+ if (!vport || !vport->rxq_grps)
+ continue;
+
+ split = idpf_is_queue_model_split(vport->rxq_model);
+
+ for (u16 i = 0; i < vport->num_rxq_grp; i++) {
+ struct idpf_rxq_group *grp = &vport->rxq_grps[i];
+
+ idpf_ptp_update_phctime_rxq_grp(grp, split, systime);
+ }
+ }
+
return 0;
}
@@ -608,6 +653,33 @@ int idpf_ptp_request_ts(struct idpf_tx_queue *tx_q, struct
sk_buff *skb,
return 0;
}
+/**
+ * idpf_ptp_set_rx_tstamp - Enable or disable Rx timestamping
+ * @vport: Virtual port structure
+ * @rx_filter: bool value for whether timestamps are enabled or disabled
+ */
+static void idpf_ptp_set_rx_tstamp(struct idpf_vport *vport, int rx_filter)
+{
+ vport->tstamp_config.rx_filter = rx_filter;
+
+ if (rx_filter == HWTSTAMP_FILTER_NONE)
+ return;
+
+ for (u16 i = 0; i < vport->num_rxq_grp; i++) {
+ struct idpf_rxq_group *grp = &vport->rxq_grps[i];
+ u16 j;
+
+ if (idpf_is_queue_model_split(vport->rxq_model)) {
+ for (j = 0; j < grp->singleq.num_rxq; j++)
+ idpf_queue_set(PTP, grp->singleq.rxqs[j]);
+ } else {
+ for (j = 0; j < grp->splitq.num_rxq_sets; j++)
+ idpf_queue_set(PTP,
+ &grp->splitq.rxq_sets[j]->rxq);
+ }
+ }
+}
+
/**
* idpf_ptp_set_timestamp_mode - Setup driver for requested timestamp mode
* @vport: Virtual port structure
@@ -627,6 +699,7 @@ int idpf_ptp_set_timestamp_mode(struct idpf_vport *vport,
}
vport->tstamp_config.tx_type = config->tx_type;
+ idpf_ptp_set_rx_tstamp(vport, config->rx_filter);
return 0;
}
diff --git a/drivers/net/ethernet/intel/idpf/idpf_txrx.c
b/drivers/net/ethernet/intel/idpf/idpf_txrx.c
index ab0
[Intel-wired-lan] [PATCH v2 iwl-next 10/10] idpf: change the method for mailbox workqueue allocation
Since workqueues are created per CPU, the works scheduled to this
workqueues are run on the CPU they were assigned. It may result in
overloaded CPU that is not able to handle virtchnl messages in
relatively short time. Allocating workqueue with WQ_UNBOUND and
WQ_HIGHPRI flags allows scheduler to queue virtchl messages on less loaded
CPUs, what eliminates delays.
Reviewed-by: Alexander Lobakin
Signed-off-by: Milena Olech
---
drivers/net/ethernet/intel/idpf/idpf_main.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/intel/idpf/idpf_main.c
b/drivers/net/ethernet/intel/idpf/idpf_main.c
index 9fe0940f81b0..afc39e894cd2 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_main.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_main.c
@@ -220,8 +220,8 @@ static int idpf_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
goto err_serv_wq_alloc;
}
- adapter->mbx_wq = alloc_workqueue("%s-%s-mbx", 0, 0,
- dev_driver_string(dev),
+ adapter->mbx_wq = alloc_workqueue("%s-%s-mbx", WQ_UNBOUND | WQ_HIGHPRI,
+ 0, dev_driver_string(dev),
dev_name(dev));
if (!adapter->mbx_wq) {
dev_err(dev, "Failed to allocate mailbox workqueue\n");
--
2.31.1
[Intel-wired-lan] [PATCH v2 iwl-next 00/10] add initial PTP support
This patch series introduces support for Precision Time Protocol (PTP) to Intel(R) Infrastructure Data Path Function (IDPF) driver. PTP feature is supported when the PTP capability is negotiated with the Control Plane (CP). IDPF creates a PTP clock and sets a set of supported functions. During the PTP initialization, IDPF requests a set of PTP capabilities and receives a writeback from the CP with the set of supported options. These options are: - get time of the PTP clock - get cross timestamp - set the time of the PTP clock - adjust the PTP clock - Tx timestamping Each feature is considered to have direct access, where the operations on PCIe BAR registers are allowed, or the mailbox access, where the virtchnl messages are used to perform any PTP action. Mailbox access means that PTP requests are sent to the CP through dedicated secondary mailbox and the CP reads/writes/modifies desired resource - PTP Clock or Tx timestamp registers. Tx timestamp capabilities are negotiated only for vports that have UPLINK_VPORT flag set by the CP. Capabilities provide information about the number of available Tx timestamp latches, their indexes and size of the Tx timestamp value. IDPF requests Tx timestamp by setting the TSYN bit and the requested timestamp index in the context descriptor for the PTP packets. When the completion tag for that packet is received, IDPF schedules a worker to read the Tx timestamp value. Current implementation of the IDPF driver does not allow to get stable Tx timestamping, when more than 1 request per 1 second is sent to the driver. Debug is in progress, however PTP feature seems to be affected by the IDPF transmit flow, as the Tx timestamping relies on the completion tag. v1 -> v2: add stats for timestamping, use ndo_hwtamp_get/set, fix minor spelling issues Milena Olech (10): idpf: add initial PTP support virtchnl: add PTP virtchnl definitions idpf: move virtchnl structures to the header file idpf: negotiate PTP capabilities and get PTP clock idpf: add mailbox access to read PTP clock time idpf: add PTP clock configuration idpf: add Tx timestamp capabilities negotiation idpf: add Tx timestamp flows idpf: add support for Rx timestamping idpf: change the method for mailbox workqueue allocation drivers/net/ethernet/intel/idpf/Kconfig | 1 + drivers/net/ethernet/intel/idpf/Makefile | 3 + drivers/net/ethernet/intel/idpf/idpf.h| 30 + .../ethernet/intel/idpf/idpf_controlq_api.h | 3 + drivers/net/ethernet/intel/idpf/idpf_dev.c| 14 + .../net/ethernet/intel/idpf/idpf_ethtool.c| 65 ++ .../ethernet/intel/idpf/idpf_lan_pf_regs.h| 4 + .../net/ethernet/intel/idpf/idpf_lan_txrx.h | 13 +- drivers/net/ethernet/intel/idpf/idpf_lib.c| 47 + drivers/net/ethernet/intel/idpf/idpf_main.c | 8 +- drivers/net/ethernet/intel/idpf/idpf_ptp.c| 976 ++ drivers/net/ethernet/intel/idpf/idpf_ptp.h| 351 +++ drivers/net/ethernet/intel/idpf/idpf_txrx.c | 168 ++- drivers/net/ethernet/intel/idpf/idpf_txrx.h | 17 +- .../net/ethernet/intel/idpf/idpf_virtchnl.c | 160 ++- .../net/ethernet/intel/idpf/idpf_virtchnl.h | 84 ++ .../ethernet/intel/idpf/idpf_virtchnl_ptp.c | 676 drivers/net/ethernet/intel/idpf/virtchnl2.h | 312 +- 18 files changed, 2833 insertions(+), 99 deletions(-) create mode 100644 drivers/net/ethernet/intel/idpf/idpf_ptp.c create mode 100644 drivers/net/ethernet/intel/idpf/idpf_ptp.h create mode 100644 drivers/net/ethernet/intel/idpf/idpf_virtchnl_ptp.c base-commit: be9bc5f29544142931d3958e972623a1db595af4 -- 2.31.1
Re: [Intel-wired-lan] [PATCH v2 iwl-next 08/10] idpf: add Tx timestamp flows
On 26/11/2024 03:58, Milena Olech wrote:
Add functions to request Tx timestamp for the PTP packets, read the Tx
timestamp when the completion tag for that packet is being received,
extend the Tx timestamp value and set the supported timestamping modes.
Tx timestamp is requested for the PTP packets by setting a TSYN bit and
index value in the Tx context descriptor. The driver assumption is that
the Tx timestamp value is ready to be read when the completion tag is
received. Then the driver schedules delayed work and the Tx timestamp
value read is requested through virtchnl message. At the end, the Tx
timestamp value is extended to 64-bit and provided back to the skb.
Co-developed-by: Josh Hay
Signed-off-by: Josh Hay
Signed-off-by: Milena Olech
---
v1 -> v2: add timestamping stats, use ndo_hwtamp_get/ndo_hwstamp_set
drivers/net/ethernet/intel/idpf/idpf.h| 19 ++
.../net/ethernet/intel/idpf/idpf_ethtool.c| 65 +
.../net/ethernet/intel/idpf/idpf_lan_txrx.h | 13 +-
drivers/net/ethernet/intel/idpf/idpf_lib.c| 47
drivers/net/ethernet/intel/idpf/idpf_ptp.c| 229 -
drivers/net/ethernet/intel/idpf/idpf_ptp.h| 52
drivers/net/ethernet/intel/idpf/idpf_txrx.c | 138 ++-
drivers/net/ethernet/intel/idpf/idpf_txrx.h | 10 +-
.../net/ethernet/intel/idpf/idpf_virtchnl.c | 6 +-
.../ethernet/intel/idpf/idpf_virtchnl_ptp.c | 234 ++
10 files changed, 800 insertions(+), 13 deletions(-)
diff --git a/drivers/net/ethernet/intel/idpf/idpf.h
b/drivers/net/ethernet/intel/idpf/idpf.h
index 14b82e93dab5..21ceaf14f501 100644
--- a/drivers/net/ethernet/intel/idpf/idpf.h
+++ b/drivers/net/ethernet/intel/idpf/idpf.h
@@ -249,6 +249,19 @@ struct idpf_port_stats {
struct virtchnl2_vport_stats vport_stats;
};
+/**
+ * struct idpf_tx_tstamp_stats - Tx timestamp statistics
+ * @tx_hwtstamp_skipped: number of Tx time stamp requests skipped
+ * @tx_hwtstamp_skipped: number of Tx skbs discarded due to cached PHC time
Shoule be @tx_hwtstamp_discarded:
+ * being too old to correctly extend timestamp
+ * @tx_hwtstamp_flushed: number of Tx skbs flushed due to interface closed
+ */
+struct idpf_tx_tstamp_stats {
+ u32 tx_hwtstamp_skipped;
+ u32 tx_hwtstamp_discarded;
+ u32 tx_hwtstamp_flushed;
+};
+
/**
* struct idpf_vport - Handle for netdevices and queue resources
* @num_txq: Number of allocated TX queues
@@ -293,6 +306,9 @@ struct idpf_port_stats {
* @link_up: True if link is up
* @sw_marker_wq: workqueue for marker packets
* @tx_tstamp_caps: The capabilities negotiated for Tx timestamping
+ * @tstamp_config: The Tx tstamp config
+ * @tstamp_task: Tx timestamping task
+ * @tstamp_stats: Tx timestamping statistics
*/
struct idpf_vport {
u16 num_txq;
@@ -339,6 +355,9 @@ struct idpf_vport {
wait_queue_head_t sw_marker_wq;
struct idpf_ptp_vport_tx_tstamp_caps *tx_tstamp_caps;
+ struct kernel_hwtstamp_config tstamp_config;
+ struct work_struct tstamp_task;
+ struct idpf_tx_tstamp_stats tstamp_stats;
};
/**
diff --git a/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
b/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
index b3ed1d9a80ae..31056fba484e 100644
--- a/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
+++ b/drivers/net/ethernet/intel/idpf/idpf_ethtool.c
@@ -2,6 +2,7 @@
/* Copyright (C) 2023 Intel Corporation */
#include "idpf.h"
+#include "idpf_ptp.h"
/**
* idpf_get_rxnfc - command to get RX flow classification rules
@@ -480,6 +481,9 @@ static const struct idpf_stats idpf_gstrings_port_stats[] =
{
IDPF_PORT_STAT("tx-unicast_pkts", port_stats.vport_stats.tx_unicast),
IDPF_PORT_STAT("tx-multicast_pkts",
port_stats.vport_stats.tx_multicast),
IDPF_PORT_STAT("tx-broadcast_pkts",
port_stats.vport_stats.tx_broadcast),
+ IDPF_PORT_STAT("tx_hwtstamp_skipped", tstamp_stats.tx_hwtstamp_skipped),
+ IDPF_PORT_STAT("tx_hwtstamp_flushed", tstamp_stats.tx_hwtstamp_flushed),
+ IDPF_PORT_STAT("tx_hwtstamp_discarded",
tstamp_stats.tx_hwtstamp_discarded),
};
#define IDPF_PORT_STATS_LEN ARRAY_SIZE(idpf_gstrings_port_stats)
@@ -1317,6 +1321,66 @@ static int idpf_get_link_ksettings(struct net_device
*netdev,
return 0;
}
+/**
+ * idpf_set_timestamp_filters - Set the supported timestamping mode
+ * @vport: Virtual port structure
+ * @info: ethtool timestamping info structure
+ *
+ * Set the Tx/Rx timestamp filters.
+ */
+static void idpf_set_timestamp_filters(const struct idpf_vport *vport,
+ struct kernel_ethtool_ts_info *info)
+{
+ if (!vport->tx_tstamp_caps ||
+ vport->adapter->ptp->tx_tstamp_access == IDPF_PTP_NONE)
+ return;
+
+ info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
+ SOF_TIMESTAMPING_TX_HARDWARE |
+
