> -----Original Message-----
> From: Intel-wired-lan <intel-wired-lan-boun...@osuosl.org> On Behalf Of
> Arkadiusz Kubalewski
> Sent: 20 November 2024 13:21
> To: intel-wired-...@lists.osuosl.org
> Cc: net...@vger.kernel.org; Kubalewski, Arkadiusz
> <arkadiusz.kubalew...@intel.com>; Kitszel, Przemyslaw
> <przemyslaw.kits...@intel.com>
> Subject: [Intel-wired-lan] [PATCH iwl-net] ice: fix max values for dpll pin
> phase adjust
>
> Mask admin command returned max phase adjust value for both input and output
> pins. Only 31 bits are relevant, last released data sheet wrongly points that
> 32 bits are valid - see [1] 3.2.6.4.1 Get CCU > Capabilities Command for
> reference. Fix of the datasheet itself is in progress.
>
> Fix the min/max assignment logic, previously the value was wrongly considered
> as negative value due to most significant bit being set.
>
> Example of previous broken behavior:
> $ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ --do
> pin-get --json '{"id":1}'| grep phase-adjust
> 'phase-adjust': 0,
> 'phase-adjust-max': 16723,
> 'phase-adjust-min': -16723,
>
> Correct behavior with the fix:
> $ ./tools/net/ynl/cli.py --spec Documentation/netlink/specs/dpll.yaml \ --do
> pin-get --json '{"id":1}'| grep phase-adjust
> 'phase-adjust': 0,
> 'phase-adjust-max': 2147466925,
> 'phase-adjust-min': -2147466925,
>
> [1] https://cdrdv2.intel.com/v1/dl/getContent/613875?explicitVersion=true
>
> Fixes: 90e1c90750d7 ("ice: dpll: implement phase related callbacks")
> Reviewed-by: Przemek Kitszel <przemyslaw.kits...@intel.com>
> Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalew...@intel.com>
> ---
> .../net/ethernet/intel/ice/ice_adminq_cmd.h | 2 ++
> drivers/net/ethernet/intel/ice/ice_dpll.c | 35 ++++++++++++-------
> 2 files changed, 25 insertions(+), 12 deletions(-)
>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pu...@intel.com> (A
Contingent worker at Intel)
