Re: [EXTERNAL] Flashcopy dataset example

[Keith Gooding]

Bill,

ADRDSSU DATASET DUMP with the CONCURRENT(VIRTUALREQ) option will flash copy the 
dataset to a work dataset and then dump (backup) the work dataset. I have not 
tried this myself. You have to pre-define work datasets with a particular 
naming convention. See “virtual concurrent copy working space” in the Dfsmsdss 
Stirage Admin Guide.

Keith

Sent from my iPad

> On 18 Feb 2023, at 19:12, Pommier, Rex  wrote:
> 
> Bill,
> 
> Dump and restore is a different animal.  Dump creates a backup copy in DFDSS 
> format so it will NOT use flashcopy because it has to reformat the data into 
> the DFDSS format.  Restore takes the dump file and rebuilds the original 
> dataset.  COPY is what will use flashcopy if you're set up for it and have 
> the required software licenses.
> 
> Rex
> 
> -Original Message-
> From: IBM Mainframe Discussion List  On Behalf Of 
> Bill Giannelli
> Sent: Saturday, February 18, 2023 5:17 AM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: [EXTERNAL] Flashcopy dataset example
> 
> hi rex,
> yes we have those utilities.
> But as far as your other questions, I have no idea. I am not a storage 
> systems guy.
> I think what I was after is the "dump" and "restore" commands.
> thanks
> Bill
> 
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Re: BSAM Read 31 bit mode

[Binyamin Dissen]

The fact that your code is AMODE 31 does not mean that the access method MUST
be above the line.

The actual expansion had an XR 15,15 before the ICM.

Why do you think that there is an issue? BALR does not change the AMODE.

On Fri, 17 Feb 2023 15:35:35 -0500 Joseph Reichman 
wrote:

:>Hi
:>
:> 
:>
:>I see this documentation from IBM
:>
:> 
:>
:>Addressing mode: When you issue the READ macro in 24-bit mode, provide only
:>24-bit addresses unless you code SF64 or SF64P. When you issue the READ
:>macro in 31-bit addressing mode, provide only 31-bit addresses unless
:>documentation says otherwise or you code SF64 or SF64P. With SF64 or SF64P,
:>the data area can reside above the 2 GB bar but you cannot issue READ in
:>64-bit mode.
:>
:> 
:>
:> 
:>
:>And yet my read macro expands to  ICM   15,B'0111',49(R6) 
:>
:> BALR  14,15 
:>
:> 
:>
:>Does the address mode paragraph then mean AMODE 31 RMODE 24
:>
:> 
:>
:> 
:>
:>In Addition the synad exit 
:>
:> 
:>
:>Which has 
:>
:> 
:>
:>Table 58. Register contents on entry to SYNAD routine-BDAM, BPAM, BSAM, and
:>QSAM Register Bits Meaning 0 0-7 Value to be added to the status indicator's
:>address to provide the address of the first CCW (QSAM only). Value may be
:>zero, meaning unavailable, if LBI is used. Using Non-VSAM User-Written Exit
:>Routines 494  z/OS: z/OS DFSMS Using Data Sets Table 58. Register contents
:>on entry to SYNAD routine-BDAM, BPAM, BSAM, and QSAM (continued) Register
:>Bits Meaning 
:>
:> 
:>
:>8-31 Address of the associated data event control block for BDAM, BPAM, and
:>BSAM unless bit 2 of register 1 is on; address of the status indicators
:>shown in Figure 109 on page 491 for QSAM. If bit 2 of register 1 is on, the
:>failure occurred in CNTRL, POINT, or BSP and this field contains the address
:>on an internal BSAM ECB  
:>
:> 
:>
:>Does this mean The DECB has to be AMODE 24
:>
:> 
:>
:>Thanks
:>
:>
:>--
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:>send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN

--
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Re: BSAM Read 31 bit mode

[Joseph Reichman]

Shmuel 

I looked that up or browsed the macro there is no reference rmode/amode 31
in the macro.

I did try sysstate amode64 generated the same code. 

-Original Message-
From: IBM Mainframe Discussion List  On Behalf Of
Seymour J Metz
Sent: Saturday, February 18, 2023 8:40 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: BSAM Read 31 bit mode

What is on your SYSSTATE?


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3


From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf of
Joseph Reichman [reichman...@gmail.com]
Sent: Friday, February 17, 2023 3:35 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: BSAM Read 31 bit mode

Hi



I see this documentation from IBM



Addressing mode: When you issue the READ macro in 24-bit mode, provide only
24-bit addresses unless you code SF64 or SF64P. When you issue the READ
macro in 31-bit addressing mode, provide only 31-bit addresses unless
documentation says otherwise or you code SF64 or SF64P. With SF64 or SF64P,
the data area can reside above the 2 GB bar but you cannot issue READ in
64-bit mode.





And yet my read macro expands to  ICM   15,B'0111',49(R6)

 BALR  14,15



Does the address mode paragraph then mean AMODE 31 RMODE 24





In Addition the synad exit



Which has



Table 58. Register contents on entry to SYNAD routine-BDAM, BPAM, BSAM, and
QSAM Register Bits Meaning 0 0-7 Value to be added to the status indicator's
address to provide the address of the first CCW (QSAM only). Value may be
zero, meaning unavailable, if LBI is used. Using Non-VSAM User-Written Exit
Routines 494  z/OS: z/OS DFSMS Using Data Sets Table 58. Register contents
on entry to SYNAD routine-BDAM, BPAM, BSAM, and QSAM (continued) Register
Bits Meaning



8-31 Address of the associated data event control block for BDAM, BPAM, and
BSAM unless bit 2 of register 1 is on; address of the status indicators
shown in Figure 109 on page 491 for QSAM. If bit 2 of register 1 is on, the
failure occurred in CNTRL, POINT, or BSP and this field contains the address
on an internal BSAM ECB



Does this mean The DECB has to be AMODE 24



Thanks


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Re: BSAM Read 31 bit mode

[Paul Gilmartin]

On Sun, 19 Feb 2023 12:15:40 +0200, Binyamin Dissen wrote:

>The fact that your code is AMODE 31 does not mean that the access method MUST
>be above the line.
>
>The actual expansion had an XR 15,15 before the ICM.
>
>Why do you think that there is an issue? BALR does not change the AMODE.
>
With one line more context:
>:>ICM   15,B'0111',49(R6)
>:> BALR  14,15

THe ICM clears bits 0-7 of the (SYNAD?) address.  If the user provides this, it
must be below the line; RMODE 24.  Will it be called in 24-bit or 31-bit mode?

It's dismaying that after almost 4 decades programmers must be concerned with
24-bit limitations.  Library macros should be sensitive to some option such as
OPTABLE and generate code accordingly.

31-bit is underreaching.  Should be 64.

>On Fri, 17 Feb 2023 15:35:35 -0500 Joseph Reichman wrote:
>
>:>I see this documentation from IBM
>:>
>:>Addressing mode: When you issue the READ macro in 24-bit mode, provide only
>:>24-bit addresses unless you code SF64 or SF64P. When you issue the READ
>:>macro in 31-bit addressing mode, provide only 31-bit addresses unless
>:>documentation says otherwise or you code SF64 or SF64P. With SF64 or SF64P,
>:>the data area can reside above the 2 GB bar but you cannot issue READ in
>:>64-bit mode.
>:>
>:>And yet my read macro expands to  
>:>ICM   15,B'0111',49(R6)
>:> BALR  14,15
>:>
>:>Does the address mode paragraph then mean AMODE 31 RMODE 24
>:>
>:>In Addition the synad exit Which has
>:>
>:>Table 58. Register contents on entry to SYNAD routine-BDAM, BPAM, BSAM, and
>:>QSAM Register Bits Meaning 0 0-7 Value to be added to the status indicator's
>:>address to provide the address of the first CCW (QSAM only). Value may be
>:>zero, meaning unavailable, if LBI is used. Using Non-VSAM User-Written Exit
>:>Routines 494  z/OS: z/OS DFSMS Using Data Sets Table 58. Register contents
>:>on entry to SYNAD routine-BDAM, BPAM, BSAM, and QSAM (continued) Register
>:>Bits Meaning
>:>
>:>8-31 Address of the associated data event control block for BDAM, BPAM, and
>:>BSAM unless bit 2 of register 1 is on; address of the status indicators
>:>shown in Figure 109 on page 491 for QSAM. If bit 2 of register 1 is on, the
>:>failure occurred in CNTRL, POINT, or BSP and this field contains the address
>:>on an internal BSAM ECB
>:>
>:>Does this mean The DECB has to be AMODE 24

-- 
gil

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Re: BSAM Read 31 bit mode

[Joseph Reichman]

My mistake was the BALR in AMODE 31 doesn't kill bits 1 - 7 

thanks

-Original Message-
From: IBM Mainframe Discussion List  On Behalf Of
Binyamin Dissen
Sent: Sunday, February 19, 2023 5:16 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: BSAM Read 31 bit mode

The fact that your code is AMODE 31 does not mean that the access method
MUST be above the line.

The actual expansion had an XR 15,15 before the ICM.

Why do you think that there is an issue? BALR does not change the AMODE.

On Fri, 17 Feb 2023 15:35:35 -0500 Joseph Reichman 
wrote:

:>Hi
:>
:>
:>
:>I see this documentation from IBM
:>
:>
:>
:>Addressing mode: When you issue the READ macro in 24-bit mode, provide
only :>24-bit addresses unless you code SF64 or SF64P. When you issue the
READ :>macro in 31-bit addressing mode, provide only 31-bit addresses unless
:>documentation says otherwise or you code SF64 or SF64P. With SF64 or
SF64P, :>the data area can reside above the 2 GB bar but you cannot issue
READ in :>64-bit mode.
:>
:>
:>
:>
:>
:>And yet my read macro expands to  ICM   15,B'0111',49(R6) 
:>
:> BALR  14,15 
:>
:>
:>
:>Does the address mode paragraph then mean AMODE 31 RMODE 24 :> :> :> :> :>
:>In Addition the synad exit :> :> :> :>Which has :> :> :> :>Table 58.
Register contents on entry to SYNAD routine-BDAM, BPAM, BSAM, and :>QSAM
Register Bits Meaning 0 0-7 Value to be added to the status indicator's
:>address to provide the address of the first CCW (QSAM only). Value may be
:>zero, meaning unavailable, if LBI is used. Using Non-VSAM User-Written
Exit :>Routines 494  z/OS: z/OS DFSMS Using Data Sets Table 58. Register
contents :>on entry to SYNAD routine-BDAM, BPAM, BSAM, and QSAM (continued)
Register :>Bits Meaning :> :> :>
:>8-31 Address of the associated data event control block for BDAM, BPAM,
and :>BSAM unless bit 2 of register 1 is on; address of the status
indicators :>shown in Figure 109 on page 491 for QSAM. If bit 2 of register
1 is on, the :>failure occurred in CNTRL, POINT, or BSP and this field
contains the address :>on an internal BSAM ECB :> :> :> :>Does this mean The
DECB has to be AMODE 24 :> :> :> :>Thanks :> :>
:>--
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--
Binyamin Dissen  http://www.dissensoftware.com

Director, Dissen Software, Bar & Grill - Israel

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Re: BSAM Read 31 bit mode

[Joseph Reichman]

I think SYNAD can be RMODE 31 it’s a parms on the DCBE

The other like abend and open I think are RMODE 24

Think IBM should have been consistent.

Here is the doc from the using datasets manual. The exits are discussed on 
chapter 31 in the using datasets manual.
 


Programming Considerations
For BSAM, BPAM, and QSAM your SYNAD routine is entered with the addressability 
(24- or 31-bit) of
when you issued the macro that caused entry to SYNAD. This typically is a 
CHECK, GET, or PUT macro.
DCB SYNAD identifies a routine that resides below the line (RMODE is 24). DCBE 
SYNAD identifies a
routine that may reside above the line. If it resides above the line, then all 
macros that might detect an I/O
error must be issued in 31-bit mode. If both the DCB and DCBE specify SYNAD, 
the DCBE routine will b

   says if SYNAD is coded on the DCBE is above the line

the other exits open and abend I believe are below 

Just wonder if you code an estate if that will get control before open abend

 

-Original Message-
From: IBM Mainframe Discussion List  On Behalf Of 
Paul Gilmartin
Sent: Sunday, February 19, 2023 9:38 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: BSAM Read 31 bit mode

On Sun, 19 Feb 2023 12:15:40 +0200, Binyamin Dissen wrote:

>The fact that your code is AMODE 31 does not mean that the access 
>method MUST be above the line.
>
>The actual expansion had an XR 15,15 before the ICM.
>
>Why do you think that there is an issue? BALR does not change the AMODE.
>
With one line more context:
>:>ICM   15,B'0111',49(R6)
>:> BALR  14,15

THe ICM clears bits 0-7 of the (SYNAD?) address.  If the user provides this, it 
must be below the line; RMODE 24.  Will it be called in 24-bit or 31-bit mode?

It's dismaying that after almost 4 decades programmers must be concerned with 
24-bit limitations.  Library macros should be sensitive to some option such as 
OPTABLE and generate code accordingly.

31-bit is underreaching.  Should be 64.

>On Fri, 17 Feb 2023 15:35:35 -0500 Joseph Reichman wrote:
>
>:>I see this documentation from IBM
>:>
>:>Addressing mode: When you issue the READ macro in 24-bit mode, 
>provide only :>24-bit addresses unless you code SF64 or SF64P. When you 
>issue the READ :>macro in 31-bit addressing mode, provide only 31-bit 
>addresses unless :>documentation says otherwise or you code SF64 or 
>SF64P. With SF64 or SF64P, :>the data area can reside above the 2 GB 
>bar but you cannot issue READ in :>64-bit mode.
>:>
>:>And yet my read macro expands to  
>:>ICM   15,B'0111',49(R6)
>:> BALR  14,15
>:>
>:>Does the address mode paragraph then mean AMODE 31 RMODE 24 :> :>In 
>Addition the synad exit Which has :> :>Table 58. Register contents on 
>entry to SYNAD routine-BDAM, BPAM, BSAM, and :>QSAM Register Bits 
>Meaning 0 0-7 Value to be added to the status indicator's :>address to 
>provide the address of the first CCW (QSAM only). Value may be :>zero, 
>meaning unavailable, if LBI is used. Using Non-VSAM User-Written Exit 
>:>Routines 494  z/OS: z/OS DFSMS Using Data Sets Table 58. Register 
>contents :>on entry to SYNAD routine-BDAM, BPAM, BSAM, and QSAM 
>(continued) Register :>Bits Meaning :>
>:>8-31 Address of the associated data event control block for BDAM, 
>BPAM, and :>BSAM unless bit 2 of register 1 is on; address of the 
>status indicators :>shown in Figure 109 on page 491 for QSAM. If bit 2 
>of register 1 is on, the :>failure occurred in CNTRL, POINT, or BSP and 
>this field contains the address :>on an internal BSAM ECB :> :>Does 
>this mean The DECB has to be AMODE 24

--
gil

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Re: BSAM Read 31 bit mode

[Binyamin Dissen]

On Sun, 19 Feb 2023 08:37:39 -0600 Paul Gilmartin
<042bfe9c879d-dmarc-requ...@listserv.ua.edu> wrote:

:>On Sun, 19 Feb 2023 12:15:40 +0200, Binyamin Dissen wrote:
:>
:>>The fact that your code is AMODE 31 does not mean that the access method MUST
:>>be above the line.
:
:>>The actual expansion had an XR 15,15 before the ICM.
:
:>>Why do you think that there is an issue? BALR does not change the AMODE.
:
:>With one line more context:
:>>:>ICM   15,B'0111',49(R6)
:>>:> BALR  14,15
:
:>THe ICM clears bits 0-7 of the (SYNAD?) address.  If the user provides this, 
it
:>must be below the line; RMODE 24.  Will it be called in 24-bit or 31-bit mode?

The ICM does not touch 0-7.

And it is the access method address, not the SYNAD

:>It's dismaying that after almost 4 decades programmers must be concerned with
:>24-bit limitations.  Library macros should be sensitive to some option such as
:>OPTABLE and generate code accordingly.

The cost of downward compatibility. One could argue that IBM should supply
GLUE routines, but instead they did the DCBE. One wonders how much effort it
is worth to support legacy access methods from above the bar.

:>31-bit is underreaching.  Should be 64.

Reasonable people can disagree.

--
Binyamin Dissen 
http://www.dissensoftware.com

Director, Dissen Software, Bar & Grill - Israel

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Re: BSAM Read 31 bit mode

[Paul Gilmartin]

On Sun, 19 Feb 2023 17:37:46 +0200, Binyamin Dissen wrote:
>:
>:>With one line more context:
>:>>:>ICM   15,B'0111',49(R6)
>:>>:> BALR  14,15
>
>The ICM does not touch 0-7.
> 
It doesn't preserve them.

>And it is the access method address, not the SYNAD
>
(These things would be more legible if IBM relied on USING.)

OK.  Not exactly GUPI.  Although I once stole it to supply a custom access 
method
(RMODE 24).

-- 
gil

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Re: BSAM Read 31 bit mode

[Binyamin Dissen]

On Sun, 19 Feb 2023 10:12:31 -0600 Paul Gilmartin
<042bfe9c879d-dmarc-requ...@listserv.ua.edu> wrote:

:>On Sun, 19 Feb 2023 17:37:46 +0200, Binyamin Dissen wrote:
:>>:
:>>:>With one line more context:
:>>:>>:>ICM   15,B'0111',49(R6)
:>>:>>:> BALR  14,15

:>>The ICM does not touch 0-7.
:
:>It doesn't preserve them.

Of course it does. The bits in the register are unchanged. Refer to the POPS.

:>>And it is the access method address, not the SYNAD

:>(These things would be more legible if IBM relied on USING.)

:>OK.  Not exactly GUPI.  Although I once stole it to supply a custom access 
method
:>(RMODE 24).

Which would have required a DCBD expansion and a slower assembly.

The later macros do rely on the mapping macros.

--
Binyamin Dissen 
http://www.dissensoftware.com

Director, Dissen Software, Bar & Grill - Israel

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Re: BSAM Read 31 bit mode

[Seymour J Metz]

I've never believed that a faster assembly justifies making a program harder to 
debug, modify or read, not even on the 650, which was slower than your wrist 
watch. I'll admit to using "16" instead of "CVTPTR", but I attribute it to 
youthful folly and haven't done it in decades. Since the 1970s I've been urging 
the use of mapping macros rather than "magic numbers".


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3


From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf of 
Binyamin Dissen [bdis...@dissensoftware.com]
Sent: Sunday, February 19, 2023 11:28 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: BSAM Read 31 bit mode

On Sun, 19 Feb 2023 10:12:31 -0600 Paul Gilmartin
<042bfe9c879d-dmarc-requ...@listserv.ua.edu> wrote:

:>On Sun, 19 Feb 2023 17:37:46 +0200, Binyamin Dissen wrote:
:>>:
:>>:>With one line more context:
:>>:>>:>ICM   15,B'0111',49(R6)
:>>:>>:> BALR  14,15

:>>The ICM does not touch 0-7.
:
:>It doesn't preserve them.

Of course it does. The bits in the register are unchanged. Refer to the POPS.

:>>And it is the access method address, not the SYNAD

:>(These things would be more legible if IBM relied on USING.)

:>OK.  Not exactly GUPI.  Although I once stole it to supply a custom access 
method
:>(RMODE 24).

Which would have required a DCBD expansion and a slower assembly.

The later macros do rely on the mapping macros.

--
Binyamin Dissen 
http://secure-web.cisco.com/1Iu6t_VM2pP0PFuBEZyogndUWdd5B7xu3Wsn20MkWWtoMfQ8u47mZVoxCZjFwwSDFCkTKoZZqoRI9SoTnpyAkwKpORkuFmcEvDMSu3-NXtU_R9MN12duHlKQH63UNYzfnzTpHX0Buace_D3nsLFCosM3RyViKzJFEeaBIDfjFbtH-GILWRs-Jxdi4g5zhKYjmLZ5rSO0K7lh2vH4MEFNn8GvfvTCH4R6LjLX78OzaqBWyaQ6zG-TmNb1JQyNk_UDRmq2HYMxh4yigx0kVQqV8-fRPpaQ0omWc6vZgsWVWLICQloewqOiMq2ec58QmI4HSbKxiuVwTJcqyz8plO_7KpGlLM7-v7F-WgsBSncTW4nLJD6baHGTRWxr0rGmxlFxB8fca7nrWIOs_ioSi72yGFi9FQe6Q1TughB1rQdPKAM4/http%3A%2F%2Fwww.dissensoftware.com

Director, Dissen Software, Bar & Grill - Israel

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Re: BSAM Read 31 bit mode

[Seymour J Metz]

Both BALR and BASR change all bits of the link register. ICM with a mask of 7, 
however, does not alter bits 0-7.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3


From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf of 
Joseph Reichman [reichman...@gmail.com]
Sent: Sunday, February 19, 2023 9:38 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: BSAM Read 31 bit mode

My mistake was the BALR in AMODE 31 doesn't kill bits 1 - 7

thanks

-Original Message-
From: IBM Mainframe Discussion List  On Behalf Of
Binyamin Dissen
Sent: Sunday, February 19, 2023 5:16 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: BSAM Read 31 bit mode

The fact that your code is AMODE 31 does not mean that the access method
MUST be above the line.

The actual expansion had an XR 15,15 before the ICM.

Why do you think that there is an issue? BALR does not change the AMODE.

On Fri, 17 Feb 2023 15:35:35 -0500 Joseph Reichman 
wrote:

:>Hi
:>
:>
:>
:>I see this documentation from IBM
:>
:>
:>
:>Addressing mode: When you issue the READ macro in 24-bit mode, provide
only :>24-bit addresses unless you code SF64 or SF64P. When you issue the
READ :>macro in 31-bit addressing mode, provide only 31-bit addresses unless
:>documentation says otherwise or you code SF64 or SF64P. With SF64 or
SF64P, :>the data area can reside above the 2 GB bar but you cannot issue
READ in :>64-bit mode.
:>
:>
:>
:>
:>
:>And yet my read macro expands to  ICM   15,B'0111',49(R6)
:>
:> BALR  14,15
:>
:>
:>
:>Does the address mode paragraph then mean AMODE 31 RMODE 24 :> :> :> :> :>
:>In Addition the synad exit :> :> :> :>Which has :> :> :> :>Table 58.
Register contents on entry to SYNAD routine-BDAM, BPAM, BSAM, and :>QSAM
Register Bits Meaning 0 0-7 Value to be added to the status indicator's
:>address to provide the address of the first CCW (QSAM only). Value may be
:>zero, meaning unavailable, if LBI is used. Using Non-VSAM User-Written
Exit :>Routines 494  z/OS: z/OS DFSMS Using Data Sets Table 58. Register
contents :>on entry to SYNAD routine-BDAM, BPAM, BSAM, and QSAM (continued)
Register :>Bits Meaning :> :> :>
:>8-31 Address of the associated data event control block for BDAM, BPAM,
and :>BSAM unless bit 2 of register 1 is on; address of the status
indicators :>shown in Figure 109 on page 491 for QSAM. If bit 2 of register
1 is on, the :>failure occurred in CNTRL, POINT, or BSP and this field
contains the address :>on an internal BSAM ECB :> :> :> :>Does this mean The
DECB has to be AMODE 24 :> :> :> :>Thanks :> :>
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--
Binyamin Dissen  
http://secure-web.cisco.com/13hbCrLlhji1mE1QcrvOfhv220KW1Zbxc753wJYo9J6fI6SSH4j4xbkROG3VX4x1gpt7mCqN4G8oMrCFgaKuUI3BQnPlEKy_brLCZmDkRAXsa3hz1Vhie_a63QG5TuyjONJ6U2_r09JZ6I_piAF-_qr9v2ZFSc0xv6W-w_k8Pkoljr5mbtMhUg1XHb6HTqz4Hp6wsKPwpR-DkqDNB8O4CnjZTUc6d2fFrWlbjs6Ahl-7nhdDsumi8j0VoQIy9J6oJQ0V8lLeWdZrhxYIkaXei1H62qt8yuBJARAIuJ77F15muF8wbVFVaxtymYI7bpJ7J5zr_Omk_MSvbV_A9ZvLy0QaeUzFraZOxt8yYWi7wCb1ZcDVXI2Ub9gYV5g8kC_IIGS87GSTsfxQy25_8Aq0AaD7DhjGN-FKHGDD14odIDVqK8kGQmmC-wUEjI2VU9x8r/http%3A%2F%2Fwww.dissensoftware.com

Director, Dissen Software, Bar & Grill - Israel

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Re: BSAM Read 31 bit mode

[Seymour J Metz]

> THe ICM clears bits 0-7 of the (SYNAD?) address. 

It's the XR that clears bits 0-7, not the ICM.

> It's dismaying that after almost 4 decades programmers must be concerned with
> 24-bit limitations.  Library macros should be sensitive to some option such as
> OPTABLE and generate code accordingly.

That's not what OPTABLE is for; many macros test the globals set by SYSSTATE, 
which is why it's there.

> 31-bit is underreaching.  Should be 64.

Agreed, unless technology advances much more rapidly than I expect. But 24-bit 
was also underreaching when S/360 came out, given what was already on the 
market.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3


From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf of 
Paul Gilmartin [042bfe9c879d-dmarc-requ...@listserv.ua.edu]
Sent: Sunday, February 19, 2023 9:37 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: BSAM Read 31 bit mode

On Sun, 19 Feb 2023 12:15:40 +0200, Binyamin Dissen wrote:

>The fact that your code is AMODE 31 does not mean that the access method MUST
>be above the line.
>
>The actual expansion had an XR 15,15 before the ICM.
>
>Why do you think that there is an issue? BALR does not change the AMODE.
>
With one line more context:
>:>ICM   15,B'0111',49(R6)
>:> BALR  14,15

THe ICM clears bits 0-7 of the (SYNAD?) address.  If the user provides this, it
must be below the line; RMODE 24.  Will it be called in 24-bit or 31-bit mode?

It's dismaying that after almost 4 decades programmers must be concerned with
24-bit limitations.  Library macros should be sensitive to some option such as
OPTABLE and generate code accordingly.

31-bit is underreaching.  Should be 64.

>On Fri, 17 Feb 2023 15:35:35 -0500 Joseph Reichman wrote:
>
>:>I see this documentation from IBM
>:>
>:>Addressing mode: When you issue the READ macro in 24-bit mode, provide only
>:>24-bit addresses unless you code SF64 or SF64P. When you issue the READ
>:>macro in 31-bit addressing mode, provide only 31-bit addresses unless
>:>documentation says otherwise or you code SF64 or SF64P. With SF64 or SF64P,
>:>the data area can reside above the 2 GB bar but you cannot issue READ in
>:>64-bit mode.
>:>
>:>And yet my read macro expands to
>:>ICM   15,B'0111',49(R6)
>:> BALR  14,15
>:>
>:>Does the address mode paragraph then mean AMODE 31 RMODE 24
>:>
>:>In Addition the synad exit Which has
>:>
>:>Table 58. Register contents on entry to SYNAD routine-BDAM, BPAM, BSAM, and
>:>QSAM Register Bits Meaning 0 0-7 Value to be added to the status indicator's
>:>address to provide the address of the first CCW (QSAM only). Value may be
>:>zero, meaning unavailable, if LBI is used. Using Non-VSAM User-Written Exit
>:>Routines 494  z/OS: z/OS DFSMS Using Data Sets Table 58. Register contents
>:>on entry to SYNAD routine-BDAM, BPAM, BSAM, and QSAM (continued) Register
>:>Bits Meaning
>:>
>:>8-31 Address of the associated data event control block for BDAM, BPAM, and
>:>BSAM unless bit 2 of register 1 is on; address of the status indicators
>:>shown in Figure 109 on page 491 for QSAM. If bit 2 of register 1 is on, the
>:>failure occurred in CNTRL, POINT, or BSP and this field contains the address
>:>on an internal BSAM ECB
>:>
>:>Does this mean The DECB has to be AMODE 24

--
gil

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Re: BSAM Read 31 bit mode

[Paul Gilmartin]

On Sun, 19 Feb 2023 17:14:14 +, Seymour J Metz wrote:

>> THe ICM clears bits 0-7 of the (SYNAD?) address. 
>
>It's the XR that clears bits 0-7, not the ICM.
>
The combination with a mask of B'0111' limits addressing to 24 bits.
It does work in AMODE 31 and 24, but not on a 360.

>That's not what OPTABLE is for; many macros test the globals set by SYSSTATE, 
>which is why it's there.
>
Thanks.

>> 31-bit is underreaching.  Should be 64.
>
>Agreed, unless technology advances much more rapidly than I expect. But 24-bit 
>was also underreaching when S/360 came out, given what was already on the 
>market.
>
A colleague, working for MIPS/SGI had to steadfastly refuse requests from 
software
developers not to validate upper bits of 64-bit addresses, prohibiting their use
for flags.

Assembler is the wrong language for upward compatibility.

-- gil

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Test

[Steve Thompson]

This is a test to see if my IP is still being blocked.

My email server is hosted in Washington state and from time to 
time certain organizations suddenly start blocking the ips from 
the host there.


Steve Thompson

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Re: Test

[Charles Hardee]

I received your message so it appears your not being blocked, as of now.

On Sun, Feb 19, 2023 at 12:13 PM Steve Thompson  wrote:

> This is a test to see if my IP is still being blocked.
>
> My email server is hosted in Washington state and from time to
> time certain organizations suddenly start blocking the ips from
> the host there.
>
> Steve Thompson
>
> --
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Re: Test

[Steve Thompson]

Thank you for your reply.

Knowing this screwy problem, I have the list servers I use set up 
to send me a copy of what I sent them so I can know it posted.


Regards,
Steve Thompson

On 2/19/2023 1:14 PM, Charles Hardee wrote:

I received your message so it appears your not being blocked, as of now.

On Sun, Feb 19, 2023 at 12:13 PM Steve Thompson  wrote:


This is a test to see if my IP is still being blocked.

My email server is hosted in Washington state and from time to
time certain organizations suddenly start blocking the ips from
the host there.

Steve Thompson

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Re: BSAM Read 31 bit mode

[Seymour J Metz]

> The combination with a mask of B'0111' limits addressing to 24 bits.
> It does work in AMODE 31 and 24, but not on a 360.

In this case it doesn't matter, because IBM uses bits 0-7 of that word in the 
DCB for flags, so 24 bits is all that's left.

> A colleague, working for MIPS/SGI had to steadfastly refuse requests from 
> software
>developers not to validate upper bits of 64-bit addresses, prohibiting their 
>use for flags.

Not my monkeys, not my circus, but how do you spell "Hell, no"?


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3


From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf of 
Paul Gilmartin [042bfe9c879d-dmarc-requ...@listserv.ua.edu]
Sent: Sunday, February 19, 2023 12:52 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: BSAM Read 31 bit mode

On Sun, 19 Feb 2023 17:14:14 +, Seymour J Metz wrote:

>> THe ICM clears bits 0-7 of the (SYNAD?) address.
>
>It's the XR that clears bits 0-7, not the ICM.
>
The combination with a mask of B'0111' limits addressing to 24 bits.
It does work in AMODE 31 and 24, but not on a 360.

>That's not what OPTABLE is for; many macros test the globals set by SYSSTATE, 
>which is why it's there.
>
Thanks.

>> 31-bit is underreaching.  Should be 64.
>
>Agreed, unless technology advances much more rapidly than I expect. But 24-bit 
>was also underreaching when S/360 came out, given what was already on the 
>market.
>
A colleague, working for MIPS/SGI had to steadfastly refuse requests from 
software
developers not to validate upper bits of 64-bit addresses, prohibiting their use
for flags.

Assembler is the wrong language for upward compatibility.

-- gil

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Re: BSAM Read 31 bit mode

[Seymour J Metz]

Thanks.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3


From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf of 
Joseph Reichman [reichman...@gmail.com]
Sent: Sunday, February 19, 2023 9:23 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: BSAM Read 31 bit mode

Shmuel

I looked that up or browsed the macro there is no reference rmode/amode 31
in the macro.

I did try sysstate amode64 generated the same code.

-Original Message-
From: IBM Mainframe Discussion List  On Behalf Of
Seymour J Metz
Sent: Saturday, February 18, 2023 8:40 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: BSAM Read 31 bit mode

What is on your SYSSTATE?


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3


From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf of
Joseph Reichman [reichman...@gmail.com]
Sent: Friday, February 17, 2023 3:35 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: BSAM Read 31 bit mode

Hi



I see this documentation from IBM



Addressing mode: When you issue the READ macro in 24-bit mode, provide only
24-bit addresses unless you code SF64 or SF64P. When you issue the READ
macro in 31-bit addressing mode, provide only 31-bit addresses unless
documentation says otherwise or you code SF64 or SF64P. With SF64 or SF64P,
the data area can reside above the 2 GB bar but you cannot issue READ in
64-bit mode.





And yet my read macro expands to  ICM   15,B'0111',49(R6)

 BALR  14,15



Does the address mode paragraph then mean AMODE 31 RMODE 24





In Addition the synad exit



Which has



Table 58. Register contents on entry to SYNAD routine-BDAM, BPAM, BSAM, and
QSAM Register Bits Meaning 0 0-7 Value to be added to the status indicator's
address to provide the address of the first CCW (QSAM only). Value may be
zero, meaning unavailable, if LBI is used. Using Non-VSAM User-Written Exit
Routines 494  z/OS: z/OS DFSMS Using Data Sets Table 58. Register contents
on entry to SYNAD routine-BDAM, BPAM, BSAM, and QSAM (continued) Register
Bits Meaning



8-31 Address of the associated data event control block for BDAM, BPAM, and
BSAM unless bit 2 of register 1 is on; address of the status indicators
shown in Figure 109 on page 491 for QSAM. If bit 2 of register 1 is on, the
failure occurred in CNTRL, POINT, or BSP and this field contains the address
on an internal BSAM ECB



Does this mean The DECB has to be AMODE 24



Thanks


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Re: Test

[Steve Beaver]

Received 

Sent from my iPhone

No one said I could type with one thumb 

> On Feb 19, 2023, at 12:18, Steve Thompson  wrote:
> 
> Thank you for your reply.
> 
> Knowing this screwy problem, I have the list servers I use set up to send me 
> a copy of what I sent them so I can know it posted.
> 
> Regards,
> Steve Thompson
> 
>> On 2/19/2023 1:14 PM, Charles Hardee wrote:
>> I received your message so it appears your not being blocked, as of now.
>> 
>>> On Sun, Feb 19, 2023 at 12:13 PM Steve Thompson  wrote:
>>> 
>>> This is a test to see if my IP is still being blocked.
>>> 
>>> My email server is hosted in Washington state and from time to
>>> time certain organizations suddenly start blocking the ips from
>>> the host there.
>>> 
>>> Steve Thompson
>>> 
>>> --
>>> For IBM-MAIN subscribe / signoff / archive access instructions,
>>> send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
>>> 
>> --
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> 
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Re: Test

[Paul Gilmartin]

On Sun, 19 Feb 2023 13:12:58 -0500, Steve Thompson wrote:

>This is a test to see if my IP is still being blocked.
>
Also, perhaps first, try: .

-- 
gil

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Re: Test

[Steve Beaver]

Still good 

Sent from my iPhone

No one said I could type with one thumb 

> On Feb 19, 2023, at 13:40, Paul Gilmartin 
> <042bfe9c879d-dmarc-requ...@listserv.ua.edu> wrote:
> 
> On Sun, 19 Feb 2023 13:12:58 -0500, Steve Thompson wrote:
> 
>> This is a test to see if my IP is still being blocked.
>> 
> Also, perhaps first, try: .
> 
> -- 
> gil
> 
> --
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Re: Test

[Steve Thompson]

Tried it and the problem specifically seems to be with Marist. 
I've run into this before. Have to wait until Monday to get them 
on the phone.


Steve Thompson

On 2/19/2023 2:40 PM, Paul Gilmartin wrote:

On Sun, 19 Feb 2023 13:12:58 -0500, Steve Thompson wrote:


This is a test to see if my IP is still being blocked.


Also, perhaps first, try: .



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Re: How long for an experiened z/OS sysprog to come up to speed on a new environment?

[Rob Schramm]

I agree with Brian.  It really depends on what you need done.  But start
with

1) where or how is syslog, stc output and jobs archived - this is nice
2) what are the smf jobs - also nice
3) hope for SDSF
4) hope for the correct access as a sysprog
5) hmc access
6) doc if it exists

Most everything can be figured out if you have this stuff.

At this point you should be able to drop in and help.  If you can't..
well.. most of the people I see on the list could do it..  they might
complain.. but given a terrible turn over for a system..  who wouldn't.

My 2(of whatever diminutive denomination you would like to use)

Rob

Ps Most of the rest can be figured out.. tools/JCL can be downloaded



On Sat, Feb 18, 2023, 19:58 Seymour J Metz  wrote:

> I've been able to be productive on the first day for things that didn't
> require institutional knowledge, but I've never picked up all of the non
> technical things anywhere near that quickly. I've also never taken as long
> as 6 months. But if the installation is a real mare's nest, all bets are
> off. YMMV.
>
> In general, I can learn a new language or a new OS more quickly than a new
> shop. Search for "dusty card deck".
>
>
> --
> Shmuel (Seymour J.) Metz
> http://mason.gmu.edu/~smetz3
>
> 
> From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf
> of Mark Zelden [m...@mzelden.com]
> Sent: Friday, February 17, 2023 6:35 PM
> To: IBM-MAIN@LISTSERV.UA.EDU
> Subject: Re: How long for an experiened z/OS sysprog to come up to speed
> on a new environment?
>
> Wow!  I think I'm pretty good and I would never say "1 day".   Even back
> when I was consulting
> full time at different small-ish clients it normally took a few days to
> get into the groove and figure out
> the local environment.  And that's with bringing all my own tools to help
> figure things out
> because they are rarely documented well as someone wrote. Even if things
> are documented,
> each site has naming conventions, processes and procedures that are
> unique. Figuring out and
> learning all the red tape takes longer than one day!  Back at that time I
> did a lot of jumping
> around to different clients there were usually local sysprogs around and
> they didn't want to
> help a consultant anyway.  So someone helping / volunteering information
> would make it a
> bit easier.  I still run into that today with people that think it is job
> security to share information
> or purposely don't document something.  I always felt it was my duty and
> it also let me
> move onto other things if someone could do what I was doing easy enough
> with proper
> documentation.
>
> Today, I work in an environment with 8 sysplexes, 30 LPARs, different
> standards for things
> in different sysplexes.  I've often wondered how long it would take a good
> experienced
> sysprog to be productive in it.  Not a "superstar".   What I deal with is
> "experienced"
> off shore resources that typically have 6-8 years of z/OS system
> programming and
> even with a ton of documentation about everything they still aren't
> productive at all
> for 6 months and it takes another 6 months before they're doing real
> work.  I'm not
> talking about being able to do parmlib APF and LNKLST updates.  I'm
> referring to
> being able to install, configure and roll out software upgrades (not just
> installing
> PTFs) across a large complex environment without breaking something. And
> hardware?  Forget it... they don't have a clue.
>
> And my comments above refer to "OS" system programming.  Other areas like
> CICS, DB2, MQ, Network have similar challenges but the local learning
> curve is
> probably half or less than half.
>
> Regards,
>
> Mark
> --
> Mark Zelden - Zelden Consulting Services - z/OS, OS/390 and MVS
> ITIL v3 Foundation Certified
> mailto:m...@mzelden.com
> Mark's MVS Utilities:
> http://secure-web.cisco.com/1omHWGxIkiiMSX-BcfoSVGoO99e23DSy9x98OyPh1DcTN24ve7mVeOQFWQh40PrhekHuuLemMeR8pdcoGO6Yl3H-aB7nZwjs3UCaGGdQZVrrkl8lNHNamcjrCmT63aAiAmZ34T38nQOJLiKfGaovT5DK8alcAfVBFYQi9Wn3WTRuIJtnXQ0qKdyMqjK3wBl7DmMQobkelwp9CsYIGSPKbPC_mrMNigfarMjjFiukLOseNsCcktKRnrYOCLTktEWtF3As35enhjqkzaSZgEDtd1cIlFk2SiHree05AV71zd-K2t61IfzjzntxcTgqAT-QAeZb1wJFcOpC0Y17TieYjp0OFjCliG7eJgVfZpeDSCQ6HnvkgeP17AjsQ-UfE6x8H-617Bbdqxu5mrYoDVcBnISVjjM5RQ11StSarp-qGgw4/http%3A%2F%2Fwww.mzelden.com%2Fmvsutil.html
>
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Re: How long for an experiened z/OS sysprog to come up to speed on a new environment?

[Jeremy Nicoll]

On Sun, 19 Feb 2023, at 22:33, Rob Schramm wrote:

> Ps Most of the rest can be figured out.. tools/JCL can be downloaded

Do all sites actually let you bring in your own tools, sample JCL etc?  How 
about - say - assembler source?  It seems to me that some places might 
view that as a security risk.  And how, if you develop any new samples/tools
at one site do you get them out afterwards?


Never mind moving to a new site, how much less productive does anyone think
they would be if one day they suddenly had no access to their own datasets
(and let's say those of colleagues, as well)?

I know that when I last worked I hardly ever wrote any JCL etc from scratch.  I
looked for my own prior examples.  If I had none, I browsed my immediate
colleagues' PDSes.

-- 
Jeremy Nicoll - my opinions are my own.

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Re: How long for an experiened z/OS sysprog to come up to speed on a new environment?

[Beverly Caldwell]

I would answer your questions if knew who you were and why you were asking!
But yes it has never been a problem for me. Sometimes takes a little
deviousness to make the transfer work.
These people think they are so smart but there is usually a way round their
little schemes.

On Sun, Feb 19, 2023, 3:52 PM Jeremy Nicoll 
wrote:

> On Sun, 19 Feb 2023, at 22:33, Rob Schramm wrote:
>
> > Ps Most of the rest can be figured out.. tools/JCL can be downloaded
>
> Do all sites actually let you bring in your own tools, sample JCL etc?
> How
> about - say - assembler source?  It seems to me that some places might
> view that as a security risk.  And how, if you develop any new
> samples/tools
> at one site do you get them out afterwards?
>
>
> Never mind moving to a new site, how much less productive does anyone think
> they would be if one day they suddenly had no access to their own datasets
> (and let's say those of colleagues, as well)?
>
> I know that when I last worked I hardly ever wrote any JCL etc from
> scratch.  I
> looked for my own prior examples.  If I had none, I browsed my immediate
> colleagues' PDSes.
>
> --
> Jeremy Nicoll - my opinions are my own.
>
> --
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Re: How long for an experiened z/OS sysprog to come up to speed on a new environment?

[Seymour J Metz]

Tools? That's something to discuss up front. Not just ownership, but whether to 
share.

JCL? Sharing is fine if your colleagues understand "as is".

I'm most comfortable when sharing is the norm, but their shop, their rules.


From: IBM Mainframe Discussion List  on behalf of 
Jeremy Nicoll 
Sent: Sunday, February 19, 2023 5:51 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: How long for an experiened z/OS sysprog to come up to speed on a 
new environment?

On Sun, 19 Feb 2023, at 22:33, Rob Schramm wrote:

> Ps Most of the rest can be figured out.. tools/JCL can be downloaded

Do all sites actually let you bring in your own tools, sample JCL etc?  How
about - say - assembler source?  It seems to me that some places might
view that as a security risk.  And how, if you develop any new samples/tools
at one site do you get them out afterwards?


Never mind moving to a new site, how much less productive does anyone think
they would be if one day they suddenly had no access to their own datasets
(and let's say those of colleagues, as well)?

I know that when I last worked I hardly ever wrote any JCL etc from scratch.  I
looked for my own prior examples.  If I had none, I browsed my immediate
colleagues' PDSes.

--
Jeremy Nicoll - my opinions are my own.

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Re: Test

[Seymour J Metz]

My guess is that WYKR has an MTA in a bad neighborhood. If you send me a e-mail 
offline I will check on who the relevant parties are.


From: IBM Mainframe Discussion List  on behalf of 
Steve Thompson 
Sent: Sunday, February 19, 2023 4:45 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Test

Tried it and the problem specifically seems to be with Marist.
I've run into this before. Have to wait until Monday to get them
on the phone.

Steve Thompson

On 2/19/2023 2:40 PM, Paul Gilmartin wrote:
> On Sun, 19 Feb 2023 13:12:58 -0500, Steve Thompson wrote:
>
>> This is a test to see if my IP is still being blocked.
>>
> Also, perhaps first, try: 
> .
>

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Re: How long for an experiened z/OS sysprog to come up to speed on a new environment?

[Grant Taylor]

On 2/19/23 4:27 PM, Beverly Caldwell wrote:
But yes it has never been a problem for me. Sometimes takes a little 
deviousness to make the transfer work.


These people think they are so smart but there is usually a way round 
their little schemes.


I feel like this flies in the face of security policies that some 
organizations put in place.  What's more is that trying to circumvent 
the stated policy is often sufficient violation to become an HR ~> 
employment problem.


You should never have to try, or even attempt, to get around something.

You should have blessing and an approved method to bring something in.

If someone violates this precept to bring something in, how do you know 
that they won't also violate this precept to take something out?




--
Grant. . . .
unix || die

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Re: How long for an experiened z/OS sysprog to come up to speed on a new environment?

[Beverly Caldwell]

Oh dear.

On Sun, Feb 19, 2023, 5:03 PM Grant Taylor <
023065957af1-dmarc-requ...@listserv.ua.edu> wrote:

> On 2/19/23 4:27 PM, Beverly Caldwell wrote:
> > But yes it has never been a problem for me. Sometimes takes a little
> > deviousness to make the transfer work.
> >
> > These people think they are so smart but there is usually a way round
> > their little schemes.
>
> I feel like this flies in the face of security policies that some
> organizations put in place.  What's more is that trying to circumvent
> the stated policy is often sufficient violation to become an HR ~>
> employment problem.
>
> You should never have to try, or even attempt, to get around something.
>
> You should have blessing and an approved method to bring something in.
>
> If someone violates this precept to bring something in, how do you know
> that they won't also violate this precept to take something out?
>
>
>
> --
> Grant. . . .
> unix || die
>
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Re: How long for an experiened z/OS sysprog to come up to speed on a new environment?

[Brian Westerman]

I carry everything around on a USB drive.  All JCL, manuals and source code and 
even load libraries that I might ever need.  Drives are very cheap and can hold 
much more data than I ever would need.  I rarely go anywhere without it 
because, well, it's attached to my keys.

Brian

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Re: How long for an experiened z/OS sysprog to come up to speed on a new environment?

[Laurence Chiu]

The last 3 environments I worked in the USB drives were locked down so you
could not use them. And if you did manage to, then your action would be
detected and could lead to disciplinary action. So for me at least, that is
not an option.

On Mon, Feb 20, 2023 at 1:53 PM Brian Westerman <
brian_wester...@syzygyinc.com> wrote:

> I carry everything around on a USB drive.  All JCL, manuals and source
> code and even load libraries that I might ever need.  Drives are very cheap
> and can hold much more data than I ever would need.  I rarely go anywhere
> without it because, well, it's attached to my keys.
>
> Brian
>
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Re: How long for an experiened z/OS sysprog to come up to speed on a new environment?

[Rob Schramm]

Okay on the subject of violating the code of security regarding external
utilities their shop their rules.  It is way better to fight that up front
than to get found out bringing something in.  Most shops I've worked on are
fairly easy about utility stuff however there are always the hard cases and
it's just not worth it.

One point about my post was - it's better to just count on the stuff that
you know is there rather than a non-existent guarantee that it's going to
be something that you can load onto it.  It's like learning vi for an AIX
system because you can't count on anything else.

Rob

On Sun, Feb 19, 2023, 19:56 Laurence Chiu  wrote:

> The last 3 environments I worked in the USB drives were locked down so you
> could not use them. And if you did manage to, then your action would be
> detected and could lead to disciplinary action. So for me at least, that is
> not an option.
>
> On Mon, Feb 20, 2023 at 1:53 PM Brian Westerman <
> brian_wester...@syzygyinc.com> wrote:
>
> > I carry everything around on a USB drive.  All JCL, manuals and source
> > code and even load libraries that I might ever need.  Drives are very
> cheap
> > and can hold much more data than I ever would need.  I rarely go anywhere
> > without it because, well, it's attached to my keys.
> >
> > Brian
> >
> > --
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Re: How long for an experiened z/OS sysprog to come up to speed on a new environment?

[Seymour J Metz]

It's a management issue, not a technical issue. If management gives a green 
light, any competent systems programmer should be able to import his personal 
tools. If management says no, then you have an obligation to respect their 
rules unless and until they change their minds.

The same issue applies to a DVD; with permission it's trivial; without 
permission, don't do it even though it's still trivial.


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3


From: IBM Mainframe Discussion List [IBM-MAIN@LISTSERV.UA.EDU] on behalf of 
Brian Westerman [brian_wester...@syzygyinc.com]
Sent: Sunday, February 19, 2023 7:52 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: How long for an experiened z/OS sysprog to come up to speed on a 
new environment?

I carry everything around on a USB drive.  All JCL, manuals and source code and 
even load libraries that I might ever need.  Drives are very cheap and can hold 
much more data than I ever would need.  I rarely go anywhere without it 
because, well, it's attached to my keys.

Brian

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Re: How long for an experiened z/OS sysprog to come up to speed on a new environment?

[Tom Brennan]

Ditto here.

On 2/19/2023 4:38 PM, Beverly Caldwell wrote:

Oh dear.



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Re: How long for an experiened z/OS sysprog to come up to speed on a new environment?

[Brian Westerman]

The USB is just for emergencies, I can download from my phone just as well, and 
from my NAS at home if necessary.  It seems odd to me to lock down a systems 
programmer from getting information that may save the site, but maybe it's just 
me.  I can honestly say that no one has ever told me I could not load my stuff, 
but honestly I can't remember ever asking anyone if they had a problem with me 
doing so.  

Most things I could probably just retype, especially when I have the data 
already displayable.  It seems very short sighted to "lock down" use of a tool 
that could very well fix a major problem, but again, maybe it's just that I 
have never asked anyone if they minded me fixing their site. :)

Brian

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Re: How long for an experiened z/OS sysprog to come up to speed on a new environment?

[Tom Brennan]

I think it's a matter of trust.  Right off, a company needs to trust 
that I'm honest, otherwise they shouldn't allow me anywhere near their 
datacenter or network.  But how can they trust that I'm reasonably 
competent in the areas I claim to be, and that I won't make mistakes 
that cause big problems?  That takes time or guesses or references or 
maybe just their gut instinct.  I don't know.


On 2/19/2023 9:52 PM, Brian Westerman wrote:

The USB is just for emergencies, I can download from my phone just as well, and 
from my NAS at home if necessary.  It seems odd to me to lock down a systems 
programmer from getting information that may save the site, but maybe it's just 
me.  I can honestly say that no one has ever told me I could not load my stuff, 
but honestly I can't remember ever asking anyone if they had a problem with me 
doing so.

Most things I could probably just retype, especially when I have the data already 
displayable.  It seems very short sighted to "lock down" use of a tool that 
could very well fix a major problem, but again, maybe it's just that I have never asked 
anyone if they minded me fixing their site. :)

Brian

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