Re: Abend 052-512

2019-02-10 Thread Peter Relson
You would not get 052-512 on AXSET.

It is issued only on ETCON.

Peter Relson
z/OS Core Technology Design


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Re: Abend 052-512

2019-02-10 Thread esst...@juno.com
 I can't provide the entire program due to some contractual agreements.
So here is what I can show.There is only one AXSET and one LXRES macro in this 
module.ANd yes the Dump has AXSET using R0, I did subsequently change it to use 
R1. *---*  
*   Switch To Supervisor State 
*---*  
 MODESET MODE=SUP  
*---*  
*   Set the Address Space AX to a value of 1   
*---*  
 MVC   XMSFUNC,=CL8'AXSET   '  
 LAR1,1Request AX Value of 1   
 AXSET AX=(R1) 
 STR15,RETURNCODE  Save Return Code From XMS Call
 BRAS  R14,COMPLETION_CODE_CHECK 
 *---*
 *   Reserve a Extended System LX 
 *---*
  MVC   XMSFUNC,=CL8'LXRES   '
  MVC   XMSZLIST,LXRES00Reentrant LXRES Parameter List
  LHI   R0,1Request 1 LX  
  STR0,LXCOUNT  Request 1 LX  
  LXRES ELXLIST=ELXL,SYSTEM=YES,REUSABLE=YES,LXSIZE=23,** 
MF=(E,XMSZLIST)   
  STR15,RETURNCODE  Save Return Code From XMS Call
  BRAS  R14,COMPLETION_CODE_CHECK 
 *---*
 *   Create an Entry Table that defines the PC Service Routines   
 *---*
  MVC   XMSFUNC,=CL8'ETCRE   '
  L R0,ETDESC@  Entry Description Table Address   
.
.
Here Are the Registers at Abend
.
   SYSTEM COMPLETION CODE=052  REASON CODE=0512
TIME=08.59.14  SEQ=04271  CPU=  ASID=001C  
PSW AT TIME OF ERROR  070C   8AD08E9A  ILC 2  INTC 0D  
  NO ACTIVE MODULE FOUND - PRIMARY NOT EQUAL TO HOME   
  NAME=UNKNOWN 
  DATA AT PSW  0AD08E94 - C02818F8  0A0DA788  18FB 
  AR/GR 0: 006FDD40/_0AD099C0   1: /_84052000  
2: /_   3: /_FF03  
4: /_00FDC400   5: /_  
6: /_00FF4500   7: /_00FB9100  
8: /_0512   9: /_0BE0  
A: /_00FBBD00   B: /_00FB9100  
C: /_0AD099C0   D: /_7FF97378  
E: 0103/_8AD08E8A   F: 0102/0002_0512  
END OF SYMPTOM DUMP 
.
.
.
.
>From the bottom of the Trace -  I found the last SVCE
then I located the previous PC instruction
.
.
 0009 006F8188  I/O  00258 _0AD14996  00C04007 738DF028 0C00  00
   07045000 8000   00F2AFC8 0042  00
 001C 022BBD00  SRB_01084868  001C 0266EF00 0266EF2C
   0704 8000  006FDD40 80   
 001C 022BBD00  SSRV78  80C4ADA8  0050E503 1000 7F538000
  001C  
 001C 022BBD00  SSRV 2  80FEE77C  006F8168 7F00 
    
 001C 006FF1C0  DSP_0AD04F3E   00011000 C17D  00
   0784 8000
 001C 006FF1C0  PC ...   8  0AD04992  4 
 001C 006FF1C0  DSP_0AD07650   0001 0AD01440  00
   0704 8000
 001C 006FF1C0  SSRV78  8AD076BE  FF02 0888 7FF97378
  0002  
 001C 006FF1C0  SSRV78  8AD08E72  FF03 0888 7FF97378
  0002 
 001C 006FF1C0 *SVCE 

Re: Abend 052-512

2019-02-10 Thread Joe Monk
Problem 1: Youre not setting R13 to the 18 word save area required by the
macro...
Input register information
The AXSET macro is sensitive to the SYSSTATE macro with the OSREL=ZOSV1R6
parameter

   - If the caller has issued the SYSSTATE macro with the OSREL=ZOSV1R6
   parameter (Version 1 Release 6 of z/OSĀ® or later) before issuing the AXSET
   macro, the caller does not have to place any information into any general
   purpose register (GPR) unless using it in register notation for a
   particular parameter, or using it as a base register.
   - Otherwise, the caller must ensure that the following general purpose
   register contains the specified information:*Register**Contents*13The
   address of an 18-word save area

Output register information

After the caller issues the macro, the macro might use some registers as
work registers or might change the contents of some registers. When the
macro returns control to the caller, the contents of these registers are
not the same as they were before the macro was issued. Therefore, if the
caller depends on these registers containing the same value before and
after issuing the macro, the caller must save these registers before
issuing the macro and restore them after the system returns control.
When control returns to the caller, the general purpose registers (GPRs)
contain: *Register**Contents*0Bits 0-15 contain zeros; bits 16-31 contain
the replaced Authority Index (AX)1Used as a work register by the macro2-13
Unchanged14Used as a work register by the macro15Return code
Abend 052-512 is that the linkage register is already in use. R2 points to
the incorrect LX. So, you need to check your call to the macro ...

In this case, R2 is pointing to zero. Chances are it is because youre not
supplying the save area. Otherwise, the abend is telling you that R0 is not
valid...

Joe



On Sun, Feb 10, 2019 at 8:36 AM esst...@juno.com  wrote:

>  I can't provide the entire program due to some contractual agreements.
> So here is what I can show.There is only one AXSET and one LXRES macro in
> this module.ANd yes the Dump has AXSET using R0, I did subsequently change
> it to use R1.
> *---*
> *   Switch To Supervisor State
> *---*
>  MODESET MODE=SUP
> *---*
> *   Set the Address Space AX to a value of 1
> *---*
>  MVC   XMSFUNC,=CL8'AXSET   '
>  LAR1,1Request AX Value of 1
>  AXSET AX=(R1)
>  STR15,RETURNCODE  Save Return Code From XMS Call
>  BRAS  R14,COMPLETION_CODE_CHECK
>  *---*
>  *   Reserve a Extended System LX
>  *---*
>   MVC   XMSFUNC,=CL8'LXRES   '
>   MVC   XMSZLIST,LXRES00Reentrant LXRES Parameter List
>   LHI   R0,1Request 1 LX
>   STR0,LXCOUNT  Request 1 LX
>   LXRES ELXLIST=ELXL,SYSTEM=YES,REUSABLE=YES,LXSIZE=23,**
> MF=(E,XMSZLIST)
>   STR15,RETURNCODE  Save Return Code From XMS Call
>   BRAS  R14,COMPLETION_CODE_CHECK
>  *---*
>  *   Create an Entry Table that defines the PC Service Routines
>  *---*
>   MVC   XMSFUNC,=CL8'ETCRE   '
>   L R0,ETDESC@  Entry Description Table Address
> .
> .
> Here Are the Registers at Abend
> .
>SYSTEM COMPLETION CODE=052  REASON CODE=0512
>
> TIME=08.59.14  SEQ=04271  CPU=  ASID=001C
>
> PSW AT TIME OF ERROR  070C   8AD08E9A  ILC 2  INTC 0D
>
>   NO ACTIVE MODULE FOUND - PRIMARY NOT EQUAL TO HOME
>
>   NAME=UNKNOWN
>
>   DATA AT PSW  0AD08E94 - C02818F8  0A0DA788  18FB
>
>   AR/GR 0: 006FDD40/_0AD099C0   1: /_84052000
>
> 2: /_   3: /_FF03
>
> 4: /_00FDC400   5: /_
>
> 6: /_00FF4500   7: /_00FB9100
>
> 8: /_0512   9: /_0BE0
>
> A: /_00FBBD00   B: /_00FB9100
>
> C: /_0AD099C0   D: /_7FF97378
>
> E: 0103/_8AD08E8A   F: 0102/0002_0512
>
> END OF SYMPTOM DUMP
> .
> .
> .
> .
> From the bottom of the Trace -  I found the last SVCE
> then I located the previous PC instruction
> .
> .
>  0009 006F8188  I/O  00258 _0AD14996  00C04007 738DF028
> 0C00  00
>

Re: Abend 052-512

2019-02-10 Thread Joe Monk
Peter,

AXSET specifically says it is subject to 052...

ABEND codes

   - 052
   - 053


https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/com.ibm.zos.v2r3.ieaa100/iea3a1_AXSET_Set_authorization_index.htm

Joe

On Sun, Feb 10, 2019 at 8:12 AM Peter Relson  wrote:

> You would not get 052-512 on AXSET.
>
> It is issued only on ETCON.
>
> Peter Relson
> z/OS Core Technology Design
>
>
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EDT tokens while IODFing

2019-02-10 Thread Peter
Hi

This is just a general question

I was building a production IODF and received warning message about not
assigning tokens to EDTs.

How significant are these tokens ? How do they really work ?

Peter

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Re: Abend 052-512

2019-02-10 Thread Joe Monk
One other thing ... The AX used in the AXSET macro must have been
previously AXRES'd prior to being used in the AXSET macro

"The caller can use the value returned by the system as an AX through the
AXSET macro, or as an extended authorization index (EAX) through the ETDEF,
ETCRE, and ETCON macros. The AX value associated with a program determines
whether that program is permitted to issue the PT instruction with another
address space as the target, and/or set another address space as its
secondary address space through the SSAR instruction. The EAX value
determines whether a program running with the EAX can access data in
another address space through a private access list entry"

Joe

On Sun, Feb 10, 2019 at 8:36 AM esst...@juno.com  wrote:

>  I can't provide the entire program due to some contractual agreements.
> So here is what I can show.There is only one AXSET and one LXRES macro in
> this module.ANd yes the Dump has AXSET using R0, I did subsequently change
> it to use R1.
> *---*
> *   Switch To Supervisor State
> *---*
>  MODESET MODE=SUP
> *---*
> *   Set the Address Space AX to a value of 1
> *---*
>  MVC   XMSFUNC,=CL8'AXSET   '
>  LAR1,1Request AX Value of 1
>  AXSET AX=(R1)
>  STR15,RETURNCODE  Save Return Code From XMS Call
>  BRAS  R14,COMPLETION_CODE_CHECK
>  *---*
>  *   Reserve a Extended System LX
>  *---*
>   MVC   XMSFUNC,=CL8'LXRES   '
>   MVC   XMSZLIST,LXRES00Reentrant LXRES Parameter List
>   LHI   R0,1Request 1 LX
>   STR0,LXCOUNT  Request 1 LX
>   LXRES ELXLIST=ELXL,SYSTEM=YES,REUSABLE=YES,LXSIZE=23,**
> MF=(E,XMSZLIST)
>   STR15,RETURNCODE  Save Return Code From XMS Call
>   BRAS  R14,COMPLETION_CODE_CHECK
>  *---*
>  *   Create an Entry Table that defines the PC Service Routines
>  *---*
>   MVC   XMSFUNC,=CL8'ETCRE   '
>   L R0,ETDESC@  Entry Description Table Address
> .
> .
> Here Are the Registers at Abend
> .
>SYSTEM COMPLETION CODE=052  REASON CODE=0512
>
> TIME=08.59.14  SEQ=04271  CPU=  ASID=001C
>
> PSW AT TIME OF ERROR  070C   8AD08E9A  ILC 2  INTC 0D
>
>   NO ACTIVE MODULE FOUND - PRIMARY NOT EQUAL TO HOME
>
>   NAME=UNKNOWN
>
>   DATA AT PSW  0AD08E94 - C02818F8  0A0DA788  18FB
>
>   AR/GR 0: 006FDD40/_0AD099C0   1: /_84052000
>
> 2: /_   3: /_FF03
>
> 4: /_00FDC400   5: /_
>
> 6: /_00FF4500   7: /_00FB9100
>
> 8: /_0512   9: /_0BE0
>
> A: /_00FBBD00   B: /_00FB9100
>
> C: /_0AD099C0   D: /_7FF97378
>
> E: 0103/_8AD08E8A   F: 0102/0002_0512
>
> END OF SYMPTOM DUMP
> .
> .
> .
> .
> From the bottom of the Trace -  I found the last SVCE
> then I located the previous PC instruction
> .
> .
>  0009 006F8188  I/O  00258 _0AD14996  00C04007 738DF028
> 0C00  00
>07045000 8000   00F2AFC8
> 0042  00
>  001C 022BBD00  SRB_01084868  001C 0266EF00
> 0266EF2C
>0704 8000  006FDD40 80
>
>  001C 022BBD00  SSRV78  80C4ADA8  0050E503 1000
> 7F538000
>   001C
>
>  001C 022BBD00  SSRV 2  80FEE77C  006F8168 7F00
> 
>   
>
>  001C 006FF1C0  DSP_0AD04F3E   00011000
> C17D  00
>0784 8000
>
>  001C 006FF1C0  PC ...   8  0AD04992  4
>
>  001C 006FF1C0  DSP_0AD07650   0001
> 0AD01440  00
>0704 8000
>
>  001C 006FF1C0  SSRV78  8AD076BE  FF02 0888
> 7FF97378
>   0002
>
>  001C 006FF1C0  SSRV78  8AD08E72  FF03 0888
> 7FF97378
>   0002
>   001C 006FF1C0 *S

What is the bit that causes the bypassing of dataset ENQ

2019-02-10 Thread Charles Mills
IIRC there is a bit that causes dataset allocation to bypass the normal ENQ.
It is used, for example, by backup programs.

 

Can anyone share the name of the bit flag? I searched TCB, ASCB and JSCB.

 

Don't worry, I'm not going to use it willy-nilly. I'm not going to code it
at all. It is for a presentation I am putting together.

 

Thanks,

Charles

 


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Re: What is the bit that causes the bypassing of dataset ENQ

2019-02-10 Thread Seymour J Metz
Put the program in the PPT with the proper attributes.


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http://mason.gmu.edu/~smetz3


From: IBM Mainframe Discussion List  on behalf of 
Charles Mills 
Sent: Sunday, February 10, 2019 1:50 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: What is the bit that causes the bypassing of dataset ENQ

IIRC there is a bit that causes dataset allocation to bypass the normal ENQ.
It is used, for example, by backup programs.



Can anyone share the name of the bit flag? I searched TCB, ASCB and JSCB.



Don't worry, I'm not going to use it willy-nilly. I'm not going to code it
at all. It is for a presentation I am putting together.



Thanks,

Charles




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Re: Abend 052-512

2019-02-10 Thread Jim Mulder
052, yes.  052-512, no. 

The original poster should use the SYSTRACE in a dump
of the 052 abend, and find the PC for ETCON which precedes the 
*SVCED  for the 052 abend,  to see who did the failing ETCON. 

Jim Mulder z/OS Diagnosis, Design, Development, Test  IBM Corp. 
Poughkeepsie NY

"IBM Mainframe Discussion List"  wrote on 
02/10/2019 10:01:22 AM:

> From: "Joe Monk" 
> To: IBM-MAIN@LISTSERV.UA.EDU
> Date: 02/10/2019 02:57 PM
> Subject: Re: Abend 052-512
> Sent by: "IBM Mainframe Discussion List" 
> 
> Peter,
> 
> AXSET specifically says it is subject to 052...
> 
> ABEND codes
> 
>- 052
>- 053
> 
> 
> https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.3.0/
> com.ibm.zos.v2r3.ieaa100/iea3a1_AXSET_Set_authorization_index.htm
> 
> Joe
> 
> On Sun, Feb 10, 2019 at 8:12 AM Peter Relson  wrote:
> 
> > You would not get 052-512 on AXSET.
> >
> > It is issued only on ETCON.
> >
> > Peter Relson
> > z/OS Core Technology Design



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Re: Abend 052-512

2019-02-10 Thread Binyamin Dissen
You are making very bad assumptions.

Looking at your mini-dump I can see that an ETCON is failing. Not the AXSET.
Why did you assume that the AXSET failed?

In the small section of code you provided I do not see initialization of the
LXRES list form. I presume you equally failed to initialize the list form of
any of your macros.

If you have difficulty providing the code, make a simple test case without any
proprietary information and see if it fails then.

On Sun, 10 Feb 2019 14:34:05 GMT "esst...@juno.com"  wrote:

:> I can't provide the entire program due to some contractual agreements.
:>So here is what I can show.There is only one AXSET and one LXRES macro in 
this module.ANd yes the Dump has AXSET using R0, I did subsequently change it 
to use R1. 
*---*  
:>*   Switch To Supervisor State 
:>*---*  
:> MODESET MODE=SUP  
:>*---*  
:>*   Set the Address Space AX to a value of 1   
:>*---*  
:> MVC   XMSFUNC,=CL8'AXSET   '  
:> LAR1,1Request AX Value of 1   
:> AXSET AX=(R1) 
:> STR15,RETURNCODE  Save Return Code From XMS Call
:> BRAS  R14,COMPLETION_CODE_CHECK 
:> *---*
:> *   Reserve a Extended System LX 
:> *---*
:>  MVC   XMSFUNC,=CL8'LXRES   '
:>  MVC   XMSZLIST,LXRES00Reentrant LXRES Parameter List
:>  LHI   R0,1Request 1 LX  
:>  STR0,LXCOUNT  Request 1 LX  
:>  LXRES ELXLIST=ELXL,SYSTEM=YES,REUSABLE=YES,LXSIZE=23,** 
:>MF=(E,XMSZLIST)   
:>  STR15,RETURNCODE  Save Return Code From XMS Call
:>  BRAS  R14,COMPLETION_CODE_CHECK 
:> *---*
:> *   Create an Entry Table that defines the PC Service Routines   
:> *---*
:>  MVC   XMSFUNC,=CL8'ETCRE   '
:>  L R0,ETDESC@  Entry Description Table Address   
:>.
:>.
:>Here Are the Registers at Abend
:>.
:>   SYSTEM COMPLETION CODE=052  REASON CODE=0512   
 
:>TIME=08.59.14  SEQ=04271  CPU=  ASID=001C 
 
:>PSW AT TIME OF ERROR  070C   8AD08E9A  ILC 2  INTC 0D 
 
:>  NO ACTIVE MODULE FOUND - PRIMARY NOT EQUAL TO HOME  
 
:>  NAME=UNKNOWN
 
:>  DATA AT PSW  0AD08E94 - C02818F8  0A0DA788  18FB
 
:>  AR/GR 0: 006FDD40/_0AD099C0   1: /_84052000 
 
:>2: /_   3: /_FF03 
 
:>4: /_00FDC400   5: /_ 
 
:>6: /_00FF4500   7: /_00FB9100 
 
:>8: /_0512   9: /_0BE0 
 
:>A: /_00FBBD00   B: /_00FB9100 
 
:>C: /_0AD099C0   D: /_7FF97378 
 
:>E: 0103/_8AD08E8A   F: 0102/0002_0512 
 
:>END OF SYMPTOM DUMP 
:>.
:>.
:>.
:>.
:>From the bottom of the Trace -  I found the last SVCE
:>then I located the previous PC instruction
:>.
:>.
:> 0009 006F8188  I/O  00258 _0AD14996  00C04007 738DF028 0C00  
00
:>   07045000 8000   00F2AFC8 0042  
00
:> 001C 022BBD00  SRB_01084868  001C 0266EF00 0266EF2C  
  
:>   0704 8000  006FDD40 80 
  
:> 001C 022BBD00  SSRV78  80C4ADA8  0050E503 1000 7F538000  
  
:>  001C
  
:> 001C 022BBD00  SSRV 2  80FEE77C  006F8168 7F00   
  
:>  
  
:> 001C 006FF1C0  DSP_0AD04F3E   00011000 C17D 

Re: XMIT Manager and CP1047 (or rather CP1046.9921875)

2019-02-10 Thread Seymour J Metz
Every release that I have ever used has had issues with translation, ever since 
the original ASCII support for tape.

Do you mean UTF-8 or UTF-EBCDIC (https://en.wikipedia.org/wiki/UTF-EBCDIC)?


--
Shmuel (Seymour J.) Metz
http://mason.gmu.edu/~smetz3


From: IBM Mainframe Discussion List  on behalf of 
Robert Prins 
Sent: Saturday, February 9, 2019 7:30 PM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: XMIT Manager and CP1047 (or rather CP1046.9921875)

Over the last week or so I've been having a discussion with Denis Molony about
his XmitApp, a platform-agnostic, it's written in Java, viewer for XMIT files,
see 


As is, it (currently) only shows the contents of the xmit file in one of the
panels, and he's hit a snag. One of my PDS's he's using contains text that comes
from uploaded-to-z/OS UTF-8 encoded text (which basically means all UTF-8
characters are mangled beyond recognition on z/OS). It's processed on z/OS, and
the results, also containing UTF-8 encoded text is downloaded to Windoze
(unmangling the mangled mess again), but XmitApp using CP1047 screws up
codepoints 0x15 and 0x25, and if you take a look at those two code points on
,
 shiver...

0x15 is NL (Newline)  (Unicode 0085)
0x25 is LF (Linefeed) (Unicode 000A)

I never realised that EBCDIC had two of the same, just different...

Extract the files with Neil Johnston-Ward's XMIT Manager from the cbttape.org
site @ 
,
 and the UTF-8 encoded characters
show up OK. Do it with the official CP1047 and they don't.

So load XMIT Manager.exe into a hex-editor, I'm (still) using HxD 1.7.7.0 from
,
 and look for the translate table NJW uses (just
do a find for 'abcdef') and you'll see that he has swapped the ASCII characters
for the 0x15 and 0x25 code points from those in the "official" CP1047...

Denis has found an APAR dating back to 2010,
,
 that seems to
confirm that, for Java in mixed environments, i.e. z/OS vs little white boxes,
NJW is correct in swapping them.

Can anyone provide any more insights? For what it's worth, I'm currently
restricted to doing the round-trip transfers using IND$FILE (Upload as ASCII,
download of XMIT (obviously) binary), but I would appreciate if anyone can check
what happens if they are done using FTP or the WSA. I've attached, in the hope
it survives, utf-8.zip

Re: Abend 052-512

2019-02-10 Thread esst...@juno.com
.Thanks to everyone who responded
.
First My Register 13 is pointed to a proper save area, It also points 
to a Getmain area.
.
.
In my original post I assumed that the ABend occurred on the AXSET,
I suspected that since I did not see and log records (WTO).
After each macro is issued, I invoke a routine which post the return code from 
that macro.Since I did not see any messages written to the Job Log I "assumed" 
the abend occurred on AXSET.
.
It turns out Binyamin Dissen, Peter Relson and Jim Mulder were correct.
The abend did occur on ETCON.
.
Using the Address again from the PC trace entry, I scanned further
back in the code and coordinated it with assembler listing.
Yes it was on the ETCON routine.
.
Looking more carefully at ETCON I saw my mistake.
I original wrote ETCON LXLIST=ELXL,TKLIST=TKL,MF=(E,XMSZLIST) 
.
It should have been -
ETCON ELXLIST=ELXL,TKLIST=TKL,MF=(E,XMSZLIST)
.
.
Now I see all Return codes posted as 00.
ANd I see the LX Count, LX Seq # and LX Value.
.
.
Thank You  

-- Original Message --
From: Binyamin Dissen 
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: Re: Abend 052-512
Date: Sun, 10 Feb 2019 22:11:00 +0200

You are making very bad assumptions.

Looking at your mini-dump I can see that an ETCON is failing. Not the AXSET.
Why did you assume that the AXSET failed?

In the small section of code you provided I do not see initialization of the
LXRES list form. I presume you equally failed to initialize the list form of
any of your macros.

If you have difficulty providing the code, make a simple test case without any
proprietary information and see if it fails then.

On Sun, 10 Feb 2019 14:34:05 GMT "esst...@juno.com"  wrote:

:> I can't provide the entire program due to some contractual agreements.
:>So here is what I can show.There is only one AXSET and one LXRES macro in 
this module.ANd yes the Dump has AXSET using R0, I did subsequently change it 
to use R1. 
*---*  
:>*   Switch To Supervisor State 
:>*---*  
:> MODESET MODE=SUP  
:>*---*  
:>*   Set the Address Space AX to a value of 1   
:>*---*  
:> MVC   XMSFUNC,=CL8'AXSET   '  
:> LAR1,1Request AX Value of 1   
:> AXSET AX=(R1) 
:> STR15,RETURNCODE  Save Return Code From XMS Call
:> BRAS  R14,COMPLETION_CODE_CHECK 
:> *---*
:> *   Reserve a Extended System LX 
:> *---*
:>  MVC   XMSFUNC,=CL8'LXRES   '
:>  MVC   XMSZLIST,LXRES00Reentrant LXRES Parameter List
:>  LHI   R0,1Request 1 LX  
:>  STR0,LXCOUNT  Request 1 LX  
:>  LXRES ELXLIST=ELXL,SYSTEM=YES,REUSABLE=YES,LXSIZE=23,** 
:>MF=(E,XMSZLIST)   
:>  STR15,RETURNCODE  Save Return Code From XMS Call
:>  BRAS  R14,COMPLETION_CODE_CHECK 
:> *---*
:> *   Create an Entry Table that defines the PC Service Routines   
:> *---*
:>  MVC   XMSFUNC,=CL8'ETCRE   '
:>  L R0,ETDESC@  Entry Description Table Address   
:>.
:>.
:>Here Are the Registers at Abend
:>.
:>   SYSTEM COMPLETION CODE=052  REASON CODE=0512   
 
:>TIME=08.59.14  SEQ=04271  CPU=  ASID=001C 
 
:>PSW AT TIME OF ERROR  070C   8AD08E9A  ILC 2  INTC 0D 
 
:>  NO ACTIVE MODULE FOUND - PRIMARY NOT EQUAL TO HOME  
 
:>  NAME=UNKNOWN
 
:>  DATA AT PSW  0AD08E94 - C02818F8  0A0DA788  18FB
 
:>  AR/GR 0: 006FDD40/_0AD099C0   1: /_84052000 
 
:>2: /_   3: /_FF03 
 
:>4: /_00FDC400   5: /_ 
 
:>6: /_00FF4500   7: /_00FB9100 
 
:>8: /_0512   9: /_

Re: What is the bit that causes the bypassing of dataset ENQ

2019-02-10 Thread Charles Mills
A kind soul offline points out S99NORES.

(No wonder I couldn't find it in the TCB.)

Charles


-Original Message-
From: IBM Mainframe Discussion List [mailto:IBM-MAIN@LISTSERV.UA.EDU] On
Behalf Of Charles Mills
Sent: Sunday, February 10, 2019 10:51 AM
To: IBM-MAIN@LISTSERV.UA.EDU
Subject: What is the bit that causes the bypassing of dataset ENQ

IIRC there is a bit that causes dataset allocation to bypass the normal ENQ.
It is used, for example, by backup programs.

 

Can anyone share the name of the bit flag? I searched TCB, ASCB and JSCB.

 

Don't worry, I'm not going to use it willy-nilly. I'm not going to code it
at all. It is for a presentation I am putting together.

 

Thanks,

Charles

 


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Re: What is the bit that causes the bypassing of dataset ENQ

2019-02-10 Thread Walt Farrell
On Sun, 10 Feb 2019 14:08:15 -0800, Charles Mills  wrote:

>A kind soul offline points out S99NORES.
>
>(No wonder I couldn't find it in the TCB.)

It also would have helped if you'd said you were interested in -dynamic- data 
set allocation, rather than simply data set allocation. It changes the answer.

-- 
Walt

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Re: Hmc for z as a virtual appliance?

2019-02-10 Thread Timothy Sipples
Mike Schwab:
>What serial number does he use if he doesn't have a z## processor?
>He only wants to test with the HMC.

There's another important question, a technical question: how does he plug
an IBM Z/IBM LinuxONE Hardware Management Console (HMC) into a ZPDT?
Answer: He doesn't. The ZPDT does not provide any connectivity for a HMC.

So, to answer your question: if he wants a HMC, he will use an IBM Z or IBM
LinuxONE machine that he buys, leases, or (if someone is willing) borrows.
As the ZPDT redbook carefully explains, the ZPDT simply does not provide or
support a Hardware Management Console. To develop for, to test, and/or to
use a HMC, you need a HMC...a feature of IBM Z and IBM LinuxONE machines,
probably an IBM Z machine in this case since some HMC functions are only
associated with IBM Z machines.

There's no game or marketing trick here. The HMC cannot get anything done
without an IBM Z or IBM LinuxONE machine and all that it provides,
including the physical and logical interfaces that the HMC relies on.

IBM offers several IBM Z Trial Programs here:

https://www.ibm.com/it-infrastructure/z/resources/trial

If someone would like to put in a formal request (via RFE) for a Remote HMC
trial, I don't see any problem in asking. I have no idea how IBM would
respond to such a request, and I don't know if it's technically viable, but
it doesn't hurt to ask.


Timothy Sipples
IT Architect Executive, Industry Solutions, IBM Z & LinuxONE
E-Mail: sipp...@sg.ibm.com

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Re: Friday history query

2019-02-10 Thread Timothy Sipples
I'll guess the letter relates in some way to the IBM Data Processing
Division's Government, Education and Medical (GEM) Region. The GEM Region
was an IBM sales and marketing organization for about five years from 1966
to 1971. It catered to IBM customers in those industries and was
headquartered in Washington, D.C.

I sent some possible GEM Region-related leads to Curtis offline.


Timothy Sipples
IT Architect Executive, Industry Solutions, IBM Z & LinuxONE
E-Mail: sipp...@sg.ibm.com

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DEQ dynamically

2019-02-10 Thread Jake Anderson
Hi

Is it possible to deallocate a dataset without recycling address space.

The dataset is users one and for some reason I would like to know if we can
Dynamically remove it from allocation


Jake

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