RE: [PATCH v2 2/5] soc: visconti: Add Toshiba Visconti image processing accelerator common source
Hi Greg,
Thank you for your comments.
> -Original Message-
> From: Greg KH
> Sent: Monday, July 25, 2022 9:46 PM
> To: ishikawa yuji(石川 悠司 ○ＲＤＣ□ＡＩＴＣ○ＥＡ開)
>
> Cc: Rob Herring ; Hans Verkuil ;
> iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ)
> ; Jonathan Corbet ;
> Sumit Semwal ; Christian König
> ; linux-arm-ker...@lists.infradead.org;
> linux-ker...@vger.kernel.org; linux-me...@vger.kernel.org;
> dri-devel@lists.freedesktop.org; linaro-mm-...@lists.linaro.org
> Subject: Re: [PATCH v2 2/5] soc: visconti: Add Toshiba Visconti image
> processing accelerator common source
>
> On Fri, Jul 22, 2022 at 05:28:55PM +0900, Yuji Ishikawa wrote:
> > This commit adds common definitions shared among image processing
> > accelerator drivers for Toshiba Visconti SoCs.
>
> Please wrap your changelog text lines properly at 72 columns.
>
> And you need to provide a lot more information here as to what this is, it's
> not
> enough to be able to properly review this with just a single sentence.
>
I'll update changelog.
> >
> > Signed-off-by: Yuji Ishikawa
> > Reviewed-by: Nobuhiro Iwamatsu
> > ---
> > v1 -> v2:
> > - applied checkpatch.pl --strict
> > ---
> > drivers/soc/Kconfig | 1 +
> > drivers/soc/Makefile | 1 +
> > drivers/soc/visconti/Kconfig | 1 +
> > drivers/soc/visconti/Makefile | 6 +++
> > drivers/soc/visconti/ipa_common.c | 55 +++
> > drivers/soc/visconti/ipa_common.h | 18 +++
> > drivers/soc/visconti/uapi/ipa.h | 90
> +++
> > 7 files changed, 172 insertions(+)
> > create mode 100644 drivers/soc/visconti/Kconfig create mode 100644
> > drivers/soc/visconti/Makefile create mode 100644
> > drivers/soc/visconti/ipa_common.c create mode 100644
> > drivers/soc/visconti/ipa_common.h create mode 100644
> > drivers/soc/visconti/uapi/ipa.h
> >
> > diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig index
> > e8a30c4c5..c99139aa8 100644
> > --- a/drivers/soc/Kconfig
> > +++ b/drivers/soc/Kconfig
> > @@ -22,6 +22,7 @@ source "drivers/soc/tegra/Kconfig"
> > source "drivers/soc/ti/Kconfig"
> > source "drivers/soc/ux500/Kconfig"
> > source "drivers/soc/versatile/Kconfig"
> > +source "drivers/soc/visconti/Kconfig"
> > source "drivers/soc/xilinx/Kconfig"
> >
> > endmenu
> > diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile index
> > a05e9fbcd..455b993c2 100644
> > --- a/drivers/soc/Makefile
> > +++ b/drivers/soc/Makefile
> > @@ -28,4 +28,5 @@ obj-$(CONFIG_ARCH_TEGRA) += tegra/
> > obj-y += ti/
> > obj-$(CONFIG_ARCH_U8500) += ux500/
> > obj-$(CONFIG_PLAT_VERSATILE) += versatile/
> > +obj-$(CONFIG_ARCH_VISCONTI)+= visconti/
> > obj-y += xilinx/
> > diff --git a/drivers/soc/visconti/Kconfig
> > b/drivers/soc/visconti/Kconfig new file mode 100644 index
> > 0..8b1378917
> > --- /dev/null
> > +++ b/drivers/soc/visconti/Kconfig
> > @@ -0,0 +1 @@
> > +
> > diff --git a/drivers/soc/visconti/Makefile
> > b/drivers/soc/visconti/Makefile new file mode 100644 index
> > 0..8d710da08
> > --- /dev/null
> > +++ b/drivers/soc/visconti/Makefile
> > @@ -0,0 +1,6 @@
> > +# SPDX-License-Identifier: GPL-2.0
> > +#
> > +# Makefile for the Visconti specific device drivers.
> > +#
> > +
> > +obj-y += ipa_common.o
> > diff --git a/drivers/soc/visconti/ipa_common.c
> > b/drivers/soc/visconti/ipa_common.c
> > new file mode 100644
> > index 0..6345f33c5
> > --- /dev/null
> > +++ b/drivers/soc/visconti/ipa_common.c
> > @@ -0,0 +1,55 @@
> > +// SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
>
> Why is this dual-licensed? I have to ask, and also, have to see some sort of
> justification as to why this is needed. Doing dual-licensed kernel code is
> tough and a pain and we need to know that you, and your lawyers, understand
> the issues involved here.
>
I'll talk with development members.
>
> > +/* Toshiba Visconti Image Processing Accelerator Support
> > + *
> > + * (C) Copyright 2022 TOSHIBA CORPORATION
> > + * (C) Copyright 2022 Toshiba Electronic Devices & Storage
> > +Corporation */
> > +
> > +#include "ipa_common.h"
> > +
> > +int ipa_attach_dmabuf(struct device *dev, int fd, struct
> dma_buf_attachment **a,
> > + struct sg_table **s, dma_addr_t *addr, enum
> > +dma_data_direction dma_dir) {
> > + struct dma_buf_attachment *attachment;
> > + struct dma_buf *dmabuf;
> > + struct sg_table *sgt;
> > + int ret;
> > +
> > + dmabuf = dma_buf_get(fd);
> > + if (IS_ERR(dmabuf)) {
> > + dev_err(dev, "Invalid dmabuf FD\n");
> > + return PTR_ERR(dmabuf);
> > + }
> > + attachment = dma_buf_attach(dmabuf, dev);
> > +
> > + if (IS_ERR(attachment)) {
> > + dev_err(dev, "Failed to attach dmabuf\n");
> > + ret = PTR_ERR(attachment);
> > + goto err_put;
> > + }
> > + sgt = dma_buf_map_attachment(attachment, dma_dir);
> > + if (IS_ERR(sgt)) {
> > +
Re: [PATCH 1/4] video: fb: imxfb: Drop platform data support
On 7/23/22 19:57, Uwe Kleine-König wrote:
> No source file but the driver itself includes the header containing the
> platform data definition. The last user is gone since commit
> 8485adf17a15 ("ARM: imx: Remove imx device directory").
>
> So we can safely drop platform data support.
>
> Signed-off-by: Uwe Kleine-König
I've applied all 4 patches to the fbdev git tree.
Thanks!
Helge
> ---
> drivers/video/fbdev/imxfb.c | 99 ---
> include/linux/platform_data/video-imxfb.h | 12 ---
> 2 files changed, 34 insertions(+), 77 deletions(-)
>
> diff --git a/drivers/video/fbdev/imxfb.c b/drivers/video/fbdev/imxfb.c
> index a2f644c97f28..85a5bf5639d9 100644
> --- a/drivers/video/fbdev/imxfb.c
> +++ b/drivers/video/fbdev/imxfb.c
> @@ -656,7 +656,6 @@ static int imxfb_activate_var(struct fb_var_screeninfo
> *var, struct fb_info *inf
>
> static int imxfb_init_fbinfo(struct platform_device *pdev)
> {
> - struct imx_fb_platform_data *pdata = dev_get_platdata(&pdev->dev);
> struct fb_info *info = platform_get_drvdata(pdev);
> struct imxfb_info *fbi = info->par;
> struct device_node *np;
> @@ -690,25 +689,20 @@ static int imxfb_init_fbinfo(struct platform_device
> *pdev)
> info->fbops = &imxfb_ops;
> info->flags = FBINFO_FLAG_DEFAULT |
> FBINFO_READS_FAST;
> - if (pdata) {
> - fbi->lscr1 = pdata->lscr1;
> - fbi->dmacr = pdata->dmacr;
> - fbi->pwmr = pdata->pwmr;
> - } else {
> - np = pdev->dev.of_node;
> - info->var.grayscale = of_property_read_bool(np,
> - "cmap-greyscale");
> - fbi->cmap_inverse = of_property_read_bool(np, "cmap-inverse");
> - fbi->cmap_static = of_property_read_bool(np, "cmap-static");
>
> - fbi->lscr1 = IMXFB_LSCR1_DEFAULT;
> + np = pdev->dev.of_node;
> + info->var.grayscale = of_property_read_bool(np,
> + "cmap-greyscale");
> + fbi->cmap_inverse = of_property_read_bool(np, "cmap-inverse");
> + fbi->cmap_static = of_property_read_bool(np, "cmap-static");
>
> - of_property_read_u32(np, "fsl,lpccr", &fbi->pwmr);
> + fbi->lscr1 = IMXFB_LSCR1_DEFAULT;
>
> - of_property_read_u32(np, "fsl,lscr1", &fbi->lscr1);
> + of_property_read_u32(np, "fsl,lpccr", &fbi->pwmr);
>
> - of_property_read_u32(np, "fsl,dmacr", &fbi->dmacr);
> - }
> + of_property_read_u32(np, "fsl,lscr1", &fbi->lscr1);
> +
> + of_property_read_u32(np, "fsl,dmacr", &fbi->dmacr);
>
> return 0;
> }
> @@ -863,10 +857,10 @@ static int imxfb_probe(struct platform_device *pdev)
> struct imxfb_info *fbi;
> struct lcd_device *lcd;
> struct fb_info *info;
> - struct imx_fb_platform_data *pdata;
> struct resource *res;
> struct imx_fb_videomode *m;
> const struct of_device_id *of_id;
> + struct device_node *display_np;
> int ret, i;
> int bytes_per_pixel;
>
> @@ -884,8 +878,6 @@ static int imxfb_probe(struct platform_device *pdev)
> if (!res)
> return -ENODEV;
>
> - pdata = dev_get_platdata(&pdev->dev);
> -
> info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev);
> if (!info)
> return -ENOMEM;
> @@ -898,43 +890,34 @@ static int imxfb_probe(struct platform_device *pdev)
> if (ret < 0)
> goto failed_init;
>
> - if (pdata) {
> - if (!fb_mode)
> - fb_mode = pdata->mode[0].mode.name;
> -
> - fbi->mode = pdata->mode;
> - fbi->num_modes = pdata->num_modes;
> - } else {
> - struct device_node *display_np;
> - fb_mode = NULL;
> -
> - display_np = of_parse_phandle(pdev->dev.of_node, "display", 0);
> - if (!display_np) {
> - dev_err(&pdev->dev, "No display defined in
> devicetree\n");
> - ret = -EINVAL;
> - goto failed_of_parse;
> - }
> + fb_mode = NULL;
>
> - /*
> - * imxfb does not support more modes, we choose only the native
> - * mode.
> - */
> - fbi->num_modes = 1;
> -
> - fbi->mode = devm_kzalloc(&pdev->dev,
> - sizeof(struct imx_fb_videomode), GFP_KERNEL);
> - if (!fbi->mode) {
> - ret = -ENOMEM;
> - of_node_put(display_np);
> - goto failed_of_parse;
> - }
> + display_np = of_parse_phandle(pdev->dev.of_node, "display", 0);
> + if (!display_np) {
> + dev_err(&pdev->dev, "No display defined in devicetree\n");
> + ret = -EINVAL;
> + goto fail
Re: [PATCH] video/fbdev/sis: fix typos in SiS_GetModeID()
On 7/18/22 14:43, Rustam Subkhankulov wrote:
> The second operand of a '&&' operator has no impact on expression
> result for cases 400 and 512 in SiS_GetModeID().
>
> Judging by the logic and the names of the variables, in both cases a
> typo was made.
>
> Found by Linux Verification Center (linuxtesting.org) with SVACE.
>
> Signed-off-by: Rustam Subkhankulov
> Fixes: 1da177e4c3f4 ("Linux-2.6.12-rc2")
applied to fbdev git tree.
Thanks!
Helge
> ---
> drivers/video/fbdev/sis/init.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/video/fbdev/sis/init.c b/drivers/video/fbdev/sis/init.c
> index b568c646a76c..2ba91d62af92 100644
> --- a/drivers/video/fbdev/sis/init.c
> +++ b/drivers/video/fbdev/sis/init.c
> @@ -355,12 +355,12 @@ SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int
> HDisplay, int VDisplay,
> }
> break;
> case 400:
> - if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 800) && (LCDwidth
> >= 600))) {
> + if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 800) && (LCDheight
> >= 600))) {
> if(VDisplay == 300) ModeIndex =
> ModeIndex_400x300[Depth];
> }
> break;
> case 512:
> - if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 1024) && (LCDwidth
> >= 768))) {
> + if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 1024) &&
> (LCDheight >= 768))) {
> if(VDisplay == 384) ModeIndex =
> ModeIndex_512x384[Depth];
> }
> break;
Re: [PATCH v3 02/32] drm/via: Add via_3d_reg.h
Hi Am 26.07.22 um 01:50 schrieb Kevin Brace: From: Kevin Brace Originated from VIA Technologies. Currently unused. Signed-off-by: Kevin Brace --- drivers/gpu/drm/via/via_3d_reg.h | 1863 ++ 1 file changed, 1863 insertions(+) create mode 100644 drivers/gpu/drm/via/via_3d_reg.h As part of Sam's recent changes to via/ he updated this header file to the latest revision. You should be able to remove this patch. Best regards Thomas diff --git a/drivers/gpu/drm/via/via_3d_reg.h b/drivers/gpu/drm/via/via_3d_reg.h new file mode 100644 index ..fc74647f512a --- /dev/null +++ b/drivers/gpu/drm/via/via_3d_reg.h @@ -0,0 +1,1863 @@ +/* + * Copyright 1998-2011 VIA Technologies, Inc. All Rights Reserved. + * Copyright 2001-2011 S3 Graphics, Inc. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sub license, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) OR COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + */ + +#ifndef VIA_3D_REG_H +#define VIA_3D_REG_H +#define HC_REG_BASE 0x0400 + +#define HC_REG_TRANS_SPACE 0x0040 + +#define HC_ParaN_MASK 0x +#define HC_Para_MASK0x00ff +#define HC_SubA_MASK0xff00 +#define HC_SubA_SHIFT 24 +/* Transmission Setting + */ +#define HC_REG_TRANS_SET0x003c +#define HC_ParaSubType_MASK 0xff00 +#define HC_ParaType_MASK0x00ff +#define HC_ParaOS_MASK 0xff00 +#define HC_ParaAdr_MASK 0x00ff +#define HC_ParaSubType_SHIFT24 +#define HC_ParaType_SHIFT 16 +#define HC_ParaOS_SHIFT 8 +#define HC_ParaAdr_SHIFT0 + +#define HC_ParaType_CmdVdata0x +#define HC_ParaType_NotTex 0x0001 +#define HC_ParaType_Tex 0x0002 +#define HC_ParaType_Palette 0x0003 +#define HC_ParaType_PreCR 0x0010 +#define HC_ParaType_Auto0x00fe +#define INV_ParaType_Dummy 0x0030 + +/* Transmission Space + */ +#define HC_REG_Hpara0 0x0040 +#define HC_REG_HpataAF 0x02fc + +/* Read + */ +#define HC_REG_HREngSt 0x +#define HC_REG_HRFIFOempty 0x0004 +#define HC_REG_HRFIFOfull 0x0008 +#define HC_REG_HRErr0x000c +#define HC_REG_FIFOstatus 0x0010 +/* HC_REG_HREngSt 0x + */ +#define HC_HDASZC_MASK 0x0001 +#define HC_HSGEMI_MASK 0xf000 +#define HC_HLGEMISt_MASK0x0f00 +#define HC_HCRSt_MASK 0x0080 +#define HC_HSE0St_MASK 0x0040 +#define HC_HSE1St_MASK 0x0020 +#define HC_HPESt_MASK 0x0010 +#define HC_HXESt_MASK 0x0008 +#define HC_HBESt_MASK 0x0004 +#define HC_HE2St_MASK 0x0002 +#define HC_HE3St_MASK 0x0001 +/* HC_REG_HRFIFOempty 0x0004 + */ +#define HC_HRZDempty_MASK 0x0010 +#define HC_HRTXAempty_MASK 0x0008 +#define HC_HRTXDempty_MASK 0x0004 +#define HC_HWZDempty_MASK 0x0002 +#define HC_HWCDempty_MASK 0x0001 +/* HC_REG_HRFIFOfull 0x0008 + */ +#define HC_HRZDfull_MASK0x0010 +#define HC_HRTXAfull_MASK 0x0008 +#define HC_HRTXDfull_MASK 0x0004 +#define HC_HWZDfull_MASK0x0002 +#define HC_HWCDfull_MASK0x0001 +/* HC_REG_HRErr0x000c + */ +#define HC_HAGPCMErr_MASK 0x8000 +#define HC_HAGPCMErrC_MASK 0x7000 +/* HC_REG_FIFOstatus 0x0010 + */ +#define HC_HRFIFOATall_MASK 0x8000 +#define HC_HRFIFOATbusy_MASK0x4000 +#define HC_HRATFGMDo_MASK 0x0100 +#define HC_HRATFGMDi_MASK 0x0080 +#define HC_HRATFRZD_MASK0x0040 +#define HC_HRATFRTXA_MASK 0x0020 +#define HC_HRATFRTXD_MASK 0x0010 +#define HC_HRATFWZD_MASK0x0008 +#define HC_HRATFWCD_MASK0x0004 +#define HC_HRATTXTAG_MASK 0x0002 +#define HC_HRATTXCH_MASK0x0001 + +/* AGP Command Setting + */ +#define H
Re: [PATCH] fbdev: Make registered_fb[] private to fbmem.c
On 7/25/22 09:54, Javier Martinez Canillas wrote:
> From: Daniel Vetter
>
> No driver access this anymore, except for the olpc dcon fbdev driver but
> that has been marked as broken anyways by commit de0952f267ff ("staging:
> olpc_dcon: mark driver as broken").
>
> Signed-off-by: Daniel Vetter
> Signed-off-by: Daniel Vetter
> Reviewed-by: Javier Martinez Canillas
> Signed-off-by: Javier Martinez Canillas
I've applied it to the fbdev git tree.
Thanks!
Helge
> ---
>
> drivers/video/fbdev/core/fbmem.c | 6 +++---
> include/linux/fb.h | 6 --
> 2 files changed, 3 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/video/fbdev/core/fbmem.c
> b/drivers/video/fbdev/core/fbmem.c
> index 6ae1c5fa19f9..1e70d8c67653 100644
> --- a/drivers/video/fbdev/core/fbmem.c
> +++ b/drivers/video/fbdev/core/fbmem.c
> @@ -51,10 +51,10 @@
> static DEFINE_MUTEX(registration_lock);
>
> struct fb_info *registered_fb[FB_MAX] __read_mostly;
> -EXPORT_SYMBOL(registered_fb);
> -
> int num_registered_fb __read_mostly;
> -EXPORT_SYMBOL(num_registered_fb);
> +#define for_each_registered_fb(i)\
> + for (i = 0; i < FB_MAX; i++)\
> + if (!registered_fb[i]) {} else
>
> bool fb_center_logo __read_mostly;
>
> diff --git a/include/linux/fb.h b/include/linux/fb.h
> index 453c3b2b6b8e..0aff76bcbb00 100644
> --- a/include/linux/fb.h
> +++ b/include/linux/fb.h
> @@ -627,16 +627,10 @@ extern int fb_get_color_depth(struct fb_var_screeninfo
> *var,
> extern int fb_get_options(const char *name, char **option);
> extern int fb_new_modelist(struct fb_info *info);
>
> -extern struct fb_info *registered_fb[FB_MAX];
> -extern int num_registered_fb;
> extern bool fb_center_logo;
> extern int fb_logo_count;
> extern struct class *fb_class;
>
> -#define for_each_registered_fb(i)\
> - for (i = 0; i < FB_MAX; i++)\
> - if (!registered_fb[i]) {} else
> -
> static inline void lock_fb_info(struct fb_info *info)
> {
> mutex_lock(&info->lock);
[PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_hwseq.c:910
dcn32_init_hw() warn: inconsistent indenting.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
index b6bada383958..201516a62b4b 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
@@ -907,10 +907,10 @@ void dcn32_init_hw(struct dc *dc)
dc->res_pool->hubbub->funcs->init_crb(dc->res_pool->hubbub);
// Get DMCUB capabilities
-if (dc->ctx->dmub_srv) {
- dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv->dmub);
- dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr;
-}
+ if (dc->ctx->dmub_srv) {
+ dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv->dmub);
+ dc->caps.dmub_caps.psr =
dc->ctx->dmub_srv->dmub->feature_caps.psr;
+ }
}
static int calc_mpc_flow_ctrl_cnt(const struct dc_stream_state *stream,
--
2.20.1.7.g153144c
[PATCH 02/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_mpc.c:306
mpc32_get_shaper_current() warn: inconsistent indenting.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
.../gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c | 36 +--
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c
b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c
index 94141f5e6994..357bd2461bc9 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c
@@ -300,24 +300,24 @@ static enum dc_lut_mode mpc32_get_shaper_current(struct
mpc *mpc, uint32_t mpcc_
uint32_t state_mode;
struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc);
- REG_GET(MPCC_MCM_SHAPER_CONTROL[mpcc_id],
- MPCC_MCM_SHAPER_MODE_CURRENT, &state_mode);
-
- switch (state_mode) {
- case 0:
- mode = LUT_BYPASS;
- break;
- case 1:
- mode = LUT_RAM_A;
- break;
- case 2:
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
- return mode;
+ REG_GET(MPCC_MCM_SHAPER_CONTROL[mpcc_id], MPCC_MCM_SHAPER_MODE_CURRENT,
&state_mode);
+
+ switch (state_mode) {
+ case 0:
+ mode = LUT_BYPASS;
+ break;
+ case 1:
+ mode = LUT_RAM_A;
+ break;
+ case 2:
+ mode = LUT_RAM_B;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
--
2.20.1.7.g153144c
[PATCH 03/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved. smatch warnings: drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c:716 dcn314_clk_mgr_construct() warn: inconsistent indenting. Reported-by: Abaci Robot Signed-off-by: Jiapeng Chong --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c index df6dd8465272..ee99974b3b62 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_clk_mgr.c @@ -713,7 +713,8 @@ void dcn314_clk_mgr_construct( dcn314_bw_params.wm_table = ddr5_wm_table; /* Saved clocks configured at boot for debug purposes */ -dcn314_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, &clk_mgr->base.base, &log_info); + dcn314_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, + &clk_mgr->base.base, &log_info); } -- 2.20.1.7.g153144c
[PATCH 04/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c:107
dcn201_update_clocks() warn: inconsistent indenting.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
.../gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c| 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
index 451e8d6cd8bd..f0577dcd1af6 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c
@@ -101,8 +101,8 @@ static void dcn201_update_clocks(struct clk_mgr
*clk_mgr_base,
return;
if (clk_mgr_base->clks.dispclk_khz == 0 ||
- dc->debug.force_clock_mode & 0x1) {
- force_reset = true;
+ dc->debug.force_clock_mode & 0x1) {
+ force_reset = true;
dcn2_read_clocks_from_hw_dentist(clk_mgr_base);
}
--
2.20.1.7.g153144c
[PATCH 07/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved. smatch warning: drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c:726 dcn31_clk_mgr_construct() warn: inconsistent indenting. Reported-by: Abaci Robot Signed-off-by: Jiapeng Chong --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c index bca5f01da763..c09be3f15fe6 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c @@ -723,7 +723,8 @@ void dcn31_clk_mgr_construct( dcn31_bw_params.wm_table = ddr5_wm_table; } /* Saved clocks configured at boot for debug purposes */ -dcn31_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, &clk_mgr->base.base, &log_info); + dcn31_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, +&clk_mgr->base.base, &log_info); } -- 2.20.1.7.g153144c
[PATCH 06/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved. smatch warning: drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c:655 dcn315_clk_mgr_construct() warn: inconsistent indenting. Reported-by: Abaci Robot Signed-off-by: Jiapeng Chong --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c index 36b0cd47c1c7..cc076621f5e6 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/dcn315_clk_mgr.c @@ -652,7 +652,8 @@ void dcn315_clk_mgr_construct( dcn315_bw_params.wm_table = ddr5_wm_table; } /* Saved clocks configured at boot for debug purposes */ -dcn315_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, &clk_mgr->base.base, &log_info); + dcn315_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, + &clk_mgr->base.base, &log_info); } -- 2.20.1.7.g153144c
[PATCH 08/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp_cm.c:67
dpp30_get_gamcor_current() warn: inconsistent indenting.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
.../drm/amd/display/dc/dcn30/dcn30_dpp_cm.c | 25 ---
1 file changed, 11 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c
index 87dbeca18984..e43f77c11c00 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp_cm.c
@@ -61,23 +61,20 @@ static enum dc_lut_mode dpp30_get_gamcor_current(struct dpp
*dpp_base)
uint32_t lut_mode;
struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);
- REG_GET(CM_GAMCOR_CONTROL,
- CM_GAMCOR_MODE_CURRENT, &state_mode);
+ REG_GET(CM_GAMCOR_CONTROL, CM_GAMCOR_MODE_CURRENT, &state_mode);
- if (state_mode == 0)
- mode = LUT_BYPASS;
+ if (state_mode == 0)
+ mode = LUT_BYPASS;
- if (state_mode == 2) {//Programmable RAM LUT
- REG_GET(CM_GAMCOR_CONTROL,
- CM_GAMCOR_SELECT_CURRENT, &lut_mode);
-
- if (lut_mode == 0)
- mode = LUT_RAM_A;
- else
- mode = LUT_RAM_B;
- }
+ if (state_mode == 2) {//Programmable RAM LUT
+ REG_GET(CM_GAMCOR_CONTROL, CM_GAMCOR_SELECT_CURRENT, &lut_mode);
+ if (lut_mode == 0)
+ mode = LUT_RAM_A;
+ else
+ mode = LUT_RAM_B;
+ }
- return mode;
+ return mode;
}
static void dpp3_program_gammcor_lut(
--
2.20.1.7.g153144c
[PATCH 12/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dwb.c:104 dwb2_enable()
warn: inconsistent indenting.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
index 8d3884b306dd..f1490e97b6ce 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dwb.c
@@ -101,8 +101,8 @@ static bool dwb2_enable(struct dwbc *dwbc, struct
dc_dwb_params *params)
struct dcn20_dwbc *dwbc20 = TO_DCN20_DWBC(dwbc);
/* Only chroma scaling (sub-sampling) is supported in DCN2 */
-if ((params->cnv_params.src_width != params->dest_width) ||
- (params->cnv_params.src_height != params->dest_height)) {
+ if ((params->cnv_params.src_width != params->dest_width) ||
+ (params->cnv_params.src_height != params->dest_height)) {
DC_LOG_DWB("%s inst = %d, FAILED!LUMA SCALING NOT SUPPORTED",
__func__, dwbc20->base.inst);
return false;
--
2.20.1.7.g153144c
[PATCH 09/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.c:724
dpp3_get_blndgam_current() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_dpp.c:823
dpp3_get_shaper_current() warn: inconsistent indenting.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
.../gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c | 77 +--
1 file changed, 38 insertions(+), 39 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
index 787b852eeaf2..77b00f86c216 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c
@@ -716,28 +716,27 @@ static enum dc_lut_mode dpp3_get_blndgam_current(struct
dpp *dpp_base)
struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);
- REG_GET(CM_BLNDGAM_CONTROL,
- CM_BLNDGAM_MODE_CURRENT, &mode_current);
- REG_GET(CM_BLNDGAM_CONTROL,
- CM_BLNDGAM_SELECT_CURRENT, &in_use);
-
- switch (mode_current) {
- case 0:
- case 1:
- mode = LUT_BYPASS;
- break;
-
- case 2:
- if (in_use == 0)
- mode = LUT_RAM_A;
- else
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
- return mode;
+ REG_GET(CM_BLNDGAM_CONTROL, CM_BLNDGAM_MODE_CURRENT, &mode_current);
+ REG_GET(CM_BLNDGAM_CONTROL, CM_BLNDGAM_SELECT_CURRENT, &in_use);
+
+ switch (mode_current) {
+ case 0:
+ case 1:
+ mode = LUT_BYPASS;
+ break;
+
+ case 2:
+ if (in_use == 0)
+ mode = LUT_RAM_A;
+ else
+ mode = LUT_RAM_B;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
static bool dpp3_program_blnd_lut(struct dpp *dpp_base,
@@ -817,24 +816,24 @@ static enum dc_lut_mode dpp3_get_shaper_current(struct
dpp *dpp_base)
uint32_t state_mode;
struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);
- REG_GET(CM_SHAPER_CONTROL,
- CM_SHAPER_MODE_CURRENT, &state_mode);
+ REG_GET(CM_SHAPER_CONTROL, CM_SHAPER_MODE_CURRENT, &state_mode);
- switch (state_mode) {
- case 0:
- mode = LUT_BYPASS;
- break;
- case 1:
- mode = LUT_RAM_A;
- break;
- case 2:
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
- return mode;
+ switch (state_mode) {
+ case 0:
+ mode = LUT_BYPASS;
+ break;
+ case 1:
+ mode = LUT_RAM_A;
+ break;
+ case 2:
+ mode = LUT_RAM_B;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
static void dpp3_configure_shaper_lut(
--
2.20.1.7.g153144c
[PATCH 13/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_mpc.c:305
mpc20_get_ogam_current() warn: inconsistent indenting.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
.../gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c | 36 +--
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
index 15734db0cdea..3d307dd58e9a 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_mpc.c
@@ -299,24 +299,24 @@ static enum dc_lut_mode mpc20_get_ogam_current(struct mpc
*mpc, int mpcc_id)
uint32_t state_mode;
struct dcn20_mpc *mpc20 = TO_DCN20_MPC(mpc);
- REG_GET(MPCC_OGAM_LUT_RAM_CONTROL[mpcc_id],
- MPCC_OGAM_CONFIG_STATUS, &state_mode);
-
- switch (state_mode) {
- case 0:
- mode = LUT_BYPASS;
- break;
- case 1:
- mode = LUT_RAM_A;
- break;
- case 2:
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
- return mode;
+ REG_GET(MPCC_OGAM_LUT_RAM_CONTROL[mpcc_id], MPCC_OGAM_CONFIG_STATUS,
&state_mode);
+
+ switch (state_mode) {
+ case 0:
+ mode = LUT_BYPASS;
+ break;
+ case 1:
+ mode = LUT_RAM_A;
+ break;
+ case 2:
+ mode = LUT_RAM_B;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
static void mpc2_program_lutb(struct mpc *mpc, int mpcc_id,
--
2.20.1.7.g153144c
[PATCH 18/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved. smatch warnings: drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn303/dcn303_fpu.c:205 dcn303_fpu_update_bw_bounding_box() warn: inconsistent indenting. drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn303/dcn303_fpu.c:355 dcn303_fpu_init_soc_bounding_box() warn: inconsistent indenting. Reported-by: Abaci Robot Signed-off-by: Jiapeng Chong --- .../drm/amd/display/dc/dml/dcn303/dcn303_fpu.c| 15 ++- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn303/dcn303_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn303/dcn303_fpu.c index 8fb14baed208..3eb3a021ab7d 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn303/dcn303_fpu.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn303/dcn303_fpu.c @@ -202,7 +202,7 @@ void dcn303_fpu_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_p unsigned int num_dcfclk_sta_targets = 4; unsigned int num_uclk_states; -dc_assert_fp_enabled(); + dc_assert_fp_enabled(); if (dc->ctx->dc_bios->vram_info.num_chans) dcn3_03_soc.num_chans = dc->ctx->dc_bios->vram_info.num_chans; @@ -349,14 +349,11 @@ void dcn303_fpu_init_soc_bounding_box(struct bp_soc_bb_info bb_info) dc_assert_fp_enabled(); if (bb_info.dram_clock_change_latency_100ns > 0) - dcn3_03_soc.dram_clock_change_latency_us = - bb_info.dram_clock_change_latency_100ns * 10; + dcn3_03_soc.dram_clock_change_latency_us = bb_info.dram_clock_change_latency_100ns * 10; - if (bb_info.dram_sr_enter_exit_latency_100ns > 0) - dcn3_03_soc.sr_enter_plus_exit_time_us = - bb_info.dram_sr_enter_exit_latency_100ns * 10; + if (bb_info.dram_sr_enter_exit_latency_100ns > 0) + dcn3_03_soc.sr_enter_plus_exit_time_us = bb_info.dram_sr_enter_exit_latency_100ns * 10; - if (bb_info.dram_sr_exit_latency_100ns > 0) - dcn3_03_soc.sr_exit_time_us = - bb_info.dram_sr_exit_latency_100ns * 10; + if (bb_info.dram_sr_exit_latency_100ns > 0) + dcn3_03_soc.sr_exit_time_us = bb_info.dram_sr_exit_latency_100ns * 10; } -- 2.20.1.7.g153144c
[PATCH 19/20] drm/amd/display: Clean up some inconsistent indenting
Clean up some inconsistent indenting, replace sizeof(x) / sizeof((x)[0]))
with ARRAY_SIZE(x).
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:185
optc3_fpu_set_vrr_m_const() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:355
dcn30_fpu_set_mcif_arb_params() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:384
dcn30_fpu_calculate_wm_and_dlg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/dcn30_fpu.c:390
dcn30_fpu_calculate_wm_and_dlg() warn: inconsistent indenting.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
.../drm/amd/display/dc/dml/dcn30/dcn30_fpu.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
index c00f759fdded..060426916998 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn30/dcn30_fpu.c
@@ -181,7 +181,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_0_soc = {
void optc3_fpu_set_vrr_m_const(struct timing_generator *optc,
double vtotal_avg)
{
-struct optc *optc1 = DCN10TG_FROM_TG(optc);
+ struct optc *optc1 = DCN10TG_FROM_TG(optc);
double vtotal_min, vtotal_max;
double ratio, modulo, phase;
uint32_t vblank_start;
@@ -350,24 +350,24 @@ void dcn30_fpu_set_mcif_arb_params(struct mcif_arb_params
*wb_arb_params,
int pipe_cnt,
int cur_pipe)
{
-int i;
+ int i;
dc_assert_fp_enabled();
-for (i = 0; i <
sizeof(wb_arb_params->cli_watermark)/sizeof(wb_arb_params->cli_watermark[0]);
i++) {
+ for (i = 0; i < ARRAY_SIZE(wb_arb_params->cli_watermark); i++) {
wb_arb_params->cli_watermark[i] = get_wm_writeback_urgent(dml,
pipes, pipe_cnt) * 1000;
wb_arb_params->pstate_watermark[i] =
get_wm_writeback_dram_clock_change(dml, pipes, pipe_cnt) * 1000;
-}
+ }
-wb_arb_params->dram_speed_change_duration =
dml->vba.WritebackAllowDRAMClockChangeEndPosition[cur_pipe] *
pipes[0].clks_cfg.refclk_mhz; /* num_clock_cycles = us * MHz */
+ wb_arb_params->dram_speed_change_duration =
dml->vba.WritebackAllowDRAMClockChangeEndPosition[cur_pipe] *
pipes[0].clks_cfg.refclk_mhz; /* num_clock_cycles = us * MHz */
}
void dcn30_fpu_update_soc_for_wm_a(struct dc *dc, struct dc_state *context)
{
-dc_assert_fp_enabled();
+ dc_assert_fp_enabled();
-if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].valid) {
+ if (dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].valid) {
context->bw_ctx.dml.soc.dram_clock_change_latency_us =
dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.pstate_latency_us;
context->bw_ctx.dml.soc.sr_enter_plus_exit_time_us =
dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_enter_plus_exit_time_us;
context->bw_ctx.dml.soc.sr_exit_time_us =
dc->clk_mgr->bw_params->wm_table.nv_entries[WM_A].dml_input.sr_exit_time_us;
@@ -380,12 +380,12 @@ void dcn30_fpu_calculate_wm_and_dlg(
int pipe_cnt,
int vlevel)
{
-int maxMpcComb = context->bw_ctx.dml.vba.maxMpcComb;
+ int maxMpcComb = context->bw_ctx.dml.vba.maxMpcComb;
int i, pipe_idx;
double dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][maxMpcComb];
bool pstate_en =
context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][maxMpcComb] !=
dm_dram_clock_change_unsupported;
-dc_assert_fp_enabled();
+ dc_assert_fp_enabled();
if (context->bw_ctx.dml.soc.min_dcfclk > dcfclk)
dcfclk = context->bw_ctx.dml.soc.min_dcfclk;
--
2.20.1.7.g153144c
[PATCH 14/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp_cm.c:450
dpp20_get_blndgam_current() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_dpp_cm.c:543
dpp20_get_shaper_current() warn: inconsistent indenting.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
.../drm/amd/display/dc/dcn20/dcn20_dpp_cm.c | 68 +--
1 file changed, 34 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c
index 2feb051a2002..598caa508d43 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dpp_cm.c
@@ -444,24 +444,24 @@ static enum dc_lut_mode dpp20_get_blndgam_current(struct
dpp *dpp_base)
uint32_t state_mode;
struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
- REG_GET(CM_BLNDGAM_LUT_WRITE_EN_MASK,
- CM_BLNDGAM_CONFIG_STATUS, &state_mode);
+ REG_GET(CM_BLNDGAM_LUT_WRITE_EN_MASK, CM_BLNDGAM_CONFIG_STATUS,
&state_mode);
- switch (state_mode) {
- case 0:
- mode = LUT_BYPASS;
- break;
- case 1:
- mode = LUT_RAM_A;
- break;
- case 2:
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
- return mode;
+ switch (state_mode) {
+ case 0:
+ mode = LUT_BYPASS;
+ break;
+ case 1:
+ mode = LUT_RAM_A;
+ break;
+ case 2:
+ mode = LUT_RAM_B;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
bool dpp20_program_blnd_lut(
@@ -537,24 +537,24 @@ static enum dc_lut_mode dpp20_get_shaper_current(struct
dpp *dpp_base)
uint32_t state_mode;
struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);
- REG_GET(CM_SHAPER_LUT_WRITE_EN_MASK,
- CM_SHAPER_CONFIG_STATUS, &state_mode);
+ REG_GET(CM_SHAPER_LUT_WRITE_EN_MASK, CM_SHAPER_CONFIG_STATUS,
&state_mode);
- switch (state_mode) {
- case 0:
- mode = LUT_BYPASS;
- break;
- case 1:
- mode = LUT_RAM_A;
- break;
- case 2:
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
- return mode;
+ switch (state_mode) {
+ case 0:
+ mode = LUT_BYPASS;
+ break;
+ case 1:
+ mode = LUT_RAM_A;
+ break;
+ case 2:
+ mode = LUT_RAM_B;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
static void dpp20_configure_shaper_lut(
--
2.20.1.7.g153144c
[PATCH 20/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1372
dp_dsc_clock_en_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1478
dp_dsc_clock_en_write() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1563
dp_dsc_slice_width_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1667
dp_dsc_slice_width_write() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1752
dp_dsc_slice_height_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1856
dp_dsc_slice_height_write() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:1937
dp_dsc_bits_per_pixel_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2038
dp_dsc_bits_per_pixel_write() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2117
dp_dsc_pic_width_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2178
dp_dsc_pic_height_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2254
dp_dsc_chunk_size_read() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:2330
dp_dsc_slice_bpg_offset_read() warn: inconsistent indenting.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 72 +--
1 file changed, 36 insertions(+), 36 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
index aa4edf182095..0e48824f55e3 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
@@ -1369,9 +1369,9 @@ static ssize_t dp_dsc_clock_en_read(struct file *f, char
__user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx =
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx) {
@@ -1475,9 +1475,9 @@ static ssize_t dp_dsc_clock_en_write(struct file *f,
const char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx =
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx || !pipe_ctx->stream)
@@ -1560,9 +1560,9 @@ static ssize_t dp_dsc_slice_width_read(struct file *f,
char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx =
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx) {
@@ -1664,9 +1664,9 @@ static ssize_t dp_dsc_slice_width_write(struct file *f,
const char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx =
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe_ctx->stream->link == aconnector->dc_link)
+ break;
}
if (!pipe_ctx || !pipe_ctx->stream)
@@ -1749,9 +1749,9 @@ static ssize_t dp_dsc_slice_height_read(struct file *f,
char __user *buf,
for (i = 0; i < MAX_PIPES; i++) {
pipe_ctx =
&aconnector->dc_link->dc->current_state->res_ctx.pipe_ctx[i];
- if (pipe_ctx && pipe_ctx->stream &&
- pipe_ctx->stream->link == aconnector->dc_link)
- break;
+ if (pipe_ctx && pipe_ctx->stream &&
+ pipe
[PATCH 17/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_util_32.c:713
dml32_CalculateSwathWidth() warn: inconsistent indenting.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
.../amd/display/dc/dml/dcn32/display_mode_vba_util_32.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
index 4b010b1b8aed..07f8f3b8626b 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c
@@ -710,10 +710,10 @@ void dml32_CalculateSwathWidth(
unsigned int k, j;
enum odm_combine_mode MainSurfaceODMMode;
-unsigned int surface_width_ub_l;
-unsigned int surface_height_ub_l;
-unsigned int surface_width_ub_c;
-unsigned int surface_height_ub_c;
+ unsigned int surface_width_ub_l;
+ unsigned int surface_height_ub_l;
+ unsigned int surface_width_ub_c;
+ unsigned int surface_height_ub_c;
#ifdef __DML_VBA_DEBUG__
dml_print("DML::%s: ForceSingleDPP = %d\n", __func__, ForceSingleDPP);
--
2.20.1.7.g153144c
[PATCH 05/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved. smatch warning: drivers/gpu/drm/amd/amdgpu/../display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c:683 dcn316_clk_mgr_construct() warn: inconsistent indenting. Reported-by: Abaci Robot Signed-off-by: Jiapeng Chong --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c index e4bb9c6193b5..0cd3d2eb7ac7 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_clk_mgr.c @@ -680,7 +680,8 @@ void dcn316_clk_mgr_construct( dcn316_bw_params.wm_table = ddr4_wm_table; } /* Saved clocks configured at boot for debug purposes */ -dcn316_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, &clk_mgr->base.base, &log_info); + dcn316_dump_clk_registers(&clk_mgr->base.base.boot_snapshot, + &clk_mgr->base.base, &log_info); } -- 2.20.1.7.g153144c
[PATCH 16/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:51
dml32_rq_dlg_get_rq_reg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:68
dml32_rq_dlg_get_rq_reg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:220
dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:224
dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:235
dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_rq_dlg_calc_32.c:240
dml32_rq_dlg_get_dlg_reg() warn: inconsistent indenting.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
.../dc/dml/dcn32/display_rq_dlg_calc_32.c | 81 +--
1 file changed, 40 insertions(+), 41 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c
index 269bdfc4bc40..a1276f6b9581 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/display_rq_dlg_calc_32.c
@@ -48,9 +48,9 @@ void dml32_rq_dlg_get_rq_reg(display_rq_regs_st *rq_regs,
{
const display_pipe_source_params_st *src =
&e2e_pipe_param[pipe_idx].pipe.src;
bool dual_plane = is_dual_plane((enum source_format_class)
(src->source_format));
-double stored_swath_l_bytes;
-double stored_swath_c_bytes;
-bool is_phantom_pipe;
+ double stored_swath_l_bytes;
+ double stored_swath_c_bytes;
+ bool is_phantom_pipe;
uint32_t pixel_chunk_bytes = 0;
uint32_t min_pixel_chunk_bytes = 0;
uint32_t meta_chunk_bytes = 0;
@@ -65,9 +65,9 @@ void dml32_rq_dlg_get_rq_reg(display_rq_regs_st *rq_regs,
uint32_t p1_dpte_group_bytes = 0;
uint32_t p1_mpte_group_bytes = 0;
-unsigned int detile_buf_size_in_bytes;
-unsigned int detile_buf_plane1_addr;
-unsigned int pte_row_height_linear;
+ unsigned int detile_buf_size_in_bytes;
+ unsigned int detile_buf_plane1_addr;
+ unsigned int pte_row_height_linear;
memset(rq_regs, 0, sizeof(*rq_regs));
@@ -217,52 +217,51 @@ void dml32_rq_dlg_get_dlg_reg(struct display_mode_lib
*mode_lib,
double refcyc_per_req_delivery_cur0 = 0.;
double refcyc_per_req_delivery_pre_c = 0.;
double refcyc_per_req_delivery_c = 0.;
-double refcyc_per_req_delivery_pre_l;
-double refcyc_per_req_delivery_l;
+ double refcyc_per_req_delivery_pre_l;
+ double refcyc_per_req_delivery_l;
double refcyc_per_line_delivery_pre_c = 0.;
double refcyc_per_line_delivery_c = 0.;
-double refcyc_per_line_delivery_pre_l;
-double refcyc_per_line_delivery_l;
-double min_ttu_vblank;
-double vratio_pre_l;
-double vratio_pre_c;
-unsigned int min_dst_y_next_start;
+ double refcyc_per_line_delivery_pre_l;
+ double refcyc_per_line_delivery_l;
+ double min_ttu_vblank;
+ double vratio_pre_l;
+ double vratio_pre_c;
+ unsigned int min_dst_y_next_start;
unsigned int htotal = dst->htotal;
unsigned int hblank_end = dst->hblank_end;
unsigned int vblank_end = dst->vblank_end;
bool interlaced = dst->interlaced;
double pclk_freq_in_mhz = dst->pixel_rate_mhz;
-unsigned int vready_after_vcount0;
+ unsigned int vready_after_vcount0;
double refclk_freq_in_mhz = clks->refclk_mhz;
double ref_freq_to_pix_freq = refclk_freq_in_mhz / pclk_freq_in_mhz;
bool dual_plane = 0;
unsigned int pipe_index_in_combine[DC__NUM_PIPES__MAX];
-int unsigned dst_x_after_scaler;
-int unsigned dst_y_after_scaler;
-double dst_y_prefetch;
-double dst_y_per_vm_vblank;
-double dst_y_per_row_vblank;
-double dst_y_per_vm_flip;
-double dst_y_per_row_flip;
-double max_dst_y_per_vm_vblank = 32.0;
-double max_dst_y_per_row_vblank = 16.0;
-
-double dst_y_per_pte_row_nom_l;
-double dst_y_per_pte_row_nom_c;
-double dst_y_per_meta_row_nom_l;
-double dst_y_per_meta_row_nom_c;
-double refcyc_per_pte_group_nom_l;
-double refcyc_per_pte_group_nom_c;
-double refcyc_per_pte_group_vblank_l;
-double refcyc_per_pte_group_vblank_c;
-double refcyc_per_pte_group_flip_l;
-double refcyc_per_pte_group_flip_c;
-double refcyc_per_meta_chunk_nom_l;
-double refcyc_per_meta_chunk_nom_c;
-double refcyc_per_meta_chunk_vblank_l;
-double refcyc_per_meta_chunk_vblank_c;
-double refcyc_per_meta_chunk_flip_l;
-double refcyc_per_meta_chunk_flip_c;
+ unsigned int dst_x_after_scaler;
+ unsigned int dst_y_after_scaler;
+
[PATCH 15/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn20/dcn20_hwseq.c:1728
dcn20_program_front_end_for_ctx() warn: inconsistent indenting.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
.../gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 3b26962637d0..68690e2118cb 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1715,15 +1715,13 @@ void dcn20_program_front_end_for_ctx(
DC_LOGGER_INIT(dc->ctx->logger);
/* Carry over GSL groups in case the context is changing. */
- for (i = 0; i < dc->res_pool->pipe_count; i++) {
- struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
- struct pipe_ctx *old_pipe_ctx =
- &dc->current_state->res_ctx.pipe_ctx[i];
-
- if (pipe_ctx->stream == old_pipe_ctx->stream)
- pipe_ctx->stream_res.gsl_group =
- old_pipe_ctx->stream_res.gsl_group;
- }
+ for (i = 0; i < dc->res_pool->pipe_count; i++) {
+ struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i];
+ struct pipe_ctx *old_pipe_ctx =
&dc->current_state->res_ctx.pipe_ctx[i];
+
+ if (pipe_ctx->stream == old_pipe_ctx->stream)
+ pipe_ctx->stream_res.gsl_group =
old_pipe_ctx->stream_res.gsl_group;
+ }
if (dc->hwss.program_triplebuffer != NULL && dc->debug.enable_tri_buf) {
for (i = 0; i < dc->res_pool->pipe_count; i++) {
--
2.20.1.7.g153144c
[PATCH 10/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved.
smatch warnings:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mpc.c:116
mpc3_get_ogam_current() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mpc.c:445
mpc3_get_shaper_current() warn: inconsistent indenting.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
.../gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c | 70 +--
1 file changed, 35 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
index 1981a71b961b..ad1c1b703874 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
@@ -109,32 +109,32 @@ enum dc_lut_mode mpc3_get_ogam_current(struct mpc *mpc,
int mpcc_id)
uint32_t state_ram_lut_in_use;
struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc);
- REG_GET_2(MPCC_OGAM_CONTROL[mpcc_id],
- MPCC_OGAM_MODE_CURRENT, &state_mode,
- MPCC_OGAM_SELECT_CURRENT, &state_ram_lut_in_use);
+ REG_GET_2(MPCC_OGAM_CONTROL[mpcc_id], MPCC_OGAM_MODE_CURRENT,
&state_mode,
+ MPCC_OGAM_SELECT_CURRENT, &state_ram_lut_in_use);
- switch (state_mode) {
+ switch (state_mode) {
+ case 0:
+ mode = LUT_BYPASS;
+ break;
+ case 2:
+ switch (state_ram_lut_in_use) {
case 0:
- mode = LUT_BYPASS;
+ mode = LUT_RAM_A;
break;
- case 2:
- switch (state_ram_lut_in_use) {
- case 0:
- mode = LUT_RAM_A;
- break;
- case 1:
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
+ case 1:
+ mode = LUT_RAM_B;
break;
default:
mode = LUT_BYPASS;
break;
}
- return mode;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
void mpc3_power_on_ogam_lut(
@@ -439,24 +439,24 @@ static enum dc_lut_mode mpc3_get_shaper_current(struct
mpc *mpc, uint32_t rmu_id
uint32_t state_mode;
struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc);
- REG_GET(SHAPER_CONTROL[rmu_idx],
- MPC_RMU_SHAPER_LUT_MODE_CURRENT, &state_mode);
+ REG_GET(SHAPER_CONTROL[rmu_idx], MPC_RMU_SHAPER_LUT_MODE_CURRENT,
&state_mode);
- switch (state_mode) {
- case 0:
- mode = LUT_BYPASS;
- break;
- case 1:
- mode = LUT_RAM_A;
- break;
- case 2:
- mode = LUT_RAM_B;
- break;
- default:
- mode = LUT_BYPASS;
- break;
- }
- return mode;
+ switch (state_mode) {
+ case 0:
+ mode = LUT_BYPASS;
+ break;
+ case 1:
+ mode = LUT_RAM_A;
+ break;
+ case 2:
+ mode = LUT_RAM_B;
+ break;
+ default:
+ mode = LUT_BYPASS;
+ break;
+ }
+
+ return mode;
}
static void mpc3_configure_shaper_lut(
--
2.20.1.7.g153144c
[PATCH 11/20] drm/amd/display: Clean up some inconsistent indenting
No functional modification involved.
smatch warning:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_optc.c:186
optc3_set_dsc_config() warn: inconsistent indenting.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
index 80136b5d7e48..d072997477dd 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_optc.c
@@ -180,11 +180,8 @@ void optc3_set_dsc_config(struct timing_generator *optc,
{
struct optc *optc1 = DCN10TG_FROM_TG(optc);
- optc2_set_dsc_config(optc, dsc_mode, dsc_bytes_per_pixel,
- dsc_slice_width);
-
- REG_UPDATE(OTG_V_SYNC_A_CNTL, OTG_V_SYNC_MODE, 0);
-
+ optc2_set_dsc_config(optc, dsc_mode, dsc_bytes_per_pixel,
dsc_slice_width);
+ REG_UPDATE(OTG_V_SYNC_A_CNTL, OTG_V_SYNC_MODE, 0);
}
void optc3_set_vrr_m_const(struct timing_generator *optc,
--
2.20.1.7.g153144c
Re: [PATCH v3 30/32] drm/via: Add Kconfig
Hi Am 26.07.22 um 01:53 schrieb Kevin Brace: From: Kevin Brace Signed-off-by: Kevin Brace --- drivers/gpu/drm/via/Kconfig | 9 + 1 file changed, 9 insertions(+) create mode 100644 drivers/gpu/drm/via/Kconfig diff --git a/drivers/gpu/drm/via/Kconfig b/drivers/gpu/drm/via/Kconfig new file mode 100644 index ..7c4656a1d473 --- /dev/null +++ b/drivers/gpu/drm/via/Kconfig @@ -0,0 +1,9 @@ +config DRM_OPENCHROME I would keep the driver option named DRM_VIA, as it has been so far. To build the existing DRI1 driver, rather introduce a new config symbol that enables it. The rule looks something like this: config DRM_VIA_DRI1 boolean "DRI1 support" depends on DRM_VIA && DRM_LEGACY help Build for DRI1-based userspace drivers. It will show up as an option if the user selects both DRM_VIA and DRM_LEGACY. Best regards Thomas + tristate "OpenChrome (VIA Technologies Chrome)" + depends on DRM && PCI && X86 + select DRM_KMS_HELPER + select DRM_TTM + help + Choose this option if you have VIA Technologies UniChrome or + Chrome9 integrated graphics. If M is selected the module will + be called via. -- 2.35.1 -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Ivo Totev OpenPGP_signature Description: OpenPGP digital signature
Re: [PATCH v3 02/13] drm: bridge: Add Samsung DSIM bridge driver
On 20/07/2022 17:51, Jagan Teki wrote: > > v1: > * Don't maintain component_ops in bridge driver > * Don't maintain platform glue code in bridge driver > * Add platform-specific glue code and make a common bridge > > Signed-off-by: Marek Szyprowski > Signed-off-by: Jagan Teki > --- > MAINTAINERS |8 + > drivers/gpu/drm/bridge/Kconfig | 12 + > drivers/gpu/drm/bridge/Makefile |1 + > drivers/gpu/drm/bridge/samsung-dsim.c | 1684 ++ > drivers/gpu/drm/exynos/Kconfig |1 + > drivers/gpu/drm/exynos/exynos_drm_dsi.c | 1715 +-- > include/drm/bridge/samsung-dsim.h | 99 ++ > 7 files changed, 1865 insertions(+), 1655 deletions(-) > create mode 100644 drivers/gpu/drm/bridge/samsung-dsim.c > create mode 100644 include/drm/bridge/samsung-dsim.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index 0f9366144d31..d796fa8c7be0 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -6546,6 +6546,14 @@ T: git git://anongit.freedesktop.org/drm/drm-misc > F: Documentation/devicetree/bindings/display/panel/samsung,lms397kf04.yaml > F: drivers/gpu/drm/panel/panel-samsung-db7430.c > > +DRM DRIVER FOR SAMSUNG MIPI DSIM BRIDGE > +M: Jagan Teki You also need: L: dri-devel@lists.freedesktop.org and probably also at least Inki Dae as maintainer as well: M: Inki Dae +M: Marek Szyprowski > +S: Maintained > +T: git git://anongit.freedesktop.org/drm/drm-misc > +F: drivers/gpu/drm/bridge/samsung-dsim.c > +F: include/drm/bridge/samsung-dsim.h Best regards, Krzysztof
Re: [PATCH v3 31/32] drm/via: Add Makefile
Hi Am 26.07.22 um 01:53 schrieb Kevin Brace: From: Kevin Brace Signed-off-by: Kevin Brace I suggest to merge patches 30, 31 and 32 into one to make it easier to review. Best regards Thomas --- drivers/gpu/drm/via/Makefile | 26 ++ 1 file changed, 26 insertions(+) create mode 100644 drivers/gpu/drm/via/Makefile diff --git a/drivers/gpu/drm/via/Makefile b/drivers/gpu/drm/via/Makefile new file mode 100644 index ..73ccacb4cd11 --- /dev/null +++ b/drivers/gpu/drm/via/Makefile @@ -0,0 +1,26 @@ +# +# Makefile for the drm device driver. This driver provides support for the +# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher. + +ccflags-y := -Iinclude/drm +via-y := via_crtc.o \ + via_crtc_hw.o \ + via_cursor.o \ + via_dac.o \ + via_display.o \ + via_drv.o \ + via_encoder.o \ + via_hdmi.o \ + via_i2c.o \ + via_init.o \ + via_ioctl.o \ + via_lvds.o \ + via_object.o \ + via_pll.o \ + via_pm.o \ + via_sii164.o \ + via_tmds.o \ + via_ttm.o \ + via_vt1632.o + +obj-$(CONFIG_DRM_OPENCHROME) += via.o -- 2.35.1 -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Ivo Totev OpenPGP_signature Description: OpenPGP digital signature
Re: [PATCH 1/3] Revert "drm/amdgpu: move internal vram_mgr function into the C file"
Hi
Am 25.07.22 um 19:14 schrieb Christian König:
Am 25.07.22 um 17:27 schrieb Tvrtko Ursulin:
On 24/07/2022 19:28, Thomas Zimmermann wrote:
Hi
Am 22.07.22 um 17:47 schrieb Christian König:
Hi Tvrtko,
scratching my head what exactly is going on here.
I've build tested drm-tip a couple of test in the last week and it
always worked flawlessly.
It looks like that some conflict resolution is sometimes not applied
correctly, but I have no idea why.
It worked last week, but must have been reintroduced meanhwile.
Please fetch the latest drm-tip and rebuild. The attached config
produces the error on my system.
What is the status with this? I hit a conflict on an implicated file
just now trying to rebuild drm-tip:
Unmerged paths:
(use "git add/rm ..." as appropriate to mark resolution)
deleted by us: drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
I had an other i915 conflict to solve and as grep amdgpu_vram_mgr.h
drivers/gpu/drm/amd produced nothing I just did a git rm on it and
pushed the resolution.
Let me know if I broke something, re-broke something, or whatever..
Build of amdgpu certainly still looks broken on my end, both before
and after me rebuilding drm-tip so maybe I just preserved the breakage.
It looks like that somehow re-broke, but I'm not sure how.
I've fetched drm-tip on Friday at around 1pm CET and build it and that
worked perfectly fine.
Essentially the status of drm-misc-next for the following files should
be carried on in drm-tip:
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
I've reset these files to their state as in drm-misc-next and updated
drm-tip. It appears to be working again from what I could test locally.
Please try at your earliest convenience.
Best regards
Thomas
Regards,
Christian.
Regards,
Tvrtko
Best regards
Thomas
Regards,
Christian.
Am 22.07.22 um 16:46 schrieb Tvrtko Ursulin:
On 14/07/2022 09:45, Thomas Zimmermann wrote:
Hi
Am 08.07.22 um 11:30 schrieb Arunpravin Paneer Selvam:
This reverts commit 708d19d9f362766147cab79eccae60912c6d3068.
This commit is only present in drm-misc-next. Should the revert be
cherry-picked into drm-misc-next-fixes?
Seemed like an appropriate thread to raise this, in case my pings
about it on #dri-devel and #radeon go un-noticed since it is Friday
after all.
So for me dri-tip today fails to build the amdgpu driver.
I had to revert 925b6e59138cefa47275c67891c65d48d3266d57 to make it
build. This conflicts a bit but seems trivial. Without this revert
code seems confused with different versions of struct
amdgpu_vram_mgr and build fails violently (increase your scroll
back buffers to see it all).
Regards,
Tvrtko
Best regards
Thomas
This is part of a revert of the following commits:
commit 708d19d9f362 ("drm/amdgpu: move internal vram_mgr function
into the C file")
commit 5e3f1e7729ec ("drm/amdgpu: fix start calculation in
amdgpu_vram_mgr_new")
commit c9cad937c0c5 ("drm/amdgpu: add drm buddy support to amdgpu")
[WHY]
Few users reported garbaged graphics as soon as x starts,
reverting until this can be resolved.
Signed-off-by: Arunpravin Paneer Selvam
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 29
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h | 27
++
2 files changed, 27 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
index 7a5e8a7b4a1b..51d9d3a4456c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
@@ -50,35 +50,6 @@ to_amdgpu_device(struct amdgpu_vram_mgr *mgr)
return container_of(mgr, struct amdgpu_device, mman.vram_mgr);
}
-static inline struct drm_buddy_block *
-amdgpu_vram_mgr_first_block(struct list_head *list)
-{
- return list_first_entry_or_null(list, struct
drm_buddy_block, link);
-}
-
-static inline bool amdgpu_is_vram_mgr_blocks_contiguous(struct
list_head *head)
-{
- struct drm_buddy_block *block;
- u64 start, size;
-
- block = amdgpu_vram_mgr_first_block(head);
- if (!block)
- return false;
-
- while (head != block->link.next) {
- start = amdgpu_vram_mgr_block_start(block);
- size = amdgpu_vram_mgr_block_size(block);
-
- block = list_entry(block->link.next, struct
drm_buddy_block, link);
- if (start + size != amdgpu_vram_mgr_block_start(block))
- return false;
- }
-
- return true;
-}
-
-
-
/**
* DOC: mem_info_vram_total
*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
index 4b267bf1c5db..9a2db87186c7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
@@ -53,6 +53,33 @@ static inline u64
amdgpu_vram_mgr_block_size
Re: [Intel-gfx] [PATCH v5 1/7] drm: Move and add a few utility macros into drm util header
On 7/25/22 2:36 PM, Andrzej Hajda wrote:
On 25.07.2022 11:25, Gwan-gyeong Mun wrote:
It moves overflows_type utility macro into drm util header from
i915_utils
header. The overflows_type can be used to catch the truncation between
data
types. And it adds safe_conversion() macro which performs a type
conversion
(cast) of an source value into a new variable, checking that the
destination is large enough to hold the source value.
And it adds exact_type and exactly_pgoff_t macro to catch type mis-match
while compiling.
v3: Add is_type_unsigned() macro (Mauro)
Modify overflows_type() macro to consider signed data types (Mauro)
Fix the problem that safe_conversion() macro always returns true
v4: Fix kernel-doc markups
Signed-off-by: Gwan-gyeong Mun
Cc: Thomas Hellström
Cc: Matthew Auld
Cc: Nirmoy Das
Cc: Jani Nikula
Reviewed-by: Mauro Carvalho Chehab
---
drivers/gpu/drm/i915/i915_utils.h | 5 +-
include/drm/drm_util.h | 77 +++
2 files changed, 78 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_utils.h
b/drivers/gpu/drm/i915/i915_utils.h
index c10d68cdc3ca..345e5b2dc1cd 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -32,6 +32,7 @@
#include
#include
#include
+#include
#ifdef CONFIG_X86
#include
@@ -111,10 +112,6 @@ bool i915_error_injected(void);
#define range_overflows_end_t(type, start, size, max) \
range_overflows_end((type)(start), (type)(size), (type)(max))
-/* Note we don't consider signbits :| */
-#define overflows_type(x, T) \
- (sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T))
-
#define ptr_mask_bits(ptr, n) ({ \
unsigned long __v = (unsigned long)(ptr); \
(typeof(ptr))(__v & -BIT(n)); \
diff --git a/include/drm/drm_util.h b/include/drm/drm_util.h
index 79952d8c4bba..1de9ee5704fa 100644
--- a/include/drm/drm_util.h
+++ b/include/drm/drm_util.h
@@ -62,6 +62,83 @@
*/
#define for_each_if(condition) if (!(condition)) {} else
+/**
+ * is_type_unsigned - helper for checking data type which is an
unsigned data
+ * type or not
+ * @x: The data type to check
+ *
+ * Returns:
+ * True if the data type is an unsigned data type, false otherwise.
+ */
+#define is_type_unsigned(x) ((typeof(x))-1 >= (typeof(x))0)
+
+/**
+ * overflows_type - helper for checking the truncation between data
types
+ * @x: Source for overflow type comparison
+ * @T: Destination for overflow type comparison
+ *
+ * It compares the values and size of each data type between the
first and
+ * second argument to check whether truncation can occur when
assigning the
+ * first argument to the variable of the second argument.
+ * Source and Destination can be used with or without sign bit.
+ * Composite data structures such as union and structure are not
considered.
+ * Enum data types are not considered.
+ * Floating point data types are not considered.
+ *
+ * Returns:
+ * True if truncation can occur, false otherwise.
+ */
+
+#define overflows_type(x, T) \
+ (is_type_unsigned(x) ? \
+ is_type_unsigned(T) ? \
+ (sizeof(x) > sizeof(T) && (x) >> BITS_PER_TYPE(T)) ? 1 : 0 \
+ : (sizeof(x) >= sizeof(T) && (x) >> (BITS_PER_TYPE(T) -
1)) ? 1 : 0 \
+ : is_type_unsigned(T) ? \
+ ((x) < 0) ? 1 : (sizeof(x) > sizeof(T) && (x) >>
BITS_PER_TYPE(T)) ? 1 : 0 \
+ : (sizeof(x) > sizeof(T)) ? \
+ ((x) < 0) ? (((x) * -1) >> BITS_PER_TYPE(T)) ? 1 : 0 \
+ : ((x) >> BITS_PER_TYPE(T)) ? 1 : 0 \
+ : 0)
It became quite big and hard to read. I wonder if we could not just
check the effects of the conversion, sth like:
#define overflows_type(x, T) ((T)(x) != (x))
Yes, this macro is a bit difficult to read because it takes into account
multiple situations. I left a comment with the relevant details in reply
to the previous patch so that you could check the details of the macro.
And the macro you commented is not satisfactory in all use cases where
the overflows_type() macro is used.
If you refer to the bottom part of the link below, you can check the
pseudo code of this macro and test scenarios of the use cases covered by
this macro. (It also includes the test code.)
https://patchwork.freedesktop.org/patch/492374/?series=104704&rev=3
Br,
G.G.
Regards
Andrzej
+
+/**
+ * exact_type - break compile if source type and destination value's
type are
+ * not the same
+ * @T: Source type
+ * @n: Destination value
+ *
+ * It is a helper macro for a poor man's -Wconversion: only allow
variables of
+ * an exact type. It determines whether the source type and
destination value's
+ * type are the same while compiling, and it breaks compile if two
types are
+ * not the same
+ */
+#define exact_type(T, n) \
+ BUILD_BUG_ON(!__builtin_constant_p(n) &&
!__builtin_types_compatible_p(T, typeof(n)))
+
+/**
+ * exactly_pgoff_t - helper to c
Re: [Intel-gfx] [RFC 02/10] drm/i915/vm_bind: Bind and unbind mappings
On 26/07/2022 06:07, Niranjana Vishwanathapura wrote:
On Mon, Jul 18, 2022 at 11:55:41AM +0100, Tvrtko Ursulin wrote:
On 01/07/2022 23:50, Niranjana Vishwanathapura wrote:
Bind and unbind the mappings upon VM_BIND and VM_UNBIND calls.
Signed-off-by: Niranjana Vishwanathapura
Signed-off-by: Prathap Kumar Valsan
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/gem/i915_gem_create.c | 10 +-
drivers/gpu/drm/i915/gem/i915_gem_object.h | 2 +
drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h | 38 +++
.../drm/i915/gem/i915_gem_vm_bind_object.c | 233 ++
drivers/gpu/drm/i915/gt/intel_gtt.c | 7 +
drivers/gpu/drm/i915/gt/intel_gtt.h | 9 +
drivers/gpu/drm/i915/i915_driver.c | 11 +-
drivers/gpu/drm/i915/i915_vma.c | 7 +-
drivers/gpu/drm/i915/i915_vma.h | 2 -
drivers/gpu/drm/i915/i915_vma_types.h | 8 +
11 files changed, 318 insertions(+), 10 deletions(-)
create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h
create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_vm_bind_object.c
diff --git a/drivers/gpu/drm/i915/Makefile
b/drivers/gpu/drm/i915/Makefile
index 522ef9b4aff3..4e1627e96c6e 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -165,6 +165,7 @@ gem-y += \
gem/i915_gem_ttm_move.o \
gem/i915_gem_ttm_pm.o \
gem/i915_gem_userptr.o \
+ gem/i915_gem_vm_bind_object.o \
gem/i915_gem_wait.o \
gem/i915_gemfs.o
i915-y += \
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c
b/drivers/gpu/drm/i915/gem/i915_gem_create.c
index 33673fe7ee0a..927a87e5ec59 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
@@ -15,10 +15,10 @@
#include "i915_trace.h"
#include "i915_user_extensions.h"
-static u32 object_max_page_size(struct intel_memory_region
**placements,
- unsigned int n_placements)
+u32 i915_gem_object_max_page_size(struct intel_memory_region
**placements,
+ unsigned int n_placements)
{
- u32 max_page_size = 0;
+ u32 max_page_size = I915_GTT_PAGE_SIZE_4K;
int i;
for (i = 0; i < n_placements; i++) {
@@ -28,7 +28,6 @@ static u32 object_max_page_size(struct
intel_memory_region **placements,
max_page_size = max_t(u32, max_page_size, mr->min_page_size);
}
- GEM_BUG_ON(!max_page_size);
return max_page_size;
}
@@ -99,7 +98,8 @@ __i915_gem_object_create_user_ext(struct
drm_i915_private *i915, u64 size,
i915_gem_flush_free_objects(i915);
- size = round_up(size, object_max_page_size(placements,
n_placements));
+ size = round_up(size, i915_gem_object_max_page_size(placements,
+ n_placements));
if (size == 0)
return ERR_PTR(-EINVAL);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 6f0a3ce35567..650de2224843 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -47,6 +47,8 @@ static inline bool i915_gem_object_size_2big(u64 size)
}
void i915_gem_init__objects(struct drm_i915_private *i915);
+u32 i915_gem_object_max_page_size(struct intel_memory_region
**placements,
+ unsigned int n_placements);
void i915_objects_module_exit(void);
int i915_objects_module_init(void);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h
b/drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h
new file mode 100644
index ..642cdb559f17
--- /dev/null
+++ b/drivers/gpu/drm/i915/gem/i915_gem_vm_bind.h
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2022 Intel Corporation
+ */
+
+#ifndef __I915_GEM_VM_BIND_H
+#define __I915_GEM_VM_BIND_H
+
+#include "i915_drv.h"
+
+#define assert_vm_bind_held(vm)
lockdep_assert_held(&(vm)->vm_bind_lock)
+
+static inline void i915_gem_vm_bind_lock(struct i915_address_space *vm)
+{
+ mutex_lock(&vm->vm_bind_lock);
+}
+
+static inline int
+i915_gem_vm_bind_lock_interruptible(struct i915_address_space *vm)
+{
+ return mutex_lock_interruptible(&vm->vm_bind_lock);
+}
+
+static inline void i915_gem_vm_bind_unlock(struct i915_address_space
*vm)
+{
+ mutex_unlock(&vm->vm_bind_lock);
+}
+
+struct i915_vma *
+i915_gem_vm_bind_lookup_vma(struct i915_address_space *vm, u64 va);
+void i915_gem_vm_bind_remove(struct i915_vma *vma, bool release_obj);
+int i915_gem_vm_bind_obj(struct i915_address_space *vm,
+ struct drm_i915_gem_vm_bind *va,
+ struct drm_file *file);
+int i915_gem_vm_unbind_obj(struct i915_address_space *vm,
+ struct drm_i915_gem_vm_unbind *va);
+
+#endif /* __I915_GEM_VM_BIND_H */
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_vm_bind_object.c
b/drivers/gpu/drm/i915/gem/i915_gem_vm_bind_object.c
new file mode 100644
index ..43ceb4dcca6c
--- /dev/null
+++ b/drivers/gpu/drm/i915/ge
Re: [PATCH 1/3] Revert "drm/amdgpu: move internal vram_mgr function into the C file"
On 26/07/2022 08:46, Thomas Zimmermann wrote: Hi Am 25.07.22 um 19:14 schrieb Christian König: Am 25.07.22 um 17:27 schrieb Tvrtko Ursulin: On 24/07/2022 19:28, Thomas Zimmermann wrote: Hi Am 22.07.22 um 17:47 schrieb Christian König: Hi Tvrtko, scratching my head what exactly is going on here. I've build tested drm-tip a couple of test in the last week and it always worked flawlessly. It looks like that some conflict resolution is sometimes not applied correctly, but I have no idea why. It worked last week, but must have been reintroduced meanhwile. Please fetch the latest drm-tip and rebuild. The attached config produces the error on my system. What is the status with this? I hit a conflict on an implicated file just now trying to rebuild drm-tip: Unmerged paths: (use "git add/rm ..." as appropriate to mark resolution) deleted by us: drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h I had an other i915 conflict to solve and as grep amdgpu_vram_mgr.h drivers/gpu/drm/amd produced nothing I just did a git rm on it and pushed the resolution. Let me know if I broke something, re-broke something, or whatever.. Build of amdgpu certainly still looks broken on my end, both before and after me rebuilding drm-tip so maybe I just preserved the breakage. It looks like that somehow re-broke, but I'm not sure how. I've fetched drm-tip on Friday at around 1pm CET and build it and that worked perfectly fine. Essentially the status of drm-misc-next for the following files should be carried on in drm-tip: drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h I've reset these files to their state as in drm-misc-next and updated drm-tip. It appears to be working again from what I could test locally. Please try at your earliest convenience. Builds for me now - thank you! Regards, Tvrtko
Re: [PATCH 0/6] TI SN65DSI83 Features
Hi all, gentle ping on this series since I didn't received much feedback for the code. Regards, Marco On 22-05-30, Marco Felsch wrote: > Hi, > > the purpose of this small series is to enable the support for the reverse > lane feature and to add support for reset controllers which can drive > the enable pin. > > Regards, > Marco > > Marco Felsch (6): > drm/bridge: ti-sn65dsi83: make lvds lane register setup more readable > dt-bindings: drm/bridge: ti-sn65dsi83: add documentation for reverse > lvds lanes > drm/bridge: ti-sn65dsi83: add support to swap the LVDS data lanes > drm/bridge: ti-sn65dsi83: make use of dev_err_probe > dt-bindings: drm/bridge: ti-sn65dsi83: Add reset controller > documentation > drm/bridge: ti-sn65dsi83: add support for a external reset controller > > .../bindings/display/bridge/ti,sn65dsi83.yaml | 64 - > drivers/gpu/drm/bridge/ti-sn65dsi83.c | 89 +-- > 2 files changed, 145 insertions(+), 8 deletions(-) > > -- > 2.30.2 > > >
Re: [PATCH v6 13/13] video: backlight: mt6370: Add MediaTek MT6370 support
On Tue, Jul 26, 2022 at 10:20:02AM +0800, ChiaEn Wu wrote:
> On Mon, Jul 25, 2022 at 6:31 PM Daniel Thompson
> wrote:
> >
> > On Fri, Jul 22, 2022 at 06:24:07PM +0800, ChiaEn Wu wrote:
> > > diff --git a/drivers/video/backlight/Kconfig
> > > b/drivers/video/backlight/Kconfig
> > > index a003e02..846dbe7 100644
> > > --- a/drivers/video/backlight/Kconfig
> > > +++ b/drivers/video/backlight/Kconfig
> > > @@ -268,6 +268,18 @@ config BACKLIGHT_MAX8925
> > > If you have a LCD backlight connected to the WLED output of
> > > MAX8925
> > > WLED output, say Y here to enable this driver.
> > >
> > > +config BACKLIGHT_MT6370
> > > + tristate "MediaTek MT6370 Backlight Driver"
> > > + depends on MFD_MT6370
> > > + help
> > > + This enables support for Mediatek MT6370 Backlight driver.
> > > + It's commonly used to drive the display WLED. There are 4 channels
> > > + inside, and each channel supports up to 30mA of current capability
> > > + with 2048 current steps in exponential or linear mapping curves.
> >
> > Does the MT6372 support more steps than this? In other words does it use
> > a fourteen bit scale or does it use an 11-bit scale at a different
> > register location?
>
> Hi Daniel,
>
> Thanks for your reply.
> Yes, MT6372 can support 16384 steps and uses a 14-bit scale register
> location. But the maximum current of each
> channel of MT6372 is the same as MT6370 and MT6371, both 30mA.
> The main reason why MT6372 is designed this way is that one of the
> customers asked for a more delicate
> adjustment of the backlight brightness. But other customers actually
> do not have such requirements.
> Therefore, we designed it this way for maximum compatibility in software.
I don't think that is an acceptable approach for the upstream kernel.
To be "compatible" with (broken) software this driver ends up reducing
the capability of the upstream kernel to the point it becomes unable to
meet requirements for delicate adjustment (requirements that were
sufficiently important to change the hardware design so you could meet
them).
> > > +
> > > + This driver can also be built as a module. If so, the module
> > > + will be called "mt6370-backlight".
> > > +
> > > [...]
> > > diff --git a/drivers/video/backlight/mt6370-backlight.c
> > > b/drivers/video/backlight/mt6370-backlight.c
> > > new file mode 100644
> > > index 000..ba00a8f
> > > --- /dev/null
> > > +++ b/drivers/video/backlight/mt6370-backlight.c
> > > [...]
> > > +static int mt6370_bl_update_status(struct backlight_device *bl_dev)
> > > +{
> > > + struct mt6370_priv *priv = bl_get_data(bl_dev);
> > > + int brightness = backlight_get_brightness(bl_dev);
> > > + unsigned int enable_val;
> > > + u8 brightness_val[2];
> > > + int ret;
> > > +
> > > + if (brightness) {
> > > + brightness_val[0] = (brightness - 1) & MT6370_BL_DIM2_MASK;
> > > + brightness_val[1] = (brightness - 1) >>
> > > fls(MT6370_BL_DIM2_MASK);
> > > +
> > > + /*
> > > + * To make MT6372 using 14 bits to control the brightness
> > > + * backward compatible with 11 bits brightness control
> > > + * (like MT6370 and MT6371 do), we left shift the value
> > > + * and pad with 1 to remaining bits. Hence, the MT6372's
> > > + * backlight brightness will be almost the same as MT6370's
> > > + * and MT6371's.
> > > + */
> > > + if (priv->vid_type == MT6370_VID_6372) {
> > > + brightness_val[0] <<= MT6370_BL_DIM2_6372_SHIFT;
> > > + brightness_val[0] |= MT6370_BL_DUMMY_6372_MASK;
> > > + }
> >
> > This somewhat depends on the answer to the first question above, but
> > what is the point of this shifting? If the range is 14-bit then the
> > driver should set max_brightness to 16384 and present the full range of
> > the MT6372 to the user.
>
> So should we make all 16384 steps of MT6372 available to users?
Yes.
> Does that mean the DTS needs to be modified as well?
Yes... the property to set initial brightness needs a 14-bit range.
It would also be a good idea to discuss with the DT maintainers whether
you should introduce a second compatible string (ending 6372) in order
to allow the DT validation checks to detect accidental use of MT6372
ranges on MT6370 hardware.
> Or, for the reasons, I have just explained (just one customer has this
> requirement), then we do not make any changes for compatibility
> reasons?
I'd be curious what the compatiblity reasons are. In other words what
software breaks?
Normally the userspace backlight code reads the max_brightness property
and configures things accordingly (and therefore if you the component
that breaks is something like an Android HAL then fix the HAL instead).
Daniel.
[PATCH] drm: lcdif: change burst size to 256B
FIFO underruns are seen if a AXI bus master with a higher priority do a lot of memory access. Increase the burst size to 256B to avoid such underruns and to improve the memory access efficiency. Signed-off-by: Marco Felsch --- drivers/gpu/drm/mxsfb/lcdif_kms.c | 16 ++-- drivers/gpu/drm/mxsfb/lcdif_regs.h | 4 2 files changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c b/drivers/gpu/drm/mxsfb/lcdif_kms.c index 1bec1279c8b5..1f22ea5896d5 100644 --- a/drivers/gpu/drm/mxsfb/lcdif_kms.c +++ b/drivers/gpu/drm/mxsfb/lcdif_kms.c @@ -143,8 +143,20 @@ static void lcdif_set_mode(struct lcdif_drm_private *lcdif, u32 bus_flags) CTRLDESCL0_1_WIDTH(m->crtc_hdisplay), lcdif->base + LCDC_V8_CTRLDESCL0_1); - writel(CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb->pitches[0]), - lcdif->base + LCDC_V8_CTRLDESCL0_3); + /* +* Undocumented P_SIZE and T_SIZE bit fields but according the +* downstream kernel they control the AXI burst size. As of now there +* are two known values: +* 1 - 128Byte +* 2 - 256Byte +* +* Downstream has set the burst size to 256Byte to improve the memory +* efficiency so set it here too. This also reduces the FIFO underrun +* possibility. +*/ + ctrl = CTRLDESCL0_3_P_SIZE(2) | CTRLDESCL0_3_T_SIZE(2) | + CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb->pitches[0]); + writel(ctrl, lcdif->base + LCDC_V8_CTRLDESCL0_3); } static void lcdif_enable_controller(struct lcdif_drm_private *lcdif) diff --git a/drivers/gpu/drm/mxsfb/lcdif_regs.h b/drivers/gpu/drm/mxsfb/lcdif_regs.h index c70220651e3a..8e8bef175bf2 100644 --- a/drivers/gpu/drm/mxsfb/lcdif_regs.h +++ b/drivers/gpu/drm/mxsfb/lcdif_regs.h @@ -190,6 +190,10 @@ #define CTRLDESCL0_1_WIDTH(n) ((n) & 0x) #define CTRLDESCL0_1_WIDTH_MASKGENMASK(15, 0) +#define CTRLDESCL0_3_P_SIZE(n) (((n) << 20) & CTRLDESCL0_3_P_SIZE_MASK) +#define CTRLDESCL0_3_P_SIZE_MASK GENMASK(22, 20) +#define CTRLDESCL0_3_T_SIZE(n) (((n) << 16) & CTRLDESCL0_3_T_SIZE_MASK) +#define CTRLDESCL0_3_T_SIZE_MASK GENMASK(17, 16) #define CTRLDESCL0_3_PITCH(n) ((n) & 0x) #define CTRLDESCL0_3_PITCH_MASKGENMASK(15, 0) -- 2.30.2
[PATCH v3 0/2] Add driver for Novatek NT35596S panel
These patches add support for Novatek NT35596S based JDI FHD panels, found in Xiaomi Mi Mix2S mobile phones. Changes in v3: - Embed the support into existing driver (panel-novatek-nt36672a), as these two IC are similar with different initialization commands. Changes in v2: - Correct items order in Makefile and improve failure handling. Molly Sophia (2): dt-bindings: display: panel: Add Novatek NT35596S panel bindings drm: panel: Add novatek nt35596s panel driver .../display/panel/novatek,nt36672a.yaml | 20 +- drivers/gpu/drm/panel/Kconfig | 7 +- .../gpu/drm/panel/panel-novatek-nt36672a.c| 246 -- 3 files changed, 247 insertions(+), 26 deletions(-) -- 2.37.1
[PATCH v3 1/2] dt-bindings: display: panel: Add Novatek NT35596S panel bindings
Add documentation for "novatek,nt35596s" panel. Changes in v3: - Embed the documentation into existing one (novatek,nt36672a). Signed-off-by: Molly Sophia --- .../display/panel/novatek,nt36672a.yaml | 20 --- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml b/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml index 563766d283f6..560fb66d0e5a 100644 --- a/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml +++ b/Documentation/devicetree/bindings/display/panel/novatek,nt36672a.yaml @@ -20,14 +20,20 @@ allOf: properties: compatible: -items: - - enum: - - tianma,fhd-video - - const: novatek,nt36672a +oneOf: + - items: + - enum: + - tianma,fhd-video + - const: novatek,nt36672a + + - items: + - enum: + - jdi,fhd-nt35596s + - const: novatek,nt35596s + description: This indicates the panel manufacturer of the panel that is - in turn using the NT36672A panel driver. This compatible string - determines how the NT36672A panel driver is configured for the indicated - panel. The novatek,nt36672a compatible shall always be provided as a fallback. + in turn using the NT36672A or the NT35596S panel driver. This compatible string + determines how the panel driver is configured for the indicated panel. reset-gpios: maxItems: 1 -- 2.37.1
[PATCH v3 2/2] drm: panel: Add novatek nt35596s panel driver
Novatek NT35596s is a generic DSI IC that drives command and video mode
panels. Add the driver for it. Currently add support for the LCD panel
from JDI connected with this IC, as found on Xiaomi Mi Mix2s phones.
Changes in v3:
- Embed the support into existing driver (panel-novatek-nt36672a), as
these two IC are similar with different initialization commands.
Signed-off-by: Molly Sophia
---
drivers/gpu/drm/panel/Kconfig | 7 +-
.../gpu/drm/panel/panel-novatek-nt36672a.c| 246 --
2 files changed, 234 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 38799effd00a..ecc1b9aa6a1c 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -328,14 +328,15 @@ config DRM_PANEL_NOVATEK_NT35950
mobile phones.
config DRM_PANEL_NOVATEK_NT36672A
- tristate "Novatek NT36672A DSI panel"
+ tristate "Novatek NT36672A/NT35596S DSI panel"
depends on OF
depends on DRM_MIPI_DSI
depends on BACKLIGHT_CLASS_DEVICE
help
Say Y here if you want to enable support for the panels built
- around the Novatek NT36672A display controller, such as some
- Tianma panels used in a few Xiaomi Poco F1 mobile phones.
+ around the Novatek NT36672A or NT35596S display controller, such
+ as some Tianma panels used in a few Xiaomi Poco F1 mobile phones
+ or the JDI panels used in Xiaomi Mi Mix2S mobile phones.
config DRM_PANEL_NOVATEK_NT39016
tristate "Novatek NT39016 RGB/SPI panel"
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
index 231f371901e8..fcdde538d847 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
@@ -3,13 +3,15 @@
* Copyright (C) 2020 Linaro Ltd
* Author: Sumit Semwal
*
- * This driver is for the DSI interface to panels using the NT36672A display
driver IC
+ * Copyright (C) 2022 Molly Sophia
+ *
+ * This driver is for the DSI interface to panels using the NT36672A/NT35596S
display driver IC
* from Novatek.
* Currently supported are the Tianma FHD+ panels found in some Xiaomi phones,
including
- * some variants of the Poco F1 phone.
+ * some variants of the Poco F1 phone, and the JDI FHD+ panels found in Xiaomi
Mi Mix2S phones.
*
- * Panels using the Novatek NT37762A IC should add appropriate configuration
per-panel and
- * use this driver.
+ * Panels using the Novatek NT37762A or NT35596S IC should add appropriate
configuration
+ * per-panel and use this driver.
*/
#include
@@ -123,12 +125,14 @@ static int nt36672a_panel_unprepare(struct drm_panel
*panel)
if (!pinfo->prepared)
return 0;
- /* send off cmds */
- ret = nt36672a_send_cmds(panel, pinfo->desc->off_cmds,
-pinfo->desc->num_off_cmds);
+ if (pinfo->desc->num_off_cmds != 0) {
+ /* send off cmds if present */
+ ret = nt36672a_send_cmds(panel, pinfo->desc->off_cmds,
+ pinfo->desc->num_off_cmds);
- if (ret < 0)
- dev_err(panel->dev, "failed to send DCS off cmds: %d\n", ret);
+ if (ret < 0)
+ dev_err(panel->dev, "failed to send DCS off cmds:
%d\n", ret);
+ }
ret = mipi_dsi_dcs_set_display_off(pinfo->link);
if (ret < 0)
@@ -211,13 +215,15 @@ static int nt36672a_panel_prepare(struct drm_panel *panel)
goto poweroff;
}
- /* Send rest of the init cmds */
- err = nt36672a_send_cmds(panel, pinfo->desc->on_cmds_2,
-pinfo->desc->num_on_cmds_2);
+ if (pinfo->desc->num_on_cmds_2 != 0) {
+ /* Send rest of the init cmds if present */
+ err = nt36672a_send_cmds(panel, pinfo->desc->on_cmds_2,
+ pinfo->desc->num_on_cmds_2);
- if (err < 0) {
- dev_err(panel->dev, "failed to send DCS Init 2nd Code: %d\n",
err);
- goto poweroff;
+ if (err < 0) {
+ dev_err(panel->dev, "failed to send DCS Init 2nd Code:
%d\n", err);
+ goto poweroff;
+ }
}
msleep(120);
@@ -601,6 +607,212 @@ static const struct nt36672a_panel_desc
tianma_fhd_video_panel_desc = {
.num_off_cmds = ARRAY_SIZE(tianma_fhd_video_off_cmds),
};
+static const struct nt36672a_panel_cmd jdi_nt35596s_video_on_cmds[] = {
+ { .data = { 0xff, 0x24 } },
+ { .data = { 0x9d, 0x34 } },
+ { .data = { 0xfb, 0x01 } },
+ { .data = { 0xc4, 0x25 } },
+ { .data = { 0xd1, 0x08 } },
+ { .data = { 0xd2, 0x84 } },
+ { .data = { 0xff, 0x26 } },
+ { .data = { 0xfb, 0x01 } },
+ { .data = { 0x03, 0x1c } },
+ { .data = { 0x3b,
Re: [PATCH v2 4/6] drm/i915: Implement intersect/compatible functions
On 25/07/2022 12:42, Arunpravin Paneer Selvam wrote:
Implemented a new intersect and compatible callback function
fetching start offset from drm buddy allocator.
Signed-off-by: Christian König
Signed-off-by: Arunpravin Paneer Selvam
---
drivers/gpu/drm/i915/i915_ttm_buddy_manager.c | 43 +++
1 file changed, 43 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
index a5109548abc0..b5801c05bd41 100644
--- a/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
+++ b/drivers/gpu/drm/i915/i915_ttm_buddy_manager.c
@@ -178,6 +178,47 @@ static void i915_ttm_buddy_man_free(struct
ttm_resource_manager *man,
kfree(bman_res);
}
+static bool i915_ttm_buddy_man_intersect(struct ttm_resource_manager *man,
+struct ttm_resource *res,
+const struct ttm_place *place,
+size_t size)
+{
+ struct i915_ttm_buddy_resource *bman_res = to_ttm_buddy_resource(res);
+ u32 start, num_pages = PFN_UP(size);
+ struct drm_buddy_block *block;
+
+ /* Check each drm buddy block individually */
+ list_for_each_entry(block, &bman_res->blocks, link) {
+ start = drm_buddy_block_offset(block) >> PAGE_SHIFT;
+ /* Don't evict BOs outside of the requested placement range */
+ if (place->fpfn >= (start + num_pages) ||
+ (place->lpfn && place->lpfn <= start))
+ return false;
+ }
+
+ return true;
+}
This looks like a nice idea. We should be able to clean up
i915_ttm_eviction_valuable() a fair bit I think, if we now call
ttm_bo_eviction_valuable() at the end (like in amdgpu), and move the
bits that are specific to buddy_man here?
So something like:
if (!place->fpfn && !place->lpfn)
return true;
if (!place->fpfn &&
place->lpfn == i915_buddy_man_visible_size(man))
return bman_res->used_visible_size > 0;
/* Check each drm buddy block individually */
+
+static bool i915_ttm_buddy_man_compatible(struct ttm_resource_manager *man,
+ struct ttm_resource *res,
+ const struct ttm_place *place,
+ size_t size)
Is it not possible to derive the size from res->num_pages?
+{
+ struct i915_ttm_buddy_resource *bman_res = to_ttm_buddy_resource(res);
+ u32 start, num_pages = PFN_UP(size);
+ struct drm_buddy_block *block;
+
+ /* Check each drm buddy block individually */
+ list_for_each_entry(block, &bman_res->blocks, link) {
+ start = drm_buddy_block_offset(block) >> PAGE_SHIFT;
+ if (start < place->fpfn ||
+ (place->lpfn && (start + num_pages) > place->lpfn))
+ return false;
+ }
if (!place->fpfn && !place->lpfn)
return true;
if (!place->fpfn &&
place->lpfn == i915_buddy_man_visible_size(man))
return bman_res->used_visible_size == res->num_pages;
/* Check each drm buddy block individually */
...
+
+ return true;
+}
+
static void i915_ttm_buddy_man_debug(struct ttm_resource_manager *man,
struct drm_printer *printer)
{
@@ -205,6 +246,8 @@ static void i915_ttm_buddy_man_debug(struct
ttm_resource_manager *man,
static const struct ttm_resource_manager_func i915_ttm_buddy_manager_func = {
.alloc = i915_ttm_buddy_man_alloc,
.free = i915_ttm_buddy_man_free,
+ .intersect = i915_ttm_buddy_man_intersect,
s/intersect/intersects/ ?
+ .compatible = i915_ttm_buddy_man_compatible,
.debug = i915_ttm_buddy_man_debug,
};
Re: [PATCH v6 13/13] video: backlight: mt6370: Add MediaTek MT6370 support
On Tue, Jul 26, 2022 at 5:31 PM Daniel Thompson
wrote:
...
> > > Does the MT6372 support more steps than this? In other words does it use
> > > a fourteen bit scale or does it use an 11-bit scale at a different
> > > register location?
> >
> > Hi Daniel,
> >
> > Thanks for your reply.
> > Yes, MT6372 can support 16384 steps and uses a 14-bit scale register
> > location. But the maximum current of each
> > channel of MT6372 is the same as MT6370 and MT6371, both 30mA.
> > The main reason why MT6372 is designed this way is that one of the
> > customers asked for a more delicate
> > adjustment of the backlight brightness. But other customers actually
> > do not have such requirements.
> > Therefore, we designed it this way for maximum compatibility in software.
Sorry for I used of the wrong word, I mean is 'driver', not
higher-level software
>
> I don't think that is an acceptable approach for the upstream kernel.
>
> To be "compatible" with (broken) software this driver ends up reducing
> the capability of the upstream kernel to the point it becomes unable to
> meet requirements for delicate adjustment (requirements that were
> sufficiently important to change the hardware design so you could meet
> them).
Originally, we just wanted to use one version of the driver to cover
all the SubPMIC of the 6370 series(6370~6372).
And, the users who use this series SubPMIC can directly apply this
driver to drive the backlight device without knowing the underlying
hardware.
To achieve this goal, we have designed it to look like this.
>
>
...
> > > > +
> > > > + if (brightness) {
> > > > + brightness_val[0] = (brightness - 1) &
> > > > MT6370_BL_DIM2_MASK;
> > > > + brightness_val[1] = (brightness - 1) >>
> > > > fls(MT6370_BL_DIM2_MASK);
> > > > +
> > > > + /*
> > > > + * To make MT6372 using 14 bits to control the brightness
> > > > + * backward compatible with 11 bits brightness control
> > > > + * (like MT6370 and MT6371 do), we left shift the value
> > > > + * and pad with 1 to remaining bits. Hence, the MT6372's
> > > > + * backlight brightness will be almost the same as
> > > > MT6370's
> > > > + * and MT6371's.
> > > > + */
> > > > + if (priv->vid_type == MT6370_VID_6372) {
> > > > + brightness_val[0] <<= MT6370_BL_DIM2_6372_SHIFT;
> > > > + brightness_val[0] |= MT6370_BL_DUMMY_6372_MASK;
> > > > + }
> > >
> > > This somewhat depends on the answer to the first question above, but
> > > what is the point of this shifting? If the range is 14-bit then the
> > > driver should set max_brightness to 16384 and present the full range of
> > > the MT6372 to the user.
> >
> > So should we make all 16384 steps of MT6372 available to users?
>
> Yes.
>
>
> > Does that mean the DTS needs to be modified as well?
>
> Yes... the property to set initial brightness needs a 14-bit range.
>
> It would also be a good idea to discuss with the DT maintainers whether
> you should introduce a second compatible string (ending 6372) in order
> to allow the DT validation checks to detect accidental use of MT6372
> ranges on MT6370 hardware.
hmmm... I have just thought about it,
maybe I can just modify the maximum value of default-brightness and
max-brightness in DT to 16384,
modify the description and add some comments.
And then on the driver side,
we can use mt6370_check_vendor_info( ) to determine whether it is MT6372.
If no, then in mt6370_bl_update_status(), first brightness_val / 8 and then set.
In mt6370_bl_get_brightness(), first brightness_val * 8 and then return;
If I do this change, does this meet your requirements?
>
>
> > Or, for the reasons, I have just explained (just one customer has this
> > requirement), then we do not make any changes for compatibility
> > reasons?
>
> I'd be curious what the compatiblity reasons are. In other words what
> software breaks?
The reason is as above. We just hope the users who use this series SubPMIC can
directly apply this driver to drive the backlight device without
knowing the underlying hardware.
Not software breaks.
Thanks!
>
> Normally the userspace backlight code reads the max_brightness property
> and configures things accordingly (and therefore if you the component
> that breaks is something like an Android HAL then fix the HAL instead).
>
>
> Daniel.
--
Best Regards,
ChiaEn Wu
Re: [PATCH v6 11/13] leds: rgb: mt6370: Add MediaTek MT6370 current sink type LED Indicator support
On Mon, Jul 25, 2022 at 4:41 PM Andy Shevchenko
wrote:
...
> > From: ChiYuan Huang
>
> (Note this and read below)
...
> In conjunction with above what SoB of Alice means?
>
> You really need to take your time and (re-)read
> https://www.kernel.org/doc/html/latest/process/submitting-patches.html.
Hi Andy,
Thanks for your reply.
We are very sorry for this mistake. We will revise it in the next patch.
>
> ...
>
> > + * Author: Alice Chen
> > + * Author: ChiYuan Huang
>
> Would
> * Authors:
> *Name_of_Author 1
> *Name_of_Author 2
>
> work for you?
It looks good, thanks! We will apply this in the next patch.
...
> > +struct mt6370_led {
> > + union {
> > + struct led_classdev isink;
> > + struct led_classdev_mc mc;
> > + };
>
> Where is the field that makes union work?
Just for saving memory space.
Because these led_classdevs do not be used at the same time.
Or do you think it would be better to rewrite it as follows?
-
struct mt6370_led {
struct led_classdev isink;
struct led_classdev_mc mc;
struct mt6370_priv *priv;
u32 default_state;
u32 index;
};
-
...
> > +static int mt6370_gen_breath_pattern(struct mt6370_priv *priv,
> > +struct led_pattern *pattern, u32 len,
> > +u8 *pattern_val, u32 val_len)
> > +{
> > + enum mt6370_led_ranges sel_range;
> > + struct led_pattern *curr;
> > + unsigned int sel;
> > + u8 val[P_MAX_PATTERNS / 2] = {};
> > + int i;
> > +
> > + if (len < P_MAX_PATTERNS && val_len < P_MAX_PATTERNS / 2)
> > + return -EINVAL;
> > +
> > + /*
> > +* Pattern list
> > +* tr1: byte 0, b'[7: 4]
> > +* tr2: byte 0, b'[3: 0]
> > +* tf1: byte 1, b'[7: 4]
> > +* tf2: byte 1, b'[3: 0]
> > +* ton: byte 2, b'[7: 4]
> > +* toff: byte 2, b'[3: 0]
> > +*/
> > + for (i = 0; i < P_MAX_PATTERNS; i++) {
> > + curr = pattern + i;
> > +
> > + sel_range = i == P_LED_TOFF ? R_LED_TOFF : R_LED_TRFON;
> > +
> > + linear_range_get_selector_within(priv->ranges + sel_range,
> > +curr->delta_t, &sel);
> > +
> > + val[i / 2] |= sel << (4 * ((i + 1) % 2));
> > + }
> > +
> > + memcpy(pattern_val, val, 3);
>
> Isn't it something like put_unaligned_be24()/put_unaligned_le24()?
OK, we will try to apply this method in the next patch.
Thank you so much for reviewing our patches so many times and
providing so many great suggestions!
--
Best Regards,
ChiaEn Wu
Re: [PATCH v6 13/13] video: backlight: mt6370: Add MediaTek MT6370 support
On Tue, Jul 26, 2022 at 07:28:48PM +0800, ChiaEn Wu wrote:
> On Tue, Jul 26, 2022 at 5:31 PM Daniel Thompson
> wrote:
> ...
> > > > Does the MT6372 support more steps than this? In other words does it use
> > > > a fourteen bit scale or does it use an 11-bit scale at a different
> > > > register location?
> > >
> > > Hi Daniel,
> > >
> > > Thanks for your reply.
> > > Yes, MT6372 can support 16384 steps and uses a 14-bit scale register
> > > location. But the maximum current of each
> > > channel of MT6372 is the same as MT6370 and MT6371, both 30mA.
> > > The main reason why MT6372 is designed this way is that one of the
> > > customers asked for a more delicate
> > > adjustment of the backlight brightness. But other customers actually
> > > do not have such requirements.
> > > Therefore, we designed it this way for maximum compatibility in software.
>
> Sorry for I used of the wrong word, I mean is 'driver', not
> higher-level software
>
> >
> > I don't think that is an acceptable approach for the upstream kernel.
> >
> > To be "compatible" with (broken) software this driver ends up reducing
> > the capability of the upstream kernel to the point it becomes unable to
> > meet requirements for delicate adjustment (requirements that were
> > sufficiently important to change the hardware design so you could meet
> > them).
>
> Originally, we just wanted to use one version of the driver to cover
> all the SubPMIC of the 6370 series(6370~6372).
> And, the users who use this series SubPMIC can directly apply this
> driver to drive the backlight device without knowing the underlying
> hardware.
> To achieve this goal, we have designed it to look like this.
You don't need a second driver to support two different values for
max-brightness. The same driver can support both ranges with nothing but
a small tweak during the driver probe function.
> ...
> > > > > +
> > > > > + if (brightness) {
> > > > > + brightness_val[0] = (brightness - 1) &
> > > > > MT6370_BL_DIM2_MASK;
> > > > > + brightness_val[1] = (brightness - 1) >>
> > > > > fls(MT6370_BL_DIM2_MASK);
> > > > > +
> > > > > + /*
> > > > > + * To make MT6372 using 14 bits to control the
> > > > > brightness
> > > > > + * backward compatible with 11 bits brightness control
> > > > > + * (like MT6370 and MT6371 do), we left shift the value
> > > > > + * and pad with 1 to remaining bits. Hence, the MT6372's
> > > > > + * backlight brightness will be almost the same as
> > > > > MT6370's
> > > > > + * and MT6371's.
> > > > > + */
> > > > > + if (priv->vid_type == MT6370_VID_6372) {
> > > > > + brightness_val[0] <<= MT6370_BL_DIM2_6372_SHIFT;
> > > > > + brightness_val[0] |= MT6370_BL_DUMMY_6372_MASK;
> > > > > + }
> > > >
> > > > This somewhat depends on the answer to the first question above, but
> > > > what is the point of this shifting? If the range is 14-bit then the
> > > > driver should set max_brightness to 16384 and present the full range of
> > > > the MT6372 to the user.
> > >
> > > So should we make all 16384 steps of MT6372 available to users?
> >
> > Yes.
> >
> >
> > > Does that mean the DTS needs to be modified as well?
> >
> > Yes... the property to set initial brightness needs a 14-bit range.
> >
> > It would also be a good idea to discuss with the DT maintainers whether
> > you should introduce a second compatible string (ending 6372) in order
> > to allow the DT validation checks to detect accidental use of MT6372
> > ranges on MT6370 hardware.
>
> hmmm... I have just thought about it,
> maybe I can just modify the maximum value of default-brightness and
> max-brightness in DT to 16384,
> modify the description and add some comments.
What for?
All the other backlight drivers (there are >130 of them) expose the hardware
range[1]. Most userspaces will already know how to handle that (by reading
the max_brightness and, if it is recent enough, also the scale
properties in sysfs).
I'm still don't understand why one should fix a bug in the userspace by
implementing a hack in the driver.
[1] Well almost. The PWM backlight driver does contain support for
dead-spot avoidance and to allow the adoption of exponential scale.
However this purpose of these is based on how PWM backlights work
> And then on the driver side,
> we can use mt6370_check_vendor_info( ) to determine whether it is MT6372.
> If no, then in mt6370_bl_update_status(), first brightness_val / 8 and then
> set.
> In mt6370_bl_get_brightness(), first brightness_val * 8 and then return;
>
> If I do this change, does this meet your requirements?
Not really.
It's still misleading a sophisticated userspace, which may make bad
rounding decisions for backlight animation, in order to support a broken
one.
> > > Or, for the reasons, I have just explained (just one customer has th
Re: [PATCH 1/2] drm/amd/display: change variables type
On 7/25/22 20:38, Melissa Wen wrote:
On 07/25, Magali Lemes wrote:
On 7/25/22 16:42, André Almeida wrote:
Hi Magali,
Às 15:15 de 25/07/22, Magali Lemes escreveu:
As "dcn3_15_soc" and "dcn3_16_soc" are of type "struct
_vcs_dpi_soc_bounding_box_st", change their types accordingly.
I can see that indeed this type change sense for those variables, but
isn't a bit strange that the type was wrong in the first place? I wonder
if this variable is even used, given that it would very likely throw a
compiler error when using the wrong type and trying to access struct
members that aren't defined.
A compilation error would be thrown if either "dc/dcn315/dcn315_resource.h"
or "dc/dcn316/dcn316_resource.h" were included in the files where
"dcn3_15_soc" and "dcn3_16_soc" are initialized. Since they are not
included, the wrong variable type error is not shown.
To solve the sparse warning in the second patch of this series, those
variables need to be declared first, but they are already declared, we're
only missing the headers. If I only add the headers, then those variables
will be seen, and I get the expected incompatible variables types error. So,
fixing the types here is a preliminary work for the next patch.
Hi Magali,
Thanks for inspecting it. What you say makes sense, but André pointed
out something that makes sense to me too.
As fas as I checked, dcn3_15_soc and dcn16_soc is not used outside their
respective FPU files. Maybe the proper solution is removing those
declarations (and make the struct static). Can you take a look at it?
Best Regards,
Melissa
Hi, Melissa. Thank you for the suggestion!
My sole reason not to make those structs static was to keep some sort of
consistency with the rest of the dcn*_resource.h files, since that is
where all the other structs are first declared. I'm not sure, though, if
that's a good enough reason not to turn these variables into static. Let
me know what you think.
Magali
Magali
Signed-off-by: Magali Lemes
---
drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.h | 2 +-
drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.h
b/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.h
index 39929fa67a51..45276317c057 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn315/dcn315_resource.h
@@ -32,7 +32,7 @@
container_of(pool, struct dcn315_resource_pool, base)
extern struct _vcs_dpi_ip_params_st dcn3_15_ip;
-extern struct _vcs_dpi_ip_params_st dcn3_15_soc;
+extern struct _vcs_dpi_soc_bounding_box_st dcn3_15_soc;
struct dcn315_resource_pool {
struct resource_pool base;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.h
b/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.h
index 0dc5a6c13ae7..d2234aac5449 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn316/dcn316_resource.h
@@ -32,7 +32,7 @@
container_of(pool, struct dcn316_resource_pool, base)
extern struct _vcs_dpi_ip_params_st dcn3_16_ip;
-extern struct _vcs_dpi_ip_params_st dcn3_16_soc;
+extern struct _vcs_dpi_soc_bounding_box_st dcn3_16_soc;
struct dcn316_resource_pool {
struct resource_pool base;
Re: [PATCH v6 11/13] leds: rgb: mt6370: Add MediaTek MT6370 current sink type LED Indicator support
On Tue, Jul 26, 2022 at 1:46 PM ChiaEn Wu wrote:
> On Mon, Jul 25, 2022 at 4:41 PM Andy Shevchenko
> wrote:
...
> > > +struct mt6370_led {
> > > + union {
> > > + struct led_classdev isink;
> > > + struct led_classdev_mc mc;
> > > + };
> >
> > Where is the field that makes union work?
>
> Just for saving memory space.
> Because these led_classdevs do not be used at the same time.
> Or do you think it would be better to rewrite it as follows?
> -
> struct mt6370_led {
>struct led_classdev isink;
>struct led_classdev_mc mc;
>struct mt6370_priv *priv;
>u32 default_state;
>u32 index;
> };
> -
You obviously didn't get what I'm talking about...
Each union to work properly should have an associated variable that
holds the information of which field of the union is in use. Do you
have such a variable? If not, how does your code know which one to
use? If yes, add a proper comment there.
--
With Best Regards,
Andy Shevchenko
Re: [PATCH v2 0/1] dt-bindings: spi/display/panel: drop SPI CPHA and CPOL
On Fri, 22 Jul 2022 21:15:38 +0200, Krzysztof Kozlowski wrote: > Rebased on Linus' master > > Changes since v1 > > 1. Rework patchset as Rob suggested, so there is only one patch - changing spi >and display/panel. > v1: > https://lore.kernel.org/all/20220721153155.245336-2-krzysztof.kozlow...@linaro.org/ > > [...] Applied to https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next Thanks! [1/1] spi/panel: dt-bindings: drop CPHA and CPOL from common properties commit: 233363aba72ac638dda6838f8e817c46d36c2431 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark
Re: [PATCH v4] drm/i915: stop using swiotlb
On 25/07/2022 15:18, Robert Beckett wrote:
Calling swiotlb functions directly is nowadays considered harmful. See
https://lore.kernel.org/intel-gfx/20220711082614.ga29...@lst.de/
Replace swiotlb_max_segment() calls with dma_max_mapping_size().
In i915_gem_object_get_pages_internal() no longer consider max_segment
only if CONFIG_SWIOTLB is enabled. There can be other (iommu related)
causes of specific max segment sizes.
Cc: Christoph Hellwig
Cc: Tvrtko Ursulin
Cc: Thomas Hellstrom
Cc: Matthew Auld
v2: - restore UINT_MAX clamp in i915_sg_segment_size()
- drop PAGE_SIZE check as it will always be >= PAGE_SIZE
v3: - actually clamp to UINT_MAX in i915_sg_segment_size()
v4: - round down max segment size to PAGE_SIZE
Reviewed-by: Christoph Hellwig
Reviewed-by: Tvrtko Ursulin
Signed-off-by: Robert Beckett
---
drivers/gpu/drm/i915/gem/i915_gem_internal.c | 19 ---
drivers/gpu/drm/i915/gem/i915_gem_shmem.c| 2 +-
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 4 ++--
drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 2 +-
drivers/gpu/drm/i915/i915_scatterlist.h | 17 -
5 files changed, 12 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_internal.c
b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
index c698f95af15f..24f37658f1bb 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_internal.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
@@ -6,7 +6,6 @@
#include
#include
-#include
#include "i915_drv.h"
#include "i915_gem.h"
@@ -38,22 +37,12 @@ static int i915_gem_object_get_pages_internal(struct
drm_i915_gem_object *obj)
struct scatterlist *sg;
unsigned int sg_page_sizes;
unsigned int npages;
- int max_order;
+ int max_order = MAX_ORDER;
+ unsigned int max_segment;
gfp_t gfp;
- max_order = MAX_ORDER;
-#ifdef CONFIG_SWIOTLB
- if (is_swiotlb_active(obj->base.dev->dev)) {
- unsigned int max_segment;
-
- max_segment = swiotlb_max_segment();
- if (max_segment) {
- max_segment = max_t(unsigned int, max_segment,
- PAGE_SIZE) >> PAGE_SHIFT;
- max_order = min(max_order, ilog2(max_segment));
- }
- }
-#endif
+ max_segment = i915_sg_segment_size(i915->drm.dev) >> PAGE_SHIFT;
+ max_order = min(max_order, ilog2(max_segment));
gfp = GFP_KERNEL | __GFP_HIGHMEM | __GFP_RECLAIMABLE;
if (IS_I965GM(i915) || IS_I965G(i915)) {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
index 4eed3dd90ba8..34b9c76cd8e6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
@@ -194,7 +194,7 @@ static int shmem_get_pages(struct drm_i915_gem_object *obj)
struct intel_memory_region *mem = obj->mm.region;
struct address_space *mapping = obj->base.filp->f_mapping;
const unsigned long page_count = obj->base.size / PAGE_SIZE;
- unsigned int max_segment = i915_sg_segment_size();
+ unsigned int max_segment = i915_sg_segment_size(i915->drm.dev);
struct sg_table *st;
struct sgt_iter sgt_iter;
struct page *page;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 5a5cf332d8a5..7a828c9c0f6d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -189,7 +189,7 @@ static int i915_ttm_tt_shmem_populate(struct ttm_device
*bdev,
struct drm_i915_private *i915 = container_of(bdev, typeof(*i915), bdev);
struct intel_memory_region *mr = i915->mm.regions[INTEL_MEMORY_SYSTEM];
struct i915_ttm_tt *i915_tt = container_of(ttm, typeof(*i915_tt), ttm);
- const unsigned int max_segment = i915_sg_segment_size();
+ const unsigned int max_segment = i915_sg_segment_size(i915->drm.dev);
const size_t size = (size_t)ttm->num_pages << PAGE_SHIFT;
struct file *filp = i915_tt->filp;
struct sgt_iter sgt_iter;
@@ -568,7 +568,7 @@ static struct i915_refct_sgt *i915_ttm_tt_get_st(struct
ttm_tt *ttm)
ret = sg_alloc_table_from_pages_segment(st,
ttm->pages, ttm->num_pages,
0, (unsigned long)ttm->num_pages << PAGE_SHIFT,
- i915_sg_segment_size(), GFP_KERNEL);
+ i915_sg_segment_size(i915_tt->dev), GFP_KERNEL);
if (ret) {
st->sgl = NULL;
return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
index 094f06b4ce33..dfc35905dba2 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
@@ -129,7 +129,7 @@ static void i915_gem_object_userptr_drop_ref(struct
drm_i915_gem_object *obj)
static int i
[PATCH][next] drm/i915/gt: remove redundant pointer sseu
Pointer sseu is being assigned a value that is never read. The pointer is redundant and can be removed. Cleans up clang scan warning: drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c:300:2: warning: Value stored to 'sseu' is never read [deadcode.DeadStores] Signed-off-by: Colin Ian King --- drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c index 75257bd20ff0..c0578194ab16 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c @@ -286,7 +286,6 @@ guc_capture_alloc_steered_lists_xe_lpd(struct intel_guc *guc, const struct __guc_mmio_reg_descr_group *list; struct __guc_mmio_reg_descr_group *extlists; struct __guc_mmio_reg_descr *extarray; - struct sseu_dev_info *sseu; /* In XE_LPD we only have steered registers for the render-class */ list = guc_capture_get_one_list(lists, GUC_CAPTURE_LIST_INDEX_PF, @@ -297,7 +296,6 @@ guc_capture_alloc_steered_lists_xe_lpd(struct intel_guc *guc, num_steer_regs = ARRAY_SIZE(xe_extregs); - sseu = >->info.sseu; for_each_ss_steering(iter, gt, slice, subslice) num_tot_regs += num_steer_regs; -- 2.35.3
Re: [PATCH v2 07/10] drm/ofdrm: Add ofdrm for Open Firmware framebuffers
Hello Thomas,
On 7/20/22 16:27, Thomas Zimmermann wrote:
> Open Firmware provides basic display output via the 'display' node.
> DT platform code already provides a device that represents the node's
> framebuffer. Add a DRM driver for the device. The display mode and
> color format is pre-initialized by the system's firmware. Runtime
> modesetting via DRM is not possible. The display is useful during
> early boot stages or as error fallback.
>
I'm not familiar with OF display but the driver looks good to me.
Reviewed-by: Javier Martinez Canillas
I just have a few questions below.
[...]
> +static int ofdrm_primary_plane_helper_atomic_check(struct drm_plane *plane,
> +struct drm_atomic_state
> *new_state)
> +{
> + struct drm_plane_state *new_plane_state =
> drm_atomic_get_new_plane_state(new_state, plane);
> + struct drm_crtc_state *new_crtc_state;
> + int ret;
> +
> + if (!new_plane_state->fb)
> + return 0;
> +
> + new_crtc_state = drm_atomic_get_new_crtc_state(new_state,
> new_plane_state->crtc);
> +
> + ret = drm_atomic_helper_check_plane_state(new_plane_state,
> new_crtc_state,
> + DRM_PLANE_HELPER_NO_SCALING,
> + DRM_PLANE_HELPER_NO_SCALING,
> + false, false);
> + if (ret)
> + return ret;
> +
> + return 0;
> +}
This seems to be exactly the same check than used in the simpledrm driver.
Maybe could be moved to the fwfb helper library too ?
[...]
> +
> +static void ofdrm_crtc_helper_atomic_disable(struct drm_crtc *crtc,
> + struct drm_atomic_state *old_state)
> +{
> + /*
> + * Always enabled; disabling clears the screen in the
> + * primary plane's atomic_disable function.
> + */
> +}
> +
Same comment than for simpledrm, are these no-op helpers really needed ?
[...]
> +static const struct of_device_id ofdrm_of_match_display[] = {
> + { .compatible = "display", },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, ofdrm_of_match_display);
> +
I don't see a binding for this in Documentation/devicetree/bindings/display.
Do we need one or it's that only required for FDT and not Open Firmware DT ?
--
Best regards,
Javier Martinez Canillas
Linux Engineering
Red Hat
Re: [PATCH 1/4] drm/amd: Add detailed GFXOFF stats to debugfs
On Mon, Jul 25, 2022 at 11:03 PM Quan, Evan wrote:
>
> [AMD Official Use Only - General]
>
>
>
> > -Original Message-
> > From: André Almeida
> > Sent: Tuesday, July 26, 2022 12:15 AM
> > To: Quan, Evan ; Deucher, Alexander
> > ; Koenig, Christian
> > ; Pan, Xinhui ; David
> > Airlie ; Daniel Vetter ; Zhang, Hawking
> > ; Zhou1, Tao ; Kuehling,
> > Felix ; Xiao, Jack ; amd-
> > g...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; linux-
> > ker...@vger.kernel.org; StDenis, Tom ; Siqueira,
> > Rodrigo
> > Cc: kernel-...@igalia.com
> > Subject: Re: [PATCH 1/4] drm/amd: Add detailed GFXOFF stats to debugfs
> >
> > Às 10:04 de 25/07/22, André Almeida escreveu:
> > > Às 07:27 de 25/07/22, Quan, Evan escreveu:
> > >> [AMD Official Use Only - General]
> > >>
> > >> Using "uint64_t" instead of "uint32_t" for entry counter may be better.
> > >>
> > >
> > > Indeed, it's a good idea. I'll send a v2 with that change, thanks.
> > >
> >
> > However, SMU messaging reads a 32bit register to get the entrycount from
> > the pwfw, so would keep with with the risk of overflow anyway right?
> [Quan, Evan] Yes, that makes sense. Better to document that(the risk of
> overflow).
Still might be better to use a 64 bit number for the external
interface to be more future proof. Then we can either document the
behavior for specific chips or handle the wrap around in the driver.
Alex
> Anyway, the series seems fine to me.
> Series is acked-by: Evan Quan
> >
> > >> BR
> > >> Evan
> > >>> -Original Message-
> > >>> From: amd-gfx On Behalf Of
> > >>> André Almeida
> > >>> Sent: Saturday, July 23, 2022 4:34 AM
> > >>> To: Deucher, Alexander ; Koenig,
> > >>> Christian ; Pan, Xinhui
> > >>> ; David Airlie ; Daniel Vetter
> > >>> ; Zhang, Hawking ; Zhou1,
> > >>> Tao ; Kuehling, Felix
> > ;
> > >>> Xiao, Jack ; amd- g...@lists.freedesktop.org;
> > >>> dri-devel@lists.freedesktop.org; linux- ker...@vger.kernel.org;
> > >>> StDenis, Tom ; Siqueira, Rodrigo
> > >>>
> > >>> Cc: André Almeida ; kernel-...@igalia.com
> > >>> Subject: [PATCH 1/4] drm/amd: Add detailed GFXOFF stats to debugfs
> > >>>
> > >>> Add debugfs interface to log GFXOFF statistics:
> > >>>
> > >>> - Read amdgpu_gfxoff_count to get the total GFXOFF entry count at the
> > >>> time of query since system power-up
> > >>>
> > >>> - Write 1 to amdgpu_gfxoff_residency to start logging, and 0 to stop.
> > >>> Read it to get average GFXOFF residency % multiplied by 100
> > >>> during the last logging interval.
> > >>>
> > >>> Both features are designed to be keep the values persistent between
> > >>> suspends.
> > >>>
> > >>> Signed-off-by: André Almeida
> > >>> ---
> > >>> drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 168
> > >>> ++
> > >>> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 2 +
> > >>> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 39
> > >>> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 6 +
> > >>> drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 45 +
> > >>> drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 3 +
> > >>> drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 34 +++-
> > >>> drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 22 +++
> > >>> drivers/gpu/drm/amd/pm/swsmu/smu_internal.h | 3 +
> > >>> 9 files changed, 321 insertions(+), 1 deletion(-)
> > >>>
> > >>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> > >>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> > >>> index e2eec985adb3..edf90a9ba980 100644
> > >>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> > >>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
> > >>> @@ -1042,6 +1042,157 @@ static ssize_t
> > >>> amdgpu_debugfs_gpr_read(struct file *f, char __user *buf,
> > >>> return r;
> > >>> }
> > >>>
> > >>> +/**
> > >>> + * amdgpu_debugfs_gfxoff_residency_read - Read GFXOFF residency
> > >>> + *
> > >>> + * @f: open file handle
> > >>> + * @buf: User buffer to store read data in
> > >>> + * @size: Number of bytes to read
> > >>> + * @pos: Offset to seek to
> > >>> + *
> > >>> + * Read the last residency value logged. It doesn't auto update,
> > >>> +one needs
> > >>> to
> > >>> + * stop logging before getting the current value.
> > >>> + */
> > >>> +static ssize_t amdgpu_debugfs_gfxoff_residency_read(struct file *f,
> > >>> +char
> > >>> __user *buf,
> > >>> + size_t size, loff_t *pos)
> > >>> {
> > >>> + struct amdgpu_device *adev = file_inode(f)->i_private;
> > >>> + ssize_t result = 0;
> > >>> + int r;
> > >>> +
> > >>> + if (size & 0x3 || *pos & 0x3)
> > >>> + return -EINVAL;
> > >>> +
> > >>> + r = pm_runtime_get_sync(adev_to_drm(adev)->dev);
> > >>> + if (r < 0) {
> > >>> + pm_runtime_put_autosuspend(adev_to_drm(adev)->dev);
> > >>> + return r;
> > >>> + }
> > >>> +
> > >>> + while (size) {
> > >>> + uint32_t value;
> > >>> +
> > >>> + r = amdgpu_get_gfx_off_residency(adev, &value);
> > >>> + i
[PATCH] staging: fbtft: core: set smem_len before fb_deferred_io_init call
fb_deferred_io_init depends on smem_len being filled
to be able to initialize the virtual page lists since
commit 856082f021a2 ("fbdev: defio: fix the pagelist corruption")
Signed-off-by: Peter Suti
---
drivers/staging/fbtft/fbtft-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/staging/fbtft/fbtft-core.c
b/drivers/staging/fbtft/fbtft-core.c
index 9c4d797e7ae4..4137c1a51e1b 100644
--- a/drivers/staging/fbtft/fbtft-core.c
+++ b/drivers/staging/fbtft/fbtft-core.c
@@ -656,7 +656,6 @@ struct fb_info *fbtft_framebuffer_alloc(struct
fbtft_display *display,
fbdefio->delay = HZ / fps;
fbdefio->sort_pagelist = true;
fbdefio->deferred_io = fbtft_deferred_io;
- fb_deferred_io_init(info);
snprintf(info->fix.id, sizeof(info->fix.id), "%s", dev->driver->name);
info->fix.type = FB_TYPE_PACKED_PIXELS;
@@ -667,6 +666,7 @@ struct fb_info *fbtft_framebuffer_alloc(struct
fbtft_display *display,
info->fix.line_length =width * bpp / 8;
info->fix.accel = FB_ACCEL_NONE;
info->fix.smem_len = vmem_size;
+ fb_deferred_io_init(info);
info->var.rotate = pdata->rotate;
info->var.xres = width;
--
2.25.1
Re: [PATCH v2 08/10] drm/ofdrm: Add CRTC state
On 7/20/22 16:27, Thomas Zimmermann wrote:
> Add a dedicated CRTC state to ofdrm to later store information for
> palette updates.
>
> Signed-off-by: Thomas Zimmermann
> ---
> drivers/gpu/drm/tiny/ofdrm.c | 62 ++--
>
Reviewed-by: Javier Martinez Canillas
[...]
> +static void ofdrm_crtc_reset(struct drm_crtc *crtc)
> +{
> + struct ofdrm_crtc_state *ofdrm_crtc_state;
> +
> + if (crtc->state) {
> + ofdrm_crtc_state_destroy(to_ofdrm_crtc_state(crtc->state));
> + crtc->state = NULL; /* must be set to NULL here */
> + }
> +
> + ofdrm_crtc_state = kzalloc(sizeof(*ofdrm_crtc_state), GFP_KERNEL);
> + if (!ofdrm_crtc_state)
> + return;
> + __drm_atomic_helper_crtc_reset(crtc, &ofdrm_crtc_state->base);
> +}
> +
IMO this function is hard to read, I would instead write it as following:
static void ofdrm_crtc_reset(struct drm_crtc *crtc)
{
struct ofdrm_crtc_state *ofdrm_crtc_state =
kzalloc(sizeof(*ofdrm_crtc_state), GFP_KERNEL);
if (!ofdrm_crtc_state)
return;
if (crtc->state) {
ofdrm_crtc_state_destroy(to_ofdrm_crtc_state(crtc->state));
crtc->state = NULL; /* must be set to NULL here */
}
__drm_atomic_helper_crtc_reset(crtc, &ofdrm_crtc_state->base);
}
Also with that form I think that the crtc->state = NULL could just be dropped ?
--
Best regards,
Javier Martinez Canillas
Linux Engineering
Red Hat
Re: [PATCH v2 09/10] drm/ofdrm: Add per-model device function
On 7/20/22 16:27, Thomas Zimmermann wrote:
> Add a per-model device-function structure in preparation of adding
> color-management support. Detection of the individual models has been
> taken from fbdev's offb.
>
> Signed-off-by: Thomas Zimmermann
> ---
Reviewed-by: Javier Martinez Canillas
[...]
> +static bool is_avivo(__be32 vendor, __be32 device)
> +{
> + /* This will match most R5xx */
> + return (vendor == 0x1002) &&
> +((device >= 0x7100 && device < 0x7800) || (device >= 0x9400));
> +}
Maybe add some constant macros to not have these magic numbers ?
--
Best regards,
Javier Martinez Canillas
Linux Engineering
Red Hat
Re: [PATCH v2 10/10] drm/ofdrm: Support color management
On 7/20/22 16:27, Thomas Zimmermann wrote:
> Support the CRTC's color-management property and implement each model's
> palette support.
>
> The OF hardware has different methods of setting the palette. The
> respective code has been taken from fbdev's offb and refactored into
> per-model device functions. The device functions integrate this
> functionality into the overall modesetting.
>
> As palette handling is a CRTC property that depends on the primary
> plane's color format, the plane's atomic_check helper now updates the
> format field in ofdrm's custom CRTC state. The CRTC's atomic_flush
> helper updates the palette for the format as needed.
>
> Signed-off-by: Thomas Zimmermann
> ---
Reviewed-by: Javier Martinez Canillas
[...]
> +static void __iomem *ofdrm_mach64_cmap_ioremap(struct ofdrm_device *odev,
> +struct device_node *of_node,
> +u64 fb_base)
> +{
> + struct drm_device *dev = &odev->dev;
> + u64 address;
> + void __iomem *cmap_base;
> +
> + address = fb_base & 0xff00ul;
> + address += 0x7ff000;
> +
It would be good to know where these addresses are coming from. Maybe some
constant macros or a comment ? Same for the other places where addresses
and offsets are used.
[...]
> static struct ofdrm_crtc_state *to_ofdrm_crtc_state(struct drm_crtc_state
> *base)
> @@ -376,10 +735,12 @@ static int
> ofdrm_primary_plane_helper_atomic_check(struct drm_plane *plane,
> struct drm_atomic_state
> *new_state)
> {
> struct drm_plane_state *new_plane_state =
> drm_atomic_get_new_plane_state(new_state, plane);
> + struct drm_framebuffer *new_fb = new_plane_state->fb;
> struct drm_crtc_state *new_crtc_state;
> + struct ofdrm_crtc_state *new_ofdrm_crtc_state;
> int ret;
>
> - if (!new_plane_state->fb)
> + if (!new_fb)
> return 0;
>
> new_crtc_state = drm_atomic_get_new_crtc_state(new_state,
> new_plane_state->crtc);
> @@ -391,6 +752,14 @@ static int
> ofdrm_primary_plane_helper_atomic_check(struct drm_plane *plane,
> if (ret)
> return ret;
>
> + if (!new_plane_state->visible)
> + return 0;
> +
> + new_crtc_state = drm_atomic_get_new_crtc_state(new_state,
> new_plane_state->crtc);
> +
> + new_ofdrm_crtc_state = to_ofdrm_crtc_state(new_crtc_state);
> + new_ofdrm_crtc_state->format = new_fb->format;
> +
Ah, I understand now why you didn't factor out the .atomic_check callbacks
for the two drivers in a fwfb helper. Maybe you can also add a comment to
mention that this updates the format so the CRTC palette can be applied in
the .atomic_flush callback ?
--
Best regards,
Javier Martinez Canillas
Linux Engineering
Red Hat
Re: [fs/lock] 0064b3d9f9: BUG:kernel_NULL_pointer_dereference,address
(cc'ing dri-devel)
This looks like it died down in the DRM code. It seems doubtful that the
flock code would be affecting this, but let me know if I'm incorrect
here.
Thanks,
Jeff
On Tue, 2022-07-26 at 21:14 +0800, kernel test robot wrote:
> Greeting,
>
> FYI, we noticed the following commit (built with clang-15):
>
> commit: 0064b3d9f96f3dc466e44a6fc716910cea56dbbf ("fs/lock: Rearrange ops in
> flock syscall.")
> https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git master
>
> in testcase: boot
>
> on test machine: qemu-system-i386 -enable-kvm -cpu SandyBridge -smp 2 -m 4G
>
> caused below changes (please refer to attached dmesg/kmsg for entire
> log/backtrace):
>
>
>
> If you fix the issue, kindly add following tag
> Reported-by: kernel test robot
>
>
> [3.564403][T1] BUG: kernel NULL pointer dereference, address: 0b2c
> [3.565351][T1] #PF: supervisor read access in kernel mode
> [3.565351][T1] #PF: error_code(0x) - not-present page
> [3.565351][T1] *pde =
> [3.565351][T1] Oops: [#1]
> [3.565351][T1] CPU: 0 PID: 1 Comm: swapper Tainted: G
> T 5.19.0-rc6-4-g0064b3d9f96f #1
> [3.565351][T1] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996),
> BIOS 1.16.0-debian-1.16.0-4 04/01/2014
> [ 3.565351][ T1] EIP: drm_atomic_helper_setup_commit (??:?)
> [ 3.565351][ T1] Code: 45 ec eb b5 89 d8 83 c4 0c 5e 5f 5b 5d 31 c9 31 d2 c3
> 90 90 90 90 90 90 90 55 89 e5 53 57 56 83 ec 38 89 55 d4 89 c2 8b 40 04 <8b>
> 88 2c 07 00 00 89 4d c4 83 b8 30 05 00 00 00 89 55 ec 0f 8e fa
> All code
>
>0: 45 ec rex.RB in (%dx),%al
>2: eb b5 jmp0xffb9
>4: 89 d8 mov%ebx,%eax
>6: 83 c4 0cadd$0xc,%esp
>9: 5e pop%rsi
>a: 5f pop%rdi
>b: 5b pop%rbx
>c: 5d pop%rbp
>d: 31 c9 xor%ecx,%ecx
>f: 31 d2 xor%edx,%edx
> 11: c3 retq
> 12: 90 nop
> 13: 90 nop
> 14: 90 nop
> 15: 90 nop
> 16: 90 nop
> 17: 90 nop
> 18: 90 nop
> 19: 55 push %rbp
> 1a: 89 e5 mov%esp,%ebp
> 1c: 53 push %rbx
> 1d: 57 push %rdi
> 1e: 56 push %rsi
> 1f: 83 ec 38sub$0x38,%esp
> 22: 89 55 d4mov%edx,-0x2c(%rbp)
> 25: 89 c2 mov%eax,%edx
> 27: 8b 40 04mov0x4(%rax),%eax
> 2a:*8b 88 2c 07 00 00 mov0x72c(%rax),%ecx <--
> trapping instruction
> 30: 89 4d c4mov%ecx,-0x3c(%rbp)
> 33: 83 b8 30 05 00 00 00cmpl $0x0,0x530(%rax)
> 3a: 89 55 ecmov%edx,-0x14(%rbp)
> 3d: 0f .byte 0xf
> 3e: 8e fa mov%edx,%?
>
> Code starting with the faulting instruction
> ===
>0: 8b 88 2c 07 00 00 mov0x72c(%rax),%ecx
>6: 89 4d c4mov%ecx,-0x3c(%rbp)
>9: 83 b8 30 05 00 00 00cmpl $0x0,0x530(%rax)
> 10: 89 55 ecmov%edx,-0x14(%rbp)
> 13: 0f .byte 0xf
> 14: 8e fa mov%edx,%?
> [3.565351][T1] EAX: 0400 EBX: 401ebc64 ECX: 414f8750 EDX: 401ebc64
> [3.565351][T1] ESI: 401ebc64 EDI: 414f8750 EBP: 401ebbc8 ESP: 401ebb84
> [3.565351][T1] DS: 007b ES: 007b FS: GS: SS: 0068 EFLAGS:
> 00010206
> [3.565351][T1] CR0: 80050033 CR2: 0b2c CR3: 02e5b000 CR4: 000406d0
> [3.565351][T1] DR0: DR1: DR2: DR3:
> [3.565351][T1] DR6: fffe0ff0 DR7: 0400
> [3.565351][T1] Call Trace:
> [ 3.565351][ T1] ? __lock_acquire (lockdep.c:?)
> [ 3.565351][ T1] ? drm_atomic_helper_async_commit (??:?)
> [ 3.565351][ T1] ? drm_atomic_helper_commit (??:?)
> [ 3.565351][ T1] ? drm_get_format_info (??:?)
> [ 3.565351][ T1] ? drm_internal_framebuffer_create (??:?)
> [ 3.565351][ T1] ? lock_is_held_type (??:?)
> [ 3.565351][ T1] ? drm_mode_addfb2 (??:?)
> [ 3.565351][ T1] ? sched_clock (??:?)
> [ 3.565351][ T1] ? drm_mode_addfb (??:?)
> [ 3.565351][ T1] ? drm_client_framebuffer_create (??:?)
> [ 3.565351][ T1] ? drm_fb_helper_generic_probe (drm_fb_helper.c:?)
> [ 3.565351][ T1] ? __drm_fb_helper_initial_config_and_unlock
> (drm_fb_helper.c:?)
> [ 3.565351][ T1] ? drm_fbdev_client_hotplug (drm_fb_helper.c:?)
> [ 3.565351][ T1] ? drm_fbdev_generic_setup (??:?)
> [ 3.565351][ T1] ? vkms_init (vkms_drv.c:?)
> [ 3.565351][ T1] ? drm_sched_fence_slab_init
Re: [PATCH] drm: lcdif: change burst size to 256B
On 7/26/22 11:43, Marco Felsch wrote: FIFO underruns are seen if a AXI bus master with a higher priority do a lot of memory access. Increase the burst size to 256B to avoid such underruns and to improve the memory access efficiency. Sigh, this again ... diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c b/drivers/gpu/drm/mxsfb/lcdif_kms.c index 1bec1279c8b5..1f22ea5896d5 100644 --- a/drivers/gpu/drm/mxsfb/lcdif_kms.c +++ b/drivers/gpu/drm/mxsfb/lcdif_kms.c @@ -143,8 +143,20 @@ static void lcdif_set_mode(struct lcdif_drm_private *lcdif, u32 bus_flags) CTRLDESCL0_1_WIDTH(m->crtc_hdisplay), lcdif->base + LCDC_V8_CTRLDESCL0_1); - writel(CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb->pitches[0]), - lcdif->base + LCDC_V8_CTRLDESCL0_3); + /* +* Undocumented P_SIZE and T_SIZE bit fields but according the +* downstream kernel they control the AXI burst size. As of now there +* are two known values: +* 1 - 128Byte +* 2 - 256Byte +* +* Downstream has set the burst size to 256Byte to improve the memory +* efficiency so set it here too. This also reduces the FIFO underrun +* possibility. +*/ + ctrl = CTRLDESCL0_3_P_SIZE(2) | CTRLDESCL0_3_T_SIZE(2) | + CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb->pitches[0]); + writel(ctrl, lcdif->base + LCDC_V8_CTRLDESCL0_3); } Sometimes I wonder whether this might be some successor of MXSFB LCDIF_CTRL2n OUTSTANDING_REQS and BURST_LEN_B fields. +CC Liu, who seems to have a lot of knowledge about this IP. Reviewed-by: Marek Vasut
Re: [PATCH v4] drm/i915: stop using swiotlb
On 26/07/2022 14:12, Tvrtko Ursulin wrote:
On 25/07/2022 15:18, Robert Beckett wrote:
Calling swiotlb functions directly is nowadays considered harmful. See
https://lore.kernel.org/intel-gfx/20220711082614.ga29...@lst.de/
Replace swiotlb_max_segment() calls with dma_max_mapping_size().
In i915_gem_object_get_pages_internal() no longer consider max_segment
only if CONFIG_SWIOTLB is enabled. There can be other (iommu related)
causes of specific max segment sizes.
Cc: Christoph Hellwig
Cc: Tvrtko Ursulin
Cc: Thomas Hellstrom
Cc: Matthew Auld
v2: - restore UINT_MAX clamp in i915_sg_segment_size()
- drop PAGE_SIZE check as it will always be >= PAGE_SIZE
v3: - actually clamp to UINT_MAX in i915_sg_segment_size()
v4: - round down max segment size to PAGE_SIZE
Reviewed-by: Christoph Hellwig
Reviewed-by: Tvrtko Ursulin
Signed-off-by: Robert Beckett
---
drivers/gpu/drm/i915/gem/i915_gem_internal.c | 19 ---
drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 4 ++--
drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 2 +-
drivers/gpu/drm/i915/i915_scatterlist.h | 17 -
5 files changed, 12 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_internal.c
b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
index c698f95af15f..24f37658f1bb 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_internal.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
@@ -6,7 +6,6 @@
#include
#include
-#include
#include "i915_drv.h"
#include "i915_gem.h"
@@ -38,22 +37,12 @@ static int
i915_gem_object_get_pages_internal(struct drm_i915_gem_object *obj)
struct scatterlist *sg;
unsigned int sg_page_sizes;
unsigned int npages;
- int max_order;
+ int max_order = MAX_ORDER;
+ unsigned int max_segment;
gfp_t gfp;
- max_order = MAX_ORDER;
-#ifdef CONFIG_SWIOTLB
- if (is_swiotlb_active(obj->base.dev->dev)) {
- unsigned int max_segment;
-
- max_segment = swiotlb_max_segment();
- if (max_segment) {
- max_segment = max_t(unsigned int, max_segment,
- PAGE_SIZE) >> PAGE_SHIFT;
- max_order = min(max_order, ilog2(max_segment));
- }
- }
-#endif
+ max_segment = i915_sg_segment_size(i915->drm.dev) >> PAGE_SHIFT;
+ max_order = min(max_order, ilog2(max_segment));
gfp = GFP_KERNEL | __GFP_HIGHMEM | __GFP_RECLAIMABLE;
if (IS_I965GM(i915) || IS_I965G(i915)) {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
index 4eed3dd90ba8..34b9c76cd8e6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
@@ -194,7 +194,7 @@ static int shmem_get_pages(struct
drm_i915_gem_object *obj)
struct intel_memory_region *mem = obj->mm.region;
struct address_space *mapping = obj->base.filp->f_mapping;
const unsigned long page_count = obj->base.size / PAGE_SIZE;
- unsigned int max_segment = i915_sg_segment_size();
+ unsigned int max_segment = i915_sg_segment_size(i915->drm.dev);
struct sg_table *st;
struct sgt_iter sgt_iter;
struct page *page;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 5a5cf332d8a5..7a828c9c0f6d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -189,7 +189,7 @@ static int i915_ttm_tt_shmem_populate(struct
ttm_device *bdev,
struct drm_i915_private *i915 = container_of(bdev,
typeof(*i915), bdev);
struct intel_memory_region *mr =
i915->mm.regions[INTEL_MEMORY_SYSTEM];
struct i915_ttm_tt *i915_tt = container_of(ttm,
typeof(*i915_tt), ttm);
- const unsigned int max_segment = i915_sg_segment_size();
+ const unsigned int max_segment =
i915_sg_segment_size(i915->drm.dev);
const size_t size = (size_t)ttm->num_pages << PAGE_SHIFT;
struct file *filp = i915_tt->filp;
struct sgt_iter sgt_iter;
@@ -568,7 +568,7 @@ static struct i915_refct_sgt
*i915_ttm_tt_get_st(struct ttm_tt *ttm)
ret = sg_alloc_table_from_pages_segment(st,
ttm->pages, ttm->num_pages,
0, (unsigned long)ttm->num_pages << PAGE_SHIFT,
- i915_sg_segment_size(), GFP_KERNEL);
+ i915_sg_segment_size(i915_tt->dev), GFP_KERNEL);
if (ret) {
st->sgl = NULL;
return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
index 094f06b4ce33..dfc35905dba2 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
@@ -129,7 +129,7 @@ static void
i915_gem_object_userptr_drop_ref(struct drm_i915_gem_object *obj)
static int i915_gem_userptr_get_pages(struct drm_i915_gem_object *obj)
{
const unsigned long num_pages = obj->base.size >> PAGE_SHIFT;
- unsigne
Re: [PATCH v2 09/10] drm/ofdrm: Add per-model device function
Hello,
On Tue, Jul 26, 2022 at 03:38:37PM +0200, Javier Martinez Canillas wrote:
> On 7/20/22 16:27, Thomas Zimmermann wrote:
> > Add a per-model device-function structure in preparation of adding
> > color-management support. Detection of the individual models has been
> > taken from fbdev's offb.
> >
> > Signed-off-by: Thomas Zimmermann
> > ---
>
> Reviewed-by: Javier Martinez Canillas
>
> [...]
>
> > +static bool is_avivo(__be32 vendor, __be32 device)
> > +{
> > + /* This will match most R5xx */
> > + return (vendor == 0x1002) &&
> > + ((device >= 0x7100 && device < 0x7800) || (device >= 0x9400));
> > +}
>
> Maybe add some constant macros to not have these magic numbers ?
This is based on the existing fbdev implementation's magic numbers:
drivers/video/fbdev/offb.c: ((*did >= 0x7100 && *did < 0x7800)
||
Of course, it would be great if somebody knowledgeable could clarify
those.
Thanks
Michal
Re: [PATCH 01/20] drm/amd/display: Clean up some inconsistent indenting
Applied the series. Thanks!
Alex
On Tue, Jul 26, 2022 at 3:26 AM Jiapeng Chong
wrote:
>
> No functional modification involved.
>
> smatch warning:
>
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn32/dcn32_hwseq.c:910
> dcn32_init_hw() warn: inconsistent indenting.
>
> Reported-by: Abaci Robot
> Signed-off-by: Jiapeng Chong
> ---
> drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
> b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
> index b6bada383958..201516a62b4b 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_hwseq.c
> @@ -907,10 +907,10 @@ void dcn32_init_hw(struct dc *dc)
> dc->res_pool->hubbub->funcs->init_crb(dc->res_pool->hubbub);
>
> // Get DMCUB capabilities
> -if (dc->ctx->dmub_srv) {
> - dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv->dmub);
> - dc->caps.dmub_caps.psr = dc->ctx->dmub_srv->dmub->feature_caps.psr;
> -}
> + if (dc->ctx->dmub_srv) {
> + dc_dmub_srv_query_caps_cmd(dc->ctx->dmub_srv->dmub);
> + dc->caps.dmub_caps.psr =
> dc->ctx->dmub_srv->dmub->feature_caps.psr;
> + }
> }
>
> static int calc_mpc_flow_ctrl_cnt(const struct dc_stream_state *stream,
> --
> 2.20.1.7.g153144c
>
Re: [PATCH v2 3/5] soc: visconti: Add Toshiba Visconti DNN image processing accelerator
On Tue, Jul 26, 2022 at 06:10:37AM +, yuji2.ishik...@toshiba.co.jp wrote:
> Hi Greg
>
> Thank you for your comments.
>
> > -Original Message-
> > From: Greg KH
> > Sent: Monday, July 25, 2022 9:51 PM
> > To: ishikawa yuji(石川 悠司 ○ＲＤＣ□ＡＩＴＣ○ＥＡ開)
> >
> > Cc: Rob Herring ; Hans Verkuil ;
> > iwamatsu nobuhiro(岩松 信洋 □ＳＷＣ◯ＡＣＴ)
> > ; Jonathan Corbet ;
> > Sumit Semwal ; Christian König
> > ; linux-arm-ker...@lists.infradead.org;
> > linux-ker...@vger.kernel.org; linux-me...@vger.kernel.org;
> > dri-devel@lists.freedesktop.org; linaro-mm-...@lists.linaro.org
> > Subject: Re: [PATCH v2 3/5] soc: visconti: Add Toshiba Visconti DNN image
> > processing accelerator
> >
> > On Fri, Jul 22, 2022 at 05:28:56PM +0900, Yuji Ishikawa wrote:
> > > --- /dev/null
> > > +++ b/drivers/soc/visconti/uapi/dnn.h
> > > @@ -0,0 +1,77 @@
> > > +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
> > > +/* Toshiba Visconti DNN Accelerator Support
> > > + *
> > > + * (C) Copyright 2022 TOSHIBA CORPORATION
> > > + * (C) Copyright 2022 Toshiba Electronic Devices & Storage
> > > +Corporation */
> > > +
> > > +#ifndef _UAPI_LINUX_DNN_H
> > > +#define _UAPI_LINUX_DNN_H
> > > +
> > > +#include
> > > +#include
> > > +#include "ipa.h"
> > > +
> > > +#define DRV_DNN_BIT_CONFIG_DESC_FINAL (0x8000U)
> > > +#define DRV_DNN_BUFFER_INDEX_MAX (15)
> > > +
> > > +#define DRV_DNN_BASE_ADDR_NUM (8U) /* DNN number of base
> > address */
> > > +
> > > +#define DRV_DNN_BASE_ADDR_PURPOSE_INPUT (1U)
> > > +#define DRV_DNN_BASE_ADDR_PURPOSE_OUTPUT(2U)
> > > +#define DRV_DNN_BASE_ADDR_PURPOSE_AWB(3U)
> > > +#define DRV_DNN_BASE_ADDR_PURPOSE_TEMPORARY (4U)
> > > +
> > > +/**
> > > + * struct drv_dnn_status - DNN IPA status for IOC_IPA_GET_STATUS
> > > + *
> > > + * @state: State of driver
> > > + * @eer_cmd: Execution error command
> > > + * @eer: Execution error
> > > + * @reserved: Padding
> > > + * @eer_flags: Execution error flags
> > > + */
> > > +struct drv_dnn_status {
> > > + enum drv_ipa_state state;
> > > + __u32 eer_cmd;
> > > + __u32 eer : 1;
> > > + __u32 reserved : 31;
> >
> > bitfields will not work like this for uapi files, sorry.
>
> I'll change the type of the member eer from bitfield to bool.
bool will not work for a user/kernel api structure at all, sorry.
> > > + __u32 eer_flags[32];
> >
> > What endian is all of these? Big? Little? Unknown?
>
> The processors and accelerators are little endian in Visconti SoC.
> Do I have to use more specific type such as __le32 ?
Of course, this has to be defined as to how the hardware sees it. Why
wouldn't you specify this?
> > > +};
> > > +
> > > +struct drv_dnn_base_addr {
> > > + __u32 purpose;
> > > + union {
> > > + struct drv_ipa_addr ipa_addr;
> > > + uintptr_t list_addr;
> >
> > You really do not ever want a uintptr_t in a uapi file, that's not going to
> > be
> > portable at all. It's also not a valid kernel type :(
>
> I understand. The member list_addr should be typed "struct drv_ipa_addr*".
No, not at all, that too will not work and is not portable. Please read
the documentation in the kernel for how to write correct user/kernel
apis with ioctl structures. It is all documented there, please do not
ignore it and create an api that will be broken.
> > > + * @config_done: Flags of called configuration
> > > + * @buffer_info: Table of buffer information
> > > + * @buffer_info_num: Number of buffer_info
> > > + */
> > > +struct drv_dnn_descriptor {
> > > + struct drv_ipa_addr configuration;
> > > + __u32 configuration_offset;
> >
> > What endian are any of these?
>
> They are little endian as processors and accelerators are LE.
> Do I have to use specific type such as __le32?
Yes, as that is defined by your hardware, not the processor the kernel
is running as.
> Do we need special care for endiannesswhen userland and kernel are
> sharing data (a drv_dnn_descriptor instance) ?
Yes, why wouldn't you?
> I thought there're no endianness problem when the driver is reading/writing
> HW's 32bit registers.
Is that what you are doing here? It's impossible to tell.
For data that only crosses the user/kernel boundry, you can use the
native processor endian, but when it crosses the kernel/hardware
boundry, you HAVE to specify it as to what the hardware expects.
thanks,
greg k-h
Re: [PATCH] drm: lcdif: change burst size to 256B
On Tue, 2022-07-26 at 16:19 +0200, Marek Vasut wrote: > On 7/26/22 11:43, Marco Felsch wrote: > > FIFO underruns are seen if a AXI bus master with a higher priority > > do a > > lot of memory access. Increase the burst size to 256B to avoid such > > underruns and to improve the memory access efficiency. > > Sigh, this again ... > > > diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c > > b/drivers/gpu/drm/mxsfb/lcdif_kms.c > > index 1bec1279c8b5..1f22ea5896d5 100644 > > --- a/drivers/gpu/drm/mxsfb/lcdif_kms.c > > +++ b/drivers/gpu/drm/mxsfb/lcdif_kms.c > > @@ -143,8 +143,20 @@ static void lcdif_set_mode(struct > > lcdif_drm_private *lcdif, u32 bus_flags) > >CTRLDESCL0_1_WIDTH(m->crtc_hdisplay), > >lcdif->base + LCDC_V8_CTRLDESCL0_1); > > > > - writel(CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb- > > >pitches[0]), > > - lcdif->base + LCDC_V8_CTRLDESCL0_3); > > + /* > > +* Undocumented P_SIZE and T_SIZE bit fields but according the > > +* downstream kernel they control the AXI burst size. As of now > > there I'm not sure if it is AXI burst size or any other burst size, though it seems to be AXI burst size. Cc'ing Jian who mentioned 'burst size' and changed it from 128B to 256B in the downstream kernel. > > +* are two known values: > > +* 1 - 128Byte > > +* 2 - 256Byte > > +* > > +* Downstream has set the burst size to 256Byte to improve the > > memory > > +* efficiency so set it here too. This also reduces the FIFO > > underrun > > +* possibility. > > +*/ > > + ctrl = CTRLDESCL0_3_P_SIZE(2) | CTRLDESCL0_3_T_SIZE(2) | > > + CTRLDESCL0_3_PITCH(lcdif->crtc.primary->state->fb- > > >pitches[0]); > > + writel(ctrl, lcdif->base + LCDC_V8_CTRLDESCL0_3); Nit: I would write the register directly, instead of caching the value in ctrl. > > } > > Sometimes I wonder whether this might be some successor of MXSFB > LCDIF_CTRL2n OUTSTANDING_REQS and BURST_LEN_B fields. No idea... Liu Ying > > +CC Liu, who seems to have a lot of knowledge about this IP. > > Reviewed-by: Marek Vasut
[Bug 216277] X11 doesn't wait for amdgpu driver to be up
https://bugzilla.kernel.org/show_bug.cgi?id=216277 --- Comment #6 from dark_syl...@yahoo.com.ar --- OK today it happened again so changing 78-graphics-card.rules did not fix it. I just found this: https://bbs.archlinux.org/viewtopic.php?id=260525 Which leads me to this: https://github.com/sddm/sddm/issues/1316 Apparently SDDM was having the same issue and the "fix" was to add QThread::sleep(1); Does the Kernel have an interface to know if a GPU driver will be or is being loaded and get notified when it's done? I assumed there was, but looking at those threads it appears there is not and graphical initialization is basically just YOLO? -- You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.
Re: [PATCH] drm/simpledrm: Fix return type of simpledrm_simple_display_pipe_mode_valid()
Hi
Am 26.07.22 um 02:12 schrieb Sami Tolvanen:
On Mon, Jul 25, 2022 at 4:37 PM Nathan Chancellor wrote:
When booting a kernel compiled with clang's CFI protection
(CONFIG_CFI_CLANG), there is a CFI failure in
drm_simple_kms_crtc_mode_valid() when trying to call
simpledrm_simple_display_pipe_mode_valid() through ->mode_valid():
[0.322802] CFI failure (target:
simpledrm_simple_display_pipe_mode_valid+0x0/0x8):
...
[0.324928] Call trace:
[0.324969] __ubsan_handle_cfi_check_fail+0x58/0x60
[0.325053] __cfi_check_fail+0x3c/0x44
[0.325120] __cfi_slowpath_diag+0x178/0x200
[0.325192] drm_simple_kms_crtc_mode_valid+0x58/0x80
[0.325279] __drm_helper_update_and_validate+0x31c/0x464
...
The ->mode_valid() member in 'struct drm_simple_display_pipe_funcs'
expects a return type of 'enum drm_mode_status', not 'int'. Correct it
to fix the CFI failure.
Cc: sta...@vger.kernel.org
Fixes: 11e8f5fd223b ("drm: Add simpledrm driver")
Link: https://github.com/ClangBuiltLinux/linux/issues/1647
Reported-by: Tomasz Paweł Gajc
Signed-off-by: Nathan Chancellor
---
drivers/gpu/drm/tiny/simpledrm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tiny/simpledrm.c b/drivers/gpu/drm/tiny/simpledrm.c
index 768242a78e2b..5422363690e7 100644
--- a/drivers/gpu/drm/tiny/simpledrm.c
+++ b/drivers/gpu/drm/tiny/simpledrm.c
@@ -627,7 +627,7 @@ static const struct drm_connector_funcs
simpledrm_connector_funcs = {
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
};
-static int
+static enum drm_mode_status
simpledrm_simple_display_pipe_mode_valid(struct drm_simple_display_pipe *pipe,
const struct drm_display_mode *mode)
{
Thanks for fixing this, Nathan! The patch looks correct to me.
Reviewed-by: Sami Tolvanen
Thanks a lot. I've added the patch to drm-misc-fixes.
Best regards
Thomas
Sami
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Ivo Totev
OpenPGP_signature
Description: OpenPGP digital signature
[PATCH v5] drm/i915: stop using swiotlb
Calling swiotlb functions directly is nowadays considered harmful. See
https://lore.kernel.org/intel-gfx/20220711082614.ga29...@lst.de/
Replace swiotlb_max_segment() calls with dma_max_mapping_size().
In i915_gem_object_get_pages_internal() no longer consider max_segment
only if CONFIG_SWIOTLB is enabled. There can be other (iommu related)
causes of specific max segment sizes.
Cc: Christoph Hellwig
Cc: Tvrtko Ursulin
Cc: Thomas Hellstrom
Cc: Matthew Auld
v2: - restore UINT_MAX clamp in i915_sg_segment_size()
- drop PAGE_SIZE check as it will always be >= PAGE_SIZE
v3: - actually clamp to UINT_MAX in i915_sg_segment_size()
v4: - round down max segment size to PAGE_SIZE
v5: - fix checkpatch whitespace issue
Reviewed-by: Christoph Hellwig
Reviewed-by: Tvrtko Ursulin
Signed-off-by: Robert Beckett
---
drivers/gpu/drm/i915/gem/i915_gem_internal.c | 19 ---
drivers/gpu/drm/i915/gem/i915_gem_shmem.c| 2 +-
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 4 ++--
drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 2 +-
drivers/gpu/drm/i915/i915_scatterlist.h | 16
5 files changed, 12 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_internal.c
b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
index c698f95af15f..24f37658f1bb 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_internal.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
@@ -6,7 +6,6 @@
#include
#include
-#include
#include "i915_drv.h"
#include "i915_gem.h"
@@ -38,22 +37,12 @@ static int i915_gem_object_get_pages_internal(struct
drm_i915_gem_object *obj)
struct scatterlist *sg;
unsigned int sg_page_sizes;
unsigned int npages;
- int max_order;
+ int max_order = MAX_ORDER;
+ unsigned int max_segment;
gfp_t gfp;
- max_order = MAX_ORDER;
-#ifdef CONFIG_SWIOTLB
- if (is_swiotlb_active(obj->base.dev->dev)) {
- unsigned int max_segment;
-
- max_segment = swiotlb_max_segment();
- if (max_segment) {
- max_segment = max_t(unsigned int, max_segment,
- PAGE_SIZE) >> PAGE_SHIFT;
- max_order = min(max_order, ilog2(max_segment));
- }
- }
-#endif
+ max_segment = i915_sg_segment_size(i915->drm.dev) >> PAGE_SHIFT;
+ max_order = min(max_order, ilog2(max_segment));
gfp = GFP_KERNEL | __GFP_HIGHMEM | __GFP_RECLAIMABLE;
if (IS_I965GM(i915) || IS_I965G(i915)) {
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
index 4eed3dd90ba8..34b9c76cd8e6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
@@ -194,7 +194,7 @@ static int shmem_get_pages(struct drm_i915_gem_object *obj)
struct intel_memory_region *mem = obj->mm.region;
struct address_space *mapping = obj->base.filp->f_mapping;
const unsigned long page_count = obj->base.size / PAGE_SIZE;
- unsigned int max_segment = i915_sg_segment_size();
+ unsigned int max_segment = i915_sg_segment_size(i915->drm.dev);
struct sg_table *st;
struct sgt_iter sgt_iter;
struct page *page;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 5a5cf332d8a5..7a828c9c0f6d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -189,7 +189,7 @@ static int i915_ttm_tt_shmem_populate(struct ttm_device
*bdev,
struct drm_i915_private *i915 = container_of(bdev, typeof(*i915), bdev);
struct intel_memory_region *mr = i915->mm.regions[INTEL_MEMORY_SYSTEM];
struct i915_ttm_tt *i915_tt = container_of(ttm, typeof(*i915_tt), ttm);
- const unsigned int max_segment = i915_sg_segment_size();
+ const unsigned int max_segment = i915_sg_segment_size(i915->drm.dev);
const size_t size = (size_t)ttm->num_pages << PAGE_SHIFT;
struct file *filp = i915_tt->filp;
struct sgt_iter sgt_iter;
@@ -568,7 +568,7 @@ static struct i915_refct_sgt *i915_ttm_tt_get_st(struct
ttm_tt *ttm)
ret = sg_alloc_table_from_pages_segment(st,
ttm->pages, ttm->num_pages,
0, (unsigned long)ttm->num_pages << PAGE_SHIFT,
- i915_sg_segment_size(), GFP_KERNEL);
+ i915_sg_segment_size(i915_tt->dev), GFP_KERNEL);
if (ret) {
st->sgl = NULL;
return ERR_PTR(ret);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
index 094f06b4ce33..dfc35905dba2 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
@@ -129,7 +129,7 @@ static void i915_gem_object_userptr_drop_ref(struct
drm_i915_gem_object *obj)
static int i915_gem_userptr_get
Re: [PATCH] staging: fbtft: core: set smem_len before fb_deferred_io_init call
Thanks for the patch.
On Tue, Jul 26, 2022 at 10:21:13AM +0200, Peter Suti wrote:
> fb_deferred_io_init depends on smem_len being filled
> to be able to initialize the virtual page lists since
> commit 856082f021a2 ("fbdev: defio: fix the pagelist corruption")
>
This code has changed since then so the patch needs to be updated.
The patch is still necessary but the bug will look different now
because there was a WARN_ON() added.
Currently the commit message does not say how this bug looks like to the
user. Also the use a Fixes tag. Something like this:
The fbtft_framebuffer_alloc() calls fb_deferred_io_init() before
initializing info->fix.smem_len. It is set to zero by the
framebuffer_alloc() function. It will trigger a WARN_ON() at the
start of fb_deferred_io_init() and the function will not do anything.
Fixes: 856082f021a2 ("fbdev: defio: fix the pagelist corruption")
Signed-off-by:
Make sure you CC the original author (Chuansheng Liu) so they can review
the bug fix.
Google used to give good guides for how to send a v2 patch but now the
first page is just useless. :/
regards,
dan carpenter
> Signed-off-by: Peter Suti
> ---
> drivers/staging/fbtft/fbtft-core.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/staging/fbtft/fbtft-core.c
> b/drivers/staging/fbtft/fbtft-core.c
> index 9c4d797e7ae4..4137c1a51e1b 100644
> --- a/drivers/staging/fbtft/fbtft-core.c
> +++ b/drivers/staging/fbtft/fbtft-core.c
> @@ -656,7 +656,6 @@ struct fb_info *fbtft_framebuffer_alloc(struct
> fbtft_display *display,
> fbdefio->delay = HZ / fps;
> fbdefio->sort_pagelist = true;
> fbdefio->deferred_io = fbtft_deferred_io;
> - fb_deferred_io_init(info);
>
> snprintf(info->fix.id, sizeof(info->fix.id), "%s", dev->driver->name);
> info->fix.type = FB_TYPE_PACKED_PIXELS;
> @@ -667,6 +666,7 @@ struct fb_info *fbtft_framebuffer_alloc(struct
> fbtft_display *display,
> info->fix.line_length =width * bpp / 8;
> info->fix.accel = FB_ACCEL_NONE;
> info->fix.smem_len = vmem_size;
> + fb_deferred_io_init(info);
>
> info->var.rotate = pdata->rotate;
> info->var.xres = width;
> --
> 2.25.1
>
[PATCH] drm/ttm: Fix dummy res NULL ptr deref bug
Check the bo->resource value before accessing the resource mem_type. [ 40.191227][ T184] general protection fault, probably for non-canonical address 0xdc02: [#1] SMP KASAN PTI [ 40.192995][ T184] KASAN: null-ptr-deref in range [0x0010-0x0017] [ 40.194411][ T184] CPU: 1 PID: 184 Comm: systemd-udevd Not tainted 5.19.0-rc4-00721-gb297c22b7070 #1 [ 40.196063][ T184] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.16.0-debian-1.16.0-4 04/01/2014 [ 40.199605][ T184] RIP: 0010:ttm_bo_validate+0x1b3/0x240 [ttm] [ 40.200754][ T184] Code: e8 72 c5 ff ff 83 f8 b8 74 d4 85 c0 75 54 49 8b 9e 58 01 00 00 48 b8 00 00 00 00 00 fc ff df 48 8d 7b 10 48 89 fa 48 c1 ea 03 <0f> b6 04 02 84 c0 74 04 3c 03 7e 44 8b 53 10 31 c0 85 d2 0f 85 58 [ 40.203685][ T184] RSP: 0018:c96df0c8 EFLAGS: 00010202 [ 40.204630][ T184] RAX: dc00 RBX: RCX: 11102f4bb71b [ 40.205864][ T184] RDX: 0002 RSI: c96df208 RDI: 0010 [ 40.207102][ T184] RBP: 192dbe1a R08: c96df208 R09: [ 40.208394][ T184] R10: 88817a5f R11: 0001 R12: c96df110 [ 40.209692][ T184] R13: c96df0f0 R14: 88817a5db800 R15: c96df208 [ 40.210862][ T184] FS: 7f6b1d16e8c0() GS:88839d70() knlGS: [ 40.212250][ T184] CS: 0010 DS: ES: CR0: 80050033 [ 40.213275][ T184] CR2: 55a1001d4ff0 CR3: 0001700f4000 CR4: 06e0 [ 40.214469][ T184] Call Trace: [ 40.214974][ T184] [ 40.215438][ T184] ? ttm_bo_bounce_temp_buffer+0x140/0x140 [ttm] [ 40.216572][ T184] ? mutex_spin_on_owner+0x240/0x240 [ 40.217456][ T184] ? drm_vma_offset_add+0xaa/0x100 [drm] [ 40.218457][ T184] ttm_bo_init_reserved+0x3d6/0x540 [ttm] [ 40.219410][ T184] ? shmem_get_inode+0x744/0x980 [ 40.220231][ T184] ttm_bo_init_validate+0xb1/0x200 [ttm] [ 40.221172][ T184] ? bo_driver_evict_flags+0x340/0x340 [drm_vram_helper] [ 40.222530][ T184] ? ttm_bo_init_reserved+0x540/0x540 [ttm] [ 40.223643][ T184] ? __do_sys_finit_module+0x11a/0x1c0 [ 40.224654][ T184] ? __shmem_file_setup+0x102/0x280 [ 40.234764][ T184] drm_gem_vram_create+0x305/0x480 [drm_vram_helper] [ 40.235766][ T184] ? bo_driver_evict_flags+0x340/0x340 [drm_vram_helper] [ 40.236846][ T184] ? __kasan_slab_free+0x108/0x180 [ 40.237650][ T184] drm_gem_vram_fill_create_dumb+0x134/0x340 [drm_vram_helper] [ 40.238864][ T184] ? local_pci_probe+0xdf/0x180 [ 40.239674][ T184] ? drmm_vram_helper_init+0x400/0x400 [drm_vram_helper] [ 40.240826][ T184] drm_client_framebuffer_create+0x19c/0x400 [drm] [ 40.241955][ T184] ? drm_client_buffer_delete+0x200/0x200 [drm] [ 40.243001][ T184] ? drm_client_pick_crtcs+0x554/0xb80 [drm] [ 40.244030][ T184] drm_fb_helper_generic_probe+0x23f/0x940 [drm_kms_helper] [ 40.245226][ T184] ? __cond_resched+0x1c/0xc0 [ 40.245987][ T184] ? drm_fb_helper_memory_range_to_clip+0x180/0x180 [drm_kms_helper] [ 40.247316][ T184] ? mutex_unlock+0x80/0x100 [ 40.248005][ T184] ? __mutex_unlock_slowpath+0x2c0/0x2c0 [ 40.249083][ T184] drm_fb_helper_single_fb_probe+0x907/0xf00 [drm_kms_helper] [ 40.250314][ T184] ? drm_fb_helper_check_var+0x1180/0x1180 [drm_kms_helper] [ 40.251540][ T184] ? __cond_resched+0x1c/0xc0 [ 40.252321][ T184] ? mutex_lock+0x9f/0x100 [ 40.253062][ T184] __drm_fb_helper_initial_config_and_unlock+0xb9/0x2c0 [drm_kms_helper] [ 40.254394][ T184] drm_fbdev_client_hotplug+0x56f/0x840 [drm_kms_helper] [ 40.255477][ T184] drm_fbdev_generic_setup+0x165/0x3c0 [drm_kms_helper] [ 40.256607][ T184] bochs_pci_probe+0x6b7/0x900 [bochs] [ 40.257515][ T184] ? _raw_spin_lock_irqsave+0x87/0x100 [ 40.258312][ T184] ? bochs_hw_init+0x480/0x480 [bochs] [ 40.259244][ T184] ? bochs_hw_init+0x480/0x480 [bochs] [ 40.260186][ T184] local_pci_probe+0xdf/0x180 [ 40.260928][ T184] pci_call_probe+0x15f/0x500 [ 40.265798][ T184] ? _raw_spin_lock+0x81/0x100 [ 40.266508][ T184] ? pci_pm_suspend_noirq+0x980/0x980 [ 40.267322][ T184] ? pci_assign_irq+0x81/0x280 [ 40.268096][ T184] ? pci_match_device+0x351/0x6c0 [ 40.268883][ T184] ? kernfs_put+0x18/0x40 [ 40.269611][ T184] pci_device_probe+0xee/0x240 [ 40.270352][ T184] really_probe+0x435/0xa80 [ 40.271021][ T184] __driver_probe_device+0x2ab/0x480 [ 40.271828][ T184] driver_probe_device+0x49/0x140 [ 40.272627][ T184] __driver_attach+0x1bd/0x4c0 [ 40.273372][ T184] ? __device_attach_driver+0x240/0x240 [ 40.274273][ T184] bus_for_each_dev+0x11e/0x1c0 [ 40.275080][ T184] ? subsys_dev_iter_exit+0x40/0x40 [ 40.275951][ T184] ? klist_add_tail+0x132/0x280 [ 40.276767][ T184] bus_add_driver+0x39b/0x580 [ 40.277574][ T184] driver_register+0x20f/0x3c0 [ 40.278281][ T184] ? 0xc0
Re: [Freedreno] [PATCH v2 1/1] drm/msm/a6xx: Fix null pointer access in a6xx_get_indexed_registers
On Mon, Jul 25, 2022 at 9:46 PM wrote:
>
> From: Akhil P Oommen
>
> Fix a null pointer access when memory allocation fails in
> a6xx_get_indexed_registers().
>
> Change-Id: I33e13745cd8e5841d2f377f48a199af98be2ed02
> Signed-off-by: Akhil P Oommen
> Signed-off-by: Devi prasad Dhamarasingi
> ---
>
> Changes in v2:
> - Corrected the signoff name and email id.
>
> drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
> b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
> index 55f443328d8e..507074f6222c 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
> @@ -952,6 +952,12 @@ static void a6xx_get_indexed_registers(struct msm_gpu
> *gpu,
> a6xx_get_indexed_regs(gpu, a6xx_state, &a6xx_cp_mempool_indexed,
> &a6xx_state->indexed_regs[i]);
>
> + if (!a6xx_state->indexed_regs[i].data) {
> + gpu_write(gpu, REG_A6XX_CP_MEM_POOL_SIZE, mempool_size);
> + a6xx_state->nr_indexed_regs = count - 1;
> + return;
> + }
Hmm, I don't see us adjusting nr_indexed_regs if any of the earlier
sections fails, so I don't think we need to do that here either. So I
think you could just:
if (a6xx_state->indexed_regs[i].data)
a6xx_state->indexed_regs[i].data[0x2000] = mempool_size;
And I kinda expect if there was an allocation failure we'd just end up
dereferencing a null ptr later in the show path.
But, I think in general you can assume small GFP_KERNEL allocations
will never fail. If necessary they will block for reclaim/shrinker to
free up some memory or evict some pages to swap. If you've gotten to
the point where even that isn't possible, then a null ptr deref is
really the least of your problems ;-)
BR,
-R
> +
> /*
> * Offset 0x2000 in the mempool is the size - copy the saved size over
> * so the data is consistent
> --
> 2.37.0
>
[PATCH 00/10] Add RCar DU lib support
Adding RCar DU lib support(Encoder, vsp and KMS) proved that it can save
50% code saving on RZ/G2L compared to patch series [1].
The current patchset contains just movement of codes with some trivial changes.
The subsequent patch series will have more additions to vsp and kms library.
There is also plan to add library support for DU DRM and DU CRTC
(Not yet ready/tested), which will further increase the common code.
Current patch set + subsequent patch sets are tested on both RZ/G2M, RZ/G1N and
RZ/G2L.
[1]
https://lore.kernel.org/linux-renesas-soc/os0pr01mb59226ce75483ad2b96833b3786...@os0pr01mb5922.jpnprd01.prod.outlook.com/T/#t
Biju Das (10):
drm: rcar-du: Add RZ/G2L reset and clocks to struct rcar_du_crtc
drm: rcar-du: Add encoder lib support
drm: rcar-du: Add kms lib support
drm: rcar-du: Add vsp lib support
drm: rcar-du: Move rcar_du_vsp_atomic_begin()
drm: rcar-du: Move rcar_du_vsp_atomic_flush()
drm: rcar-du: Move vsp rcar_du_vsp_{map,unmap}_fb()
drm: rcar-du: Move rcar_du_dumb_create()
drm: rcar-du: Move rcar_du_gem_prime_import_sg_table()
drm: rcar-du: Add rcar_du_lib_vsp_init()
drivers/gpu/drm/rcar-du/Kconfig | 10 +
drivers/gpu/drm/rcar-du/Makefile | 4 +
drivers/gpu/drm/rcar-du/rcar_du_crtc.h| 10 +
drivers/gpu/drm/rcar-du/rcar_du_encoder.c | 120 +-
drivers/gpu/drm/rcar-du/rcar_du_encoder.h | 14 +-
drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.c | 138 ++
drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.h | 30 ++
drivers/gpu/drm/rcar-du/rcar_du_kms.c | 356
drivers/gpu/drm/rcar-du/rcar_du_kms.h | 31 +-
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 394 ++
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 42 ++
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 249 +--
drivers/gpu/drm/rcar-du/rcar_du_vsp.h | 66 +--
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 288 +
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 93 +
15 files changed, 1020 insertions(+), 825 deletions(-)
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.c
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.h
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
--
2.25.1
[PATCH 04/10] drm: rcar-du: Add vsp lib support
Add RCar DU vsp lib support by moving rcar_du_vsp_disable()
to the lib file so that same function can be used by both
RCar and RZ/G2L DU VSP drivers.
Signed-off-by: Biju Das
---
drivers/gpu/drm/rcar-du/Kconfig | 5 ++
drivers/gpu/drm/rcar-du/Makefile | 1 +
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 5 --
drivers/gpu/drm/rcar-du/rcar_du_vsp.h | 47 +
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 40 ++
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 64 +++
6 files changed, 111 insertions(+), 51 deletions(-)
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
diff --git a/drivers/gpu/drm/rcar-du/Kconfig b/drivers/gpu/drm/rcar-du/Kconfig
index 684462c40ae3..f8e1341be5f8 100644
--- a/drivers/gpu/drm/rcar-du/Kconfig
+++ b/drivers/gpu/drm/rcar-du/Kconfig
@@ -76,3 +76,8 @@ config DRM_RCAR_LIB
bool
default y
depends on DRM_RCAR_DU
+
+config DRM_RCAR_VSP_LIB
+ bool
+ default y
+ depends on DRM_RCAR_VSP
diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile
index bcded406b16c..cee1f69926db 100644
--- a/drivers/gpu/drm/rcar-du/Makefile
+++ b/drivers/gpu/drm/rcar-du/Makefile
@@ -10,6 +10,7 @@ rcar-du-drm-$(CONFIG_DRM_RCAR_LIB) += rcar_du_encoder_lib.o \
rcar_du_kms_lib.o
rcar-du-drm-$(CONFIG_DRM_RCAR_VSP) += rcar_du_vsp.o
+rcar-du-drm-$(CONFIG_DRM_RCAR_VSP_LIB) += rcar_du_vsp_lib.o
rcar-du-drm-$(CONFIG_DRM_RCAR_WRITEBACK) += rcar_du_writeback.o
obj-$(CONFIG_DRM_RCAR_CMM) += rcar_cmm.o
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index dbc68cdabcff..b84d120b6ce0 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -89,11 +89,6 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc)
vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
}
-void rcar_du_vsp_disable(struct rcar_du_crtc *crtc)
-{
- vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, NULL);
-}
-
void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc)
{
vsp1_du_atomic_begin(crtc->vsp->vsp, crtc->vsp_pipe);
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
index 67630f0b6599..04d1c1416b16 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
@@ -10,56 +10,12 @@
#ifndef __RCAR_DU_VSP_H__
#define __RCAR_DU_VSP_H__
-#include
-
-struct drm_framebuffer;
-struct rcar_du_format_info;
-struct rcar_du_vsp;
-struct sg_table;
-
-struct rcar_du_vsp_plane {
- struct drm_plane plane;
- struct rcar_du_vsp *vsp;
- unsigned int index;
-};
-
-struct rcar_du_vsp {
- unsigned int index;
- struct device *vsp;
- struct rcar_du_device *dev;
- struct rcar_du_vsp_plane *planes;
- unsigned int num_planes;
-};
-
-static inline struct rcar_du_vsp_plane *to_rcar_vsp_plane(struct drm_plane *p)
-{
- return container_of(p, struct rcar_du_vsp_plane, plane);
-}
-
-/**
- * struct rcar_du_vsp_plane_state - Driver-specific plane state
- * @state: base DRM plane state
- * @format: information about the pixel format used by the plane
- * @sg_tables: scatter-gather tables for the frame buffer memory
- */
-struct rcar_du_vsp_plane_state {
- struct drm_plane_state state;
-
- const struct rcar_du_format_info *format;
- struct sg_table sg_tables[3];
-};
-
-static inline struct rcar_du_vsp_plane_state *
-to_rcar_vsp_plane_state(struct drm_plane_state *state)
-{
- return container_of(state, struct rcar_du_vsp_plane_state, state);
-}
+#include "rcar_du_vsp_lib.h"
#ifdef CONFIG_DRM_RCAR_VSP
int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
unsigned int crtcs);
void rcar_du_vsp_enable(struct rcar_du_crtc *crtc);
-void rcar_du_vsp_disable(struct rcar_du_crtc *crtc);
void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc);
void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc);
int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
@@ -74,7 +30,6 @@ static inline int rcar_du_vsp_init(struct rcar_du_vsp *vsp,
return -ENXIO;
}
static inline void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) { };
-static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { };
static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { };
static inline void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc) { };
static inline int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp,
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
new file mode 100644
index ..045ec55e87f5
--- /dev/null
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
@@ -0,0 +1,40 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * R-Car Display Unit VSP-Based
[PATCH 05/10] drm: rcar-du: Move rcar_du_vsp_atomic_begin()
Move rcar_du_vsp_atomic_begin() to RCar DU VSP lib.
Signed-off-by: Biju Das
---
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 5 -
drivers/gpu/drm/rcar-du/rcar_du_vsp.h | 2 --
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 5 +
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 2 ++
4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index b84d120b6ce0..dfcdf9285512 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -89,11 +89,6 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc)
vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
}
-void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc)
-{
- vsp1_du_atomic_begin(crtc->vsp->vsp, crtc->vsp_pipe);
-}
-
void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc)
{
struct vsp1_du_atomic_pipe_config cfg = { { 0, } };
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
index 04d1c1416b16..842205b4e16e 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
@@ -16,7 +16,6 @@
int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
unsigned int crtcs);
void rcar_du_vsp_enable(struct rcar_du_crtc *crtc);
-void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc);
void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc);
int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
struct sg_table sg_tables[3]);
@@ -30,7 +29,6 @@ static inline int rcar_du_vsp_init(struct rcar_du_vsp *vsp,
return -ENXIO;
}
static inline void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) { };
-static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { };
static inline void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc) { };
static inline int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp,
struct drm_framebuffer *fb,
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
index 045ec55e87f5..116a50cb0f70 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
@@ -38,3 +38,8 @@ void rcar_du_vsp_disable(struct rcar_du_crtc *crtc)
{
vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, NULL);
}
+
+void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc)
+{
+ vsp1_du_atomic_begin(crtc->vsp->vsp, crtc->vsp_pipe);
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
index 6c0aff046cdf..024ebd5f98aa 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
@@ -57,8 +57,10 @@ to_rcar_vsp_plane_state(struct drm_plane_state *state)
#ifdef CONFIG_DRM_RCAR_VSP
void rcar_du_vsp_disable(struct rcar_du_crtc *crtc);
+void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc);
#else
static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { };
+static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { };
#endif
#endif /* __RCAR_DU_VSP_LIB_H__ */
--
2.25.1
[PATCH 01/10] drm: rcar-du: Add RZ/G2L reset and clocks to struct rcar_du_crtc
Add RZ/G2L reset and clocks to struct rcar_du_crtc, so that
we can share and optimize the common code between RCar and
RZ/G2L driver using RCar DU library.
Signed-off-by: Biju Das
---
drivers/gpu/drm/rcar-du/rcar_du_crtc.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
index d0f38a8b3561..d2164ee6e599 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.h
@@ -43,6 +43,8 @@ struct rcar_du_vsp;
* @vsp: VSP feeding video to this CRTC
* @vsp_pipe: index of the VSP pipeline feeding video to this CRTC
* @writeback: the writeback connector
+ * @rzg2l_clocks: the bus, main and video clock
+ * @rstc: reset controller
*/
struct rcar_du_crtc {
struct drm_crtc crtc;
@@ -73,6 +75,14 @@ struct rcar_du_crtc {
unsigned int sources_count;
struct drm_writeback_connector writeback;
+
+ /* RZ/G2L specific */
+ struct reset_control *rstc;
+ struct {
+ struct clk *aclk;
+ struct clk *pclk;
+ struct clk *dclk;
+ } rzg2l_clocks;
};
#define to_rcar_crtc(c)container_of(c, struct rcar_du_crtc,
crtc)
--
2.25.1
[PATCH 03/10] drm: rcar-du: Add kms lib support
Add RCar DU kms lib support by moving rcar_du_format_infos table and
rcar_du_format_infos() to the lib file to share the common code between
RCar and RZ/G2L DU KMS drivers.
Signed-off-by: Biju Das
---
drivers/gpu/drm/rcar-du/Makefile | 3 +-
drivers/gpu/drm/rcar-du/rcar_du_kms.c | 290 ---
drivers/gpu/drm/rcar-du/rcar_du_kms.h | 24 +-
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 324 ++
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 35 +++
5 files changed, 363 insertions(+), 313 deletions(-)
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile
index 651da6a7ad67..bcded406b16c 100644
--- a/drivers/gpu/drm/rcar-du/Makefile
+++ b/drivers/gpu/drm/rcar-du/Makefile
@@ -6,7 +6,8 @@ rcar-du-drm-y := rcar_du_crtc.o \
rcar_du_kms.o \
rcar_du_plane.o \
-rcar-du-drm-$(CONFIG_DRM_RCAR_LIB) += rcar_du_encoder_lib.o
+rcar-du-drm-$(CONFIG_DRM_RCAR_LIB) += rcar_du_encoder_lib.o \
+ rcar_du_kms_lib.o
rcar-du-drm-$(CONFIG_DRM_RCAR_VSP) += rcar_du_vsp.o
rcar-du-drm-$(CONFIG_DRM_RCAR_WRITEBACK) += rcar_du_writeback.o
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index 761451ee5263..b63808025578 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -33,296 +33,6 @@
#include "rcar_du_vsp.h"
#include "rcar_du_writeback.h"
-/*
-
- * Format helpers
- */
-
-static const struct rcar_du_format_info rcar_du_format_infos[] = {
- {
- .fourcc = DRM_FORMAT_RGB565,
- .v4l2 = V4L2_PIX_FMT_RGB565,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
- .edf = PnDDCR4_EDF_NONE,
- }, {
- .fourcc = DRM_FORMAT_ARGB1555,
- .v4l2 = V4L2_PIX_FMT_ARGB555,
- .bpp = 16,
- .planes = 1,
- .hsub = 1,
- .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
- .edf = PnDDCR4_EDF_NONE,
- }, {
- .fourcc = DRM_FORMAT_XRGB1555,
- .v4l2 = V4L2_PIX_FMT_XRGB555,
- .bpp = 16,
- .planes = 1,
- .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
- .edf = PnDDCR4_EDF_NONE,
- }, {
- .fourcc = DRM_FORMAT_XRGB,
- .v4l2 = V4L2_PIX_FMT_XBGR32,
- .bpp = 32,
- .planes = 1,
- .hsub = 1,
- .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
- .edf = PnDDCR4_EDF_RGB888,
- }, {
- .fourcc = DRM_FORMAT_ARGB,
- .v4l2 = V4L2_PIX_FMT_ABGR32,
- .bpp = 32,
- .planes = 1,
- .hsub = 1,
- .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
- .edf = PnDDCR4_EDF_ARGB,
- }, {
- .fourcc = DRM_FORMAT_UYVY,
- .v4l2 = V4L2_PIX_FMT_UYVY,
- .bpp = 16,
- .planes = 1,
- .hsub = 2,
- .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
- .edf = PnDDCR4_EDF_NONE,
- }, {
- .fourcc = DRM_FORMAT_YUYV,
- .v4l2 = V4L2_PIX_FMT_YUYV,
- .bpp = 16,
- .planes = 1,
- .hsub = 2,
- .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
- .edf = PnDDCR4_EDF_NONE,
- }, {
- .fourcc = DRM_FORMAT_NV12,
- .v4l2 = V4L2_PIX_FMT_NV12M,
- .bpp = 12,
- .planes = 2,
- .hsub = 2,
- .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
- .edf = PnDDCR4_EDF_NONE,
- }, {
- .fourcc = DRM_FORMAT_NV21,
- .v4l2 = V4L2_PIX_FMT_NV21M,
- .bpp = 12,
- .planes = 2,
- .hsub = 2,
- .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
- .edf = PnDDCR4_EDF_NONE,
- }, {
- .fourcc = DRM_FORMAT_NV16,
- .v4l2 = V4L2_PIX_FMT_NV16M,
- .bpp = 16,
- .planes = 2,
- .hsub = 2,
- .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
- .edf = PnDDCR4_EDF_NONE,
- },
- /*
-* The following formats are not supported on Gen2 and thus have no
-* associated .pnmr or .edf settings.
-*/
- {
- .fourcc = DRM_FORMAT_RGB332,
- .v4l2 = V4L2_PIX_FMT_RGB332,
- .bpp = 8,
- .planes = 1,
- .hsub = 1,
- }, {
- .fourcc = DRM_FORMAT_ARGB,
-
[PATCH 06/10] drm: rcar-du: Move rcar_du_vsp_atomic_flush()
Move rcar_du_vsp_atomic_flush() to RCar DU vsp lib.
Signed-off-by: Biju Das
---
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 13 -
drivers/gpu/drm/rcar-du/rcar_du_vsp.h | 2 --
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 13 +
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 2 ++
4 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index dfcdf9285512..becc587c5169 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -89,19 +89,6 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc)
vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
}
-void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc)
-{
- struct vsp1_du_atomic_pipe_config cfg = { { 0, } };
- struct rcar_du_crtc_state *state;
-
- state = to_rcar_crtc_state(crtc->crtc.state);
- cfg.crc = state->crc;
-
- rcar_du_writeback_setup(crtc, &cfg.writeback);
-
- vsp1_du_atomic_flush(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
-}
-
static const u32 rcar_du_vsp_formats[] = {
DRM_FORMAT_RGB332,
DRM_FORMAT_ARGB,
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
index 842205b4e16e..5bc539562255 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
@@ -16,7 +16,6 @@
int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
unsigned int crtcs);
void rcar_du_vsp_enable(struct rcar_du_crtc *crtc);
-void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc);
int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
struct sg_table sg_tables[3]);
void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
@@ -29,7 +28,6 @@ static inline int rcar_du_vsp_init(struct rcar_du_vsp *vsp,
return -ENXIO;
}
static inline void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) { };
-static inline void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc) { };
static inline int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp,
struct drm_framebuffer *fb,
struct sg_table sg_tables[3])
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
index 116a50cb0f70..dc51368044c1 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c
@@ -43,3 +43,16 @@ void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc)
{
vsp1_du_atomic_begin(crtc->vsp->vsp, crtc->vsp_pipe);
}
+
+void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc)
+{
+ struct vsp1_du_atomic_pipe_config cfg = { { 0, } };
+ struct rcar_du_crtc_state *state;
+
+ state = to_rcar_crtc_state(crtc->crtc.state);
+ cfg.crc = state->crc;
+
+ rcar_du_writeback_setup(crtc, &cfg.writeback);
+
+ vsp1_du_atomic_flush(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
index 024ebd5f98aa..a2045c51c496 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h
@@ -58,9 +58,11 @@ to_rcar_vsp_plane_state(struct drm_plane_state *state)
#ifdef CONFIG_DRM_RCAR_VSP
void rcar_du_vsp_disable(struct rcar_du_crtc *crtc);
void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc);
+void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc);
#else
static inline void rcar_du_vsp_disable(struct rcar_du_crtc *crtc) { };
static inline void rcar_du_vsp_atomic_begin(struct rcar_du_crtc *crtc) { };
+static inline void rcar_du_vsp_atomic_flush(struct rcar_du_crtc *crtc) { };
#endif
#endif /* __RCAR_DU_VSP_LIB_H__ */
--
2.25.1
[PATCH 02/10] drm: rcar-du: Add encoder lib support
Add RCar DU encoder lib support by moving rcar_du_encoder_count_ports()
and rcar_du_encoder_funcs to the lib file and added
rcar_du_encoder_funcs() to share the common code between RCar and
RZ/G2L DU encoder drivers.
Signed-off-by: Biju Das
---
drivers/gpu/drm/rcar-du/Kconfig | 5 +
drivers/gpu/drm/rcar-du/Makefile | 2 +
drivers/gpu/drm/rcar-du/rcar_du_encoder.c | 120 +--
drivers/gpu/drm/rcar-du/rcar_du_encoder.h | 14 +-
drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.c | 138 ++
drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.h | 30
6 files changed, 181 insertions(+), 128 deletions(-)
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.c
create mode 100644 drivers/gpu/drm/rcar-du/rcar_du_encoder_lib.h
diff --git a/drivers/gpu/drm/rcar-du/Kconfig b/drivers/gpu/drm/rcar-du/Kconfig
index 3e59c7c213f5..684462c40ae3 100644
--- a/drivers/gpu/drm/rcar-du/Kconfig
+++ b/drivers/gpu/drm/rcar-du/Kconfig
@@ -71,3 +71,8 @@ config DRM_RCAR_WRITEBACK
bool
default y if ARM64
depends on DRM_RCAR_DU
+
+config DRM_RCAR_LIB
+ bool
+ default y
+ depends on DRM_RCAR_DU
diff --git a/drivers/gpu/drm/rcar-du/Makefile b/drivers/gpu/drm/rcar-du/Makefile
index 14a3fa88cc0b..651da6a7ad67 100644
--- a/drivers/gpu/drm/rcar-du/Makefile
+++ b/drivers/gpu/drm/rcar-du/Makefile
@@ -6,6 +6,8 @@ rcar-du-drm-y := rcar_du_crtc.o \
rcar_du_kms.o \
rcar_du_plane.o \
+rcar-du-drm-$(CONFIG_DRM_RCAR_LIB) += rcar_du_encoder_lib.o
+
rcar-du-drm-$(CONFIG_DRM_RCAR_VSP) += rcar_du_vsp.o
rcar-du-drm-$(CONFIG_DRM_RCAR_WRITEBACK) += rcar_du_writeback.o
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
index 60d6be78323b..0aa3108d9483 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_encoder.c
@@ -2,137 +2,25 @@
/*
* R-Car Display Unit Encoder
*
- * Copyright (C) 2013-2014 Renesas Electronics Corporation
+ * Copyright (C) 2013-2022 Renesas Electronics Corporation
*
* Contact: Laurent Pinchart (laurent.pinch...@ideasonboard.com)
*/
#include
#include
-#include
-
-#include
-#include
-#include
-#include
-#include
-#include
#include "rcar_du_drv.h"
-#include "rcar_du_encoder.h"
-#include "rcar_du_kms.h"
-#include "rcar_lvds.h"
+#include "rcar_du_encoder_lib.h"
/*
-
* Encoder
*/
-static unsigned int rcar_du_encoder_count_ports(struct device_node *node)
-{
- struct device_node *ports;
- struct device_node *port;
- unsigned int num_ports = 0;
-
- ports = of_get_child_by_name(node, "ports");
- if (!ports)
- ports = of_node_get(node);
-
- for_each_child_of_node(ports, port) {
- if (of_node_name_eq(port, "port"))
- num_ports++;
- }
-
- of_node_put(ports);
-
- return num_ports;
-}
-
-static const struct drm_encoder_funcs rcar_du_encoder_funcs = {
-};
-
int rcar_du_encoder_init(struct rcar_du_device *rcdu,
enum rcar_du_output output,
struct device_node *enc_node)
{
- struct rcar_du_encoder *renc;
- struct drm_connector *connector;
- struct drm_bridge *bridge;
- int ret;
-
- /*
-* Locate the DRM bridge from the DT node. For the DPAD outputs, if the
-* DT node has a single port, assume that it describes a panel and
-* create a panel bridge.
-*/
- if ((output == RCAR_DU_OUTPUT_DPAD0 ||
-output == RCAR_DU_OUTPUT_DPAD1) &&
- rcar_du_encoder_count_ports(enc_node) == 1) {
- struct drm_panel *panel = of_drm_find_panel(enc_node);
-
- if (IS_ERR(panel))
- return PTR_ERR(panel);
-
- bridge = devm_drm_panel_bridge_add_typed(rcdu->dev, panel,
-
DRM_MODE_CONNECTOR_DPI);
- if (IS_ERR(bridge))
- return PTR_ERR(bridge);
- } else {
- bridge = of_drm_find_bridge(enc_node);
- if (!bridge)
- return -EPROBE_DEFER;
-
- if (output == RCAR_DU_OUTPUT_LVDS0 ||
- output == RCAR_DU_OUTPUT_LVDS1)
- rcdu->lvds[output - RCAR_DU_OUTPUT_LVDS0] = bridge;
- }
-
- /*
-* Create and initialize the encoder. On Gen3, skip the LVDS1 output if
-* the LVDS1 encoder is used as a companion for LVDS0 in dual-link
-* mode, or any LVDS output if it isn't connected. The latter may happen
-* on D3 or E3 as the LVDS encoders are needed to provide the pixel
-* clock to the DU, even when the LVDS outputs are not used.
-*/
- if (rcdu->info->gen >= 3) {
- if (output == RCAR
[PATCH 08/10] drm: rcar-du: Move rcar_du_dumb_create()
Move rcar_du_dumb_create() to RCar DU KMS lib.
Signed-off-by: Biju Das
---
drivers/gpu/drm/rcar-du/rcar_du_kms.c | 21 ---
drivers/gpu/drm/rcar-du/rcar_du_kms.h | 3 ---
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 25 +++
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 3 +++
4 files changed, 28 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index b63808025578..c05a1925755f 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -82,27 +82,6 @@ struct drm_gem_object
*rcar_du_gem_prime_import_sg_table(struct drm_device *dev,
return gem_obj;
}
-int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
- struct drm_mode_create_dumb *args)
-{
- struct rcar_du_device *rcdu = to_rcar_du_device(dev);
- unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
- unsigned int align;
-
- /*
-* The R8A7779 DU requires a 16 pixels pitch alignment as documented,
-* but the R8A7790 DU seems to require a 128 bytes pitch alignment.
-*/
- if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
- align = 128;
- else
- align = 16 * args->bpp / 8;
-
- args->pitch = roundup(min_pitch, align);
-
- return drm_gem_cma_dumb_create_internal(file, dev, args);
-}
-
static struct drm_framebuffer *
rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
const struct drm_mode_fb_cmd2 *mode_cmd)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.h
b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
index 58a66dc355bf..e335a47ec72f 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
@@ -14,9 +14,6 @@
int rcar_du_modeset_init(struct rcar_du_device *rcdu);
-int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
- struct drm_mode_create_dumb *args);
-
struct drm_gem_object *rcar_du_gem_prime_import_sg_table(struct drm_device
*dev,
struct dma_buf_attachment *attach,
struct sg_table *sgt);
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
index 40ccd8635c34..cc86524a826a 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
@@ -322,3 +322,28 @@ const struct rcar_du_format_info *rcar_du_format_info(u32
fourcc)
return NULL;
}
+
+/*
-
+ * Frame buffer
+ */
+
+int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
+ struct drm_mode_create_dumb *args)
+{
+ struct rcar_du_device *rcdu = to_rcar_du_device(dev);
+ unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
+ unsigned int align;
+
+ /*
+* The R8A7779 DU requires a 16 pixels pitch alignment as documented,
+* but the R8A7790 DU seems to require a 128 bytes pitch alignment.
+*/
+ if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
+ align = 128;
+ else
+ align = 16 * args->bpp / 8;
+
+ args->pitch = roundup(min_pitch, align);
+
+ return drm_gem_cma_dumb_create_internal(file, dev, args);
+}
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
index 5fa488abb681..15505b51c849 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
@@ -32,4 +32,7 @@ struct rcar_du_format_info {
const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc);
+int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
+ struct drm_mode_create_dumb *args);
+
#endif /* __RCAR_DU_KMS_LIB_H__ */
--
2.25.1
[PATCH 09/10] drm: rcar-du: Move rcar_du_gem_prime_import_sg_table()
Move rcar_du_gem_prime_import_sg_table() to RCar DU KMS lib.
Signed-off-by: Biju Das
---
drivers/gpu/drm/rcar-du/rcar_du_kms.c | 45 ---
drivers/gpu/drm/rcar-du/rcar_du_kms.h | 4 --
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c | 45 +++
drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h | 4 ++
4 files changed, 49 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
index c05a1925755f..ea2b7d5f1c23 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.c
@@ -37,51 +37,6 @@
* Frame buffer
*/
-static const struct drm_gem_object_funcs rcar_du_gem_funcs = {
- .free = drm_gem_cma_object_free,
- .print_info = drm_gem_cma_object_print_info,
- .get_sg_table = drm_gem_cma_object_get_sg_table,
- .vmap = drm_gem_cma_object_vmap,
- .mmap = drm_gem_cma_object_mmap,
- .vm_ops = &drm_gem_cma_vm_ops,
-};
-
-struct drm_gem_object *rcar_du_gem_prime_import_sg_table(struct drm_device
*dev,
- struct dma_buf_attachment *attach,
- struct sg_table *sgt)
-{
- struct rcar_du_device *rcdu = to_rcar_du_device(dev);
- struct drm_gem_cma_object *cma_obj;
- struct drm_gem_object *gem_obj;
- int ret;
-
- if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE))
- return drm_gem_cma_prime_import_sg_table(dev, attach, sgt);
-
- /* Create a CMA GEM buffer. */
- cma_obj = kzalloc(sizeof(*cma_obj), GFP_KERNEL);
- if (!cma_obj)
- return ERR_PTR(-ENOMEM);
-
- gem_obj = &cma_obj->base;
- gem_obj->funcs = &rcar_du_gem_funcs;
-
- drm_gem_private_object_init(dev, gem_obj, attach->dmabuf->size);
- cma_obj->map_noncoherent = false;
-
- ret = drm_gem_create_mmap_offset(gem_obj);
- if (ret) {
- drm_gem_object_release(gem_obj);
- kfree(cma_obj);
- return ERR_PTR(ret);
- }
-
- cma_obj->paddr = 0;
- cma_obj->sgt = sgt;
-
- return gem_obj;
-}
-
static struct drm_framebuffer *
rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
const struct drm_mode_fb_cmd2 *mode_cmd)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms.h
b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
index e335a47ec72f..9bf7d94615ff 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms.h
@@ -14,8 +14,4 @@
int rcar_du_modeset_init(struct rcar_du_device *rcdu);
-struct drm_gem_object *rcar_du_gem_prime_import_sg_table(struct drm_device
*dev,
- struct dma_buf_attachment *attach,
- struct sg_table *sgt);
-
#endif /* __RCAR_DU_KMS_H__ */
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
index cc86524a826a..6461b99e08dc 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.c
@@ -327,6 +327,51 @@ const struct rcar_du_format_info *rcar_du_format_info(u32
fourcc)
* Frame buffer
*/
+static const struct drm_gem_object_funcs rcar_du_gem_funcs = {
+ .free = drm_gem_cma_object_free,
+ .print_info = drm_gem_cma_object_print_info,
+ .get_sg_table = drm_gem_cma_object_get_sg_table,
+ .vmap = drm_gem_cma_object_vmap,
+ .mmap = drm_gem_cma_object_mmap,
+ .vm_ops = &drm_gem_cma_vm_ops,
+};
+
+struct drm_gem_object *rcar_du_gem_prime_import_sg_table(struct drm_device
*dev,
+ struct dma_buf_attachment *attach,
+ struct sg_table *sgt)
+{
+ struct rcar_du_device *rcdu = to_rcar_du_device(dev);
+ struct drm_gem_cma_object *cma_obj;
+ struct drm_gem_object *gem_obj;
+ int ret;
+
+ if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE))
+ return drm_gem_cma_prime_import_sg_table(dev, attach, sgt);
+
+ /* Create a CMA GEM buffer. */
+ cma_obj = kzalloc(sizeof(*cma_obj), GFP_KERNEL);
+ if (!cma_obj)
+ return ERR_PTR(-ENOMEM);
+
+ gem_obj = &cma_obj->base;
+ gem_obj->funcs = &rcar_du_gem_funcs;
+
+ drm_gem_private_object_init(dev, gem_obj, attach->dmabuf->size);
+ cma_obj->map_noncoherent = false;
+
+ ret = drm_gem_create_mmap_offset(gem_obj);
+ if (ret) {
+ drm_gem_object_release(gem_obj);
+ kfree(cma_obj);
+ return ERR_PTR(ret);
+ }
+
+ cma_obj->paddr = 0;
+ cma_obj->sgt = sgt;
+
+ return gem_obj;
+}
+
int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
struct drm_mode_create_dumb *args)
{
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
b/drivers/gpu/drm/rcar-du/rcar_du_kms_lib.h
index 15505b51c849..5f45a369bb88 100644
--- a/drivers/gpu/drm/rcar
[PATCH 07/10] drm: rcar-du: Move vsp rcar_du_vsp_{map,unmap}_fb()
Move vsp rcar_du_vsp_{map,unmap}_fb() to RCar DU VSP lib.
Signed-off-by: Biju Das
---
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 75 ---
drivers/gpu/drm/rcar-du/rcar_du_vsp.h | 15 -
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 75 +++
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 15 +
4 files changed, 90 insertions(+), 90 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index becc587c5169..18e16097cf53 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -153,68 +153,6 @@ static void rcar_du_vsp_plane_setup(struct
rcar_du_vsp_plane *plane)
plane->index, &cfg);
}
-int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
- struct sg_table sg_tables[3])
-{
- struct rcar_du_device *rcdu = vsp->dev;
- unsigned int i, j;
- int ret;
-
- for (i = 0; i < fb->format->num_planes; ++i) {
- struct drm_gem_cma_object *gem = drm_fb_cma_get_gem_obj(fb, i);
- struct sg_table *sgt = &sg_tables[i];
-
- if (gem->sgt) {
- struct scatterlist *src;
- struct scatterlist *dst;
-
- /*
-* If the GEM buffer has a scatter gather table, it has
-* been imported from a dma-buf and has no physical
-* address as it might not be physically contiguous.
-* Copy the original scatter gather table to map it to
-* the VSP.
-*/
- ret = sg_alloc_table(sgt, gem->sgt->orig_nents,
-GFP_KERNEL);
- if (ret)
- goto fail;
-
- src = gem->sgt->sgl;
- dst = sgt->sgl;
- for (j = 0; j < gem->sgt->orig_nents; ++j) {
- sg_set_page(dst, sg_page(src), src->length,
- src->offset);
- src = sg_next(src);
- dst = sg_next(dst);
- }
- } else {
- ret = dma_get_sgtable(rcdu->dev, sgt, gem->vaddr,
- gem->paddr, gem->base.size);
- if (ret)
- goto fail;
- }
-
- ret = vsp1_du_map_sg(vsp->vsp, sgt);
- if (ret) {
- sg_free_table(sgt);
- goto fail;
- }
- }
-
- return 0;
-
-fail:
- while (i--) {
- struct sg_table *sgt = &sg_tables[i];
-
- vsp1_du_unmap_sg(vsp->vsp, sgt);
- sg_free_table(sgt);
- }
-
- return ret;
-}
-
static int rcar_du_vsp_plane_prepare_fb(struct drm_plane *plane,
struct drm_plane_state *state)
{
@@ -236,19 +174,6 @@ static int rcar_du_vsp_plane_prepare_fb(struct drm_plane
*plane,
return drm_gem_plane_helper_prepare_fb(plane, state);
}
-void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
- struct sg_table sg_tables[3])
-{
- unsigned int i;
-
- for (i = 0; i < fb->format->num_planes; ++i) {
- struct sg_table *sgt = &sg_tables[i];
-
- vsp1_du_unmap_sg(vsp->vsp, sgt);
- sg_free_table(sgt);
- }
-}
-
static void rcar_du_vsp_plane_cleanup_fb(struct drm_plane *plane,
struct drm_plane_state *state)
{
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
index 5bc539562255..a6ddeb6d57ea 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.h
@@ -16,10 +16,6 @@
int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
unsigned int crtcs);
void rcar_du_vsp_enable(struct rcar_du_crtc *crtc);
-int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
- struct sg_table sg_tables[3]);
-void rcar_du_vsp_unmap_fb(struct rcar_du_vsp *vsp, struct drm_framebuffer *fb,
- struct sg_table sg_tables[3]);
#else
static inline int rcar_du_vsp_init(struct rcar_du_vsp *vsp,
struct device_node *np,
@@ -28,17 +24,6 @@ static inline int rcar_du_vsp_init(struct rcar_du_vsp *vsp,
return -ENXIO;
}
static inline void rcar_du_vsp_enable(struct rcar_du_crtc *crtc) { };
-static inline int rcar_du_vsp_map_fb(struct rcar_du_vsp *vsp,
-struct drm_framebuffer *fb,
-struct sg_table sg_ta
[PATCH 10/10] drm: rcar-du: Add rcar_du_lib_vsp_init()
RZ/G2L does not have plane registers as well as it uses different
CRTC. The below functions are SoC specific
* rcar_du_crtc_finish_page_flip()
* __rcar_du_plane_setup
* __rcar_du_plane_atomic_check
All other function can be handled in common code. This patch introduces
rcar_du_lib_vsp_init() to share common_init, vsp_formats and vsp_plane_funcs().
Signed-off-by: Biju Das
---
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 151 +
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.c | 155 ++
drivers/gpu/drm/rcar-du/rcar_du_vsp_lib.h | 10 ++
3 files changed, 167 insertions(+), 149 deletions(-)
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
index 18e16097cf53..03f032ef48ad 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_vsp.c
@@ -89,34 +89,6 @@ void rcar_du_vsp_enable(struct rcar_du_crtc *crtc)
vsp1_du_setup_lif(crtc->vsp->vsp, crtc->vsp_pipe, &cfg);
}
-static const u32 rcar_du_vsp_formats[] = {
- DRM_FORMAT_RGB332,
- DRM_FORMAT_ARGB,
- DRM_FORMAT_XRGB,
- DRM_FORMAT_ARGB1555,
- DRM_FORMAT_XRGB1555,
- DRM_FORMAT_RGB565,
- DRM_FORMAT_BGR888,
- DRM_FORMAT_RGB888,
- DRM_FORMAT_BGRA,
- DRM_FORMAT_BGRX,
- DRM_FORMAT_ARGB,
- DRM_FORMAT_XRGB,
- DRM_FORMAT_UYVY,
- DRM_FORMAT_YUYV,
- DRM_FORMAT_YVYU,
- DRM_FORMAT_NV12,
- DRM_FORMAT_NV21,
- DRM_FORMAT_NV16,
- DRM_FORMAT_NV61,
- DRM_FORMAT_YUV420,
- DRM_FORMAT_YVU420,
- DRM_FORMAT_YUV422,
- DRM_FORMAT_YVU422,
- DRM_FORMAT_YUV444,
- DRM_FORMAT_YVU444,
-};
-
static void rcar_du_vsp_plane_setup(struct rcar_du_vsp_plane *plane)
{
struct rcar_du_vsp_plane_state *state =
@@ -219,128 +191,9 @@ static const struct drm_plane_helper_funcs
rcar_du_vsp_plane_helper_funcs = {
.atomic_update = rcar_du_vsp_plane_atomic_update,
};
-static struct drm_plane_state *
-rcar_du_vsp_plane_atomic_duplicate_state(struct drm_plane *plane)
-{
- struct rcar_du_vsp_plane_state *copy;
-
- if (WARN_ON(!plane->state))
- return NULL;
-
- copy = kzalloc(sizeof(*copy), GFP_KERNEL);
- if (copy == NULL)
- return NULL;
-
- __drm_atomic_helper_plane_duplicate_state(plane, ©->state);
-
- return ©->state;
-}
-
-static void rcar_du_vsp_plane_atomic_destroy_state(struct drm_plane *plane,
- struct drm_plane_state
*state)
-{
- __drm_atomic_helper_plane_destroy_state(state);
- kfree(to_rcar_vsp_plane_state(state));
-}
-
-static void rcar_du_vsp_plane_reset(struct drm_plane *plane)
-{
- struct rcar_du_vsp_plane_state *state;
-
- if (plane->state) {
- rcar_du_vsp_plane_atomic_destroy_state(plane, plane->state);
- plane->state = NULL;
- }
-
- state = kzalloc(sizeof(*state), GFP_KERNEL);
- if (state == NULL)
- return;
-
- __drm_atomic_helper_plane_reset(plane, &state->state);
-}
-
-static const struct drm_plane_funcs rcar_du_vsp_plane_funcs = {
- .update_plane = drm_atomic_helper_update_plane,
- .disable_plane = drm_atomic_helper_disable_plane,
- .reset = rcar_du_vsp_plane_reset,
- .destroy = drm_plane_cleanup,
- .atomic_duplicate_state = rcar_du_vsp_plane_atomic_duplicate_state,
- .atomic_destroy_state = rcar_du_vsp_plane_atomic_destroy_state,
-};
-
-static void rcar_du_vsp_cleanup(struct drm_device *dev, void *res)
-{
- struct rcar_du_vsp *vsp = res;
- unsigned int i;
-
- for (i = 0; i < vsp->num_planes; ++i) {
- struct rcar_du_vsp_plane *plane = &vsp->planes[i];
-
- drm_plane_cleanup(&plane->plane);
- }
-
- kfree(vsp->planes);
-
- put_device(vsp->vsp);
-}
-
int rcar_du_vsp_init(struct rcar_du_vsp *vsp, struct device_node *np,
unsigned int crtcs)
{
- struct rcar_du_device *rcdu = vsp->dev;
- struct platform_device *pdev;
- unsigned int num_crtcs = hweight32(crtcs);
- unsigned int num_planes;
- unsigned int i;
- int ret;
-
- /* Find the VSP device and initialize it. */
- pdev = of_find_device_by_node(np);
- if (!pdev)
- return -ENXIO;
-
- vsp->vsp = &pdev->dev;
-
- ret = drmm_add_action_or_reset(&rcdu->ddev, rcar_du_vsp_cleanup, vsp);
- if (ret < 0)
- return ret;
-
- ret = vsp1_du_init(vsp->vsp);
- if (ret < 0)
- return ret;
-
- num_planes = rcdu->info->num_rpf;
-
- vsp->planes = kcalloc(num_planes, sizeof(*vsp->planes), GFP_KERNEL);
- if (!vsp->planes)
- return -ENOMEM;
-
- for (i = 0; i < num_planes; ++i) {
- enum drm_plane_type type = i < num_crtcs
-? DRM_PLANE
Re: [PATCH] drm/via: Add new condition to via_dma_cleanup()
Hi Alisa,
On Mon, Jul 25, 2022 at 01:45:55PM +0300, Alisa Khabibrakhmanova wrote:
> Pointer dev_priv->mmio, which was checked for NULL at via_do_init_map(),
> is passed to via_do_cleanup_map() and is dereferenced there without check.
>
> The patch adds the condition in via_dma_cleanup() which prevents potential
> NULL
> pointer dereference.
>
> Found by Linux Verification Center (linuxtesting.org) with SVACE.
>
> Fixes: 22f579c621e2 ("drm: Add via unichrome support")
> Signed-off-by: Alisa Khabibrakhmanova
Thanks for your patch. Due to other changes in drm-misc where we
maintain the via driver this patch fails to apply.
It would be great if you could redo the patch after -rc2 - on top of
-next. Then we can apply it to drm-misc.
You will see that the individual files for the driver is merged to a
single file, and this change does not hit -next until later.
Sam
Re: [PATCH] component: try_module_get() to prevent unloading while in use
On Tue, Jul 26, 2022 at 11:32:28AM +0100, Richard Fitzgerald wrote: > On 25/07/2022 19:09, Greg KH wrote: > > On Mon, Jul 25, 2022 at 05:08:59PM +0100, Richard Fitzgerald wrote: > > > Call try_module_get() on a component before attempting to call its > > > bind() function, to ensure that a loadable module cannot be > > > unloaded while we are executing its bind(). > > > > How can bind be called while the module is unloaded? > > > > I didn't say it could. What I said is "unloaded while we are executing > its bind()". Maybe that's already guaranteed to be safe somehow. It's > actually the problem below that I was trying to fix but placing the > try_module_get() before the bind() rather than after bind() seemed a > trivial extra safety. It should be safe, bind() can't race with module remove as the driver core locks will handle this. > > > If the bind is successful the module_put() is called only after it > > > has been unbound. This ensures that the module cannot be unloaded > > > while it is in use as an aggregate device. > > > > That's almost never the correct thing to do, what problem is this > > solving? > > > > What I see is that when a loadable module has been made part of an > aggregate it is still possible to rmmod'd it. > > An alternative workaround would be for the parent to softdep to every > driver that _might_ provide the aggregated components. Softdeps aren't > unusual (we use it in some drivers that are directly related but don't > directly link into each other). But to me this feels like a hack when > used with the component framework - isn't the idea that the parent > doesn't know (or doesn't need to know) which drivers will be aggregated? > Wouldn't it be better that when a component driver is bound into an > aggregate its module is automatically marked in-use? > > If there's a better way to mark the module in-use while is it bound > into an aggregate, let me know and I'll look at implementing it. No module references should be incremented if a device is bound to a driver, that's the old (1990's) way of thinking. If a module wants to be unloaded, let it, and clean up everything that it was controlling/talking to before the module remove is finished. That's the way all busses should be working, you don't increment a module count when a driver binds to a device, otherwise how would you unload a module that was being used at all? So just remove the components controlled by the module properly when it is removed and all should be good. Do you have example code in the kernel tree today that does not properly do this? Why not just fix that instead? thanks, greg k-h
[PATCH v2 0/7] drm/msm/dsi regulator improvements
The main goal of this series is to make a small dent in cleaning up
the way we deal with regulator loads. The idea is to add some extra
functionality to the regulator "bulk" API so that consumers can
specify the load using that. Though I didn't convert everyone over, I
include patches in this series that show how the Qualcomm DSI driver
is improved by this.
I'd expect:
* The first two patches are bugfixes found while converting the DSI
driver over. Those could land any time.
* The third patch ("drm/msm/dsi: Don't set a load before disabling a
regulator") is a patch a sent the other day verbatim, included in
this series because it's highly related. It could land any
time. That's why I called this series "v2".
* After that I have patches that add to the regulator API and then
show a usage of those in the DSI driver. I'd expect that the two
regulator patches could land in the regulator tree. The DSI patches
would need to wait until the new regulator changes are available.
Changes in v2:
- ("Fix number of regulators for msm8996_dsi_cfg") new for v2.
- ("Fix number of regulators for SDM660") new for v2.
- ("Allow specifying an initial load w/ the bulk API") new for v2.
- ("Use the new regulator bulk feature to specify the load") new for v2.
- ("Allow drivers to define their init data as const") new for v2.
- ("Take advantage of devm_regulator_bulk_get_const") new for v2.
Douglas Anderson (7):
drm/msm/dsi: Fix number of regulators for msm8996_dsi_cfg
drm/msm/dsi: Fix number of regulators for SDM660
drm/msm/dsi: Don't set a load before disabling a regulator
regulator: core: Allow specifying an initial load w/ the bulk API
drm/msm/dsi: Use the new regulator bulk feature to specify the load
regulator: core: Allow drivers to define their init data as const
drm/msm/dsi: Take advantage of devm_regulator_bulk_get_const()
drivers/gpu/drm/msm/dsi/dsi.h | 1 -
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 172 +-
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 3 +-
drivers/gpu/drm/msm/dsi/dsi_host.c| 61 +--
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 41 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c| 4 +-
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c| 6 +-
drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c| 4 +-
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c| 6 +-
.../gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c | 2 +-
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 6 +-
drivers/regulator/core.c | 20 +-
drivers/regulator/devres.c| 28 +++
include/linux/regulator/consumer.h| 16 +-
14 files changed, 165 insertions(+), 205 deletions(-)
--
2.37.1.359.gd136c6c3e2-goog
[PATCH v2 2/7] drm/msm/dsi: Fix number of regulators for SDM660
1 regulators is specified listed but the number 2 is specified. This
presumably means we try to get a regulator with no name. Fix it.
Fixes: 033f47f7f121 ("drm/msm/dsi: Add DSI configuration for SDM660")
Signed-off-by: Douglas Anderson
---
Changes in v2:
- ("Fix number of regulators for SDM660") new for v2.
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index 02000a7b7a18..72c018e26f47 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
@@ -148,7 +148,7 @@ static const char * const dsi_sdm660_bus_clk_names[] = {
static const struct msm_dsi_config sdm660_dsi_cfg = {
.io_offset = DSI_6G_REG_SHIFT,
.reg_cfg = {
- .num = 2,
+ .num = 1,
.regs = {
{"vdda", 12560, 4 },/* 1.2 V */
},
--
2.37.1.359.gd136c6c3e2-goog
[PATCH v2 3/7] drm/msm/dsi: Don't set a load before disabling a regulator
As of commit 5451781dadf8 ("regulator: core: Only count load for
enabled consumers"), a load isn't counted for a disabled
regulator. That means all the code in the DSI driver to specify and
set loads before disabling a regulator is not actually doing anything
useful. Let's remove it.
It should be noted that all of the loads set that were being specified
were pointless noise anyway. The only use for this number is to pick
between low power and high power modes of regulators. Regulators
appear to do this changeover at loads on the order of 1 uA. You
would a lot of clients of the same rail for that 100 uA number to
count for anything.
Note that now that we get rid of the setting of the load at disable
time, we can just set the load once when we first get the regulator
and then forget it.
It should also be noted that the regulator functions
regulator_bulk_enable() and regulator_set_load() already print error
messages when they encounter problems so while moving things around we
get rid of some extra error prints.
Signed-off-by: Douglas Anderson
---
(no changes since v1)
drivers/gpu/drm/msm/dsi/dsi.h | 1 -
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 52 +--
drivers/gpu/drm/msm/dsi/dsi_host.c| 45
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 46
drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c| 4 +-
drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c| 6 +--
drivers/gpu/drm/msm/dsi/phy/dsi_phy_20nm.c| 4 +-
drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c| 6 +--
.../gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c | 2 +-
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 6 +--
10 files changed, 60 insertions(+), 112 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi.h b/drivers/gpu/drm/msm/dsi/dsi.h
index 580a1e6358bf..bb6a5bd05cb1 100644
--- a/drivers/gpu/drm/msm/dsi/dsi.h
+++ b/drivers/gpu/drm/msm/dsi/dsi.h
@@ -37,7 +37,6 @@ enum msm_dsi_phy_usecase {
struct dsi_reg_entry {
char name[32];
int enable_load;
- int disable_load;
};
struct dsi_reg_config {
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index 72c018e26f47..901d6fd53800 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
@@ -14,9 +14,9 @@ static const struct msm_dsi_config apq8064_dsi_cfg = {
.reg_cfg = {
.num = 3,
.regs = {
- {"vdda", 10, 100}, /* 1.2 V */
- {"avdd", 1, 100}, /* 3.0 V */
- {"vddio", 10, 100}, /* 1.8 V */
+ {"vdda", 10}, /* 1.2 V */
+ {"avdd", 1},/* 3.0 V */
+ {"vddio", 10}, /* 1.8 V */
},
},
.bus_clk_names = dsi_v2_bus_clk_names,
@@ -34,9 +34,9 @@ static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = {
.reg_cfg = {
.num = 3,
.regs = {
- {"vdd", 15, 100}, /* 3.0 V */
- {"vdda", 10, 100}, /* 1.2 V */
- {"vddio", 10, 100}, /* 1.8 V */
+ {"vdd", 15},/* 3.0 V */
+ {"vdda", 10}, /* 1.2 V */
+ {"vddio", 10}, /* 1.8 V */
},
},
.bus_clk_names = dsi_6g_bus_clk_names,
@@ -54,8 +54,8 @@ static const struct msm_dsi_config msm8916_dsi_cfg = {
.reg_cfg = {
.num = 2,
.regs = {
- {"vdda", 10, 100}, /* 1.2 V */
- {"vddio", 10, 100}, /* 1.8 V */
+ {"vdda", 10}, /* 1.2 V */
+ {"vddio", 10}, /* 1.8 V */
},
},
.bus_clk_names = dsi_8916_bus_clk_names,
@@ -73,8 +73,8 @@ static const struct msm_dsi_config msm8976_dsi_cfg = {
.reg_cfg = {
.num = 2,
.regs = {
- {"vdda", 10, 100}, /* 1.2 V */
- {"vddio", 10, 100}, /* 1.8 V */
+ {"vdda", 10}, /* 1.2 V */
+ {"vddio", 10}, /* 1.8 V */
},
},
.bus_clk_names = dsi_8976_bus_clk_names,
@@ -88,12 +88,12 @@ static const struct msm_dsi_config msm8994_dsi_cfg = {
.reg_cfg = {
.num = 6,
.regs = {
- {"vdda", 10, 100}, /* 1.25 V */
- {"vddio", 10, 100}, /* 1.8 V */
- {"vcca", 1, 100}, /* 1.0 V */
- {"vdd", 10, 100}, /* 1.8 V */
- {"lab_reg", -1, -1},
- {"ibb_reg", -1, -1},
+ {"vdda", 10}, /* 1.25 V */
+ {"vddio", 10},
[PATCH v2 1/7] drm/msm/dsi: Fix number of regulators for msm8996_dsi_cfg
3 regulators are specified listed but the number 2 is specified. Fix
it.
Fixes: 3a3ff88a0fc1 ("drm/msm/dsi: Add 8x96 info in dsi_cfg")
Signed-off-by: Douglas Anderson
---
Changes in v2:
- ("Fix number of regulators for msm8996_dsi_cfg") new for v2.
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index 2c23324a2296..02000a7b7a18 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
@@ -109,7 +109,7 @@ static const char * const dsi_8996_bus_clk_names[] = {
static const struct msm_dsi_config msm8996_dsi_cfg = {
.io_offset = DSI_6G_REG_SHIFT,
.reg_cfg = {
- .num = 2,
+ .num = 3,
.regs = {
{"vdda", 18160, 1 },/* 1.25 V */
{"vcca", 17000, 32 }, /* 0.925 V */
--
2.37.1.359.gd136c6c3e2-goog
[PATCH v2 4/7] regulator: core: Allow specifying an initial load w/ the bulk API
There are a number of drivers that follow a pattern that looks like
this:
1. Use the regulator bulk API to get a bunch of regulators.
2. Set the load on each of the regulators to use whenever the
regulators are enabled.
Let's make this easier by just allowing the drivers to pass the load
in.
As part of this change we need to move the error printing in
regulator_bulk_get() around; let's switch to the new dev_err_probe()
to simplify it.
Signed-off-by: Douglas Anderson
---
Changes in v2:
- ("Allow specifying an initial load w/ the bulk API") new for v2.
drivers/regulator/core.c | 20
include/linux/regulator/consumer.h | 12
2 files changed, 20 insertions(+), 12 deletions(-)
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index 1e54a833f2cf..17c476fc8adb 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -4783,22 +4783,26 @@ int regulator_bulk_get(struct device *dev, int
num_consumers,
consumers[i].consumer = regulator_get(dev,
consumers[i].supply);
if (IS_ERR(consumers[i].consumer)) {
- ret = PTR_ERR(consumers[i].consumer);
consumers[i].consumer = NULL;
+ ret = dev_err_probe(dev, PTR_ERR(consumers[i].consumer),
+ "Failed to get supply '%s'",
+ consumers[i].supply);
goto err;
}
+
+ if (consumers[i].init_load_uA > 0) {
+ ret = regulator_set_load(consumers[i].consumer,
+consumers[i].init_load_uA);
+ if (ret) {
+ i++;
+ goto err;
+ }
+ }
}
return 0;
err:
- if (ret != -EPROBE_DEFER)
- dev_err(dev, "Failed to get supply '%s': %pe\n",
- consumers[i].supply, ERR_PTR(ret));
- else
- dev_dbg(dev, "Failed to get supply '%s', deferring\n",
- consumers[i].supply);
-
while (--i >= 0)
regulator_put(consumers[i].consumer);
diff --git a/include/linux/regulator/consumer.h
b/include/linux/regulator/consumer.h
index bbf6590a6dec..5779f4466e62 100644
--- a/include/linux/regulator/consumer.h
+++ b/include/linux/regulator/consumer.h
@@ -171,10 +171,13 @@ struct regulator;
/**
* struct regulator_bulk_data - Data used for bulk regulator operations.
*
- * @supply: The name of the supply. Initialised by the user before
- *using the bulk regulator APIs.
- * @consumer: The regulator consumer for the supply. This will be managed
- *by the bulk API.
+ * @supply: The name of the supply. Initialised by the user before
+ *using the bulk regulator APIs.
+ * @init_load_uA: After getting the regulator, regulator_set_load() will be
+ *called with this load. Initialised by the user before
+ *using the bulk regulator APIs.
+ * @consumer: The regulator consumer for the supply. This will be managed
+ *by the bulk API.
*
* The regulator APIs provide a series of regulator_bulk_() API calls as
* a convenience to consumers which require multiple supplies. This
@@ -182,6 +185,7 @@ struct regulator;
*/
struct regulator_bulk_data {
const char *supply;
+ int init_load_uA;
struct regulator *consumer;
/* private: Internal use */
--
2.37.1.359.gd136c6c3e2-goog
[PATCH v2 5/7] drm/msm/dsi: Use the new regulator bulk feature to specify the load
As of the patch ("regulator: core: Allow specifying an initial load w/
the bulk API") we can now specify the initial load in the bulk data
rather than having to manually call regulator_set_load() on each
regulator. Let's use it.
Signed-off-by: Douglas Anderson
---
Changes in v2:
- ("Use the new regulator bulk feature to specify the load") new for v2.
drivers/gpu/drm/msm/dsi/dsi_host.c| 13 +++--
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 13 +++--
2 files changed, 6 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 04265ad2fbef..dec7a94cf819 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -279,8 +279,10 @@ static int dsi_regulator_init(struct msm_dsi_host
*msm_host)
int num = msm_host->cfg_hnd->cfg->reg_cfg.num;
int i, ret;
- for (i = 0; i < num; i++)
+ for (i = 0; i < num; i++) {
s[i].supply = regs[i].name;
+ s[i].init_load_uA = regs[i].enable_load;
+ }
ret = devm_regulator_bulk_get(&msm_host->pdev->dev, num, s);
if (ret < 0) {
@@ -289,15 +291,6 @@ static int dsi_regulator_init(struct msm_dsi_host
*msm_host)
return ret;
}
- for (i = 0; i < num; i++) {
- if (regs[i].enable_load >= 0) {
- ret = regulator_set_load(s[i].consumer,
-regs[i].enable_load);
- if (ret < 0)
- return ret;
- }
- }
-
return 0;
}
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
index 330c0c4e7f9d..f42ff57861da 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
@@ -515,8 +515,10 @@ static int dsi_phy_regulator_init(struct msm_dsi_phy *phy)
int num = phy->cfg->reg_cfg.num;
int i, ret;
- for (i = 0; i < num; i++)
+ for (i = 0; i < num; i++) {
s[i].supply = regs[i].name;
+ s[i].init_load_uA = regs[i].enable_load;
+ }
ret = devm_regulator_bulk_get(dev, num, s);
if (ret < 0) {
@@ -529,15 +531,6 @@ static int dsi_phy_regulator_init(struct msm_dsi_phy *phy)
return ret;
}
- for (i = 0; i < num; i++) {
- if (regs[i].enable_load >= 0) {
- ret = regulator_set_load(s[i].consumer,
- regs[i].enable_load);
- if (ret < 0)
- return ret;
- }
- }
-
return 0;
}
--
2.37.1.359.gd136c6c3e2-goog
[PATCH v2 7/7] drm/msm/dsi: Take advantage of devm_regulator_bulk_get_const()
In the patch ("regulator: core: Allow drivers to define their init
data as const") we no longer need to do copying of regulator bulk data
from initdata to something dynamic. Let's take advantage of that.
In addition to saving some code, this also moves us to using
ARRAY_SIZE() to specify how many regulators we have which is less
error prone.
NOTE: Though I haven't done the math, this is likely an overall
savings in terms of "static const" data. We previously always
allocated space for 8 supplies. Each of these supplies took up 36
bytes of data (32 for name, 4 for an int).
Signed-off-by: Douglas Anderson
---
Changes in v2:
- ("Take advantage of devm_regulator_bulk_get_const") new for v2.
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 172 ++---
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 3 +-
drivers/gpu/drm/msm/dsi/dsi_host.c | 27 +
3 files changed, 94 insertions(+), 108 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index 901d6fd53800..7e97c239ed48 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
@@ -9,16 +9,16 @@ static const char * const dsi_v2_bus_clk_names[] = {
"core_mmss", "iface", "bus",
};
+static const struct regulator_bulk_data apq8064_dsi_regulators[] = {
+ { .supply = "vdda", .init_load_uA = 10 }, /* 1.2 V */
+ { .supply = "avdd", .init_load_uA = 1 },/* 3.0 V */
+ { .supply = "vddio", .init_load_uA = 10 }, /* 1.8 V */
+};
+
static const struct msm_dsi_config apq8064_dsi_cfg = {
.io_offset = 0,
- .reg_cfg = {
- .num = 3,
- .regs = {
- {"vdda", 10}, /* 1.2 V */
- {"avdd", 1},/* 3.0 V */
- {"vddio", 10}, /* 1.8 V */
- },
- },
+ .regulator_data = apq8064_dsi_regulators,
+ .num_regulators = ARRAY_SIZE(apq8064_dsi_regulators),
.bus_clk_names = dsi_v2_bus_clk_names,
.num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names),
.io_start = { 0x470, 0x580 },
@@ -29,16 +29,16 @@ static const char * const dsi_6g_bus_clk_names[] = {
"mdp_core", "iface", "bus", "core_mmss",
};
+static const struct regulator_bulk_data msm8974_apq8084_regulators[] = {
+ { .supply = "vdd", .init_load_uA = 15 },/* 3.0 V */
+ { .supply = "vdda", .init_load_uA = 10 }, /* 1.2 V */
+ { .supply = "vddio", .init_load_uA = 10 }, /* 1.8 V */
+};
+
static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = {
.io_offset = DSI_6G_REG_SHIFT,
- .reg_cfg = {
- .num = 3,
- .regs = {
- {"vdd", 15},/* 3.0 V */
- {"vdda", 10}, /* 1.2 V */
- {"vddio", 10}, /* 1.8 V */
- },
- },
+ .regulator_data = msm8974_apq8084_regulators,
+ .num_regulators = ARRAY_SIZE(msm8974_apq8084_regulators),
.bus_clk_names = dsi_6g_bus_clk_names,
.num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
.io_start = { 0xfd922800, 0xfd922b00 },
@@ -49,15 +49,15 @@ static const char * const dsi_8916_bus_clk_names[] = {
"mdp_core", "iface", "bus",
};
+static const struct regulator_bulk_data msm8916_dsi_regulators[] = {
+ { .supply = "vdda", .init_load_uA = 10 }, /* 1.2 V */
+ { .supply = "vddio", .init_load_uA = 10 }, /* 1.8 V */
+};
+
static const struct msm_dsi_config msm8916_dsi_cfg = {
.io_offset = DSI_6G_REG_SHIFT,
- .reg_cfg = {
- .num = 2,
- .regs = {
- {"vdda", 10}, /* 1.2 V */
- {"vddio", 10}, /* 1.8 V */
- },
- },
+ .regulator_data = msm8916_dsi_regulators,
+ .num_regulators = ARRAY_SIZE(msm8916_dsi_regulators),
.bus_clk_names = dsi_8916_bus_clk_names,
.num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names),
.io_start = { 0x1a98000 },
@@ -68,34 +68,34 @@ static const char * const dsi_8976_bus_clk_names[] = {
"mdp_core", "iface", "bus",
};
+static const struct regulator_bulk_data msm8976_dsi_regulators[] = {
+ { .supply = "vdda", .init_load_uA = 10 }, /* 1.2 V */
+ { .supply = "vddio", .init_load_uA = 10 }, /* 1.8 V */
+};
+
static const struct msm_dsi_config msm8976_dsi_cfg = {
.io_offset = DSI_6G_REG_SHIFT,
- .reg_cfg = {
- .num = 2,
- .regs = {
- {"vdda", 10}, /* 1.2 V */
- {"vddio", 10}, /* 1.8 V */
- },
- },
+ .regulator_data = msm8976_dsi_regulators,
+ .num_regulators = ARRAY_SIZE(msm8976_dsi_regulators),
.bus_clk_names = dsi_8976_bus_clk_names,
.num_bus_clks = ARRAY_SIZE(dsi_8976_bus_clk_names),
.io_
[PATCH v2 6/7] regulator: core: Allow drivers to define their init data as const
Drivers tend to want to define the names of their regulators somewhere
in their source file as "static const". This means, inevitable, that
every driver out there open codes something like this:
static const char * const supply_names[] = {
"vcc", "vccl",
};
static int get_regulators(struct my_data *data)
{
int i;
data->supplies = devm_kzalloc(...)
if (!data->supplies)
return -ENOMEM;
for (i = 0; i < ARRAY_SIZE(supply_names); i++)
data->supplies[i].supply = supply_names[i];
return devm_regulator_bulk_get(data->dev,
ARRAY_SIZE(supply_names),
data->supplies);
}
Let's make this more convenient by doing providing a helper that does
the copy.
I have chosen to have the "const" input structure here be the exact
same structure as the normal one passed to
devm_regulator_bulk_get(). This is slightly inefficent since the input
data can't possibly have anything useful for "ret" or consumer and
thus we waste 8 bytes per structure. This seems an OK tradeoff for not
introducing an extra structure.
Signed-off-by: Douglas Anderson
---
Changes in v2:
- ("Allow drivers to define their init data as const") new for v2.
drivers/regulator/devres.c | 28
include/linux/regulator/consumer.h | 4
2 files changed, 32 insertions(+)
diff --git a/drivers/regulator/devres.c b/drivers/regulator/devres.c
index 9113233f41cd..32823a87fd40 100644
--- a/drivers/regulator/devres.c
+++ b/drivers/regulator/devres.c
@@ -166,6 +166,34 @@ int devm_regulator_bulk_get(struct device *dev, int
num_consumers,
}
EXPORT_SYMBOL_GPL(devm_regulator_bulk_get);
+/**
+ * devm_regulator_bulk_get_const - devm_regulator_bulk_get() w/ const data
+ *
+ * @dev: device to supply
+ * @num_consumers: number of consumers to register
+ * @in_consumers: const configuration of consumers
+ * @out_consumers: in_consumers is copied here and this is passed to
+ *devm_regulator_bulk_get().
+ *
+ * This is a convenience function to allow bulk regulator configuration
+ * to be stored "static const" in files.
+ *
+ * Return: 0 on success, an errno on failure.
+ */
+int devm_regulator_bulk_get_const(struct device *dev, int num_consumers,
+ const struct regulator_bulk_data
*in_consumers,
+ struct regulator_bulk_data **out_consumers)
+{
+ *out_consumers = devm_kmemdup(dev, in_consumers,
+ num_consumers * sizeof(*in_consumers),
+ GFP_KERNEL);
+ if (*out_consumers == NULL)
+ return -ENOMEM;
+
+ return devm_regulator_bulk_get(dev, num_consumers, *out_consumers);
+}
+EXPORT_SYMBOL_GPL(devm_regulator_bulk_get_const);
+
static void devm_rdev_release(struct device *dev, void *res)
{
regulator_unregister(*(struct regulator_dev **)res);
diff --git a/include/linux/regulator/consumer.h
b/include/linux/regulator/consumer.h
index 5779f4466e62..bc6cda706d1f 100644
--- a/include/linux/regulator/consumer.h
+++ b/include/linux/regulator/consumer.h
@@ -244,6 +244,10 @@ int __must_check regulator_bulk_get(struct device *dev,
int num_consumers,
struct regulator_bulk_data *consumers);
int __must_check devm_regulator_bulk_get(struct device *dev, int num_consumers,
struct regulator_bulk_data *consumers);
+int __must_check devm_regulator_bulk_get_const(
+ struct device *dev, int num_consumers,
+ const struct regulator_bulk_data *in_consumers,
+ struct regulator_bulk_data **out_consumers);
int __must_check regulator_bulk_enable(int num_consumers,
struct regulator_bulk_data *consumers);
int regulator_bulk_disable(int num_consumers,
--
2.37.1.359.gd136c6c3e2-goog
Re: [PATCH v3 26/32] drm/via: Add via_drm.h
Hi Kevin.
On Mon, Jul 25, 2022 at 04:53:53PM -0700, Kevin Brace wrote:
> From: Kevin Brace
>
> Changed the uAPI.
>
> Signed-off-by: Kevin Brace
It would be great to have the new extensions to the UAPI documented
using kernel-doc.
As an example see: vc4_drm.h
There are a lot of UAPI that is missing documentation, but if we do not
add it for new UAPI then this situation never improves.
Please use __u32, __u64 like you see in other drm UAPI files.
PS. If you reply to this mail, then please keep the full mail as
usually my mails to Kevin bounces (something with STARTTLS).
Sam
> ---
> include/uapi/drm/via_drm.h | 35 +++
> 1 file changed, 31 insertions(+), 4 deletions(-)
>
> diff --git a/include/uapi/drm/via_drm.h b/include/uapi/drm/via_drm.h
> index a1e125d42208..e9da45ce130a 100644
> --- a/include/uapi/drm/via_drm.h
> +++ b/include/uapi/drm/via_drm.h
> @@ -1,4 +1,5 @@
> /*
> + * Copyright © 2020 Kevin Brace
> * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
> * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
> *
> @@ -16,10 +17,10 @@
> * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
> - * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> OTHER
> - * DEALINGS IN THE SOFTWARE.
> + * THE AUTHORS, COPYRIGHT HOLDERS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY
> + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
> + * OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR
> + * THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> */
Do not mix license changes with other changes - and use SPDX tag if
possible for the updated license.
See other drm UAPI files for examples.
> #ifndef _VIA_DRM_H_
> #define _VIA_DRM_H_
> @@ -81,6 +82,11 @@ extern "C" {
> #define DRM_VIA_DMA_BLIT0x0e
> #define DRM_VIA_BLIT_SYNC 0x0f
>
> +#define DRM_VIA_GEM_CREATE 0x10
> +#define DRM_VIA_GEM_MAP 0x11
> +#define DRM_VIA_GEM_UNMAP 0x12
> +
Use the same alignment as the previous lines.
> +
Drop extra empty line.
> #define DRM_IOCTL_VIA_ALLOCMEM DRM_IOWR(DRM_COMMAND_BASE +
> DRM_VIA_ALLOCMEM, drm_via_mem_t)
> #define DRM_IOCTL_VIA_FREEMEM DRM_IOW( DRM_COMMAND_BASE +
> DRM_VIA_FREEMEM, drm_via_mem_t)
> #define DRM_IOCTL_VIA_AGP_INIT DRM_IOWR(DRM_COMMAND_BASE +
> DRM_VIA_AGP_INIT, drm_via_agp_t)
> @@ -97,6 +103,10 @@ extern "C" {
> #define DRM_IOCTL_VIA_DMA_BLITDRM_IOW(DRM_COMMAND_BASE +
> DRM_VIA_DMA_BLIT, drm_via_dmablit_t)
> #define DRM_IOCTL_VIA_BLIT_SYNC DRM_IOW(DRM_COMMAND_BASE +
> DRM_VIA_BLIT_SYNC, drm_via_blitsync_t)
>
> +#define DRM_IOCTL_VIA_GEM_CREATEDRM_IOWR(DRM_COMMAND_BASE +
> DRM_VIA_GEM_CREATE, struct drm_via_gem_create)
> +#define DRM_IOCTL_VIA_GEM_MAP DRM_IOWR(DRM_COMMAND_BASE +
> DRM_VIA_GEM_MAP, struct drm_via_gem_map)
> +#define DRM_IOCTL_VIA_GEM_UNMAP DRM_IOR(DRM_COMMAND_BASE +
> DRM_VIA_GEM_UNMAP, struct drm_via_gem_unmap)
> +
Use same alignment as previous lines.
> /* Indices into buf.Setup where various bits of state are mirrored per
> * context and per buffer. These can be fired at the card as a unit,
> * or in a piecewise fashion as required.
> @@ -275,6 +285,23 @@ typedef struct drm_via_dmablit {
> drm_via_blitsync_t sync;
> } drm_via_dmablit_t;
>
> +struct drm_via_gem_create {
> + uint64_t size;
> + uint32_t alignment;
> + uint32_t domain;
> + uint32_t handle;
> + uint64_t offset;
> +};
I do not know if this is relevant, but adding a 64 bit parameter
(offset) that is only 32 bit aligned looks like trouble to me.
I hope others that knows this better can comment here.
> +
> +struct drm_via_gem_map {
> + uint32_t handle;
> + uint64_t map_offset;
> +};
Same here with the alignment.
If drm_via_gem_create.offset and drm_via_gem_map.map_offset is the same
the field should have the same name - to make the API easier to use.
> +
> +struct drm_via_gem_unmap {
> + uint32_t handle;
> +};
> +
> #if defined(__cplusplus)
> }
> #endif
> --
> 2.35.1
[PATCH v3 00/15] drm+msm: Shrinker and LRU rework
From: Rob Clark Mostly a resend with switch to lockdep asserts for the GEM LRU helper and conversion of msm locking checks to lockdep asserts, since that seemed like a good idea. original description below: This is mostly motivated by getting drm/msm to pass an i-g-t shrinker test that I've been working on. In particular the test creates and cycles between more GEM buffers than what will fit in RAM to force eviction and re-pin. (There are sub-tests that cover this case both single threaded and with many child processes in parallel.) Getting this test to pass necessitated a few improvements: 1. Re-ordering submit path to get rid of __GFP_NORETRY (in the common case, doing this for syncobjs is still TODO) 2. Decoupling locks needed in the retire path from locks that could be held while hitting reclaim in the submit path 3. If necessary, allow stalling on active BOs for reclaim. The latter point is because we pin objects in the synchronous part of the submit path (before queuing on the drm gpu-scheduler), which means in the parallel variant of the i-g-t test, we need to be able to block in the reclaim path until some queued work has completed/retired. In the process of re-working how drm/msm tracks buffer state in it's various LRU lists, I refactored out a drm_gem_lru helper which, in theory, should be usable by other drivers and drm shmem helpers for implementing LRU tracking and shrinker. v2: rebase + small fix in 13/13 v3: use lockdep_assert_held in GEM LRU helper, and add a couple patches at the end to convert MSM from WARN_ON(!is_locked()) to lockdep asserts Rob Clark (15): drm/msm: Reorder lock vs submit alloc drm/msm: Small submit cleanup drm/msm: Split out idr_lock drm/msm/gem: Check for active in shrinker path drm/msm/gem: Rename update_inactive drm/msm/gem: Rename to pin/unpin_pages drm/msm/gem: Consolidate pin/unpin paths drm/msm/gem: Remove active refcnt drm/gem: Add LRU/shrinker helper drm/msm/gem: Convert to using drm_gem_lru drm/msm/gem: Unpin buffers earlier drm/msm/gem: Consolidate shrinker trace drm/msm/gem: Evict active GEM objects when necessary drm/msm/gem: Add msm_gem_assert_locked() drm/msm/gem: Convert to lockdep assert drivers/gpu/drm/drm_gem.c | 183 + drivers/gpu/drm/msm/msm_drv.c | 18 ++- drivers/gpu/drm/msm/msm_drv.h | 70 +++--- drivers/gpu/drm/msm/msm_gem.c | 179 +--- drivers/gpu/drm/msm/msm_gem.h | 123 ++--- drivers/gpu/drm/msm/msm_gem_prime.c| 4 +- drivers/gpu/drm/msm/msm_gem_shrinker.c | 164 ++ drivers/gpu/drm/msm/msm_gem_submit.c | 78 --- drivers/gpu/drm/msm/msm_gpu.c | 3 - drivers/gpu/drm/msm/msm_gpu.h | 10 +- drivers/gpu/drm/msm/msm_gpu_trace.h| 36 +++-- drivers/gpu/drm/msm/msm_submitqueue.c | 1 + include/drm/drm_gem.h | 56 13 files changed, 505 insertions(+), 420 deletions(-) -- 2.36.1
[PATCH v3 01/15] drm/msm: Reorder lock vs submit alloc
From: Rob Clark
This lets us drop the NORETRY.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem_submit.c | 24 ++--
1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c
b/drivers/gpu/drm/msm/msm_gem_submit.c
index c9e4aeb14f4a..b7c61a99d274 100644
--- a/drivers/gpu/drm/msm/msm_gem_submit.c
+++ b/drivers/gpu/drm/msm/msm_gem_submit.c
@@ -36,7 +36,7 @@ static struct msm_gem_submit *submit_create(struct drm_device
*dev,
if (sz > SIZE_MAX)
return ERR_PTR(-ENOMEM);
- submit = kzalloc(sz, GFP_KERNEL | __GFP_NOWARN | __GFP_NORETRY);
+ submit = kzalloc(sz, GFP_KERNEL);
if (!submit)
return ERR_PTR(-ENOMEM);
@@ -771,25 +771,21 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void
*data,
trace_msm_gpu_submit(pid_nr(pid), ring->id, submitid,
args->nr_bos, args->nr_cmds);
- ret = mutex_lock_interruptible(&queue->lock);
- if (ret)
- goto out_post_unlock;
-
if (args->flags & MSM_SUBMIT_FENCE_FD_OUT) {
out_fence_fd = get_unused_fd_flags(O_CLOEXEC);
if (out_fence_fd < 0) {
ret = out_fence_fd;
- goto out_unlock;
+ return ret;
}
}
- submit = submit_create(dev, gpu, queue, args->nr_bos,
- args->nr_cmds);
- if (IS_ERR(submit)) {
- ret = PTR_ERR(submit);
- submit = NULL;
- goto out_unlock;
- }
+ submit = submit_create(dev, gpu, queue, args->nr_bos, args->nr_cmds);
+ if (IS_ERR(submit))
+ return PTR_ERR(submit);
+
+ ret = mutex_lock_interruptible(&queue->lock);
+ if (ret)
+ goto out_post_unlock;
submit->pid = pid;
submit->ident = submitid;
@@ -965,9 +961,9 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
if (ret && (out_fence_fd >= 0))
put_unused_fd(out_fence_fd);
mutex_unlock(&queue->lock);
+out_post_unlock:
if (submit)
msm_gem_submit_put(submit);
-out_post_unlock:
if (!IS_ERR_OR_NULL(post_deps)) {
for (i = 0; i < args->nr_out_syncobjs; ++i) {
kfree(post_deps[i].chain);
--
2.36.1
[PATCH v3 02/15] drm/msm: Small submit cleanup
From: Rob Clark
Move more initialization into submit_create().
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem_submit.c | 20 +---
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c
b/drivers/gpu/drm/msm/msm_gem_submit.c
index b7c61a99d274..c7819781879c 100644
--- a/drivers/gpu/drm/msm/msm_gem_submit.c
+++ b/drivers/gpu/drm/msm/msm_gem_submit.c
@@ -26,6 +26,7 @@ static struct msm_gem_submit *submit_create(struct drm_device
*dev,
struct msm_gpu_submitqueue *queue, uint32_t nr_bos,
uint32_t nr_cmds)
{
+ static atomic_t ident = ATOMIC_INIT(0);
struct msm_gem_submit *submit;
uint64_t sz;
int ret;
@@ -52,9 +53,13 @@ static struct msm_gem_submit *submit_create(struct
drm_device *dev,
submit->gpu = gpu;
submit->cmd = (void *)&submit->bos[nr_bos];
submit->queue = queue;
+ submit->pid = get_pid(task_pid(current));
submit->ring = gpu->rb[queue->ring_nr];
submit->fault_dumped = false;
+ /* Get a unique identifier for the submission for logging purposes */
+ submit->ident = atomic_inc_return(&ident) - 1;
+
INIT_LIST_HEAD(&submit->node);
return submit;
@@ -718,7 +723,6 @@ static void msm_process_post_deps(struct
msm_submit_post_dep *post_deps,
int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
struct drm_file *file)
{
- static atomic_t ident = ATOMIC_INIT(0);
struct msm_drm_private *priv = dev->dev_private;
struct drm_msm_gem_submit *args = data;
struct msm_file_private *ctx = file->driver_priv;
@@ -729,10 +733,9 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void
*data,
struct msm_submit_post_dep *post_deps = NULL;
struct drm_syncobj **syncobjs_to_reset = NULL;
int out_fence_fd = -1;
- struct pid *pid = get_pid(task_pid(current));
bool has_ww_ticket = false;
unsigned i;
- int ret, submitid;
+ int ret;
if (!gpu)
return -ENXIO;
@@ -764,12 +767,7 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void
*data,
if (!queue)
return -ENOENT;
- /* Get a unique identifier for the submission for logging purposes */
- submitid = atomic_inc_return(&ident) - 1;
-
ring = gpu->rb[queue->ring_nr];
- trace_msm_gpu_submit(pid_nr(pid), ring->id, submitid,
- args->nr_bos, args->nr_cmds);
if (args->flags & MSM_SUBMIT_FENCE_FD_OUT) {
out_fence_fd = get_unused_fd_flags(O_CLOEXEC);
@@ -783,13 +781,13 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void
*data,
if (IS_ERR(submit))
return PTR_ERR(submit);
+ trace_msm_gpu_submit(pid_nr(submit->pid), ring->id, submit->ident,
+ args->nr_bos, args->nr_cmds);
+
ret = mutex_lock_interruptible(&queue->lock);
if (ret)
goto out_post_unlock;
- submit->pid = pid;
- submit->ident = submitid;
-
if (args->flags & MSM_SUBMIT_SUDO)
submit->in_rb = true;
--
2.36.1
[PATCH v3 04/15] drm/msm/gem: Check for active in shrinker path
From: Rob Clark
Currently in our shrinker path we shouldn't be encountering anything
that is active, but this will change in subsequent patches. So check
if there are unsignaled fences.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.c | 10 ++
drivers/gpu/drm/msm/msm_gem.h | 1 +
drivers/gpu/drm/msm/msm_gem_shrinker.c | 6 ++
3 files changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index 8ddbd2e001d4..b55d252aef17 100644
--- a/drivers/gpu/drm/msm/msm_gem.c
+++ b/drivers/gpu/drm/msm/msm_gem.c
@@ -870,6 +870,16 @@ static void update_inactive(struct msm_gem_object *msm_obj)
mutex_unlock(&priv->mm_lock);
}
+bool msm_gem_active(struct drm_gem_object *obj)
+{
+ GEM_WARN_ON(!msm_gem_is_locked(obj));
+
+ if (to_msm_bo(obj)->pin_count)
+ return true;
+
+ return !dma_resv_test_signaled(obj->resv, dma_resv_usage_rw(true));
+}
+
int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t *timeout)
{
bool write = !!(op & MSM_PREP_WRITE);
diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h
index 432032ad4aed..0ab0dc4f8c25 100644
--- a/drivers/gpu/drm/msm/msm_gem.h
+++ b/drivers/gpu/drm/msm/msm_gem.h
@@ -173,6 +173,7 @@ void msm_gem_put_vaddr(struct drm_gem_object *obj);
int msm_gem_madvise(struct drm_gem_object *obj, unsigned madv);
void msm_gem_active_get(struct drm_gem_object *obj, struct msm_gpu *gpu);
void msm_gem_active_put(struct drm_gem_object *obj);
+bool msm_gem_active(struct drm_gem_object *obj);
int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t
*timeout);
int msm_gem_cpu_fini(struct drm_gem_object *obj);
int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file,
diff --git a/drivers/gpu/drm/msm/msm_gem_shrinker.c
b/drivers/gpu/drm/msm/msm_gem_shrinker.c
index 6e39d959b9f0..ea8ed74982c1 100644
--- a/drivers/gpu/drm/msm/msm_gem_shrinker.c
+++ b/drivers/gpu/drm/msm/msm_gem_shrinker.c
@@ -43,6 +43,9 @@ purge(struct msm_gem_object *msm_obj)
if (!is_purgeable(msm_obj))
return false;
+ if (msm_gem_active(&msm_obj->base))
+ return false;
+
/*
* This will move the obj out of still_in_list to
* the purged list
@@ -58,6 +61,9 @@ evict(struct msm_gem_object *msm_obj)
if (is_unevictable(msm_obj))
return false;
+ if (msm_gem_active(&msm_obj->base))
+ return false;
+
msm_gem_evict(&msm_obj->base);
return true;
--
2.36.1
[PATCH v3 08/15] drm/msm/gem: Remove active refcnt
From: Rob Clark
At this point the pinned refcnt is sufficient, and the shrinker is
already prepared to encounter objects which are still active according
to fences attached to the resv.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.c| 45 ++--
drivers/gpu/drm/msm/msm_gem.h| 14 ++---
drivers/gpu/drm/msm/msm_gem_submit.c | 22 ++
3 files changed, 8 insertions(+), 73 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index 407b18a24dc4..209438744bab 100644
--- a/drivers/gpu/drm/msm/msm_gem.c
+++ b/drivers/gpu/drm/msm/msm_gem.c
@@ -734,8 +734,7 @@ int msm_gem_madvise(struct drm_gem_object *obj, unsigned
madv)
/* If the obj is inactive, we might need to move it
* between inactive lists
*/
- if (msm_obj->active_count == 0)
- update_lru(obj);
+ update_lru(obj);
msm_gem_unlock(obj);
@@ -788,7 +787,6 @@ void msm_gem_evict(struct drm_gem_object *obj)
GEM_WARN_ON(!msm_gem_is_locked(obj));
GEM_WARN_ON(is_unevictable(msm_obj));
GEM_WARN_ON(!msm_obj->evictable);
- GEM_WARN_ON(msm_obj->active_count);
/* Get rid of any iommu mapping(s): */
put_iova_spaces(obj, false);
@@ -813,37 +811,6 @@ void msm_gem_vunmap(struct drm_gem_object *obj)
msm_obj->vaddr = NULL;
}
-void msm_gem_active_get(struct drm_gem_object *obj, struct msm_gpu *gpu)
-{
- struct msm_gem_object *msm_obj = to_msm_bo(obj);
- struct msm_drm_private *priv = obj->dev->dev_private;
-
- might_sleep();
- GEM_WARN_ON(!msm_gem_is_locked(obj));
- GEM_WARN_ON(msm_obj->madv != MSM_MADV_WILLNEED);
- GEM_WARN_ON(msm_obj->dontneed);
-
- if (msm_obj->active_count++ == 0) {
- mutex_lock(&priv->mm_lock);
- if (msm_obj->evictable)
- mark_unevictable(msm_obj);
- list_move_tail(&msm_obj->mm_list, &gpu->active_list);
- mutex_unlock(&priv->mm_lock);
- }
-}
-
-void msm_gem_active_put(struct drm_gem_object *obj)
-{
- struct msm_gem_object *msm_obj = to_msm_bo(obj);
-
- might_sleep();
- GEM_WARN_ON(!msm_gem_is_locked(obj));
-
- if (--msm_obj->active_count == 0) {
- update_lru(obj);
- }
-}
-
static void update_lru(struct drm_gem_object *obj)
{
struct msm_drm_private *priv = obj->dev->dev_private;
@@ -851,9 +818,6 @@ static void update_lru(struct drm_gem_object *obj)
GEM_WARN_ON(!msm_gem_is_locked(&msm_obj->base));
- if (msm_obj->active_count != 0)
- return;
-
mutex_lock(&priv->mm_lock);
if (msm_obj->dontneed)
@@ -926,7 +890,7 @@ void msm_gem_describe(struct drm_gem_object *obj, struct
seq_file *m,
stats->all.count++;
stats->all.size += obj->size;
- if (is_active(msm_obj)) {
+ if (msm_gem_active(obj)) {
stats->active.count++;
stats->active.size += obj->size;
}
@@ -954,7 +918,7 @@ void msm_gem_describe(struct drm_gem_object *obj, struct
seq_file *m,
}
seq_printf(m, "%08x: %c %2d (%2d) %08llx %p",
- msm_obj->flags, is_active(msm_obj) ? 'A' : 'I',
+ msm_obj->flags, msm_gem_active(obj) ? 'A' : 'I',
obj->name, kref_read(&obj->refcount),
off, msm_obj->vaddr);
@@ -1037,9 +1001,6 @@ static void msm_gem_free_object(struct drm_gem_object
*obj)
list_del(&msm_obj->mm_list);
mutex_unlock(&priv->mm_lock);
- /* object should not be on active list: */
- GEM_WARN_ON(is_active(msm_obj));
-
put_iova_spaces(obj, true);
if (obj->import_attach) {
diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h
index 6fe521ccda45..420ba49bf21a 100644
--- a/drivers/gpu/drm/msm/msm_gem.h
+++ b/drivers/gpu/drm/msm/msm_gem.h
@@ -138,7 +138,6 @@ struct msm_gem_object {
char name[32]; /* Identifier to print for the debugfs files */
- int active_count;
int pin_count;
};
#define to_msm_bo(x) container_of(x, struct msm_gem_object, base)
@@ -171,8 +170,6 @@ void *msm_gem_get_vaddr_active(struct drm_gem_object *obj);
void msm_gem_put_vaddr_locked(struct drm_gem_object *obj);
void msm_gem_put_vaddr(struct drm_gem_object *obj);
int msm_gem_madvise(struct drm_gem_object *obj, unsigned madv);
-void msm_gem_active_get(struct drm_gem_object *obj, struct msm_gpu *gpu);
-void msm_gem_active_put(struct drm_gem_object *obj);
bool msm_gem_active(struct drm_gem_object *obj);
int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t
*timeout);
int msm_gem_cpu_fini(struct drm_gem_object *obj);
@@ -245,12 +242,6 @@ msm_gem_is_locked(struct drm_gem_object *obj)
return dma_resv_is_locked(obj->resv) || (kref_read(&obj->refcount) ==
0);
}
-static inline bool is_active(struct msm_gem_ob
[PATCH v3 05/15] drm/msm/gem: Rename update_inactive
From: Rob Clark
Really what this is doing is updating various LRU lists.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.c | 25 +
1 file changed, 13 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index b55d252aef17..97467364dc0a 100644
--- a/drivers/gpu/drm/msm/msm_gem.c
+++ b/drivers/gpu/drm/msm/msm_gem.c
@@ -19,7 +19,7 @@
#include "msm_gpu.h"
#include "msm_mmu.h"
-static void update_inactive(struct msm_gem_object *msm_obj);
+static void update_lru(struct drm_gem_object *obj);
static dma_addr_t physaddr(struct drm_gem_object *obj)
{
@@ -132,7 +132,7 @@ static struct page **get_pages(struct drm_gem_object *obj)
if (msm_obj->flags & MSM_BO_WC)
sync_for_device(msm_obj);
- update_inactive(msm_obj);
+ update_lru(obj);
}
return msm_obj->pages;
@@ -193,7 +193,7 @@ struct page **msm_gem_get_pages(struct drm_gem_object *obj)
if (!IS_ERR(p)) {
msm_obj->pin_count++;
- update_inactive(msm_obj);
+ update_lru(obj);
}
msm_gem_unlock(obj);
@@ -207,7 +207,7 @@ void msm_gem_put_pages(struct drm_gem_object *obj)
msm_gem_lock(obj);
msm_obj->pin_count--;
GEM_WARN_ON(msm_obj->pin_count < 0);
- update_inactive(msm_obj);
+ update_lru(obj);
msm_gem_unlock(obj);
}
@@ -449,7 +449,7 @@ void msm_gem_unpin_locked(struct drm_gem_object *obj)
msm_obj->pin_count--;
GEM_WARN_ON(msm_obj->pin_count < 0);
- update_inactive(msm_obj);
+ update_lru(obj);
}
struct msm_gem_vma *msm_gem_get_vma_locked(struct drm_gem_object *obj,
@@ -658,7 +658,7 @@ static void *get_vaddr(struct drm_gem_object *obj, unsigned
madv)
goto fail;
}
- update_inactive(msm_obj);
+ update_lru(obj);
}
return msm_obj->vaddr;
@@ -730,7 +730,7 @@ int msm_gem_madvise(struct drm_gem_object *obj, unsigned
madv)
* between inactive lists
*/
if (msm_obj->active_count == 0)
- update_inactive(msm_obj);
+ update_lru(obj);
msm_gem_unlock(obj);
@@ -757,7 +757,7 @@ void msm_gem_purge(struct drm_gem_object *obj)
put_iova_vmas(obj);
msm_obj->madv = __MSM_MADV_PURGED;
- update_inactive(msm_obj);
+ update_lru(obj);
drm_gem_free_mmap_offset(obj);
@@ -792,7 +792,7 @@ void msm_gem_evict(struct drm_gem_object *obj)
put_pages(obj);
- update_inactive(msm_obj);
+ update_lru(obj);
}
void msm_gem_vunmap(struct drm_gem_object *obj)
@@ -835,13 +835,14 @@ void msm_gem_active_put(struct drm_gem_object *obj)
GEM_WARN_ON(!msm_gem_is_locked(obj));
if (--msm_obj->active_count == 0) {
- update_inactive(msm_obj);
+ update_lru(obj);
}
}
-static void update_inactive(struct msm_gem_object *msm_obj)
+static void update_lru(struct drm_gem_object *obj)
{
- struct msm_drm_private *priv = msm_obj->base.dev->dev_private;
+ struct msm_drm_private *priv = obj->dev->dev_private;
+ struct msm_gem_object *msm_obj = to_msm_bo(obj);
GEM_WARN_ON(!msm_gem_is_locked(&msm_obj->base));
--
2.36.1
[PATCH v3 07/15] drm/msm/gem: Consolidate pin/unpin paths
From: Rob Clark
Avoid having multiple spots where we increment/decrement pin_count (and
associated LRU updating)
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c
index 3da64c7f65a2..407b18a24dc4 100644
--- a/drivers/gpu/drm/msm/msm_gem.c
+++ b/drivers/gpu/drm/msm/msm_gem.c
@@ -190,7 +190,7 @@ static struct page **msm_gem_pin_pages_locked(struct
drm_gem_object *obj)
p = get_pages(obj);
if (!IS_ERR(p)) {
- msm_obj->pin_count++;
+ to_msm_bo(obj)->pin_count++;
update_lru(obj);
}
@@ -213,9 +213,7 @@ void msm_gem_unpin_pages(struct drm_gem_object *obj)
struct msm_gem_object *msm_obj = to_msm_bo(obj);
msm_gem_lock(obj);
- msm_obj->pin_count--;
- GEM_WARN_ON(msm_obj->pin_count < 0);
- update_lru(obj);
+ msm_gem_unpin_locked(obj);
msm_gem_unlock(obj);
}
@@ -436,14 +434,13 @@ int msm_gem_pin_vma_locked(struct drm_gem_object *obj,
struct msm_gem_vma *vma)
if (GEM_WARN_ON(msm_obj->madv != MSM_MADV_WILLNEED))
return -EBUSY;
- pages = get_pages(obj);
+ pages = msm_gem_pin_pages_locked(obj);
if (IS_ERR(pages))
return PTR_ERR(pages);
ret = msm_gem_map_vma(vma->aspace, vma, prot, msm_obj->sgt, obj->size);
-
- if (!ret)
- msm_obj->pin_count++;
+ if (ret)
+ msm_gem_unpin_locked(obj);
return ret;
}
--
2.36.1
[PATCH v3 03/15] drm/msm: Split out idr_lock
From: Rob Clark
Otherwise if we hit reclaim pinning objects in the submit path, we'll be
blocking retire_worker trying to free a submit.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_drv.c | 4 ++--
drivers/gpu/drm/msm/msm_gem_submit.c | 10 --
drivers/gpu/drm/msm/msm_gpu.h | 4 +++-
drivers/gpu/drm/msm/msm_submitqueue.c | 1 +
4 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 1ed4cd09dbf8..d7ca025457b6 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -883,13 +883,13 @@ static int wait_fence(struct msm_gpu_submitqueue *queue,
uint32_t fence_id,
* retired, so if the fence is not found it means there is nothing
* to wait for
*/
- ret = mutex_lock_interruptible(&queue->lock);
+ ret = mutex_lock_interruptible(&queue->idr_lock);
if (ret)
return ret;
fence = idr_find(&queue->fence_idr, fence_id);
if (fence)
fence = dma_fence_get_rcu(fence);
- mutex_unlock(&queue->lock);
+ mutex_unlock(&queue->idr_lock);
if (!fence)
return 0;
diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c
b/drivers/gpu/drm/msm/msm_gem_submit.c
index c7819781879c..16c662808522 100644
--- a/drivers/gpu/drm/msm/msm_gem_submit.c
+++ b/drivers/gpu/drm/msm/msm_gem_submit.c
@@ -72,9 +72,9 @@ void __msm_gem_submit_destroy(struct kref *kref)
unsigned i;
if (submit->fence_id) {
- mutex_lock(&submit->queue->lock);
+ mutex_lock(&submit->queue->idr_lock);
idr_remove(&submit->queue->fence_idr, submit->fence_id);
- mutex_unlock(&submit->queue->lock);
+ mutex_unlock(&submit->queue->idr_lock);
}
dma_fence_put(submit->user_fence);
@@ -881,6 +881,8 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
submit->nr_cmds = i;
+ mutex_lock(&queue->idr_lock);
+
/*
* If using userspace provided seqno fence, validate that the id
* is available before arming sched job. Since access to fence_idr
@@ -889,6 +891,7 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
*/
if ((args->flags & MSM_SUBMIT_FENCE_SN_IN) &&
idr_find(&queue->fence_idr, args->fence)) {
+ mutex_unlock(&queue->idr_lock);
ret = -EINVAL;
goto out;
}
@@ -921,6 +924,9 @@ int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
submit->user_fence, 1,
INT_MAX, GFP_KERNEL);
}
+
+ mutex_unlock(&queue->idr_lock);
+
if (submit->fence_id < 0) {
ret = submit->fence_id;
submit->fence_id = 0;
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index 4d935fedd2ac..962d2070bcdf 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -466,7 +466,8 @@ static inline int msm_gpu_convert_priority(struct msm_gpu
*gpu, int prio,
* @node: node in the context's list of submitqueues
* @fence_idr: maps fence-id to dma_fence for userspace visible fence
* seqno, protected by submitqueue lock
- * @lock: submitqueue lock
+ * @idr_lock: for serializing access to fence_idr
+ * @lock: submitqueue lock for serializing submits on a queue
* @ref: reference count
* @entity:the submit job-queue
*/
@@ -479,6 +480,7 @@ struct msm_gpu_submitqueue {
struct msm_file_private *ctx;
struct list_head node;
struct idr fence_idr;
+ struct mutex idr_lock;
struct mutex lock;
struct kref ref;
struct drm_sched_entity *entity;
diff --git a/drivers/gpu/drm/msm/msm_submitqueue.c
b/drivers/gpu/drm/msm/msm_submitqueue.c
index f486a3cd4e55..c6929e205b51 100644
--- a/drivers/gpu/drm/msm/msm_submitqueue.c
+++ b/drivers/gpu/drm/msm/msm_submitqueue.c
@@ -200,6 +200,7 @@ int msm_submitqueue_create(struct drm_device *drm, struct
msm_file_private *ctx,
*id = queue->id;
idr_init(&queue->fence_idr);
+ mutex_init(&queue->idr_lock);
mutex_init(&queue->lock);
list_add_tail(&queue->node, &ctx->submitqueues);
--
2.36.1
[PATCH v3 09/15] drm/gem: Add LRU/shrinker helper
From: Rob Clark
Add a simple LRU helper to assist with driver's shrinker implementation.
It handles tracking the number of backing pages associated with a given
LRU, and provides a helper to implement shrinker_scan.
A driver can use multiple LRU instances to track objects in various
states, for example a dontneed LRU for purgeable objects, a willneed LRU
for evictable objects, and an unpinned LRU for objects without backing
pages.
All LRUs that the object can be moved between must share a single lock.
v2: lockdep_assert_held() instead of WARN_ON(!mutex_is_locked())
Cc: Daniel Vetter
Cc: Thomas Zimmermann
Cc: Dmitry Osipenko
Signed-off-by: Rob Clark
Reviewed-by: Dmitry Osipenko
---
drivers/gpu/drm/drm_gem.c | 183 ++
include/drm/drm_gem.h | 56
2 files changed, 239 insertions(+)
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index eb0c2d041f13..f0526aaf013a 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -165,6 +165,7 @@ void drm_gem_private_object_init(struct drm_device *dev,
obj->resv = &obj->_resv;
drm_vma_node_reset(&obj->vma_node);
+ INIT_LIST_HEAD(&obj->lru_node);
}
EXPORT_SYMBOL(drm_gem_private_object_init);
@@ -951,6 +952,7 @@ drm_gem_object_release(struct drm_gem_object *obj)
dma_resv_fini(&obj->_resv);
drm_gem_free_mmap_offset(obj);
+ drm_gem_lru_remove(obj);
}
EXPORT_SYMBOL(drm_gem_object_release);
@@ -1274,3 +1276,184 @@ drm_gem_unlock_reservations(struct drm_gem_object
**objs, int count,
ww_acquire_fini(acquire_ctx);
}
EXPORT_SYMBOL(drm_gem_unlock_reservations);
+
+/**
+ * drm_gem_lru_init - initialize a LRU
+ *
+ * @lru: The LRU to initialize
+ * @lock: The lock protecting the LRU
+ */
+void
+drm_gem_lru_init(struct drm_gem_lru *lru, struct mutex *lock)
+{
+ lru->lock = lock;
+ lru->count = 0;
+ INIT_LIST_HEAD(&lru->list);
+}
+EXPORT_SYMBOL(drm_gem_lru_init);
+
+static void
+lru_remove(struct drm_gem_object *obj)
+{
+ obj->lru->count -= obj->size >> PAGE_SHIFT;
+ WARN_ON(obj->lru->count < 0);
+ list_del(&obj->lru_node);
+ obj->lru = NULL;
+}
+
+/**
+ * drm_gem_lru_remove - remove object from whatever LRU it is in
+ *
+ * If the object is currently in any LRU, remove it.
+ *
+ * @obj: The GEM object to remove from current LRU
+ */
+void
+drm_gem_lru_remove(struct drm_gem_object *obj)
+{
+ struct drm_gem_lru *lru = obj->lru;
+
+ if (!lru)
+ return;
+
+ mutex_lock(lru->lock);
+ lru_remove(obj);
+ mutex_unlock(lru->lock);
+}
+EXPORT_SYMBOL(drm_gem_lru_remove);
+
+/**
+ * drm_gem_lru_move_tail - move the object to the tail of the LRU
+ *
+ * If the object is already in this LRU it will be moved to the
+ * tail. Otherwise it will be removed from whichever other LRU
+ * it is in (if any) and moved into this LRU.
+ *
+ * @lru: The LRU to move the object into.
+ * @obj: The GEM object to move into this LRU
+ */
+void
+drm_gem_lru_move_tail(struct drm_gem_lru *lru, struct drm_gem_object *obj)
+{
+ mutex_lock(lru->lock);
+ drm_gem_lru_move_tail_locked(lru, obj);
+ mutex_unlock(lru->lock);
+}
+EXPORT_SYMBOL(drm_gem_lru_move_tail);
+
+/**
+ * drm_gem_lru_move_tail_locked - move the object to the tail of the LRU
+ *
+ * If the object is already in this LRU it will be moved to the
+ * tail. Otherwise it will be removed from whichever other LRU
+ * it is in (if any) and moved into this LRU.
+ *
+ * Call with LRU lock held.
+ *
+ * @lru: The LRU to move the object into.
+ * @obj: The GEM object to move into this LRU
+ */
+void
+drm_gem_lru_move_tail_locked(struct drm_gem_lru *lru, struct drm_gem_object
*obj)
+{
+ lockdep_assert_held_once(lru->lock);
+
+ if (obj->lru)
+ lru_remove(obj);
+
+ lru->count += obj->size >> PAGE_SHIFT;
+ list_add_tail(&obj->lru_node, &lru->list);
+ obj->lru = lru;
+}
+EXPORT_SYMBOL(drm_gem_lru_move_tail_locked);
+
+/**
+ * drm_gem_lru_scan - helper to implement shrinker.scan_objects
+ *
+ * If the shrink callback succeeds, it is expected that the driver
+ * move the object out of this LRU.
+ *
+ * If the LRU possibly contain active buffers, it is the responsibility
+ * of the shrink callback to check for this (ie. dma_resv_test_signaled())
+ * or if necessary block until the buffer becomes idle.
+ *
+ * @lru: The LRU to scan
+ * @nr_to_scan: The number of pages to try to reclaim
+ * @shrink: Callback to try to shrink/reclaim the object.
+ */
+unsigned long
+drm_gem_lru_scan(struct drm_gem_lru *lru, unsigned nr_to_scan,
+bool (*shrink)(struct drm_gem_object *obj))
+{
+ struct drm_gem_lru still_in_lru;
+ struct drm_gem_object *obj;
+ unsigned freed = 0;
+
+ drm_gem_lru_init(&still_in_lru, lru->lock);
+
+ mutex_lock(lru->lock);
+
+ while (freed < nr_to_scan) {
+ obj = list_first_entry_or_nu
[PATCH v3 10/15] drm/msm/gem: Convert to using drm_gem_lru
From: Rob Clark
This converts over to use the shared GEM LRU/shrinker helpers. Note
that it means we are no longer tracking purgeable or willneed buffers
that are active separately. But the most recently pinned buffers should
be at the tail of the various LRUs, and the shrinker is already prepared
to encounter objects which are still active.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_drv.c | 14 +--
drivers/gpu/drm/msm/msm_drv.h | 70 +++
drivers/gpu/drm/msm/msm_gem.c | 58
drivers/gpu/drm/msm/msm_gem.h | 93
drivers/gpu/drm/msm/msm_gem_shrinker.c | 117 ++---
drivers/gpu/drm/msm/msm_gpu.c | 3 -
drivers/gpu/drm/msm/msm_gpu.h | 6 --
7 files changed, 104 insertions(+), 257 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index d7ca025457b6..1ca4a92ba96e 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -418,14 +418,18 @@ static int msm_drm_init(struct device *dev, const struct
drm_driver *drv)
INIT_LIST_HEAD(&priv->objects);
mutex_init(&priv->obj_lock);
- INIT_LIST_HEAD(&priv->inactive_willneed);
- INIT_LIST_HEAD(&priv->inactive_dontneed);
- INIT_LIST_HEAD(&priv->inactive_unpinned);
- mutex_init(&priv->mm_lock);
+ /*
+* Initialize the LRUs:
+*/
+ mutex_init(&priv->lru.lock);
+ drm_gem_lru_init(&priv->lru.unbacked, &priv->lru.lock);
+ drm_gem_lru_init(&priv->lru.pinned, &priv->lru.lock);
+ drm_gem_lru_init(&priv->lru.willneed, &priv->lru.lock);
+ drm_gem_lru_init(&priv->lru.dontneed, &priv->lru.lock);
/* Teach lockdep about lock ordering wrt. shrinker: */
fs_reclaim_acquire(GFP_KERNEL);
- might_lock(&priv->mm_lock);
+ might_lock(&priv->lru.lock);
fs_reclaim_release(GFP_KERNEL);
drm_mode_config_init(ddev);
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index b3689a2d27d7..208ae5bc5e6b 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -142,28 +142,60 @@ struct msm_drm_private {
struct mutex obj_lock;
/**
-* LRUs of inactive GEM objects. Every bo is either in one of the
-* inactive lists (depending on whether or not it is shrinkable) or
-* gpu->active_list (for the gpu it is active on[1]), or transiently
-* on a temporary list as the shrinker is running.
+* lru:
*
-* Note that inactive_willneed also contains pinned and vmap'd bos,
-* but the number of pinned-but-not-active objects is small (scanout
-* buffers, ringbuffer, etc).
+* The various LRU's that a GEM object is in at various stages of
+* it's lifetime. Objects start out in the unbacked LRU. When
+* pinned (for scannout or permanently mapped GPU buffers, like
+* ringbuffer, memptr, fw, etc) it moves to the pinned LRU. When
+* unpinned, it moves into willneed or dontneed LRU depending on
+* madvise state. When backing pages are evicted (willneed) or
+* purged (dontneed) it moves back into the unbacked LRU.
*
-* These lists are protected by mm_lock (which should be acquired
-* before per GEM object lock). One should *not* hold mm_lock in
-* get_pages()/vmap()/etc paths, as they can trigger the shrinker.
-*
-* [1] if someone ever added support for the old 2d cores, there could
be
-* more than one gpu object
+* The dontneed LRU is considered by the shrinker for objects
+* that are candidate for purging, and the willneed LRU is
+* considered for objects that could be evicted.
*/
- struct list_head inactive_willneed; /* inactive + potentially
unpin/evictable */
- struct list_head inactive_dontneed; /* inactive + shrinkable */
- struct list_head inactive_unpinned; /* inactive + purged or unpinned */
- long shrinkable_count; /* write access under mm_lock */
- long evictable_count;/* write access under mm_lock */
- struct mutex mm_lock;
+ struct {
+ /**
+* unbacked:
+*
+* The LRU for GEM objects without backing pages allocated.
+* This mostly exists so that objects are always is one
+* LRU.
+*/
+ struct drm_gem_lru unbacked;
+
+ /**
+* pinned:
+*
+* The LRU for pinned GEM objects
+*/
+ struct drm_gem_lru pinned;
+
+ /**
+* willneed:
+*
+* The LRU for unpinned GEM objects which are in madvise
+* WILLNEED state (ie. can be evicted)
+
[PATCH v3 15/15] drm/msm/gem: Convert to lockdep assert
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem.h | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h
index 3c6add51d13b..c4844cf3a585 100644
--- a/drivers/gpu/drm/msm/msm_gem.h
+++ b/drivers/gpu/drm/msm/msm_gem.h
@@ -197,8 +197,8 @@ msm_gem_unlock(struct drm_gem_object *obj)
dma_resv_unlock(obj->resv);
}
-static inline bool
-msm_gem_is_locked(struct drm_gem_object *obj)
+static inline void
+msm_gem_assert_locked(struct drm_gem_object *obj)
{
/*
* Destroying the object is a special case.. msm_gem_free_object()
@@ -212,13 +212,10 @@ msm_gem_is_locked(struct drm_gem_object *obj)
* Unfortunately lockdep is not aware of this detail. So when the
* refcount drops to zero, we pretend it is already locked.
*/
- return dma_resv_is_locked(obj->resv) || (kref_read(&obj->refcount) ==
0);
-}
-
-static inline void
-msm_gem_assert_locked(struct drm_gem_object *obj)
-{
- GEM_WARN_ON(!msm_gem_is_locked(obj));
+ lockdep_assert_once(
+ (kref_read(&obj->refcount) == 0) ||
+ (lockdep_is_held(&obj->resv->lock.base) != LOCK_STATE_NOT_HELD)
+ );
}
/* imported/exported objects are not purgeable: */
--
2.36.1
[PATCH v3 13/15] drm/msm/gem: Evict active GEM objects when necessary
From: Rob Clark
If we are under enough memory pressure, we should stall waiting for
active buffers to become idle in order to evict.
v2: Check for __GFP_ATOMIC before blocking
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gem_shrinker.c | 70 +-
drivers/gpu/drm/msm/msm_gpu_trace.h| 16 +++---
2 files changed, 68 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_gem_shrinker.c
b/drivers/gpu/drm/msm/msm_gem_shrinker.c
index 5cc05d669a08..f31054d25314 100644
--- a/drivers/gpu/drm/msm/msm_gem_shrinker.c
+++ b/drivers/gpu/drm/msm/msm_gem_shrinker.c
@@ -24,6 +24,13 @@ static bool can_swap(void)
return enable_eviction && get_nr_swap_pages() > 0;
}
+static bool can_block(struct shrink_control *sc)
+{
+ if (sc->gfp_mask & __GFP_ATOMIC)
+ return false;
+ return current_is_kswapd() || (sc->gfp_mask & __GFP_RECLAIM);
+}
+
static unsigned long
msm_gem_shrinker_count(struct shrinker *shrinker, struct shrink_control *sc)
{
@@ -65,26 +72,65 @@ evict(struct drm_gem_object *obj)
return true;
}
+static bool
+wait_for_idle(struct drm_gem_object *obj)
+{
+ enum dma_resv_usage usage = dma_resv_usage_rw(true);
+ return dma_resv_wait_timeout(obj->resv, usage, false, 1000) > 0;
+}
+
+static bool
+active_purge(struct drm_gem_object *obj)
+{
+ if (!wait_for_idle(obj))
+ return false;
+
+ return purge(obj);
+}
+
+static bool
+active_evict(struct drm_gem_object *obj)
+{
+ if (!wait_for_idle(obj))
+ return false;
+
+ return evict(obj);
+}
+
static unsigned long
msm_gem_shrinker_scan(struct shrinker *shrinker, struct shrink_control *sc)
{
struct msm_drm_private *priv =
container_of(shrinker, struct msm_drm_private, shrinker);
+ struct {
+ struct drm_gem_lru *lru;
+ bool (*shrink)(struct drm_gem_object *obj);
+ bool cond;
+ unsigned long freed;
+ } stages[] = {
+ /* Stages of progressively more aggressive/expensive reclaim: */
+ { &priv->lru.dontneed, purge,true },
+ { &priv->lru.willneed, evict,can_swap() },
+ { &priv->lru.dontneed, active_purge, can_block(sc) },
+ { &priv->lru.willneed, active_evict, can_swap() &&
can_block(sc) },
+ };
long nr = sc->nr_to_scan;
- unsigned long freed, purged, evicted = 0;
-
- purged = drm_gem_lru_scan(&priv->lru.dontneed, nr, purge);
- nr -= purged;
-
- if (can_swap() && nr > 0) {
- evicted = drm_gem_lru_scan(&priv->lru.willneed, nr, evict);
- nr -= evicted;
+ unsigned long freed = 0;
+
+ for (unsigned i = 0; (nr > 0) && (i < ARRAY_SIZE(stages)); i++) {
+ if (!stages[i].cond)
+ continue;
+ stages[i].freed =
+ drm_gem_lru_scan(stages[i].lru, nr, stages[i].shrink);
+ nr -= stages[i].freed;
+ freed += stages[i].freed;
}
- freed = purged + evicted;
-
- if (freed)
- trace_msm_gem_shrink(sc->nr_to_scan, purged, evicted);
+ if (freed) {
+ trace_msm_gem_shrink(sc->nr_to_scan, stages[0].freed,
+stages[1].freed, stages[2].freed,
+stages[3].freed);
+ }
return (freed > 0) ? freed : SHRINK_STOP;
}
diff --git a/drivers/gpu/drm/msm/msm_gpu_trace.h
b/drivers/gpu/drm/msm/msm_gpu_trace.h
index 8867fa0a0306..ac40d857bc45 100644
--- a/drivers/gpu/drm/msm/msm_gpu_trace.h
+++ b/drivers/gpu/drm/msm/msm_gpu_trace.h
@@ -116,22 +116,26 @@ TRACE_EVENT(msm_gmu_freq_change,
TRACE_EVENT(msm_gem_shrink,
- TP_PROTO(u32 nr_to_scan, u32 purged, u32 evicted),
- TP_ARGS(nr_to_scan, purged, evicted),
+ TP_PROTO(u32 nr_to_scan, u32 purged, u32 evicted,
+u32 active_purged, u32 active_evicted),
+ TP_ARGS(nr_to_scan, purged, evicted, active_purged,
active_evicted),
TP_STRUCT__entry(
__field(u32, nr_to_scan)
__field(u32, purged)
__field(u32, evicted)
+ __field(u32, active_purged)
+ __field(u32, active_evicted)
),
TP_fast_assign(
__entry->nr_to_scan = nr_to_scan;
__entry->purged = purged;
__entry->evicted = evicted;
+ __entry->active_purged = active_purged;
+ __entry->active_evicted = active_evicted;
),
- TP_printk("nr_to_scan=%u pages, purged=%u pages, evicted=%u
pages",
- __entry->nr_to_scan,
- __entry->purged,
-
