[PATCH 10/20] drm/amd/display: Clean up some inconsistent indenting

[Jiapeng Chong]

No functional modification involved.

smatch warnings:

drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mpc.c:116 
mpc3_get_ogam_current() warn: inconsistent indenting.
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn30/dcn30_mpc.c:445 
mpc3_get_shaper_current() warn: inconsistent indenting.

Reported-by: Abaci Robot <ab...@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.ch...@linux.alibaba.com>
---
 .../gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c  | 70 +++++++++----------
 1 file changed, 35 insertions(+), 35 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c 
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
index 1981a71b961b..ad1c1b703874 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c
@@ -109,32 +109,32 @@ enum dc_lut_mode mpc3_get_ogam_current(struct mpc *mpc, 
int mpcc_id)
        uint32_t state_ram_lut_in_use;
        struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc);
 
-       REG_GET_2(MPCC_OGAM_CONTROL[mpcc_id],
-                       MPCC_OGAM_MODE_CURRENT, &state_mode,
-                       MPCC_OGAM_SELECT_CURRENT, &state_ram_lut_in_use);
+       REG_GET_2(MPCC_OGAM_CONTROL[mpcc_id], MPCC_OGAM_MODE_CURRENT, 
&state_mode,
+                 MPCC_OGAM_SELECT_CURRENT, &state_ram_lut_in_use);
 
-               switch (state_mode) {
+       switch (state_mode) {
+       case 0:
+               mode = LUT_BYPASS;
+               break;
+       case 2:
+               switch (state_ram_lut_in_use) {
                case 0:
-                       mode = LUT_BYPASS;
+                       mode = LUT_RAM_A;
                        break;
-               case 2:
-                       switch (state_ram_lut_in_use) {
-                       case 0:
-                               mode = LUT_RAM_A;
-                               break;
-                       case 1:
-                               mode = LUT_RAM_B;
-                               break;
-                       default:
-                               mode = LUT_BYPASS;
-                               break;
-                       }
+               case 1:
+                       mode = LUT_RAM_B;
                        break;
                default:
                        mode = LUT_BYPASS;
                        break;
                }
-               return mode;
+               break;
+       default:
+               mode = LUT_BYPASS;
+               break;
+       }
+
+       return mode;
 }
 
 void mpc3_power_on_ogam_lut(
@@ -439,24 +439,24 @@ static enum dc_lut_mode mpc3_get_shaper_current(struct 
mpc *mpc, uint32_t rmu_id
        uint32_t state_mode;
        struct dcn30_mpc *mpc30 = TO_DCN30_MPC(mpc);
 
-       REG_GET(SHAPER_CONTROL[rmu_idx],
-                       MPC_RMU_SHAPER_LUT_MODE_CURRENT, &state_mode);
+       REG_GET(SHAPER_CONTROL[rmu_idx], MPC_RMU_SHAPER_LUT_MODE_CURRENT, 
&state_mode);
 
-               switch (state_mode) {
-               case 0:
-                       mode = LUT_BYPASS;
-                       break;
-               case 1:
-                       mode = LUT_RAM_A;
-                       break;
-               case 2:
-                       mode = LUT_RAM_B;
-                       break;
-               default:
-                       mode = LUT_BYPASS;
-                       break;
-               }
-               return mode;
+       switch (state_mode) {
+       case 0:
+               mode = LUT_BYPASS;
+               break;
+       case 1:
+               mode = LUT_RAM_A;
+               break;
+       case 2:
+               mode = LUT_RAM_B;
+               break;
+       default:
+               mode = LUT_BYPASS;
+               break;
+       }
+
+       return mode;
 }
 
 static void mpc3_configure_shaper_lut(
-- 
2.20.1.7.g153144c