Re: [dpdk-dev] [PATCH] raw/octeontx2_dma: fix unavailable PCI device in dpivf
On Fri, Apr 9, 2021 at 12:13 PM Jerin Jacob wrote:
>
> On Mon, Mar 22, 2021 at 8:52 PM Radha Mohan Chintakuntla
> wrote:
> >
> > Add PCI device to dpivf structure.
> >
> > Fixes: 4495bd887d38 ("raw/octeontx2_dma: support multiple DPI blocks")
>
> Since it is a fix, Please describe what is fixed in git commit log.
ok submitted v2.
>
>
> > Signed-off-by: Radha Mohan Chintakuntla
> > ---
> > drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
> > b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
> > index efdba2779b..8c01f25ec7 100644
> > --- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
> > +++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
> > @@ -389,6 +389,7 @@ otx2_dpi_rawdev_probe(struct rte_pci_driver *pci_drv
> > __rte_unused,
> > vf_id = ((pci_dev->addr.devid & 0x1F) << 3) |
> > (pci_dev->addr.function & 0x7);
> > vf_id -= 1;
> > + dpivf->dev = pci_dev;
> > dpivf->state = DPI_QUEUE_START;
> > dpivf->vf_id = vf_id;
> > dpivf->vf_bar0 = (uintptr_t)pci_dev->mem_resource[0].addr;
> > --
> > 2.24.1
> >
Re: [dpdk-dev] [PATCH] raw/octeontx2_dma: fix unavailable PCI device in dpivf
On Fri, Apr 9, 2021 at 1:29 PM Radha Mohan Chintakuntla
wrote:
>
> The PCI device address is being used for sending mailbox which was
> introduced in previous commit which replaced the macros so that
> multiple DPI blocks in the hardware can be supported.
>
> This patch fixes a NULL pointer access by assigning the PCI device
> structure to dpivf.
>
> Fixes: 4495bd887d38 ("raw/octeontx2_dma: support multiple DPI blocks")
>
> Signed-off-by: Radha Mohan Chintakuntla
> ---
> drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
> b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
> index efdba2779b..8c01f25ec7 100644
> --- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
> +++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
> @@ -389,6 +389,7 @@ otx2_dpi_rawdev_probe(struct rte_pci_driver *pci_drv
> __rte_unused,
> vf_id = ((pci_dev->addr.devid & 0x1F) << 3) |
> (pci_dev->addr.function & 0x7);
> vf_id -= 1;
> + dpivf->dev = pci_dev;
> dpivf->state = DPI_QUEUE_START;
> dpivf->vf_id = vf_id;
> dpivf->vf_bar0 = (uintptr_t)pci_dev->mem_resource[0].addr;
> --
> 2.24.1
I sent another with proper subject patch version. Please ignore this.
Re: [dpdk-dev] [PATCH v2 1/3] dmadev: hide devices array
On Thu, Oct 21, 2021 at 7:04 AM Kevin Laatz wrote: > > On 21/10/2021 13:59, Chengwen Feng wrote: > > From: David Marchand > > > > No need to expose rte_dma_devices out of the dmadev library. > > Existing helpers should be enough, and inlines make use of > > rte_dma_fp_objs. I asked this earlier and was asked to use rte_dma_devices[] array by Kevin. Now that it has been made static is there a different way to get the fp_obj->private_data from a PMD .remove function ? I need the private data for DMA queue state cleanup. > > > > Signed-off-by: David Marchand > > Reviewed-by: Chengwen Feng > > Tested-by: Conor Walsh > > --- > > app/test/test_dmadev.c | 5 +++-- > > lib/dmadev/rte_dmadev.c | 2 +- > > lib/dmadev/rte_dmadev_pmd.h | 2 -- > > lib/dmadev/version.map | 1 - > > 4 files changed, 4 insertions(+), 6 deletions(-) > > > > Acked-by: Kevin Laatz
Re: [dpdk-dev] [PATCH 1/4] common/cnxk: add DPI DMA support
On Tue, Oct 26, 2021 at 1:34 AM Jerin Jacob wrote:
>
> On Tue, Oct 26, 2021 at 9:43 AM Radha Mohan Chintakuntla
> wrote:
> >
> > Add base support as ROC(Rest of Chip) API which will be used by PMD
> > dmadev driver.
> >
> > This patch adds routines to init, fini, configure the DPI DMA device
> > found in Marvell's CN9k or CN10k SoC familes.
>
> families
ack.
>
> >
> > Signed-off-by: Radha Mohan Chintakuntla
> > ---
> > drivers/common/cnxk/hw/dpi.h | 136
> > drivers/common/cnxk/meson.build| 1 +
> > drivers/common/cnxk/roc_api.h | 4 +
> > drivers/common/cnxk/roc_dpi.c | 193 +
> > drivers/common/cnxk/roc_dpi.h | 44 +++
> > drivers/common/cnxk/roc_dpi_priv.h | 40 ++
> > drivers/common/cnxk/roc_platform.h | 1 +
> > drivers/common/cnxk/roc_priv.h | 3 +
> > drivers/common/cnxk/version.map| 5 +
> > 9 files changed, 427 insertions(+)
> > create mode 100644 drivers/common/cnxk/hw/dpi.h
> > create mode 100644 drivers/common/cnxk/roc_dpi.c
> > create mode 100644 drivers/common/cnxk/roc_dpi.h
> > create mode 100644 drivers/common/cnxk/roc_dpi_priv.h
> >
> > diff --git a/drivers/common/cnxk/hw/dpi.h b/drivers/common/cnxk/hw/dpi.h
> > new file mode 100644
> > index 00..aa1e66aa11
> > --- /dev/null
> > +++ b/drivers/common/cnxk/hw/dpi.h
> > @@ -0,0 +1,136 @@
> > +/* SPDX-License-Identifier: BSD-3-Clause
> > + * Copyright(C) 2021 Marvell.
> > + */
> > +/**
> > + * DPI device HW definitions.
> > + */
> > +#ifndef __DEV_DPI_HW_H__
> > +#define __DEV_DPI_HW_H__
> > +
> > +#include
> > +
> > +/** @cond __INTERNAL_DOCUMENTATION__ */
>
> This is not required.
>
> > +
> > +/* DPI VF register offsets from VF_BAR0 */
> > +#define DPI_VDMA_EN (0x0)
> > +#define DPI_VDMA_REQQ_CTL (0x8)
> > +#define DPI_VDMA_DBELL(0x10)
> > +#define DPI_VDMA_SADDR(0x18)
> > +#define DPI_VDMA_COUNTS (0x20)
> > +#define DPI_VDMA_NADDR(0x28)
> > +#define DPI_VDMA_IWBUSY (0x30)
> > +#define DPI_VDMA_CNT (0x38)
> > +#define DPI_VF_INT(0x100)
> > +#define DPI_VF_INT_W1S(0x108)
> > +#define DPI_VF_INT_ENA_W1C (0x110)
> > +#define DPI_VF_INT_ENA_W1S (0x118)
> > +
> > +/**
> > + * Enumeration dpi_hdr_xtype_e
> > + *
> > + * DPI Transfer Type Enumeration
> > + * Enumerates the pointer type in DPI_DMA_INSTR_HDR_S[XTYPE].
> > + */
> > +#define DPI_XTYPE_OUTBOUND (0)
> > +#define DPI_XTYPE_INBOUND (1)
> > +#define DPI_XTYPE_INTERNAL_ONLY (2)
> > +#define DPI_XTYPE_EXTERNAL_ONLY (3)
> > +#define DPI_HDR_XTYPE_MASK 0x3
> > +#define DPI_HDR_PT_MASK0x3
> > +#define DPI_HDR_TT_MASK0x3
> > +#define DPI_HDR_GRP_MASK 0x3FF
> > +#define DPI_HDR_FUNC_MASK 0x
> > +
> > +/* Big endian data bit position in DMA local pointer */
> > +#define DPI_LPTR_BED_BIT_POS (60)
> > +
> > +#define DPI_MIN_CMD_SIZE 8
> > +#define DPI_MAX_CMD_SIZE 64
> > +
> > +/**
> > + * Structure dpi_instr_hdr_s for CN9K
> > + *
> > + * DPI DMA Instruction Header Format
> > + */
> > +union dpi_instr_hdr_s {
> > + uint64_t u[4];
> > + struct dpi_dma_instr_hdr_s_s {
> > + uint64_t tag : 32;
> > + uint64_t tt : 2;
> > + uint64_t grp : 10;
> > + uint64_t reserved_44_47 : 4;
> > + uint64_t nfst : 4;
> > + uint64_t reserved_52_53 : 2;
> > + uint64_t nlst : 4;
> > + uint64_t reserved_58_63 : 6;
> > + /* Word 0 - End */
> > + uint64_t aura : 20;
> > + uint64_t func : 16;
> > + uint64_t pt : 2;
> > + uint64_t reserved_102 : 1;
> > + uint64_t pvfe : 1;
> > + uint64_t fl : 1;
> > + uint64_t ii : 1;
> > + uint64_t fi : 1;
> > + uint64_t ca : 1;
> > + uint64_t csel : 1;
> > + uint64_t reserved_109_111 : 3;
> > + uint64_t xtype : 2;
> > + uint64_t reserved_114_119 : 6;
> > + uint64_t fport : 2;
> > + uint64_t reserved_122_123 : 2;
> > + uint64_t lport : 2;
> > + uint64_t reserved_126_127 : 2;
> > +
Re: [dpdk-dev] [PATCH 2/4] dma/cnxk: create and initialize dmadev on pci probe
On Tue, Oct 26, 2021 at 2:32 AM Jerin Jacob wrote: > > On Tue, Oct 26, 2021 at 9:43 AM Radha Mohan Chintakuntla > wrote: > > > > This patch creates and initializes a dmadev device on pci probe. > > > > Signed-off-by: Radha Mohan Chintakuntla > > --- > > MAINTAINERS| 7 +- > > doc/guides/dmadevs/cnxk.rst| 53 +++ > > doc/guides/dmadevs/index.rst | 1 + > > drivers/dma/cnxk/cnxk_dmadev.c | 119 + > > drivers/dma/cnxk/cnxk_dmadev.h | 11 +++ > > drivers/dma/cnxk/meson.build | 7 ++ > > drivers/dma/meson.build| 1 + > > 7 files changed, 198 insertions(+), 1 deletion(-) > > create mode 100644 doc/guides/dmadevs/cnxk.rst > > create mode 100644 drivers/dma/cnxk/cnxk_dmadev.c > > create mode 100644 drivers/dma/cnxk/cnxk_dmadev.h > > create mode 100644 drivers/dma/cnxk/meson.build > > > > diff --git a/MAINTAINERS b/MAINTAINERS > > index be2c9b6815..cdc2d98a6b 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -1186,7 +1186,6 @@ F: drivers/compress/zlib/ > > F: doc/guides/compressdevs/zlib.rst > > F: doc/guides/compressdevs/features/zlib.ini > > > > - > > Unwanted line deletion. Ah ok. overlooked when resolving conflicts with latest. > > > DMAdev Drivers > > -- > > > > @@ -1202,6 +1201,12 @@ M: Conor Walsh > > F: drivers/dma/ioat/ > > F: doc/guides/dmadevs/ioat.rst > > > > +Marvell CNXK DPI DMA > > +M: Radha Mohan Chintakuntla > > +M: Veerasenareddy Burru > > +F: drivers/dma/cnxk/ > > +F: doc/guides/dmadevs/cnxk.rst > > + > > > > RegEx Drivers > > - > > diff --git a/doc/guides/dmadevs/cnxk.rst b/doc/guides/dmadevs/cnxk.rst > > new file mode 100644 > > index 00..8ae7c1f8cd > > --- /dev/null > > +++ b/doc/guides/dmadevs/cnxk.rst > > @@ -0,0 +1,53 @@ > > +.. SPDX-License-Identifier: BSD-3-Clause > > +Copyright(c) 2021 Marvell International Ltd. > > + > > +.. include:: > > + > > > Please link top-level doc/guides/platform/cnxk.rst documentation file > to this file. > sure will do in v2.
Re: [dpdk-dev] [PATCH 3/4] dma/cnxk: add dma channel operations
On Tue, Oct 26, 2021 at 1:49 AM Jerin Jacob wrote:
>
> On Tue, Oct 26, 2021 at 9:43 AM Radha Mohan Chintakuntla
> wrote:
> >
> > Add functions for the dmadev vchan setup and DMA operations.
> >
> > Signed-off-by: Radha Mohan Chintakuntla
> > ---
> > drivers/dma/cnxk/cnxk_dmadev.c | 322 +
> > drivers/dma/cnxk/cnxk_dmadev.h | 53 ++
> > drivers/dma/cnxk/version.map | 3 +
> > 3 files changed, 378 insertions(+)
> > create mode 100644 drivers/dma/cnxk/version.map
> >
> > diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
> > index 620766743d..8434579aa2 100644
> > --- a/drivers/dma/cnxk/cnxk_dmadev.c
> > +++ b/drivers/dma/cnxk/cnxk_dmadev.c
> > @@ -18,6 +18,322 @@
> > #include
> > #include
> >
> > +static int
> > +cnxk_dmadev_info_get(const struct rte_dma_dev *dev,
> > +struct rte_dma_info *dev_info, uint32_t size)
> > +{
> > + RTE_SET_USED(dev);
> > + RTE_SET_USED(size);
> > +
> > + dev_info->max_vchans = 1;
> > + dev_info->nb_vchans = 1;
> > + dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |
> > + RTE_DMA_CAPA_MEM_TO_DEV | RTE_DMA_CAPA_DEV_TO_MEM |
> > + RTE_DMA_CAPA_OPS_COPY;
> > + dev_info->max_desc = DPI_MAX_DESC;
> > + dev_info->min_desc = 1;
> > + dev_info->max_sges = DPI_MAX_POINTER;
> > +
> > + return 0;
> > +}
> > +
> > +static int
> > +cnxk_dmadev_configure(struct rte_dma_dev *dev,
> > + const struct rte_dma_conf *conf, uint32_t conf_sz)
> > +{
> > + struct cnxk_dpi_vf_s *dpivf = NULL;
> > + int rc = 0;
> > +
> > + RTE_SET_USED(conf);
> > + RTE_SET_USED(conf);
> > + RTE_SET_USED(conf_sz);
> > + RTE_SET_USED(conf_sz);
> > + dpivf = dev->fp_obj->dev_private;
> > + rc = roc_dpi_queue_configure(&dpivf->rdpi);
> > + if (rc < 0)
> > + plt_err("DMA queue configure failed err = %d", rc);
> > +
> > + return rc;
> > +}
> > +
> > +static int
> > +cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
> > + const struct rte_dma_vchan_conf *conf,
> > + uint32_t conf_sz)
> > +{
> > + struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
> > + struct cnxk_dpi_compl_s *comp_data;
> > + int i;
> > +
> > + RTE_SET_USED(vchan);
> > + RTE_SET_USED(conf_sz);
> > +
> > + switch (conf->direction) {
> > + case RTE_DMA_DIR_DEV_TO_MEM:
> > + dpivf->conf.direction = DPI_XTYPE_INBOUND;
> > + dpivf->conf.src_port = conf->src_port.pcie.coreid;
> > + dpivf->conf.dst_port = 0;
> > + break;
> > + case RTE_DMA_DIR_MEM_TO_DEV:
> > + dpivf->conf.direction = DPI_XTYPE_OUTBOUND;
> > + dpivf->conf.src_port = 0;
> > + dpivf->conf.dst_port = conf->dst_port.pcie.coreid;
> > + break;
> > + case RTE_DMA_DIR_MEM_TO_MEM:
> > + dpivf->conf.direction = DPI_XTYPE_INTERNAL_ONLY;
> > + dpivf->conf.src_port = 0;
> > + dpivf->conf.dst_port = 0;
> > + break;
> > + case RTE_DMA_DIR_DEV_TO_DEV:
> > + dpivf->conf.direction = DPI_XTYPE_EXTERNAL_ONLY;
> > + dpivf->conf.src_port = conf->src_port.pcie.coreid;
> > + dpivf->conf.dst_port = conf->src_port.pcie.coreid;
> > + };
> > +
> > + for (i = 0; i < conf->nb_desc; i++) {
> > + comp_data = rte_zmalloc(NULL, sizeof(*comp_data), 0);
> > + dpivf->conf.c_desc.compl_ptr[i] = comp_data;
> > + };
> > + dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC;
> > + dpivf->conf.c_desc.head = 0;
> > + dpivf->conf.c_desc.tail = 0;
> > +
> > + return 0;
> > +}
> > +
> > +static int
> > +cnxk_dmadev_start(struct rte_dma_dev *dev)
> > +{
> > + struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
> > +
> > + roc_dpi_queue_start(&dpivf->rdpi);
> > +
> > + return 0;
> > +}
> > +
> > +static int
> > +cnxk_dmadev_stop(struct rte_dma_dev *dev)
> > +{
Re: [dpdk-dev] [PATCH 3/4] dma/cnxk: add dma channel operations
On Fri, Oct 29, 2021 at 7:54 AM Jerin Jacob wrote:
>
> On Thu, Oct 28, 2021 at 11:48 PM Radha Mohan wrote:
> >
> > On Tue, Oct 26, 2021 at 1:49 AM Jerin Jacob wrote:
> > >
> > > On Tue, Oct 26, 2021 at 9:43 AM Radha Mohan Chintakuntla
> > > wrote:
> > > >
> > > > Add functions for the dmadev vchan setup and DMA operations.
> > > >
> > > > Signed-off-by: Radha Mohan Chintakuntla
>
> > > > +static int
> > > > +cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src,
> > > > +rte_iova_t dst, uint32_t length, uint64_t flags)
> > > > +{
> > > > + uint64_t cmd[DPI_MAX_CMD_SIZE] = {0};
> > > > + union dpi_instr_hdr_s *header = (union dpi_instr_hdr_s
> > > > *)&cmd[0];
> > > > + rte_iova_t fptr, lptr;
> > > > + struct cnxk_dpi_vf_s *dpivf = dev_private;
> > > > + struct cnxk_dpi_compl_s *comp_ptr;
> > > > + int num_words = 0;
> > > > + int rc;
> > > > +
> > > > + RTE_SET_USED(vchan);
> > > > +
> > > > + header->s.xtype = dpivf->conf.direction;
> > > > + header->s.pt = DPI_HDR_PT_ZBW_CA;
> > > > + comp_ptr =
> > > > dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
> > > > + comp_ptr->cdata = DPI_REQ_CDATA;
> > > > + header->s.ptr = (uint64_t)comp_ptr;
> > > > + STRM_INC(dpivf->conf.c_desc);
> > > > +
> > > > + /* pvfe should be set for inbound and outbound only */
> > > > + if (header->s.xtype <= 1)
> > > > + header->s.pvfe = 1;
> > > > + num_words += 4;
> > > > +
> > > > + header->s.nfst = 1;
> > > > + header->s.nlst = 1;
> > >
> > > Including filling zeros in cmd and the rest of the filling can be
> > > moved to slow path..
> > >
> > > Please change the logic to populate the static items based on
> > > configure/channel setup
> > > in slowpath and update only per transfer-specific items to have better
> > > performance.
> > >
> > These are instruction header values that we are filling. If you look
> > at it there is really one 64bit field that can be filled beforehand
> > a.k.a slowpath in vchan_setup().
> > Rest of the header can only be filled here like nlst, nfst (these are
> > number of pointers to be DMA'ed) and completion pointer. So just for
> > that I do not see a value in moving around the code.
>
> Two things,
>
> 1) By dong like below,
> > > > + header->s.nfst = 1;
> > > > + header->s.nlst = 1;
>
> it will generate multiple stores.
No it won't for this case. Here is how the compiler generated the
writes to the 64-bit fields of the header field.
7a4: d2e00821mov x1, #0x41 //
#18295873486192640
>One option is to have a local u64
> variable and form the required descriptor and write it one shot.
> It is a standard optimation strategy used in fastpath.
Maybe not here.
>
> 2) uint64_t cmd[DPI_MAX_CMD_SIZE] = {0}; This will result in memset of
> 64B, That reason for creating
> template based on vchan make sense.
>
> Looks like moving to a template-based scheme need a lot of rework in
> the driver,
> I will leave you to decide performance vs other aspects as you are
> maintaining the driver.
> No strong opinion.
>
Ok understand. We'll do a v2 with some improvments.
>
> >
> >
Re: [dpdk-dev] [PATCH v2 3/4] dma/cnxk: add dma channel operations
On Tue, Nov 2, 2021 at 5:00 AM fengchengwen wrote:
>
> On 2021/11/2 11:40, Radha Mohan Chintakuntla wrote:
> > Add functions for the dmadev vchan setup and DMA operations.
> >
> > Signed-off-by: Radha Mohan Chintakuntla
>
> ...
>
> >
> > +static int
> > +cnxk_dmadev_info_get(const struct rte_dma_dev *dev,
> > + struct rte_dma_info *dev_info, uint32_t size)
> > +{
> > + RTE_SET_USED(dev);
> > + RTE_SET_USED(size);
> > +
> > + dev_info->max_vchans = 1;
> > + dev_info->nb_vchans = 1;
> > + dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |
> > + RTE_DMA_CAPA_MEM_TO_DEV | RTE_DMA_CAPA_DEV_TO_MEM |
> > + RTE_DMA_CAPA_OPS_COPY;
> > + dev_info->max_desc = DPI_MAX_DESC;
> > + dev_info->min_desc = 1;
> > + dev_info->max_sges = DPI_MAX_POINTER;
> > +
> > + return 0;
> > +}
> > +
> > +static int
> > +cnxk_dmadev_configure(struct rte_dma_dev *dev,
> > + const struct rte_dma_conf *conf, uint32_t conf_sz)
> > +{
> > + struct cnxk_dpi_vf_s *dpivf = NULL;
> > + int rc = 0;
> > +
> > + RTE_SET_USED(conf);
> > + RTE_SET_USED(conf);
> > + RTE_SET_USED(conf_sz);
> > + RTE_SET_USED(conf_sz);
> > + dpivf = dev->fp_obj->dev_private;
> > + rc = roc_dpi_configure(&dpivf->rdpi);
> > + if (rc < 0)
> > + plt_err("DMA configure failed err = %d", rc);
> > +
> > + return rc;
> > +}
> > +
> > +static int
> > +cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
> > + const struct rte_dma_vchan_conf *conf,
> > + uint32_t conf_sz)
> > +{
> > + struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
> > + struct cnxk_dpi_compl_s *comp_data;
> > + union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
> > + int i;
> > +
> > + RTE_SET_USED(vchan);
> > + RTE_SET_USED(conf_sz);
> > +
> > + header->s.pt = DPI_HDR_PT_ZBW_CA;
> > +
> > + switch (conf->direction) {
> > + case RTE_DMA_DIR_DEV_TO_MEM:
> > + header->s.xtype = DPI_XTYPE_INBOUND;
> > + header->s.lport = conf->src_port.pcie.coreid;
> > + header->s.fport = 0;
> > + header->s.pvfe = 1;
> > + break;
> > + case RTE_DMA_DIR_MEM_TO_DEV:
> > + header->s.xtype = DPI_XTYPE_OUTBOUND;
> > + header->s.lport = 0;
> > + header->s.fport = conf->dst_port.pcie.coreid;
> > + header->s.pvfe = 1;
> > + break;
> > + case RTE_DMA_DIR_MEM_TO_MEM:
> > + header->s.xtype = DPI_XTYPE_INTERNAL_ONLY;
> > + header->s.lport = 0;
> > + header->s.fport = 0;
> > + header->s.pvfe = 0;
> > + break;
> > + case RTE_DMA_DIR_DEV_TO_DEV:
> > + header->s.xtype = DPI_XTYPE_EXTERNAL_ONLY;
> > + header->s.lport = conf->src_port.pcie.coreid;
> > + header->s.fport = conf->dst_port.pcie.coreid;
>
> capability don't declare support DEV_TO_DEV, and framework will ensure
> not pass DEV_TO_DEV direction. so this code could remove...
I missed adding DEV_TO_DEV in capability. Thank you for pointing that out.
>
> > + };
> > +
> > + for (i = 0; i < conf->nb_desc; i++) {
> > + comp_data = rte_zmalloc(NULL, sizeof(*comp_data), 0);
>
> why not check comp_data's validation ?
Sure will add.
> > +
> > +static int
> > +cnxk_dmadev_copy(void *dev_private, uint16_t vchan, rte_iova_t src,
> > + rte_iova_t dst, uint32_t length, uint64_t flags)
> > +{
> > + struct cnxk_dpi_vf_s *dpivf = dev_private;
> > + union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
> > + struct cnxk_dpi_compl_s *comp_ptr;
> > + rte_iova_t fptr, lptr;
> > + int num_words = 0;
> > + int rc;
> > +
> > + RTE_SET_USED(vchan);
> > +
> > + comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
> > + comp_ptr->cdata = DPI_REQ_CDATA;
> > + header->s.ptr = (uint64_t)comp_ptr;
> > + STRM_INC(dpivf->conf.c_desc);
> > +
> > + header->s.nfst = 1;
> > + header->s.nlst = 1;
> > +
> > + /*
> > + *
Re: [dpdk-dev] [PATCH v3 2/5] dma/cnxk: create and initialize dmadev on pci probe
On Sun, Nov 7, 2021 at 6:04 PM Thomas Monjalon wrote:
>
> 03/11/2021 19:01, Radha Mohan Chintakuntla:
> > This patch creates and initializes a dmadev device on pci probe.
> >
> > Signed-off-by: Radha Mohan Chintakuntla
>
> Series applied with few small improvements in the doc,
> compilation and other more or less important details
> like the release notes.
Thank you.
>
> I think you forgot to update dpdk-devbind script.
> See also this patch:
> https://patches.dpdk.org/project/dpdk/patch/20211107225708.3087968-1-tho...@monjalon.net/
Yes need to remove it from "misc" but also rename octeontx2_dma to
cnxk_dma and add under "dma_devices". I missed this.
I can push a patch which does both or if are ok to update yours then
that would be great.
diff --git a/usertools/dpdk-devbind.py b/usertools/dpdk-devbind.py
index bb00f43702..643860b3ae 100755
--- a/usertools/dpdk-devbind.py
+++ b/usertools/dpdk-devbind.py
@@ -41,7 +41,7 @@
'SVendor': None, 'SDevice': None}
octeontx2_npa = {'Class': '08', 'Vendor': '177d', 'Device': 'a0fb,a0fc',
'SVendor': None, 'SDevice': None}
-octeontx2_dma = {'Class': '08', 'Vendor': '177d', 'Device': 'a081',
+cnxk_dma = {'Class': '08', 'Vendor': '177d', 'Device': 'a081',
'SVendor': None, 'SDevice': None}
octeontx2_ree = {'Class': '08', 'Vendor': '177d', 'Device': 'a0f4',
'SVendor': None, 'SDevice': None}
@@ -71,13 +71,14 @@
network_devices = [network_class, cavium_pkx, avp_vnic, ifpga_class]
baseband_devices = [acceleration_class]
crypto_devices = [encryption_class, intel_processor_class]
-dma_devices = [intel_idxd_spr, intel_ioat_bdw, intel_ioat_icx, intel_ioat_skx]
+dma_devices = [intel_idxd_spr, intel_ioat_bdw, intel_ioat_icx, intel_ioat_skx
+ cnxk_dma]
eventdev_devices = [cavium_sso, cavium_tim, intel_dlb, octeontx2_sso]
mempool_devices = [cavium_fpa, octeontx2_npa]
compress_devices = [cavium_zip]
regex_devices = [octeontx2_ree]
-misc_devices = [cnxk_bphy, cnxk_bphy_cgx, cnxk_inl_dev, intel_ntb_skx,
-intel_ntb_icx, octeontx2_dma]
+misc_devices = [cnxk_bphy, cnxk_bphy_cgx, cnxk_inl_dev,
+intel_ntb_skx, intel_ntb_icx]
>
> Overall I have doubts about the quality but I want to move forward
> with the new DMA drivers.
> I will be probably less flexible with the next patches.
Ok. Please let know if you find any specific ones that needs improvements.
>
>
Re: [dpdk-dev] [PATCH] usertools/devbind: remove octeontx2 DMA device
On Sun, Nov 7, 2021 at 5:57 PM Thomas Monjalon wrote:
>
> The DMA raw driver for octeontx2 was removed in DPDK 21.11.
> The binding ability is also removed in the same release
> to be consistent.
>
> Fixes: a59745ebccf0 ("raw/octeontx2_dma: remove driver")
>
> Signed-off-by: Thomas Monjalon
>
> ---
>
> Is there a reason to keep it?
Need to modify.
> ---
> usertools/dpdk-devbind.py | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/usertools/dpdk-devbind.py b/usertools/dpdk-devbind.py
> index af9a0ad5ab..95921b2281 100755
> --- a/usertools/dpdk-devbind.py
> +++ b/usertools/dpdk-devbind.py
> @@ -41,8 +41,6 @@
> 'SVendor': None, 'SDevice': None}
> octeontx2_npa = {'Class': '08', 'Vendor': '177d', 'Device': 'a0fb,a0fc',
> 'SVendor': None, 'SDevice': None}
> -octeontx2_dma = {'Class': '08', 'Vendor': '177d', 'Device': 'a081',
> - 'SVendor': None, 'SDevice': None}
> octeontx2_ree = {'Class': '08', 'Vendor': '177d', 'Device': 'a0f4',
> 'SVendor': None, 'SDevice': None}
> cnxk_bphy = {'Class': '08', 'Vendor': '177d', 'Device': 'a089',
> @@ -80,8 +78,8 @@
> mempool_devices = [cavium_fpa, octeontx2_npa]
> compress_devices = [cavium_zip]
> regex_devices = [octeontx2_ree]
> -misc_devices = [cnxk_bphy, cnxk_bphy_cgx, cnxk_inl_dev, intel_ntb_skx,
> -intel_ntb_icx, octeontx2_dma]
> +misc_devices = [cnxk_bphy, cnxk_bphy_cgx, cnxk_inl_dev,
> +intel_ntb_icx, intel_ntb_skx]
>
> # global dict ethernet devices present. Dictionary indexed by PCI address.
> # Each device within this is itself a dictionary of device properties
> --
> 2.33.0
>
diff --git a/usertools/dpdk-devbind.py b/usertools/dpdk-devbind.py
index bb00f43702..643860b3ae 100755
--- a/usertools/dpdk-devbind.py
+++ b/usertools/dpdk-devbind.py
@@ -41,7 +41,7 @@
'SVendor': None, 'SDevice': None}
octeontx2_npa = {'Class': '08', 'Vendor': '177d', 'Device': 'a0fb,a0fc',
'SVendor': None, 'SDevice': None}
-octeontx2_dma = {'Class': '08', 'Vendor': '177d', 'Device': 'a081',
+cnxk_dma = {'Class': '08', 'Vendor': '177d', 'Device': 'a081',
'SVendor': None, 'SDevice': None}
octeontx2_ree = {'Class': '08', 'Vendor': '177d', 'Device': 'a0f4',
'SVendor': None, 'SDevice': None}
@@ -71,13 +71,14 @@
network_devices = [network_class, cavium_pkx, avp_vnic, ifpga_class]
baseband_devices = [acceleration_class]
crypto_devices = [encryption_class, intel_processor_class]
-dma_devices = [intel_idxd_spr, intel_ioat_bdw, intel_ioat_icx, intel_ioat_skx]
+dma_devices = [intel_idxd_spr, intel_ioat_bdw, intel_ioat_icx, intel_ioat_skx
+ cnxk_dma]
eventdev_devices = [cavium_sso, cavium_tim, intel_dlb, octeontx2_sso]
mempool_devices = [cavium_fpa, octeontx2_npa]
compress_devices = [cavium_zip]
regex_devices = [octeontx2_ree]
-misc_devices = [cnxk_bphy, cnxk_bphy_cgx, cnxk_inl_dev, intel_ntb_skx,
-intel_ntb_icx, octeontx2_dma]
+misc_devices = [cnxk_bphy, cnxk_bphy_cgx, cnxk_inl_dev,
+intel_ntb_skx, intel_ntb_icx]
Re: [dpdk-dev] [PATCH] usertools/devbind: update octeontx2 DMA device
On Tue, Nov 9, 2021 at 12:50 PM Thomas Monjalon wrote:
>
> 09/11/2021 17:55, Radha Mohan Chintakuntla:
> > The octeontx2_dma rawdev driver is removed in DPDK-21.11. The new driver
> > for the same device uses the dmadev. So this patch updates the device
> > naming and lists it under dma devices section.
> >
> > Signed-off-by: Radha Mohan Chintakuntla
> > ---
> > usertools/dpdk-devbind.py | 11 ++-
> > 1 file changed, 6 insertions(+), 5 deletions(-)
> >
> > diff --git a/usertools/dpdk-devbind.py b/usertools/dpdk-devbind.py
> > index af9a0ad5ab..e298ad5f75 100755
> > --- a/usertools/dpdk-devbind.py
> > +++ b/usertools/dpdk-devbind.py
> > @@ -41,8 +41,8 @@
> > 'SVendor': None, 'SDevice': None}
> > octeontx2_npa = {'Class': '08', 'Vendor': '177d', 'Device': 'a0fb,a0fc',
> > 'SVendor': None, 'SDevice': None}
> > -octeontx2_dma = {'Class': '08', 'Vendor': '177d', 'Device': 'a081',
> > - 'SVendor': None, 'SDevice': None}
> > +cnxk_dma = {'Class': '08', 'Vendor': '177d', 'Device': 'a081',
> > +'SVendor': None, 'SDevice': None}
>
> It doesn't look logical to have cnxk device in the middle of octeontx2 ones.
> Maybe before to sort it a bit alphabetically?
ok sure will do. I thought about it but rest of them were not in any
order so didn't think it wouldn't matter.
>
> > dma_devices = [hisilicon_dma,
> > - intel_idxd_spr, intel_ioat_bdw, intel_ioat_icx,
> > intel_ioat_skx]
> > + intel_idxd_spr, intel_ioat_bdw, intel_ioat_icx,
> > intel_ioat_skx,
> > + cnxk_dma]
>
> Would be better at the beginning of the list, before hisilicon
> so it is alphabetically sorted.
ok.
>
>
>
Re: [dpdk-dev] [PATCH v7 01/12] raw/octeontx_ep: changed device id
On Fri, Jan 29, 2021 at 4:45 AM Nalla Pradeep wrote:
>
> Device id to be probed by octeontx_ep raw device pmd is changed from
> B203 to B204. B203 is for octeontx_ep net device pmd to probe.
>
> Signed-off-by: Nalla Pradeep
> ---
> drivers/common/octeontx2/otx2_common.h| 3 ++-
> drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 6 +++---
> 2 files changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/common/octeontx2/otx2_common.h
> b/drivers/common/octeontx2/otx2_common.h
> index b6779f710..4938fb295 100644
> --- a/drivers/common/octeontx2/otx2_common.h
> +++ b/drivers/common/octeontx2/otx2_common.h
> @@ -136,7 +136,8 @@ extern int otx2_logtype_ree;
> #define PCI_DEVID_OCTEONTX2_RVU_CPT_VF 0xA0FE
> #define PCI_DEVID_OCTEONTX2_RVU_AF_VF 0xA0f8
> #define PCI_DEVID_OCTEONTX2_DPI_VF 0xA081
> -#define PCI_DEVID_OCTEONTX2_EP_VF 0xB203 /* OCTEON TX2 EP mode
> */
> +#define PCI_DEVID_OCTEONTX2_EP_NET_VF 0xB203 /* OCTEON TX2 EP mode
> */
> +#define PCI_DEVID_OCTEONTX2_EP_RAW_VF 0xB204 /* OCTEON TX2 EP mode
> */
> #define PCI_DEVID_OCTEONTX2_RVU_SDP_PF 0xA0f6
> #define PCI_DEVID_OCTEONTX2_RVU_SDP_VF 0xA0f7
> #define PCI_DEVID_OCTEONTX2_RVU_REE_PF 0xA0f4
> diff --git a/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c
> b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c
> index 2b78a7941..b2ccdda83 100644
> --- a/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c
> +++ b/drivers/raw/octeontx2_ep/otx2_ep_rawdev.c
> @@ -22,7 +22,7 @@
> static const struct rte_pci_id pci_sdp_vf_map[] = {
> {
> RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
> - PCI_DEVID_OCTEONTX2_EP_VF)
> + PCI_DEVID_OCTEONTX2_EP_RAW_VF)
> },
> {
> .vendor_id = 0,
> @@ -109,8 +109,8 @@ sdp_chip_specific_setup(struct sdp_device *sdpvf)
> int ret;
>
> switch (dev_id) {
> - case PCI_DEVID_OCTEONTX2_EP_VF:
> - sdpvf->chip_id = PCI_DEVID_OCTEONTX2_EP_VF;
> + case PCI_DEVID_OCTEONTX2_EP_RAW_VF:
> + sdpvf->chip_id = PCI_DEVID_OCTEONTX2_EP_RAW_VF;
> ret = sdp_vf_setup_device(sdpvf);
>
> break;
> --
> 2.17.1
>
Acked-by: Radha Mohan Chintakuntla
Re: [dpdk-dev] [PATCH v23 1/6] dmadev: introduce DMA device library
On Fri, Sep 24, 2021 at 3:58 AM Chengwen Feng wrote: > > The 'dmadevice' is a generic type of DMA device. > > This patch introduce the 'dmadevice' device allocation APIs. > > The infrastructure is prepared to welcome drivers in drivers/dma/ > > Signed-off-by: Chengwen Feng > Acked-by: Bruce Richardson > Acked-by: Morten Brørup > Acked-by: Jerin Jacob > Reviewed-by: Kevin Laatz > Reviewed-by: Conor Walsh > --- > MAINTAINERS| 5 + > config/rte_config.h| 3 + > doc/api/doxy-api-index.md | 1 + > doc/api/doxy-api.conf.in | 1 + > doc/guides/dmadevs/index.rst | 12 ++ > doc/guides/index.rst | 1 + > doc/guides/prog_guide/dmadev.rst | 64 ++ > doc/guides/prog_guide/img/dmadev.svg | 283 + > doc/guides/prog_guide/index.rst| 1 + > doc/guides/rel_notes/release_21_11.rst | 4 + > drivers/dma/meson.build| 4 + > drivers/meson.build| 1 + > lib/dmadev/meson.build | 7 + > lib/dmadev/rte_dmadev.c| 263 +++ > lib/dmadev/rte_dmadev.h| 134 > lib/dmadev/rte_dmadev_core.h | 51 + > lib/dmadev/rte_dmadev_pmd.h| 60 ++ > lib/dmadev/version.map | 20 ++ > lib/meson.build| 1 + > 19 files changed, 916 insertions(+) > create mode 100644 doc/guides/dmadevs/index.rst > create mode 100644 doc/guides/prog_guide/dmadev.rst > create mode 100644 doc/guides/prog_guide/img/dmadev.svg > create mode 100644 drivers/dma/meson.build > create mode 100644 lib/dmadev/meson.build > create mode 100644 lib/dmadev/rte_dmadev.c > create mode 100644 lib/dmadev/rte_dmadev.h > create mode 100644 lib/dmadev/rte_dmadev_core.h > create mode 100644 lib/dmadev/rte_dmadev_pmd.h > create mode 100644 lib/dmadev/version.map > Hi Chengwen, I see that the new version removed the "rte_dmadev_get_device_by_name()". What is the way to get the dmadev from inside the PMD .remove ? I am looking to get the dev_private as we need to do some cleanup operations from the remove function. regards, Radha Mohan
Re: [dpdk-dev] [PATCH v23 1/6] dmadev: introduce DMA device library
On Tue, Oct 5, 2021 at 1:24 AM Kevin Laatz wrote: > > On 04/10/2021 22:12, Radha Mohan wrote: > > On Fri, Sep 24, 2021 at 3:58 AM Chengwen Feng > > wrote: > >> The 'dmadevice' is a generic type of DMA device. > >> > >> This patch introduce the 'dmadevice' device allocation APIs. > >> > >> The infrastructure is prepared to welcome drivers in drivers/dma/ > >> > >> Signed-off-by: Chengwen Feng > >> Acked-by: Bruce Richardson > >> Acked-by: Morten Brørup > >> Acked-by: Jerin Jacob > >> Reviewed-by: Kevin Laatz > >> Reviewed-by: Conor Walsh > >> --- > >> MAINTAINERS| 5 + > >> config/rte_config.h| 3 + > >> doc/api/doxy-api-index.md | 1 + > >> doc/api/doxy-api.conf.in | 1 + > >> doc/guides/dmadevs/index.rst | 12 ++ > >> doc/guides/index.rst | 1 + > >> doc/guides/prog_guide/dmadev.rst | 64 ++ > >> doc/guides/prog_guide/img/dmadev.svg | 283 + > >> doc/guides/prog_guide/index.rst| 1 + > >> doc/guides/rel_notes/release_21_11.rst | 4 + > >> drivers/dma/meson.build| 4 + > >> drivers/meson.build| 1 + > >> lib/dmadev/meson.build | 7 + > >> lib/dmadev/rte_dmadev.c| 263 +++ > >> lib/dmadev/rte_dmadev.h| 134 > >> lib/dmadev/rte_dmadev_core.h | 51 + > >> lib/dmadev/rte_dmadev_pmd.h| 60 ++ > >> lib/dmadev/version.map | 20 ++ > >> lib/meson.build| 1 + > >> 19 files changed, 916 insertions(+) > >> create mode 100644 doc/guides/dmadevs/index.rst > >> create mode 100644 doc/guides/prog_guide/dmadev.rst > >> create mode 100644 doc/guides/prog_guide/img/dmadev.svg > >> create mode 100644 drivers/dma/meson.build > >> create mode 100644 lib/dmadev/meson.build > >> create mode 100644 lib/dmadev/rte_dmadev.c > >> create mode 100644 lib/dmadev/rte_dmadev.h > >> create mode 100644 lib/dmadev/rte_dmadev_core.h > >> create mode 100644 lib/dmadev/rte_dmadev_pmd.h > >> create mode 100644 lib/dmadev/version.map > >> > > > > Hi Chengwen, > > I see that the new version removed the "rte_dmadev_get_device_by_name()". > > What is the way to get the dmadev from inside the PMD .remove ? I am > > looking to get the dev_private as we need to do some cleanup > > operations from the remove function. > > > > regards, > > Radha Mohan > > Hi Radha, > > You can use rte_dma_get_dev_id(name) to get the device ID, which can > then be used to get the rte_dma_dev struct (which contains dev_private) > for that device from rte_dma_devices[]. > > See "idxd_dmadev_destroy()" in > http://patches.dpdk.org/project/dpdk/patch/20210924133916.4042773-6-kevin.la...@intel.com/ > for an example. > > Hope that helps, Thanks Kevin. It helped. I wasn't looking at accessing the rte_dma_devices[] array directly. A library API would've been good. regards, Radha > > Kevin > >
Re: [dpdk-dev] [PATCH v4 1/2] drivers/raw: remove octeontx2-dma driver
On Thu, Aug 19, 2021 at 1:27 PM Radha Mohan Chintakuntla wrote: > > Removing the rawdev based octeontx2-dma driver as the dependent > common/octeontx2 will be soon be going away. Also a new DMA driver will > be coming in this place once the rte_dmadev library is in. > > Signed-off-by: Radha Mohan Chintakuntla > --- > Changes from v3: > Fixed patch application failure on main due to conflict. > > Changes from v2: > Fixed DPDK CI reported issues for more documentation failure. > > Changes from v1: > Fixed compilation issues in documentation > > MAINTAINERS | 6 - > doc/guides/platform/octeontx2.rst | 3 - > doc/guides/rawdevs/index.rst| 1 - > doc/guides/rawdevs/octeontx2_dma.rst| 103 - > drivers/raw/meson.build | 1 - > drivers/raw/octeontx2_dma/meson.build | 18 - > drivers/raw/octeontx2_dma/otx2_dpi_msg.c| 105 - > drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 441 > drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 197 - > drivers/raw/octeontx2_dma/otx2_dpi_test.c | 218 -- > drivers/raw/octeontx2_dma/version.map | 3 - > 11 files changed, 1096 deletions(-) > delete mode 100644 doc/guides/rawdevs/octeontx2_dma.rst > delete mode 100644 drivers/raw/octeontx2_dma/meson.build > delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_msg.c > delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c > delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h > delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_test.c > delete mode 100644 drivers/raw/octeontx2_dma/version.map > Hi Thomas, The CI is reporting unrelated failures which I think can be ignored. https://lab.dpdk.org/results/dashboard/patchsets/18263/ regards, Radha Mohan
Re: [dpdk-dev] [PATCH v4 2/2] drivers/raw: remove octeontx2-ep driver
On Thu, Aug 19, 2021 at 1:29 PM Radha Mohan Chintakuntla wrote: > > Removing the rawdev based octeontx2-ep driver as the dependent > common/octeontx2 will soon be going away. Moreover this driver is no > longer required as the net/octeontx_ep driver is sufficient. > > Signed-off-by: Radha Mohan Chintakuntla > --- > Changes from v3: > Fixed patch application failure due to conflict on main branch. > > Changes from v2: > Fixed DPDK CI reported issues for more documentation failure. > > Changes from v1: > Fixed compilation issues in documentation > > MAINTAINERS | 6 - > doc/guides/rawdevs/index.rst | 1 - > doc/guides/rawdevs/octeontx2_ep.rst | 82 --- > drivers/raw/meson.build | 1 - > drivers/raw/octeontx2_ep/meson.build | 11 - > drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c | 846 -- > drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h | 52 -- > drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 362 - > drivers/raw/octeontx2_ep/otx2_ep_rawdev.h | 499 - > drivers/raw/octeontx2_ep/otx2_ep_test.c | 172 - > drivers/raw/octeontx2_ep/otx2_ep_vf.c | 475 > drivers/raw/octeontx2_ep/otx2_ep_vf.h | 10 - > drivers/raw/octeontx2_ep/version.map | 3 - > 13 files changed, 2520 deletions(-) > delete mode 100644 doc/guides/rawdevs/octeontx2_ep.rst > delete mode 100644 drivers/raw/octeontx2_ep/meson.build > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.c > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.h > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_test.c > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.c > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.h > delete mode 100644 drivers/raw/octeontx2_ep/version.map > Hi Thomas, I received this report that this patch failed to apply http://mails.dpdk.org/archives/test-report/2021-August/211611.html But I do not see the issue at my end. $ git pull --rebase remote: Counting objects: 17, done remote: Finding sources: 100% (413/413) remote: Total 413 (delta 315), reused 413 (delta 315) Receiving objects: 100% (413/413), 148.64 KiB | 10.62 MiB/s, done. Resolving deltas: 100% (315/315), completed with 125 local objects. 7a824dc305..df83c734ef dpdk-20.11-devel -> origin/dpdk-20.11-devel 8b59a1248a..34b50fc2d3 dpdk-21.08-devel -> origin/dpdk-21.08-devel + 9661f6ac43...fdab8f2e17 next-event-> origin/next-event (forced update) 87d9bacc46..5803d86b87 next-net -> origin/next-net * [new branch]user/pbhagavatula/eventdev_abi-> origin/user/pbhagavatula/eventdev_abi 056af3c7e5..55069aef6c user/skori/cnxk-ingress-policer-devel -> origin/user/skori/cnxk-ingress-policer-devel acd23283ff513c4f65290a7c92e9de25b912c0b1 (HEAD -> main) drivers/raw: remove octeontx2-ep driver 463f4c93c4569fcb8a103d4e9231c4ba6c347b5e drivers/raw: remove octeontx2-dma driver fdab8f2e17493192d555cd88cf28b06269174326 (origin/next-event, origin/main) version: 21.11-rc0 4ac3f3d76e9507a93bcf48d165ffd3a1faba08bb (origin/dpdk-21.08-release) version: 21.08.0 293e836ea5e93dc923a114272798c5abbee7bae6 doc: announce changes in IPsec xform structure 132293cb74a341ab05eae526b58c47efe2392b6c doc: announce change in IPsec SA structure eed159074e0e17dbd4971a0b9808f164c02acf5c doc: announce hiding crypto session structures regards, Radha Mohan > 2.24.1 >
Re: [dpdk-dev] [PATCH v4 2/2] drivers/raw: remove octeontx2-ep driver
On Mon, Aug 23, 2021 at 6:02 PM David Marchand wrote: > > On Mon, Aug 23, 2021 at 2:19 PM Radha Mohan wrote: > > I received this report that this patch failed to apply > > http://mails.dpdk.org/archives/test-report/2021-August/211611.html > > The two patches of this series are seen as two separate series. > http://patchwork.dpdk.org/project/dpdk/list/?submitter=2007 > > I don't have the reason why, but this is likely because of the way > those patches were submitted to the ml. > Please double check. > ok let me check and re-submit. thank you. > > For the details on the conflict: the CI tries to test each series, so > here, the second patch is tested without the first patch applied, and > it fails. > You can reproduce with: > $ git reset --hard origin/main > $ git describe > v21.08-1-gfdab8f2e17 > $ git pw series apply 18350 > Applying: drivers/raw: remove octeontx2-ep driver > Using index info to reconstruct a base tree... > MMAINTAINERS > Mdoc/guides/rawdevs/index.rst > Mdrivers/raw/meson.build > Falling back to patching base and 3-way merge... > Removing drivers/raw/octeontx2_ep/version.map > Removing drivers/raw/octeontx2_ep/otx2_ep_vf.h > Removing drivers/raw/octeontx2_ep/otx2_ep_vf.c > Removing drivers/raw/octeontx2_ep/otx2_ep_test.c > Removing drivers/raw/octeontx2_ep/otx2_ep_rawdev.h > Removing drivers/raw/octeontx2_ep/otx2_ep_rawdev.c > Removing drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h > Removing drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c > Removing drivers/raw/octeontx2_ep/meson.build > Auto-merging drivers/raw/meson.build > CONFLICT (content): Merge conflict in drivers/raw/meson.build > Removing doc/guides/rawdevs/octeontx2_ep.rst > Auto-merging doc/guides/rawdevs/index.rst > CONFLICT (content): Merge conflict in doc/guides/rawdevs/index.rst > Auto-merging MAINTAINERS > CONFLICT (content): Merge conflict in MAINTAINERS > error: Failed to merge in the changes. > hint: Use 'git am --show-current-patch' to see the failed patch > Patch failed at 0001 drivers/raw: remove octeontx2-ep driver > When you have resolved this problem, run "git am --continue". > If you prefer to skip this patch, run "git am --skip" instead. > To restore the original branch and stop patching, run "git am --abort". > > > -- > David Marchand >
Re: [dpdk-dev] [PATCH RESEND v4 2/2] drivers/raw: remove octeontx2-ep driver
On Mon, Aug 23, 2021 at 8:51 PM Radha Mohan Chintakuntla wrote: > > Removing the rawdev based octeontx2-ep driver as the dependent > common/octeontx2 will soon be going away. Moreover this driver is no > longer required as the net/octeontx_ep driver is sufficient. > > Signed-off-by: Radha Mohan Chintakuntla > --- > Changes from v3: > Fixed patch application failure due to conflict on main branch. > > > Changes from v2: > Fixed DPDK CI reported issues for more documentation failure. > > Changes from v1: > Fixed compilation issues in documentation > > MAINTAINERS | 6 - > doc/guides/rawdevs/index.rst | 1 - > doc/guides/rawdevs/octeontx2_ep.rst | 82 --- > drivers/raw/meson.build | 1 - > drivers/raw/octeontx2_ep/meson.build | 11 - > drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c | 846 -- > drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h | 52 -- > drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 362 - > drivers/raw/octeontx2_ep/otx2_ep_rawdev.h | 499 - > drivers/raw/octeontx2_ep/otx2_ep_test.c | 172 - > drivers/raw/octeontx2_ep/otx2_ep_vf.c | 475 > drivers/raw/octeontx2_ep/otx2_ep_vf.h | 10 - > drivers/raw/octeontx2_ep/version.map | 3 - > 13 files changed, 2520 deletions(-) > delete mode 100644 doc/guides/rawdevs/octeontx2_ep.rst > delete mode 100644 drivers/raw/octeontx2_ep/meson.build > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.c > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.h > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_test.c > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.c > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.h > delete mode 100644 drivers/raw/octeontx2_ep/version.map > hi Thomas, http://mails.dpdk.org/archives/test-report/2021-August/211681.html This time it's failing in building release notes guide for 19.08 where this driver was introduced first. Wouldn't release notes be built for current ? It would be odd to remove something from old release notes. regards, Radha Mohan
Re: [dpdk-dev] [PATCH v5 2/2] drivers/raw: remove octeontx2-ep driver
On Thu, Aug 26, 2021 at 4:20 PM Radha Mohan Chintakuntla wrote: > > Removing the rawdev based octeontx2-ep driver as the dependent > common/octeontx2 will soon be going away. Moreover this driver is no > longer required as the net/octeontx_ep driver is sufficient. > > Signed-off-by: Radha Mohan Chintakuntla > --- > Changes from v4: > Replaced the reference to documentation in release notes to plain text. > > Changes from v3: > Fixed patch application failure due to conflict on main branch. > > Changes from v2: > Fixed DPDK CI reported issues for more documentation failure. > > Changes from v1: > Fixed compilation issues in documentation > > MAINTAINERS | 6 - > doc/guides/rawdevs/index.rst | 1 - > doc/guides/rawdevs/octeontx2_ep.rst | 82 --- > doc/guides/rel_notes/release_20_02.rst| 2 +- > drivers/raw/meson.build | 1 - > drivers/raw/octeontx2_ep/meson.build | 11 - > drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c | 846 -- > drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h | 52 -- > drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 362 - > drivers/raw/octeontx2_ep/otx2_ep_rawdev.h | 499 - > drivers/raw/octeontx2_ep/otx2_ep_test.c | 172 - > drivers/raw/octeontx2_ep/otx2_ep_vf.c | 475 > drivers/raw/octeontx2_ep/otx2_ep_vf.h | 10 - > drivers/raw/octeontx2_ep/version.map | 3 - > 14 files changed, 1 insertion(+), 2521 deletions(-) > delete mode 100644 doc/guides/rawdevs/octeontx2_ep.rst > delete mode 100644 drivers/raw/octeontx2_ep/meson.build > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.c > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.h > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_test.c > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.c > delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.h > delete mode 100644 drivers/raw/octeontx2_ep/version.map > hi Thomas, Now checkpatch doesn't like touching older release notes. There must be a way of removing irrelevant drivers. regards, Radha Mohan
Re: [dpdk-dev] [PATCH 6/7] raw/octeontx2: enable build only for 64bit Linux
On Thu, Feb 25, 2021 at 10:33 PM wrote:
>
> From: Pavan Nikhilesh
>
> Due to Linux kernel dependency, only enable build for 64bit Linux.
>
> Signed-off-by: Pavan Nikhilesh
> ---
> drivers/raw/octeontx2_dma/meson.build | 10 ++
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/raw/octeontx2_dma/meson.build
> b/drivers/raw/octeontx2_dma/meson.build
> index 11f74680a..191035125 100644
> --- a/drivers/raw/octeontx2_dma/meson.build
> +++ b/drivers/raw/octeontx2_dma/meson.build
> @@ -2,14 +2,16 @@
> # Copyright(C) 2019 Marvell International Ltd.
> #
>
> +if not is_linux or not dpdk_conf.get('RTE_ARCH_64')
> + build = false
> + reason = 'only supported on 64-bit Linux'
> + subdir_done()
> +endif
> +
> deps += ['bus_pci', 'common_octeontx2', 'rawdev']
> sources = files('otx2_dpi_rawdev.c', 'otx2_dpi_msg.c', 'otx2_dpi_test.c')
>
> extra_flags = []
> -# This integrated controller runs only on a arm64 machine, remove 32bit
> warnings
> -if not dpdk_conf.get('RTE_ARCH_64')
> - extra_flags += ['-Wno-int-to-pointer-cast',
> '-Wno-pointer-to-int-cast']
> -endif
>
> foreach flag: extra_flags
> if cc.has_argument(flag)
> --
> 2.17.1
>
Acked-by: Radha Mohan Chintakuntla
Re: [dpdk-dev] [PATCH] maintainers: Update for OcteonTx2 DMA and EP
On Mon, Nov 9, 2020 at 4:20 PM Radha Mohan Chintakuntla wrote: > > Replace the maintainers for OcteonTx2 DMA and EP drivers. > > Signed-off-by: Radha Mohan Chintakuntla > --- > MAINTAINERS | 6 -- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/MAINTAINERS b/MAINTAINERS > index a720cf672e..214515060a 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1258,12 +1258,14 @@ F: drivers/raw/dpaa2_cmdif/ > F: doc/guides/rawdevs/dpaa2_cmdif.rst > > Marvell OCTEON TX2 DMA > -M: Satha Rao > +M: Radha Mohan Chintakuntla > +M: Veerasenareddy Burru > F: drivers/raw/octeontx2_dma/ > F: doc/guides/rawdevs/octeontx2_dma.rst > > Marvell OCTEON TX2 EP > -M: Mahipal Challa > +M: Radha Mohan Chintakuntla > +M: Veerasenareddy Burru > F: drivers/raw/octeontx2_ep/ > F: doc/guides/rawdevs/octeontx2_ep.rst > > -- > 2.24.1 > Adding previous maintainers to ack.
Re: [dpdk-dev] [EXT] Re: [PATCH] maintainers: Update for OcteonTx2 DMA and EP
On Tue, Nov 10, 2020 at 11:57 PM Mahipal Challa wrote: > > > > -Original Message----- > From: Radha Mohan > Sent: Tuesday, November 10, 2020 11:44 PM > To: Radha Chintakuntla ; Satha Koteswara Rao Kottidi > ; Mahipal Challa > Cc: dev@dpdk.org; Thomas Monjalon ; Veerasenareddy Burru > ; Satananda Burla ; Jerin Jacob > Kollanukkaran > Subject: [EXT] Re: [dpdk-dev] [PATCH] maintainers: Update for OcteonTx2 DMA > and EP > > External Email > > ------ > On Mon, Nov 9, 2020 at 4:20 PM Radha Mohan Chintakuntla > wrote: > > > > Replace the maintainers for OcteonTx2 DMA and EP drivers. > > > > Signed-off-by: Radha Mohan Chintakuntla > > --- > > MAINTAINERS | 6 -- > > 1 file changed, 4 insertions(+), 2 deletions(-) > > > > diff --git a/MAINTAINERS b/MAINTAINERS index a720cf672e..214515060a > > 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -1258,12 +1258,14 @@ F: drivers/raw/dpaa2_cmdif/ > > F: doc/guides/rawdevs/dpaa2_cmdif.rst > > > > Marvell OCTEON TX2 DMA > > -M: Satha Rao > > +M: Radha Mohan Chintakuntla > > +M: Veerasenareddy Burru > > F: drivers/raw/octeontx2_dma/ > > F: doc/guides/rawdevs/octeontx2_dma.rst > > > > Marvell OCTEON TX2 EP > > -M: Mahipal Challa > > +M: Radha Mohan Chintakuntla > > +M: Veerasenareddy Burru > > F: drivers/raw/octeontx2_ep/ > > F: doc/guides/rawdevs/octeontx2_ep.rst > > > > -- > > 2.24.1 > > > > >Adding previous maintainers to ack. > Acked-by: Mahipal Challa > Thanks, > Mahipal Hi Thomas, Could you please pick this patch ? regards, Radha Mohan
Re: [dpdk-dev] [EXT] Re: [PATCH] maintainers: Update for OcteonTx2 DMA and EP
On Fri, Nov 13, 2020 at 2:39 PM Thomas Monjalon wrote: > > 13/11/2020 20:18, Radha Mohan: > > On Tue, Nov 10, 2020 at 11:57 PM Mahipal Challa wrote: > > From: Radha Mohan > > Sent: Tuesday, November 10, 2020 11:44 PM > > > On Mon, Nov 9, 2020 at 4:20 PM Radha Mohan Chintakuntla > > > wrote: > > > > > > > > Replace the maintainers for OcteonTx2 DMA and EP drivers. > > > > > > > > Signed-off-by: Radha Mohan Chintakuntla > [...] > > > >Adding previous maintainers to ack. > > > Acked-by: Mahipal Challa > > > > > Thanks, > > > Mahipal > > > > Hi Thomas, > > Could you please pick this patch ? > > This low-priority patch has been sent 4 days ago, > and was acked by only 1 maintainer 3 days ago. > It was acked by both the old maintainers Satha Koteshwar and Mahipal Challa. Maybe both of those emails didn't come on top of each other. > Why pushing? What is your fear exactly? Just want to make the transfer of ownership official in the mainline. There's no fear I just normally wanted to send a reminder to you to pick as it might be missed inclusion. If there's a guarantee that all ack'ed patches will go automatically then I won't be sending any reminder emails in future. > > Why the new maintainers candidates have 0 and 2 contributions > in git history? > These drivers requires some maintenance and likely expanded to support future chips from Marvell. So you will not see contributions right away. So to become a maintainer one has to have prior contributions ? Kind of makes odd sense as these drivers are specific to our chip and we are changing ownership for maintaining them. I do not understand why you have an issue here? You don't like reminding then I understand. regards, Radha Mohan
Re: [dpdk-dev] [EXT] Re: [PATCH] maintainers: Update for OcteonTx2 DMA and EP
On Mon, Nov 16, 2020 at 12:28 PM Thomas Monjalon wrote: > > 16/11/2020 19:28, Radha Mohan: > > On Fri, Nov 13, 2020 at 2:39 PM Thomas Monjalon wrote: > > > 13/11/2020 20:18, Radha Mohan: > > > > On Tue, Nov 10, 2020 at 11:57 PM Mahipal Challa > > > > wrote: > > > > From: Radha Mohan > > > > Sent: Tuesday, November 10, 2020 11:44 PM > > > > > On Mon, Nov 9, 2020 at 4:20 PM Radha Mohan Chintakuntla > > > > > wrote: > > > > > > > > > > > > Replace the maintainers for OcteonTx2 DMA and EP drivers. > > > > > > > > > > > > Signed-off-by: Radha Mohan Chintakuntla > > > [...] > > > > > >Adding previous maintainers to ack. > > > > > Acked-by: Mahipal Challa > > > > > > > > > Thanks, > > > > > Mahipal > > > > > > > > Hi Thomas, > > > > Could you please pick this patch ? > > > > > > This low-priority patch has been sent 4 days ago, > > > and was acked by only 1 maintainer 3 days ago. > > > > > > > It was acked by both the old maintainers Satha Koteshwar and Mahipal > > Challa. Maybe both of those emails didn't come on top of each other. > > I missed one. > > > > Why pushing? What is your fear exactly? > > > > Just want to make the transfer of ownership official in the mainline. > > There's no fear I just normally wanted to send a reminder to you to > > pick as it might be missed inclusion. If there's a guarantee that all > > ack'ed patches will go automatically then I won't be sending any > > reminder emails in future. > > It's OK to send reminder, but please wait at least a week. > > > > Why the new maintainers candidates have 0 and 2 contributions > > > in git history? > > > > > These drivers requires some maintenance and likely expanded to support > > future chips from Marvell. So you will not see contributions right > > away. > > So to become a maintainer one has to have prior contributions ? > > Yes: > http://doc.dpdk.org/guides/contributing/patches.html#maintainers-and-sub-trees > " > Maintainers should have demonstrated a reasonable level of contributions or > reviews to the component area. The maintainer should be confirmed by an ack > from an established contributor. > " How was this done without prior contributions? http://git.dpdk.org/dpdk/commit/MAINTAINERS?id=238e3167ca869abf44fa50ead022d7fc3b99605b The commit log says that he is a "new developer". So am I technically to the community. Also the thing that puzzles me most is its a driver specific to Marvell and both the previous maintainers are ok with the transfer but a strange rule that probably applies to generic things of dpdk code (which really makes sense there) comes as a blocker. And how does new driver go? Lets say if either myself or veerasena have pushed a new driver now who has to ack it for inclusion ? Isn't that like a chicken and egg problem. I am looking for clarifications as things are different in other open source communities. > > > Kind of makes odd sense as these drivers are specific to our chip and we > > are changing ownership for maintaining them. > > I do not understand why you have an issue here? > > You don't like reminding then I understand. > > I don't like how you push new unconfirmed maintainers. Could you please explain above commit made into new maintainer? > >
Re: [dpdk-dev] [EXT] Re: [PATCH] maintainers: Update for OcteonTx2 DMA and EP
On Wed, Nov 18, 2020 at 1:15 AM Thomas Monjalon wrote: > > 18/11/2020 05:15, Radha Mohan: > > On Mon, Nov 16, 2020 at 12:28 PM Thomas Monjalon > > wrote: > > > 16/11/2020 19:28, Radha Mohan: > > > > On Fri, Nov 13, 2020 at 2:39 PM Thomas Monjalon > > > > wrote: > > > > > 13/11/2020 20:18, Radha Mohan: > > > > > > On Tue, Nov 10, 2020 at 11:57 PM Mahipal Challa > > > > > > wrote: > > > > > > From: Radha Mohan > > > > > > Sent: Tuesday, November 10, 2020 11:44 PM > > > > > > > On Mon, Nov 9, 2020 at 4:20 PM Radha Mohan Chintakuntla > > > > > > > wrote: > > > > > > > > > > > > > > > > Replace the maintainers for OcteonTx2 DMA and EP drivers. > > > > > > > > > > > > > > > > Signed-off-by: Radha Mohan Chintakuntla > > > > > [...] > > > > > > > >Adding previous maintainers to ack. > > > > > > > Acked-by: Mahipal Challa > > > > > > > > > > > > > Thanks, > > > > > > > Mahipal > > > > > > > > > > > > Hi Thomas, > > > > > > Could you please pick this patch ? > > > > > > > > > > This low-priority patch has been sent 4 days ago, > > > > > and was acked by only 1 maintainer 3 days ago. > > > > > > > > > > > > > It was acked by both the old maintainers Satha Koteshwar and Mahipal > > > > Challa. Maybe both of those emails didn't come on top of each other. > > > > > > I missed one. > > > > > > > > Why pushing? What is your fear exactly? > > > > > > > > Just want to make the transfer of ownership official in the mainline. > > > > There's no fear I just normally wanted to send a reminder to you to > > > > pick as it might be missed inclusion. If there's a guarantee that all > > > > ack'ed patches will go automatically then I won't be sending any > > > > reminder emails in future. > > > > > > It's OK to send reminder, but please wait at least a week. > > > > > > > > Why the new maintainers candidates have 0 and 2 contributions > > > > > in git history? > > > > > > > > > These drivers requires some maintenance and likely expanded to support > > > > future chips from Marvell. So you will not see contributions right > > > > away. > > > > So to become a maintainer one has to have prior contributions ? > > > > > > Yes: > > > http://doc.dpdk.org/guides/contributing/patches.html#maintainers-and-sub-trees > > > " > > > Maintainers should have demonstrated a reasonable level of contributions > > > or reviews to the component area. The maintainer should be confirmed by > > > an ack from an established contributor. > > > " > > > > How was this done without prior contributions? > > http://git.dpdk.org/dpdk/commit/MAINTAINERS?id=238e3167ca869abf44fa50ead022d7fc3b99605b > > I asked a confirmation: > http://inbox.dpdk.org/dev/1985242.AXpOyGb66D@thomas/ Right. But in this case I got different. > > > > The commit log says that he is a "new developer". So am I technically > > to the community. > > > > Also the thing that puzzles me most is its a driver specific to > > Marvell and both the previous maintainers are ok with the transfer but > > a strange rule that probably applies to generic things of dpdk code > > (which really makes sense there) comes as a blocker. > > Did I say it is a blocker? Maybe I got that impression from your comments. > > > And how does new driver go? > > For new drivers, the new maintainers arrive by contributing new code. > > > Lets say if either myself or veerasena have pushed a new driver now > > who has to ack it for inclusion ? Isn't that like a chicken and egg > > problem. > > Nobody has to ack for a new driver. > > > I am looking for clarifications as things are different in other open > > source communities. > > > > > > Kind of makes odd sense as these drivers are specific to our chip and we > > > > are changing ownership for maintaining them. > > > > I do not understand why you have an issue here? > > > > You don't like reminding then I understand. > > > > > > I don't like how you push new unconfirmed maintainers. > > > > Could you please explain above commit made into new maintainer? > > Listen: I say I don't like how pushy you are, that's all. > In general it's very good to have new contributors. > But please think how you can help instead of just requesting. > We have a lot more important things to care at the moment > to close the big release 20.11. If you want to help, you are welcome. > ok fair enough. For my defence i wasn't being pushy. So hopefully this updation can be taken once you are able to do after 20.11. >
Re: [dpdk-dev] [PATCH RESEND 1/2] raw/octeontx2_dma: Assign pem_id as lport for non-internal DMA
On Wed, Oct 7, 2020 at 10:33 AM Satha Koteswara Rao Kottidi
wrote:
>
>
>
> -Original Message-----
> From: Radha Mohan Chintakuntla
> Sent: Tuesday, October 6, 2020 11:00 AM
> To: dev@dpdk.org; Satha Koteswara Rao Kottidi
> Cc: Jerin Jacob Kollanukkaran ; Radha Chintakuntla
> ; Satananda Burla
> Subject: [PATCH RESEND 1/2] raw/octeontx2_dma: Assign pem_id as lport for
> non-internal DMA
>
> DPI needs to know the PEM number for all external transfers.
>
> Signed-off-by: Radha Mohan Chintakuntla
> Reviewed-by: Satha Koteswara Rao Kottidi
> Reviewed-by: Satananda Burla
> ---
>
> drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 2 ++
> drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 1 +
> 2 files changed, 3 insertions(+)
>
> diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
> b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
> index 5b496446c..a1b94ce1d 100644
> --- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
> +++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
> @@ -201,6 +201,8 @@ otx2_dpi_rawdev_enqueue_bufs(struct rte_rawdev *dev,
> index += 4;
> hdr->s.fport = 0;
> hdr->s.lport = 0;
> + if (ctx->xtype != DPI_XTYPE_INTERNAL_ONLY)
> + hdr->s.lport = ctx->pem_id;
>
> /* For inbound case, src pointers are last pointers.
> * For all other cases, src pointers are first pointers.
> diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
> b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
> index 9ebb25988..81740e84b 100644
> --- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
> +++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
> @@ -140,6 +140,7 @@ struct dpi_dma_queue_ctx_s {
> uint16_t req_type:2;
> uint16_t use_lock:1;
> uint16_t deallocv;
> + uint16_t pem_id;
>
> struct dpi_cring_data_s *c_ring;
> };
> --
> 2.24.1
>
> Acked-by: Satha Rao
David/Thomas,
Could you please pick this series for main.
regards,
Radha Mohan
[dpdk-dev] [PATCH] raw/octeontx2_dma: fix unavailable PCI device in dpivf
The PCI device address is being used for sending mailbox which was
introduced in previous commit which replaced the macros so that
multiple DPI blocks in the hardware can be supported.
This patch fixes a NULL pointer access by assigning the PCI device
structure to dpivf.
Fixes: 4495bd887d38 ("raw/octeontx2_dma: support multiple DPI blocks")
Signed-off-by: Radha Mohan Chintakuntla
---
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
index efdba2779b..8c01f25ec7 100644
--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
@@ -389,6 +389,7 @@ otx2_dpi_rawdev_probe(struct rte_pci_driver *pci_drv
__rte_unused,
vf_id = ((pci_dev->addr.devid & 0x1F) << 3) |
(pci_dev->addr.function & 0x7);
vf_id -= 1;
+ dpivf->dev = pci_dev;
dpivf->state = DPI_QUEUE_START;
dpivf->vf_id = vf_id;
dpivf->vf_bar0 = (uintptr_t)pci_dev->mem_resource[0].addr;
--
2.24.1
[dpdk-dev] [PATCH v2] raw/octeontx2_dma: fix unavailable PCI device in dpivf
The PCI device address is being used for sending mailbox which was
introduced in previous commit which replaced the macros so that
multiple DPI blocks in the hardware can be supported.
This patch fixes a NULL pointer access by assigning the PCI device
structure to dpivf.
Fixes: 4495bd887d38 ("raw/octeontx2_dma: support multiple DPI blocks")
Signed-off-by: Radha Mohan Chintakuntla
---
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
index efdba2779b..8c01f25ec7 100644
--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
@@ -389,6 +389,7 @@ otx2_dpi_rawdev_probe(struct rte_pci_driver *pci_drv
__rte_unused,
vf_id = ((pci_dev->addr.devid & 0x1F) << 3) |
(pci_dev->addr.function & 0x7);
vf_id -= 1;
+ dpivf->dev = pci_dev;
dpivf->state = DPI_QUEUE_START;
dpivf->vf_id = vf_id;
dpivf->vf_bar0 = (uintptr_t)pci_dev->mem_resource[0].addr;
--
2.24.1
[dpdk-dev] [PATCH 2/4] dma/cnxk: create and initialize dmadev on pci probe
This patch creates and initializes a dmadev device on pci probe.
Signed-off-by: Radha Mohan Chintakuntla
---
MAINTAINERS| 7 +-
doc/guides/dmadevs/cnxk.rst| 53 +++
doc/guides/dmadevs/index.rst | 1 +
drivers/dma/cnxk/cnxk_dmadev.c | 119 +
drivers/dma/cnxk/cnxk_dmadev.h | 11 +++
drivers/dma/cnxk/meson.build | 7 ++
drivers/dma/meson.build| 1 +
7 files changed, 198 insertions(+), 1 deletion(-)
create mode 100644 doc/guides/dmadevs/cnxk.rst
create mode 100644 drivers/dma/cnxk/cnxk_dmadev.c
create mode 100644 drivers/dma/cnxk/cnxk_dmadev.h
create mode 100644 drivers/dma/cnxk/meson.build
diff --git a/MAINTAINERS b/MAINTAINERS
index be2c9b6815..cdc2d98a6b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1186,7 +1186,6 @@ F: drivers/compress/zlib/
F: doc/guides/compressdevs/zlib.rst
F: doc/guides/compressdevs/features/zlib.ini
-
DMAdev Drivers
--
@@ -1202,6 +1201,12 @@ M: Conor Walsh
F: drivers/dma/ioat/
F: doc/guides/dmadevs/ioat.rst
+Marvell CNXK DPI DMA
+M: Radha Mohan Chintakuntla
+M: Veerasenareddy Burru
+F: drivers/dma/cnxk/
+F: doc/guides/dmadevs/cnxk.rst
+
RegEx Drivers
-
diff --git a/doc/guides/dmadevs/cnxk.rst b/doc/guides/dmadevs/cnxk.rst
new file mode 100644
index 00..8ae7c1f8cd
--- /dev/null
+++ b/doc/guides/dmadevs/cnxk.rst
@@ -0,0 +1,53 @@
+.. SPDX-License-Identifier: BSD-3-Clause
+Copyright(c) 2021 Marvell International Ltd.
+
+.. include::
+
+CNXK DMA Device Driver
+==
+
+The ``cnxk`` dmadev driver provides a poll-mode driver (PMD) for Marvell DPI
DMA
+Hardware Accelerator block found in OCTEONTX2 and OCTEONTX3 family of SoCs.
Each
+DMA queue is exposed as a VF function when SRIOV is enabled.
+
+The block supports following modes of DMA transfers
+
+#. Internal - DMA within SoC DRAM to DRAM
+
+#. Inbound - Host DRAM to SoC DRAM when SoC is in PCIe Endpoint
+
+#. Outbound - SoC DRAM to Host DRAM when SoC is in PCIe Endpoint
+
+Device Setup
+-
+The ``dpdk-devbind.py`` script, included with DPDK, can be used to show the
+presence of supported hardware. Running ``dpdk-devbind.py --status-dev dma``
+will show all the CNXK DMA devices.
+
+Devices using VFIO drivers
+~~~
+
+The HW devices to be used will need to be bound to a user-space IO driver for
use.
+The ``dpdk-devbind.py`` script can be used to view the state of the devices
+and to bind them to a suitable DPDK-supported driver, such as ``vfio-pci``.
+For example::
+
+ $ dpdk-devbind.py -b vfio-pci :05:00.1
+
+Device Probing and Initialization
+~~
+
+To use the devices from an application, the dmadev API can be used.
+CNXK DMA device configuration requirements:
+
+* Only one ``vchan`` is supported per device.
+* CNXK DMA devices do not support silent mode.
+
+Once configured, the device can then be made ready for use by calling the
+ ``rte_dma_start()`` API.
+
+Performing Data Copies
+~~~
+
+Refer to the :ref:`Enqueue / Dequeue APIs ` section of
the dmadev library
+documentation for details on operation enqueue and submission API usage.
diff --git a/doc/guides/dmadevs/index.rst b/doc/guides/dmadevs/index.rst
index 20476039a5..227fa00c68 100644
--- a/doc/guides/dmadevs/index.rst
+++ b/doc/guides/dmadevs/index.rst
@@ -11,5 +11,6 @@ an application through DMA API.
:maxdepth: 2
:numbered:
+ cnxk
idxd
ioat
diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
new file mode 100644
index 00..620766743d
--- /dev/null
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -0,0 +1,119 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2021 Marvell International Ltd.
+ */
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+static int
+cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused,
+ struct rte_pci_device *pci_dev)
+{
+ struct cnxk_dpi_vf_s *dpivf = NULL;
+ char name[RTE_DEV_NAME_MAX_LEN];
+ struct rte_dma_dev *dmadev;
+ struct roc_dpi *rdpi = NULL;
+ int rc;
+
+ if (!pci_dev->mem_resource[0].addr)
+ return -ENODEV;
+
+ rc = roc_plt_init();
+ if (rc) {
+ plt_err("Failed to initialize platform model, rc=%d", rc);
+ return rc;
+ }
+ memset(name, 0, sizeof(name));
+ rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
+
+ dmadev = rte_dma_pmd_allocate(name, pci_dev->device.numa_node,
+ sizeof(*dpivf));
+ if (dmadev == NULL) {
+ plt_err("dma device allocation failed for %s", name);
+ return -ENOMEM;
+ }
+
+ dpivf = dmadev->data->dev_private;
+
+ dmadev->device
[dpdk-dev] [PATCH 1/4] common/cnxk: add DPI DMA support
Add base support as ROC(Rest of Chip) API which will be used by PMD
dmadev driver.
This patch adds routines to init, fini, configure the DPI DMA device
found in Marvell's CN9k or CN10k SoC familes.
Signed-off-by: Radha Mohan Chintakuntla
---
drivers/common/cnxk/hw/dpi.h | 136
drivers/common/cnxk/meson.build| 1 +
drivers/common/cnxk/roc_api.h | 4 +
drivers/common/cnxk/roc_dpi.c | 193 +
drivers/common/cnxk/roc_dpi.h | 44 +++
drivers/common/cnxk/roc_dpi_priv.h | 40 ++
drivers/common/cnxk/roc_platform.h | 1 +
drivers/common/cnxk/roc_priv.h | 3 +
drivers/common/cnxk/version.map| 5 +
9 files changed, 427 insertions(+)
create mode 100644 drivers/common/cnxk/hw/dpi.h
create mode 100644 drivers/common/cnxk/roc_dpi.c
create mode 100644 drivers/common/cnxk/roc_dpi.h
create mode 100644 drivers/common/cnxk/roc_dpi_priv.h
diff --git a/drivers/common/cnxk/hw/dpi.h b/drivers/common/cnxk/hw/dpi.h
new file mode 100644
index 00..aa1e66aa11
--- /dev/null
+++ b/drivers/common/cnxk/hw/dpi.h
@@ -0,0 +1,136 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+/**
+ * DPI device HW definitions.
+ */
+#ifndef __DEV_DPI_HW_H__
+#define __DEV_DPI_HW_H__
+
+#include
+
+/** @cond __INTERNAL_DOCUMENTATION__ */
+
+/* DPI VF register offsets from VF_BAR0 */
+#define DPI_VDMA_EN (0x0)
+#define DPI_VDMA_REQQ_CTL (0x8)
+#define DPI_VDMA_DBELL(0x10)
+#define DPI_VDMA_SADDR(0x18)
+#define DPI_VDMA_COUNTS (0x20)
+#define DPI_VDMA_NADDR(0x28)
+#define DPI_VDMA_IWBUSY (0x30)
+#define DPI_VDMA_CNT (0x38)
+#define DPI_VF_INT(0x100)
+#define DPI_VF_INT_W1S(0x108)
+#define DPI_VF_INT_ENA_W1C (0x110)
+#define DPI_VF_INT_ENA_W1S (0x118)
+
+/**
+ * Enumeration dpi_hdr_xtype_e
+ *
+ * DPI Transfer Type Enumeration
+ * Enumerates the pointer type in DPI_DMA_INSTR_HDR_S[XTYPE].
+ */
+#define DPI_XTYPE_OUTBOUND (0)
+#define DPI_XTYPE_INBOUND (1)
+#define DPI_XTYPE_INTERNAL_ONLY (2)
+#define DPI_XTYPE_EXTERNAL_ONLY (3)
+#define DPI_HDR_XTYPE_MASK 0x3
+#define DPI_HDR_PT_MASK0x3
+#define DPI_HDR_TT_MASK0x3
+#define DPI_HDR_GRP_MASK 0x3FF
+#define DPI_HDR_FUNC_MASK 0x
+
+/* Big endian data bit position in DMA local pointer */
+#define DPI_LPTR_BED_BIT_POS (60)
+
+#define DPI_MIN_CMD_SIZE 8
+#define DPI_MAX_CMD_SIZE 64
+
+/**
+ * Structure dpi_instr_hdr_s for CN9K
+ *
+ * DPI DMA Instruction Header Format
+ */
+union dpi_instr_hdr_s {
+ uint64_t u[4];
+ struct dpi_dma_instr_hdr_s_s {
+ uint64_t tag : 32;
+ uint64_t tt : 2;
+ uint64_t grp : 10;
+ uint64_t reserved_44_47 : 4;
+ uint64_t nfst : 4;
+ uint64_t reserved_52_53 : 2;
+ uint64_t nlst : 4;
+ uint64_t reserved_58_63 : 6;
+ /* Word 0 - End */
+ uint64_t aura : 20;
+ uint64_t func : 16;
+ uint64_t pt : 2;
+ uint64_t reserved_102 : 1;
+ uint64_t pvfe : 1;
+ uint64_t fl : 1;
+ uint64_t ii : 1;
+ uint64_t fi : 1;
+ uint64_t ca : 1;
+ uint64_t csel : 1;
+ uint64_t reserved_109_111 : 3;
+ uint64_t xtype : 2;
+ uint64_t reserved_114_119 : 6;
+ uint64_t fport : 2;
+ uint64_t reserved_122_123 : 2;
+ uint64_t lport : 2;
+ uint64_t reserved_126_127 : 2;
+ /* Word 1 - End */
+ uint64_t ptr : 64;
+ /* Word 2 - End */
+ uint64_t reserved_192_255 : 64;
+ /* Word 3 - End */
+ } s;
+};
+
+/**
+ * Structure dpi_cn10k_instr_hdr_s for CN10K
+ *
+ * DPI DMA Instruction Header Format
+ */
+union dpi_cn10k_instr_hdr_s {
+ uint64_t u[4];
+ struct dpi_cn10k_dma_instr_hdr_s_s {
+ uint64_t nfst : 4;
+ uint64_t reserved_4_5 : 2;
+ uint64_t nlst : 4;
+ uint64_t reserved_10_11 : 2;
+ uint64_t pvfe : 1;
+ uint64_t reserved_13 : 1;
+ uint64_t func : 16;
+ uint64_t aura : 20;
+ uint64_t xtype : 2;
+ uint64_t reserved_52_53 : 2;
+ uint64_t pt : 2;
+ uint64_t fport : 2;
+ uint64_t reserved_58_59 : 2;
+ uint64_t lport : 2;
+ uint64_t reserved_62_63 : 2;
+ /* Word 0 - End */
+ uint64_t ptr : 64;
+ /* Word 1 - End */
+ uint64_t tag : 32;
+ uint64_t tt : 2;
+ uint64_t grp : 10;
+ uint64_t reserved_172_173 : 2;
+ uint64_t fl : 1;
+ uint64_t ii : 1;
+ uint64_t f
[dpdk-dev] [PATCH 4/4] dma/cnxk: add copy_sg function
Add the copy_sg function that will do the multiple DMA transfers of
different sizes and different source/destination as well.
Signed-off-by: Radha Mohan Chintakuntla
---
drivers/dma/cnxk/cnxk_dmadev.c | 80 +-
1 file changed, 79 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index 8434579aa2..f15ea16c5f 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -29,7 +29,7 @@ cnxk_dmadev_info_get(const struct rte_dma_dev *dev,
dev_info->nb_vchans = 1;
dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |
RTE_DMA_CAPA_MEM_TO_DEV | RTE_DMA_CAPA_DEV_TO_MEM |
- RTE_DMA_CAPA_OPS_COPY;
+ RTE_DMA_CAPA_OPS_COPY | RTE_DMA_CAPA_OPS_COPY_SG;
dev_info->max_desc = DPI_MAX_DESC;
dev_info->min_desc = 1;
dev_info->max_sges = DPI_MAX_POINTER;
@@ -294,6 +294,83 @@ cnxk_dmadev_completed(void *dev_private, uint16_t vchan,
const uint16_t nb_cpls,
return cnt;
}
+static int
+cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan,
+ const struct rte_dma_sge *src,
+ const struct rte_dma_sge *dst,
+ uint16_t nb_src, uint16_t nb_dst, uint64_t flags)
+{
+ uint64_t cmd[DPI_MAX_CMD_SIZE] = {0};
+ union dpi_instr_hdr_s *header = (union dpi_instr_hdr_s *)&cmd[0];
+ struct cnxk_dpi_vf_s *dpivf = dev_private;
+ const struct rte_dma_sge *fptr, *lptr;
+ struct cnxk_dpi_compl_s *comp_ptr;
+ int num_words = 0;
+ int i, rc;
+
+ RTE_SET_USED(vchan);
+
+ header->s.xtype = dpivf->conf.direction;
+ header->s.pt = DPI_HDR_PT_ZBW_CA;
+ header->s.grp = 0;
+ header->s.tag = 0;
+ header->s.tt = 0;
+ header->s.func = 0;
+ comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
+ comp_ptr->cdata = DPI_REQ_CDATA;
+ header->s.ptr = (uint64_t)comp_ptr;
+ STRM_INC(dpivf->conf.c_desc);
+
+ /* pvfs should be set for inbound and outbound only */
+ if (header->s.xtype <= 1)
+ header->s.pvfe = 1;
+ num_words += 4;
+
+ /*
+* For inbound case, src pointers are last pointers.
+* For all other cases, src pointers are first pointers.
+*/
+ if (header->s.xtype == DPI_XTYPE_INBOUND) {
+ header->s.nfst = nb_dst & 0xf;
+ header->s.nlst = nb_src & 0xf;
+ fptr = &dst[0];
+ lptr = &src[0];
+ header->s.fport = dpivf->conf.dst_port & 0x3;
+ header->s.lport = dpivf->conf.src_port & 0x3;
+ } else {
+ header->s.nfst = nb_src & 0xf;
+ header->s.nlst = nb_dst & 0xf;
+ fptr = &src[0];
+ lptr = &dst[0];
+ header->s.fport = dpivf->conf.src_port & 0x3;
+ header->s.lport = dpivf->conf.dst_port & 0x3;
+ }
+
+ for (i = 0; i < header->s.nfst; i++) {
+ cmd[num_words++] = (uint64_t)fptr->length;
+ cmd[num_words++] = fptr->addr;
+ fptr++;
+ }
+
+ for (i = 0; i < header->s.nlst; i++) {
+ cmd[num_words++] = (uint64_t)lptr->length;
+ cmd[num_words++] = lptr->addr;
+ lptr++;
+ }
+
+ rc = __dpi_queue_write(&dpivf->rdpi, cmd, num_words);
+ if (!rc) {
+ if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
+ rte_wmb();
+ plt_write64(num_words,
+ dpivf->rdpi.rbase + DPI_VDMA_DBELL);
+ }
+ dpivf->num_words = num_words;
+ }
+
+ return rc;
+}
+
static uint16_t
cnxk_dmadev_completed_status(void *dev_private, uint16_t vchan,
const uint16_t nb_cpls, uint16_t *last_idx,
@@ -369,6 +446,7 @@ cnxk_dmadev_probe(struct rte_pci_driver *pci_drv
__rte_unused,
dmadev->dev_ops = &cnxk_dmadev_ops;
dmadev->fp_obj->copy = cnxk_dmadev_copy;
+ dmadev->fp_obj->copy_sg = cnxk_dmadev_copy_sg;
dmadev->fp_obj->submit = cnxk_dmadev_submit;
dmadev->fp_obj->completed = cnxk_dmadev_completed;
dmadev->fp_obj->completed_status = cnxk_dmadev_completed_status;
--
2.17.1
[dpdk-dev] [PATCH 3/4] dma/cnxk: add dma channel operations
Add functions for the dmadev vchan setup and DMA operations.
Signed-off-by: Radha Mohan Chintakuntla
---
drivers/dma/cnxk/cnxk_dmadev.c | 322 +
drivers/dma/cnxk/cnxk_dmadev.h | 53 ++
drivers/dma/cnxk/version.map | 3 +
3 files changed, 378 insertions(+)
create mode 100644 drivers/dma/cnxk/version.map
diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index 620766743d..8434579aa2 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -18,6 +18,322 @@
#include
#include
+static int
+cnxk_dmadev_info_get(const struct rte_dma_dev *dev,
+struct rte_dma_info *dev_info, uint32_t size)
+{
+ RTE_SET_USED(dev);
+ RTE_SET_USED(size);
+
+ dev_info->max_vchans = 1;
+ dev_info->nb_vchans = 1;
+ dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |
+ RTE_DMA_CAPA_MEM_TO_DEV | RTE_DMA_CAPA_DEV_TO_MEM |
+ RTE_DMA_CAPA_OPS_COPY;
+ dev_info->max_desc = DPI_MAX_DESC;
+ dev_info->min_desc = 1;
+ dev_info->max_sges = DPI_MAX_POINTER;
+
+ return 0;
+}
+
+static int
+cnxk_dmadev_configure(struct rte_dma_dev *dev,
+ const struct rte_dma_conf *conf, uint32_t conf_sz)
+{
+ struct cnxk_dpi_vf_s *dpivf = NULL;
+ int rc = 0;
+
+ RTE_SET_USED(conf);
+ RTE_SET_USED(conf);
+ RTE_SET_USED(conf_sz);
+ RTE_SET_USED(conf_sz);
+ dpivf = dev->fp_obj->dev_private;
+ rc = roc_dpi_queue_configure(&dpivf->rdpi);
+ if (rc < 0)
+ plt_err("DMA queue configure failed err = %d", rc);
+
+ return rc;
+}
+
+static int
+cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
+ const struct rte_dma_vchan_conf *conf,
+ uint32_t conf_sz)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+ struct cnxk_dpi_compl_s *comp_data;
+ int i;
+
+ RTE_SET_USED(vchan);
+ RTE_SET_USED(conf_sz);
+
+ switch (conf->direction) {
+ case RTE_DMA_DIR_DEV_TO_MEM:
+ dpivf->conf.direction = DPI_XTYPE_INBOUND;
+ dpivf->conf.src_port = conf->src_port.pcie.coreid;
+ dpivf->conf.dst_port = 0;
+ break;
+ case RTE_DMA_DIR_MEM_TO_DEV:
+ dpivf->conf.direction = DPI_XTYPE_OUTBOUND;
+ dpivf->conf.src_port = 0;
+ dpivf->conf.dst_port = conf->dst_port.pcie.coreid;
+ break;
+ case RTE_DMA_DIR_MEM_TO_MEM:
+ dpivf->conf.direction = DPI_XTYPE_INTERNAL_ONLY;
+ dpivf->conf.src_port = 0;
+ dpivf->conf.dst_port = 0;
+ break;
+ case RTE_DMA_DIR_DEV_TO_DEV:
+ dpivf->conf.direction = DPI_XTYPE_EXTERNAL_ONLY;
+ dpivf->conf.src_port = conf->src_port.pcie.coreid;
+ dpivf->conf.dst_port = conf->src_port.pcie.coreid;
+ };
+
+ for (i = 0; i < conf->nb_desc; i++) {
+ comp_data = rte_zmalloc(NULL, sizeof(*comp_data), 0);
+ dpivf->conf.c_desc.compl_ptr[i] = comp_data;
+ };
+ dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC;
+ dpivf->conf.c_desc.head = 0;
+ dpivf->conf.c_desc.tail = 0;
+
+ return 0;
+}
+
+static int
+cnxk_dmadev_start(struct rte_dma_dev *dev)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+
+ roc_dpi_queue_start(&dpivf->rdpi);
+
+ return 0;
+}
+
+static int
+cnxk_dmadev_stop(struct rte_dma_dev *dev)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+
+ roc_dpi_queue_stop(&dpivf->rdpi);
+
+ return 0;
+}
+
+static int
+cnxk_dmadev_close(struct rte_dma_dev *dev)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+
+ roc_dpi_queue_stop(&dpivf->rdpi);
+ roc_dpi_dev_fini(&dpivf->rdpi);
+
+ return 0;
+}
+
+static inline int
+__dpi_queue_write(struct roc_dpi *dpi, uint64_t *cmds, int cmd_count)
+{
+ uint64_t *ptr = dpi->chunk_base;
+
+ if ((cmd_count < DPI_MIN_CMD_SIZE) || (cmd_count > DPI_MAX_CMD_SIZE) ||
+ cmds == NULL)
+ return -EINVAL;
+
+ /*
+* Normally there is plenty of room in the current buffer for the
+* command
+*/
+ if (dpi->chunk_head + cmd_count < dpi->pool_size_m1) {
+ ptr += dpi->chunk_head;
+ dpi->chunk_head += cmd_count;
+ while (cmd_count--)
+ *ptr++ = *cmds++;
+ } else {
+ int count;
+ uint64_t *new_buff = dpi->chunk_next;
+
+ dpi->chunk_next =
+ (void *)
[dpdk-dev] [PATCH v2 1/4] common/cnxk: add DPI DMA support
Add base support as ROC(Rest of Chip) API which will be used by PMD
dmadev driver.
This patch adds routines to init, fini, configure the DPI DMA device
found in Marvell's CN9k or CN10k SoC families.
Signed-off-by: Radha Mohan Chintakuntla
---
Changes from v1:
- Changed to roc_dpi_enable() from roc_dpi_queue_start()
- Changed to roc_dpi_disable() from roc_dp_queue_stop()
- Moved part of DMA header preparation to vchan_setup() which can save
some CPU cycles in fastpath.
drivers/common/cnxk/hw/dpi.h | 141 +
drivers/common/cnxk/meson.build| 1 +
drivers/common/cnxk/roc_api.h | 4 +
drivers/common/cnxk/roc_dpi.c | 193 +
drivers/common/cnxk/roc_dpi.h | 46 +++
drivers/common/cnxk/roc_dpi_priv.h | 40 ++
drivers/common/cnxk/roc_platform.h | 1 +
drivers/common/cnxk/roc_priv.h | 3 +
drivers/common/cnxk/version.map| 5 +
9 files changed, 434 insertions(+)
create mode 100644 drivers/common/cnxk/hw/dpi.h
create mode 100644 drivers/common/cnxk/roc_dpi.c
create mode 100644 drivers/common/cnxk/roc_dpi.h
create mode 100644 drivers/common/cnxk/roc_dpi_priv.h
diff --git a/drivers/common/cnxk/hw/dpi.h b/drivers/common/cnxk/hw/dpi.h
new file mode 100644
index 00..69fe7b6d33
--- /dev/null
+++ b/drivers/common/cnxk/hw/dpi.h
@@ -0,0 +1,141 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+/**
+ * DPI device HW definitions.
+ */
+#ifndef __DEV_DPI_HW_H__
+#define __DEV_DPI_HW_H__
+
+#include
+
+/* DPI VF register offsets from VF_BAR0 */
+#define DPI_VDMA_EN (0x0)
+#define DPI_VDMA_REQQ_CTL (0x8)
+#define DPI_VDMA_DBELL(0x10)
+#define DPI_VDMA_SADDR(0x18)
+#define DPI_VDMA_COUNTS (0x20)
+#define DPI_VDMA_NADDR(0x28)
+#define DPI_VDMA_IWBUSY (0x30)
+#define DPI_VDMA_CNT (0x38)
+#define DPI_VF_INT(0x100)
+#define DPI_VF_INT_W1S(0x108)
+#define DPI_VF_INT_ENA_W1C (0x110)
+#define DPI_VF_INT_ENA_W1S (0x118)
+
+/**
+ * Enumeration dpi_hdr_xtype_e
+ *
+ * DPI Transfer Type Enumeration
+ * Enumerates the pointer type in DPI_DMA_INSTR_HDR_S[XTYPE].
+ */
+#define DPI_XTYPE_OUTBOUND (0)
+#define DPI_XTYPE_INBOUND (1)
+#define DPI_XTYPE_INTERNAL_ONLY (2)
+#define DPI_XTYPE_EXTERNAL_ONLY (3)
+#define DPI_HDR_XTYPE_MASK 0x3
+
+#define DPI_HDR_PT_ZBW_CA 0x0
+#define DPI_HDR_PT_ZBW_NC 0x1
+#define DPI_HDR_PT_WQP 0x2
+#define DPI_HDR_PT_WQP_NOSTATUS0x0
+#define DPI_HDR_PT_WQP_STATUSCA0x1
+#define DPI_HDR_PT_WQP_STATUSNC0x3
+#define DPI_HDR_PT_CNT 0x3
+#define DPI_HDR_PT_MASK0x3
+
+#define DPI_HDR_TT_MASK0x3
+#define DPI_HDR_GRP_MASK 0x3FF
+#define DPI_HDR_FUNC_MASK 0x
+
+/* Big endian data bit position in DMA local pointer */
+#define DPI_LPTR_BED_BIT_POS (60)
+
+#define DPI_MIN_CMD_SIZE 8
+#define DPI_MAX_CMD_SIZE 64
+
+/**
+ * Structure dpi_instr_hdr_s for CN9K
+ *
+ * DPI DMA Instruction Header Format
+ */
+union dpi_instr_hdr_s {
+ uint64_t u[4];
+ struct dpi_dma_instr_hdr_s_s {
+ uint64_t tag : 32;
+ uint64_t tt : 2;
+ uint64_t grp : 10;
+ uint64_t reserved_44_47 : 4;
+ uint64_t nfst : 4;
+ uint64_t reserved_52_53 : 2;
+ uint64_t nlst : 4;
+ uint64_t reserved_58_63 : 6;
+ /* Word 0 - End */
+ uint64_t aura : 20;
+ uint64_t func : 16;
+ uint64_t pt : 2;
+ uint64_t reserved_102 : 1;
+ uint64_t pvfe : 1;
+ uint64_t fl : 1;
+ uint64_t ii : 1;
+ uint64_t fi : 1;
+ uint64_t ca : 1;
+ uint64_t csel : 1;
+ uint64_t reserved_109_111 : 3;
+ uint64_t xtype : 2;
+ uint64_t reserved_114_119 : 6;
+ uint64_t fport : 2;
+ uint64_t reserved_122_123 : 2;
+ uint64_t lport : 2;
+ uint64_t reserved_126_127 : 2;
+ /* Word 1 - End */
+ uint64_t ptr : 64;
+ /* Word 2 - End */
+ uint64_t reserved_192_255 : 64;
+ /* Word 3 - End */
+ } s;
+};
+
+/**
+ * Structure dpi_cn10k_instr_hdr_s for CN10K
+ *
+ * DPI DMA Instruction Header Format
+ */
+union dpi_cn10k_instr_hdr_s {
+ uint64_t u[4];
+ struct dpi_cn10k_dma_instr_hdr_s_s {
+ uint64_t nfst : 4;
+ uint64_t reserved_4_5 : 2;
+ uint64_t nlst : 4;
+ uint64_t reserved_10_11 : 2;
+ uint64_t pvfe : 1;
+ uint64_t reserved_13 : 1;
+ uint64_t func : 16;
+ uint64_t aura : 20;
+ uint64_t xtype : 2;
+ uint64_t reserved_52_53 : 2;
+ uint64_t pt : 2;
+ uint64_t fpor
[dpdk-dev] [PATCH v2 2/4] dma/cnxk: create and initialize dmadev on pci probe
This patch creates and initializes a dmadev device on pci probe.
Signed-off-by: Radha Mohan Chintakuntla
---
MAINTAINERS| 6 ++
doc/guides/dmadevs/cnxk.rst| 58 +++
doc/guides/dmadevs/index.rst | 1 +
drivers/dma/cnxk/cnxk_dmadev.c | 100 +
drivers/dma/cnxk/cnxk_dmadev.h | 11
drivers/dma/cnxk/meson.build | 7 +++
drivers/dma/meson.build| 1 +
7 files changed, 184 insertions(+)
create mode 100644 doc/guides/dmadevs/cnxk.rst
create mode 100644 drivers/dma/cnxk/cnxk_dmadev.c
create mode 100644 drivers/dma/cnxk/cnxk_dmadev.h
create mode 100644 drivers/dma/cnxk/meson.build
diff --git a/MAINTAINERS b/MAINTAINERS
index be2c9b6815..60560a6a3b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1202,6 +1202,12 @@ M: Conor Walsh
F: drivers/dma/ioat/
F: doc/guides/dmadevs/ioat.rst
+Marvell CNXK DPI DMA
+M: Radha Mohan Chintakuntla
+M: Veerasenareddy Burru
+F: drivers/dma/cnxk/
+F: doc/guides/dmadevs/cnxk.rst
+
RegEx Drivers
-
diff --git a/doc/guides/dmadevs/cnxk.rst b/doc/guides/dmadevs/cnxk.rst
new file mode 100644
index 00..b29bd59a01
--- /dev/null
+++ b/doc/guides/dmadevs/cnxk.rst
@@ -0,0 +1,58 @@
+.. SPDX-License-Identifier: BSD-3-Clause
+Copyright(c) 2021 Marvell International Ltd.
+
+.. include::
+
+CNXK DMA Device Driver
+==
+
+The ``cnxk`` dmadev driver provides a poll-mode driver (PMD) for Marvell DPI
DMA
+Hardware Accelerator block found in OCTEONTX2 and OCTEONTX3 family of SoCs.
Each
+DMA queue is exposed as a VF function when SRIOV is enabled.
+
+The block supports following modes of DMA transfers
+
+#. Internal - DMA within SoC DRAM to DRAM
+
+#. Inbound - Host DRAM to SoC DRAM when SoC is in PCIe Endpoint
+
+#. Outbound - SoC DRAM to Host DRAM when SoC is in PCIe Endpoint
+
+Prerequisites and Compilation procedure
+---
+
+ See :doc:`../platform/cnxk` for setup information.
+
+Device Setup
+-
+The ``dpdk-devbind.py`` script, included with DPDK, can be used to show the
+presence of supported hardware. Running ``dpdk-devbind.py --status-dev dma``
+will show all the CNXK DMA devices.
+
+Devices using VFIO drivers
+~~~
+
+The HW devices to be used will need to be bound to a user-space IO driver for
use.
+The ``dpdk-devbind.py`` script can be used to view the state of the devices
+and to bind them to a suitable DPDK-supported driver, such as ``vfio-pci``.
+For example::
+
+ $ dpdk-devbind.py -b vfio-pci :05:00.1
+
+Device Probing and Initialization
+~~
+
+To use the devices from an application, the dmadev API can be used.
+CNXK DMA device configuration requirements:
+
+* Only one ``vchan`` is supported per device.
+* CNXK DMA devices do not support silent mode.
+
+Once configured, the device can then be made ready for use by calling the
+ ``rte_dma_start()`` API.
+
+Performing Data Copies
+~~~
+
+Refer to the :ref:`Enqueue / Dequeue APIs ` section of
the dmadev library
+documentation for details on operation enqueue and submission API usage.
diff --git a/doc/guides/dmadevs/index.rst b/doc/guides/dmadevs/index.rst
index 20476039a5..227fa00c68 100644
--- a/doc/guides/dmadevs/index.rst
+++ b/doc/guides/dmadevs/index.rst
@@ -11,5 +11,6 @@ an application through DMA API.
:maxdepth: 2
:numbered:
+ cnxk
idxd
ioat
diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
new file mode 100644
index 00..268482677d
--- /dev/null
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -0,0 +1,100 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2021 Marvell International Ltd.
+ */
+
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+static int
+cnxk_dmadev_probe(struct rte_pci_driver *pci_drv __rte_unused,
+ struct rte_pci_device *pci_dev)
+{
+ struct cnxk_dpi_vf_s *dpivf = NULL;
+ char name[RTE_DEV_NAME_MAX_LEN];
+ struct rte_dma_dev *dmadev;
+ struct roc_dpi *rdpi = NULL;
+ int rc;
+
+ if (!pci_dev->mem_resource[0].addr)
+ return -ENODEV;
+
+ rc = roc_plt_init();
+ if (rc) {
+ plt_err("Failed to initialize platform model, rc=%d", rc);
+ return rc;
+ }
+ memset(name, 0, sizeof(name));
+ rte_pci_device_name(&pci_dev->addr, name, sizeof(name));
+
+ dmadev = rte_dma_pmd_allocate(name, pci_dev->device.numa_node,
+ sizeof(*dpivf));
+ if (dmadev == NULL) {
+ plt_err("dma device allocation failed for %s", name);
+ return -ENOMEM;
+ }
+
+ dpivf = dmadev->data->dev_private;
+
+ dmadev->device = &pci_dev->device;
+ dm
[dpdk-dev] [PATCH v2 3/4] dma/cnxk: add dma channel operations
Add functions for the dmadev vchan setup and DMA operations.
Signed-off-by: Radha Mohan Chintakuntla
---
drivers/dma/cnxk/cnxk_dmadev.c | 322 +
drivers/dma/cnxk/cnxk_dmadev.h | 31
drivers/dma/cnxk/version.map | 3 +
3 files changed, 356 insertions(+)
create mode 100644 drivers/dma/cnxk/version.map
diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index 268482677d..9ecd254b76 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -18,6 +18,322 @@
#include
#include
+static int
+cnxk_dmadev_info_get(const struct rte_dma_dev *dev,
+struct rte_dma_info *dev_info, uint32_t size)
+{
+ RTE_SET_USED(dev);
+ RTE_SET_USED(size);
+
+ dev_info->max_vchans = 1;
+ dev_info->nb_vchans = 1;
+ dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |
+ RTE_DMA_CAPA_MEM_TO_DEV | RTE_DMA_CAPA_DEV_TO_MEM |
+ RTE_DMA_CAPA_OPS_COPY;
+ dev_info->max_desc = DPI_MAX_DESC;
+ dev_info->min_desc = 1;
+ dev_info->max_sges = DPI_MAX_POINTER;
+
+ return 0;
+}
+
+static int
+cnxk_dmadev_configure(struct rte_dma_dev *dev,
+ const struct rte_dma_conf *conf, uint32_t conf_sz)
+{
+ struct cnxk_dpi_vf_s *dpivf = NULL;
+ int rc = 0;
+
+ RTE_SET_USED(conf);
+ RTE_SET_USED(conf);
+ RTE_SET_USED(conf_sz);
+ RTE_SET_USED(conf_sz);
+ dpivf = dev->fp_obj->dev_private;
+ rc = roc_dpi_configure(&dpivf->rdpi);
+ if (rc < 0)
+ plt_err("DMA configure failed err = %d", rc);
+
+ return rc;
+}
+
+static int
+cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
+ const struct rte_dma_vchan_conf *conf,
+ uint32_t conf_sz)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+ struct cnxk_dpi_compl_s *comp_data;
+ union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+ int i;
+
+ RTE_SET_USED(vchan);
+ RTE_SET_USED(conf_sz);
+
+ header->s.pt = DPI_HDR_PT_ZBW_CA;
+
+ switch (conf->direction) {
+ case RTE_DMA_DIR_DEV_TO_MEM:
+ header->s.xtype = DPI_XTYPE_INBOUND;
+ header->s.lport = conf->src_port.pcie.coreid;
+ header->s.fport = 0;
+ header->s.pvfe = 1;
+ break;
+ case RTE_DMA_DIR_MEM_TO_DEV:
+ header->s.xtype = DPI_XTYPE_OUTBOUND;
+ header->s.lport = 0;
+ header->s.fport = conf->dst_port.pcie.coreid;
+ header->s.pvfe = 1;
+ break;
+ case RTE_DMA_DIR_MEM_TO_MEM:
+ header->s.xtype = DPI_XTYPE_INTERNAL_ONLY;
+ header->s.lport = 0;
+ header->s.fport = 0;
+ header->s.pvfe = 0;
+ break;
+ case RTE_DMA_DIR_DEV_TO_DEV:
+ header->s.xtype = DPI_XTYPE_EXTERNAL_ONLY;
+ header->s.lport = conf->src_port.pcie.coreid;
+ header->s.fport = conf->dst_port.pcie.coreid;
+ };
+
+ for (i = 0; i < conf->nb_desc; i++) {
+ comp_data = rte_zmalloc(NULL, sizeof(*comp_data), 0);
+ dpivf->conf.c_desc.compl_ptr[i] = comp_data;
+ };
+ dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC;
+ dpivf->conf.c_desc.head = 0;
+ dpivf->conf.c_desc.tail = 0;
+
+ return 0;
+}
+
+static int
+cnxk_dmadev_start(struct rte_dma_dev *dev)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+
+ roc_dpi_enable(&dpivf->rdpi);
+
+ return 0;
+}
+
+static int
+cnxk_dmadev_stop(struct rte_dma_dev *dev)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+
+ roc_dpi_disable(&dpivf->rdpi);
+
+ return 0;
+}
+
+static int
+cnxk_dmadev_close(struct rte_dma_dev *dev)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+
+ roc_dpi_disable(&dpivf->rdpi);
+ roc_dpi_dev_fini(&dpivf->rdpi);
+
+ return 0;
+}
+
+static inline int
+__dpi_queue_write(struct roc_dpi *dpi, uint64_t *cmds, int cmd_count)
+{
+ uint64_t *ptr = dpi->chunk_base;
+
+ if ((cmd_count < DPI_MIN_CMD_SIZE) || (cmd_count > DPI_MAX_CMD_SIZE) ||
+ cmds == NULL)
+ return -EINVAL;
+
+ /*
+* Normally there is plenty of room in the current buffer for the
+* command
+*/
+ if (dpi->chunk_head + cmd_count < dpi->pool_size_m1) {
+ ptr += dpi->chunk_head;
+ dpi->chunk_head += cmd_count;
+ while (cmd_count--)
+ *ptr++ = *cmds++;
+ } else {
+ int count;
+ uint64_t *new_buff = dpi->chunk_
[dpdk-dev] [PATCH v2 4/4] dma/cnxk: add copy_sg function
Add the copy_sg function that will do the multiple DMA transfers of
different sizes and different source/destination as well.
Signed-off-by: Radha Mohan Chintakuntla
---
drivers/dma/cnxk/cnxk_dmadev.c | 68 +-
1 file changed, 67 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index 9ecd254b76..359e00287f 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -29,7 +29,7 @@ cnxk_dmadev_info_get(const struct rte_dma_dev *dev,
dev_info->nb_vchans = 1;
dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |
RTE_DMA_CAPA_MEM_TO_DEV | RTE_DMA_CAPA_DEV_TO_MEM |
- RTE_DMA_CAPA_OPS_COPY;
+ RTE_DMA_CAPA_OPS_COPY | RTE_DMA_CAPA_OPS_COPY_SG;
dev_info->max_desc = DPI_MAX_DESC;
dev_info->min_desc = 1;
dev_info->max_sges = DPI_MAX_POINTER;
@@ -271,6 +271,71 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan,
rte_iova_t src,
return rc;
}
+static int
+cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan,
+ const struct rte_dma_sge *src,
+ const struct rte_dma_sge *dst,
+ uint16_t nb_src, uint16_t nb_dst, uint64_t flags)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev_private;
+ union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+ const struct rte_dma_sge *fptr, *lptr;
+ struct cnxk_dpi_compl_s *comp_ptr;
+ int num_words = 0;
+ int i, rc;
+
+ RTE_SET_USED(vchan);
+
+ comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
+ comp_ptr->cdata = DPI_REQ_CDATA;
+ header->s.ptr = (uint64_t)comp_ptr;
+ STRM_INC(dpivf->conf.c_desc);
+
+ /*
+* For inbound case, src pointers are last pointers.
+* For all other cases, src pointers are first pointers.
+*/
+ if (header->s.xtype == DPI_XTYPE_INBOUND) {
+ header->s.nfst = nb_dst & 0xf;
+ header->s.nlst = nb_src & 0xf;
+ fptr = &dst[0];
+ lptr = &src[0];
+ } else {
+ header->s.nfst = nb_src & 0xf;
+ header->s.nlst = nb_dst & 0xf;
+ fptr = &src[0];
+ lptr = &dst[0];
+ }
+
+ dpivf->cmd[0] = header->u[0];
+ dpivf->cmd[1] = header->u[1];
+ dpivf->cmd[2] = header->u[2];
+ num_words += 4;
+ for (i = 0; i < header->s.nfst; i++) {
+ dpivf->cmd[num_words++] = (uint64_t)fptr->length;
+ dpivf->cmd[num_words++] = fptr->addr;
+ fptr++;
+ }
+
+ for (i = 0; i < header->s.nlst; i++) {
+ dpivf->cmd[num_words++] = (uint64_t)lptr->length;
+ dpivf->cmd[num_words++] = lptr->addr;
+ lptr++;
+ }
+
+ rc = __dpi_queue_write(&dpivf->rdpi, dpivf->cmd, num_words);
+ if (!rc) {
+ if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
+ rte_wmb();
+ plt_write64(num_words,
+ dpivf->rdpi.rbase + DPI_VDMA_DBELL);
+ }
+ dpivf->num_words = num_words;
+ }
+
+ return rc;
+}
+
static uint16_t
cnxk_dmadev_completed(void *dev_private, uint16_t vchan, const uint16_t
nb_cpls,
uint16_t *last_idx, bool *has_error)
@@ -369,6 +434,7 @@ cnxk_dmadev_probe(struct rte_pci_driver *pci_drv
__rte_unused,
dmadev->dev_ops = &cnxk_dmadev_ops;
dmadev->fp_obj->copy = cnxk_dmadev_copy;
+ dmadev->fp_obj->copy_sg = cnxk_dmadev_copy_sg;
dmadev->fp_obj->submit = cnxk_dmadev_submit;
dmadev->fp_obj->completed = cnxk_dmadev_completed;
dmadev->fp_obj->completed_status = cnxk_dmadev_completed_status;
--
2.17.1
[dpdk-dev] [PATCH v3 2/5] dma/cnxk: create and initialize dmadev on pci probe
This patch creates and initializes a dmadev device on pci probe. Signed-off-by: Radha Mohan Chintakuntla --- MAINTAINERS| 6 ++ doc/guides/dmadevs/cnxk.rst| 58 +++ doc/guides/dmadevs/index.rst | 1 + doc/guides/platform/cnxk.rst | 5 +- drivers/dma/cnxk/cnxk_dmadev.c | 100 + drivers/dma/cnxk/cnxk_dmadev.h | 11 drivers/dma/cnxk/meson.build | 7 +++ drivers/dma/meson.build| 1 + 8 files changed, 188 insertions(+), 1 deletion(-) create mode 100644 doc/guides/dmadevs/cnxk.rst create mode 100644 drivers/dma/cnxk/cnxk_dmadev.c create mode 100644 drivers/dma/cnxk/cnxk_dmadev.h create mode 100644 drivers/dma/cnxk/meson.build diff --git a/MAINTAINERS b/MAINTAINERS index be2c9b6815..60560a6a3b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1202,6 +1202,12 @@ M: Conor Walsh F: drivers/dma/ioat/ F: doc/guides/dmadevs/ioat.rst +Marvell CNXK DPI DMA +M: Radha Mohan Chintakuntla +M: Veerasenareddy Burru +F: drivers/dma/cnxk/ +F: doc/guides/dmadevs/cnxk.rst + RegEx Drivers - diff --git a/doc/guides/dmadevs/cnxk.rst b/doc/guides/dmadevs/cnxk.rst new file mode 100644 index 00..b29bd59a01 --- /dev/null +++ b/doc/guides/dmadevs/cnxk.rst @@ -0,0 +1,58 @@ +.. SPDX-License-Identifier: BSD-3-Clause +Copyright(c) 2021 Marvell International Ltd. + +.. include:: + +CNXK DMA Device Driver +== + +The ``cnxk`` dmadev driver provides a poll-mode driver (PMD) for Marvell DPI DMA +Hardware Accelerator block found in OCTEONTX2 and OCTEONTX3 family of SoCs. Each +DMA queue is exposed as a VF function when SRIOV is enabled. + +The block supports following modes of DMA transfers + +#. Internal - DMA within SoC DRAM to DRAM + +#. Inbound - Host DRAM to SoC DRAM when SoC is in PCIe Endpoint + +#. Outbound - SoC DRAM to Host DRAM when SoC is in PCIe Endpoint + +Prerequisites and Compilation procedure +--- + + See :doc:`../platform/cnxk` for setup information. + +Device Setup +- +The ``dpdk-devbind.py`` script, included with DPDK, can be used to show the +presence of supported hardware. Running ``dpdk-devbind.py --status-dev dma`` +will show all the CNXK DMA devices. + +Devices using VFIO drivers +~~~ + +The HW devices to be used will need to be bound to a user-space IO driver for use. +The ``dpdk-devbind.py`` script can be used to view the state of the devices +and to bind them to a suitable DPDK-supported driver, such as ``vfio-pci``. +For example:: + + $ dpdk-devbind.py -b vfio-pci :05:00.1 + +Device Probing and Initialization +~~ + +To use the devices from an application, the dmadev API can be used. +CNXK DMA device configuration requirements: + +* Only one ``vchan`` is supported per device. +* CNXK DMA devices do not support silent mode. + +Once configured, the device can then be made ready for use by calling the + ``rte_dma_start()`` API. + +Performing Data Copies +~~~ + +Refer to the :ref:`Enqueue / Dequeue APIs ` section of the dmadev library +documentation for details on operation enqueue and submission API usage. diff --git a/doc/guides/dmadevs/index.rst b/doc/guides/dmadevs/index.rst index 20476039a5..227fa00c68 100644 --- a/doc/guides/dmadevs/index.rst +++ b/doc/guides/dmadevs/index.rst @@ -11,5 +11,6 @@ an application through DMA API. :maxdepth: 2 :numbered: + cnxk idxd ioat diff --git a/doc/guides/platform/cnxk.rst b/doc/guides/platform/cnxk.rst index d7adf43165..770f5e846b 100644 --- a/doc/guides/platform/cnxk.rst +++ b/doc/guides/platform/cnxk.rst @@ -62,7 +62,7 @@ DPDK subsystem. +---+-+--+ | 7 | LBK | rte_ethdev | +---+-+--+ - | 8 | DPI | rte_rawdev | + | 8 | DPI | rte_dmadev | +---+-+--+ | 9 | SDP | rte_ethdev | +---+-+--+ @@ -151,6 +151,9 @@ This section lists dataplane H/W block(s) available in cnxk SoC. #. **Baseband PHY Driver** See :doc:`../rawdevs/cnxk_bphy` for Baseband PHY driver information. +#. **Dmadev Driver** + See :doc:`../dmadevs/cnxk` for DPI Dmadev driver information. + Procedure to Setup Platform --- diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c new file mode 100644 index 00..268482677d --- /dev/null +++ b/drivers/dma/cnxk/cnxk_dmadev.c @@ -0,0 +1,100 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (C) 2021 Marvell
[dpdk-dev] [PATCH v3 1/5] common/cnxk: add DPI DMA support
Add base support as ROC(Rest of Chip) API which will be used by PMD
dmadev driver.
This patch adds routines to init, fini, configure the DPI DMA device
found in Marvell's CN9k or CN10k SoC families.
Signed-off-by: Radha Mohan Chintakuntla
---
Changes from v2:
- added stats function
- update has_error when error condition happens
- return last_idx in the completed functions
Changes from v1:
- Changed to roc_dpi_enable() from roc_dpi_queue_start()
- Changed to roc_dpi_disable() from roc_dp_queue_stop()
- Moved part of DMA header preparation to vchan_setup() which can save
some CPU cycles in fastpath
drivers/common/cnxk/hw/dpi.h | 141 +
drivers/common/cnxk/meson.build| 1 +
drivers/common/cnxk/roc_api.h | 4 +
drivers/common/cnxk/roc_dpi.c | 193 +
drivers/common/cnxk/roc_dpi.h | 46 +++
drivers/common/cnxk/roc_dpi_priv.h | 40 ++
drivers/common/cnxk/roc_platform.h | 1 +
drivers/common/cnxk/roc_priv.h | 3 +
drivers/common/cnxk/version.map| 5 +
9 files changed, 434 insertions(+)
create mode 100644 drivers/common/cnxk/hw/dpi.h
create mode 100644 drivers/common/cnxk/roc_dpi.c
create mode 100644 drivers/common/cnxk/roc_dpi.h
create mode 100644 drivers/common/cnxk/roc_dpi_priv.h
diff --git a/drivers/common/cnxk/hw/dpi.h b/drivers/common/cnxk/hw/dpi.h
new file mode 100644
index 00..2da123228f
--- /dev/null
+++ b/drivers/common/cnxk/hw/dpi.h
@@ -0,0 +1,141 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2021 Marvell.
+ */
+/**
+ * DPI device HW definitions.
+ */
+#ifndef DEV_DPI_HW_H
+#define DEV_DPI_HW_H
+
+#include
+
+/* DPI VF register offsets from VF_BAR0 */
+#define DPI_VDMA_EN (0x0)
+#define DPI_VDMA_REQQ_CTL (0x8)
+#define DPI_VDMA_DBELL(0x10)
+#define DPI_VDMA_SADDR(0x18)
+#define DPI_VDMA_COUNTS (0x20)
+#define DPI_VDMA_NADDR(0x28)
+#define DPI_VDMA_IWBUSY (0x30)
+#define DPI_VDMA_CNT (0x38)
+#define DPI_VF_INT(0x100)
+#define DPI_VF_INT_W1S(0x108)
+#define DPI_VF_INT_ENA_W1C (0x110)
+#define DPI_VF_INT_ENA_W1S (0x118)
+
+/**
+ * Enumeration dpi_hdr_xtype_e
+ *
+ * DPI Transfer Type Enumeration
+ * Enumerates the pointer type in DPI_DMA_INSTR_HDR_S[XTYPE].
+ */
+#define DPI_XTYPE_OUTBOUND (0)
+#define DPI_XTYPE_INBOUND (1)
+#define DPI_XTYPE_INTERNAL_ONLY (2)
+#define DPI_XTYPE_EXTERNAL_ONLY (3)
+#define DPI_HDR_XTYPE_MASK 0x3
+
+#define DPI_HDR_PT_ZBW_CA 0x0
+#define DPI_HDR_PT_ZBW_NC 0x1
+#define DPI_HDR_PT_WQP 0x2
+#define DPI_HDR_PT_WQP_NOSTATUS0x0
+#define DPI_HDR_PT_WQP_STATUSCA0x1
+#define DPI_HDR_PT_WQP_STATUSNC0x3
+#define DPI_HDR_PT_CNT 0x3
+#define DPI_HDR_PT_MASK0x3
+
+#define DPI_HDR_TT_MASK0x3
+#define DPI_HDR_GRP_MASK 0x3FF
+#define DPI_HDR_FUNC_MASK 0x
+
+/* Big endian data bit position in DMA local pointer */
+#define DPI_LPTR_BED_BIT_POS (60)
+
+#define DPI_MIN_CMD_SIZE 8
+#define DPI_MAX_CMD_SIZE 64
+
+/**
+ * Structure dpi_instr_hdr_s for CN9K
+ *
+ * DPI DMA Instruction Header Format
+ */
+union dpi_instr_hdr_s {
+ uint64_t u[4];
+ struct dpi_dma_instr_hdr_s_s {
+ uint64_t tag : 32;
+ uint64_t tt : 2;
+ uint64_t grp : 10;
+ uint64_t reserved_44_47 : 4;
+ uint64_t nfst : 4;
+ uint64_t reserved_52_53 : 2;
+ uint64_t nlst : 4;
+ uint64_t reserved_58_63 : 6;
+ /* Word 0 - End */
+ uint64_t aura : 20;
+ uint64_t func : 16;
+ uint64_t pt : 2;
+ uint64_t reserved_102 : 1;
+ uint64_t pvfe : 1;
+ uint64_t fl : 1;
+ uint64_t ii : 1;
+ uint64_t fi : 1;
+ uint64_t ca : 1;
+ uint64_t csel : 1;
+ uint64_t reserved_109_111 : 3;
+ uint64_t xtype : 2;
+ uint64_t reserved_114_119 : 6;
+ uint64_t fport : 2;
+ uint64_t reserved_122_123 : 2;
+ uint64_t lport : 2;
+ uint64_t reserved_126_127 : 2;
+ /* Word 1 - End */
+ uint64_t ptr : 64;
+ /* Word 2 - End */
+ uint64_t reserved_192_255 : 64;
+ /* Word 3 - End */
+ } s;
+};
+
+/**
+ * Structure dpi_cn10k_instr_hdr_s for CN10K
+ *
+ * DPI DMA Instruction Header Format
+ */
+union dpi_cn10k_instr_hdr_s {
+ uint64_t u[4];
+ struct dpi_cn10k_dma_instr_hdr_s_s {
+ uint64_t nfst : 4;
+ uint64_t reserved_4_5 : 2;
+ uint64_t nlst : 4;
+ uint64_t reserved_10_11 : 2;
+ uint64_t pvfe : 1;
+ uint64_t reserved_13 : 1;
+ uint64_t func : 16;
+ uint64_t aura : 20;
+ uint64_t xtyp
[dpdk-dev] [PATCH v3 3/5] dma/cnxk: add dma channel operations
Add functions for the dmadev vchan setup and DMA operations.
Signed-off-by: Radha Mohan Chintakuntla
---
drivers/dma/cnxk/cnxk_dmadev.c | 331 +
drivers/dma/cnxk/cnxk_dmadev.h | 32
drivers/dma/cnxk/version.map | 3 +
3 files changed, 366 insertions(+)
create mode 100644 drivers/dma/cnxk/version.map
diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index 268482677d..1738129fa1 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -18,6 +18,331 @@
#include
#include
+static int
+cnxk_dmadev_info_get(const struct rte_dma_dev *dev,
+struct rte_dma_info *dev_info, uint32_t size)
+{
+ RTE_SET_USED(dev);
+ RTE_SET_USED(size);
+
+ dev_info->max_vchans = 1;
+ dev_info->nb_vchans = 1;
+ dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |
+ RTE_DMA_CAPA_MEM_TO_DEV | RTE_DMA_CAPA_DEV_TO_MEM |
+ RTE_DMA_CAPA_DEV_TO_DEV | RTE_DMA_CAPA_OPS_COPY;
+ dev_info->max_desc = DPI_MAX_DESC;
+ dev_info->min_desc = 1;
+ dev_info->max_sges = DPI_MAX_POINTER;
+
+ return 0;
+}
+
+static int
+cnxk_dmadev_configure(struct rte_dma_dev *dev,
+ const struct rte_dma_conf *conf, uint32_t conf_sz)
+{
+ struct cnxk_dpi_vf_s *dpivf = NULL;
+ int rc = 0;
+
+ RTE_SET_USED(conf);
+ RTE_SET_USED(conf);
+ RTE_SET_USED(conf_sz);
+ RTE_SET_USED(conf_sz);
+ dpivf = dev->fp_obj->dev_private;
+ rc = roc_dpi_configure(&dpivf->rdpi);
+ if (rc < 0)
+ plt_err("DMA configure failed err = %d", rc);
+
+ return rc;
+}
+
+static int
+cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
+ const struct rte_dma_vchan_conf *conf,
+ uint32_t conf_sz)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+ struct cnxk_dpi_compl_s *comp_data;
+ union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+ int i;
+
+ RTE_SET_USED(vchan);
+ RTE_SET_USED(conf_sz);
+
+ header->s.pt = DPI_HDR_PT_ZBW_CA;
+
+ switch (conf->direction) {
+ case RTE_DMA_DIR_DEV_TO_MEM:
+ header->s.xtype = DPI_XTYPE_INBOUND;
+ header->s.lport = conf->src_port.pcie.coreid;
+ header->s.fport = 0;
+ header->s.pvfe = 1;
+ break;
+ case RTE_DMA_DIR_MEM_TO_DEV:
+ header->s.xtype = DPI_XTYPE_OUTBOUND;
+ header->s.lport = 0;
+ header->s.fport = conf->dst_port.pcie.coreid;
+ header->s.pvfe = 1;
+ break;
+ case RTE_DMA_DIR_MEM_TO_MEM:
+ header->s.xtype = DPI_XTYPE_INTERNAL_ONLY;
+ header->s.lport = 0;
+ header->s.fport = 0;
+ header->s.pvfe = 0;
+ break;
+ case RTE_DMA_DIR_DEV_TO_DEV:
+ header->s.xtype = DPI_XTYPE_EXTERNAL_ONLY;
+ header->s.lport = conf->src_port.pcie.coreid;
+ header->s.fport = conf->dst_port.pcie.coreid;
+ };
+
+ for (i = 0; i < conf->nb_desc; i++) {
+ comp_data = rte_zmalloc(NULL, sizeof(*comp_data), 0);
+ if (comp_data == NULL) {
+ plt_err("Failed to allocate for comp_data");
+ return -ENOMEM;
+ }
+ dpivf->conf.c_desc.compl_ptr[i] = comp_data;
+ };
+ dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC;
+ dpivf->conf.c_desc.head = 0;
+ dpivf->conf.c_desc.tail = 0;
+
+ return 0;
+}
+
+static int
+cnxk_dmadev_start(struct rte_dma_dev *dev)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+
+ dpivf->desc_idx = 0;
+ dpivf->num_words = 0;
+ roc_dpi_enable(&dpivf->rdpi);
+
+ return 0;
+}
+
+static int
+cnxk_dmadev_stop(struct rte_dma_dev *dev)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+
+ roc_dpi_disable(&dpivf->rdpi);
+
+ return 0;
+}
+
+static int
+cnxk_dmadev_close(struct rte_dma_dev *dev)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+
+ roc_dpi_disable(&dpivf->rdpi);
+ roc_dpi_dev_fini(&dpivf->rdpi);
+
+ return 0;
+}
+
+static inline int
+__dpi_queue_write(struct roc_dpi *dpi, uint64_t *cmds, int cmd_count)
+{
+ uint64_t *ptr = dpi->chunk_base;
+
+ if ((cmd_count < DPI_MIN_CMD_SIZE) || (cmd_count > DPI_MAX_CMD_SIZE) ||
+ cmds == NULL)
+ return -EINVAL;
+
+ /*
+* Normally there is plenty of room in the current buffer for the
+* command
+*/
+ if (dpi->chunk_head + cmd_count < dpi->pool
[dpdk-dev] [PATCH v3 4/5] dma/cnxk: add copy_sg function
Add the copy_sg function that will do the multiple DMA transfers of
different sizes and different source/destination as well.
Signed-off-by: Radha Mohan Chintakuntla
---
drivers/dma/cnxk/cnxk_dmadev.c | 69 +-
1 file changed, 68 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index 1738129fa1..360e92f7ce 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -29,7 +29,8 @@ cnxk_dmadev_info_get(const struct rte_dma_dev *dev,
dev_info->nb_vchans = 1;
dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |
RTE_DMA_CAPA_MEM_TO_DEV | RTE_DMA_CAPA_DEV_TO_MEM |
- RTE_DMA_CAPA_DEV_TO_DEV | RTE_DMA_CAPA_OPS_COPY;
+ RTE_DMA_CAPA_DEV_TO_DEV | RTE_DMA_CAPA_OPS_COPY |
+ RTE_DMA_CAPA_OPS_COPY_SG;
dev_info->max_desc = DPI_MAX_DESC;
dev_info->min_desc = 1;
dev_info->max_sges = DPI_MAX_POINTER;
@@ -277,6 +278,71 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan,
rte_iova_t src,
return dpivf->desc_idx++;
}
+static int
+cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan,
+ const struct rte_dma_sge *src,
+ const struct rte_dma_sge *dst,
+ uint16_t nb_src, uint16_t nb_dst, uint64_t flags)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev_private;
+ union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+ const struct rte_dma_sge *fptr, *lptr;
+ struct cnxk_dpi_compl_s *comp_ptr;
+ int num_words = 0;
+ int i, rc;
+
+ RTE_SET_USED(vchan);
+
+ comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
+ comp_ptr->cdata = DPI_REQ_CDATA;
+ header->s.ptr = (uint64_t)comp_ptr;
+ STRM_INC(dpivf->conf.c_desc);
+
+ /*
+* For inbound case, src pointers are last pointers.
+* For all other cases, src pointers are first pointers.
+*/
+ if (header->s.xtype == DPI_XTYPE_INBOUND) {
+ header->s.nfst = nb_dst & 0xf;
+ header->s.nlst = nb_src & 0xf;
+ fptr = &dst[0];
+ lptr = &src[0];
+ } else {
+ header->s.nfst = nb_src & 0xf;
+ header->s.nlst = nb_dst & 0xf;
+ fptr = &src[0];
+ lptr = &dst[0];
+ }
+
+ dpivf->cmd[0] = header->u[0];
+ dpivf->cmd[1] = header->u[1];
+ dpivf->cmd[2] = header->u[2];
+ num_words += 4;
+ for (i = 0; i < header->s.nfst; i++) {
+ dpivf->cmd[num_words++] = (uint64_t)fptr->length;
+ dpivf->cmd[num_words++] = fptr->addr;
+ fptr++;
+ }
+
+ for (i = 0; i < header->s.nlst; i++) {
+ dpivf->cmd[num_words++] = (uint64_t)lptr->length;
+ dpivf->cmd[num_words++] = lptr->addr;
+ lptr++;
+ }
+
+ rc = __dpi_queue_write(&dpivf->rdpi, dpivf->cmd, num_words);
+ if (!rc) {
+ if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
+ rte_wmb();
+ plt_write64(num_words,
+ dpivf->rdpi.rbase + DPI_VDMA_DBELL);
+ }
+ dpivf->num_words += num_words;
+ }
+
+ return dpivf->desc_idx++;
+}
+
static uint16_t
cnxk_dmadev_completed(void *dev_private, uint16_t vchan, const uint16_t
nb_cpls,
uint16_t *last_idx, bool *has_error)
@@ -378,6 +444,7 @@ cnxk_dmadev_probe(struct rte_pci_driver *pci_drv
__rte_unused,
dmadev->dev_ops = &cnxk_dmadev_ops;
dmadev->fp_obj->copy = cnxk_dmadev_copy;
+ dmadev->fp_obj->copy_sg = cnxk_dmadev_copy_sg;
dmadev->fp_obj->submit = cnxk_dmadev_submit;
dmadev->fp_obj->completed = cnxk_dmadev_completed;
dmadev->fp_obj->completed_status = cnxk_dmadev_completed_status;
--
2.17.1
[dpdk-dev] [PATCH v3 5/5] dma/cnxk: add stats function
Add the stats function to get the DMA statistics.
Signed-off-by: Radha Mohan Chintakuntla
---
drivers/dma/cnxk/cnxk_dmadev.c | 41 --
drivers/dma/cnxk/cnxk_dmadev.h | 1 +
2 files changed, 40 insertions(+), 2 deletions(-)
diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index 360e92f7ce..2824c1b44f 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -271,6 +271,7 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan,
rte_iova_t src,
rte_wmb();
plt_write64(num_words,
dpivf->rdpi.rbase + DPI_VDMA_DBELL);
+ dpivf->stats.submitted++;
}
dpivf->num_words += num_words;
}
@@ -336,6 +337,7 @@ cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan,
rte_wmb();
plt_write64(num_words,
dpivf->rdpi.rbase + DPI_VDMA_DBELL);
+ dpivf->stats.submitted += nb_src;
}
dpivf->num_words += num_words;
}
@@ -357,12 +359,14 @@ cnxk_dmadev_completed(void *dev_private, uint16_t vchan,
const uint16_t nb_cpls,
if (comp_ptr->cdata) {
*has_error = 1;
+ dpivf->stats.errors++;
break;
}
}
*last_idx = cnt - 1;
dpivf->conf.c_desc.tail = cnt;
+ dpivf->stats.completed += cnt;
return cnt;
}
@@ -381,10 +385,13 @@ cnxk_dmadev_completed_status(void *dev_private, uint16_t
vchan,
struct cnxk_dpi_compl_s *comp_ptr =
dpivf->conf.c_desc.compl_ptr[cnt];
status[cnt] = comp_ptr->cdata;
+ if (comp_ptr->cdata)
+ dpivf->stats.errors++;
}
*last_idx = cnt - 1;
dpivf->conf.c_desc.tail = 0;
+ dpivf->stats.completed += cnt;
return cnt;
}
@@ -396,17 +403,47 @@ cnxk_dmadev_submit(void *dev_private, uint16_t vchan
__rte_unused)
rte_wmb();
plt_write64(dpivf->num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL);
+ dpivf->stats.submitted++;
return 0;
}
+static int
+cnxk_stats_get(const struct rte_dma_dev *dev, uint16_t vchan,
+ struct rte_dma_stats *rte_stats, uint32_t size)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+ struct rte_dma_stats *stats = &dpivf->stats;
+
+ RTE_SET_USED(vchan);
+
+ if (size < sizeof(rte_stats))
+ return -EINVAL;
+ if (rte_stats == NULL)
+ return -EINVAL;
+
+ *rte_stats = *stats;
+ return 0;
+}
+
+static int
+cnxk_stats_reset(struct rte_dma_dev *dev, uint16_t vchan __rte_unused)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+
+ dpivf->stats = (struct rte_dma_stats){0};
+ return 0;
+}
+
static const struct rte_dma_dev_ops cnxk_dmadev_ops = {
- .dev_info_get = cnxk_dmadev_info_get,
+ .dev_close = cnxk_dmadev_close,
.dev_configure = cnxk_dmadev_configure,
+ .dev_info_get = cnxk_dmadev_info_get,
.dev_start = cnxk_dmadev_start,
.dev_stop = cnxk_dmadev_stop,
+ .stats_get = cnxk_stats_get,
+ .stats_reset = cnxk_stats_reset,
.vchan_setup = cnxk_dmadev_vchan_setup,
- .dev_close = cnxk_dmadev_close,
};
static int
diff --git a/drivers/dma/cnxk/cnxk_dmadev.h b/drivers/dma/cnxk/cnxk_dmadev.h
index eb94ff8ec7..5fc241b55e 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.h
+++ b/drivers/dma/cnxk/cnxk_dmadev.h
@@ -35,6 +35,7 @@ struct cnxk_dpi_conf {
struct cnxk_dpi_vf_s {
struct roc_dpi rdpi;
struct cnxk_dpi_conf conf;
+ struct rte_dma_stats stats;
uint64_t cmd[DPI_MAX_CMD_SIZE];
uint32_t num_words;
uint16_t desc_idx;
--
2.17.1
[dpdk-dev] [PATCH] usertools/devbind: update octeontx2 DMA device
The octeontx2_dma rawdev driver is removed in DPDK-21.11. The new driver
for the same device uses the dmadev. So this patch updates the device
naming and lists it under dma devices section.
Signed-off-by: Radha Mohan Chintakuntla
---
usertools/dpdk-devbind.py | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/usertools/dpdk-devbind.py b/usertools/dpdk-devbind.py
index af9a0ad5ab..e298ad5f75 100755
--- a/usertools/dpdk-devbind.py
+++ b/usertools/dpdk-devbind.py
@@ -41,8 +41,8 @@
'SVendor': None, 'SDevice': None}
octeontx2_npa = {'Class': '08', 'Vendor': '177d', 'Device': 'a0fb,a0fc',
'SVendor': None, 'SDevice': None}
-octeontx2_dma = {'Class': '08', 'Vendor': '177d', 'Device': 'a081',
- 'SVendor': None, 'SDevice': None}
+cnxk_dma = {'Class': '08', 'Vendor': '177d', 'Device': 'a081',
+'SVendor': None, 'SDevice': None}
octeontx2_ree = {'Class': '08', 'Vendor': '177d', 'Device': 'a0f4',
'SVendor': None, 'SDevice': None}
cnxk_bphy = {'Class': '08', 'Vendor': '177d', 'Device': 'a089',
@@ -75,13 +75,14 @@
baseband_devices = [acceleration_class]
crypto_devices = [encryption_class, intel_processor_class]
dma_devices = [hisilicon_dma,
- intel_idxd_spr, intel_ioat_bdw, intel_ioat_icx, intel_ioat_skx]
+ intel_idxd_spr, intel_ioat_bdw, intel_ioat_icx, intel_ioat_skx,
+ cnxk_dma]
eventdev_devices = [cavium_sso, cavium_tim, intel_dlb, octeontx2_sso]
mempool_devices = [cavium_fpa, octeontx2_npa]
compress_devices = [cavium_zip]
regex_devices = [octeontx2_ree]
-misc_devices = [cnxk_bphy, cnxk_bphy_cgx, cnxk_inl_dev, intel_ntb_skx,
-intel_ntb_icx, octeontx2_dma]
+misc_devices = [cnxk_bphy, cnxk_bphy_cgx, cnxk_inl_dev,
+intel_ntb_skx, intel_ntb_icx]
# global dict ethernet devices present. Dictionary indexed by PCI address.
# Each device within this is itself a dictionary of device properties
--
2.17.1
[dpdk-dev] [PATCH v2] usertools/devbind: update octeontx2 DMA device
The octeontx2_dma rawdev driver is removed in DPDK-21.11. The new driver
for the same device uses the dmadev. So this patch updates the device
naming and lists it under dma devices section.
Signed-off-by: Radha Mohan Chintakuntla
---
Changes from v1:
- Sort the names alphabetically
usertools/dpdk-devbind.py | 24 +---
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/usertools/dpdk-devbind.py b/usertools/dpdk-devbind.py
index af9a0ad5ab..c8874066f7 100755
--- a/usertools/dpdk-devbind.py
+++ b/usertools/dpdk-devbind.py
@@ -37,18 +37,12 @@
avp_vnic = {'Class': '05', 'Vendor': '1af4', 'Device': '1110',
'SVendor': None, 'SDevice': None}
-octeontx2_sso = {'Class': '08', 'Vendor': '177d', 'Device': 'a0f9,a0fa',
- 'SVendor': None, 'SDevice': None}
-octeontx2_npa = {'Class': '08', 'Vendor': '177d', 'Device': 'a0fb,a0fc',
- 'SVendor': None, 'SDevice': None}
-octeontx2_dma = {'Class': '08', 'Vendor': '177d', 'Device': 'a081',
- 'SVendor': None, 'SDevice': None}
-octeontx2_ree = {'Class': '08', 'Vendor': '177d', 'Device': 'a0f4',
- 'SVendor': None, 'SDevice': None}
cnxk_bphy = {'Class': '08', 'Vendor': '177d', 'Device': 'a089',
'SVendor': None, 'SDevice': None}
cnxk_bphy_cgx = {'Class': '08', 'Vendor': '177d', 'Device': 'a059,a060',
'SVendor': None, 'SDevice': None}
+cnxk_dma = {'Class': '08', 'Vendor': '177d', 'Device': 'a081',
+'SVendor': None, 'SDevice': None}
cnxk_inl_dev = {'Class': '08', 'Vendor': '177d', 'Device': 'a0f0,a0f1',
'SVendor': None, 'SDevice': None}
@@ -71,17 +65,25 @@
intel_ntb_icx = {'Class': '06', 'Vendor': '8086', 'Device': '347e',
'SVendor': None, 'SDevice': None}
+octeontx2_sso = {'Class': '08', 'Vendor': '177d', 'Device': 'a0f9,a0fa',
+ 'SVendor': None, 'SDevice': None}
+octeontx2_npa = {'Class': '08', 'Vendor': '177d', 'Device': 'a0fb,a0fc',
+ 'SVendor': None, 'SDevice': None}
+octeontx2_ree = {'Class': '08', 'Vendor': '177d', 'Device': 'a0f4',
+ 'SVendor': None, 'SDevice': None}
+
network_devices = [network_class, cavium_pkx, avp_vnic, ifpga_class]
baseband_devices = [acceleration_class]
crypto_devices = [encryption_class, intel_processor_class]
-dma_devices = [hisilicon_dma,
+dma_devices = [cnxk_dma,
+ hisilicon_dma,
intel_idxd_spr, intel_ioat_bdw, intel_ioat_icx, intel_ioat_skx]
eventdev_devices = [cavium_sso, cavium_tim, intel_dlb, octeontx2_sso]
mempool_devices = [cavium_fpa, octeontx2_npa]
compress_devices = [cavium_zip]
regex_devices = [octeontx2_ree]
-misc_devices = [cnxk_bphy, cnxk_bphy_cgx, cnxk_inl_dev, intel_ntb_skx,
-intel_ntb_icx, octeontx2_dma]
+misc_devices = [cnxk_bphy, cnxk_bphy_cgx, cnxk_inl_dev,
+intel_ntb_skx, intel_ntb_icx]
# global dict ethernet devices present. Dictionary indexed by PCI address.
# Each device within this is itself a dictionary of device properties
--
2.17.1
[dpdk-dev] [PATCH 1/2] drivers/raw: remove octeontx2-dma driver
Removing the rawdev based octeontx2-dma driver as the dependent
common/octeontx2 will be soon be going away. Also a new DMA driver will
be coming in this place once the rte_dmadev library is in.
Signed-off-by: Radha Mohan Chintakuntla
---
MAINTAINERS | 6 -
doc/guides/rawdevs/octeontx2_dma.rst| 103 -
drivers/raw/meson.build | 1 -
drivers/raw/octeontx2_dma/meson.build | 18 -
drivers/raw/octeontx2_dma/otx2_dpi_msg.c| 105 -
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 441
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 197 -
drivers/raw/octeontx2_dma/otx2_dpi_test.c | 218 --
drivers/raw/octeontx2_dma/version.map | 3 -
9 files changed, 1092 deletions(-)
delete mode 100644 doc/guides/rawdevs/octeontx2_dma.rst
delete mode 100644 drivers/raw/octeontx2_dma/meson.build
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_msg.c
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_test.c
delete mode 100644 drivers/raw/octeontx2_dma/version.map
diff --git a/MAINTAINERS b/MAINTAINERS
index 266f5ac1da..9f9aa37c68 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1321,12 +1321,6 @@ M: Tomasz Duszynski
F: doc/guides/rawdevs/cnxk_bphy.rst
F: drivers/raw/cnxk_bphy/
-Marvell OCTEON TX2 DMA
-M: Radha Mohan Chintakuntla
-M: Veerasenareddy Burru
-F: drivers/raw/octeontx2_dma/
-F: doc/guides/rawdevs/octeontx2_dma.rst
-
Marvell OCTEON TX2 EP
M: Radha Mohan Chintakuntla
M: Veerasenareddy Burru
diff --git a/doc/guides/rawdevs/octeontx2_dma.rst
b/doc/guides/rawdevs/octeontx2_dma.rst
deleted file mode 100644
index 6887da5278..00
--- a/doc/guides/rawdevs/octeontx2_dma.rst
+++ /dev/null
@@ -1,103 +0,0 @@
-.. SPDX-License-Identifier: BSD-3-Clause
-Copyright(c) 2019 Marvell International Ltd.
-
-OCTEON TX2 DMA Driver
-=
-
-OCTEON TX2 has an internal DMA unit which can be used by applications to
initiate
-DMA transaction internally, from/to host when OCTEON TX2 operates in PCIe End
-Point mode. The DMA PF function supports 8 VFs corresponding to 8 DMA queues.
-Each DMA queue was exposed as a VF function when SRIOV enabled.
-
-Features
-
-
-This DMA PMD supports below 3 modes of memory transfers
-
-#. Internal - OCTEON TX2 DRAM to DRAM without core intervention
-
-#. Inbound - Host DRAM to OCTEON TX2 DRAM without host/OCTEON TX2 cores
involvement
-
-#. Outbound - OCTEON TX2 DRAM to Host DRAM without host/OCTEON TX2 cores
involvement
-
-Prerequisites and Compilation procedure
-
- See :doc:`../platform/octeontx2` for setup information.
-
-
-Enabling logs
--
-
-For enabling logs, use the following EAL parameter:
-
-.. code-block:: console
-
- ./your_dma_application --log-level=pmd.raw.octeontx2.dpi,
-
-Using ``pmd.raw.octeontx2.dpi`` as log matching criteria, all Event PMD logs
-can be enabled which are lower than logging ``level``.
-
-Initialization
---
-
-The number of DMA VFs (queues) enabled can be controlled by setting sysfs
-entry, `sriov_numvfs` for the corresponding PF driver.
-
-.. code-block:: console
-
- echo >
/sys/bus/pci/drivers/octeontx2-dpi/\:05\:00.0/sriov_numvfs
-
-Once the required VFs are enabled, to be accessible from DPDK, VFs need to be
-bound to vfio-pci driver.
-
-Device Setup
--
-
-The OCTEON TX2 DPI DMA HW devices will need to be bound to a
-user-space IO driver for use. The script ``dpdk-devbind.py`` script
-included with DPDK can be used to view the state of the devices and to bind
-them to a suitable DPDK-supported kernel driver. When querying the status
-of the devices, they will appear under the category of "Misc (rawdev)
-devices", i.e. the command ``dpdk-devbind.py --status-dev misc`` can be
-used to see the state of those devices alone.
-
-Device Configuration
-
-
-Configuring DMA rawdev device is done using the ``rte_rawdev_configure()``
-API, which takes the mempool as parameter. PMD uses this pool to submit DMA
-commands to HW.
-
-The following code shows how the device is configured
-
-.. code-block:: c
-
- struct dpi_rawdev_conf_s conf = {0};
- struct rte_rawdev_info rdev_info = {.dev_private = &conf};
-
- conf.chunk_pool = (void *)rte_mempool_create_empty(...);
- rte_mempool_set_ops_byname(conf.chunk_pool,
rte_mbuf_platform_mempool_ops(), NULL);
- rte_mempool_populate_default(conf.chunk_pool);
-
- rte_rawdev_configure(dev_id, (rte_rawdev_obj_t)&rdev_info, sizeof(conf));
-
-Performing Data Transfer
-
-
-To perform data transfer using OCTEON TX2 DMA rawdev devices use standard
-``rte_rawdev_enqueue_buffers()`` and ``rte_rawdev_dequeue_buffers()`` APIs.
-
-Self test
--
-
-On EAL initialization, dma devic
[dpdk-dev] [PATCH 2/2] drivers/raw: remove octeontx2-ep driver
Removing the rawdev based octeontx2-ep driver as the dependent
common/octeontx2 will soon be going away. Moreover this driver is no
longer required as the net/octeontx_ep driver is sufficient.
Signed-off-by: Radha Mohan Chintakuntla
---
MAINTAINERS | 6 -
doc/guides/rawdevs/octeontx2_ep.rst | 82 ---
drivers/raw/meson.build | 1 -
drivers/raw/octeontx2_ep/meson.build | 11 -
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c | 846 --
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h | 52 --
drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 362 -
drivers/raw/octeontx2_ep/otx2_ep_rawdev.h | 499 -
drivers/raw/octeontx2_ep/otx2_ep_test.c | 172 -
drivers/raw/octeontx2_ep/otx2_ep_vf.c | 475
drivers/raw/octeontx2_ep/otx2_ep_vf.h | 10 -
drivers/raw/octeontx2_ep/version.map | 3 -
12 files changed, 2519 deletions(-)
delete mode 100644 doc/guides/rawdevs/octeontx2_ep.rst
delete mode 100644 drivers/raw/octeontx2_ep/meson.build
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_test.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.h
delete mode 100644 drivers/raw/octeontx2_ep/version.map
diff --git a/MAINTAINERS b/MAINTAINERS
index 9f9aa37c68..1d6a408f49 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1321,12 +1321,6 @@ M: Tomasz Duszynski
F: doc/guides/rawdevs/cnxk_bphy.rst
F: drivers/raw/cnxk_bphy/
-Marvell OCTEON TX2 EP
-M: Radha Mohan Chintakuntla
-M: Veerasenareddy Burru
-F: drivers/raw/octeontx2_ep/
-F: doc/guides/rawdevs/octeontx2_ep.rst
-
NTB
M: Xiaoyun Li
M: Jingjing Wu
diff --git a/doc/guides/rawdevs/octeontx2_ep.rst
b/doc/guides/rawdevs/octeontx2_ep.rst
deleted file mode 100644
index fb9d346ccf..00
--- a/doc/guides/rawdevs/octeontx2_ep.rst
+++ /dev/null
@@ -1,82 +0,0 @@
-.. SPDX-License-Identifier: BSD-3-Clause
-Copyright(c) 2019 Marvell International Ltd.
-
-Marvell OCTEON TX2 End Point Rawdev Driver
-==
-
-OCTEON TX2 has an internal SDP unit which provides End Point mode of operation
-by exposing its IOQs to Host, IOQs are used for packet I/O between Host and
-OCTEON TX2. Each OCTEON TX2 SDP PF supports a max of 128 VFs and Each VF is
-associated with a set of IOQ pairs.
-
-Features
-
-
-This OCTEON TX2 End Point mode PMD supports
-
-#. Packet Input - Host to OCTEON TX2 with direct data instruction mode.
-
-#. Packet Output - OCTEON TX2 to Host with info pointer mode.
-
-
-Initialization
---
-
-The number of SDP VFs enabled, can be controlled by setting sysfs
-entry `sriov_numvfs` for the corresponding PF driver.
-
-.. code-block:: console
-
- echo > /sys/bus/pci/drivers/octeontx2-ep/\:04\:00.0/sriov_numvfs
-
-Once the required VFs are enabled, to be accessible from DPDK, VFs need to be
-bound to vfio-pci driver.
-
-Device Setup
-
-
-The OCTEON TX2 SDP End Point VF devices will need to be bound to a
-user-space IO driver for use. The script ``dpdk-devbind.py`` script
-included with DPDK can be used to view the state of the devices and to bind
-them to a suitable DPDK-supported kernel driver. When querying the status
-of the devices, they will appear under the category of "Misc (rawdev)
-devices", i.e. the command ``dpdk-devbind.py --status-dev misc`` can be
-used to see the state of those devices alone.
-
-Device Configuration
-
-
-Configuring SDP EP rawdev device is done using the ``rte_rawdev_configure()``
-API, which takes the mempool as parameter. PMD uses this pool to send/receive
-packets to/from the HW.
-
-The following code shows how the device is configured
-
-.. code-block:: c
-
- struct sdp_rawdev_info config = {0};
- struct rte_rawdev_info rdev_info = {.dev_private = &config};
- config.enqdeq_mpool = (void *)rte_mempool_create(...);
-
- rte_rawdev_configure(dev_id, (rte_rawdev_obj_t)&rdev_info,
-sizeof(config));
-
-Performing Data Transfer
-
-
-To perform data transfer using SDP VF EP rawdev devices use standard
-``rte_rawdev_enqueue_buffers()`` and ``rte_rawdev_dequeue_buffers()`` APIs.
-
-Self test
--
-
-On EAL initialization, SDP VF devices will be probed and populated into the
-raw devices. The rawdev ID of the device can be obtained using
-
-* Invoke ``rte_rawdev_get_dev_id("SDPEP:x")`` from the test application
- where x is the VF device's bus id specified in "bus:device.func"(BDF)
- format. Use this index for further rawdev function calls.
-
-* The driver's selftest rawdev API can be used to verify the SDP EP
[dpdk-dev] [PATCH v2 1/2] drivers/raw: remove octeontx2-dma driver
Removing the rawdev based octeontx2-dma driver as the dependent
common/octeontx2 will be soon be going away. Also a new DMA driver will
be coming in this place once the rte_dmadev library is in.
Signed-off-by: Radha Mohan Chintakuntla
---
Changes from v1:
Fixed compilation issues in documentation
MAINTAINERS | 6 -
doc/guides/rawdevs/index.rst| 1 -
doc/guides/rawdevs/octeontx2_dma.rst| 103 -
drivers/raw/meson.build | 1 -
drivers/raw/octeontx2_dma/meson.build | 18 -
drivers/raw/octeontx2_dma/otx2_dpi_msg.c| 105 -
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 441
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 197 -
drivers/raw/octeontx2_dma/otx2_dpi_test.c | 218 --
drivers/raw/octeontx2_dma/version.map | 3 -
10 files changed, 1093 deletions(-)
delete mode 100644 doc/guides/rawdevs/octeontx2_dma.rst
delete mode 100644 drivers/raw/octeontx2_dma/meson.build
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_msg.c
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_test.c
delete mode 100644 drivers/raw/octeontx2_dma/version.map
diff --git a/MAINTAINERS b/MAINTAINERS
index 266f5ac1da..9f9aa37c68 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1321,12 +1321,6 @@ M: Tomasz Duszynski
F: doc/guides/rawdevs/cnxk_bphy.rst
F: drivers/raw/cnxk_bphy/
-Marvell OCTEON TX2 DMA
-M: Radha Mohan Chintakuntla
-M: Veerasenareddy Burru
-F: drivers/raw/octeontx2_dma/
-F: doc/guides/rawdevs/octeontx2_dma.rst
-
Marvell OCTEON TX2 EP
M: Radha Mohan Chintakuntla
M: Veerasenareddy Burru
diff --git a/doc/guides/rawdevs/index.rst b/doc/guides/rawdevs/index.rst
index 7fbae40ea9..228d4a7743 100644
--- a/doc/guides/rawdevs/index.rst
+++ b/doc/guides/rawdevs/index.rst
@@ -17,5 +17,4 @@ application through rawdev API.
ifpga
ioat
ntb
-octeontx2_dma
octeontx2_ep
diff --git a/doc/guides/rawdevs/octeontx2_dma.rst
b/doc/guides/rawdevs/octeontx2_dma.rst
deleted file mode 100644
index 6887da5278..00
--- a/doc/guides/rawdevs/octeontx2_dma.rst
+++ /dev/null
@@ -1,103 +0,0 @@
-.. SPDX-License-Identifier: BSD-3-Clause
-Copyright(c) 2019 Marvell International Ltd.
-
-OCTEON TX2 DMA Driver
-=
-
-OCTEON TX2 has an internal DMA unit which can be used by applications to
initiate
-DMA transaction internally, from/to host when OCTEON TX2 operates in PCIe End
-Point mode. The DMA PF function supports 8 VFs corresponding to 8 DMA queues.
-Each DMA queue was exposed as a VF function when SRIOV enabled.
-
-Features
-
-
-This DMA PMD supports below 3 modes of memory transfers
-
-#. Internal - OCTEON TX2 DRAM to DRAM without core intervention
-
-#. Inbound - Host DRAM to OCTEON TX2 DRAM without host/OCTEON TX2 cores
involvement
-
-#. Outbound - OCTEON TX2 DRAM to Host DRAM without host/OCTEON TX2 cores
involvement
-
-Prerequisites and Compilation procedure
-
- See :doc:`../platform/octeontx2` for setup information.
-
-
-Enabling logs
--
-
-For enabling logs, use the following EAL parameter:
-
-.. code-block:: console
-
- ./your_dma_application --log-level=pmd.raw.octeontx2.dpi,
-
-Using ``pmd.raw.octeontx2.dpi`` as log matching criteria, all Event PMD logs
-can be enabled which are lower than logging ``level``.
-
-Initialization
---
-
-The number of DMA VFs (queues) enabled can be controlled by setting sysfs
-entry, `sriov_numvfs` for the corresponding PF driver.
-
-.. code-block:: console
-
- echo >
/sys/bus/pci/drivers/octeontx2-dpi/\:05\:00.0/sriov_numvfs
-
-Once the required VFs are enabled, to be accessible from DPDK, VFs need to be
-bound to vfio-pci driver.
-
-Device Setup
--
-
-The OCTEON TX2 DPI DMA HW devices will need to be bound to a
-user-space IO driver for use. The script ``dpdk-devbind.py`` script
-included with DPDK can be used to view the state of the devices and to bind
-them to a suitable DPDK-supported kernel driver. When querying the status
-of the devices, they will appear under the category of "Misc (rawdev)
-devices", i.e. the command ``dpdk-devbind.py --status-dev misc`` can be
-used to see the state of those devices alone.
-
-Device Configuration
-
-
-Configuring DMA rawdev device is done using the ``rte_rawdev_configure()``
-API, which takes the mempool as parameter. PMD uses this pool to submit DMA
-commands to HW.
-
-The following code shows how the device is configured
-
-.. code-block:: c
-
- struct dpi_rawdev_conf_s conf = {0};
- struct rte_rawdev_info rdev_info = {.dev_private = &conf};
-
- conf.chunk_pool = (void *)rte_mempool_create_empty(...);
- rte_mempool_set_ops_byname(conf.chunk_pool,
rte_mbuf_platform_me
[dpdk-dev] [PATCH v2 2/2] drivers/raw: remove octeontx2-ep driver
Removing the rawdev based octeontx2-ep driver as the dependent
common/octeontx2 will soon be going away. Moreover this driver is no
longer required as the net/octeontx_ep driver is sufficient.
Signed-off-by: Radha Mohan Chintakuntla
---
Changes from v1:
Fixed compilation issues in documentation
MAINTAINERS | 6 -
doc/guides/rawdevs/index.rst | 1 -
doc/guides/rawdevs/octeontx2_ep.rst | 82 ---
drivers/raw/meson.build | 1 -
drivers/raw/octeontx2_ep/meson.build | 11 -
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c | 846 --
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h | 52 --
drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 362 -
drivers/raw/octeontx2_ep/otx2_ep_rawdev.h | 499 -
drivers/raw/octeontx2_ep/otx2_ep_test.c | 172 -
drivers/raw/octeontx2_ep/otx2_ep_vf.c | 475
drivers/raw/octeontx2_ep/otx2_ep_vf.h | 10 -
drivers/raw/octeontx2_ep/version.map | 3 -
13 files changed, 2520 deletions(-)
delete mode 100644 doc/guides/rawdevs/octeontx2_ep.rst
delete mode 100644 drivers/raw/octeontx2_ep/meson.build
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_test.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.h
delete mode 100644 drivers/raw/octeontx2_ep/version.map
diff --git a/MAINTAINERS b/MAINTAINERS
index 9f9aa37c68..1d6a408f49 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1321,12 +1321,6 @@ M: Tomasz Duszynski
F: doc/guides/rawdevs/cnxk_bphy.rst
F: drivers/raw/cnxk_bphy/
-Marvell OCTEON TX2 EP
-M: Radha Mohan Chintakuntla
-M: Veerasenareddy Burru
-F: drivers/raw/octeontx2_ep/
-F: doc/guides/rawdevs/octeontx2_ep.rst
-
NTB
M: Xiaoyun Li
M: Jingjing Wu
diff --git a/doc/guides/rawdevs/index.rst b/doc/guides/rawdevs/index.rst
index 228d4a7743..b6cf917443 100644
--- a/doc/guides/rawdevs/index.rst
+++ b/doc/guides/rawdevs/index.rst
@@ -17,4 +17,3 @@ application through rawdev API.
ifpga
ioat
ntb
-octeontx2_ep
diff --git a/doc/guides/rawdevs/octeontx2_ep.rst
b/doc/guides/rawdevs/octeontx2_ep.rst
deleted file mode 100644
index fb9d346ccf..00
--- a/doc/guides/rawdevs/octeontx2_ep.rst
+++ /dev/null
@@ -1,82 +0,0 @@
-.. SPDX-License-Identifier: BSD-3-Clause
-Copyright(c) 2019 Marvell International Ltd.
-
-Marvell OCTEON TX2 End Point Rawdev Driver
-==
-
-OCTEON TX2 has an internal SDP unit which provides End Point mode of operation
-by exposing its IOQs to Host, IOQs are used for packet I/O between Host and
-OCTEON TX2. Each OCTEON TX2 SDP PF supports a max of 128 VFs and Each VF is
-associated with a set of IOQ pairs.
-
-Features
-
-
-This OCTEON TX2 End Point mode PMD supports
-
-#. Packet Input - Host to OCTEON TX2 with direct data instruction mode.
-
-#. Packet Output - OCTEON TX2 to Host with info pointer mode.
-
-
-Initialization
---
-
-The number of SDP VFs enabled, can be controlled by setting sysfs
-entry `sriov_numvfs` for the corresponding PF driver.
-
-.. code-block:: console
-
- echo > /sys/bus/pci/drivers/octeontx2-ep/\:04\:00.0/sriov_numvfs
-
-Once the required VFs are enabled, to be accessible from DPDK, VFs need to be
-bound to vfio-pci driver.
-
-Device Setup
-
-
-The OCTEON TX2 SDP End Point VF devices will need to be bound to a
-user-space IO driver for use. The script ``dpdk-devbind.py`` script
-included with DPDK can be used to view the state of the devices and to bind
-them to a suitable DPDK-supported kernel driver. When querying the status
-of the devices, they will appear under the category of "Misc (rawdev)
-devices", i.e. the command ``dpdk-devbind.py --status-dev misc`` can be
-used to see the state of those devices alone.
-
-Device Configuration
-
-
-Configuring SDP EP rawdev device is done using the ``rte_rawdev_configure()``
-API, which takes the mempool as parameter. PMD uses this pool to send/receive
-packets to/from the HW.
-
-The following code shows how the device is configured
-
-.. code-block:: c
-
- struct sdp_rawdev_info config = {0};
- struct rte_rawdev_info rdev_info = {.dev_private = &config};
- config.enqdeq_mpool = (void *)rte_mempool_create(...);
-
- rte_rawdev_configure(dev_id, (rte_rawdev_obj_t)&rdev_info,
-sizeof(config));
-
-Performing Data Transfer
-
-
-To perform data transfer using SDP VF EP rawdev devices use standard
-``rte_rawdev_enqueue_buffers()`` and ``rte_rawdev_dequeue_buffers()`` APIs.
-
-Self test
--
-
-On EAL initialization, SDP VF devices will be probed and po
[dpdk-dev] [PATCH v3 1/2] drivers/raw: remove octeontx2-dma driver
Removing the rawdev based octeontx2-dma driver as the dependent common/octeontx2 will be soon be going away. Also a new DMA driver will be coming in this place once the rte_dmadev library is in. Signed-off-by: Radha Mohan Chintakuntla --- Changes from v2: Fixed DPDK CI reported issues for more documentation failure. Changes from v1: Fixed compilation issues in documentation MAINTAINERS | 6 - doc/guides/platform/octeontx2.rst | 3 - doc/guides/rawdevs/index.rst| 1 - doc/guides/rawdevs/octeontx2_dma.rst| 103 - drivers/raw/meson.build | 1 - drivers/raw/octeontx2_dma/meson.build | 18 - drivers/raw/octeontx2_dma/otx2_dpi_msg.c| 105 - drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 441 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 197 - drivers/raw/octeontx2_dma/otx2_dpi_test.c | 218 -- drivers/raw/octeontx2_dma/version.map | 3 - 11 files changed, 1096 deletions(-) delete mode 100644 doc/guides/rawdevs/octeontx2_dma.rst delete mode 100644 drivers/raw/octeontx2_dma/meson.build delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_msg.c delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_test.c delete mode 100644 drivers/raw/octeontx2_dma/version.map diff --git a/MAINTAINERS b/MAINTAINERS index 266f5ac1da..9f9aa37c68 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1321,12 +1321,6 @@ M: Tomasz Duszynski F: doc/guides/rawdevs/cnxk_bphy.rst F: drivers/raw/cnxk_bphy/ -Marvell OCTEON TX2 DMA -M: Radha Mohan Chintakuntla -M: Veerasenareddy Burru -F: drivers/raw/octeontx2_dma/ -F: doc/guides/rawdevs/octeontx2_dma.rst - Marvell OCTEON TX2 EP M: Radha Mohan Chintakuntla M: Veerasenareddy Burru diff --git a/doc/guides/platform/octeontx2.rst b/doc/guides/platform/octeontx2.rst index 8b5991f03b..3a3d28571c 100644 --- a/doc/guides/platform/octeontx2.rst +++ b/doc/guides/platform/octeontx2.rst @@ -152,9 +152,6 @@ This section lists dataplane H/W block(s) available in OCTEON TX2 SoC. #. **Event Device Driver** See :doc:`../eventdevs/octeontx2` for SSO event device driver information. -#. **DMA Rawdev Driver** - See :doc:`../rawdevs/octeontx2_dma` for DMA driver information. - #. **Crypto Device Driver** See :doc:`../cryptodevs/octeontx2` for CPT crypto device driver information. diff --git a/doc/guides/rawdevs/index.rst b/doc/guides/rawdevs/index.rst index 7fbae40ea9..228d4a7743 100644 --- a/doc/guides/rawdevs/index.rst +++ b/doc/guides/rawdevs/index.rst @@ -17,5 +17,4 @@ application through rawdev API. ifpga ioat ntb -octeontx2_dma octeontx2_ep diff --git a/doc/guides/rawdevs/octeontx2_dma.rst b/doc/guides/rawdevs/octeontx2_dma.rst deleted file mode 100644 index 6887da5278..00 --- a/doc/guides/rawdevs/octeontx2_dma.rst +++ /dev/null @@ -1,103 +0,0 @@ -.. SPDX-License-Identifier: BSD-3-Clause -Copyright(c) 2019 Marvell International Ltd. - -OCTEON TX2 DMA Driver -= - -OCTEON TX2 has an internal DMA unit which can be used by applications to initiate -DMA transaction internally, from/to host when OCTEON TX2 operates in PCIe End -Point mode. The DMA PF function supports 8 VFs corresponding to 8 DMA queues. -Each DMA queue was exposed as a VF function when SRIOV enabled. - -Features - - -This DMA PMD supports below 3 modes of memory transfers - -#. Internal - OCTEON TX2 DRAM to DRAM without core intervention - -#. Inbound - Host DRAM to OCTEON TX2 DRAM without host/OCTEON TX2 cores involvement - -#. Outbound - OCTEON TX2 DRAM to Host DRAM without host/OCTEON TX2 cores involvement - -Prerequisites and Compilation procedure - - See :doc:`../platform/octeontx2` for setup information. - - -Enabling logs -- - -For enabling logs, use the following EAL parameter: - -.. code-block:: console - - ./your_dma_application --log-level=pmd.raw.octeontx2.dpi, - -Using ``pmd.raw.octeontx2.dpi`` as log matching criteria, all Event PMD logs -can be enabled which are lower than logging ``level``. - -Initialization --- - -The number of DMA VFs (queues) enabled can be controlled by setting sysfs -entry, `sriov_numvfs` for the corresponding PF driver. - -.. code-block:: console - - echo > /sys/bus/pci/drivers/octeontx2-dpi/\:05\:00.0/sriov_numvfs - -Once the required VFs are enabled, to be accessible from DPDK, VFs need to be -bound to vfio-pci driver. - -Device Setup -- - -The OCTEON TX2 DPI DMA HW devices will need to be bound to a -user-space IO driver for use. The script ``dpdk-devbind.py`` script -included with DPDK can be used to view the state of the devices and to bind -them to a suitable DPDK-supported kernel driver. When querying the status -of the devi
[dpdk-dev] [PATCH v3 2/2] drivers/raw: remove octeontx2-ep driver
Removing the rawdev based octeontx2-ep driver as the dependent
common/octeontx2 will soon be going away. Moreover this driver is no
longer required as the net/octeontx_ep driver is sufficient.
Signed-off-by: Radha Mohan Chintakuntla
---
Changes from v2:
Fixed DPDK CI reported issues for more documentation failure.
Changes from v1:
Fixed compilation issues in documentation
MAINTAINERS | 6 -
doc/guides/rawdevs/index.rst | 1 -
doc/guides/rawdevs/octeontx2_ep.rst | 82 ---
drivers/raw/meson.build | 1 -
drivers/raw/octeontx2_ep/meson.build | 11 -
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c | 846 --
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h | 52 --
drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 362 -
drivers/raw/octeontx2_ep/otx2_ep_rawdev.h | 499 -
drivers/raw/octeontx2_ep/otx2_ep_test.c | 172 -
drivers/raw/octeontx2_ep/otx2_ep_vf.c | 475
drivers/raw/octeontx2_ep/otx2_ep_vf.h | 10 -
drivers/raw/octeontx2_ep/version.map | 3 -
13 files changed, 2520 deletions(-)
delete mode 100644 doc/guides/rawdevs/octeontx2_ep.rst
delete mode 100644 drivers/raw/octeontx2_ep/meson.build
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_test.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.h
delete mode 100644 drivers/raw/octeontx2_ep/version.map
diff --git a/MAINTAINERS b/MAINTAINERS
index 9f9aa37c68..1d6a408f49 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1321,12 +1321,6 @@ M: Tomasz Duszynski
F: doc/guides/rawdevs/cnxk_bphy.rst
F: drivers/raw/cnxk_bphy/
-Marvell OCTEON TX2 EP
-M: Radha Mohan Chintakuntla
-M: Veerasenareddy Burru
-F: drivers/raw/octeontx2_ep/
-F: doc/guides/rawdevs/octeontx2_ep.rst
-
NTB
M: Xiaoyun Li
M: Jingjing Wu
diff --git a/doc/guides/rawdevs/index.rst b/doc/guides/rawdevs/index.rst
index 228d4a7743..b6cf917443 100644
--- a/doc/guides/rawdevs/index.rst
+++ b/doc/guides/rawdevs/index.rst
@@ -17,4 +17,3 @@ application through rawdev API.
ifpga
ioat
ntb
-octeontx2_ep
diff --git a/doc/guides/rawdevs/octeontx2_ep.rst
b/doc/guides/rawdevs/octeontx2_ep.rst
deleted file mode 100644
index fb9d346ccf..00
--- a/doc/guides/rawdevs/octeontx2_ep.rst
+++ /dev/null
@@ -1,82 +0,0 @@
-.. SPDX-License-Identifier: BSD-3-Clause
-Copyright(c) 2019 Marvell International Ltd.
-
-Marvell OCTEON TX2 End Point Rawdev Driver
-==
-
-OCTEON TX2 has an internal SDP unit which provides End Point mode of operation
-by exposing its IOQs to Host, IOQs are used for packet I/O between Host and
-OCTEON TX2. Each OCTEON TX2 SDP PF supports a max of 128 VFs and Each VF is
-associated with a set of IOQ pairs.
-
-Features
-
-
-This OCTEON TX2 End Point mode PMD supports
-
-#. Packet Input - Host to OCTEON TX2 with direct data instruction mode.
-
-#. Packet Output - OCTEON TX2 to Host with info pointer mode.
-
-
-Initialization
---
-
-The number of SDP VFs enabled, can be controlled by setting sysfs
-entry `sriov_numvfs` for the corresponding PF driver.
-
-.. code-block:: console
-
- echo > /sys/bus/pci/drivers/octeontx2-ep/\:04\:00.0/sriov_numvfs
-
-Once the required VFs are enabled, to be accessible from DPDK, VFs need to be
-bound to vfio-pci driver.
-
-Device Setup
-
-
-The OCTEON TX2 SDP End Point VF devices will need to be bound to a
-user-space IO driver for use. The script ``dpdk-devbind.py`` script
-included with DPDK can be used to view the state of the devices and to bind
-them to a suitable DPDK-supported kernel driver. When querying the status
-of the devices, they will appear under the category of "Misc (rawdev)
-devices", i.e. the command ``dpdk-devbind.py --status-dev misc`` can be
-used to see the state of those devices alone.
-
-Device Configuration
-
-
-Configuring SDP EP rawdev device is done using the ``rte_rawdev_configure()``
-API, which takes the mempool as parameter. PMD uses this pool to send/receive
-packets to/from the HW.
-
-The following code shows how the device is configured
-
-.. code-block:: c
-
- struct sdp_rawdev_info config = {0};
- struct rte_rawdev_info rdev_info = {.dev_private = &config};
- config.enqdeq_mpool = (void *)rte_mempool_create(...);
-
- rte_rawdev_configure(dev_id, (rte_rawdev_obj_t)&rdev_info,
-sizeof(config));
-
-Performing Data Transfer
-
-
-To perform data transfer using SDP VF EP rawdev devices use standard
-``rte_rawdev_enqueue_buffers()`` and ``rte_rawdev_dequeue_buffers()`` APIs.
-
-Self
[dpdk-dev] [PATCH v4 1/2] drivers/raw: remove octeontx2-dma driver
Removing the rawdev based octeontx2-dma driver as the dependent common/octeontx2 will be soon be going away. Also a new DMA driver will be coming in this place once the rte_dmadev library is in. Signed-off-by: Radha Mohan Chintakuntla --- Changes from v3: Fixed patch application failure on main due to conflict. Changes from v2: Fixed DPDK CI reported issues for more documentation failure. Changes from v1: Fixed compilation issues in documentation MAINTAINERS | 6 - doc/guides/platform/octeontx2.rst | 3 - doc/guides/rawdevs/index.rst| 1 - doc/guides/rawdevs/octeontx2_dma.rst| 103 - drivers/raw/meson.build | 1 - drivers/raw/octeontx2_dma/meson.build | 18 - drivers/raw/octeontx2_dma/otx2_dpi_msg.c| 105 - drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 441 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 197 - drivers/raw/octeontx2_dma/otx2_dpi_test.c | 218 -- drivers/raw/octeontx2_dma/version.map | 3 - 11 files changed, 1096 deletions(-) delete mode 100644 doc/guides/rawdevs/octeontx2_dma.rst delete mode 100644 drivers/raw/octeontx2_dma/meson.build delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_msg.c delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_test.c delete mode 100644 drivers/raw/octeontx2_dma/version.map diff --git a/MAINTAINERS b/MAINTAINERS index 266f5ac1da..9f9aa37c68 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1321,12 +1321,6 @@ M: Tomasz Duszynski F: doc/guides/rawdevs/cnxk_bphy.rst F: drivers/raw/cnxk_bphy/ -Marvell OCTEON TX2 DMA -M: Radha Mohan Chintakuntla -M: Veerasenareddy Burru -F: drivers/raw/octeontx2_dma/ -F: doc/guides/rawdevs/octeontx2_dma.rst - Marvell OCTEON TX2 EP M: Radha Mohan Chintakuntla M: Veerasenareddy Burru diff --git a/doc/guides/platform/octeontx2.rst b/doc/guides/platform/octeontx2.rst index 8b5991f03b..3a3d28571c 100644 --- a/doc/guides/platform/octeontx2.rst +++ b/doc/guides/platform/octeontx2.rst @@ -152,9 +152,6 @@ This section lists dataplane H/W block(s) available in OCTEON TX2 SoC. #. **Event Device Driver** See :doc:`../eventdevs/octeontx2` for SSO event device driver information. -#. **DMA Rawdev Driver** - See :doc:`../rawdevs/octeontx2_dma` for DMA driver information. - #. **Crypto Device Driver** See :doc:`../cryptodevs/octeontx2` for CPT crypto device driver information. diff --git a/doc/guides/rawdevs/index.rst b/doc/guides/rawdevs/index.rst index 7fbae40ea9..228d4a7743 100644 --- a/doc/guides/rawdevs/index.rst +++ b/doc/guides/rawdevs/index.rst @@ -17,5 +17,4 @@ application through rawdev API. ifpga ioat ntb -octeontx2_dma octeontx2_ep diff --git a/doc/guides/rawdevs/octeontx2_dma.rst b/doc/guides/rawdevs/octeontx2_dma.rst deleted file mode 100644 index 6887da5278..00 --- a/doc/guides/rawdevs/octeontx2_dma.rst +++ /dev/null @@ -1,103 +0,0 @@ -.. SPDX-License-Identifier: BSD-3-Clause -Copyright(c) 2019 Marvell International Ltd. - -OCTEON TX2 DMA Driver -= - -OCTEON TX2 has an internal DMA unit which can be used by applications to initiate -DMA transaction internally, from/to host when OCTEON TX2 operates in PCIe End -Point mode. The DMA PF function supports 8 VFs corresponding to 8 DMA queues. -Each DMA queue was exposed as a VF function when SRIOV enabled. - -Features - - -This DMA PMD supports below 3 modes of memory transfers - -#. Internal - OCTEON TX2 DRAM to DRAM without core intervention - -#. Inbound - Host DRAM to OCTEON TX2 DRAM without host/OCTEON TX2 cores involvement - -#. Outbound - OCTEON TX2 DRAM to Host DRAM without host/OCTEON TX2 cores involvement - -Prerequisites and Compilation procedure - - See :doc:`../platform/octeontx2` for setup information. - - -Enabling logs -- - -For enabling logs, use the following EAL parameter: - -.. code-block:: console - - ./your_dma_application --log-level=pmd.raw.octeontx2.dpi, - -Using ``pmd.raw.octeontx2.dpi`` as log matching criteria, all Event PMD logs -can be enabled which are lower than logging ``level``. - -Initialization --- - -The number of DMA VFs (queues) enabled can be controlled by setting sysfs -entry, `sriov_numvfs` for the corresponding PF driver. - -.. code-block:: console - - echo > /sys/bus/pci/drivers/octeontx2-dpi/\:05\:00.0/sriov_numvfs - -Once the required VFs are enabled, to be accessible from DPDK, VFs need to be -bound to vfio-pci driver. - -Device Setup -- - -The OCTEON TX2 DPI DMA HW devices will need to be bound to a -user-space IO driver for use. The script ``dpdk-devbind.py`` script -included with DPDK can be used to view the state of the devices and to bind -them t
[dpdk-dev] [PATCH v4 2/2] drivers/raw: remove octeontx2-ep driver
Removing the rawdev based octeontx2-ep driver as the dependent
common/octeontx2 will soon be going away. Moreover this driver is no
longer required as the net/octeontx_ep driver is sufficient.
Signed-off-by: Radha Mohan Chintakuntla
---
Changes from v3:
Fixed patch application failure due to conflict on main branch.
Changes from v2:
Fixed DPDK CI reported issues for more documentation failure.
Changes from v1:
Fixed compilation issues in documentation
MAINTAINERS | 6 -
doc/guides/rawdevs/index.rst | 1 -
doc/guides/rawdevs/octeontx2_ep.rst | 82 ---
drivers/raw/meson.build | 1 -
drivers/raw/octeontx2_ep/meson.build | 11 -
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c | 846 --
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h | 52 --
drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 362 -
drivers/raw/octeontx2_ep/otx2_ep_rawdev.h | 499 -
drivers/raw/octeontx2_ep/otx2_ep_test.c | 172 -
drivers/raw/octeontx2_ep/otx2_ep_vf.c | 475
drivers/raw/octeontx2_ep/otx2_ep_vf.h | 10 -
drivers/raw/octeontx2_ep/version.map | 3 -
13 files changed, 2520 deletions(-)
delete mode 100644 doc/guides/rawdevs/octeontx2_ep.rst
delete mode 100644 drivers/raw/octeontx2_ep/meson.build
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_test.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.h
delete mode 100644 drivers/raw/octeontx2_ep/version.map
diff --git a/MAINTAINERS b/MAINTAINERS
index 9f9aa37c68..1d6a408f49 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1321,12 +1321,6 @@ M: Tomasz Duszynski
F: doc/guides/rawdevs/cnxk_bphy.rst
F: drivers/raw/cnxk_bphy/
-Marvell OCTEON TX2 EP
-M: Radha Mohan Chintakuntla
-M: Veerasenareddy Burru
-F: drivers/raw/octeontx2_ep/
-F: doc/guides/rawdevs/octeontx2_ep.rst
-
NTB
M: Xiaoyun Li
M: Jingjing Wu
diff --git a/doc/guides/rawdevs/index.rst b/doc/guides/rawdevs/index.rst
index 228d4a7743..b6cf917443 100644
--- a/doc/guides/rawdevs/index.rst
+++ b/doc/guides/rawdevs/index.rst
@@ -17,4 +17,3 @@ application through rawdev API.
ifpga
ioat
ntb
-octeontx2_ep
diff --git a/doc/guides/rawdevs/octeontx2_ep.rst
b/doc/guides/rawdevs/octeontx2_ep.rst
deleted file mode 100644
index fb9d346ccf..00
--- a/doc/guides/rawdevs/octeontx2_ep.rst
+++ /dev/null
@@ -1,82 +0,0 @@
-.. SPDX-License-Identifier: BSD-3-Clause
-Copyright(c) 2019 Marvell International Ltd.
-
-Marvell OCTEON TX2 End Point Rawdev Driver
-==
-
-OCTEON TX2 has an internal SDP unit which provides End Point mode of operation
-by exposing its IOQs to Host, IOQs are used for packet I/O between Host and
-OCTEON TX2. Each OCTEON TX2 SDP PF supports a max of 128 VFs and Each VF is
-associated with a set of IOQ pairs.
-
-Features
-
-
-This OCTEON TX2 End Point mode PMD supports
-
-#. Packet Input - Host to OCTEON TX2 with direct data instruction mode.
-
-#. Packet Output - OCTEON TX2 to Host with info pointer mode.
-
-
-Initialization
---
-
-The number of SDP VFs enabled, can be controlled by setting sysfs
-entry `sriov_numvfs` for the corresponding PF driver.
-
-.. code-block:: console
-
- echo > /sys/bus/pci/drivers/octeontx2-ep/\:04\:00.0/sriov_numvfs
-
-Once the required VFs are enabled, to be accessible from DPDK, VFs need to be
-bound to vfio-pci driver.
-
-Device Setup
-
-
-The OCTEON TX2 SDP End Point VF devices will need to be bound to a
-user-space IO driver for use. The script ``dpdk-devbind.py`` script
-included with DPDK can be used to view the state of the devices and to bind
-them to a suitable DPDK-supported kernel driver. When querying the status
-of the devices, they will appear under the category of "Misc (rawdev)
-devices", i.e. the command ``dpdk-devbind.py --status-dev misc`` can be
-used to see the state of those devices alone.
-
-Device Configuration
-
-
-Configuring SDP EP rawdev device is done using the ``rte_rawdev_configure()``
-API, which takes the mempool as parameter. PMD uses this pool to send/receive
-packets to/from the HW.
-
-The following code shows how the device is configured
-
-.. code-block:: c
-
- struct sdp_rawdev_info config = {0};
- struct rte_rawdev_info rdev_info = {.dev_private = &config};
- config.enqdeq_mpool = (void *)rte_mempool_create(...);
-
- rte_rawdev_configure(dev_id, (rte_rawdev_obj_t)&rdev_info,
-sizeof(config));
-
-Performing Data Transfer
-
-
-To perform data transfer using SDP VF EP rawdev
[dpdk-dev] [PATCH RESEND v4 1/2] drivers/raw: remove octeontx2-dma driver
Removing the rawdev based octeontx2-dma driver as the dependent common/octeontx2 will be soon be going away. Also a new DMA driver will be coming in this place once the rte_dmadev library is in. Signed-off-by: Radha Mohan Chintakuntla --- Changes from v3: Fixed patch application failure due to conflict on main branch. Changes from v2: Fixed DPDK CI reported issues for more documentation failure. Changes from v1: Fixed compilation issues in documentation MAINTAINERS | 6 - doc/guides/platform/octeontx2.rst | 3 - doc/guides/rawdevs/index.rst| 1 - doc/guides/rawdevs/octeontx2_dma.rst| 103 - drivers/raw/meson.build | 1 - drivers/raw/octeontx2_dma/meson.build | 18 - drivers/raw/octeontx2_dma/otx2_dpi_msg.c| 105 - drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 441 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 197 - drivers/raw/octeontx2_dma/otx2_dpi_test.c | 218 -- drivers/raw/octeontx2_dma/version.map | 3 - 11 files changed, 1096 deletions(-) delete mode 100644 doc/guides/rawdevs/octeontx2_dma.rst delete mode 100644 drivers/raw/octeontx2_dma/meson.build delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_msg.c delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_test.c delete mode 100644 drivers/raw/octeontx2_dma/version.map diff --git a/MAINTAINERS b/MAINTAINERS index 266f5ac1da..9f9aa37c68 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1321,12 +1321,6 @@ M: Tomasz Duszynski F: doc/guides/rawdevs/cnxk_bphy.rst F: drivers/raw/cnxk_bphy/ -Marvell OCTEON TX2 DMA -M: Radha Mohan Chintakuntla -M: Veerasenareddy Burru -F: drivers/raw/octeontx2_dma/ -F: doc/guides/rawdevs/octeontx2_dma.rst - Marvell OCTEON TX2 EP M: Radha Mohan Chintakuntla M: Veerasenareddy Burru diff --git a/doc/guides/platform/octeontx2.rst b/doc/guides/platform/octeontx2.rst index 8b5991f03b..3a3d28571c 100644 --- a/doc/guides/platform/octeontx2.rst +++ b/doc/guides/platform/octeontx2.rst @@ -152,9 +152,6 @@ This section lists dataplane H/W block(s) available in OCTEON TX2 SoC. #. **Event Device Driver** See :doc:`../eventdevs/octeontx2` for SSO event device driver information. -#. **DMA Rawdev Driver** - See :doc:`../rawdevs/octeontx2_dma` for DMA driver information. - #. **Crypto Device Driver** See :doc:`../cryptodevs/octeontx2` for CPT crypto device driver information. diff --git a/doc/guides/rawdevs/index.rst b/doc/guides/rawdevs/index.rst index 7fbae40ea9..228d4a7743 100644 --- a/doc/guides/rawdevs/index.rst +++ b/doc/guides/rawdevs/index.rst @@ -17,5 +17,4 @@ application through rawdev API. ifpga ioat ntb -octeontx2_dma octeontx2_ep diff --git a/doc/guides/rawdevs/octeontx2_dma.rst b/doc/guides/rawdevs/octeontx2_dma.rst deleted file mode 100644 index 6887da5278..00 --- a/doc/guides/rawdevs/octeontx2_dma.rst +++ /dev/null @@ -1,103 +0,0 @@ -.. SPDX-License-Identifier: BSD-3-Clause -Copyright(c) 2019 Marvell International Ltd. - -OCTEON TX2 DMA Driver -= - -OCTEON TX2 has an internal DMA unit which can be used by applications to initiate -DMA transaction internally, from/to host when OCTEON TX2 operates in PCIe End -Point mode. The DMA PF function supports 8 VFs corresponding to 8 DMA queues. -Each DMA queue was exposed as a VF function when SRIOV enabled. - -Features - - -This DMA PMD supports below 3 modes of memory transfers - -#. Internal - OCTEON TX2 DRAM to DRAM without core intervention - -#. Inbound - Host DRAM to OCTEON TX2 DRAM without host/OCTEON TX2 cores involvement - -#. Outbound - OCTEON TX2 DRAM to Host DRAM without host/OCTEON TX2 cores involvement - -Prerequisites and Compilation procedure - - See :doc:`../platform/octeontx2` for setup information. - - -Enabling logs -- - -For enabling logs, use the following EAL parameter: - -.. code-block:: console - - ./your_dma_application --log-level=pmd.raw.octeontx2.dpi, - -Using ``pmd.raw.octeontx2.dpi`` as log matching criteria, all Event PMD logs -can be enabled which are lower than logging ``level``. - -Initialization --- - -The number of DMA VFs (queues) enabled can be controlled by setting sysfs -entry, `sriov_numvfs` for the corresponding PF driver. - -.. code-block:: console - - echo > /sys/bus/pci/drivers/octeontx2-dpi/\:05\:00.0/sriov_numvfs - -Once the required VFs are enabled, to be accessible from DPDK, VFs need to be -bound to vfio-pci driver. - -Device Setup -- - -The OCTEON TX2 DPI DMA HW devices will need to be bound to a -user-space IO driver for use. The script ``dpdk-devbind.py`` script -included with DPDK can be used to view the state of the devices and to bind -them t
[dpdk-dev] [PATCH RESEND v4 2/2] drivers/raw: remove octeontx2-ep driver
Removing the rawdev based octeontx2-ep driver as the dependent
common/octeontx2 will soon be going away. Moreover this driver is no
longer required as the net/octeontx_ep driver is sufficient.
Signed-off-by: Radha Mohan Chintakuntla
---
Changes from v3:
Fixed patch application failure due to conflict on main branch.
Changes from v2:
Fixed DPDK CI reported issues for more documentation failure.
Changes from v1:
Fixed compilation issues in documentation
MAINTAINERS | 6 -
doc/guides/rawdevs/index.rst | 1 -
doc/guides/rawdevs/octeontx2_ep.rst | 82 ---
drivers/raw/meson.build | 1 -
drivers/raw/octeontx2_ep/meson.build | 11 -
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c | 846 --
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h | 52 --
drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 362 -
drivers/raw/octeontx2_ep/otx2_ep_rawdev.h | 499 -
drivers/raw/octeontx2_ep/otx2_ep_test.c | 172 -
drivers/raw/octeontx2_ep/otx2_ep_vf.c | 475
drivers/raw/octeontx2_ep/otx2_ep_vf.h | 10 -
drivers/raw/octeontx2_ep/version.map | 3 -
13 files changed, 2520 deletions(-)
delete mode 100644 doc/guides/rawdevs/octeontx2_ep.rst
delete mode 100644 drivers/raw/octeontx2_ep/meson.build
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_test.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.h
delete mode 100644 drivers/raw/octeontx2_ep/version.map
diff --git a/MAINTAINERS b/MAINTAINERS
index 9f9aa37c68..1d6a408f49 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1321,12 +1321,6 @@ M: Tomasz Duszynski
F: doc/guides/rawdevs/cnxk_bphy.rst
F: drivers/raw/cnxk_bphy/
-Marvell OCTEON TX2 EP
-M: Radha Mohan Chintakuntla
-M: Veerasenareddy Burru
-F: drivers/raw/octeontx2_ep/
-F: doc/guides/rawdevs/octeontx2_ep.rst
-
NTB
M: Xiaoyun Li
M: Jingjing Wu
diff --git a/doc/guides/rawdevs/index.rst b/doc/guides/rawdevs/index.rst
index 228d4a7743..b6cf917443 100644
--- a/doc/guides/rawdevs/index.rst
+++ b/doc/guides/rawdevs/index.rst
@@ -17,4 +17,3 @@ application through rawdev API.
ifpga
ioat
ntb
-octeontx2_ep
diff --git a/doc/guides/rawdevs/octeontx2_ep.rst
b/doc/guides/rawdevs/octeontx2_ep.rst
deleted file mode 100644
index fb9d346ccf..00
--- a/doc/guides/rawdevs/octeontx2_ep.rst
+++ /dev/null
@@ -1,82 +0,0 @@
-.. SPDX-License-Identifier: BSD-3-Clause
-Copyright(c) 2019 Marvell International Ltd.
-
-Marvell OCTEON TX2 End Point Rawdev Driver
-==
-
-OCTEON TX2 has an internal SDP unit which provides End Point mode of operation
-by exposing its IOQs to Host, IOQs are used for packet I/O between Host and
-OCTEON TX2. Each OCTEON TX2 SDP PF supports a max of 128 VFs and Each VF is
-associated with a set of IOQ pairs.
-
-Features
-
-
-This OCTEON TX2 End Point mode PMD supports
-
-#. Packet Input - Host to OCTEON TX2 with direct data instruction mode.
-
-#. Packet Output - OCTEON TX2 to Host with info pointer mode.
-
-
-Initialization
---
-
-The number of SDP VFs enabled, can be controlled by setting sysfs
-entry `sriov_numvfs` for the corresponding PF driver.
-
-.. code-block:: console
-
- echo > /sys/bus/pci/drivers/octeontx2-ep/\:04\:00.0/sriov_numvfs
-
-Once the required VFs are enabled, to be accessible from DPDK, VFs need to be
-bound to vfio-pci driver.
-
-Device Setup
-
-
-The OCTEON TX2 SDP End Point VF devices will need to be bound to a
-user-space IO driver for use. The script ``dpdk-devbind.py`` script
-included with DPDK can be used to view the state of the devices and to bind
-them to a suitable DPDK-supported kernel driver. When querying the status
-of the devices, they will appear under the category of "Misc (rawdev)
-devices", i.e. the command ``dpdk-devbind.py --status-dev misc`` can be
-used to see the state of those devices alone.
-
-Device Configuration
-
-
-Configuring SDP EP rawdev device is done using the ``rte_rawdev_configure()``
-API, which takes the mempool as parameter. PMD uses this pool to send/receive
-packets to/from the HW.
-
-The following code shows how the device is configured
-
-.. code-block:: c
-
- struct sdp_rawdev_info config = {0};
- struct rte_rawdev_info rdev_info = {.dev_private = &config};
- config.enqdeq_mpool = (void *)rte_mempool_create(...);
-
- rte_rawdev_configure(dev_id, (rte_rawdev_obj_t)&rdev_info,
-sizeof(config));
-
-Performing Data Transfer
-
-
-To perform data transfer using SDP VF EP rawdev
[dpdk-dev] [PATCH v5 1/2] drivers/raw: remove octeontx2-dma driver
Removing the rawdev based octeontx2-dma driver as the dependent common/octeontx2 will be soon be going away. Also a new DMA driver will be coming in this place once the rte_dmadev library is in. Signed-off-by: Radha Mohan Chintakuntla --- Changes from v4: Replaced the reference to documentation in release notes to plain text. Changes from v3: Fixed patch application failure due to conflict on main branch. Changes from v2: Fixed DPDK CI reported issues for more documentation failure. Changes from v1: Fixed compilation issues in documentation MAINTAINERS | 6 - doc/guides/platform/octeontx2.rst | 3 - doc/guides/rawdevs/index.rst| 1 - doc/guides/rawdevs/octeontx2_dma.rst| 103 - doc/guides/rel_notes/release_19_08.rst | 2 +- drivers/raw/meson.build | 1 - drivers/raw/octeontx2_dma/meson.build | 18 - drivers/raw/octeontx2_dma/otx2_dpi_msg.c| 105 - drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 441 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 197 - drivers/raw/octeontx2_dma/otx2_dpi_test.c | 218 -- drivers/raw/octeontx2_dma/version.map | 3 - 12 files changed, 1 insertion(+), 1097 deletions(-) delete mode 100644 doc/guides/rawdevs/octeontx2_dma.rst delete mode 100644 drivers/raw/octeontx2_dma/meson.build delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_msg.c delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h delete mode 100644 drivers/raw/octeontx2_dma/otx2_dpi_test.c delete mode 100644 drivers/raw/octeontx2_dma/version.map diff --git a/MAINTAINERS b/MAINTAINERS index 266f5ac1da..9f9aa37c68 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1321,12 +1321,6 @@ M: Tomasz Duszynski F: doc/guides/rawdevs/cnxk_bphy.rst F: drivers/raw/cnxk_bphy/ -Marvell OCTEON TX2 DMA -M: Radha Mohan Chintakuntla -M: Veerasenareddy Burru -F: drivers/raw/octeontx2_dma/ -F: doc/guides/rawdevs/octeontx2_dma.rst - Marvell OCTEON TX2 EP M: Radha Mohan Chintakuntla M: Veerasenareddy Burru diff --git a/doc/guides/platform/octeontx2.rst b/doc/guides/platform/octeontx2.rst index 8b5991f03b..3a3d28571c 100644 --- a/doc/guides/platform/octeontx2.rst +++ b/doc/guides/platform/octeontx2.rst @@ -152,9 +152,6 @@ This section lists dataplane H/W block(s) available in OCTEON TX2 SoC. #. **Event Device Driver** See :doc:`../eventdevs/octeontx2` for SSO event device driver information. -#. **DMA Rawdev Driver** - See :doc:`../rawdevs/octeontx2_dma` for DMA driver information. - #. **Crypto Device Driver** See :doc:`../cryptodevs/octeontx2` for CPT crypto device driver information. diff --git a/doc/guides/rawdevs/index.rst b/doc/guides/rawdevs/index.rst index 7fbae40ea9..228d4a7743 100644 --- a/doc/guides/rawdevs/index.rst +++ b/doc/guides/rawdevs/index.rst @@ -17,5 +17,4 @@ application through rawdev API. ifpga ioat ntb -octeontx2_dma octeontx2_ep diff --git a/doc/guides/rawdevs/octeontx2_dma.rst b/doc/guides/rawdevs/octeontx2_dma.rst deleted file mode 100644 index 6887da5278..00 --- a/doc/guides/rawdevs/octeontx2_dma.rst +++ /dev/null @@ -1,103 +0,0 @@ -.. SPDX-License-Identifier: BSD-3-Clause -Copyright(c) 2019 Marvell International Ltd. - -OCTEON TX2 DMA Driver -= - -OCTEON TX2 has an internal DMA unit which can be used by applications to initiate -DMA transaction internally, from/to host when OCTEON TX2 operates in PCIe End -Point mode. The DMA PF function supports 8 VFs corresponding to 8 DMA queues. -Each DMA queue was exposed as a VF function when SRIOV enabled. - -Features - - -This DMA PMD supports below 3 modes of memory transfers - -#. Internal - OCTEON TX2 DRAM to DRAM without core intervention - -#. Inbound - Host DRAM to OCTEON TX2 DRAM without host/OCTEON TX2 cores involvement - -#. Outbound - OCTEON TX2 DRAM to Host DRAM without host/OCTEON TX2 cores involvement - -Prerequisites and Compilation procedure - - See :doc:`../platform/octeontx2` for setup information. - - -Enabling logs -- - -For enabling logs, use the following EAL parameter: - -.. code-block:: console - - ./your_dma_application --log-level=pmd.raw.octeontx2.dpi, - -Using ``pmd.raw.octeontx2.dpi`` as log matching criteria, all Event PMD logs -can be enabled which are lower than logging ``level``. - -Initialization --- - -The number of DMA VFs (queues) enabled can be controlled by setting sysfs -entry, `sriov_numvfs` for the corresponding PF driver. - -.. code-block:: console - - echo > /sys/bus/pci/drivers/octeontx2-dpi/\:05\:00.0/sriov_numvfs - -Once the required VFs are enabled, to be accessible from DPDK, VFs need to be -bound to vfio-pci driver. - -Device Setup -- - -The OCTEON TX2 DPI DMA HW devices will need to be bo
[dpdk-dev] [PATCH v5 2/2] drivers/raw: remove octeontx2-ep driver
Removing the rawdev based octeontx2-ep driver as the dependent
common/octeontx2 will soon be going away. Moreover this driver is no
longer required as the net/octeontx_ep driver is sufficient.
Signed-off-by: Radha Mohan Chintakuntla
---
Changes from v4:
Replaced the reference to documentation in release notes to plain text.
Changes from v3:
Fixed patch application failure due to conflict on main branch.
Changes from v2:
Fixed DPDK CI reported issues for more documentation failure.
Changes from v1:
Fixed compilation issues in documentation
MAINTAINERS | 6 -
doc/guides/rawdevs/index.rst | 1 -
doc/guides/rawdevs/octeontx2_ep.rst | 82 ---
doc/guides/rel_notes/release_20_02.rst| 2 +-
drivers/raw/meson.build | 1 -
drivers/raw/octeontx2_ep/meson.build | 11 -
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c | 846 --
drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h | 52 --
drivers/raw/octeontx2_ep/otx2_ep_rawdev.c | 362 -
drivers/raw/octeontx2_ep/otx2_ep_rawdev.h | 499 -
drivers/raw/octeontx2_ep/otx2_ep_test.c | 172 -
drivers/raw/octeontx2_ep/otx2_ep_vf.c | 475
drivers/raw/octeontx2_ep/otx2_ep_vf.h | 10 -
drivers/raw/octeontx2_ep/version.map | 3 -
14 files changed, 1 insertion(+), 2521 deletions(-)
delete mode 100644 doc/guides/rawdevs/octeontx2_ep.rst
delete mode 100644 drivers/raw/octeontx2_ep/meson.build
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_enqdeq.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_rawdev.h
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_test.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.c
delete mode 100644 drivers/raw/octeontx2_ep/otx2_ep_vf.h
delete mode 100644 drivers/raw/octeontx2_ep/version.map
diff --git a/MAINTAINERS b/MAINTAINERS
index 9f9aa37c68..1d6a408f49 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1321,12 +1321,6 @@ M: Tomasz Duszynski
F: doc/guides/rawdevs/cnxk_bphy.rst
F: drivers/raw/cnxk_bphy/
-Marvell OCTEON TX2 EP
-M: Radha Mohan Chintakuntla
-M: Veerasenareddy Burru
-F: drivers/raw/octeontx2_ep/
-F: doc/guides/rawdevs/octeontx2_ep.rst
-
NTB
M: Xiaoyun Li
M: Jingjing Wu
diff --git a/doc/guides/rawdevs/index.rst b/doc/guides/rawdevs/index.rst
index 228d4a7743..b6cf917443 100644
--- a/doc/guides/rawdevs/index.rst
+++ b/doc/guides/rawdevs/index.rst
@@ -17,4 +17,3 @@ application through rawdev API.
ifpga
ioat
ntb
-octeontx2_ep
diff --git a/doc/guides/rawdevs/octeontx2_ep.rst
b/doc/guides/rawdevs/octeontx2_ep.rst
deleted file mode 100644
index fb9d346ccf..00
--- a/doc/guides/rawdevs/octeontx2_ep.rst
+++ /dev/null
@@ -1,82 +0,0 @@
-.. SPDX-License-Identifier: BSD-3-Clause
-Copyright(c) 2019 Marvell International Ltd.
-
-Marvell OCTEON TX2 End Point Rawdev Driver
-==
-
-OCTEON TX2 has an internal SDP unit which provides End Point mode of operation
-by exposing its IOQs to Host, IOQs are used for packet I/O between Host and
-OCTEON TX2. Each OCTEON TX2 SDP PF supports a max of 128 VFs and Each VF is
-associated with a set of IOQ pairs.
-
-Features
-
-
-This OCTEON TX2 End Point mode PMD supports
-
-#. Packet Input - Host to OCTEON TX2 with direct data instruction mode.
-
-#. Packet Output - OCTEON TX2 to Host with info pointer mode.
-
-
-Initialization
---
-
-The number of SDP VFs enabled, can be controlled by setting sysfs
-entry `sriov_numvfs` for the corresponding PF driver.
-
-.. code-block:: console
-
- echo > /sys/bus/pci/drivers/octeontx2-ep/\:04\:00.0/sriov_numvfs
-
-Once the required VFs are enabled, to be accessible from DPDK, VFs need to be
-bound to vfio-pci driver.
-
-Device Setup
-
-
-The OCTEON TX2 SDP End Point VF devices will need to be bound to a
-user-space IO driver for use. The script ``dpdk-devbind.py`` script
-included with DPDK can be used to view the state of the devices and to bind
-them to a suitable DPDK-supported kernel driver. When querying the status
-of the devices, they will appear under the category of "Misc (rawdev)
-devices", i.e. the command ``dpdk-devbind.py --status-dev misc`` can be
-used to see the state of those devices alone.
-
-Device Configuration
-
-
-Configuring SDP EP rawdev device is done using the ``rte_rawdev_configure()``
-API, which takes the mempool as parameter. PMD uses this pool to send/receive
-packets to/from the HW.
-
-The following code shows how the device is configured
-
-.. code-block:: c
-
- struct sdp_rawdev_info config = {0};
- struct rte_rawdev_info rdev_info = {.dev_private = &config};
- config.enqdeq_mpool = (void *)rte_mempool_create(...);
-
- rte_rawdev_configure(dev_id, (rte_rawdev_obj_t)&rdev_info,
-
[dpdk-dev] [PATCH] raw/octeontx2_dma: fix unavailable PCI device in dpivf
Add PCI device to dpivf structure.
Fixes: 4495bd887d38 ("raw/octeontx2_dma: support multiple DPI blocks")
Signed-off-by: Radha Mohan Chintakuntla
---
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
index efdba2779b..8c01f25ec7 100644
--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
@@ -389,6 +389,7 @@ otx2_dpi_rawdev_probe(struct rte_pci_driver *pci_drv
__rte_unused,
vf_id = ((pci_dev->addr.devid & 0x1F) << 3) |
(pci_dev->addr.function & 0x7);
vf_id -= 1;
+ dpivf->dev = pci_dev;
dpivf->state = DPI_QUEUE_START;
dpivf->vf_id = vf_id;
dpivf->vf_bar0 = (uintptr_t)pci_dev->mem_resource[0].addr;
--
2.24.1
[PATCH] dma/cnxk: add support for CN10K DMA engine
Added support for CN10K SoC DMA engine to dmadev.
Signed-off-by: Radha Mohan Chintakuntla
Change-Id: Ib119b3ceab0810724820e9af1d29fdd3f95d5cc9
Reviewed-on: https://sj1git1.cavium.com/c/IP/SW/dataplane/dpdk/+/68103
Tested-by: sa_ip-toolkits-Jenkins
Reviewed-by: Jerin Jacob Kollanukkaran
---
drivers/dma/cnxk/cnxk_dmadev.c | 248 +
drivers/dma/cnxk/cnxk_dmadev.h | 2 +-
2 files changed, 220 insertions(+), 30 deletions(-)
diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index 2824c1b44f..a67bcba9d4 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -70,31 +70,31 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t
vchan,
RTE_SET_USED(vchan);
RTE_SET_USED(conf_sz);
- header->s.pt = DPI_HDR_PT_ZBW_CA;
+ header->cn9k.pt = DPI_HDR_PT_ZBW_CA;
switch (conf->direction) {
case RTE_DMA_DIR_DEV_TO_MEM:
- header->s.xtype = DPI_XTYPE_INBOUND;
- header->s.lport = conf->src_port.pcie.coreid;
- header->s.fport = 0;
- header->s.pvfe = 1;
+ header->cn9k.xtype = DPI_XTYPE_INBOUND;
+ header->cn9k.lport = conf->src_port.pcie.coreid;
+ header->cn9k.fport = 0;
+ header->cn9k.pvfe = 1;
break;
case RTE_DMA_DIR_MEM_TO_DEV:
- header->s.xtype = DPI_XTYPE_OUTBOUND;
- header->s.lport = 0;
- header->s.fport = conf->dst_port.pcie.coreid;
- header->s.pvfe = 1;
+ header->cn9k.xtype = DPI_XTYPE_OUTBOUND;
+ header->cn9k.lport = 0;
+ header->cn9k.fport = conf->dst_port.pcie.coreid;
+ header->cn9k.pvfe = 1;
break;
case RTE_DMA_DIR_MEM_TO_MEM:
- header->s.xtype = DPI_XTYPE_INTERNAL_ONLY;
- header->s.lport = 0;
- header->s.fport = 0;
- header->s.pvfe = 0;
+ header->cn9k.xtype = DPI_XTYPE_INTERNAL_ONLY;
+ header->cn9k.lport = 0;
+ header->cn9k.fport = 0;
+ header->cn9k.pvfe = 0;
break;
case RTE_DMA_DIR_DEV_TO_DEV:
- header->s.xtype = DPI_XTYPE_EXTERNAL_ONLY;
- header->s.lport = conf->src_port.pcie.coreid;
- header->s.fport = conf->dst_port.pcie.coreid;
+ header->cn9k.xtype = DPI_XTYPE_EXTERNAL_ONLY;
+ header->cn9k.lport = conf->src_port.pcie.coreid;
+ header->cn9k.fport = conf->dst_port.pcie.coreid;
};
for (i = 0; i < conf->nb_desc; i++) {
@@ -103,6 +103,63 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t
vchan,
plt_err("Failed to allocate for comp_data");
return -ENOMEM;
}
+ comp_data->cdata = DPI_REQ_CDATA;
+ dpivf->conf.c_desc.compl_ptr[i] = comp_data;
+ };
+ dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC;
+ dpivf->conf.c_desc.head = 0;
+ dpivf->conf.c_desc.tail = 0;
+
+ return 0;
+}
+
+static int
+cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
+const struct rte_dma_vchan_conf *conf,
+uint32_t conf_sz)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+ struct cnxk_dpi_compl_s *comp_data;
+ union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+ int i;
+
+ RTE_SET_USED(vchan);
+ RTE_SET_USED(conf_sz);
+
+ header->cn10k.pt = DPI_HDR_PT_ZBW_CA;
+
+ switch (conf->direction) {
+ case RTE_DMA_DIR_DEV_TO_MEM:
+ header->cn10k.xtype = DPI_XTYPE_INBOUND;
+ header->cn10k.lport = conf->src_port.pcie.coreid;
+ header->cn10k.fport = 0;
+ header->cn10k.pvfe = 1;
+ break;
+ case RTE_DMA_DIR_MEM_TO_DEV:
+ header->cn10k.xtype = DPI_XTYPE_OUTBOUND;
+ header->cn10k.lport = 0;
+ header->cn10k.fport = conf->dst_port.pcie.coreid;
+ header->cn10k.pvfe = 1;
+ break;
+ case RTE_DMA_DIR_MEM_TO_MEM:
+ header->cn10k.xtype = DPI_XTYPE_INTERNAL_ONLY;
+ header->cn10k.lport = 0;
+ header->cn10k.fport = 0;
+ header->cn10k.pvfe = 0;
+ break;
+ case RTE_DMA_DIR_DEV_TO_DEV:
+ header->cn10k.xtype = DPI_XTYPE_EXTERNAL_ONLY;
+ header->cn10k.lport = conf->src_port.pcie.coreid;
+ header->cn10k.fport = conf->dst_port.pcie.coreid;
+ };
+
+ for (i = 0; i < conf-&g
[PATCH v2] dma/cnxk: add support for CN10K DMA engine
Added support for CN10K SoC DMA engine to dmadev.
Signed-off-by: Radha Mohan Chintakuntla
Reviewed-by: Jerin Jacob Kollanukkaran
---
Changes from v1:
- Removed gerrit changeID
drivers/dma/cnxk/cnxk_dmadev.c | 248 +
drivers/dma/cnxk/cnxk_dmadev.h | 2 +-
2 files changed, 220 insertions(+), 30 deletions(-)
diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index 2824c1b44f..a67bcba9d4 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -70,31 +70,31 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t
vchan,
RTE_SET_USED(vchan);
RTE_SET_USED(conf_sz);
- header->s.pt = DPI_HDR_PT_ZBW_CA;
+ header->cn9k.pt = DPI_HDR_PT_ZBW_CA;
switch (conf->direction) {
case RTE_DMA_DIR_DEV_TO_MEM:
- header->s.xtype = DPI_XTYPE_INBOUND;
- header->s.lport = conf->src_port.pcie.coreid;
- header->s.fport = 0;
- header->s.pvfe = 1;
+ header->cn9k.xtype = DPI_XTYPE_INBOUND;
+ header->cn9k.lport = conf->src_port.pcie.coreid;
+ header->cn9k.fport = 0;
+ header->cn9k.pvfe = 1;
break;
case RTE_DMA_DIR_MEM_TO_DEV:
- header->s.xtype = DPI_XTYPE_OUTBOUND;
- header->s.lport = 0;
- header->s.fport = conf->dst_port.pcie.coreid;
- header->s.pvfe = 1;
+ header->cn9k.xtype = DPI_XTYPE_OUTBOUND;
+ header->cn9k.lport = 0;
+ header->cn9k.fport = conf->dst_port.pcie.coreid;
+ header->cn9k.pvfe = 1;
break;
case RTE_DMA_DIR_MEM_TO_MEM:
- header->s.xtype = DPI_XTYPE_INTERNAL_ONLY;
- header->s.lport = 0;
- header->s.fport = 0;
- header->s.pvfe = 0;
+ header->cn9k.xtype = DPI_XTYPE_INTERNAL_ONLY;
+ header->cn9k.lport = 0;
+ header->cn9k.fport = 0;
+ header->cn9k.pvfe = 0;
break;
case RTE_DMA_DIR_DEV_TO_DEV:
- header->s.xtype = DPI_XTYPE_EXTERNAL_ONLY;
- header->s.lport = conf->src_port.pcie.coreid;
- header->s.fport = conf->dst_port.pcie.coreid;
+ header->cn9k.xtype = DPI_XTYPE_EXTERNAL_ONLY;
+ header->cn9k.lport = conf->src_port.pcie.coreid;
+ header->cn9k.fport = conf->dst_port.pcie.coreid;
};
for (i = 0; i < conf->nb_desc; i++) {
@@ -103,6 +103,63 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t
vchan,
plt_err("Failed to allocate for comp_data");
return -ENOMEM;
}
+ comp_data->cdata = DPI_REQ_CDATA;
+ dpivf->conf.c_desc.compl_ptr[i] = comp_data;
+ };
+ dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC;
+ dpivf->conf.c_desc.head = 0;
+ dpivf->conf.c_desc.tail = 0;
+
+ return 0;
+}
+
+static int
+cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
+const struct rte_dma_vchan_conf *conf,
+uint32_t conf_sz)
+{
+ struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
+ struct cnxk_dpi_compl_s *comp_data;
+ union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+ int i;
+
+ RTE_SET_USED(vchan);
+ RTE_SET_USED(conf_sz);
+
+ header->cn10k.pt = DPI_HDR_PT_ZBW_CA;
+
+ switch (conf->direction) {
+ case RTE_DMA_DIR_DEV_TO_MEM:
+ header->cn10k.xtype = DPI_XTYPE_INBOUND;
+ header->cn10k.lport = conf->src_port.pcie.coreid;
+ header->cn10k.fport = 0;
+ header->cn10k.pvfe = 1;
+ break;
+ case RTE_DMA_DIR_MEM_TO_DEV:
+ header->cn10k.xtype = DPI_XTYPE_OUTBOUND;
+ header->cn10k.lport = 0;
+ header->cn10k.fport = conf->dst_port.pcie.coreid;
+ header->cn10k.pvfe = 1;
+ break;
+ case RTE_DMA_DIR_MEM_TO_MEM:
+ header->cn10k.xtype = DPI_XTYPE_INTERNAL_ONLY;
+ header->cn10k.lport = 0;
+ header->cn10k.fport = 0;
+ header->cn10k.pvfe = 0;
+ break;
+ case RTE_DMA_DIR_DEV_TO_DEV:
+ header->cn10k.xtype = DPI_XTYPE_EXTERNAL_ONLY;
+ header->cn10k.lport = conf->src_port.pcie.coreid;
+ header->cn10k.fport = conf->dst_port.pcie.coreid;
+ };
+
+ for (i = 0; i < conf->nb_desc; i++) {
+ comp_data = rte_zmalloc(NULL, sizeof(*comp_data), 0);
+ if (comp_dat
[PATCH v3] dma/cnxk: add support for CN10K DMA engine
Added support for CN10K SoC DMA engine to dmadev.
Signed-off-by: Radha Mohan Chintakuntla
Reviewed-by: Jerin Jacob Kollanukkaran
---
Changes from v2:
- Added missing files required in the patch
Changes from v1:
- Removed gerrit changeID
drivers/common/cnxk/hw/dpi.h | 16 +-
drivers/common/cnxk/roc_dpi_priv.h | 2 +-
drivers/dma/cnxk/cnxk_dmadev.c | 248 +
drivers/dma/cnxk/cnxk_dmadev.h | 2 +-
4 files changed, 225 insertions(+), 43 deletions(-)
diff --git a/drivers/common/cnxk/hw/dpi.h b/drivers/common/cnxk/hw/dpi.h
index 2da123228f..a34713dde6 100644
--- a/drivers/common/cnxk/hw/dpi.h
+++ b/drivers/common/cnxk/hw/dpi.h
@@ -61,7 +61,7 @@
*/
union dpi_instr_hdr_s {
uint64_t u[4];
- struct dpi_dma_instr_hdr_s_s {
+ struct dpi_cn9k_instr_hdr_s_s {
uint64_t tag : 32;
uint64_t tt : 2;
uint64_t grp : 10;
@@ -93,17 +93,9 @@ union dpi_instr_hdr_s {
/* Word 2 - End */
uint64_t reserved_192_255 : 64;
/* Word 3 - End */
- } s;
-};
+ } cn9k;
-/**
- * Structure dpi_cn10k_instr_hdr_s for CN10K
- *
- * DPI DMA Instruction Header Format
- */
-union dpi_cn10k_instr_hdr_s {
- uint64_t u[4];
- struct dpi_cn10k_dma_instr_hdr_s_s {
+ struct dpi_cn10k_instr_hdr_s_s {
uint64_t nfst : 4;
uint64_t reserved_4_5 : 2;
uint64_t nlst : 4;
@@ -135,7 +127,7 @@ union dpi_cn10k_instr_hdr_s {
/* Word 2 - End */
uint64_t reserved_192_255 : 64;
/* Word 3 - End */
- } s;
+ } cn10k;
};
#endif /*__DEV_DPI_HW_H__*/
diff --git a/drivers/common/cnxk/roc_dpi_priv.h
b/drivers/common/cnxk/roc_dpi_priv.h
index 92953fbcfc..1fa1a715d3 100644
--- a/drivers/common/cnxk/roc_dpi_priv.h
+++ b/drivers/common/cnxk/roc_dpi_priv.h
@@ -23,7 +23,7 @@ typedef union dpi_mbox_msg_t {
uint64_t u[2];
struct dpi_mbox_message_s {
/* VF ID to configure */
- uint64_t vfid : 4;
+ uint64_t vfid : 8;
/* Command code */
uint64_t cmd : 4;
/* Command buffer size in 8-byte words */
diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index 2824c1b44f..a67bcba9d4 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -70,31 +70,31 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t
vchan,
RTE_SET_USED(vchan);
RTE_SET_USED(conf_sz);
- header->s.pt = DPI_HDR_PT_ZBW_CA;
+ header->cn9k.pt = DPI_HDR_PT_ZBW_CA;
switch (conf->direction) {
case RTE_DMA_DIR_DEV_TO_MEM:
- header->s.xtype = DPI_XTYPE_INBOUND;
- header->s.lport = conf->src_port.pcie.coreid;
- header->s.fport = 0;
- header->s.pvfe = 1;
+ header->cn9k.xtype = DPI_XTYPE_INBOUND;
+ header->cn9k.lport = conf->src_port.pcie.coreid;
+ header->cn9k.fport = 0;
+ header->cn9k.pvfe = 1;
break;
case RTE_DMA_DIR_MEM_TO_DEV:
- header->s.xtype = DPI_XTYPE_OUTBOUND;
- header->s.lport = 0;
- header->s.fport = conf->dst_port.pcie.coreid;
- header->s.pvfe = 1;
+ header->cn9k.xtype = DPI_XTYPE_OUTBOUND;
+ header->cn9k.lport = 0;
+ header->cn9k.fport = conf->dst_port.pcie.coreid;
+ header->cn9k.pvfe = 1;
break;
case RTE_DMA_DIR_MEM_TO_MEM:
- header->s.xtype = DPI_XTYPE_INTERNAL_ONLY;
- header->s.lport = 0;
- header->s.fport = 0;
- header->s.pvfe = 0;
+ header->cn9k.xtype = DPI_XTYPE_INTERNAL_ONLY;
+ header->cn9k.lport = 0;
+ header->cn9k.fport = 0;
+ header->cn9k.pvfe = 0;
break;
case RTE_DMA_DIR_DEV_TO_DEV:
- header->s.xtype = DPI_XTYPE_EXTERNAL_ONLY;
- header->s.lport = conf->src_port.pcie.coreid;
- header->s.fport = conf->dst_port.pcie.coreid;
+ header->cn9k.xtype = DPI_XTYPE_EXTERNAL_ONLY;
+ header->cn9k.lport = conf->src_port.pcie.coreid;
+ header->cn9k.fport = conf->dst_port.pcie.coreid;
};
for (i = 0; i < conf->nb_desc; i++) {
@@ -103,6 +103,63 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t
vchan,
plt_err("Failed to allocate for comp_data");
return -ENOMEM;
}
+ comp_data->cdata = DPI_REQ_CDATA;
+ dpivf->conf.c_desc.compl_ptr[i] = comp_data;
+ };
+ dpiv
[dpdk-dev] [PATCH] maintainers: Update for OcteonTx2 DMA and EP
Replace the maintainers for OcteonTx2 DMA and EP drivers. Signed-off-by: Radha Mohan Chintakuntla --- MAINTAINERS | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index a720cf672e..214515060a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1258,12 +1258,14 @@ F: drivers/raw/dpaa2_cmdif/ F: doc/guides/rawdevs/dpaa2_cmdif.rst Marvell OCTEON TX2 DMA -M: Satha Rao +M: Radha Mohan Chintakuntla +M: Veerasenareddy Burru F: drivers/raw/octeontx2_dma/ F: doc/guides/rawdevs/octeontx2_dma.rst Marvell OCTEON TX2 EP -M: Mahipal Challa +M: Radha Mohan Chintakuntla +M: Veerasenareddy Burru F: drivers/raw/octeontx2_ep/ F: doc/guides/rawdevs/octeontx2_ep.rst -- 2.24.1
[dpdk-dev] [PATCH 1/2] raw/octeontx2_dma: Assign pem_id as lport for non-internal DMA
DPI needs to know the PEM number for all external transfers.
Signed-off-by: Radha Mohan Chintakuntla
Reviewed-by: Satha Koteswara Rao Kottidi
Reviewed-by: Satananda Burla
---
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 2 ++
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
index 5b496446c..a1b94ce1d 100644
--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
@@ -201,6 +201,8 @@ otx2_dpi_rawdev_enqueue_bufs(struct rte_rawdev *dev,
index += 4;
hdr->s.fport = 0;
hdr->s.lport = 0;
+ if (ctx->xtype != DPI_XTYPE_INTERNAL_ONLY)
+ hdr->s.lport = ctx->pem_id;
/* For inbound case, src pointers are last pointers.
* For all other cases, src pointers are first pointers.
diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
index 9ebb25988..81740e84b 100644
--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
@@ -140,6 +140,7 @@ struct dpi_dma_queue_ctx_s {
uint16_t req_type:2;
uint16_t use_lock:1;
uint16_t deallocv;
+ uint16_t pem_id;
struct dpi_cring_data_s *c_ring;
};
--
2.24.1
[dpdk-dev] [PATCH 2/2] raw/octeontx2_dma: Add support in case of multiple DPI blocks
This patch adds support for multiple DPI blocks by removing the fixed
macro that was writing to same sysfs entry for different DPI blocks.
Signed-off-by: Radha Mohan Chintakuntla
Reviewed-by: Satananda Burla
---
drivers/raw/octeontx2_dma/otx2_dpi_msg.c| 18 +-
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 4 ++--
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 4 ++--
3 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_msg.c
b/drivers/raw/octeontx2_dma/otx2_dpi_msg.c
index aa361cb8a..655de216a 100644
--- a/drivers/raw/octeontx2_dma/otx2_dpi_msg.c
+++ b/drivers/raw/octeontx2_dma/otx2_dpi_msg.c
@@ -39,14 +39,14 @@ union dpi_mbox_message_u {
};
static inline int
-send_msg_to_pf(const char *value, int size)
+send_msg_to_pf(struct rte_pci_addr *pci, const char *value, int size)
{
char buff[255] = { 0 };
int res, fd;
res = snprintf(buff, sizeof(buff), "%s/" PCI_PRI_FMT "/%s",
- rte_pci_get_sysfs_path(), DPI_PF_DBDF_DOMAIN,
- DPI_PF_DBDF_BUS, DPI_PF_DBDF_DEVICE & 0x7,
+ rte_pci_get_sysfs_path(), pci->domain,
+ pci->bus, DPI_PF_DBDF_DEVICE & 0x7,
DPI_PF_DBDF_FUNCTION & 0x7, DPI_PF_MBOX_SYSFS_ENTRY);
if ((res < 0) || ((size_t)res > sizeof(buff)))
return -ERANGE;
@@ -63,20 +63,20 @@ send_msg_to_pf(const char *value, int size)
}
int
-otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t gaura)
+otx2_dpi_queue_open(struct dpi_vf_s *dpivf, uint32_t size, uint32_t gaura)
{
union dpi_mbox_message_u mbox_msg;
int ret = 0;
/* DPI PF driver expects vfid starts from index 0 */
- mbox_msg.s.vfid = vf_id;
+ mbox_msg.s.vfid = dpivf->vf_id;
mbox_msg.s.cmd = DPI_QUEUE_OPEN;
mbox_msg.s.csize = size;
mbox_msg.s.aura = gaura;
mbox_msg.s.sso_pf_func = otx2_sso_pf_func_get();
mbox_msg.s.npa_pf_func = otx2_npa_pf_func_get();
- ret = send_msg_to_pf((const char *)&mbox_msg,
+ ret = send_msg_to_pf(&dpivf->dev->addr, (const char *)&mbox_msg,
sizeof(mbox_msg));
if (ret < 0)
otx2_dpi_dbg("Failed to send mbox message to dpi pf");
@@ -85,16 +85,16 @@ otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t
gaura)
}
int
-otx2_dpi_queue_close(uint16_t vf_id)
+otx2_dpi_queue_close(struct dpi_vf_s *dpivf)
{
union dpi_mbox_message_u mbox_msg;
int ret = 0;
/* DPI PF driver expects vfid starts from index 0 */
- mbox_msg.s.vfid = vf_id;
+ mbox_msg.s.vfid = dpivf->vf_id;
mbox_msg.s.cmd = DPI_QUEUE_CLOSE;
- ret = send_msg_to_pf((const char *)&mbox_msg,
+ ret = send_msg_to_pf(&dpivf->dev->addr, (const char *)&mbox_msg,
sizeof(mbox_msg));
if (ret < 0)
otx2_dpi_dbg("Failed to send mbox message to dpi pf");
diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
index a1b94ce1d..efdba2779 100644
--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
@@ -60,7 +60,7 @@ dma_queue_finish(struct dpi_vf_s *dpivf)
reg = otx2_read64(dpivf->vf_bar0 + DPI_VDMA_SADDR);
}
- if (otx2_dpi_queue_close(dpivf->vf_id) < 0)
+ if (otx2_dpi_queue_close(dpivf) < 0)
return -EACCES;
rte_mempool_put(dpivf->chunk_pool, dpivf->base_ptr);
@@ -323,7 +323,7 @@ otx2_dpi_rawdev_configure(const struct rte_rawdev *dev,
rte_rawdev_obj_t config,
otx2_write64(0, dpivf->vf_bar0 + DPI_VDMA_REQQ_CTL);
otx2_write64(((uint64_t)buf >> 7) << 7,
dpivf->vf_bar0 + DPI_VDMA_SADDR);
- if (otx2_dpi_queue_open(dpivf->vf_id, DPI_CHUNK_SIZE, gaura) < 0) {
+ if (otx2_dpi_queue_open(dpivf, DPI_CHUNK_SIZE, gaura) < 0) {
otx2_err("Unable to open DPI VF %d", dpivf->vf_id);
rte_mempool_put(conf->chunk_pool, buf);
return -EACCES;
diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
index 81740e84b..2bc9e3da3 100644
--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
@@ -190,8 +190,8 @@ union dpi_dma_instr_hdr_u {
} s;
};
-int otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t gaura);
-int otx2_dpi_queue_close(uint16_t vf_id);
+int otx2_dpi_queue_open(struct dpi_vf_s *dpivf, uint32_t size, uint32_t gaura);
+int otx2_dpi_queue_close(struct dpi_vf_s *dpivf);
int test_otx2_dma_rawdev(uint16_t val);
#endif /* _DPI_RAWDEV_H_ */
--
2.24.1
[dpdk-dev] [PATCH RESEND 1/2] raw/octeontx2_dma: Assign pem_id as lport for non-internal DMA
DPI needs to know the PEM number for all external transfers.
Signed-off-by: Radha Mohan Chintakuntla
Reviewed-by: Satha Koteswara Rao Kottidi
Reviewed-by: Satananda Burla
---
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 2 ++
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
index 5b496446c..a1b94ce1d 100644
--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
@@ -201,6 +201,8 @@ otx2_dpi_rawdev_enqueue_bufs(struct rte_rawdev *dev,
index += 4;
hdr->s.fport = 0;
hdr->s.lport = 0;
+ if (ctx->xtype != DPI_XTYPE_INTERNAL_ONLY)
+ hdr->s.lport = ctx->pem_id;
/* For inbound case, src pointers are last pointers.
* For all other cases, src pointers are first pointers.
diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
index 9ebb25988..81740e84b 100644
--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
@@ -140,6 +140,7 @@ struct dpi_dma_queue_ctx_s {
uint16_t req_type:2;
uint16_t use_lock:1;
uint16_t deallocv;
+ uint16_t pem_id;
struct dpi_cring_data_s *c_ring;
};
--
2.24.1
[dpdk-dev] [PATCH RESEND 2/2] raw/octeontx2_dma: Add support in case of multiple DPI blocks
This patch adds support for multiple DPI blocks by removing the fixed
macro that was writing to same sysfs entry for different DPI blocks.
Signed-off-by: Radha Mohan Chintakuntla
Reviewed-by: Satananda Burla
---
drivers/raw/octeontx2_dma/otx2_dpi_msg.c| 18 +-
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 4 ++--
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 4 ++--
3 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_msg.c
b/drivers/raw/octeontx2_dma/otx2_dpi_msg.c
index aa361cb8a..655de216a 100644
--- a/drivers/raw/octeontx2_dma/otx2_dpi_msg.c
+++ b/drivers/raw/octeontx2_dma/otx2_dpi_msg.c
@@ -39,14 +39,14 @@ union dpi_mbox_message_u {
};
static inline int
-send_msg_to_pf(const char *value, int size)
+send_msg_to_pf(struct rte_pci_addr *pci, const char *value, int size)
{
char buff[255] = { 0 };
int res, fd;
res = snprintf(buff, sizeof(buff), "%s/" PCI_PRI_FMT "/%s",
- rte_pci_get_sysfs_path(), DPI_PF_DBDF_DOMAIN,
- DPI_PF_DBDF_BUS, DPI_PF_DBDF_DEVICE & 0x7,
+ rte_pci_get_sysfs_path(), pci->domain,
+ pci->bus, DPI_PF_DBDF_DEVICE & 0x7,
DPI_PF_DBDF_FUNCTION & 0x7, DPI_PF_MBOX_SYSFS_ENTRY);
if ((res < 0) || ((size_t)res > sizeof(buff)))
return -ERANGE;
@@ -63,20 +63,20 @@ send_msg_to_pf(const char *value, int size)
}
int
-otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t gaura)
+otx2_dpi_queue_open(struct dpi_vf_s *dpivf, uint32_t size, uint32_t gaura)
{
union dpi_mbox_message_u mbox_msg;
int ret = 0;
/* DPI PF driver expects vfid starts from index 0 */
- mbox_msg.s.vfid = vf_id;
+ mbox_msg.s.vfid = dpivf->vf_id;
mbox_msg.s.cmd = DPI_QUEUE_OPEN;
mbox_msg.s.csize = size;
mbox_msg.s.aura = gaura;
mbox_msg.s.sso_pf_func = otx2_sso_pf_func_get();
mbox_msg.s.npa_pf_func = otx2_npa_pf_func_get();
- ret = send_msg_to_pf((const char *)&mbox_msg,
+ ret = send_msg_to_pf(&dpivf->dev->addr, (const char *)&mbox_msg,
sizeof(mbox_msg));
if (ret < 0)
otx2_dpi_dbg("Failed to send mbox message to dpi pf");
@@ -85,16 +85,16 @@ otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t
gaura)
}
int
-otx2_dpi_queue_close(uint16_t vf_id)
+otx2_dpi_queue_close(struct dpi_vf_s *dpivf)
{
union dpi_mbox_message_u mbox_msg;
int ret = 0;
/* DPI PF driver expects vfid starts from index 0 */
- mbox_msg.s.vfid = vf_id;
+ mbox_msg.s.vfid = dpivf->vf_id;
mbox_msg.s.cmd = DPI_QUEUE_CLOSE;
- ret = send_msg_to_pf((const char *)&mbox_msg,
+ ret = send_msg_to_pf(&dpivf->dev->addr, (const char *)&mbox_msg,
sizeof(mbox_msg));
if (ret < 0)
otx2_dpi_dbg("Failed to send mbox message to dpi pf");
diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
index a1b94ce1d..efdba2779 100644
--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
@@ -60,7 +60,7 @@ dma_queue_finish(struct dpi_vf_s *dpivf)
reg = otx2_read64(dpivf->vf_bar0 + DPI_VDMA_SADDR);
}
- if (otx2_dpi_queue_close(dpivf->vf_id) < 0)
+ if (otx2_dpi_queue_close(dpivf) < 0)
return -EACCES;
rte_mempool_put(dpivf->chunk_pool, dpivf->base_ptr);
@@ -323,7 +323,7 @@ otx2_dpi_rawdev_configure(const struct rte_rawdev *dev,
rte_rawdev_obj_t config,
otx2_write64(0, dpivf->vf_bar0 + DPI_VDMA_REQQ_CTL);
otx2_write64(((uint64_t)buf >> 7) << 7,
dpivf->vf_bar0 + DPI_VDMA_SADDR);
- if (otx2_dpi_queue_open(dpivf->vf_id, DPI_CHUNK_SIZE, gaura) < 0) {
+ if (otx2_dpi_queue_open(dpivf, DPI_CHUNK_SIZE, gaura) < 0) {
otx2_err("Unable to open DPI VF %d", dpivf->vf_id);
rte_mempool_put(conf->chunk_pool, buf);
return -EACCES;
diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
index 81740e84b..2bc9e3da3 100644
--- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
+++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
@@ -190,8 +190,8 @@ union dpi_dma_instr_hdr_u {
} s;
};
-int otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t gaura);
-int otx2_dpi_queue_close(uint16_t vf_id);
+int otx2_dpi_queue_open(struct dpi_vf_s *dpivf, uint32_t size, uint32_t gaura);
+int otx2_dpi_queue_close(struct dpi_vf_s *dpivf);
int test_otx2_dma_rawdev(uint16_t val);
#endif /* _DPI_RAWDEV_H_ */
--
2.24.1
