Re: [dpdk-dev] [PATCH v2] net/qede: move SPDX tags to source files

2018-07-15 Thread Hemant

  Acked-by: Hemant Agrawal 


Re: [dpdk-dev] [PATCH v2] net/bnx2x: move SPDX tags to source files

2018-07-15 Thread Hemant

Hi Rasesh

On 7/14/2018 7:03 AM, Rasesh Mody wrote:

diff --git a/drivers/net/bnx2x/bnx2x_stats.h b/drivers/net/bnx2x/bnx2x_stats.h
index 6fcaf60..107ef20 100644
--- a/drivers/net/bnx2x/bnx2x_stats.h
+++ b/drivers/net/bnx2x/bnx2x_stats.h
@@ -1,4 +1,4 @@
-/*-
+/* SPDX-License-Identifier: BSD-3-Clause
   * Copyright (c) 2007-2013 Cavium Inc. All rights reserved.
   *
   * Eric Davis
@@ -9,8 +9,6 @@
   * Copyright (c) 2015-2018 Cavium Inc.
   * All rights reserved.
   * www.cavium.com
- *
- * See LICENSE.bnx2x_pmd for copyright and licensing details.
   */
  

I see that some of the files have the Cavium copyright two times (like 
above).  you may want to clean it in future patch.



 Acked-by: Hemant Agrawal 


Re: [dpdk-dev] [PATCH v3 1/2] eal: remove deprecated function returning mbuf pool ops name

2018-08-08 Thread Hemant




On 8/8/2018 3:04 AM, Olivier Matz wrote:

From: Olivier Matz 

rte_eal_mbuf_default_mempool_ops() is replaced by
rte_mbuf_best_mempool_ops().

Signed-off-by: Olivier Matz 
Reviewed-by: Anatoly Burakov 
Acked-by: Santosh Shukla 
---

  Acked-by: Hemant Agrawal 


Re: [dpdk-dev] [PATCH v3 2/2] eal: remove experimental tag from user mbuf pool ops func

2018-08-08 Thread Hemant




On 8/8/2018 3:04 AM, Olivier Matz wrote:

From: Olivier Matz 

Remove experimental tag from rte_eal_mbuf_user_pool_ops().

Signed-off-by: Olivier Matz 
Acked-by: Santosh Shukla 
---

  Acked-by: Hemant Agrawal 



Re: [dpdk-dev] [PATCH] eal: force IOVA mode to physical

2018-08-29 Thread Hemant

On 8/29/2018 9:28 PM, eric zhang wrote:

This patch adds a configuration option to force the IOVA mode to
physical address (PA). There exists virtual devices that are not
directly attached to the PCI bus, and therefore the auto detection
of the IOVA mode based on probing the PCI bus and IOMMU configuration
may not report the required addressing mode. Having the configuration
option permits the mode to be explicitly configured in this scenario.

Signed-off-by: eric zhang 
---
  lib/librte_eal/linuxapp/eal/eal.c | 7 +++

you will also need the same in bsdapp/eal


  1 file changed, 7 insertions(+)

diff --git a/lib/librte_eal/linuxapp/eal/eal.c 
b/lib/librte_eal/linuxapp/eal/eal.c
index e0b5ae1..bee4aed 100644
--- a/lib/librte_eal/linuxapp/eal/eal.c
+++ b/lib/librte_eal/linuxapp/eal/eal.c
@@ -805,6 +805,7 @@ static void rte_eal_init_alert(const char *msg)
return -1;
}
  
+#ifndef RTE_EAL_IOVA_MODE_PA

Add the default option as 'n'  in config/common_base

/* autodetect the iova mapping mode (default is iova_pa) */
rte_eal_get_configuration()->iova_mode = rte_bus_get_iommu_class();
  
@@ -816,6 +817,12 @@ static void rte_eal_init_alert(const char *msg)

"Some devices want IOVA as VA but PA will be used because.. 
"
"KNI module inserted\n");
}
+#else
+   /* Force iova mapping mode to be physical address */
+   rte_eal_get_configuration()->iova_mode = RTE_IOVA_PA;
+   RTE_LOG(WARNING, EAL,
+   "Force the iova mapping mode to be physical address\n");
+#endif
  
  	if (internal_config.no_hugetlbfs == 0 &&

internal_config.process_type != RTE_PROC_SECONDARY &&




Re: [dpdk-dev] [PATCH 1/8] net/mvneta: add neta PMD skeleton

2018-08-30 Thread Hemant

Hi,

On 8/28/2018 8:40 PM, Andrzej Ostruszka wrote:

diff --git a/doc/guides/nics/mvneta.rst b/doc/guides/nics/mvneta.rst
new file mode 100644
index 000..6e9f511
--- /dev/null
+++ b/doc/guides/nics/mvneta.rst
@@ -0,0 +1,182 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright(c) 2018 Marvell International Ltd.
+Copyright(c) 2018 Semihalf.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions
+are met:
+
+  * Redistributions of source code must retain the above copyright
+notice, this list of conditions and the following disclaimer.
+  * Redistributions in binary form must reproduce the above copyright
+notice, this list of conditions and the following disclaimer in
+the documentation and/or other materials provided with the
+distribution.
+  * Neither the name of the copyright holder nor the names of its
+contributors may be used to endorse or promote products derived
+from this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Since you are already providing the SPDX license identifier, you should 
avoid copying the full BSD text again in the files.




Re: [dpdk-dev] [PATCH] eal: force IOVA mode to physical

2018-08-30 Thread Hemant

Hi,

On 8/30/2018 3:13 PM, Gaëtan Rivet wrote:

Hi,

On Thu, Aug 30, 2018 at 10:09:04AM +0100, Burakov, Anatoly wrote:

On 29-Aug-18 4:58 PM, eric zhang wrote:

This patch adds a configuration option to force the IOVA mode to
physical address (PA). There exists virtual devices that are not
directly attached to the PCI bus, and therefore the auto detection
of the IOVA mode based on probing the PCI bus and IOMMU configuration
may not report the required addressing mode. Having the configuration
option permits the mode to be explicitly configured in this scenario.

Signed-off-by: eric zhang 
---

Defining this at compile-time seems like an overkill. Wouldn't it be better
to just add an EAL command-line option to force IOVA mode to a particular
value?

That is a good suggestion.

--
Thanks,
Anatoly

What is the bus of these devices and why not implement get_iommu_class
in it?
There are cases, where you are using dpdk libraries with external 
libraries and you need to change the default behavior DPDK lib to use 
physical address instead of virtual address.

Providing an option to user will help.




Re: [dpdk-dev] [PATCH v2 02/13] net/dpaa: fix jumbo buffer config

2018-09-18 Thread Hemant




On 9/18/2018 7:33 PM, Thomas Monjalon wrote:

18/09/2018 15:31, Hemant Agrawal:

Avoid return after the jumbo buffer config in dev config API

Fixes: 9658ac3a4ef6 ("net/dpaa: set the correct frame size in device MTU")
Cc: sta...@dpdk.org

Signed-off-by: Hemant Agrawal 

Thanks for adding some comments in this series.

About this fix, would it be easier to understand if explaining
what is the bug first?



yes. I can be more specific here.
1. the dev->data->mtu was not getting updated earlier for the jumbo 
buffer config.
2. we don't expect to return error, if this config fails. A debug err 
log is ok.  DPAA1 - supports jumbo by default, enable/disable may give 
errors.


Re: [dpdk-dev] [PATCH 07/21] net/atlantic: hardware register access routines

2018-09-23 Thread Hemant

Hi Igor,

On 9/7/2018 8:51 PM, Igor Russkikh wrote:

Signed-off-by: Igor Russkikh 
---
  drivers/net/atlantic/atl_hw_regs.c | 58 +
  drivers/net/atlantic/atl_hw_regs.h | 59 ++
  2 files changed, 117 insertions(+)
  create mode 100644 drivers/net/atlantic/atl_hw_regs.c
  create mode 100644 drivers/net/atlantic/atl_hw_regs.h

diff --git a/drivers/net/atlantic/atl_hw_regs.c 
b/drivers/net/atlantic/atl_hw_regs.c
new file mode 100644
index 0..7301d08e7
--- /dev/null
+++ b/drivers/net/atlantic/atl_hw_regs.c
@@ -0,0 +1,58 @@
+/*
+ * aQuantia Corporation Network Driver
+ * Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ */


DPDK is a open source BSD-3 licensed framework. GPL license files are 
not allowed in DPDK unless:

1. They are part of kernel module (e.g. KNI)
2. They are dual licensed and they support BSD-3 license as well.

So, please submit single or dual BSD-3 licensed source code.



Re: [dpdk-dev] [PATCH v2 2/2] eal: force IOVA to particular mode

2018-09-26 Thread Hemant




On 9/19/2018 12:40 AM, eric zhang wrote:

This patch uses EAL option "--iova-mode" to force the IOVA mode to a
particular value. There exists virtual devices that are not directly
attached to the PCI bus, and therefore the auto detectioni of the IOVA
mode based on probing the PCI bus and IOMMU configuration may not
report the required addressing mode. Using the EAL option permits the
mode to be explicitly configured in this scenario.

Signed-off-by: eric zhang 

Acked-by: Hemant Agrawal 


Re: [dpdk-dev] [PATCH v2 1/2] eal: add eal option to configure iova mode

2018-09-26 Thread Hemant



On 9/19/2018 12:40 AM, eric zhang wrote:

From: Santosh Shukla 

In the case of user don't want to use bus iova scheme and want
to override.

For that, Adding eal option --iova-mode= where valid input
string is 'pa' or 'va'.

Signed-off-by: Santosh Shukla 
Signed-off-by: Jerin Jacob 

Just wondering if you want to add some description in:
1. Prog Guide - EAL section
2. EAL Command line options for testpmd 
(https://doc.dpdk.org/guides/testpmd_app_ug/run_app.html?highlight=eal)


Otherwise LGTM

Acked-by: Hemant Agrawal 

---
  lib/librte_eal/common/eal_common_options.c | 30 ++
  lib/librte_eal/common/eal_internal_cfg.h   |  1 +
  lib/librte_eal/common/eal_options.h|  2 ++
  3 files changed, 33 insertions(+)

diff --git a/lib/librte_eal/common/eal_common_options.c 
b/lib/librte_eal/common/eal_common_options.c
index 996a034..ab2a28c 100644
--- a/lib/librte_eal/common/eal_common_options.c
+++ b/lib/librte_eal/common/eal_common_options.c
@@ -82,6 +82,7 @@
{OPT_HELP,  0, NULL, OPT_HELP_NUM },
{OPT_HUGE_DIR,  1, NULL, OPT_HUGE_DIR_NUM },
{OPT_HUGE_UNLINK,   0, NULL, OPT_HUGE_UNLINK_NUM  },
+   {OPT_IOVA_MODE, 1, NULL, OPT_IOVA_MODE_NUM},
{OPT_LCORES,1, NULL, OPT_LCORES_NUM   },
{OPT_LOG_LEVEL, 1, NULL, OPT_LOG_LEVEL_NUM},
{OPT_MASTER_LCORE,  1, NULL, OPT_MASTER_LCORE_NUM },
@@ -218,6 +219,7 @@ struct device_option {
  #endif
internal_cfg->vmware_tsc_map = 0;
internal_cfg->create_uio_dev = 0;
+   internal_cfg->iova_mode = -1;
internal_cfg->mbuf_pool_ops_name = RTE_MBUF_DEFAULT_MEMPOOL_OPS;
  }
  
@@ -994,6 +996,25 @@ static int xdigit2val(unsigned char c)

return RTE_PROC_INVALID;
  }
  
+static int

+eal_parse_iova_mode(const char *name)
+{
+   int mode;
+
+   if (name == NULL)
+   return -1;
+
+   if (!strcmp("pa", name))
+   mode = RTE_IOVA_PA;
+   else if (!strcmp("va", name))
+   mode = RTE_IOVA_VA;
+   else
+   return -1;
+
+   internal_config.iova_mode = mode;
+   return 0;
+}
+
  int
  eal_parse_common_option(int opt, const char *optarg,
struct internal_config *conf)
@@ -1158,6 +1179,13 @@ static int xdigit2val(unsigned char c)
}
core_parsed = 1;
break;
+   case OPT_IOVA_MODE_NUM:
+   if (eal_parse_iova_mode(optarg) < 0) {
+   RTE_LOG(ERR, EAL, "invalid parameters for --"
+   OPT_IOVA_MODE "\n");
+   return -1;
+   }
+   break;
  
  	/* don't know what to do, leave this to caller */

default:
@@ -1306,6 +1334,8 @@ static int xdigit2val(unsigned char c)
   "  -h, --help  This help\n"
   "\nEAL options for DEBUG use only:\n"
   "  --"OPT_HUGE_UNLINK"   Unlink hugepage files after init\n"
+  "  --"OPT_IOVA_MODE" Set iova mode. 'pa' for IOVA_PA\n"
+  "'va' for IOVA_VA\n"
   "  --"OPT_NO_HUGE"   Use malloc instead of hugetlbfs\n"
   "  --"OPT_NO_PCI"Disable PCI\n"
   "  --"OPT_NO_HPET"   Disable HPET\n"
diff --git a/lib/librte_eal/common/eal_internal_cfg.h 
b/lib/librte_eal/common/eal_internal_cfg.h
index fa6ccbe..29bf53f 100644
--- a/lib/librte_eal/common/eal_internal_cfg.h
+++ b/lib/librte_eal/common/eal_internal_cfg.h
@@ -83,6 +83,7 @@ struct internal_config {
const char *hugepage_dir; /**< specific hugetlbfs directory to 
use */
const char *mbuf_pool_ops_name;   /**< mbuf pool ops name */
unsigned num_hugepage_sizes;  /**< how many sizes on this system */
+   enum rte_iova_mode iova_mode ;/**< Set iova mode on this system  */
struct hugepage_info hugepage_info[MAX_HUGEPAGE_SIZES];
  };
  extern struct internal_config internal_config; /**< Global EAL configuration. 
*/
diff --git a/lib/librte_eal/common/eal_options.h 
b/lib/librte_eal/common/eal_options.h
index 30e6bb4..7786189 100644
--- a/lib/librte_eal/common/eal_options.h
+++ b/lib/librte_eal/common/eal_options.h
@@ -83,6 +83,8 @@ enum {
OPT_VFIO_INTR_NUM,
  #define OPT_VMWARE_TSC_MAP"vmware-tsc-map"
OPT_VMWARE_TSC_MAP_NUM,
+#define OPT_IOVA_MODE  "iova-mode"
+   OPT_IOVA_MODE_NUM,
OPT_LONG_MAX_NUM
  };
  




RE: [PATCH 1/2] license/README: fix pathnames and add MIT

2022-10-17 Thread Hemant Agrawal
> -Original Message-
> From: Stephen Hemminger 
> Sent: Tuesday, October 18, 2022 7:35 AM
> To: dev@dpdk.org
> Cc: techbo...@dpdk.org; Stephen Hemminger
> ; Ferruh Yigit 
> Subject: [PATCH 1/2] license/README: fix pathnames and add MIT
> 
> The pathnames in the license directory README are incorrect.
> The current repository puts license text in license/ not licenses/.

[Hemant] Can you break it into two parts:
1. for correcting the pathname   - this can be merged asap.
2. adding MIT license - this need to wait till GB approval.

> 
> Also, MIT license is used already in a couple of places so add the necessary
> entry in the README.
> 
> Signed-off-by: Stephen Hemminger 
> Acked-by: Ferruh Yigit 
> ---
>  license/README | 12 
>  1 file changed, 8 insertions(+), 4 deletions(-)
> 
> diff --git a/license/README b/license/README index
> 79dac86440a5..9def09058751 100644
> --- a/license/README
> +++ b/license/README
> @@ -58,7 +58,7 @@ DPDK Governing Board. Steps for any exception
> approval:
>  3. Technical Board then approach Governing Board for such limited approval
> for
> the given contribution only.
> 
> -Any approvals shall be documented in "Licenses/exceptions.txt" with record
> +Any approvals shall be documented in "license/exceptions.txt" with
> +record
>  dates.
> 
>  DPDK project supported licenses are:
> @@ -66,12 +66,16 @@ DPDK project supported licenses are:
>  1. BSD 3-clause "New" or "Revised" License
>   SPDX-License-Identifier: BSD-3-Clause
>   URL:
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fspdx.o
> rg%2Flicenses%2FBSD-3-
> Clause%23licenseText&data=05%7C01%7Chemant.agrawal%40nxp.com
> %7Ca245eb56f1874d041fc808dab0ad1edb%7C686ea1d3bc2b4c6fa92cd99c5c
> 301635%7C0%7C0%7C638016554840767354%7CUnknown%7CTWFpbGZsb3d
> 8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3
> D%7C3000%7C%7C%7C&sdata=g%2FGcP4bwbyrE9SrnOzXfY7sWyOz8Dp
> dQt0avgbzbcS4%3D&reserved=0
> - DPDK License text: licenses/bsd-3-clause.txt
> + DPDK License text: license/bsd-3-clause.txt
>  2. GNU General Public License v2.0 only
>   SPDX-License-Identifier: GPL-2.0
>   URL:
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fspdx.o
> rg%2Flicenses%2FGPL-
> 2.0.html%23licenseText&data=05%7C01%7Chemant.agrawal%40nxp.co
> m%7Ca245eb56f1874d041fc808dab0ad1edb%7C686ea1d3bc2b4c6fa92cd99c
> 5c301635%7C0%7C0%7C638016554840923577%7CUnknown%7CTWFpbGZsb
> 3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0
> %3D%7C3000%7C%7C%7C&sdata=O34mh2TxnfW8sJ1XpsN3cr2RKqA9V
> AYbASBbnZCyhIQ%3D&reserved=0
> - DPDK License text: licenses/gpl-2.0.txt
> + DPDK License text: license/gpl-2.0.txt
>  3. GNU Lesser General Public License v2.1
>   SPDX-License-Identifier: LGPL-2.1
>   URL:
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fspdx.o
> rg%2Flicenses%2FLGPL-
> 2.1.html%23licenseText&data=05%7C01%7Chemant.agrawal%40nxp.co
> m%7Ca245eb56f1874d041fc808dab0ad1edb%7C686ea1d3bc2b4c6fa92cd99c
> 5c301635%7C0%7C0%7C638016554840923577%7CUnknown%7CTWFpbGZsb
> 3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0
> %3D%7C3000%7C%7C%7C&sdata=byXGbi21IodQwVzgDv0k%2BtbmEW
> o427UDWmzLI0fGwV8%3D&reserved=0
> - DPDK License text: licenses/lgpl-2.1.txt
> + DPDK License text: license/lgpl-2.1.txt 4. MIT License
> + SPDX-License-Identifier: MIT
> + URL:
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fspdx.o
> rg%2Flicenses%2FMIT.html%23licenseText&data=05%7C01%7Chemant.
> agrawal%40nxp.com%7Ca245eb56f1874d041fc808dab0ad1edb%7C686ea1d3
> bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638016554840923577%7CUnknow
> n%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1ha
> WwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=s4sKYVR0d8HjkTPki
> sFM3IZE9Zfi7lVA9qHCOanqUsY%3D&reserved=0
> + DPDK License text: license/mit.txt
> --
> 2.35.1



RE: [PATCH v5 1/8] net/gve/base: introduce GVE PMD base code

2022-10-19 Thread Hemant Agrawal
> On 10/10/2022 11:17 AM, Junfeng Guo wrote:
> > The following base code is based on Google Virtual Ethernet (gve)
> > driver v1.3.0 under MIT license.
> > - gve_adminq.c
> > - gve_adminq.h
> > - gve_desc.h
> > - gve_desc_dqo.h
> > - gve_register.h
> > - gve.h
> >
> > The original code is in:
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgith
> > ub.com%2FGoogleCloudPlatform%2Fcompute-virtual-ethernet-
> linux%2F%2F&am
> >
> p;data=05%7C01%7Chemant.agrawal%40nxp.com%7C45cbc9718dcc40d04e4
> 508dab1
> >
> d82440%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6380178391
> 21579415
> > %7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIi
> LCJBTiI6I
> >
> k1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=LHunq53xMl8i
> W6%2B3scjZ
> > q0Bx7oF08yLWk424aw5lnwA%3D&reserved=0
> > tree/v1.3.0/google/gve
> >
> > Note that these code are not Intel files and they come from the kernel
> > community. The base code there has the statement of
> > SPDX-License-Identifier: (GPL-2.0 OR MIT). Here we just follow the
> > required MIT license as an exception to DPDK.
> >
> > Signed-off-by: Xiaoyun Li 
> > Signed-off-by: Haiyue Wang 
> > Signed-off-by: Junfeng Guo 
> 
> <...>
> 
> > diff --git a/drivers/net/gve/base/gve.h b/drivers/net/gve/base/gve.h
> > new file mode 100644 index 00..1b0d59b639
> > --- /dev/null
> > +++ b/drivers/net/gve/base/gve.h
> > @@ -0,0 +1,58 @@
> > +/* SPDX-License-Identifier: MIT
> > + * Google Virtual Ethernet (gve) driver
> > + * Version: 1.3.0
> 
> There is a version macro in the code, is version information required in the
> file comment?
> 
> > + * Copyright (C) 2015-2022 Google, Inc.
> > + * Copyright(C) 2022 Intel Corporation
> 
> I don't know if it is OK to add Intel copyright, as far as I know this 
> requires big
> enough contribution to the code, if this is copy of existing code, may be only
> original copyright should exist.
> 
[Hemant] Yes, the general guideline is that one should add their copyright if 
they have big enough contribution.  But at the end it is a guideline - not the 
rule.
It is up-to the original copyright holder to object.

> cc'ed @Hemant and @Stephen for more comment.


RE: [PATCH v5 1/8] net/gve/base: introduce GVE PMD base code

2022-10-19 Thread Hemant Agrawal
> On 10/19/2022 4:13 PM, Hemant Agrawal wrote:
> >> On 10/10/2022 11:17 AM, Junfeng Guo wrote:
> >>> The following base code is based on Google Virtual Ethernet (gve)
> >>> driver v1.3.0 under MIT license.
> >>> - gve_adminq.c
> >>> - gve_adminq.h
> >>> - gve_desc.h
> >>> - gve_desc_dqo.h
> >>> - gve_register.h
> >>> - gve.h
> >>>
> >>> The original code is in:
> >>> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgi
> >>> th
> >>> ub.com%2FGoogleCloudPlatform%2Fcompute-virtual-ethernet-
> >> linux%2F%2F&am
> >>>
> >>
> p;data=05%7C01%7Chemant.agrawal%40nxp.com%7C45cbc9718dcc40d04e4
> >> 508dab1
> >>>
> >>
> d82440%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C6380178391
> >> 21579415
> >>> %7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2lu
> MzIi
> >> LCJBTiI6I
> >>>
> >>
> k1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=LHunq53xMl8i
> >> W6%2B3scjZ
> >>> q0Bx7oF08yLWk424aw5lnwA%3D&reserved=0
> >>> tree/v1.3.0/google/gve
> >>>
> >>> Note that these code are not Intel files and they come from the
> >>> kernel community. The base code there has the statement of
> >>> SPDX-License-Identifier: (GPL-2.0 OR MIT). Here we just follow the
> >>> required MIT license as an exception to DPDK.
> >>>
> >>> Signed-off-by: Xiaoyun Li 
> >>> Signed-off-by: Haiyue Wang 
> >>> Signed-off-by: Junfeng Guo 
> >>
> >> <...>
> >>
> >>> diff --git a/drivers/net/gve/base/gve.h b/drivers/net/gve/base/gve.h
> >>> new file mode 100644 index 00..1b0d59b639
> >>> --- /dev/null
> >>> +++ b/drivers/net/gve/base/gve.h
> >>> @@ -0,0 +1,58 @@
> >>> +/* SPDX-License-Identifier: MIT
> >>> + * Google Virtual Ethernet (gve) driver
> >>> + * Version: 1.3.0
> >>
> >> There is a version macro in the code, is version information required
> >> in the file comment?
> >>
> >>> + * Copyright (C) 2015-2022 Google, Inc.
> >>> + * Copyright(C) 2022 Intel Corporation
> >>
> >> I don't know if it is OK to add Intel copyright, as far as I know
> >> this requires big enough contribution to the code, if this is copy of
> >> existing code, may be only original copyright should exist.
> >>
> > [Hemant] Yes, the general guideline is that one should add their copyright 
> > if
> they have big enough contribution.  But at the end it is a guideline - not the
> rule.
> > It is up-to the original copyright holder to object.
> 
> Does this mean as long as original copyright holder did not object, it is OK 
> to
> add more copyright?
> I don't think they are represented or aware of it this change at all, I 
> believe
> we (as community) also have responsibility to make these things correct, in
> our capacity.

[Hemant] I tried to convey the same in decent words.  
Yes, it is incorrect to add copyright without major contribution change.
Intel team shall provide details about what is their contribution over the 
original code. Or they should remove their copyright

> >
> >> cc'ed @Hemant and @Stephen for more comment.



Re: [PATCH] examples/l2fwd: add check of Rx packets count

2022-11-02 Thread Hemant Agrawal



On 20-Jul-22 11:02 PM, Stephen Hemminger wrote:

On Wed, 25 May 2022 14:43:27 +0530
Rahul Bhansali  wrote:


An additional check is added to avoid extra processing if
receive packets are 0.

Performance impact: with Marvell OCTEON TX2 platform, observed an
improvement by ~14%.

Signed-off-by: Rahul Bhansali 

This makes sense. Could drop the unlikely() since in general unlikely
should be reserved for error cases. But doubt it matters at all.

Did a quick check the other examples do similar thing already.

Acked-by: Stephen Hemminger 

Acked-by: Hemant Agrawal 


RE: [PATCH 7/7] dpaax: replace zero length array with flex array

2023-01-15 Thread Hemant Agrawal
Acked-by: Hemant Agrawal 


Minutes of Technical Board Meeting, 2022-09-21

2023-01-23 Thread Hemant Agrawal
Members Attending: 5
- Aaron Conole
- Bruce Richardson
- Hemant Agrawal  (Chair)
- Honnappa Nagarahalli
- Jerin Jacob
- Kevin Traynor
- Konstantin Ananyev
- Maxime Coquelin
- Thomas Monjalon
- Stephen Hemminger

NOTE: The technical board meetings are on every second Wednesday at 
https://meet.jit.si/DPDK at 3 pm UTC. Meetings are public, and DPDK community 
members are welcome to attend.

NOTE: Next meeting will be on Wednesday 2022-10-05 @3pm UTC, and will be 
chaired by Jerin.

1) Patch "drivers/net: remove alias for virtual devices" - No significant 
advantage in removing the alias. It is suggested by Techboard, if someone can 
create it as a central framework to define such aliases.

2) l2reflect tool from Siemens : Techboard has accepted this application as an 
examples in DPDK.

3) meson version upgrade :  Though all are in favor of improving the meson 
version, but it has to be gradual process. Aaron, Thomas & Bruce will check 
when the lab, CI, github and Intel lab upgrades their meson version first.

4) The Userspace conference feedback was discussed, it was discussed to have 
the next summit in a different location in Europe.


RE: [EXT] Re: [dpdk-dev] [PATCH 2/4] cryptodev: promote asym APIs to stable

2023-02-02 Thread Hemant Agrawal
Hi Akhil

> 
> Can we promote the Asym APIs to stable now?

+1 for it


> 
> Regards,
> Akhil
> 
> >
> > On 07/09/2021 12:45, Akhil Goyal wrote:
> > >>> Do you think all the asym APIs are not eligible for promoting it
> > >>> to stable
> > >> APIs?
> > >>> I haven't seen any changes for quite some time and we cannot have
> > >>> it experimental Forever.
> > >>> The APIs which you think are expected to change, we can leave them
> > >>> as experimental And mark the others as stable.
> > >> We could potentially make capability related functions stable but
> > >> for others there are still some many uncertainties, another example:
> > >> Ecdsa op expects 'k' in "in the interval (1, n-1)", openssl pmd
> > >> will not even have function that accepts 'k' (although optionally
> > >> inverse of k yes), what should user put then here?
> > >>
> > >> This API needs more attention I believe, I can send patches for it
> > >> after 21.11 release.
> > >> My opinion is that we should push all this by another year.
> > >>
> > > Ok will drop this patch for now.
> > >
> >
> > Look since everyone is in alignment here, I am going to ask the symbol
> > bot to ignore the asym crypto APIs for the next year. Thanks for the
> > diligence on this, and thanks to Fan for sending me an FYI.
> >
> > Ray K


Re: [PATCH v2 5/5] devtools: ignore changes into bbdev experimental API

2023-09-05 Thread Hemant Agrawal



On 15-Jun-23 10:19 PM, Nicolas Chautru wrote:

Caution: This is an external email. Please take care when clicking links or 
opening attachments. When in doubt, report the message using the 'Report this 
email' button


Developpers are warned that the related fft experimental functions
do not preserve ABI, hence these can be waived.

%s/Developpers/Developers


Signed-off-by: Nicolas Chautru 
---
  devtools/libabigail.abignore | 4 +++-
  1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/devtools/libabigail.abignore b/devtools/libabigail.abignore
index 7a93de3ba1..09b8f156b5 100644
--- a/devtools/libabigail.abignore
+++ b/devtools/libabigail.abignore
@@ -30,7 +30,9 @@
  [suppress_type]
  type_kind = enum
  changed_enumerators = RTE_CRYPTO_ASYM_XFORM_ECPM, 
RTE_CRYPTO_ASYM_XFORM_TYPE_LIST_END
-
+; Ignore changes to bbdev FFT API which is experimental
+[suppress_type]
+name = rte_bbdev_fft_op
  
  ; Temporary exceptions till next major ABI version ;
  
--
2.34.1



Re: [PATCH v2 0/5] bbdev: API extension for 23.11

2023-09-05 Thread Hemant Agrawal

Hi Nic,

    One small comment in the commit message.

Acked-by: Hemant Agrawal 

Regards

Hemant

On 15-Jun-23 10:18 PM, Nicolas Chautru wrote:

Caution: This is an external email. Please take care when clicking links or 
opening attachments. When in doubt, report the message using the 'Report this 
email' button


v2: moving the new mld functions at the end of struct rte_bbdev to avoid
ABI offset changes based on feedback with Maxime.
Adding a commit to waive the FFT ABI warning since that experimental function
could break ABI (let me know if preferred to be merged with the FFT
commit causing the FFT change).


Including v1 for extending the bbdev api for 23.11.
The new MLD-TS is expected to be non ABI compatible, the other ones
should not break ABI.
I will send a deprecation notice in parallel.

This introduces a new operation (on top of FEC and FFT) to support
equalization for MLD-TS. There also more modular API extension for
existing FFT and FEC operation.

Thanks
Nic


Nicolas Chautru (5):
   bbdev: add operation type for MLDTS procession
   bbdev: add new capabilities for FFT processing
   bbdev: add new capability for FEC 5G UL processing
   bbdev: improving error handling for queue configuration
   devtools: ignore changes into bbdev experimental API

  devtools/libabigail.abignore|   4 +-
  doc/guides/prog_guide/bbdev.rst |  83 ++
  lib/bbdev/rte_bbdev.c   |  26 +++---
  lib/bbdev/rte_bbdev.h   |  76 +
  lib/bbdev/rte_bbdev_op.h| 143 +++-
  lib/bbdev/version.map   |   5 ++
  6 files changed, 323 insertions(+), 14 deletions(-)

--
2.34.1



RE: [PATCH v2 5/5] devtools: ignore changes into bbdev experimental API

2023-09-13 Thread Hemant Agrawal
Acked-by: Hemant Agrawal 

> -Original Message-
> From: Vargas, Hernan 
> Sent: Wednesday, September 13, 2023 2:03 AM
> To: Hemant Agrawal ; Chautru, Nicolas
> ; dev@dpdk.org; maxime.coque...@redhat.com
> Cc: Rix, Tom ; david.march...@redhat.com
> Subject: RE: [PATCH v2 5/5] devtools: ignore changes into bbdev experimental
> API
> Importance: High
> 
> Hi Hemant,
> 
> Your previous ack was under the [PATCH v2 0/5] email.
> Could you please place your ack for the patch under this email?
> 
> Thanks,
> Hernan
> 
> Acked-by: Hernan Vargas 
> 
> > -Original Message-
> > From: Hemant Agrawal 
> > Sent: Wednesday, September 6, 2023 1:17 AM
> > To: Chautru, Nicolas ; dev@dpdk.org;
> > maxime.coque...@redhat.com
> > Cc: Rix, Tom ; hemant.agra...@nxp.com;
> > david.march...@redhat.com; Vargas, Hernan 
> > Subject: Re: [PATCH v2 5/5] devtools: ignore changes into bbdev
> > experimental API
> >
> >
> > On 15-Jun-23 10:19 PM, Nicolas Chautru wrote:
> > > Caution: This is an external email. Please take care when clicking
> > > links or opening attachments. When in doubt, report the message
> > > using the 'Report this email' button
> > >
> > >
> > > Developpers are warned that the related fft experimental functions
> > > do not preserve ABI, hence these can be waived.
> > %s/Developpers/Developers
> > >
> > > Signed-off-by: Nicolas Chautru 
> > > ---
> > >   devtools/libabigail.abignore | 4 +++-
> > >   1 file changed, 3 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/devtools/libabigail.abignore
> > > b/devtools/libabigail.abignore index 7a93de3ba1..09b8f156b5 100644
> > > --- a/devtools/libabigail.abignore
> > > +++ b/devtools/libabigail.abignore
> > > @@ -30,7 +30,9 @@
> > >   [suppress_type]
> > >   type_kind = enum
> > >   changed_enumerators = RTE_CRYPTO_ASYM_XFORM_ECPM,
> > > RTE_CRYPTO_ASYM_XFORM_TYPE_LIST_END
> > > -
> > > +; Ignore changes to bbdev FFT API which is experimental
> > > +[suppress_type]
> > > +name = rte_bbdev_fft_op
> > >   
> > >   ; Temporary exceptions till next major ABI version ;
> > >   
> > > --
> > > 2.34.1
> > >


RE: [PATCH] app/bbdev: fix link with NXP LA12XX

2023-09-14 Thread Hemant Agrawal
Thanks
Acked-by: Hemant Agrawal 

> -Original Message-
> From: David Marchand 
> Sent: Wednesday, September 13, 2023 7:29 PM
> To: dev@dpdk.org
> Cc: maxime.coque...@redhat.com; sta...@dpdk.org; Nicolas Chautru
> ; Hemant Agrawal ;
> Akhil Goyal 
> Subject: [PATCH] app/bbdev: fix link with NXP LA12XX
> Importance: High
> 
> The LA12XX driver was not linked to the dpdk-test-bbdev tool because of
> what looks like a rebase issue.
> 
> Fixes: 2b504721bfda ("app/bbdev: enable la12xx")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: David Marchand 
> ---
>  app/test-bbdev/meson.build | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/app/test-bbdev/meson.build b/app/test-bbdev/meson.build
> index cd6a5089d5..926e0a5271 100644
> --- a/app/test-bbdev/meson.build
> +++ b/app/test-bbdev/meson.build
> @@ -23,6 +23,6 @@ endif
>  if dpdk_conf.has('RTE_BASEBAND_ACC')
>  deps += ['baseband_acc']
>  endif
> -if dpdk_conf.has('RTE_LIBRTE_PMD_BBDEV_LA12XX')
> +if dpdk_conf.has('RTE_BASEBAND_LA12XX')
>  deps += ['baseband_la12xx']
>  endif
> --
> 2.41.0



RE: [PATCH 1/2] crypto/dpaa2_sec: fix debug prints

2023-09-16 Thread Hemant Agrawal
Acked-by: Hemant Agrawal 


RE: [PATCH 09/36] net/dpaa: fix Rx and Tx queue state

2023-09-16 Thread Hemant Agrawal
Acked-by: Hemant Agrawal 

> -Original Message-
> From: Jie Hai 
> Sent: Friday, September 8, 2023 4:59 PM
> To: dev@dpdk.org; Hemant Agrawal ; Sachin
> Saxena ; Lijun Ou ; Ferruh
> Yigit ; Konstantin Ananyev
> <"konstantin.v.ananyev@yandex.rukonstantin.ananyev"@huawei.com>;
> Thomas Monjalon ; Chengwen Feng
> 
> Cc: haij...@huawei.com; lihuis...@huawei.com
> Subject: [PATCH 09/36] net/dpaa: fix Rx and Tx queue state
> Importance: High
> 
> The DPDK framework reports the queue state, which is stored in
> dev->data->tx_queue_state and dev->data->rx_queue_state. The
> state is maintained by the driver. Users may determine whether a queue
> participates in packet forwarding based on the state.
> Therefore, the driver needs to modify the queue state in time according to
> the actual situation.
> 
> Fixes: 9ad9ff476cac ("ethdev: add queue state in queried queue
> information")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Jie Hai 
> ---
>  drivers/net/dpaa/dpaa_ethdev.c | 12 
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/net/dpaa/dpaa_ethdev.c
> b/drivers/net/dpaa/dpaa_ethdev.c index a6c86113d125..ef4c06db6a4d
> 100644
> --- a/drivers/net/dpaa/dpaa_ethdev.c
> +++ b/drivers/net/dpaa/dpaa_ethdev.c
> @@ -399,6 +399,7 @@ static void dpaa_interrupt_handler(void *param)
> static int dpaa_eth_dev_start(struct rte_eth_dev *dev)  {
>   struct dpaa_if *dpaa_intf = dev->data->dev_private;
> + uint16_t i;
> 
>   PMD_INIT_FUNC_TRACE();
> 
> @@ -413,12 +414,18 @@ static int dpaa_eth_dev_start(struct rte_eth_dev
> *dev)
> 
>   fman_if_enable_rx(dev->process_private);
> 
> + for (i = 0; i < dev->data->nb_rx_queues; i++)
> + dev->data->rx_queue_state[i] =
> RTE_ETH_QUEUE_STATE_STARTED;
> + for (i = 0; i < dev->data->nb_tx_queues; i++)
> + dev->data->tx_queue_state[i] =
> RTE_ETH_QUEUE_STATE_STARTED;
> +
>   return 0;
>  }
> 
>  static int dpaa_eth_dev_stop(struct rte_eth_dev *dev)  {
>   struct fman_if *fif = dev->process_private;
> + uint16_t i;
> 
>   PMD_INIT_FUNC_TRACE();
>   dev->data->dev_started = 0;
> @@ -427,6 +434,11 @@ static int dpaa_eth_dev_stop(struct rte_eth_dev
> *dev)
>   fman_if_disable_rx(fif);
>   dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
> 
> + for (i = 0; i < dev->data->nb_rx_queues; i++)
> + dev->data->rx_queue_state[i] =
> RTE_ETH_QUEUE_STATE_STOPPED;
> + for (i = 0; i < dev->data->nb_tx_queues; i++)
> + dev->data->tx_queue_state[i] =
> RTE_ETH_QUEUE_STATE_STOPPED;
> +
>   return 0;
>  }
> 
> --
> 2.30.0



RE: [PATCH 10/36] net/dpaa2: fix Rx and Tx queue state

2023-09-16 Thread Hemant Agrawal
Acked-by: Hemant Agrawal 

> -Original Message-
> From: Jie Hai 
> Sent: Friday, September 8, 2023 4:59 PM
> To: dev@dpdk.org; Hemant Agrawal ; Sachin
> Saxena ; Thomas Monjalon
> ; Konstantin Ananyev
> <"konstantin.v.ananyev@yandex.rukonstantin.ananyev"@huawei.com>;
> Chengwen Feng ; Ferruh Yigit
> ; Lijun Ou 
> Cc: haij...@huawei.com; lihuis...@huawei.com
> Subject: [PATCH 10/36] net/dpaa2: fix Rx and Tx queue state
> Importance: High
> 
> The DPDK framework reports the queue state, which is stored in
> dev->data->tx_queue_state and dev->data->rx_queue_state. The
> state is maintained by the driver. Users may determine whether a queue
> participates in packet forwarding based on the state.
> Therefore, the driver needs to modify the queue state in time according to
> the actual situation.
> 
> Fixes: 9ad9ff476cac ("ethdev: add queue state in queried queue
> information")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Jie Hai 
> ---
>  drivers/net/dpaa2/dpaa2_ethdev.c | 11 +++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c
> b/drivers/net/dpaa2/dpaa2_ethdev.c
> index 679f33ae1a08..8e610b6bba30 100644
> --- a/drivers/net/dpaa2/dpaa2_ethdev.c
> +++ b/drivers/net/dpaa2/dpaa2_ethdev.c
> @@ -1278,6 +1278,11 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
>   if (priv->en_ordered)
>   dev->tx_pkt_burst = dpaa2_dev_tx_ordered;
> 
> + for (i = 0; i < dev->data->nb_rx_queues; i++)
> + dev->data->rx_queue_state[i] =
> RTE_ETH_QUEUE_STATE_STARTED;
> + for (i = 0; i < dev->data->nb_tx_queues; i++)
> + dev->data->tx_queue_state[i] =
> RTE_ETH_QUEUE_STATE_STARTED;
> +
>   return 0;
>  }
> 
> @@ -1295,6 +1300,7 @@ dpaa2_dev_stop(struct rte_eth_dev *dev)
>   struct rte_device *rdev = dev->device;
>   struct rte_intr_handle *intr_handle;
>   struct rte_dpaa2_device *dpaa2_dev;
> + uint16_t i;
> 
>   dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
>   intr_handle = dpaa2_dev->intr_handle;
> @@ -1329,6 +1335,11 @@ dpaa2_dev_stop(struct rte_eth_dev *dev)
>   memset(&link, 0, sizeof(link));
>   rte_eth_linkstatus_set(dev, &link);
> 
> + for (i = 0; i < dev->data->nb_rx_queues; i++)
> + dev->data->rx_queue_state[i] =
> RTE_ETH_QUEUE_STATE_STOPPED;
> + for (i = 0; i < dev->data->nb_tx_queues; i++)
> + dev->data->tx_queue_state[i] =
> RTE_ETH_QUEUE_STATE_STOPPED;
> +
>   return 0;
>  }
> 
> --
> 2.30.0



Minutes of Technical Board Meeting, 2023-Jun-28

2023-09-17 Thread Hemant Agrawal
Minutes of Technical Board Meeting, 2023-Jun-28

Members Attending
-
-Aaron
-Hemant (Chair)
-Jerin
-Keven
-Konstantin
-Maxime
-Stephen
-Nathan
-Ben

NOTE: The technical board meetings every second Wednesday at 
https://meet.jit.si/DPDK at 3 pm UTC.
Meetings are public, and DPDK community members are welcome to attend.
The agenda is available at: 
https://annuel.framapad.org/p/r.0c3cc4d1e011214183872a98f6b5c7db

NOTE: Next meeting will be on Wednesday 2023-July-12 @3pm UTC, and will be 
chaired by Honnappa



Newsletter
--
1. Ben reminded about the inputs for Newsletter. Expecting contributions.

Dublin DPDK submit
---

1) Decent amount of contribution received, the CFP date for 30th June may be 
extended.
2) 30 + Registrations

Other topics.
---
1) Discussed about memarea library:
- It is to provide a simple memory manager for non-huge page 
library
- Stephen and Jerin will be providing feedback
2) Discussed the idea about pre-submitting code for 23.11 ABI compatibility.


[PATCH v2 00/13] crypto/dpaax_sec: misc enhancements

2023-09-20 Thread Hemant Agrawal
v2: compilation fixes

This series include misc enhancements in dpaax_sec drivers.

- improving the IPsec protocol offload features
- enhancing PDCP protocol processing
- code optimization and cleanup

Apeksha Gupta (1):
  crypto/dpaa2_sec: enhance dpaa FD FL FMT offset set

Gagandeep Singh (3):
  common/dpaax: update IPsec base descriptor length
  common/dpaax: change mode to wait in shared desc
  crypto/dpaax_sec: set the authdata in non-auth case

Hemant Agrawal (8):
  crypto/dpaa2_sec: supporting null cipher and auth
  crypto/dpaa_sec: supporting null cipher and auth
  crypto/dpaa2_sec: support copy df and dscp in proto offload
  crypto/dpaa2_sec: increase the anti replay window size
  crypto/dpaa2_sec: enable esn support
  crypto/dpaa2_sec: add NAT-T support in IPsec offload
  crypto/dpaa2_sec: add support to set df and diffserv
  crypto/dpaax_sec: enable sha224-hmac support for IPsec

Vanshika Shukla (1):
  crypto/dpaa2_sec: initialize the pdcp alg to null

 drivers/common/dpaax/caamflib/desc.h  |   5 +-
 drivers/common/dpaax/caamflib/desc/ipsec.h|   9 +-
 drivers/common/dpaax/caamflib/desc/pdcp.h |  82 +++---
 .../common/dpaax/caamflib/rta/protocol_cmd.h  |   5 +-
 .../dpaax/caamflib/rta/sec_run_time_asm.h |   2 +-
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c   | 245 +++---
 drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h |  64 -
 drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c   |  47 +---
 drivers/crypto/dpaa_sec/dpaa_sec.c|  15 +-
 drivers/crypto/dpaa_sec/dpaa_sec.h|  42 ++-
 drivers/net/dpaa2/dpaa2_rxtx.c|   3 +-
 11 files changed, 326 insertions(+), 193 deletions(-)

-- 
2.17.1



[PATCH v2 01/13] common/dpaax: update IPsec base descriptor length

2023-09-20 Thread Hemant Agrawal
From: Gagandeep Singh 

If all the keys are inlined, the descriptor would
be 32 + 20 = 52 which is the size of the CURRENT shared
descriptor created.

So 32 * CAAM_CMD_SZ is the value that must be passed to
rta_inline_query() for its "sd_base_len" parameter and
drivers are using IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN
value to pass as first argument to rta_inline_query().

So, Value of IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN must be
updated to 32 CAAM_CMD_SZ.

Signed-off-by: Franck LENORMAND 
Signed-off-by: Gagandeep Singh 
---
 drivers/common/dpaax/caamflib/desc/ipsec.h   | 4 ++--
 drivers/common/dpaax/caamflib/rta/sec_run_time_asm.h | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/common/dpaax/caamflib/desc/ipsec.h 
b/drivers/common/dpaax/caamflib/desc/ipsec.h
index 8ec6aac915..14e80baf77 100644
--- a/drivers/common/dpaax/caamflib/desc/ipsec.h
+++ b/drivers/common/dpaax/caamflib/desc/ipsec.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2008-2016 Freescale Semiconductor Inc.
- * Copyright 2016,2019-2020 NXP
+ * Copyright 2016,2019-2022 NXP
  *
  */
 
@@ -1380,7 +1380,7 @@ cnstr_shdsc_ipsec_new_decap(uint32_t *descbuf, bool ps,
  * layers to determine whether keys can be inlined or not. To be used as first
  * parameter of rta_inline_query().
  */
-#define IPSEC_AUTH_VAR_BASE_DESC_LEN   (27 * CAAM_CMD_SZ)
+#define IPSEC_AUTH_VAR_BASE_DESC_LEN   (31 * CAAM_CMD_SZ)
 
 /**
  * IPSEC_AUTH_VAR_AES_DEC_BASE_DESC_LEN - IPsec AES decap shared descriptor
diff --git a/drivers/common/dpaax/caamflib/rta/sec_run_time_asm.h 
b/drivers/common/dpaax/caamflib/rta/sec_run_time_asm.h
index f40eaadea3..5c2efeb2c5 100644
--- a/drivers/common/dpaax/caamflib/rta/sec_run_time_asm.h
+++ b/drivers/common/dpaax/caamflib/rta/sec_run_time_asm.h
@@ -413,7 +413,7 @@ rta_program_finalize(struct program *program)
 {
/* Descriptor is usually not allowed to go beyond 64 words size */
if (program->current_pc > MAX_CAAM_DESCSIZE)
-   pr_warn("Descriptor Size exceeded max limit of 64 words\n");
+   pr_debug("Descriptor Size exceeded max limit of 64 words");
 
/* Descriptor is erroneous */
if (program->first_error_pc) {
-- 
2.17.1



[PATCH v2 03/13] crypto/dpaa2_sec: initialize the pdcp alg to null

2023-09-20 Thread Hemant Agrawal
From: Vanshika Shukla 

This patch initializes the pdcp alg to null.

Signed-off-by: Vanshika Shukla 
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c 
b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index f9eba4a7bd..3ceb886ddb 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2016-2022 NXP
+ *   Copyright 2016-2023 NXP
  *
  */
 
@@ -3512,6 +3512,7 @@ dpaa2_sec_set_pdcp_session(struct rte_cryptodev *dev,
session->auth_key.data = NULL;
session->auth_key.length = 0;
session->auth_alg = 0;
+   authdata.algtype = PDCP_AUTH_TYPE_NULL;
}
authdata.key = (size_t)session->auth_key.data;
authdata.keylen = session->auth_key.length;
-- 
2.17.1



[PATCH v2 02/13] common/dpaax: change mode to wait in shared desc

2023-09-20 Thread Hemant Agrawal
From: Gagandeep Singh 

In case of protocol based offload, it is better to wait before the
share descriptor complete the execution. Simultaneous sharing may
cause issues.

Signed-off-by: Gagandeep Singh 
---
 drivers/common/dpaax/caamflib/desc/pdcp.h | 82 +++
 1 file changed, 41 insertions(+), 41 deletions(-)

diff --git a/drivers/common/dpaax/caamflib/desc/pdcp.h 
b/drivers/common/dpaax/caamflib/desc/pdcp.h
index 289ee2a7d5..7d16c66d79 100644
--- a/drivers/common/dpaax/caamflib/desc/pdcp.h
+++ b/drivers/common/dpaax/caamflib/desc/pdcp.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: BSD-3-Clause or GPL-2.0+
  * Copyright 2008-2013 Freescale Semiconductor, Inc.
- * Copyright 2019-2022 NXP
+ * Copyright 2019-2023 NXP
  */
 
 #ifndef __DESC_PDCP_H__
@@ -2338,27 +2338,27 @@ cnstr_shdsc_pdcp_c_plane_encap(uint32_t *descbuf,
desc_share[PDCP_CIPHER_TYPE_INVALID][PDCP_AUTH_TYPE_INVALID] = {
{   /* NULL */
SHR_WAIT,   /* NULL */
-   SHR_ALWAYS, /* SNOW f9 */
-   SHR_ALWAYS, /* AES CMAC */
-   SHR_ALWAYS  /* ZUC-I */
+   SHR_WAIT,   /* SNOW f9 */
+   SHR_WAIT,   /* AES CMAC */
+   SHR_WAIT/* ZUC-I */
},
{   /* SNOW f8 */
-   SHR_ALWAYS, /* NULL */
-   SHR_ALWAYS, /* SNOW f9 */
+   SHR_WAIT,   /* NULL */
+   SHR_WAIT,   /* SNOW f9 */
SHR_WAIT,   /* AES CMAC */
SHR_WAIT/* ZUC-I */
},
{   /* AES CTR */
-   SHR_ALWAYS, /* NULL */
-   SHR_ALWAYS, /* SNOW f9 */
-   SHR_ALWAYS, /* AES CMAC */
+   SHR_WAIT,   /* NULL */
+   SHR_WAIT,   /* SNOW f9 */
+   SHR_WAIT,   /* AES CMAC */
SHR_WAIT/* ZUC-I */
},
{   /* ZUC-E */
-   SHR_ALWAYS, /* NULL */
+   SHR_WAIT,   /* NULL */
SHR_WAIT,   /* SNOW f9 */
SHR_WAIT,   /* AES CMAC */
-   SHR_ALWAYS  /* ZUC-I */
+   SHR_WAIT/* ZUC-I */
},
};
enum pdb_type_e pdb_type;
@@ -2478,27 +2478,27 @@ cnstr_shdsc_pdcp_c_plane_decap(uint32_t *descbuf,
desc_share[PDCP_CIPHER_TYPE_INVALID][PDCP_AUTH_TYPE_INVALID] = {
{   /* NULL */
SHR_WAIT,   /* NULL */
-   SHR_ALWAYS, /* SNOW f9 */
-   SHR_ALWAYS, /* AES CMAC */
-   SHR_ALWAYS  /* ZUC-I */
+   SHR_WAIT,   /* SNOW f9 */
+   SHR_WAIT,   /* AES CMAC */
+   SHR_WAIT/* ZUC-I */
},
{   /* SNOW f8 */
-   SHR_ALWAYS, /* NULL */
-   SHR_ALWAYS, /* SNOW f9 */
+   SHR_WAIT,   /* NULL */
+   SHR_WAIT,   /* SNOW f9 */
SHR_WAIT,   /* AES CMAC */
SHR_WAIT/* ZUC-I */
},
{   /* AES CTR */
-   SHR_ALWAYS, /* NULL */
-   SHR_ALWAYS, /* SNOW f9 */
-   SHR_ALWAYS, /* AES CMAC */
+   SHR_WAIT,   /* NULL */
+   SHR_WAIT,   /* SNOW f9 */
+   SHR_WAIT,   /* AES CMAC */
SHR_WAIT/* ZUC-I */
},
{   /* ZUC-E */
-   SHR_ALWAYS, /* NULL */
+   SHR_WAIT,   /* NULL */
SHR_WAIT,   /* SNOW f9 */
SHR_WAIT,   /* AES CMAC */
-   SHR_ALWAYS  /* ZUC-I */
+   SHR_WAIT/* ZUC-I */
},
};
enum pdb_type_e pdb_type;
@@ -2643,24 +2643,24 @@ cnstr_shdsc_pdcp_u_plane_encap(uint32_t *descbuf,
desc_share[PDCP_CIPHER_TYPE_INVALID][PDCP_AUTH_TYPE_INVALID] = {
{   /* NULL */
SHR_WAIT,   /* NULL */
-   SHR_ALWAYS, /* SNOW f9 */
-   SHR_ALWAYS, /* AES CMAC */
-   SHR_ALWAYS  /* ZUC-I */
+   SHR_WAIT,   /* SNOW f9 */
+   SHR_WAIT,   /* AES CMAC */
+   SHR_WAIT/* ZUC-I */
},
{   /* SNOW f8 */
-  

[PATCH v2 04/13] crypto/dpaa2_sec: supporting null cipher and auth

2023-09-20 Thread Hemant Agrawal
IPSEC proto offload support NULL in combo cases, thus adding
NULL cipher and auth in security capabilities. Non-supported
cases are already protected in the code.

Signed-off-by: Hemant Agrawal 
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h | 43 +--
 1 file changed, 41 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h 
b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
index f84d2caf43..5a4eb8e2ed 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2016,2020-2022 NXP
+ *   Copyright 2016,2020-2023 NXP
  *
  */
 
@@ -878,7 +878,46 @@ static const struct rte_cryptodev_capabilities 
dpaa2_pdcp_capabilities[] = {
}, }
}, }
},
-
+   {   /* NULL (AUTH) */
+   .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+   {.sym = {
+   .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+   {.auth = {
+   .algo = RTE_CRYPTO_AUTH_NULL,
+   .block_size = 1,
+   .key_size = {
+   .min = 0,
+   .max = 0,
+   .increment = 0
+   },
+   .digest_size = {
+   .min = 0,
+   .max = 0,
+   .increment = 0
+   },
+   }, },
+   }, },
+   },
+   {   /* NULL (CIPHER) */
+   .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+   {.sym = {
+   .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+   {.cipher = {
+   .algo = RTE_CRYPTO_CIPHER_NULL,
+   .block_size = 1,
+   .key_size = {
+   .min = 0,
+   .max = 0,
+   .increment = 0
+   },
+   .iv_size = {
+   .min = 0,
+   .max = 0,
+   .increment = 0
+   }
+   }, },
+   }, }
+   },
RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
-- 
2.17.1



[PATCH v2 05/13] crypto/dpaa_sec: supporting null cipher and auth

2023-09-20 Thread Hemant Agrawal
Adding NULL cipher and auth in capabilities.

Signed-off-by: Hemant Agrawal 
---
 drivers/crypto/dpaa_sec/dpaa_sec.h | 42 +-
 1 file changed, 41 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.h 
b/drivers/crypto/dpaa_sec/dpaa_sec.h
index 412a9da942..eff6dcf311 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.h
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
- *   Copyright 2016-2022 NXP
+ *   Copyright 2016-2023 NXP
  *
  */
 
@@ -782,6 +782,46 @@ static const struct rte_cryptodev_capabilities 
dpaa_sec_capabilities[] = {
}, }
}, }
},
+   {   /* NULL (AUTH) */
+   .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+   {.sym = {
+   .xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+   {.auth = {
+   .algo = RTE_CRYPTO_AUTH_NULL,
+   .block_size = 1,
+   .key_size = {
+   .min = 0,
+   .max = 0,
+   .increment = 0
+   },
+   .digest_size = {
+   .min = 0,
+   .max = 0,
+   .increment = 0
+   },
+   }, },
+   }, },
+   },
+   {   /* NULL (CIPHER) */
+   .op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+   {.sym = {
+   .xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+   {.cipher = {
+   .algo = RTE_CRYPTO_CIPHER_NULL,
+   .block_size = 1,
+   .key_size = {
+   .min = 0,
+   .max = 0,
+   .increment = 0
+   },
+   .iv_size = {
+   .min = 0,
+   .max = 0,
+   .increment = 0
+   }
+   }, },
+   }, }
+   },
RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
 
-- 
2.17.1



[PATCH v2 06/13] crypto/dpaax_sec: set the authdata in non-auth case

2023-09-20 Thread Hemant Agrawal
From: Gagandeep Singh 

The descriptors refers to auth data as well, so initializing it
properly for the non-auth cases.

Signed-off-by: Gagandeep Singh 
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 16 
 drivers/crypto/dpaa_sec/dpaa_sec.c  |  5 +
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c 
b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 3ceb886ddb..1fc0d2e7cc 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -3538,12 +3538,20 @@ dpaa2_sec_set_pdcp_session(struct rte_cryptodev *dev,
  session->auth_alg);
goto out;
}
-
p_authdata = &authdata;
-   } else if (pdcp_xform->domain == RTE_SECURITY_PDCP_MODE_CONTROL) {
-   DPAA2_SEC_ERR("Crypto: Integrity must for c-plane");
-   goto out;
+   } else {
+   if (pdcp_xform->domain == RTE_SECURITY_PDCP_MODE_CONTROL) {
+   DPAA2_SEC_ERR("Crypto: Integrity must for c-plane");
+   goto out;
+   }
+   session->auth_key.data = NULL;
+   session->auth_key.length = 0;
+   session->auth_alg = 0;
}
+   authdata.key = (size_t)session->auth_key.data;
+   authdata.keylen = session->auth_key.length;
+   authdata.key_enc_flags = 0;
+   authdata.key_type = RTA_DATA_IMM;
 
if (pdcp_xform->sdap_enabled) {
int nb_keys_to_inline =
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c 
b/drivers/crypto/dpaa_sec/dpaa_sec.c
index f3f565826f..0fcba95916 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -3188,6 +3188,11 @@ dpaa_sec_set_pdcp_session(struct rte_cryptodev *dev,
   auth_xform->key.length);
session->auth_alg = auth_xform->algo;
} else {
+   if (pdcp_xform->domain == RTE_SECURITY_PDCP_MODE_CONTROL) {
+   DPAA_SEC_ERR("Crypto: Integrity must for c-plane");
+   ret = -EINVAL;
+   goto out;
+   }
session->auth_key.data = NULL;
session->auth_key.length = 0;
session->auth_alg = 0;
-- 
2.17.1



[PATCH v2 08/13] crypto/dpaa2_sec: support copy df and dscp in proto offload

2023-09-20 Thread Hemant Agrawal
This patch adds support for enabling capability to copy
dscp and df bits from inner to outer header and vice-versa.

Signed-off-by: Hemant Agrawal 
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 18 ++
 drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h   | 10 --
 2 files changed, 22 insertions(+), 6 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c 
b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index daa6a71360..3b96798242 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -3193,10 +3193,14 @@ dpaa2_sec_set_ipsec_session(struct rte_cryptodev *dev,
encap_pdb.options |= PDBHMO_ESP_ENCAP_DTTL;
if (ipsec_xform->options.esn)
encap_pdb.options |= PDBOPTS_ESP_ESN;
+   if (ipsec_xform->options.copy_dscp)
+   encap_pdb.options |= PDBOPTS_ESP_DIFFSERV;
encap_pdb.spi = ipsec_xform->spi;
session->dir = DIR_ENC;
if (ipsec_xform->tunnel.type ==
RTE_SECURITY_IPSEC_TUNNEL_IPV4) {
+   if (ipsec_xform->options.copy_df)
+   encap_pdb.options |= PDBHMO_ESP_DFBIT;
encap_pdb.ip_hdr_len = sizeof(struct ip);
ip4_hdr.ip_v = IPVERSION;
ip4_hdr.ip_hl = 5;
@@ -3261,12 +3265,18 @@ dpaa2_sec_set_ipsec_session(struct rte_cryptodev *dev,
break;
}
 
-   decap_pdb.options = (ipsec_xform->tunnel.type ==
-   RTE_SECURITY_IPSEC_TUNNEL_IPV4) ?
-   sizeof(struct ip) << 16 :
-   sizeof(struct rte_ipv6_hdr) << 16;
+   if (ipsec_xform->tunnel.type ==
+   RTE_SECURITY_IPSEC_TUNNEL_IPV4) {
+   decap_pdb.options = sizeof(struct ip) << 16;
+   if (ipsec_xform->options.copy_df)
+   decap_pdb.options |= PDBHMO_ESP_DFV;
+   } else {
+   decap_pdb.options = sizeof(struct rte_ipv6_hdr) << 16;
+   }
if (ipsec_xform->options.esn)
decap_pdb.options |= PDBOPTS_ESP_ESN;
+   if (ipsec_xform->options.copy_dscp)
+   decap_pdb.options |= PDBOPTS_ESP_DIFFSERV;
 
if (ipsec_xform->replay_win_sz) {
uint32_t win_sz;
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h 
b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
index 5a4eb8e2ed..0f29e6299f 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
@@ -929,7 +929,10 @@ static const struct rte_security_capability 
dpaa2_sec_security_cap[] = {
.proto = RTE_SECURITY_IPSEC_SA_PROTO_ESP,
.mode = RTE_SECURITY_IPSEC_SA_MODE_TUNNEL,
.direction = RTE_SECURITY_IPSEC_SA_DIR_EGRESS,
-   .options = { 0 },
+   .options = {
+   .copy_df = 1,
+   .copy_dscp = 1,
+   },
.replay_win_sz_max = 128
},
.crypto_capabilities = dpaa2_sec_capabilities
@@ -941,7 +944,10 @@ static const struct rte_security_capability 
dpaa2_sec_security_cap[] = {
.proto = RTE_SECURITY_IPSEC_SA_PROTO_ESP,
.mode = RTE_SECURITY_IPSEC_SA_MODE_TUNNEL,
.direction = RTE_SECURITY_IPSEC_SA_DIR_INGRESS,
-   .options = { 0 },
+   .options = {
+   .copy_df = 1,
+   .copy_dscp = 1,
+   },
.replay_win_sz_max = 128
},
.crypto_capabilities = dpaa2_sec_capabilities
-- 
2.17.1



[PATCH v2 09/13] crypto/dpaa2_sec: increase the anti replay window size

2023-09-20 Thread Hemant Agrawal
LX216x can support upto 1024 anti replay window size.

Signed-off-by: Hemant Agrawal 
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h 
b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
index 0f29e6299f..ee904829ed 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
@@ -933,7 +933,7 @@ static const struct rte_security_capability 
dpaa2_sec_security_cap[] = {
.copy_df = 1,
.copy_dscp = 1,
},
-   .replay_win_sz_max = 128
+   .replay_win_sz_max = 1024
},
.crypto_capabilities = dpaa2_sec_capabilities
},
@@ -948,7 +948,7 @@ static const struct rte_security_capability 
dpaa2_sec_security_cap[] = {
.copy_df = 1,
.copy_dscp = 1,
},
-   .replay_win_sz_max = 128
+   .replay_win_sz_max = 1024
},
.crypto_capabilities = dpaa2_sec_capabilities
},
-- 
2.17.1



[PATCH v2 10/13] crypto/dpaa2_sec: enable esn support

2023-09-20 Thread Hemant Agrawal
LX216x suppots ESN.
Also enable to correctly print the SEC era.

Signed-off-by: Hemant Agrawal 
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 2 +-
 drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h   | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c 
b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 3b96798242..85830347c6 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -4386,7 +4386,7 @@ cryptodev_dpaa2_sec_probe(struct rte_dpaa2_driver 
*dpaa2_drv __rte_unused,
else
rta_set_sec_era(RTA_SEC_ERA_8);
 
-   DPAA2_SEC_INFO("2-SEC ERA is %d", rta_get_sec_era());
+   DPAA2_SEC_INFO("2-SEC ERA is %d", USER_SEC_ERA(rta_get_sec_era()));
 
/* Invoke PMD device initialization function */
retval = dpaa2_sec_dev_init(cryptodev);
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h 
b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
index ee904829ed..d3e2df72b0 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
@@ -932,6 +932,7 @@ static const struct rte_security_capability 
dpaa2_sec_security_cap[] = {
.options = {
.copy_df = 1,
.copy_dscp = 1,
+   .esn = 1,
},
.replay_win_sz_max = 1024
},
@@ -947,6 +948,7 @@ static const struct rte_security_capability 
dpaa2_sec_security_cap[] = {
.options = {
.copy_df = 1,
.copy_dscp = 1,
+   .esn = 1,
},
.replay_win_sz_max = 1024
},
-- 
2.17.1



[PATCH v2 12/13] crypto/dpaa2_sec: add support to set df and diffserv

2023-09-20 Thread Hemant Agrawal
This patch enables the ipsec protocol offload to copy DF and diffserv

Signed-off-by: Hemant Agrawal 
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 32 +
 drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h   |  2 ++
 2 files changed, 22 insertions(+), 12 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c 
b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 809c357423..77ed68ad6d 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -3202,24 +3202,32 @@ dpaa2_sec_set_ipsec_session(struct rte_cryptodev *dev,
session->dir = DIR_ENC;
if (ipsec_xform->tunnel.type ==
RTE_SECURITY_IPSEC_TUNNEL_IPV4) {
+   if (ipsec_xform->options.dec_ttl)
+   encap_pdb.options |= PDBHMO_ESP_ENCAP_DTTL;
if (ipsec_xform->options.copy_df)
encap_pdb.options |= PDBHMO_ESP_DFBIT;
ip4_hdr = (struct rte_ipv4_hdr *)hdr;
 
encap_pdb.ip_hdr_len = sizeof(struct rte_ipv4_hdr);
ip4_hdr->version_ihl = RTE_IPV4_VHL_DEF;
-   ip4_hdr->time_to_live = ipsec_xform->tunnel.ipv4.ttl;
-   ip4_hdr->type_of_service =
-   ipsec_xform->tunnel.ipv4.dscp;
+   ip4_hdr->time_to_live = ipsec_xform->tunnel.ipv4.ttl ?
+   ipsec_xform->tunnel.ipv4.ttl :  
0x40;
+   ip4_hdr->type_of_service = 
(ipsec_xform->tunnel.ipv4.dscp<<2);
+
ip4_hdr->hdr_checksum = 0;
ip4_hdr->packet_id = 0;
-   ip4_hdr->fragment_offset = 0;
-   memcpy(&ip4_hdr->src_addr,
-   &ipsec_xform->tunnel.ipv4.src_ip,
-   sizeof(struct in_addr));
-   memcpy(&ip4_hdr->dst_addr,
-   &ipsec_xform->tunnel.ipv4.dst_ip,
-   sizeof(struct in_addr));
+   if (ipsec_xform->tunnel.ipv4.df) {
+   uint16_t frag_off = 0;
+
+   frag_off |= RTE_IPV4_HDR_DF_FLAG;
+   ip4_hdr->fragment_offset = 
rte_cpu_to_be_16(frag_off);
+   } else
+   ip4_hdr->fragment_offset = 0;
+
+   memcpy(&ip4_hdr->src_addr, 
&ipsec_xform->tunnel.ipv4.src_ip,
+  sizeof(struct in_addr));
+   memcpy(&ip4_hdr->dst_addr, 
&ipsec_xform->tunnel.ipv4.dst_ip,
+  sizeof(struct in_addr));
if (ipsec_xform->options.udp_encap) {
uint16_t sport, dport;
struct rte_udp_hdr *uh =
@@ -3309,6 +3317,8 @@ dpaa2_sec_set_ipsec_session(struct rte_cryptodev *dev,
decap_pdb.options = sizeof(struct ip) << 16;
if (ipsec_xform->options.copy_df)
decap_pdb.options |= PDBHMO_ESP_DFV;
+   if (ipsec_xform->options.dec_ttl)
+   decap_pdb.options |= PDBHMO_ESP_DECAP_DTTL;
} else {
decap_pdb.options = sizeof(struct rte_ipv6_hdr) << 16;
}
@@ -3318,8 +3328,6 @@ dpaa2_sec_set_ipsec_session(struct rte_cryptodev *dev,
decap_pdb.options |= PDBOPTS_ESP_DIFFSERV;
if (ipsec_xform->options.ecn)
decap_pdb.options |= PDBOPTS_ESP_TECN;
-   if (ipsec_xform->options.dec_ttl)
-   decap_pdb.options |= PDBHMO_ESP_DECAP_DTTL;
 
if (ipsec_xform->replay_win_sz) {
uint32_t win_sz;
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h 
b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
index cf6542a222..1c0bc3d6de 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h
@@ -933,6 +933,7 @@ static const struct rte_security_capability 
dpaa2_sec_security_cap[] = {
.udp_encap = 1,
.copy_df = 1,
.copy_dscp = 1,
+   .dec_ttl = 1,
.esn = 1,
},
.replay_win_sz_max = 1024
@@ -951,6 +952,7 @@ static const struct rte_security_capability 
dpaa2_sec_security_cap[] = {
.udp_encap = 1,

[PATCH v2 11/13] crypto/dpaa2_sec: add NAT-T support in IPsec offload

2023-09-20 Thread Hemant Agrawal
This patch adds supports for UDP encapsulation in NAT-T for
IPSEC security protocol offload case.

Signed-off-by: Hemant Agrawal 
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 101 ++--
 drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h   |   3 +
 2 files changed, 75 insertions(+), 29 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c 
b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 85830347c6..809c357423 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -10,6 +10,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -3162,9 +3163,9 @@ dpaa2_sec_set_ipsec_session(struct rte_cryptodev *dev,
 
session->ctxt_type = DPAA2_SEC_IPSEC;
if (ipsec_xform->direction == RTE_SECURITY_IPSEC_SA_DIR_EGRESS) {
-   uint8_t *hdr = NULL;
-   struct ip ip4_hdr;
-   struct rte_ipv6_hdr ip6_hdr;
+   uint8_t hdr[48] = {};
+   struct rte_ipv4_hdr *ip4_hdr;
+   struct rte_ipv6_hdr *ip6_hdr;
struct ipsec_encap_pdb encap_pdb;
 
flc->dhr = SEC_FLC_DHR_OUTBOUND;
@@ -3187,38 +3188,77 @@ dpaa2_sec_set_ipsec_session(struct rte_cryptodev *dev,
 
encap_pdb.options = (IPVERSION << PDBNH_ESP_ENCAP_SHIFT) |
PDBOPTS_ESP_OIHI_PDB_INL |
-   PDBOPTS_ESP_IVSRC |
PDBHMO_ESP_SNR;
-   if (ipsec_xform->options.dec_ttl)
-   encap_pdb.options |= PDBHMO_ESP_ENCAP_DTTL;
+
+   if (ipsec_xform->options.iv_gen_disable == 0)
+   encap_pdb.options |= PDBOPTS_ESP_IVSRC;
if (ipsec_xform->options.esn)
encap_pdb.options |= PDBOPTS_ESP_ESN;
if (ipsec_xform->options.copy_dscp)
encap_pdb.options |= PDBOPTS_ESP_DIFFSERV;
+   if (ipsec_xform->options.ecn)
+   encap_pdb.options |= PDBOPTS_ESP_TECN;
encap_pdb.spi = ipsec_xform->spi;
session->dir = DIR_ENC;
if (ipsec_xform->tunnel.type ==
RTE_SECURITY_IPSEC_TUNNEL_IPV4) {
if (ipsec_xform->options.copy_df)
encap_pdb.options |= PDBHMO_ESP_DFBIT;
-   encap_pdb.ip_hdr_len = sizeof(struct ip);
-   ip4_hdr.ip_v = IPVERSION;
-   ip4_hdr.ip_hl = 5;
-   ip4_hdr.ip_len = rte_cpu_to_be_16(sizeof(ip4_hdr));
-   ip4_hdr.ip_tos = ipsec_xform->tunnel.ipv4.dscp;
-   ip4_hdr.ip_id = 0;
-   ip4_hdr.ip_off = 0;
-   ip4_hdr.ip_ttl = ipsec_xform->tunnel.ipv4.ttl;
-   ip4_hdr.ip_p = IPPROTO_ESP;
-   ip4_hdr.ip_sum = 0;
-   ip4_hdr.ip_src = ipsec_xform->tunnel.ipv4.src_ip;
-   ip4_hdr.ip_dst = ipsec_xform->tunnel.ipv4.dst_ip;
-   ip4_hdr.ip_sum = calc_chksum((uint16_t *)(void *)
-   &ip4_hdr, sizeof(struct ip));
-   hdr = (uint8_t *)&ip4_hdr;
+   ip4_hdr = (struct rte_ipv4_hdr *)hdr;
+
+   encap_pdb.ip_hdr_len = sizeof(struct rte_ipv4_hdr);
+   ip4_hdr->version_ihl = RTE_IPV4_VHL_DEF;
+   ip4_hdr->time_to_live = ipsec_xform->tunnel.ipv4.ttl;
+   ip4_hdr->type_of_service =
+   ipsec_xform->tunnel.ipv4.dscp;
+   ip4_hdr->hdr_checksum = 0;
+   ip4_hdr->packet_id = 0;
+   ip4_hdr->fragment_offset = 0;
+   memcpy(&ip4_hdr->src_addr,
+   &ipsec_xform->tunnel.ipv4.src_ip,
+   sizeof(struct in_addr));
+   memcpy(&ip4_hdr->dst_addr,
+   &ipsec_xform->tunnel.ipv4.dst_ip,
+   sizeof(struct in_addr));
+   if (ipsec_xform->options.udp_encap) {
+   uint16_t sport, dport;
+   struct rte_udp_hdr *uh =
+   (struct rte_udp_hdr *) (hdr +
+   sizeof(struct rte_ipv4_hdr));
+
+   sport = ipsec_xform->udp.sport ?
+   ipsec_xform->udp.sport : 4500;
+   dport = ipsec_xform->udp.dport ?
+   ipsec_xform->udp.dport : 4500;
+   uh->src_port = rte_cpu_to_be_

[PATCH v2 13/13] crypto/dpaax_sec: enable sha224-hmac support for IPsec

2023-09-20 Thread Hemant Agrawal
Enabling the SHA224 support in ipsec proto mode
for dpaax drivers.

Signed-off-by: Hemant Agrawal 
---
 drivers/common/dpaax/caamflib/desc.h |  5 -
 drivers/common/dpaax/caamflib/desc/ipsec.h   |  5 +
 drivers/common/dpaax/caamflib/rta/protocol_cmd.h |  5 -
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c  | 10 +-
 drivers/crypto/dpaa_sec/dpaa_sec.c   | 10 +-
 5 files changed, 31 insertions(+), 4 deletions(-)

diff --git a/drivers/common/dpaax/caamflib/desc.h 
b/drivers/common/dpaax/caamflib/desc.h
index 635d6bad07..4a1285c4d4 100644
--- a/drivers/common/dpaax/caamflib/desc.h
+++ b/drivers/common/dpaax/caamflib/desc.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2008-2016 Freescale Semiconductor Inc.
- * Copyright 2016, 2019 NXP
+ * Copyright 2016, 2019, 2023 NXP
  *
  */
 
@@ -662,6 +662,9 @@ extern enum rta_sec_era rta_sec_era;
 #define OP_PCL_IPSEC_HMAC_SHA2_256_128  0x000c
 #define OP_PCL_IPSEC_HMAC_SHA2_384_192  0x000d
 #define OP_PCL_IPSEC_HMAC_SHA2_512_256  0x000e
+#define OP_PCL_IPSEC_HMAC_SHA2_224_96   0x00f2
+#define OP_PCL_IPSEC_HMAC_SHA2_224_112  0x00f4
+#define OP_PCL_IPSEC_HMAC_SHA2_224_224  0x00f8
 
 /* For SRTP - OP_PCLID_SRTP */
 #define OP_PCL_SRTP_CIPHER_MASK 0xff00
diff --git a/drivers/common/dpaax/caamflib/desc/ipsec.h 
b/drivers/common/dpaax/caamflib/desc/ipsec.h
index 14e80baf77..95fc3ea5ba 100644
--- a/drivers/common/dpaax/caamflib/desc/ipsec.h
+++ b/drivers/common/dpaax/caamflib/desc/ipsec.h
@@ -710,6 +710,11 @@ static inline void __gen_auth_key(struct program *program,
case OP_PCL_IPSEC_HMAC_SHA2_512_256:
dkp_protid = OP_PCLID_DKP_SHA512;
break;
+   case OP_PCL_IPSEC_HMAC_SHA2_224_96:
+   case OP_PCL_IPSEC_HMAC_SHA2_224_112:
+   case OP_PCL_IPSEC_HMAC_SHA2_224_224:
+   dkp_protid = OP_PCLID_DKP_SHA224;
+   break;
default:
KEY(program, KEY2, authdata->key_enc_flags, authdata->key,
authdata->keylen, INLINE_KEY(authdata));
diff --git a/drivers/common/dpaax/caamflib/rta/protocol_cmd.h 
b/drivers/common/dpaax/caamflib/rta/protocol_cmd.h
index ac5c8af716..5b33f103be 100644
--- a/drivers/common/dpaax/caamflib/rta/protocol_cmd.h
+++ b/drivers/common/dpaax/caamflib/rta/protocol_cmd.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2008-2016 Freescale Semiconductor Inc.
- * Copyright 2016,2019 NXP
+ * Copyright 2016,2019,2023 NXP
  *
  */
 
@@ -241,6 +241,9 @@ __rta_ipsec_proto(uint16_t protoinfo)
case OP_PCL_IPSEC_HMAC_MD5_128:
case OP_PCL_IPSEC_HMAC_SHA1_160:
case OP_PCL_IPSEC_AES_CMAC_96:
+   case OP_PCL_IPSEC_HMAC_SHA2_224_96:
+   case OP_PCL_IPSEC_HMAC_SHA2_224_112:
+   case OP_PCL_IPSEC_HMAC_SHA2_224_224:
case OP_PCL_IPSEC_HMAC_SHA2_256_128:
case OP_PCL_IPSEC_HMAC_SHA2_384_192:
case OP_PCL_IPSEC_HMAC_SHA2_512_256:
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c 
b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 77ed68ad6d..bb5a2c629e 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -3005,6 +3005,15 @@ dpaa2_sec_ipsec_proto_init(struct 
rte_crypto_cipher_xform *cipher_xform,
authdata->algtype = OP_PCL_IPSEC_HMAC_MD5_96;
authdata->algmode = OP_ALG_AAI_HMAC;
break;
+   case RTE_CRYPTO_AUTH_SHA224_HMAC:
+   authdata->algmode = OP_ALG_AAI_HMAC;
+   if (session->digest_length == 6)
+   authdata->algtype = OP_PCL_IPSEC_HMAC_SHA2_224_96;
+   else if (session->digest_length == 14)
+   authdata->algtype = OP_PCL_IPSEC_HMAC_SHA2_224_224;
+   else
+   authdata->algtype = OP_PCL_IPSEC_HMAC_SHA2_224_112;
+   break;
case RTE_CRYPTO_AUTH_SHA256_HMAC:
authdata->algtype = OP_PCL_IPSEC_HMAC_SHA2_256_128;
authdata->algmode = OP_ALG_AAI_HMAC;
@@ -3032,7 +3041,6 @@ dpaa2_sec_ipsec_proto_init(struct rte_crypto_cipher_xform 
*cipher_xform,
case RTE_CRYPTO_AUTH_NULL:
authdata->algtype = OP_PCL_IPSEC_HMAC_NULL;
break;
-   case RTE_CRYPTO_AUTH_SHA224_HMAC:
case RTE_CRYPTO_AUTH_SNOW3G_UIA2:
case RTE_CRYPTO_AUTH_SHA1:
case RTE_CRYPTO_AUTH_SHA256:
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c 
b/drivers/crypto/dpaa_sec/dpaa_sec.c
index 0fcba95916..a301e8edb2 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -2817,6 +2817,15 @@ dpaa_sec_ipsec_proto_init(struct rte_crypto_cipher_xform 
*cipher_xform,
"+++Using sha256-hmac truncated len is non-standard,"
  

[PATCH v2 07/13] crypto/dpaa2_sec: enhance dpaa FD FL FMT offset set

2023-09-20 Thread Hemant Agrawal
From: Apeksha Gupta 

The macro DPAA2_SET_FLE_OFFSET(fle, offset) only works for masking the
offset upto with 12 bits. When the offset value is more that 12 bits,
this macro may over writing the FMT/SL/F bits which are beyond the
offset bits.
The FLE_ADDR is modified to FLE_ADDR + OFFSET, and the FLE_OFFSET
is made to 0.

Signed-off-by: Apeksha Gupta 
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 87 +++--
 drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c | 47 +++
 drivers/net/dpaa2/dpaa2_rxtx.c  |  3 +-
 3 files changed, 38 insertions(+), 99 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c 
b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 1fc0d2e7cc..daa6a71360 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -138,16 +138,14 @@ build_proto_compound_sg_fd(dpaa2_sec_session *sess,
DPAA2_SET_FLE_ADDR(op_fle, DPAA2_VADDR_TO_IOVA(sge));
 
/* Configure Output SGE for Encap/Decap */
-   DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
-   DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+   DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
/* o/p segs */
while (mbuf->next) {
sge->length = mbuf->data_len;
out_len += sge->length;
sge++;
mbuf = mbuf->next;
-   DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
-   DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+   DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
}
/* using buf_len for last buf - so that extra data can be added */
sge->length = mbuf->buf_len - mbuf->data_off;
@@ -165,8 +163,7 @@ build_proto_compound_sg_fd(dpaa2_sec_session *sess,
DPAA2_SET_FLE_FIN(ip_fle);
 
/* Configure input SGE for Encap/Decap */
-   DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
-   DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+   DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
sge->length = mbuf->data_len;
in_len += sge->length;
 
@@ -174,8 +171,7 @@ build_proto_compound_sg_fd(dpaa2_sec_session *sess,
/* i/p segs */
while (mbuf) {
sge++;
-   DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
-   DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+   DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
sge->length = mbuf->data_len;
in_len += sge->length;
mbuf = mbuf->next;
@@ -247,13 +243,11 @@ build_proto_compound_fd(dpaa2_sec_session *sess,
DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
 
/* Configure Output FLE with dst mbuf data  */
-   DPAA2_SET_FLE_ADDR(op_fle, DPAA2_MBUF_VADDR_TO_IOVA(dst_mbuf));
-   DPAA2_SET_FLE_OFFSET(op_fle, dst_mbuf->data_off);
+   DPAA2_SET_FLE_ADDR(op_fle, rte_pktmbuf_iova(dst_mbuf));
DPAA2_SET_FLE_LEN(op_fle, dst_mbuf->buf_len);
 
/* Configure Input FLE with src mbuf data */
-   DPAA2_SET_FLE_ADDR(ip_fle, DPAA2_MBUF_VADDR_TO_IOVA(src_mbuf));
-   DPAA2_SET_FLE_OFFSET(ip_fle, src_mbuf->data_off);
+   DPAA2_SET_FLE_ADDR(ip_fle, rte_pktmbuf_iova(src_mbuf));
DPAA2_SET_FLE_LEN(ip_fle, src_mbuf->pkt_len);
 
DPAA2_SET_FD_LEN(fd, ip_fle->length);
@@ -373,16 +367,14 @@ build_authenc_gcm_sg_fd(dpaa2_sec_session *sess,
sym_op->aead.data.length;
 
/* Configure Output SGE for Encap/Decap */
-   DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
-   DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off + sym_op->aead.data.offset);
+   DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + 
sym_op->aead.data.offset);
sge->length = mbuf->data_len - sym_op->aead.data.offset;
 
mbuf = mbuf->next;
/* o/p segs */
while (mbuf) {
sge++;
-   DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
-   DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+   DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
sge->length = mbuf->data_len;
mbuf = mbuf->next;
}
@@ -420,17 +412,14 @@ build_authenc_gcm_sg_fd(dpaa2_sec_session *sess,
sge++;
}
 
-   DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
-   DPAA2_SET_FLE_OFFSET(sge, sym_op->aead.data.offset +
-   mbuf->data_off);
+   DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf) + 
sym_op->aead.data.offset);
sge->length = mbuf->data_len - sym_op->aead.data.offset;
 
mbuf = mbuf->next;
/* i/p segs */
while (mbuf) {
sge++;
-   DPAA2_SET_FLE_ADDR(sge, DPAA2_MBUF_VADDR_TO_IOVA(mbuf));
-   DPAA2_SET_FLE_OFFSET(sge, mbuf->data_off);
+   DPAA2_SET_FLE_ADDR(sge, rte_pktmbuf_iova(mbuf));
sge->length = mbuf->data_len

RE: [EXT] [PATCH v2 00/13] crypto/dpaax_sec: misc enhancements

2023-09-21 Thread Hemant Agrawal
Hi Akhil

> -Original Message-
> From: Akhil Goyal 
> Sent: Thursday, September 21, 2023 1:35 PM
> To: Hemant Agrawal ; Franck Lenormand
> ; Apeksha Gupta ;
> Vanshika Shukla ; Gagandeep Singh
> 
> Cc: dev@dpdk.org
> Subject: RE: [EXT] [PATCH v2 00/13] crypto/dpaax_sec: misc enhancements
> Importance: High
> 
> > v2: compilation fixes
> >
> > This series include misc enhancements in dpaax_sec drivers.
> >
> > - improving the IPsec protocol offload features
> > - enhancing PDCP protocol processing
> > - code optimization and cleanup
> >
> > Apeksha Gupta (1):
> >   crypto/dpaa2_sec: enhance dpaa FD FL FMT offset set
> >
> > Gagandeep Singh (3):
> >   common/dpaax: update IPsec base descriptor length
> >   common/dpaax: change mode to wait in shared desc
> >   crypto/dpaax_sec: set the authdata in non-auth case
> >
> > Hemant Agrawal (8):
> >   crypto/dpaa2_sec: supporting null cipher and auth
> >   crypto/dpaa_sec: supporting null cipher and auth
> >   crypto/dpaa2_sec: support copy df and dscp in proto offload
> >   crypto/dpaa2_sec: increase the anti replay window size
> >   crypto/dpaa2_sec: enable esn support
> >   crypto/dpaa2_sec: add NAT-T support in IPsec offload
> >   crypto/dpaa2_sec: add support to set df and diffserv
> >   crypto/dpaax_sec: enable sha224-hmac support for IPsec
> >
> > Vanshika Shukla (1):
> >   crypto/dpaa2_sec: initialize the pdcp alg to null
> >
> >  drivers/common/dpaax/caamflib/desc.h  |   5 +-
> >  drivers/common/dpaax/caamflib/desc/ipsec.h|   9 +-
> >  drivers/common/dpaax/caamflib/desc/pdcp.h |  82 +++---
> >  .../common/dpaax/caamflib/rta/protocol_cmd.h  |   5 +-
> >  .../dpaax/caamflib/rta/sec_run_time_asm.h |   2 +-
> >  drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c   | 245 +++---
> >  drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h |  64 -
> >  drivers/crypto/dpaa2_sec/dpaa2_sec_raw_dp.c   |  47 +---
> >  drivers/crypto/dpaa_sec/dpaa_sec.c|  15 +-
> >  drivers/crypto/dpaa_sec/dpaa_sec.h|  42 ++-
> >  drivers/net/dpaa2/dpaa2_rxtx.c|   3 +-
> >  11 files changed, 326 insertions(+), 193 deletions(-)
> >
> Please improve writing the title and description of patches.
> Applied to dpdk-next-crypto.
> Please review the patches applied. Make sure not to repeat these things.
[Hemant] Thanks
> 
> crypto/dpaax_sec: support SHA224-HMAC for IPsec
> crypto/dpaa2_sec: support copy DF and diffserv
> crypto/dpaa2_sec: support NAT-T in IPsec offload
> crypto/dpaa2_sec: support ESN
> crypto/dpaa2_sec: increase anti replay window size
> crypto/dpaa2_sec: support copy DF and DSCP in IPsec
> crypto/dpaa2_sec: prevent FLE offset overflow
> crypto/dpaax_sec: set authdata in non-auth case
> crypto/dpaa_sec: support null cipher and auth
> crypto/dpaa2_sec: support null cipher and auth
> crypto/dpaa2_sec: initialize PDCP alg to null
> common/dpaax: change mode to wait in shared desc
> common/dpaax: update IPsec base descriptor length
> 
> Few capability changes in dpaa2 driver were specific to LX2160.
> But are common to other dpaa2 devices. I hope those are taken care of with
> appropriate checks.
[Hemant] Yes, your observation is correct. However we have not tested these 
things yet on dpaa, once we test, we will submit the patch.

Regards,
Hemant



RE: [PATCH v3 0/2] ethdev: add the check for PTP capability

2023-09-21 Thread Hemant Agrawal
HI Ferruh,

> On 9/21/2023 11:02 AM, lihuisong (C) wrote:
> > Hi Ferruh,
> >
> > Sorry for my delay reply because of taking a look at all PMDs
> > implementation.
> >
> >
> > 在 2023/9/16 1:46, Ferruh Yigit 写道:
> >> On 8/17/2023 9:42 AM, Huisong Li wrote:
> >>>  From the first version of ptpclient, it seems that this example
> >>> assume that the PMDs support the PTP feature and enable PTP by
> >>> default. Please see commit ab129e9065a5 ("examples/ptpclient: add
> >>> minimal PTP client") which are introduced in 2015.
> >>>
> >>> And two years later, Rx HW timestamp offload was introduced to
> >>> enable or disable PTP feature in HW via rte_eth_rxmode. Please see
> >>> commit 42ffc45aa340 ("ethdev: add Rx HW timestamp capability").
> >>>
> >> Hi Huisong,
> >>
> >> As far as I know this offload is not for PTP.
> >> PTP and TIMESTAMP are different.
> > If TIMESTAMP offload cannot stand for PTP, we may need to add one new
> > offlaod for PTP.
> >
> 
> Can you please detail what is "PTP offload"?
> 
> >>
> >> PTP is a protocol for time sync.
> >> Rx TIMESTAMP offload is to ask HW to add timestamp to mbuf.
> > Yes.
> > But a lot of PMDs actually depand on HW to report Rx timestamp
> > releated information because of reading Rx timestamp of PTP SYNC
> > packet in read_rx_timestamp API.
> >
> 
> HW support may be required for PTP but this doesn't mean timestamp
> offload is used.

> 
> >>
> >>> And then about four years later, ptpclient enable Rx timestamp
> >>> offload because some PMDs require this offload to enable. Please see
> >>> commit 7a04a4f67dca ("examples/ptpclient: enable Rx timestamp
> offload").
> >>>
> >> dpaa2 seems using TIMESTAMP offload and PTP together, hence they
> >> updated ptpclient sample to set TIMESTAMP offload.

[Hemant] In case of dpaa2, we need to enable HW timestamp for PTP. In the 
current dpaa2 driver
If the code is compiled with, RTE_LIBRTE_IEEE1588, we are enabling the HW 
timestamp
Otherwise, we are only enabling it when the TIMESTAMP offload is selected.  

We added patch in ptpclient earlier to pass the timestamp offload, however 
later we also updated the driver to do it by default. 


> > There are many PMDs doing like this, such as ice, igc, cnxk, dpaa2,
> > hns3 and so on.
> >
> 
> Can you please point the ice & igc code, cc'ing their maintainers, we can look
> together?
> 
> 
> >>
> >> We need to clarify dpaa2 usage.
> >>
> >>> By all the records, this is more like a process of perfecting PTP
> >>> feature.
> >>> Not all network adaptors support PTP feature. So adding the check
> >>> for PTP capability in ethdev layer is necessary.
> >>>
> >> Nope, as PTP (IEEE1588/802.1AS) implemented as dev_ops, and ops
> >> already checked, so no additional check is needed.
> > But only having dev_ops about PTP doesn't satisfy the use of this feature.
> > For example,
> > there are serveal network ports belonged to a driver on one OS, and
> > only one port support PTP function.
> > So driver needs one *PTP* offload.
> >>
> >> We just need to clarify TIMESTAMP offload and PTP usage and find out
> >> what is causing confusion.
> > Yes it is a little bit confusion.
> > There are two kinds of implementation:
> > A: ixgbe and txgbe (it seems that their HW is similar) don't need
> > TIMESTAMP offload,and only use dev_ops to finish PTP feature.
> > B:  saving "Rx timestamp related information" from Rx description when
> > receive PTP SYNC packet and
> >     report it in read_rx_timestamp API.
> > For case B, most of driver use TIMESTAMP offload to decide if driver
> > save "Rx timestamp related information.
> > What do you think about this, Ferruh?
> >> I would be great if you can help on clarification, and update
> >> documentation or API comments, or what ever required, for this.
> > ok
> >>
> >>> ---
> >>> v3:
> >>>   - patch [2/3] for hns3 has been applied and so remove it.
> >>>   - ops pointer check is closer to usage.
> >>>
> >>> Huisong Li (2):
> >>>    examples/ptpclient: add the check for PTP capability
> >>>    ethdev: add the check for the valitity of timestamp offload
> >>>
> >>>   examples/ptpclient/ptpclient.c |  5 +++
> >>>   lib/ethdev/rte_ethdev.c    | 57
> >>> +-
> >>>   2 files changed, 61 insertions(+), 1 deletion(-)
> >>>
> >> .



RE: [PATCH v3 1/2] examples/ptpclient: add the check for PTP capability

2023-09-21 Thread Hemant Agrawal

> 
> On 9/21/2023 10:18 AM, lihuisong (C) wrote:
> >
> > 在 2023/9/16 1:29, Ferruh Yigit 写道:
> >> On 8/17/2023 9:42 AM, Huisong Li wrote:
> >>> If a port doesn't support PTP, there is no need to keep running app.
> >>> So this patch adds the check for PTP capability.
> >>>
> >>> Fixes: 7a04a4f67dca ("examples/ptpclient: enable Rx timestamp
> >>> offload")
> >>> Cc: sta...@dpdk.org
> >>>
> >>> Signed-off-by: Huisong Li 
> >>> Signed-off-by: Dongdong Liu 
> >>> ---
> >>>   examples/ptpclient/ptpclient.c | 5 +
> >>>   1 file changed, 5 insertions(+)
> >>>
> >>> diff --git a/examples/ptpclient/ptpclient.c
> >>> b/examples/ptpclient/ptpclient.c index cdf2da64df..181d8fb357 100644
> >>> --- a/examples/ptpclient/ptpclient.c
> >>> +++ b/examples/ptpclient/ptpclient.c
> >>> @@ -196,6 +196,11 @@ port_init(uint16_t port, struct rte_mempool
> >>> *mbuf_pool)
> >>>     if (dev_info.rx_offload_capa & RTE_ETH_RX_OFFLOAD_TIMESTAMP)
> >>>   port_conf.rxmode.offloads |=
> RTE_ETH_RX_OFFLOAD_TIMESTAMP;
> >>> +    else {
> >>> +    printf("port(%u) doesn't support PTP: %s\n", port,
> >>> +   strerror(-retval));
> >>> +    return -ENOTSUP;
> >>> +    }
> >>>
> >> I am not sure why TIMESTAMP offload is required for PTP, I think
> >> there is a confusion.
> > If TIMESTAMP offload is not required for PTP, there isn't PTP offload
> > in ethdev lib.
> >
> 
> What do you mean with "PTP offload"?
> 
> If you check the ptpclient sample app, it parses ptp packets in the 
> application.

> 
> 
> >>
> >>
> >> Gagandeep, Hemant,
> >> Can you please clarify why TIMESTAMP offload is enabled?
> > looking forward to your reply.

[Hemant] as explained in other mail, it is a requirement for dpaa2. So, we are 
just passing the offload argument.

Well, currently there is no such offload to know HW PTP support in DPDK. It can 
be introduced. 

And I agree the above else should not be there atleast w.r.t TIMESTAMP OFFLOAD.

> >> .



RE: [PATCH v4] security: hide security context

2023-09-26 Thread Hemant Agrawal
Acked-by: Hemant Agrawal 



Re: [dpdk-dev] [PATCH v3 6/8] baseband/la12xx: add documentation support

2021-04-14 Thread Hemant Agrawal



On 4/14/2021 6:27 AM, Chautru, Nicolas wrote:

Documentation should be ideally embedded within the related commits to go hand 
in hand when feature are being added, not as a separate commit. Other comments 
below

ok



-Original Message-
From: Hemant Agrawal 
Sent: Monday, April 12, 2021 10:17 PM
To: dev@dpdk.org; gak...@marvell.com; Chautru, Nicolas

Cc: david.march...@redhat.com; Hemant Agrawal
; Nipun Gupta 
Subject: [PATCH v3 6/8] baseband/la12xx: add documentation support

This patch add documentation for LA12xx PMD.

Signed-off-by: Nipun Gupta 
Signed-off-by: Hemant Agrawal 
---
  MAINTAINERS|   9 ++
  doc/guides/bbdevs/features/la12xx.ini  |  14 +++
  doc/guides/bbdevs/index.rst|   1 +
  doc/guides/bbdevs/la12xx.rst   | 139 +
  doc/guides/rel_notes/release_21_05.rst |   5 +
  5 files changed, 168 insertions(+)
  create mode 100644 doc/guides/bbdevs/features/la12xx.ini
  create mode 100644 doc/guides/bbdevs/la12xx.rst

diff --git a/MAINTAINERS b/MAINTAINERS
index e746ef1d32..24081fceb3 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1289,6 +1289,15 @@ F: doc/guides/rawdevs/ntb.rst
  F: examples/ntb/
  F: doc/guides/sample_app_ug/ntb.rst

+Baseband Drivers
+---
+
+NXP LA12xx
+M: Hemant Agrawal 
+M: Nipun Gupta 
+F: drivers/baseband/la12xx/
+F: doc/guides/bbdevs/la12xx.rst
+F: doc/guides/bbdevs/features/la12xx.ini

  Packet processing
  -
diff --git a/doc/guides/bbdevs/features/la12xx.ini
b/doc/guides/bbdevs/features/la12xx.ini
new file mode 100644
index 00..979d9dd224
--- /dev/null
+++ b/doc/guides/bbdevs/features/la12xx.ini
@@ -0,0 +1,14 @@
+;
+; Supported features of the 'la12xx' bbdev driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Turbo Decoder (4G) = N
+Turbo Encoder (4G) = N
+LDPC Decoder (5G)  = Y
+LDPC Encoder (5G)  = Y
+LLR/HARQ Compression   = N
+External DDR Access= Y

What is the external DDR access capability here? This was not exposed in BBDEV.

ok. we will remove it



+HW Accelerated = Y
+BBDEV API  = Y
diff --git a/doc/guides/bbdevs/index.rst b/doc/guides/bbdevs/index.rst index
4445cbd1b0..cedd706fa6 100644
--- a/doc/guides/bbdevs/index.rst
+++ b/doc/guides/bbdevs/index.rst
@@ -14,3 +14,4 @@ Baseband Device Drivers
  fpga_lte_fec
  fpga_5gnr_fec
  acc100
+la12xx
diff --git a/doc/guides/bbdevs/la12xx.rst b/doc/guides/bbdevs/la12xx.rst
new file mode 100644 index 00..1cadd6f337
--- /dev/null
+++ b/doc/guides/bbdevs/la12xx.rst
@@ -0,0 +1,139 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright 2021 NXP
+
+NXP LA12xx Poll Mode Driver
+===
+
+The BBDEV LA12xx poll mode driver (PMD) supports an implementation for
+offloading High Phy processing functions like LDPC Encode / Decode 5GNR
+wireless acceleration function, using PCI based LA12xx Software defined
radio.
+
+More information can be found at `NXP Official Website
+<https://www.nxp.com/products/processors-and-microcontrollers/arm-
processors/layerscape-processors/layerscape-access-la1200-programmable-
baseband-processor:LA1200>`_.
+
+Features
+
+
+LA12xx PMD supports the following features:
+
+- LDPC Encode in the DL
+- LDPC Decode in the UL
+- Maximum of 8 UL queues
+- Maximum of 8 DL queues
+- PCIe Gen-3 x8 Interface
+- MSI-X

Capability was not exposed in the commit


+
+LA12xx PMD supports the following BBDEV capabilities:
+
+* For the LDPC encode operation:
+   - ``RTE_BBDEV_LDPC_CRC_24B_ATTACH`` :  set to attach CRC24B to CB(s)
+   - ``RTE_BBDEV_LDPC_RATE_MATCH`` :  if set then do not do Rate Match
+bypass

mismatch with the code

ok



+
+* For the LDPC decode operation:
+   - ``RTE_BBDEV_LDPC_CRC_TYPE_24B_CHECK`` :  check CRC24B from CB(s)
+   - ``RTE_BBDEV_LDPC_CRC_TYPE_24B_DROP`` :  drops CRC24B bits
appended while decoding
+   - ``RTE_BBDEV_LDPC_DEC_SCATTER_GATHER`` :  supports scatter-gather
+for input/output data
+
+Installation
+
+
+Section 3 of the DPDK manual provides instructions on installing and
compiling DPDK.
+
+DPDK requires hugepages to be configured as detailed in section 2 of the
DPDK manual.
+
+Initialization
+--
+
+The device can be listed on the host console with:
+
+
+Use the following lspci command to get the multiple LA12xx processor
+ids. The device ID of the LA12xx baseband processor is "1c30".
+

There is no SRIOV? Single device id?

yes, we don't support SRIOV.



+.. code-block:: console
+
+  sudo lspci -nn
+
+...
+0001:01:00.0 Power PC [0b20]: Freescale Semiconductor Inc Device
+[1957:1c30] ( rev 10) ...
+0002:01:00.0 Power PC [0b20]: Freescale Semiconductor Inc Device
+[1957:1c30] ( rev 10)
+
+
+Prerequisites
+-
+
+Currently supported by DPDK:
+
+- NXP LA1224 BSP **1.0+**.
+- NXP LA1224 PCIe Modem card connected to ARM host.
+
+- Follow the DPDK 

Re: [dpdk-dev] [PATCH v3 5/8] baseband/la12xx: add enqueue and dequeue support

2021-04-14 Thread Hemant Agrawal



On 4/14/2021 6:23 AM, Chautru, Nicolas wrote:

Add support for enqueue and dequeue the LDPC enc/dec from the modem device.

Signed-off-by: Nipun Gupta 
Signed-off-by: Hemant Agrawal 
---
  drivers/baseband/la12xx/bbdev_la12xx.c | 397 -
  drivers/baseband/la12xx/bbdev_la12xx_ipc.h |  37 ++
  2 files changed, 430 insertions(+), 4 deletions(-)

diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c 
b/drivers/baseband/la12xx/bbdev_la12xx.c
index 0a68686205..d1040987b2 100644
--- a/drivers/baseband/la12xx/bbdev_la12xx.c
+++ b/drivers/baseband/la12xx/bbdev_la12xx.c
@@ -117,6 +117,10 @@ la12xx_queue_release(struct rte_bbdev *dev, uint16_t q_id)
((uint64_t) ((unsigned long) (A) \
- ((uint64_t)ipc_priv->hugepg_start.host_vaddr)))
  
+#define MODEM_P2V(A) \

+   ((uint64_t) ((unsigned long) (A) \
+   + (unsigned long)(ipc_priv->peb_start.host_vaddr)))
+
  static int ipc_queue_configure(uint32_t channel_id,
ipc_t instance, struct bbdev_la12xx_q_priv *q_priv)  { @@ 
-345,6 +349,387 @@ static const struct rte_bbdev_ops pmd_ops = {
.queue_release = la12xx_queue_release,
.start = la12xx_start
  };
+
+static int
+fill_feca_desc_enc(struct bbdev_la12xx_q_priv *q_priv,
+  struct bbdev_ipc_dequeue_op *bbdev_ipc_op,
+  struct rte_bbdev_enc_op *bbdev_enc_op,
+  struct rte_bbdev_op_data *in_op_data) {
+   RTE_SET_USED(q_priv);
+   RTE_SET_USED(bbdev_ipc_op);
+   RTE_SET_USED(bbdev_enc_op);
+   RTE_SET_USED(in_op_data);
+
+   return 0;
+}

I miss why these functions are here.
Is that contribution supposed to work or a placeholder?


it is currently a placeholder for some optimization work we are doing.

i.e. to covert the bbdev params to our hardware format at host side itself.

We will remove these for now.



+
+static int
+fill_feca_desc_dec(struct bbdev_la12xx_q_priv *q_priv,
+  struct bbdev_ipc_dequeue_op *bbdev_ipc_op,
+  struct rte_bbdev_dec_op *bbdev_dec_op,
+  struct rte_bbdev_op_data *out_op_data) {
+   RTE_SET_USED(q_priv);
+   RTE_SET_USED(bbdev_ipc_op);
+   RTE_SET_USED(bbdev_dec_op);
+   RTE_SET_USED(out_op_data);
+
+   return 0;
+}
+
+static inline int
+is_bd_ring_full(uint32_t ci, uint32_t ci_flag,
+   uint32_t pi, uint32_t pi_flag)
+{
+   if (pi == ci) {
+   if (pi_flag != ci_flag)
+   return 1; /* Ring is Full */
+   }
+   return 0;
+}
+
+static inline int
+prepare_ldpc_enc_op(struct rte_bbdev_enc_op *bbdev_enc_op,
+   struct bbdev_ipc_dequeue_op *bbdev_ipc_op,
+   struct bbdev_la12xx_q_priv *q_priv,
+   struct rte_bbdev_op_data *in_op_data,
+   struct rte_bbdev_op_data *out_op_data) {
+   struct rte_bbdev_op_ldpc_enc *ldpc_enc = &bbdev_enc_op->ldpc_enc;
+   uint32_t total_out_bits;
+   int ret;
+
+   total_out_bits = (ldpc_enc->tb_params.cab *
+   ldpc_enc->tb_params.ea) + (ldpc_enc->tb_params.c -
+   ldpc_enc->tb_params.cab) * ldpc_enc->tb_params.eb;
+

This includes ratematching, see previous comment on capability

Also I see it would not support the partial TB as defined in documentation and 
API (r != 0)

Not yet.


+   ldpc_enc->output.length = (total_out_bits + 7)/8;
+
+   ret = fill_feca_desc_enc(q_priv, bbdev_ipc_op,
+bbdev_enc_op, in_op_data);
+   if (ret) {
+   BBDEV_LA12XX_PMD_ERR(
+   "fill_feca_desc_enc failed, ret: %d", ret);
+   return ret;
+   }
+
+   rte_pktmbuf_append(out_op_data->data, ldpc_enc->output.length);
+
+   return 0;
+}
+
+static inline int
+prepare_ldpc_dec_op(struct rte_bbdev_dec_op *bbdev_dec_op,
+   struct bbdev_ipc_dequeue_op *bbdev_ipc_op,
+   struct bbdev_la12xx_q_priv *q_priv,
+   struct rte_bbdev_op_data *out_op_data) {
+   struct rte_bbdev_op_ldpc_dec *ldpc_dec = &bbdev_dec_op->ldpc_dec;
+   uint32_t total_out_bits;
+   uint32_t num_code_blocks = 0;
+   uint16_t sys_cols;
+   int ret;
+
+   sys_cols = (ldpc_dec->basegraph == 1) ? 22 : 10;
+   if (ldpc_dec->tb_params.c == 1) {
+   total_out_bits = ((sys_cols * ldpc_dec->z_c) -
+   ldpc_dec->n_filler);
+   /* 5G-NR protocol uses 16 bit CRC when output packet
+* size <= 3824 (bits). Otherwise 24 bit CRC is used.
+* Adjust the output bits accordingly
+*/
+   if (total_out_bits - 16 <= 3824)
+   total_out_bits -= 16;
+   else
+   total_out_bits -= 24;
+   ldpc_dec->hard_output.length = (total_out_bits / 8);
+ 

Re: [dpdk-dev] [PATCH v3 3/8] baseband/la12xx: add support for multiple modems

2021-04-14 Thread Hemant Agrawal



On 4/14/2021 5:32 AM, Chautru, Nicolas wrote:

-Original Message-
From: Hemant Agrawal 
Sent: Monday, April 12, 2021 10:17 PM

This patch add support for multiple modems by assigning a modem id as dev
args in vdev creation.

Signed-off-by: Hemant Agrawal 
---
  drivers/baseband/la12xx/bbdev_la12xx.c | 60 --
  drivers/baseband/la12xx/bbdev_la12xx.h | 56 
  drivers/baseband/la12xx/bbdev_la12xx_ipc.h | 20 
  3 files changed, 131 insertions(+), 5 deletions(-)  create mode 100644
drivers/baseband/la12xx/bbdev_la12xx.h
  create mode 100644 drivers/baseband/la12xx/bbdev_la12xx_ipc.h

diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c
b/drivers/baseband/la12xx/bbdev_la12xx.c
index 8d3041ce28..7e9be74bb4 100644
--- a/drivers/baseband/la12xx/bbdev_la12xx.c
+++ b/drivers/baseband/la12xx/bbdev_la12xx.c
@@ -14,6 +14,8 @@
  #include 

  #include 
+#include 
+#include 

  #define DRIVER_NAME baseband_la12xx

@@ -22,18 +24,18 @@ RTE_LOG_REGISTER(bbdev_la12xx_logtype,
pmd.bb.la12xx, NOTICE);
  /*  Initialisation params structure that can be used by LA12xx BBDEV driver
*/  struct bbdev_la12xx_params {
uint8_t queues_num; /*< LA12xx BBDEV queues number */
+   int8_t modem_id; /*< LA12xx modem instance id */
  };

  #define BBDEV_LA12XX_MAX_NB_QUEUES_ARG  "max_nb_queues"
+#define BBDEV_LA12XX_VDEV_MODEM_ID_ARG "modem"
+#define LA12XX_MAX_MODEM 4

Minor : best to be consistent with prefix used throught the PMD. A bit of a mix 
and match.

ok



  static const char * const bbdev_la12xx_valid_params[] = {
BBDEV_LA12XX_MAX_NB_QUEUES_ARG,
+   BBDEV_LA12XX_VDEV_MODEM_ID_ARG,
  };

-/* private data structure */
-struct bbdev_la12xx_private {
-   unsigned int max_nb_queues;  /**< Max number of queues */
-};
  static inline int
  parse_u16_arg(const char *key, const char *value, void *extra_args)  { @@ -
52,6 +54,28 @@ parse_u16_arg(const char *key, const char *value, void
*extra_args)
return 0;
  }

+/* Parse integer from integer argument */ static int
+parse_integer_arg(const char *key __rte_unused,
+   const char *value, void *extra_args)
+{
+   int i;
+   char *end;
+
+   errno = 0;
+
+   i = strtol(value, &end, 10);
+   if (*end != 0 || errno != 0 || i < 0 || i > LA12XX_MAX_MODEM) {
+   BBDEV_LA12XX_PMD_ERR("Supported Port IDS are 0 to %d",
+   LA12XX_MAX_MODEM - 1);
+   return -EINVAL;
+   }
+
+   *((uint32_t *)extra_args) = i;
+
+   return 0;
+}
+
  /* Parse parameters used to create device */  static int
parse_bbdev_la12xx_params(struct bbdev_la12xx_params *params, @@ -
73,6 +97,16 @@ parse_bbdev_la12xx_params(struct bbdev_la12xx_params
*params,
if (ret < 0)
goto exit;

+   ret = rte_kvargs_process(kvlist,
+   bbdev_la12xx_valid_params[1],
+   &parse_integer_arg,
+   ¶ms->modem_id);
+
+   if (params->modem_id >= LA12XX_MAX_MODEM) {
+   BBDEV_LA12XX_PMD_ERR("Invalid modem id, must
be < %u",
+   LA12XX_MAX_MODEM);
+   goto exit;
+   }
}

  exit:
@@ -88,6 +122,7 @@ la12xx_bbdev_create(struct rte_vdev_device *vdev,  {
struct rte_bbdev *bbdev;
const char *name = rte_vdev_device_name(vdev);
+   struct bbdev_la12xx_private *priv;

PMD_INIT_FUNC_TRACE();

@@ -103,6 +138,20 @@ la12xx_bbdev_create(struct rte_vdev_device
*vdev,
return -ENOMEM;
}

+   priv = bbdev->data->dev_private;
+   priv->modem_id = init_params->modem_id;
+   /* if modem id is not configured */
+   if (priv->modem_id == -1)
+   priv->modem_id = bbdev->data->dev_id;
+
+   /* Reset Global variables */
+   priv->num_ldpc_enc_queues = 0;
+   priv->num_ldpc_dec_queues = 0;
+   priv->num_valid_queues = 0;
+   priv->max_nb_queues = init_params->queues_num;
+
+   BBDEV_LA12XX_PMD_INFO("Setting Up %s: DevId=%d,
ModemId=%d",
+   name, bbdev->data->dev_id, priv-

modem_id);

bbdev->dev_ops = NULL;
bbdev->device = &vdev->device;
bbdev->data->socket_id = 0;
@@ -174,4 +223,5 @@ static struct rte_vdev_driver bbdev_la12xx_pmd_drv
= {

  RTE_PMD_REGISTER_VDEV(DRIVER_NAME, bbdev_la12xx_pmd_drv);
RTE_PMD_REGISTER_PARAM_STRING(DRIVER_NAME,
-   BBDEV_LA12XX_MAX_NB_QUEUES_ARG"=");
+   BBDEV_LA12XX_MAX_NB_QUEUES_ARG"="
+   BBDEV_LA12XX_VDEV_MODEM_ID_ARG "= ");
diff --git a/drivers/baseband/la12xx/bbdev_la12xx.h
b/drivers/baseband/la12xx/bbdev_la12xx.h
new file mode 100644
index 00

Re: [dpdk-dev] [PATCH 4/4] examples/l3fwd: make data struct to be memory efficient

2021-04-20 Thread Hemant Agrawal



On 4/14/2021 12:36 AM, Jerin Jacob wrote:

On Thu, Mar 18, 2021 at 3:56 PM Ruifeng Wang  wrote:

There are some holes in data struct lcore_conf. The holes are
due to alignment requirement.

For struct lcore_rx_queue, there is no need to make every element
of this type to be cache line aligned, because the data is not
shared between cores.

Member len of struct mbuf_table can be moved out. So data can be
packed and there will be no need to load an extra cache line when
mbuf table is empty.

The change showed slight performance improvement on N1SDP platform.

Suggested-by: Honnappa Nagarahalli 

Signed-off-by: Ruifeng Wang 

This change alone is OK in the octeontx2 platform.(No difference in performance)
combining with 3/4 shows some regression. Probably is due to prefetch
or 128B cache line tuning specifics.


We checked it on Layerscape LS2088A platform. No difference for 1-2 core 
case. However observing ~2% regression for 4-8 cores.


Regards,

Hemant




Re: [dpdk-dev] [PATCH] common/dpaax: fix possible null pointer access

2021-04-21 Thread Hemant Agrawal



On 4/21/2021 8:16 AM, Min Hu (Connor) wrote:

From: Chengwen Feng 

This patch fixes possible null pointer access when dump iova table.

Fixes: 2f3d633aa593 ("common/dpaax: add library for PA/VA translation table")
Cc: sta...@dpdk.org

Signed-off-by: Chengwen Feng 
Signed-off-by: Min Hu (Connor) 
---
  drivers/common/dpaax/dpaax_iova_table.c | 4 +++-
  1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/common/dpaax/dpaax_iova_table.c 
b/drivers/common/dpaax/dpaax_iova_table.c
index 91bee65..54f89e1 100644
--- a/drivers/common/dpaax/dpaax_iova_table.c
+++ b/drivers/common/dpaax/dpaax_iova_table.c
@@ -366,8 +366,10 @@ dpaax_iova_table_dump(void)
}
  
  	DPAAX_DEBUG(" === Start of PA->VA Translation Table ===");

-   if (dpaax_iova_table_p == NULL)
+   if (dpaax_iova_table_p == NULL) {
DPAAX_DEBUG("\tNULL");
+   return;
+   }
  
  	entry = dpaax_iova_table_p->entries;

for (i = 0; i < dpaax_iova_table_p->count; i++) {

Acked-by: Hemant Agrawal 


Re: [dpdk-dev] [PATCH] drivers/net: fix FW version get

2021-04-22 Thread Hemant Agrawal

Acked-by: Hemant Agrawal 




[dpdk-dev] [PATCH v4 0/8] baseband: add NXP LA12xx driver

2021-04-24 Thread Hemant Agrawal
This series introduces the BBDEV LA12xx poll mode driver (PMD) to support
an implementation for offloading High Phy processing functions like
LDPC Encode / Decode 5GNR wireless acceleration function, using PCI based
LA12xx Software defined radio.

Please check the documentation patch for more info.

The driver currently implements basic feature to offload only the 5G LDPC
encode/decode.

A new capability has been added to check if the driver can support the
input data in network byte order. Two test vectors are also added as an
example with input data in network byte.

v2: add test case changes
v3: fix 32 bit compilation
v4: capability for network byte order, doc patch merged inline. 

Hemant Agrawal (7):
  bbdev: add network order data capability
  baseband: introduce NXP LA12xx driver
  baseband/la12xx: add devargs for max queues
  baseband/la12xx: add support for multiple modems
  baseband/la12xx: add queue and modem config support
  baseband/la12xx: add enqueue and dequeue support
  app/bbdev: enable la12xx for bbdev

Nipun Gupta (1):
  app/bbdev: add test vectors for transport blocks

 app/test-bbdev/meson.build|3 +
 app/test-bbdev/test_vectors/ldpc_dec_tb.data  |  122 ++
 app/test-bbdev/test_vectors/ldpc_enc_tb.data  |   60 +
 doc/guides/bbdevs/features/default.ini|1 +
 doc/guides/bbdevs/features/la12xx.ini |   14 +
 doc/guides/bbdevs/index.rst   |1 +
 doc/guides/bbdevs/la12xx.rst  |  127 ++
 doc/guides/prog_guide/bbdev.rst   |6 +
 doc/guides/rel_notes/release_21_05.rst|5 +
 drivers/baseband/la12xx/bbdev_la12xx.c| 1099 +
 drivers/baseband/la12xx/bbdev_la12xx.h|   51 +
 drivers/baseband/la12xx/bbdev_la12xx_ipc.h|  244 
 .../baseband/la12xx/bbdev_la12xx_pmd_logs.h   |   26 +
 drivers/baseband/la12xx/meson.build   |6 +
 drivers/baseband/la12xx/version.map   |3 +
 drivers/baseband/meson.build  |1 +
 lib/bbdev/rte_bbdev_op.h  |8 +-
 17 files changed, 1775 insertions(+), 2 deletions(-)
 create mode 100644 app/test-bbdev/test_vectors/ldpc_dec_tb.data
 create mode 100644 app/test-bbdev/test_vectors/ldpc_enc_tb.data
 create mode 100644 doc/guides/bbdevs/features/la12xx.ini
 create mode 100644 doc/guides/bbdevs/la12xx.rst
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx.c
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx.h
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx_ipc.h
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h
 create mode 100644 drivers/baseband/la12xx/meson.build
 create mode 100644 drivers/baseband/la12xx/version.map

-- 
2.17.1



[dpdk-dev] [PATCH v4 1/8] bbdev: add network order data capability

2021-04-24 Thread Hemant Agrawal
This patch intoduces a new capability of the bbdev device
to process the LDPC data in network byte order.

Signed-off-by: Hemant Agrawal 
---
 doc/guides/bbdevs/features/default.ini | 1 +
 doc/guides/prog_guide/bbdev.rst| 6 ++
 lib/bbdev/rte_bbdev_op.h   | 8 ++--
 3 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/doc/guides/bbdevs/features/default.ini 
b/doc/guides/bbdevs/features/default.ini
index 5fe267a625..e5da644099 100644
--- a/doc/guides/bbdevs/features/default.ini
+++ b/doc/guides/bbdevs/features/default.ini
@@ -14,3 +14,4 @@ LLR/HARQ Compression   =
 External DDR Access=
 HW Accelerated =
 BBDEV API  =
+Network Order Data =
diff --git a/doc/guides/prog_guide/bbdev.rst b/doc/guides/prog_guide/bbdev.rst
index 6b2bd54e1a..89a86d10fb 100644
--- a/doc/guides/prog_guide/bbdev.rst
+++ b/doc/guides/prog_guide/bbdev.rst
@@ -747,6 +747,9 @@ given below.
 |RTE_BBDEV_LDPC_ENC_CONCATENATION|
 | Set if a device supports concatenation of non byte aligned output  |
 ++
+|RTE_BBDEV_LDPC_ENC_NETWORK_ORDER|
+| Set if a device supports network order data processing |
+++
 
 The structure passed for each LDPC encode operation is given below,
 with the operation flags forming a bitmask in the ``op_flags`` field.
@@ -942,6 +945,9 @@ given below.
 |RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK|
 | Set if a device supports loopback access to HARQ internal memory   |
 ++
+|RTE_BBDEV_LDPC_DEC_NETWORK_ORDER|
+| Set if a device supports network order data processing |
+++
 
 The structure passed for each LDPC decode operation is given below,
 with the operation flags forming a bitmask in the ``op_flags`` field.
diff --git a/lib/bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h
index f946842727..8fab617768 100644
--- a/lib/bbdev/rte_bbdev_op.h
+++ b/lib/bbdev/rte_bbdev_op.h
@@ -186,7 +186,9 @@ enum rte_bbdev_op_ldpcdec_flag_bitmasks {
 *  for HARQ memory. If not set, it is assumed the filler bits are not
 *  in HARQ memory and handled directly by the LDPC decoder.
 */
-   RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 18)
+   RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 18),
+   /** Set if a device supports network order data processing */
+   RTE_BBDEV_LDPC_DEC_NETWORK_ORDER = (1ULL << 19)
 };
 
 /** Flags for LDPC encoder operation and capability structure */
@@ -206,7 +208,9 @@ enum rte_bbdev_op_ldpcenc_flag_bitmasks {
/** Set if a device supports scatter-gather functionality. */
RTE_BBDEV_LDPC_ENC_SCATTER_GATHER = (1ULL << 6),
/** Set if a device supports concatenation of non byte aligned output */
-   RTE_BBDEV_LDPC_ENC_CONCATENATION = (1ULL << 7)
+   RTE_BBDEV_LDPC_ENC_CONCATENATION = (1ULL << 7),
+   /** Set if a device supports network order data processing */
+   RTE_BBDEV_LDPC_ENC_NETWORK_ORDER = (1ULL << 8)
 };
 
 /** Flags for the Code Block/Transport block mode  */
-- 
2.17.1



[dpdk-dev] [PATCH v4 2/8] baseband: introduce NXP LA12xx driver

2021-04-24 Thread Hemant Agrawal
This patch introduce the baseband device drivers for NXP's
LA1200 series software defined baseband modem.

Signed-off-by: Nipun Gupta 
Signed-off-by: Hemant Agrawal 
---
 drivers/baseband/la12xx/bbdev_la12xx.c| 109 ++
 .../baseband/la12xx/bbdev_la12xx_pmd_logs.h   |  26 +
 drivers/baseband/la12xx/meson.build   |   6 +
 drivers/baseband/la12xx/version.map   |   3 +
 drivers/baseband/meson.build  |   1 +
 5 files changed, 145 insertions(+)
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx.c
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h
 create mode 100644 drivers/baseband/la12xx/meson.build
 create mode 100644 drivers/baseband/la12xx/version.map

diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c 
b/drivers/baseband/la12xx/bbdev_la12xx.c
new file mode 100644
index 00..7050b17728
--- /dev/null
+++ b/drivers/baseband/la12xx/bbdev_la12xx.c
@@ -0,0 +1,109 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2020-2021 NXP
+ */
+
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+#define DRIVER_NAME baseband_la12xx
+
+RTE_LOG_REGISTER(bbdev_la12xx_logtype, pmd.bb.la12xx, NOTICE);
+
+/* private data structure */
+struct bbdev_la12xx_private {
+   unsigned int max_nb_queues;  /**< Max number of queues */
+};
+/* Create device */
+static int
+la12xx_bbdev_create(struct rte_vdev_device *vdev)
+{
+   struct rte_bbdev *bbdev;
+   const char *name = rte_vdev_device_name(vdev);
+
+   PMD_INIT_FUNC_TRACE();
+
+   bbdev = rte_bbdev_allocate(name);
+   if (bbdev == NULL)
+   return -ENODEV;
+
+   bbdev->data->dev_private = rte_zmalloc(name,
+   sizeof(struct bbdev_la12xx_private),
+   RTE_CACHE_LINE_SIZE);
+   if (bbdev->data->dev_private == NULL) {
+   rte_bbdev_release(bbdev);
+   return -ENOMEM;
+   }
+
+   bbdev->dev_ops = NULL;
+   bbdev->device = &vdev->device;
+   bbdev->data->socket_id = 0;
+   bbdev->intr_handle = NULL;
+
+   /* register rx/tx burst functions for data path */
+   bbdev->dequeue_enc_ops = NULL;
+   bbdev->dequeue_dec_ops = NULL;
+   bbdev->enqueue_enc_ops = NULL;
+   bbdev->enqueue_dec_ops = NULL;
+
+   return 0;
+}
+
+/* Initialise device */
+static int
+la12xx_bbdev_probe(struct rte_vdev_device *vdev)
+{
+   const char *name;
+
+   PMD_INIT_FUNC_TRACE();
+
+   if (vdev == NULL)
+   return -EINVAL;
+
+   name = rte_vdev_device_name(vdev);
+   if (name == NULL)
+   return -EINVAL;
+
+   return la12xx_bbdev_create(vdev);
+}
+
+/* Uninitialise device */
+static int
+la12xx_bbdev_remove(struct rte_vdev_device *vdev)
+{
+   struct rte_bbdev *bbdev;
+   const char *name;
+
+   PMD_INIT_FUNC_TRACE();
+
+   if (vdev == NULL)
+   return -EINVAL;
+
+   name = rte_vdev_device_name(vdev);
+   if (name == NULL)
+   return -EINVAL;
+
+   bbdev = rte_bbdev_get_named_dev(name);
+   if (bbdev == NULL)
+   return -EINVAL;
+
+   rte_free(bbdev->data->dev_private);
+
+   return rte_bbdev_release(bbdev);
+}
+
+static struct rte_vdev_driver bbdev_la12xx_pmd_drv = {
+   .probe = la12xx_bbdev_probe,
+   .remove = la12xx_bbdev_remove
+};
+
+RTE_PMD_REGISTER_VDEV(DRIVER_NAME, bbdev_la12xx_pmd_drv);
diff --git a/drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h 
b/drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h
new file mode 100644
index 00..9dfa1cc458
--- /dev/null
+++ b/drivers/baseband/la12xx/bbdev_la12xx_pmd_logs.h
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2020 NXP
+ */
+
+#ifndef _BBDEV_LA12XX_PMD_LOGS_H_
+#define _BBDEV_LA12XX_PMD_LOGS_H_
+
+#define rte_bbdev_log(level, fmt, ...) \
+   rte_log(RTE_LOG_ ## level, bbdev_la12xx_logtype, fmt "\n", \
+   ##__VA_ARGS__)
+
+#ifdef RTE_LIBRTE_BBDEV_DEBUG
+#define rte_bbdev_log_debug(fmt, ...) \
+   rte_bbdev_log(DEBUG, "la12xx_pmd: " fmt, \
+   ##__VA_ARGS__)
+#else
+#define rte_bbdev_log_debug(fmt, ...)
+#endif
+
+#define PMD_INIT_FUNC_TRACE() rte_bbdev_log_debug(">>")
+
+/* DP Logs, toggled out at compile time if level lower than current level */
+#define rte_bbdev_dp_log(level, fmt, args...) \
+   RTE_LOG_DP(level, PMD, fmt, ## args)
+
+#endif /* _BBDEV_LA12XX_PMD_LOGS_H_ */
diff --git a/drivers/baseband/la12xx/meson.build 
b/drivers/baseband/la12xx/meson.build
new file mode 100644
index 00..7a017dcffa
--- /dev/null
+++ b/drivers/baseband/la12xx/meson.build
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright 2020-2021 NXP
+
+deps += ['bbdev', 'bus_vdev', 'ring']
+
+sources = files('bbdev_la12x

[dpdk-dev] [PATCH v4 3/8] baseband/la12xx: add devargs for max queues

2021-04-24 Thread Hemant Agrawal
This patch adds dev args to take  max queues as input

Signed-off-by: Nipun Gupta 
Signed-off-by: Hemant Agrawal 
---
 drivers/baseband/la12xx/bbdev_la12xx.c | 72 +-
 1 file changed, 70 insertions(+), 2 deletions(-)

diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c 
b/drivers/baseband/la12xx/bbdev_la12xx.c
index 7050b17728..8886b35429 100644
--- a/drivers/baseband/la12xx/bbdev_la12xx.c
+++ b/drivers/baseband/la12xx/bbdev_la12xx.c
@@ -19,13 +19,72 @@
 
 RTE_LOG_REGISTER(bbdev_la12xx_logtype, pmd.bb.la12xx, NOTICE);
 
+/*  Initialisation params structure that can be used by LA12xx BBDEV driver */
+struct bbdev_la12xx_params {
+   uint8_t queues_num; /*< LA12xx BBDEV queues number */
+};
+
+#define LA12XX_MAX_NB_QUEUES_ARG   "max_nb_queues"
+
+static const char * const bbdev_la12xx_valid_params[] = {
+   LA12XX_MAX_NB_QUEUES_ARG,
+};
+
 /* private data structure */
 struct bbdev_la12xx_private {
unsigned int max_nb_queues;  /**< Max number of queues */
 };
+static inline int
+parse_u16_arg(const char *key, const char *value, void *extra_args)
+{
+   uint16_t *u16 = extra_args;
+
+   unsigned int long result;
+   if ((value == NULL) || (extra_args == NULL))
+   return -EINVAL;
+   errno = 0;
+   result = strtoul(value, NULL, 0);
+   if ((result >= (1 << 16)) || (errno != 0)) {
+   rte_bbdev_log(ERR, "Invalid value %lu for %s", result, key);
+   return -ERANGE;
+   }
+   *u16 = (uint16_t)result;
+   return 0;
+}
+
+/* Parse parameters used to create device */
+static int
+parse_bbdev_la12xx_params(struct bbdev_la12xx_params *params,
+   const char *input_args)
+{
+   struct rte_kvargs *kvlist = NULL;
+   int ret = 0;
+
+   if (params == NULL)
+   return -EINVAL;
+   if (input_args) {
+   kvlist = rte_kvargs_parse(input_args,
+   bbdev_la12xx_valid_params);
+   if (kvlist == NULL)
+   return -EFAULT;
+
+   ret = rte_kvargs_process(kvlist, bbdev_la12xx_valid_params[0],
+   &parse_u16_arg, ¶ms->queues_num);
+   if (ret < 0)
+   goto exit;
+
+   }
+
+exit:
+   if (kvlist)
+   rte_kvargs_free(kvlist);
+   return ret;
+}
+
 /* Create device */
 static int
-la12xx_bbdev_create(struct rte_vdev_device *vdev)
+la12xx_bbdev_create(struct rte_vdev_device *vdev,
+   struct bbdev_la12xx_params *init_params __rte_unused)
 {
struct rte_bbdev *bbdev;
const char *name = rte_vdev_device_name(vdev);
@@ -62,7 +121,11 @@ la12xx_bbdev_create(struct rte_vdev_device *vdev)
 static int
 la12xx_bbdev_probe(struct rte_vdev_device *vdev)
 {
+   struct bbdev_la12xx_params init_params = {
+   8
+   };
const char *name;
+   const char *input_args;
 
PMD_INIT_FUNC_TRACE();
 
@@ -73,7 +136,10 @@ la12xx_bbdev_probe(struct rte_vdev_device *vdev)
if (name == NULL)
return -EINVAL;
 
-   return la12xx_bbdev_create(vdev);
+   input_args = rte_vdev_device_args(vdev);
+   parse_bbdev_la12xx_params(&init_params, input_args);
+
+   return la12xx_bbdev_create(vdev, &init_params);
 }
 
 /* Uninitialise device */
@@ -107,3 +173,5 @@ static struct rte_vdev_driver bbdev_la12xx_pmd_drv = {
 };
 
 RTE_PMD_REGISTER_VDEV(DRIVER_NAME, bbdev_la12xx_pmd_drv);
+RTE_PMD_REGISTER_PARAM_STRING(DRIVER_NAME,
+   LA12XX_MAX_NB_QUEUES_ARG"=");
-- 
2.17.1



[dpdk-dev] [PATCH v4 4/8] baseband/la12xx: add support for multiple modems

2021-04-24 Thread Hemant Agrawal
This patch add support for multiple modems by assigning
a modem id as dev args in vdev creation.

Signed-off-by: Hemant Agrawal 
---
 drivers/baseband/la12xx/bbdev_la12xx.c | 64 +++---
 drivers/baseband/la12xx/bbdev_la12xx.h | 56 +++
 drivers/baseband/la12xx/bbdev_la12xx_ipc.h | 20 +++
 3 files changed, 133 insertions(+), 7 deletions(-)
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx.h
 create mode 100644 drivers/baseband/la12xx/bbdev_la12xx_ipc.h

diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c 
b/drivers/baseband/la12xx/bbdev_la12xx.c
index 8886b35429..f26f3f2a08 100644
--- a/drivers/baseband/la12xx/bbdev_la12xx.c
+++ b/drivers/baseband/la12xx/bbdev_la12xx.c
@@ -14,6 +14,8 @@
 #include 
 
 #include 
+#include 
+#include 
 
 #define DRIVER_NAME baseband_la12xx
 
@@ -22,18 +24,18 @@ RTE_LOG_REGISTER(bbdev_la12xx_logtype, pmd.bb.la12xx, 
NOTICE);
 /*  Initialisation params structure that can be used by LA12xx BBDEV driver */
 struct bbdev_la12xx_params {
uint8_t queues_num; /*< LA12xx BBDEV queues number */
+   int8_t modem_id; /*< LA12xx modem instance id */
 };
 
 #define LA12XX_MAX_NB_QUEUES_ARG   "max_nb_queues"
+#define LA12XX_VDEV_MODEM_ID_ARG   "modem"
+#define LA12XX_MAX_MODEM 4
 
 static const char * const bbdev_la12xx_valid_params[] = {
LA12XX_MAX_NB_QUEUES_ARG,
+   LA12XX_VDEV_MODEM_ID_ARG,
 };
 
-/* private data structure */
-struct bbdev_la12xx_private {
-   unsigned int max_nb_queues;  /**< Max number of queues */
-};
 static inline int
 parse_u16_arg(const char *key, const char *value, void *extra_args)
 {
@@ -52,6 +54,28 @@ parse_u16_arg(const char *key, const char *value, void 
*extra_args)
return 0;
 }
 
+/* Parse integer from integer argument */
+static int
+parse_integer_arg(const char *key __rte_unused,
+   const char *value, void *extra_args)
+{
+   int i;
+   char *end;
+
+   errno = 0;
+
+   i = strtol(value, &end, 10);
+   if (*end != 0 || errno != 0 || i < 0 || i > LA12XX_MAX_MODEM) {
+   rte_bbdev_log(ERR, "Supported Port IDS are 0 to %d",
+   LA12XX_MAX_MODEM - 1);
+   return -EINVAL;
+   }
+
+   *((uint32_t *)extra_args) = i;
+
+   return 0;
+}
+
 /* Parse parameters used to create device */
 static int
 parse_bbdev_la12xx_params(struct bbdev_la12xx_params *params,
@@ -73,6 +97,16 @@ parse_bbdev_la12xx_params(struct bbdev_la12xx_params *params,
if (ret < 0)
goto exit;
 
+   ret = rte_kvargs_process(kvlist,
+   bbdev_la12xx_valid_params[1],
+   &parse_integer_arg,
+   ¶ms->modem_id);
+
+   if (params->modem_id >= LA12XX_MAX_MODEM) {
+   rte_bbdev_log(ERR, "Invalid modem id, must be < %u",
+   LA12XX_MAX_MODEM);
+   goto exit;
+   }
}
 
 exit:
@@ -84,10 +118,11 @@ parse_bbdev_la12xx_params(struct bbdev_la12xx_params 
*params,
 /* Create device */
 static int
 la12xx_bbdev_create(struct rte_vdev_device *vdev,
-   struct bbdev_la12xx_params *init_params __rte_unused)
+   struct bbdev_la12xx_params *init_params)
 {
struct rte_bbdev *bbdev;
const char *name = rte_vdev_device_name(vdev);
+   struct bbdev_la12xx_private *priv;
 
PMD_INIT_FUNC_TRACE();
 
@@ -103,6 +138,20 @@ la12xx_bbdev_create(struct rte_vdev_device *vdev,
return -ENOMEM;
}
 
+   priv = bbdev->data->dev_private;
+   priv->modem_id = init_params->modem_id;
+   /* if modem id is not configured */
+   if (priv->modem_id == -1)
+   priv->modem_id = bbdev->data->dev_id;
+
+   /* Reset Global variables */
+   priv->num_ldpc_enc_queues = 0;
+   priv->num_ldpc_dec_queues = 0;
+   priv->num_valid_queues = 0;
+   priv->max_nb_queues = init_params->queues_num;
+
+   rte_bbdev_log(INFO, "Setting Up %s: DevId=%d, ModemId=%d",
+   name, bbdev->data->dev_id, priv->modem_id);
bbdev->dev_ops = NULL;
bbdev->device = &vdev->device;
bbdev->data->socket_id = 0;
@@ -122,7 +171,7 @@ static int
 la12xx_bbdev_probe(struct rte_vdev_device *vdev)
 {
struct bbdev_la12xx_params init_params = {
-   8
+   8, -1,
};
const char *name;
const char *input_args;
@@ -174,4 +223,5 @@ static struct rte_vdev_driver bbdev_la12xx_pmd_drv = {
 
 RTE_PMD_REGISTER_VDEV(DRIVER_NAME, bbdev_la12xx_pmd_drv);
 RTE_PMD_REGISTER_PARAM_STRING(DRIVER_NAME,
-   LA12XX_MAX_NB_QUEUES_ARG"=");
+   LA12XX_MAX_NB_QUEUES_AR

[dpdk-dev] [PATCH v4 5/8] baseband/la12xx: add queue and modem config support

2021-04-24 Thread Hemant Agrawal
This patch add support for connecting with modem
and creating the ipc channel as queues with modem
for the exchange of data.

Signed-off-by: Nipun Gupta 
Signed-off-by: Hemant Agrawal 
---
 doc/guides/bbdevs/index.rst|   1 +
 doc/guides/bbdevs/la12xx.rst   |  81 +++
 doc/guides/rel_notes/release_21_05.rst |   5 +
 drivers/baseband/la12xx/bbdev_la12xx.c | 552 -
 drivers/baseband/la12xx/bbdev_la12xx.h |  11 +-
 drivers/baseband/la12xx/bbdev_la12xx_ipc.h | 189 ++-
 6 files changed, 829 insertions(+), 10 deletions(-)
 create mode 100644 doc/guides/bbdevs/la12xx.rst

diff --git a/doc/guides/bbdevs/index.rst b/doc/guides/bbdevs/index.rst
index 4445cbd1b0..cedd706fa6 100644
--- a/doc/guides/bbdevs/index.rst
+++ b/doc/guides/bbdevs/index.rst
@@ -14,3 +14,4 @@ Baseband Device Drivers
 fpga_lte_fec
 fpga_5gnr_fec
 acc100
+la12xx
diff --git a/doc/guides/bbdevs/la12xx.rst b/doc/guides/bbdevs/la12xx.rst
new file mode 100644
index 00..3c9ac5c047
--- /dev/null
+++ b/doc/guides/bbdevs/la12xx.rst
@@ -0,0 +1,81 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright 2021 NXP
+
+NXP LA12xx Poll Mode Driver
+===
+
+The BBDEV LA12xx poll mode driver (PMD) supports an implementation for
+offloading High Phy processing functions like LDPC Encode / Decode 5GNR 
wireless
+acceleration function, using PCI based LA12xx Software defined radio.
+
+More information can be found at `NXP Official Website
+<https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-processors/layerscape-access-la1200-programmable-baseband-processor:LA1200>`_.
+
+Features
+
+
+LA12xx PMD supports the following features:
+
+- Maximum of 8 UL queues
+- Maximum of 8 DL queues
+- PCIe Gen-3 x8 Interface
+- MSI-X
+
+Installation
+
+
+Section 3 of the DPDK manual provides instructions on installing and compiling 
DPDK.
+
+DPDK requires hugepages to be configured as detailed in section 2 of the DPDK 
manual.
+
+Initialization
+--
+
+The device can be listed on the host console with:
+
+
+Use the following lspci command to get the multiple LA12xx processor ids. The
+device ID of the LA12xx baseband processor is "1c30".
+
+.. code-block:: console
+
+  sudo lspci -nn
+
+...
+0001:01:00.0 Power PC [0b20]: Freescale Semiconductor Inc Device [1957:1c30] (
+rev 10)
+...
+0002:01:00.0 Power PC [0b20]: Freescale Semiconductor Inc Device [1957:1c30] (
+rev 10)
+
+
+Prerequisites
+-
+
+Currently supported by DPDK:
+
+- NXP LA1224 BSP **1.0+**.
+- NXP LA1224 PCIe Modem card connected to ARM host.
+
+- Follow the DPDK :ref:`Getting Started Guide for Linux ` to setup 
the basic DPDK environment.
+
+* Use dev arg option ``modem=0`` to identify the modem instance for a given
+  device. This is required only if more than 1 modem cards are attached to 
host.
+  this is optional and the default value is 0.
+  e.g. ``--vdev=baseband_la12xx,modem=0``
+
+* Use dev arg option ``max_nb_queues=x`` to specify the maximum number of 
queues
+  to be used for communication with offload device i.e. modem. default is 16.
+  e.g. ``--vdev=baseband_la12xx,max_nb_queues=4``
+
+Enabling logs
+-
+
+For enabling logs, use the following EAL parameter:
+
+.. code-block:: console
+
+   ./your_bbdev_application  --log-level=la12xx:
+
+Using ``bb.la12xx`` as log matching criteria, all Baseband PMD logs can be
+enabled which are lower than logging ``level``.
diff --git a/doc/guides/rel_notes/release_21_05.rst 
b/doc/guides/rel_notes/release_21_05.rst
index b3224dc332..4e0b62debb 100644
--- a/doc/guides/rel_notes/release_21_05.rst
+++ b/doc/guides/rel_notes/release_21_05.rst
@@ -236,6 +236,11 @@ New Features
   the hash function used in NICs to spread the traffic among the queues.
   It can be used to get predictable mapping of the flows.
 
+* **Added NXP LA12xx baseband PMD.**
+
+  * Added a new baseband PMD driver for NXP LA12xx Software defined radio.
+  * See the :doc:`../bbdevs/la12xx` for more details.
+
 * **Updated testpmd.**
 
   * Added a command line option to configure forced speed for Ethernet port.
diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c 
b/drivers/baseband/la12xx/bbdev_la12xx.c
index f26f3f2a08..1fdeca279e 100644
--- a/drivers/baseband/la12xx/bbdev_la12xx.c
+++ b/drivers/baseband/la12xx/bbdev_la12xx.c
@@ -3,6 +3,11 @@
  */
 
 #include 
+#include 
+#include 
+#include 
+#include 
+#include 
 
 #include 
 #include 
@@ -31,11 +36,549 @@ struct bbdev_la12xx_params {
 #define LA12XX_VDEV_MODEM_ID_ARG   "modem"
 #define LA12XX_MAX_MODEM 4
 
+#define LA12XX_MAX_CORES   4
+#define LA12XX_LDPC_ENC_CORE   0
+#define LA12XX_LDPC_DEC_CORE   1
+
+#define LA12XX_MAX_LDPC_ENC_QUEUES 4
+#define LA12XX_MAX_LDPC_DEC_QUEUES 4
+
 static const char * const bbdev_la12xx_valid_params[] = {
LA12XX_MAX_NB_QUEUES_ARG,
LA12XX_VDEV_MODEM_I

[dpdk-dev] [PATCH v4 6/8] baseband/la12xx: add enqueue and dequeue support

2021-04-24 Thread Hemant Agrawal
Add support for enqueue and dequeue the LDPC enc/dec
from the modem device.

Signed-off-by: Nipun Gupta 
Signed-off-by: Hemant Agrawal 
---
 doc/guides/bbdevs/features/la12xx.ini  |  14 +
 doc/guides/bbdevs/la12xx.rst   |  46 +++
 drivers/baseband/la12xx/bbdev_la12xx.c | 334 -
 drivers/baseband/la12xx/bbdev_la12xx_ipc.h |  37 +++
 4 files changed, 425 insertions(+), 6 deletions(-)
 create mode 100644 doc/guides/bbdevs/features/la12xx.ini

diff --git a/doc/guides/bbdevs/features/la12xx.ini 
b/doc/guides/bbdevs/features/la12xx.ini
new file mode 100644
index 00..d184914b10
--- /dev/null
+++ b/doc/guides/bbdevs/features/la12xx.ini
@@ -0,0 +1,14 @@
+;
+; Supported features of the 'la12xx' bbdev driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Turbo Decoder (4G) = N
+Turbo Encoder (4G) = N
+LDPC Decoder (5G)  = Y
+LDPC Encoder (5G)  = Y
+LLR/HARQ Compression   = N
+HW Accelerated = Y
+BBDEV API  = Y
+Network Order Data = Y
\ No newline at end of file
diff --git a/doc/guides/bbdevs/la12xx.rst b/doc/guides/bbdevs/la12xx.rst
index 3c9ac5c047..c39be0e51f 100644
--- a/doc/guides/bbdevs/la12xx.rst
+++ b/doc/guides/bbdevs/la12xx.rst
@@ -16,6 +16,8 @@ Features
 
 LA12xx PMD supports the following features:
 
+- LDPC Encode in the DL
+- LDPC Decode in the UL
 - Maximum of 8 UL queues
 - Maximum of 8 DL queues
 - PCIe Gen-3 x8 Interface
@@ -79,3 +81,47 @@ For enabling logs, use the following EAL parameter:
 
 Using ``bb.la12xx`` as log matching criteria, all Baseband PMD logs can be
 enabled which are lower than logging ``level``.
+
+Test Application
+
+
+BBDEV provides a test application, ``test-bbdev.py`` and range of test data 
for testing
+the functionality of LA12xx for FEC encode and decode, depending on the device
+capabilities. The test application is located under app->test-bbdev folder and 
has the
+following options:
+
+.. code-block:: console
+
+  "-p", "--testapp-path": specifies path to the bbdev test app.
+  "-e", "--eal-params" : EAL arguments which are passed to the test app.
+  "-t", "--timeout": Timeout in seconds (default=300).
+  "-c", "--test-cases" : Defines test cases to run. Run all if not specified.
+  "-v", "--test-vector": Test vector path 
(default=dpdk_path+/app/test-bbdev/test_vectors/bbdev_null.data).
+  "-n", "--num-ops": Number of operations to process on device 
(default=32).
+  "-b", "--burst-size" : Operations enqueue/dequeue burst size (default=32).
+  "-s", "--snr": SNR in dB used when generating LLRs for bler 
tests.
+  "-s", "--iter_max"   : Number of iterations for LDPC decoder.
+  "-l", "--num-lcores" : Number of lcores to run (default=16).
+  "-i", "--init-device" : Initialise PF device with default values.
+
+
+To execute the test application tool using simple decode or encode data,
+type one of the following:
+
+.. code-block:: console
+
+  ./test-bbdev.py -e="--vdev=baseband_la12xx,socket_id=0,max_nb_queues=8" -c 
validation -n 64 -b 1 -v ./ldpc_dec_default.data
+  ./test-bbdev.py -e="--vdev=baseband_la12xx,socket_id=0,max_nb_queues=8" -c 
validation -n 64 -b 1 -v ./ldpc_enc_default.data
+
+The test application ``test-bbdev.py``, supports the ability to configure the 
PF device with
+a default set of values, if the "-i" or "- -init-device" option is included. 
The default values
+are defined in test_bbdev_perf.c.
+
+
+Test Vectors
+
+
+In addition to the simple LDPC decoder and LDPC encoder tests, bbdev also 
provides
+a range of additional tests under the test_vectors folder, which may be 
useful. The results
+of these tests will depend on the LA12xx FEC capabilities which may cause some
+testcases to be skipped, but no failure should be reported.
diff --git a/drivers/baseband/la12xx/bbdev_la12xx.c 
b/drivers/baseband/la12xx/bbdev_la12xx.c
index 1fdeca279e..50e3284622 100644
--- a/drivers/baseband/la12xx/bbdev_la12xx.c
+++ b/drivers/baseband/la12xx/bbdev_la12xx.c
@@ -54,7 +54,8 @@ static const struct rte_bbdev_op_cap bbdev_capabilities[] = {
.cap.ldpc_enc = {
.capability_flags =
RTE_BBDEV_LDPC_CRC_24A_ATTACH |
-   RTE_BBDEV_LDPC_CRC_24B_ATTACH,
+   RTE_BBDEV_LDPC_CRC_24B_ATTACH |
+   RTE_BBDEV_LDPC_ENC_NETWORK_ORDER,
.num_buffers_src =
RTE_BBDEV_LDPC_MAX_CODE_BLOCKS,
.num_buffers_dst =
@@ -68,7 +69,

[dpdk-dev] [PATCH v4 7/8] app/bbdev: enable la12xx for bbdev

2021-04-24 Thread Hemant Agrawal
this patch adds la12xx driver in test bbdev

Signed-off-by: Hemant Agrawal 
---
 app/test-bbdev/meson.build | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/app/test-bbdev/meson.build b/app/test-bbdev/meson.build
index 57335641f0..75fd87ae2d 100644
--- a/app/test-bbdev/meson.build
+++ b/app/test-bbdev/meson.build
@@ -17,3 +17,6 @@ endif
 if dpdk_conf.has('RTE_BASEBAND_ACC100')
 deps += ['baseband_acc100']
 endif
+if dpdk_conf.has('RTE_LIBRTE_PMD_BBDEV_LA12XX')
+   deps += ['baseband_la12xx']
+endif
-- 
2.17.1



[dpdk-dev] [PATCH v4 8/8] app/bbdev: add test vectors for transport blocks

2021-04-24 Thread Hemant Agrawal
From: Nipun Gupta 

This patch adds two test vectors for transport block in network byte
order:
- LDPC encode for Transport Block
- LDPC decode for Transport block

Signed-off-by: Nipun Gupta 
---
 app/test-bbdev/test_vectors/ldpc_dec_tb.data | 122 +++
 app/test-bbdev/test_vectors/ldpc_enc_tb.data |  60 +
 2 files changed, 182 insertions(+)
 create mode 100644 app/test-bbdev/test_vectors/ldpc_dec_tb.data
 create mode 100644 app/test-bbdev/test_vectors/ldpc_enc_tb.data

diff --git a/app/test-bbdev/test_vectors/ldpc_dec_tb.data 
b/app/test-bbdev/test_vectors/ldpc_dec_tb.data
new file mode 100644
index 00..4ec5020d04
--- /dev/null
+++ b/app/test-bbdev/test_vectors/ldpc_dec_tb.data
@@ -0,0 +1,122 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright 2020 NXP
+
+op_type =
+RTE_BBDEV_OP_LDPC_DEC
+
+input0 =
+0x817f8181, 0x7f7f8181, 0x817f7f81, 0x81817f81, 0x81817f81, 0x817f7f81, 
0x7f7f7f7f, 0x7f7f7f81,
+0x817f7f81, 0x817f7f81, 0x7f7f817f, 0x7f7f7f81, 0x81817f7f, 0x81818181, 
0x817f8181, 0x7f817f81,
+0x81817f7f, 0x7f7f817f, 0x81817f81, 0x817f8181, 0x7f7f7f81, 0x817f817f, 
0x7f817f7f, 0x7f817f7f,
+0x7f817f7f, 0x81817f7f, 0x7f818181, 0x817f7f7f, 0x8181817f, 0x81817f7f, 
0x7f817f81, 0x7f7f7f7f,
+0x7f817f7f, 0x81817f7f, 0x81818181, 0x817f817f, 0x81817f7f, 0x7f81817f, 
0x7f7f7f7f, 0x7f7f7f7f,
+0x7f818181, 0x7f7f7f81, 0x81817f81, 0x7f817f7f, 0x7f7f7f7f, 0x817f817f, 
0x817f817f, 0x7f7f817f,
+0x81817f81, 0x7f7f7f7f, 0x7f81817f, 0x817f817f, 0x7f7f8181, 0x7f7f7f7f, 
0x817f7f7f, 0x81818181,
+0x817f8181, 0x7f7f817f, 0x7f7f8181, 0x7f7f7f7f, 0x7f818181, 0x817f8181, 
0x817f7f81, 0x817f8181,
+0x817f7f81, 0x81817f7f, 0x7f7f8181, 0x81818181, 0x817f817f, 0x817f7f7f, 
0x81818181, 0x7f817f81,
+0x7f7f7f81, 0x81817f81, 0x7f817f7f, 0x7f818181, 0x7f7f7f81, 0x817f817f, 
0x81818181, 0x81818181,
+0x81817f81, 0x81817f81, 0x7f7f8181, 0x817f7f7f, 0x7f81817f, 0x817f817f, 
0x81817f7f, 0x817f7f81,
+0x81817f7f, 0x7f7f7f81, 0x7f817f81, 0x7f817f81, 0x817f7f7f, 0x7f818181, 
0x81818181, 0x7f7f7f7f,
+0x7f7f7f7f, 0x8181817f, 0x7f7f7f81, 0x7f817f81, 0x81817f81, 0x7f7f817f, 
0x7f81817f, 0x817f8181,
+0x7f81817f, 0x7f81817f, 0x817f7f7f, 0x7f81817f, 0x817f7f81, 0x817f7f81, 
0x7f817f7f, 0x8181817f,
+0x7f81817f, 0x7f7f8181, 0x817f8181, 0x817f7f7f, 0x817f7f81, 0x7f81817f, 
0x7f7f817f, 0x7f817f7f,
+0x7f7f8181, 0x81818181, 0x7f818181, 0x7f7f817f, 0x7f818181, 0x81818181, 
0x7f817f7f, 0x817f817f,
+0x817f817f, 0x817f7f7f, 0x81817f81, 0x81817f7f, 0x81817f81, 0x7f817f81, 
0x7f817f7f, 0x7f817f7f,
+0x817f7f7f, 0x817f7f7f, 0x7f7f7f7f, 0x7f7f7f81, 0x7f7f8181, 0x7f817f81, 
0x7f817f7f, 0x817f7f7f,
+0x7f7f8181, 0x8181817f, 0x7f7f8181, 0x7f7f7f81, 0x817f7f7f, 0x7f7f7f81, 
0x817f8181, 0x7f7f817f,
+0x7f81817f, 0x817f817f, 0x7f817f81, 0x7f7f8181, 0x7f818181, 0x7f817f81, 
0x81818181, 0x81817f7f,
+0x7f81817f, 0x7f81817f, 0x7f7f8181, 0x81818181, 0x817f8181, 0x7f7f817f, 
0x7f817f7f, 0x7f7f8181,
+0x7f81817f, 0x7f7f817f, 0x7f7f7f7f, 0x7f818181, 0x81817f7f, 0x8181817f, 
0x7f81817f, 0x8181817f,
+0x81817f81, 0x7f7f7f7f, 0x81818181, 0x7f7f817f, 0x7f81817f, 0x7f7f7f7f, 
0x81817f81, 0x817f7f81,
+0x817f7f81, 0x817f7f81, 0x81818181, 0x7f7f7f7f, 0x81817f81, 0x817f7f7f, 
0x8181817f, 0x7f7f7f81,
+0x81817f81, 0x817f7f81, 0x81818181, 0x7f7f7f7f, 0x81817f7f, 0x81817f81, 
0x7f7f7f81, 0x7f7f7f7f,
+0x817f817f, 0x7f818181, 0x8181817f, 0x81817f81, 0x7f7f7f81, 0x7f817f7f, 
0x7f7f7f7f, 0x7f817f81,
+0x8181817f, 0x7f7f7f7f, 0x81817f7f, 0x7f7f7f81, 0x7f81817f, 0x7f7f7f7f, 
0x7f7f7f81, 0x817f8181,
+0x7f7f8181, 0x7f7f7f81, 0x7f7f8181, 0x7f817f7f, 0x81818181, 0x7f81817f, 
0x7f818181, 0x7f818181,
+0x7f818181, 0x817f7f81, 0x7f7f8181, 0x81818181, 0x7f7f7f7f, 0x7f7f7f7f, 
0x817f8181, 0x81818181,
+0x7f7f817f, 0x817f8181, 0x81817f7f, 0x817f817f, 0x7f7f817f, 0x7f7f7f7f, 
0x817f8181, 0x817f8181,
+0x817f8181, 0x81818181, 0x7f7f817f, 0x7f817f81, 0x817f7f81, 0x7f7f7f81, 
0x81817f81, 0x7f818181,
+0x81817f7f, 0x7f818181, 0x81818181, 0x817f817f, 0x7f817f7f, 0x81818181, 
0x817f8181, 0x7f7f7f7f,
+0x7f817f81, 0x817f7f7f, 0x7f818181, 0x8181817f, 0x817f817f, 0x7f817f7f, 
0x817f7f81, 0x7f818181,
+0x817f7f7f, 0x817f7f81, 0x7f7f7f81, 0x81817f81, 0x7f81817f, 0x7f818181, 
0x81817f7f, 0x817f7f81,
+0x81817f81, 0x7f7f8181, 0x7f7f8181, 0x7f817f81, 0x7f7f817f, 0x817f7f7f, 
0x7f7f7f7f, 0x817f7f7f,
+0x7f7f8181, 0x817f8181, 0x817f8181, 0x7f817f81, 0x817f8181, 0x8181817f, 
0x81817f7f, 0x7f817f7f,
+0x7f817f7f, 0x7f817f81, 0x817f817f, 0x817f7f7f, 0x8181817f, 0x817f817f, 
0x817f7f81, 0x81817f7f,
+0x7f817f7f, 0x7f7f7f7f, 0x7f817f7f, 0x7f7f817f, 0x7f818181, 0x8181817f, 
0x817f7f7f, 0x7f817f81,
+0x7f7f8181, 0x81817f7f, 0x7f7f817f, 0x7f7f817f, 0x7f817f7f, 0x7f7f817f, 
0x7f818181, 0x7f817f7f,
+0x817f7f7f, 0x7f817f81, 0x81818181, 0x7f818181, 0x817f8181, 0x8181817f, 
0x8181817f, 0x817f7f7f,
+0x81817f81, 0x817f7f7f, 0x7f81817f, 0x817f8181, 0x7f818181, 0x7f817f7f, 
0x81817f7f, 0x7f81817f,
+0x81817f81, 0x7f7f7f81, 0x7f7f7f7f, 0x81818181, 0x817f7f7f, 0x81817f81, 
0x817f7f81, 0x81817f7f,
+0x81818181, 0x7f7f7f7f, 0x817f817f

Re: [dpdk-dev] [PATCH v4 1/8] bbdev: add network order data capability

2021-04-28 Thread Hemant Agrawal

Hi Dave,

If we go back to the data providing source i.e. FAPI interface, it is 
implementation specific. As per SCF222:


Our customers do use BE data in network and at FAPI interface.

In LA12xx, at present, we use u8 Big-endian data for processing to FECA 
engine.  We do see that other drivers in DPDK are using Little Endian 
*(with u32 data)* but standards is open for both.


Regards,

Hemant

On 4/26/2021 10:31 PM, Dave Burley wrote:

Hi Hemant

Can I ask what the usage case is for 
RTE_BBDEV_LDPC_ENC_NETWORK_ORDER/RTE_BBDEV_LDPC_DEC_NETWORK_ORDER ?

Thanks

Dave




From: dev  on behalf of Hemant Agrawal 

Sent: 24 April 2021 11:36
To: dev@dpdk.org ; gak...@marvell.com ; 
nicolas.chau...@intel.com 
Cc: david.march...@redhat.com ; Hemant Agrawal 

Subject: [dpdk-dev] [PATCH v4 1/8] bbdev: add network order data capability

CAUTION: This email originated from outside of the organization. Do not click 
links or open attachments unless you recognize the sender and know the content 
is safe.

This patch intoduces a new capability of the bbdev device
to process the LDPC data in network byte order.

Signed-off-by: Hemant Agrawal 
---
  doc/guides/bbdevs/features/default.ini | 1 +
  doc/guides/prog_guide/bbdev.rst| 6 ++
  lib/bbdev/rte_bbdev_op.h   | 8 ++--
  3 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/doc/guides/bbdevs/features/default.ini 
b/doc/guides/bbdevs/features/default.ini
index 5fe267a625..e5da644099 100644
--- a/doc/guides/bbdevs/features/default.ini
+++ b/doc/guides/bbdevs/features/default.ini
@@ -14,3 +14,4 @@ LLR/HARQ Compression   =
  External DDR Access=
  HW Accelerated =
  BBDEV API  =
+Network Order Data =
diff --git a/doc/guides/prog_guide/bbdev.rst b/doc/guides/prog_guide/bbdev.rst
index 6b2bd54e1a..89a86d10fb 100644
--- a/doc/guides/prog_guide/bbdev.rst
+++ b/doc/guides/prog_guide/bbdev.rst
@@ -747,6 +747,9 @@ given below.
  |RTE_BBDEV_LDPC_ENC_CONCATENATION|
  | Set if a device supports concatenation of non byte aligned output  |
  ++
+|RTE_BBDEV_LDPC_ENC_NETWORK_ORDER|
+| Set if a device supports network order data processing |
+++

  The structure passed for each LDPC encode operation is given below,
  with the operation flags forming a bitmask in the ``op_flags`` field.
@@ -942,6 +945,9 @@ given below.
  |RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK|
  | Set if a device supports loopback access to HARQ internal memory   |
  ++
+|RTE_BBDEV_LDPC_DEC_NETWORK_ORDER|
+| Set if a device supports network order data processing |
+++

  The structure passed for each LDPC decode operation is given below,
  with the operation flags forming a bitmask in the ``op_flags`` field.
diff --git a/lib/bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h
index f946842727..8fab617768 100644
--- a/lib/bbdev/rte_bbdev_op.h
+++ b/lib/bbdev/rte_bbdev_op.h
@@ -186,7 +186,9 @@ enum rte_bbdev_op_ldpcdec_flag_bitmasks {
  *  for HARQ memory. If not set, it is assumed the filler bits are not
  *  in HARQ memory and handled directly by the LDPC decoder.
  */
-   RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 18)
+   RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 18),
+   /** Set if a device supports network order data processing */
+   RTE_BBDEV_LDPC_DEC_NETWORK_ORDER = (1ULL << 19)
  };

  /** Flags for LDPC encoder operation and capability structure */
@@ -206,7 +208,9 @@ enum rte_bbdev_op_ldpcenc_flag_bitmasks {
 /** Set if a device supports scatter-gather functionality. */
 RTE_BBDEV_LDPC_ENC_SCATTER_GATHER = (1ULL << 6),
 /** Set if a device supports concatenation of non byte aligned output 
*/
-   RTE_BBDEV_LDPC_ENC_CONCATENATION = (1ULL << 7)
+   RTE_BBDEV_LDPC_ENC_CONCATENATION = (1ULL << 7),
+   /** Set if a device supports network order data processing */
+   RTE_BBDEV_LDPC_ENC_NETWORK_ORDER = (1ULL << 8)
  };

  /** Flags for the Code Block/Transport block mode  */
--
2.17.1



Re: [dpdk-dev] [PATCH v4 1/8] bbdev: add network order data capability

2021-04-28 Thread Hemant Agrawal

Hi,

    My mail with photo snippets were rejected by dpdk mailing list. So, 
just sending the summary of it.


    My understanding is that in ORAN, typically network order is used 
between CU-DU or DU-RU communication. In FAPI interface as well, both LE 
and BE are allowed types, however few places do explicitly state BE type.


   Our customers/partners are typically using BE and LA12xx is 
configured to process BE data.


Regards,

Hemant


On 4/26/2021 10:31 PM, Dave Burley wrote:

Hi Hemant

Can I ask what the usage case is for 
RTE_BBDEV_LDPC_ENC_NETWORK_ORDER/RTE_BBDEV_LDPC_DEC_NETWORK_ORDER ?

Thanks

Dave




From: dev  on behalf of Hemant Agrawal 

Sent: 24 April 2021 11:36
To: dev@dpdk.org ; gak...@marvell.com ; 
nicolas.chau...@intel.com 
Cc: david.march...@redhat.com ; Hemant Agrawal 

Subject: [dpdk-dev] [PATCH v4 1/8] bbdev: add network order data capability

CAUTION: This email originated from outside of the organization. Do not click 
links or open attachments unless you recognize the sender and know the content 
is safe.

This patch intoduces a new capability of the bbdev device
to process the LDPC data in network byte order.

Signed-off-by: Hemant Agrawal 
---
  doc/guides/bbdevs/features/default.ini | 1 +
  doc/guides/prog_guide/bbdev.rst| 6 ++
  lib/bbdev/rte_bbdev_op.h   | 8 ++--
  3 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/doc/guides/bbdevs/features/default.ini 
b/doc/guides/bbdevs/features/default.ini
index 5fe267a625..e5da644099 100644
--- a/doc/guides/bbdevs/features/default.ini
+++ b/doc/guides/bbdevs/features/default.ini
@@ -14,3 +14,4 @@ LLR/HARQ Compression   =
  External DDR Access=
  HW Accelerated =
  BBDEV API  =
+Network Order Data =
diff --git a/doc/guides/prog_guide/bbdev.rst b/doc/guides/prog_guide/bbdev.rst
index 6b2bd54e1a..89a86d10fb 100644
--- a/doc/guides/prog_guide/bbdev.rst
+++ b/doc/guides/prog_guide/bbdev.rst
@@ -747,6 +747,9 @@ given below.
  |RTE_BBDEV_LDPC_ENC_CONCATENATION|
  | Set if a device supports concatenation of non byte aligned output  |
  ++
+|RTE_BBDEV_LDPC_ENC_NETWORK_ORDER|
+| Set if a device supports network order data processing |
+++

  The structure passed for each LDPC encode operation is given below,
  with the operation flags forming a bitmask in the ``op_flags`` field.
@@ -942,6 +945,9 @@ given below.
  |RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_LOOPBACK|
  | Set if a device supports loopback access to HARQ internal memory   |
  ++
+|RTE_BBDEV_LDPC_DEC_NETWORK_ORDER|
+| Set if a device supports network order data processing |
+++

  The structure passed for each LDPC decode operation is given below,
  with the operation flags forming a bitmask in the ``op_flags`` field.
diff --git a/lib/bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h
index f946842727..8fab617768 100644
--- a/lib/bbdev/rte_bbdev_op.h
+++ b/lib/bbdev/rte_bbdev_op.h
@@ -186,7 +186,9 @@ enum rte_bbdev_op_ldpcdec_flag_bitmasks {
  *  for HARQ memory. If not set, it is assumed the filler bits are not
  *  in HARQ memory and handled directly by the LDPC decoder.
  */
-   RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 18)
+   RTE_BBDEV_LDPC_INTERNAL_HARQ_MEMORY_FILLERS = (1ULL << 18),
+   /** Set if a device supports network order data processing */
+   RTE_BBDEV_LDPC_DEC_NETWORK_ORDER = (1ULL << 19)
  };

  /** Flags for LDPC encoder operation and capability structure */
@@ -206,7 +208,9 @@ enum rte_bbdev_op_ldpcenc_flag_bitmasks {
 /** Set if a device supports scatter-gather functionality. */
 RTE_BBDEV_LDPC_ENC_SCATTER_GATHER = (1ULL << 6),
 /** Set if a device supports concatenation of non byte aligned output 
*/
-   RTE_BBDEV_LDPC_ENC_CONCATENATION = (1ULL << 7)
+   RTE_BBDEV_LDPC_ENC_CONCATENATION = (1ULL << 7),
+   /** Set if a device supports network order data processing */
+   RTE_BBDEV_LDPC_ENC_NETWORK_ORDER = (1ULL << 8)
  };

  /** Flags for the Code Block/Transport block mode  */
--
2.17.1



[dpdk-dev] [PATCH] ethdev: add missing buses in dev iterator

2021-04-28 Thread Hemant Agrawal
This patch fixes issue with OVS 2.15 not working on
DPAA/FSLMC based platform due to missing support for
these busses in dev_iterate.
This patch adds dpaa_bus and fslmc to dev iterator
for bus arguments.

Fixes: 214ed1acd125 ("ethdev: add iterator to match devargs input")
Cc: sta...@dpdk.org

Signed-off-by: Hemant Agrawal 
---
 lib/ethdev/rte_ethdev.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
index a1879765e8..483013ec7a 100644
--- a/lib/ethdev/rte_ethdev.c
+++ b/lib/ethdev/rte_ethdev.c
@@ -260,7 +260,9 @@ rte_eth_iterator_init(struct rte_dev_iterator *iter, const 
char *devargs_str)
}
 
/* Convert bus args to new syntax for use with new API dev_iterate. */
-   if (strcmp(iter->bus->name, "vdev") == 0) {
+   if ((strcmp(iter->bus->name, "vdev") == 0) ||
+   (strcmp(iter->bus->name, "fslmc") == 0) ||
+   (strcmp(iter->bus->name, "dpaa_bus") == 0)) {
bus_param_key = "name";
} else if (strcmp(iter->bus->name, "pci") == 0) {
bus_param_key = "addr";
-- 
2.17.1



Re: [dpdk-dev] [PATCH] ethdev: add missing buses in dev iterator

2021-04-29 Thread Hemant Agrawal



On 4/29/2021 1:26 PM, Thomas Monjalon wrote:

29/04/2021 07:55, Hemant Agrawal:

This patch fixes issue with OVS 2.15 not working on
DPAA/FSLMC based platform due to missing support for
these busses in dev_iterate.
This patch adds dpaa_bus and fslmc to dev iterator
for bus arguments.

I think we should add VMBus as well.
They are 2 buses remaining vmbus and ifpga. However I don't know, if 
they use args as vdev or as pci?




Re: [dpdk-dev] [PATCH] ethdev: add missing buses in dev iterator

2021-04-29 Thread Hemant Agrawal



On 4/29/2021 7:23 PM, Morten Brørup wrote:

From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Hemant Agrawal
Sent: Thursday, April 29, 2021 7:56 AM

This patch fixes issue with OVS 2.15 not working on
DPAA/FSLMC based platform due to missing support for
these busses in dev_iterate.
This patch adds dpaa_bus and fslmc to dev iterator
for bus arguments.

Fixes: 214ed1acd125 ("ethdev: add iterator to match devargs input")
Cc: sta...@dpdk.org

Signed-off-by: Hemant Agrawal 
---
  lib/ethdev/rte_ethdev.c | 4 +++-
  1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
index a1879765e8..483013ec7a 100644
--- a/lib/ethdev/rte_ethdev.c
+++ b/lib/ethdev/rte_ethdev.c
@@ -260,7 +260,9 @@ rte_eth_iterator_init(struct rte_dev_iterator
*iter, const char *devargs_str)
}

/* Convert bus args to new syntax for use with new API
dev_iterate. */
-   if (strcmp(iter->bus->name, "vdev") == 0) {
+   if ((strcmp(iter->bus->name, "vdev") == 0) ||
+   (strcmp(iter->bus->name, "fslmc") == 0) ||
+   (strcmp(iter->bus->name, "dpaa_bus") == 0)) {

Shouldn't that be "dpaa" instead of "dpaa_bus"?

The registered bus name is "dpaa_bus" only.



bus_param_key = "name";
} else if (strcmp(iter->bus->name, "pci") == 0) {
bus_param_key = "addr";
--
2.17.1



[dpdk-dev] [PATCH] crypto/dpaa_sec: fix to affine the thread portal affinity

2021-05-03 Thread Hemant Agrawal
DPAA requires the I/O shall be done in a HW portal context only.
The portal affinity is currently only being done in session create
and config APIs with the assumption that same thread will be used
for IO. This is causing issue.
This patch add support during I/O to check the HW portal affinity
and affine portal- if not affined already.

Fixes: 9a984458f755 ("crypto/dpaa_sec: rewrite Rx/Tx path")
Cc: sta...@dpdk.org

Signed-off-by: Hemant Agrawal 
---
 drivers/crypto/dpaa_sec/dpaa_sec.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c 
b/drivers/crypto/dpaa_sec/dpaa_sec.c
index 43363ba6ba..19d4684e24 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -1717,6 +1717,13 @@ dpaa_sec_enqueue_burst(void *qp, struct rte_crypto_op 
**ops,
uint32_t index, flags[DPAA_SEC_BURST] = {0};
struct qman_fq *inq[DPAA_SEC_BURST];
 
+   if (unlikely(!DPAA_PER_LCORE_PORTAL)) {
+   if (rte_dpaa_portal_init((void *)0)) {
+   DPAA_SEC_ERR("Failure in affining portal");
+   return 0;
+   }
+   }
+
while (nb_ops) {
frames_to_send = (nb_ops > DPAA_SEC_BURST) ?
DPAA_SEC_BURST : nb_ops;
@@ -1917,6 +1924,13 @@ dpaa_sec_dequeue_burst(void *qp, struct rte_crypto_op 
**ops,
uint16_t num_rx;
struct dpaa_sec_qp *dpaa_qp = (struct dpaa_sec_qp *)qp;
 
+   if (unlikely(!DPAA_PER_LCORE_PORTAL)) {
+   if (rte_dpaa_portal_init((void *)0)) {
+   DPAA_SEC_ERR("Failure in affining portal");
+   return 0;
+   }
+   }
+
num_rx = dpaa_sec_deq(dpaa_qp, ops, nb_ops);
 
dpaa_qp->rx_pkts += num_rx;
-- 
2.17.1



Re: [dpdk-dev] [PATCH v3 0/7] test: refactor crypto unit test framework

2021-05-05 Thread Hemant Agrawal

Sorry for top posting.

Akhil,

    Will you please hold for a day on this patch? we are seeing few 
failures on dpaa2 with this patch, currently debugging them.



Regards,

Hemant

On 5/1/2021 2:30 AM, Doherty, Declan wrote:



On 23/04/2021 5:18 PM, Ciara Power wrote:

The current crypto unit test framework is not granular enough to
accurately track unit test results. This is caused by one testcase
in a suite actually running multiple testcases, but only returning
one result.
  The approach taken in this patchset allows a test suite have a
list of sub-testsuites, and/or a list of testcases as previously used.
The unit test suite runner can then recursively iterate and run the
sub-testsuites, until it reaches a suite with testcases,
and it then runs each testcase as it had done previously.
In the case of a testsuite with both testcases and sub-testsuites,
the testcases are executed first before iterating through the
sub-testsuites.
  By allowing this further breakdown into sub-testsuites,
a refactor of the crypto unit tests solves the issue of inaccurate
reporting, as sub-testsuites can be used in place of the testcases
that had multiple testcases hidden on a sub level.
The blockcipher tests previously had these hidden testcases,
but are now sub-testsuites that are dynamically created and added to a
parent test suite, allowing for each testcase status to be reported
directly to the runner.
The cryptodev test suite is broken down into smaller suites that are
used as sub-testsuites, which allows for more flexibility choosing which
sub-testsuites should run for the current device.
The introduction of sub-testsuites also allows for more precise
setup/teardown functions, that can check the capabilities required to
run its testcases.
  For example, when running the cryptodev_aesni_mb_autotest,
the parent Cryptodev Test Suite is executed.
Various sub-testsuites are added to the parent test suite, such as
the static suites of testcases that were once in the 
cryptodev_testsuite,

and blockcipher suites.
The unit test runner can then run the Cryptodev parent test suite,
which in turn will run the sub-testsuites.

The user is now required to create vdevs via EAL commandline args,
this is no longer done within the test app for crypto autotests.

Documentation will need to be added at a later stage,
adding to the test document that isn't yet merged. [1]

[1] 
https://patchwork.dpdk.org/project/dpdk/patch/20210309155757.615536-1-acon...@redhat.com/



v3:
   - Added support for a testsuite having both a list of testcases,
 and a list of sub-testsuites.
   - Replaced PMD based parent testsuites with a cryptodev testsuite
 used by all autotests, with the exception of scheduler autotest.
   - Setup functions were added for all sub-testsuites, within which
 required capability support is checked.
   - The setup functions no longer create vdevs if needed,
 this must be done by the user when running the test.
   - Patch added to standardise return values for skipped testcases.
v2:
   - Added macro in place of testcase/testsuite loops.
   - Added more detail in the summary output.
   - Moved testcase counts to the testsuite structure.
   - Flattened testsuite structure to remove union.
   - Added patch for fix of blockcipher test return value.
   - Squashed release note into last patch.


Ciara Power (7):
   app/test: refactor of unit test suite runner
   test: introduce parent testsuite format
   test/crypto: refactor to use sub-testsuites
   test/crypto: replace unsupported with skipped
   test/crypto: move testsuite params to header file
   test/crypto: fix return value on test skipped
   test/crypto: dynamically build blockcipher suite

  app/test/test.c    |  176 +-
  app/test/test.h    |   23 +-
  app/test/test_cryptodev.c  | 2324 ++--
  app/test/test_cryptodev.h  |   32 +
  app/test/test_cryptodev_asym.c |  111 +-
  app/test/test_cryptodev_blockcipher.c  |  423 -
  app/test/test_cryptodev_blockcipher.h  |   12 +-
  app/test/test_ipsec.c  |   32 +-
  doc/guides/rel_notes/release_21_05.rst |    5 +
  9 files changed, 2000 insertions(+), 1138 deletions(-)



Series Acked-by: Declan Doherty 


[dpdk-dev] [PATCH] crypto/dpaa2_sec: fix the close and unint functions

2021-05-05 Thread Hemant Agrawal
The init function was calling the dpseci_open
while dpseci_close was called by the open function.
This is a mismatch un-init shall clean the init configurations and
close shall clear the configure function settings.

This was causing issue with recent changes in test framework, where
the close was being called and causing DPAA2 SEC to fail in configure

Fixes: e5cbdfc53765 ("crypto/dpaa2_sec: add basic operations")
Cc: sta...@dpdk.org

Signed-off-by: Gagandeep Singh 
Signed-off-by: Hemant Agrawal 
---
 drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 50 ++---
 1 file changed, 24 insertions(+), 26 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c 
b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 05b194ccf..1ccead364 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -3564,32 +3564,10 @@ dpaa2_sec_dev_stop(struct rte_cryptodev *dev)
 }
 
 static int
-dpaa2_sec_dev_close(struct rte_cryptodev *dev)
+dpaa2_sec_dev_close(struct rte_cryptodev *dev __rte_unused)
 {
-   struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
-   struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
-   int ret;
-
PMD_INIT_FUNC_TRACE();
 
-   /* Function is reverse of dpaa2_sec_dev_init.
-* It does the following:
-* 1. Detach a DPSECI from attached resources i.e. buffer pools, dpbp_id
-* 2. Close the DPSECI device
-* 3. Free the allocated resources.
-*/
-
-   /*Close the device at underlying layer*/
-   ret = dpseci_close(dpseci, CMD_PRI_LOW, priv->token);
-   if (ret) {
-   DPAA2_SEC_ERR("Failure closing dpseci device: err(%d)", ret);
-   return -1;
-   }
-
-   /*Free the allocated memory for ethernet private data and dpseci*/
-   priv->hw = NULL;
-   rte_free(dpseci);
-
return 0;
 }
 
@@ -3849,11 +3827,31 @@ static const struct rte_security_ops 
dpaa2_sec_security_ops = {
 static int
 dpaa2_sec_uninit(const struct rte_cryptodev *dev)
 {
-   struct dpaa2_sec_dev_private *internals = dev->data->dev_private;
+   struct dpaa2_sec_dev_private *priv = dev->data->dev_private;
+   struct fsl_mc_io *dpseci = (struct fsl_mc_io *)priv->hw;
+   int ret;
 
-   rte_free(dev->security_ctx);
+   PMD_INIT_FUNC_TRACE();
+
+   /* Function is reverse of dpaa2_sec_dev_init.
+* It does the following:
+* 1. Detach a DPSECI from attached resources i.e. buffer pools, dpbp_id
+* 2. Close the DPSECI device
+* 3. Free the allocated resources.
+*/
 
-   rte_mempool_free(internals->fle_pool);
+   /*Close the device at underlying layer*/
+   ret = dpseci_close(dpseci, CMD_PRI_LOW, priv->token);
+   if (ret) {
+   DPAA2_SEC_ERR("Failure closing dpseci device: err(%d)", ret);
+   return -1;
+   }
+
+   /*Free the allocated memory for ethernet private data and dpseci*/
+   priv->hw = NULL;
+   rte_free(dpseci);
+   rte_free(dev->security_ctx);
+   rte_mempool_free(priv->fle_pool);
 
DPAA2_SEC_INFO("Closing DPAA2_SEC device %s on numa socket %u",
   dev->data->name, rte_socket_id());
-- 
2.17.1



Re: [dpdk-dev] [PATCH v3 0/7] test: refactor crypto unit test framework

2021-05-05 Thread Hemant Agrawal

The issue was in dpaa2_sec driver, fix is submitted.

Series Acked-by: Hemant Agrawal 


On 5/5/2021 4:11 PM, Hemant Agrawal wrote:

Sorry for top posting.

Akhil,

    Will you please hold for a day on this patch? we are seeing few 
failures on dpaa2 with this patch, currently debugging them.



Regards,

Hemant



Re: [dpdk-dev] [PATCH] event/dpaa2: remove unused macros

2021-05-06 Thread Hemant Agrawal

Acked-by: Hemant Agrawal 




Re: [dpdk-dev] [PATCH] bus/fslmc: remove unused macro

2021-05-06 Thread Hemant Agrawal

Acked-by: Hemant Agrawal 




Re: [dpdk-dev] [EXT] [PATCH v4 0/8] baseband: add NXP LA12xx driver

2021-06-26 Thread Hemant Agrawal
Hi Akhil,
> > > Subject: [EXT] [PATCH v4 0/8] baseband: add NXP LA12xx driver
> > >
> > > This series introduces the BBDEV LA12xx poll mode driver (PMD) to
> > > support an implementation for offloading High Phy processing
> > > functions like LDPC Encode / Decode 5GNR wireless acceleration
> > > function, using PCI
> > based
> > > LA12xx Software defined radio.
> > >
> > > Please check the documentation patch for more info.
> > >
> > > The driver currently implements basic feature to offload only the 5G
> > > LDPC encode/decode.
> > >
> > > A new capability has been added to check if the driver can support
> > > the input data in network byte order. Two test vectors are also
> > > added as an example with input data in network byte.
> > >
> > > v2: add test case changes
> > > v3: fix 32 bit compilation
> > > v4: capability for network byte order, doc patch merged inline.
> > >
> > > Hemant Agrawal (7):
> > >   bbdev: add network order data capability
> > >   baseband: introduce NXP LA12xx driver
> > >   baseband/la12xx: add devargs for max queues
> > >   baseband/la12xx: add support for multiple modems
> > >   baseband/la12xx: add queue and modem config support
> > >   baseband/la12xx: add enqueue and dequeue support
> > >   app/bbdev: enable la12xx for bbdev
> > >
> > > Nipun Gupta (1):
> > >   app/bbdev: add test vectors for transport blocks
> > >
> > This PMD is deferred for next release. Marked as deferred in patchworks.
> Hi Hemant,
> 
> Any update on this PMD? Is it still planned for 21.08?
[Hemant] 
Yes, we will be sending the update shortly

> 
> Regards,
> Akhil


Re: [dpdk-dev] [PATCH v2] test/crypto: fix autotest function parameters

2021-06-30 Thread Hemant Agrawal
Acked-by: Hemant Agrawal 


Re: [dpdk-dev] [PATCH] test/crypto: fix typo in ESN testcase

2021-07-01 Thread Hemant Agrawal
Acked-by: Hemant Agrawal 


Re: [PATCH 2/3] examples/l3fwd: fix return value on rules add

2024-07-15 Thread Hemant Agrawal



On 15-07-2024 15:44, Gagandeep Singh wrote:

fix return value on adding the EM or LPM rules.

Fixes: e7e6dd643092 ("examples/l3fwd: support config file for EM")
Fixes: 52def963fc1c ("examples/l3fwd: support config file for LPM/FIB")
Cc: sean.morris...@intel.com
Cc: sta...@dpdk.org

Signed-off-by: Gagandeep Singh 



Acked-by: Hemant Agrawal 




RE: [PATCH] doc: announce change in crypto queue setup

2024-07-31 Thread Hemant Agrawal


> -Original Message-
> From: Akhil Goyal 
> Sent: Wednesday, July 31, 2024 4:51 PM
> To: dev@dpdk.org
> Cc: tho...@monjalon.net; david.march...@redhat.com; Hemant Agrawal
> ; ano...@marvell.com;
> pablo.de.lara.gua...@intel.com; fiona.tr...@intel.com;
> declan.dohe...@intel.com; ma...@nvidia.com; Gagandeep Singh
> ; fanzhang@gmail.com; jianjay.z...@huawei.com;
> asoma...@amd.com; ruifeng.w...@arm.com;
> konstantin.v.anan...@yandex.ru; radu.nico...@intel.com;
> ajit.khapa...@broadcom.com; rnagadhee...@marvell.com;
> adwiv...@marvell.com; ciara.po...@intel.com; Akhil Goyal
> 
> Subject: [PATCH] doc: announce change in crypto queue setup
> Importance: High
> 
> Certain hardware crypto PMDs may support setting up of priority to a queue
> pair.
> Hence a new parameter for priority will be added in struct
> rte_cryptodev_qp_conf.
> 
> Signed-off-by: Akhil Goyal 

Acked-by: Hemant Agrawal 

> ---
>  doc/guides/rel_notes/deprecation.rst | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/doc/guides/rel_notes/deprecation.rst
> b/doc/guides/rel_notes/deprecation.rst
> index 6948641ff6..4d114cec3e 100644
> --- a/doc/guides/rel_notes/deprecation.rst
> +++ b/doc/guides/rel_notes/deprecation.rst
> @@ -125,6 +125,9 @@ Deprecation Notices
>This will effect the KASUMI, SNOW3G, ZUC, AESNI GCM, AESNI MB and
> CHACHAPOLY
>SW PMDs.
> 
> +* cryptodev: The structure ``rte_cryptodev_qp_conf`` will be updated to
> +have
> +  a new parameter to set priority of that particular queue pair.
> +
>  * eventdev: The single-event (non-burst) enqueue and dequeue operations,
>used by static inline burst enqueue and dequeue functions in
> ``rte_eventdev.h``,
>will be removed in DPDK 23.11.
> --
> 2.25.1



[PATCH 00/17] NXP DPAA ETH driver enhancement and fixes

2024-08-01 Thread Hemant Agrawal
This series adds several enhancement to the NXP DPAA Ethernet driver.

Primarily:
1. timestamp and IEEE 1588 support
2. OH and ONIC based virtual port config in DPAA
3. frame display and debugging infra

Gagandeep Singh (3):
  bus/dpaa: fix PFDRs leaks due to FQRNIs
  net/dpaa: support mempool debug
  net/dpaa: improve the dpaa port cleanup

Hemant Agrawal (4):
  bus/dpaa: fix VSP for 1G fm1-mac9 and 10
  bus/dpaa: add port buffer manager stats
  net/dpaa: implement detailed packet parsing
  net/dpaa: enhance DPAA frame display

Jun Yang (2):
  net/dpaa: share MAC FMC scheme and CC parse
  net/dpaa: improve dpaa errata A010022 handling

Rohit Raj (3):
  net/dpaa: fix typecasting ch ID to u32
  bus/dpaa: add OH port mode for dpaa eth
  bus/dpaa: add ONIC port mode for the DPAA eth

Vanshika Shukla (4):
  net/dpaa: support Tx confirmation to enable PTP
  net/dpaa: add support to separate Tx conf queues
  net/dpaa: support Rx/Tx timestamp read
  net/dpaa: support IEEE 1588 PTP

Vinod Pullabhatla (1):
  net/dpaa: add Tx rate limiting DPAA PMD API

 .mailmap  |   1 +
 doc/guides/nics/dpaa.rst  |   9 +
 drivers/bus/dpaa/base/fman/fman.c | 583 +++---
 drivers/bus/dpaa/base/fman/fman_hw.c  |  97 +++-
 drivers/bus/dpaa/base/fman/netcfg_layer.c |  19 +-
 drivers/bus/dpaa/base/qbman/qman.c|  46 +-
 drivers/bus/dpaa/dpaa_bus.c   |  31 +-
 drivers/bus/dpaa/include/fman.h   | 112 -
 drivers/bus/dpaa/include/fsl_fman.h   |  12 +
 drivers/bus/dpaa/include/fsl_qman.h   |   4 +-
 drivers/bus/dpaa/version.map  |   4 +
 drivers/net/dpaa/dpaa_ethdev.c| 378 +++---
 drivers/net/dpaa/dpaa_ethdev.h|  67 ++-
 drivers/net/dpaa/dpaa_flow.c  | 150 --
 drivers/net/dpaa/dpaa_fmc.c   | 421 ++--
 drivers/net/dpaa/dpaa_ptp.c   | 119 +
 drivers/net/dpaa/dpaa_rxtx.c  | 386 --
 drivers/net/dpaa/dpaa_rxtx.h  | 152 +++---
 drivers/net/dpaa/fmlib/fm_lib.c   |  32 +-
 drivers/net/dpaa/fmlib/fm_port_ext.h  |   2 +-
 drivers/net/dpaa/meson.build  |   1 +
 drivers/net/dpaa/rte_pmd_dpaa.h   |  25 +-
 drivers/net/dpaa/version.map  |   7 +
 23 files changed, 2150 insertions(+), 508 deletions(-)
 create mode 100644 drivers/net/dpaa/dpaa_ptp.c

-- 
2.25.1



[PATCH 01/17] bus/dpaa: fix PFDRs leaks due to FQRNIs

2024-08-01 Thread Hemant Agrawal
From: Gagandeep Singh 

When a Retire FQ command is executed on a FQ in the
Tentatively Scheduled or Parked states, in that case FQ
is retired immediately and a FQRNI (Frame Queue Retirement
Notification Immediate) message is generated. Software
must read this message from MR and consume it to free
the memory used by it.

Although it is not mentioned about which memory to be used
by FQRNIs in the RM but through experiments it is proven
that it can use PFDRs. So if these messages are allowed to
build up indefinitely then PFDR resources can become exhausted
and cause enqueues to stall. Therefore software must consume
these MR messages on a regular basis to avoid depleting
the available PFDR resources.

This is the PFDRs leak issue which user can experienace while
using the DPDK crypto driver and creating and destroying the
sessions multiple times. On a session destroy, DPDK calls the
qman_retire_fq() for each FQ used by the session, but it does
not handle the FQRNIs generated and allowed them to build up
indefinitely in MR.

This patch fixes this issue by consuming the FQRNIs received
from MR immediately after FQ retire by calling drain_mr_fqrni().

Please note that this drain_mr_fqrni() only look for
FQRNI type messages to consume. If there are other type of messages
like FQRN, FQRL, FQPN, ERN etc. also coming on MR then those
messages need to be handled separately.

Fixes: c47ff048b99a ("bus/dpaa: add QMAN driver core routines")
Cc: sta...@dpdk.org

Signed-off-by: Gagandeep Singh 
---
 drivers/bus/dpaa/base/qbman/qman.c | 46 --
 1 file changed, 25 insertions(+), 21 deletions(-)

diff --git a/drivers/bus/dpaa/base/qbman/qman.c 
b/drivers/bus/dpaa/base/qbman/qman.c
index 301057723e..9c90ee25a6 100644
--- a/drivers/bus/dpaa/base/qbman/qman.c
+++ b/drivers/bus/dpaa/base/qbman/qman.c
@@ -292,10 +292,32 @@ static inline void qman_stop_dequeues_ex(struct 
qman_portal *p)
qm_dqrr_set_maxfill(&p->p, 0);
 }
 
+static inline void qm_mr_pvb_update(struct qm_portal *portal)
+{
+   register struct qm_mr *mr = &portal->mr;
+   const struct qm_mr_entry *res = qm_cl(mr->ring, mr->pi);
+
+#ifdef RTE_LIBRTE_DPAA_HWDEBUG
+   DPAA_ASSERT(mr->pmode == qm_mr_pvb);
+#endif
+   /* when accessing 'verb', use __raw_readb() to ensure that compiler
+* inlining doesn't try to optimise out "excess reads".
+*/
+   if ((__raw_readb(&res->ern.verb) & QM_MR_VERB_VBIT) == mr->vbit) {
+   mr->pi = (mr->pi + 1) & (QM_MR_SIZE - 1);
+   if (!mr->pi)
+   mr->vbit ^= QM_MR_VERB_VBIT;
+   mr->fill++;
+   res = MR_INC(res);
+   }
+   dcbit_ro(res);
+}
+
 static int drain_mr_fqrni(struct qm_portal *p)
 {
const struct qm_mr_entry *msg;
 loop:
+   qm_mr_pvb_update(p);
msg = qm_mr_current(p);
if (!msg) {
/*
@@ -317,6 +339,7 @@ static int drain_mr_fqrni(struct qm_portal *p)
do {
now = mfatb();
} while ((then + 1) > now);
+   qm_mr_pvb_update(p);
msg = qm_mr_current(p);
if (!msg)
return 0;
@@ -479,27 +502,6 @@ static inline int qm_mr_init(struct qm_portal *portal,
return 0;
 }
 
-static inline void qm_mr_pvb_update(struct qm_portal *portal)
-{
-   register struct qm_mr *mr = &portal->mr;
-   const struct qm_mr_entry *res = qm_cl(mr->ring, mr->pi);
-
-#ifdef RTE_LIBRTE_DPAA_HWDEBUG
-   DPAA_ASSERT(mr->pmode == qm_mr_pvb);
-#endif
-   /* when accessing 'verb', use __raw_readb() to ensure that compiler
-* inlining doesn't try to optimise out "excess reads".
-*/
-   if ((__raw_readb(&res->ern.verb) & QM_MR_VERB_VBIT) == mr->vbit) {
-   mr->pi = (mr->pi + 1) & (QM_MR_SIZE - 1);
-   if (!mr->pi)
-   mr->vbit ^= QM_MR_VERB_VBIT;
-   mr->fill++;
-   res = MR_INC(res);
-   }
-   dcbit_ro(res);
-}
-
 struct qman_portal *
 qman_init_portal(struct qman_portal *portal,
   const struct qm_portal_config *c,
@@ -1794,6 +1796,8 @@ int qman_retire_fq(struct qman_fq *fq, u32 *flags)
}
 out:
FQUNLOCK(fq);
+   /* Draining FQRNIs, if any */
+   drain_mr_fqrni(&p->p);
return rval;
 }
 
-- 
2.25.1



[PATCH 02/17] net/dpaa: fix typecasting ch ID to u32

2024-08-01 Thread Hemant Agrawal
From: Rohit Raj 

Avoid typecasting ch_id to u32 and passing it to another API since it
can corrupt other data. Instead, create new u32 variable and typecase
it back to u16 after it gets updated by the API.
NXP CID: 27996293

Fixes: 0c504f6950b6 ("net/dpaa: support push mode")
Cc: hemant.agra...@nxp.com
Cc: sta...@dpdk.org

Signed-off-by: Rohit Raj 
---
 drivers/net/dpaa/dpaa_ethdev.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 060b8c678f..1a2de5240f 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -972,7 +972,7 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, 
uint16_t queue_idx,
struct fman_if *fif = dev->process_private;
struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_idx];
struct qm_mcc_initfq opts = {0};
-   u32 flags = 0;
+   u32 ch_id, flags = 0;
int ret;
u32 buffsz = rte_pktmbuf_data_room_size(mp) - RTE_PKTMBUF_HEADROOM;
uint32_t max_rx_pktlen;
@@ -1096,7 +1096,9 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, 
uint16_t queue_idx,
DPAA_IF_RX_CONTEXT_STASH;
 
/*Create a channel and associate given queue with the channel*/
-   qman_alloc_pool_range((u32 *)&rxq->ch_id, 1, 1, 0);
+   qman_alloc_pool_range(&ch_id, 1, 1, 0);
+   rxq->ch_id = (u16)ch_id;
+
opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
opts.fqd.dest.channel = rxq->ch_id;
opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY;
-- 
2.25.1



[PATCH 03/17] bus/dpaa: fix VSP for 1G fm1-mac9 and 10

2024-08-01 Thread Hemant Agrawal
No need to classify interface separately for 1G and 10G

Fixes: e0718bb2ca95 ("bus/dpaa: add virtual storage profile port init")
Cc: sta...@dpdk.org

Signed-off-by: Hemant Agrawal 
---
 drivers/bus/dpaa/base/fman/fman.c | 29 +++--
 1 file changed, 27 insertions(+), 2 deletions(-)

diff --git a/drivers/bus/dpaa/base/fman/fman.c 
b/drivers/bus/dpaa/base/fman/fman.c
index 41195eb0a7..beeb03dbf2 100644
--- a/drivers/bus/dpaa/base/fman/fman.c
+++ b/drivers/bus/dpaa/base/fman/fman.c
@@ -153,7 +153,7 @@ static void fman_if_vsp_init(struct __fman_if *__if)
size_t lenp;
const uint8_t mac_idx[] = {-1, 0, 1, 2, 3, 4, 5, 6, 7, 0, 1};
 
-   if (__if->__if.mac_type == fman_mac_1g) {
+   if (__if->__if.mac_idx <= 8) {
for_each_compatible_node(dev, NULL,
"fsl,fman-port-1g-rx-extended-args") {
prop = of_get_property(dev, "cell-index", &lenp);
@@ -176,7 +176,32 @@ static void fman_if_vsp_init(struct __fman_if *__if)
}
}
}
-   } else if (__if->__if.mac_type == fman_mac_10g) {
+
+   for_each_compatible_node(dev, NULL,
+"fsl,fman-port-op-extended-args") {
+   prop = of_get_property(dev, "cell-index", &lenp);
+
+   if (prop) {
+   cell_index = of_read_number(&prop[0],
+   lenp / sizeof(phandle));
+
+   if (cell_index == __if->__if.mac_idx) {
+   prop = of_get_property(dev,
+  "vsp-window",
+  &lenp);
+
+   if (prop) {
+   __if->__if.num_profiles =
+   of_read_number(&prop[0],
+  1);
+   __if->__if.base_profile_id =
+   of_read_number(&prop[1],
+  1);
+   }
+   }
+   }
+   }
+   } else {
for_each_compatible_node(dev, NULL,
"fsl,fman-port-10g-rx-extended-args") {
prop = of_get_property(dev, "cell-index", &lenp);
-- 
2.25.1



[PATCH 04/17] bus/dpaa: add port buffer manager stats

2024-08-01 Thread Hemant Agrawal
Add BMI statistics and improving the existing extended
statistics

Signed-off-by: Hemant Agrawal 
Signed-off-by: Gagandeep Singh 
---
 drivers/bus/dpaa/base/fman/fman_hw.c | 65 +++-
 drivers/bus/dpaa/include/fman.h  |  4 +-
 drivers/bus/dpaa/include/fsl_fman.h  | 12 +
 drivers/bus/dpaa/version.map |  4 ++
 drivers/net/dpaa/dpaa_ethdev.c   | 46 +---
 drivers/net/dpaa/dpaa_ethdev.h   | 12 +
 6 files changed, 134 insertions(+), 9 deletions(-)

diff --git a/drivers/bus/dpaa/base/fman/fman_hw.c 
b/drivers/bus/dpaa/base/fman/fman_hw.c
index 24a99f7235..27b39a4975 100644
--- a/drivers/bus/dpaa/base/fman/fman_hw.c
+++ b/drivers/bus/dpaa/base/fman/fman_hw.c
@@ -244,8 +244,8 @@ fman_if_stats_get_all(struct fman_if *p, uint64_t *value, 
int n)
uint64_t base_offset = offsetof(struct memac_regs, reoct_l);
 
for (i = 0; i < n; i++)
-   value[i] = (((u64)in_be32((char *)regs + base_offset + 8 * i) |
-   (u64)in_be32((char *)regs + base_offset +
+   value[i] = ((u64)in_be32((char *)regs + base_offset + 8 * i) |
+   ((u64)in_be32((char *)regs + base_offset +
8 * i + 4)) << 32);
 }
 
@@ -266,6 +266,67 @@ fman_if_stats_reset(struct fman_if *p)
;
 }
 
+void
+fman_if_bmi_stats_enable(struct fman_if *p)
+{
+   struct __fman_if *m = container_of(p, struct __fman_if, __if);
+   struct rx_bmi_regs *regs = (struct rx_bmi_regs *)m->bmi_map;
+   uint32_t tmp;
+
+   tmp = in_be32(®s->fmbm_rstc);
+
+   tmp |= FMAN_BMI_COUNTERS_EN;
+
+   out_be32(®s->fmbm_rstc, tmp);
+}
+
+void
+fman_if_bmi_stats_disable(struct fman_if *p)
+{
+   struct __fman_if *m = container_of(p, struct __fman_if, __if);
+   struct rx_bmi_regs *regs = (struct rx_bmi_regs *)m->bmi_map;
+   uint32_t tmp;
+
+   tmp = in_be32(®s->fmbm_rstc);
+
+   tmp &= ~FMAN_BMI_COUNTERS_EN;
+
+   out_be32(®s->fmbm_rstc, tmp);
+}
+
+void
+fman_if_bmi_stats_get_all(struct fman_if *p, uint64_t *value)
+{
+   struct __fman_if *m = container_of(p, struct __fman_if, __if);
+   struct rx_bmi_regs *regs = (struct rx_bmi_regs *)m->bmi_map;
+   int i = 0;
+
+   value[i++] = (u32)in_be32(®s->fmbm_rfrc);
+   value[i++] = (u32)in_be32(®s->fmbm_rfbc);
+   value[i++] = (u32)in_be32(®s->fmbm_rlfc);
+   value[i++] = (u32)in_be32(®s->fmbm_rffc);
+   value[i++] = (u32)in_be32(®s->fmbm_rfdc);
+   value[i++] = (u32)in_be32(®s->fmbm_rfldec);
+   value[i++] = (u32)in_be32(®s->fmbm_rodc);
+   value[i++] = (u32)in_be32(®s->fmbm_rbdc);
+}
+
+void
+fman_if_bmi_stats_reset(struct fman_if *p)
+{
+   struct __fman_if *m = container_of(p, struct __fman_if, __if);
+   struct rx_bmi_regs *regs = (struct rx_bmi_regs *)m->bmi_map;
+
+   out_be32(®s->fmbm_rfrc, 0);
+   out_be32(®s->fmbm_rfbc, 0);
+   out_be32(®s->fmbm_rlfc, 0);
+   out_be32(®s->fmbm_rffc, 0);
+   out_be32(®s->fmbm_rfdc, 0);
+   out_be32(®s->fmbm_rfldec, 0);
+   out_be32(®s->fmbm_rodc, 0);
+   out_be32(®s->fmbm_rbdc, 0);
+}
+
 void
 fman_if_promiscuous_enable(struct fman_if *p)
 {
diff --git a/drivers/bus/dpaa/include/fman.h b/drivers/bus/dpaa/include/fman.h
index 3a6dd555a7..60681068ea 100644
--- a/drivers/bus/dpaa/include/fman.h
+++ b/drivers/bus/dpaa/include/fman.h
@@ -56,6 +56,8 @@
 #define FMAN_PORT_BMI_FIFO_UNITS   0x100
 #define FMAN_PORT_IC_OFFSET_UNITS  0x10
 
+#define FMAN_BMI_COUNTERS_EN 0x8000
+
 #define FMAN_ENABLE_BPOOL_DEPLETION0xF0F0
 
 #define HASH_CTRL_MCAST_EN 0x0100
@@ -260,7 +262,7 @@ struct rx_bmi_regs {
/**< Buffer Manager pool Information-*/
uint32_t fmbm_acnt[FMAN_PORT_MAX_EXT_POOLS_NUM];
/**< Allocate Counter-*/
-   uint32_t reserved0130[8];
+   uint32_t reserved0120[16];
/**< 0x130/0x140 - 0x15F reserved -*/
uint32_t fmbm_rcgm[FMAN_PORT_CG_MAP_NUM];
/**< Congestion Group Map*/
diff --git a/drivers/bus/dpaa/include/fsl_fman.h 
b/drivers/bus/dpaa/include/fsl_fman.h
index 20690f8329..5a9750ad0c 100644
--- a/drivers/bus/dpaa/include/fsl_fman.h
+++ b/drivers/bus/dpaa/include/fsl_fman.h
@@ -60,6 +60,18 @@ void fman_if_stats_reset(struct fman_if *p);
 __rte_internal
 void fman_if_stats_get_all(struct fman_if *p, uint64_t *value, int n);
 
+__rte_internal
+void fman_if_bmi_stats_enable(struct fman_if *p);
+
+__rte_internal
+void fman_if_bmi_stats_disable(struct fman_if *p);
+
+__rte_internal
+void fman_if_bmi_stats_get_all(struct fman_if *p, uint64_t *value);
+
+__rte_internal
+void fman_if_bmi_stats_reset(struct fman_if *p);
+
 /* Set ignore pause option for a specific interface */
 void fm

[PATCH 05/17] net/dpaa: support Tx confirmation to enable PTP

2024-08-01 Thread Hemant Agrawal
From: Vanshika Shukla 

TX confirmation provides dedicated confirmation
queues for transmitted packets. These queues are
used by software to get the status and release
transmitted packets buffers.

Signed-off-by: Vanshika Shukla 
Acked-by: Hemant Agrawal 
---
 drivers/net/dpaa/dpaa_ethdev.c | 45 ++---
 drivers/net/dpaa/dpaa_ethdev.h |  3 +-
 drivers/net/dpaa/dpaa_rxtx.c   | 52 ++
 drivers/net/dpaa/dpaa_rxtx.h   |  2 ++
 4 files changed, 90 insertions(+), 12 deletions(-)

diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 90b34e42f2..9ffb8c578c 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -1826,9 +1826,15 @@ static int dpaa_tx_queue_init(struct qman_fq *fq,
opts.fqd.dest.wq = DPAA_IF_TX_PRIORITY;
opts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE;
opts.fqd.context_b = 0;
+#if defined(RTE_LIBRTE_IEEE1588)
+   opts.fqd.context_a.lo = 0;
+   opts.fqd.context_a.hi = fman_dealloc_bufs_mask_hi;
+#else
/* no tx-confirmation */
-   opts.fqd.context_a.hi = 0x8000 | fman_dealloc_bufs_mask_hi;
opts.fqd.context_a.lo = 0 | fman_dealloc_bufs_mask_lo;
+   opts.fqd.context_a.hi = 0x8000 | fman_dealloc_bufs_mask_hi;
+#endif
+
if (fman_ip_rev >= FMAN_V3) {
/* Set B0V bit in contextA to set ASPID to 0 */
opts.fqd.context_a.hi |= 0x0400;
@@ -1861,9 +1867,11 @@ static int dpaa_tx_queue_init(struct qman_fq *fq,
return ret;
 }
 
-#ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
-/* Initialise a DEBUG FQ ([rt]x_error, rx_default). */
-static int dpaa_debug_queue_init(struct qman_fq *fq, uint32_t fqid)
+#if defined(RTE_LIBRTE_DPAA_DEBUG_DRIVER) || defined(RTE_LIBRTE_IEEE1588)
+/* Initialise a DEBUG FQ ([rt]x_error, rx_default) and DPAA TX CONFIRM queue
+ * to support PTP
+ */
+static int dpaa_def_queue_init(struct qman_fq *fq, uint32_t fqid)
 {
struct qm_mcc_initfq opts = {0};
int ret;
@@ -1872,15 +1880,15 @@ static int dpaa_debug_queue_init(struct qman_fq *fq, 
uint32_t fqid)
 
ret = qman_reserve_fqid(fqid);
if (ret) {
-   DPAA_PMD_ERR("Reserve debug fqid %d failed with ret: %d",
+   DPAA_PMD_ERR("Reserve fqid %d failed with ret: %d",
fqid, ret);
return -EINVAL;
}
/* "map" this Rx FQ to one of the interfaces Tx FQID */
-   DPAA_PMD_DEBUG("Creating debug fq %p, fqid %d", fq, fqid);
+   DPAA_PMD_DEBUG("Creating fq %p, fqid %d", fq, fqid);
ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);
if (ret) {
-   DPAA_PMD_ERR("create debug fqid %d failed with ret: %d",
+   DPAA_PMD_ERR("create fqid %d failed with ret: %d",
fqid, ret);
return ret;
}
@@ -1888,7 +1896,7 @@ static int dpaa_debug_queue_init(struct qman_fq *fq, 
uint32_t fqid)
opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY;
ret = qman_init_fq(fq, 0, &opts);
if (ret)
-   DPAA_PMD_ERR("init debug fqid %d failed with ret: %d",
+   DPAA_PMD_ERR("init fqid %d failed with ret: %d",
fqid, ret);
return ret;
 }
@@ -2079,6 +2087,14 @@ dpaa_dev_init(struct rte_eth_dev *eth_dev)
goto free_rx;
}
 
+   dpaa_intf->tx_conf_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) *
+   MAX_DPAA_CORES, MAX_CACHELINE);
+   if (!dpaa_intf->tx_conf_queues) {
+   DPAA_PMD_ERR("Failed to alloc mem for TX conf queues\n");
+   ret = -ENOMEM;
+   goto free_rx;
+   }
+
/* If congestion control is enabled globally*/
if (td_tx_threshold) {
dpaa_intf->cgr_tx = rte_zmalloc(NULL,
@@ -2115,21 +2131,28 @@ dpaa_dev_init(struct rte_eth_dev *eth_dev)
}
dpaa_intf->nb_tx_queues = MAX_DPAA_CORES;
 
-#ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
-   ret = dpaa_debug_queue_init(&dpaa_intf->debug_queues
+#if defined(RTE_LIBRTE_DPAA_DEBUG_DRIVER) || defined(RTE_LIBRTE_IEEE1588)
+   ret = dpaa_def_queue_init(&dpaa_intf->debug_queues
[DPAA_DEBUG_FQ_RX_ERROR], fman_intf->fqid_rx_err);
if (ret) {
DPAA_PMD_ERR("DPAA RX ERROR queue init failed!");
goto free_tx;
}
dpaa_intf->debug_queues[DPAA_DEBUG_FQ_RX_ERROR].dpaa_intf = dpaa_intf;
-   ret = dpaa_debug_queue_init(&dpaa_intf->debug_queues
+   ret = dpaa_def_queue_init(&dpaa_intf->debug_queues
[DPAA_DEBUG_FQ_TX_ERROR], fman_intf->fqid_tx_err);
if (ret) {
DPAA_PMD_ERR("DPAA TX ERROR queue init failed!");
goto free_tx;
   

[PATCH 06/17] net/dpaa: add support to separate Tx conf queues

2024-08-01 Thread Hemant Agrawal
From: Vanshika Shukla 

This patch separates Tx confirmation queues for kernel
and DPDK so as to support the VSP case.

Signed-off-by: Vanshika Shukla 
Acked-by: Hemant Agrawal 
---
 drivers/bus/dpaa/include/fsl_qman.h |  4 ++-
 drivers/net/dpaa/dpaa_ethdev.c  | 47 +
 drivers/net/dpaa/dpaa_rxtx.c|  2 +-
 3 files changed, 39 insertions(+), 14 deletions(-)

diff --git a/drivers/bus/dpaa/include/fsl_qman.h 
b/drivers/bus/dpaa/include/fsl_qman.h
index c0677976e8..db14dfb839 100644
--- a/drivers/bus/dpaa/include/fsl_qman.h
+++ b/drivers/bus/dpaa/include/fsl_qman.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2008-2012 Freescale Semiconductor, Inc.
- * Copyright 2019 NXP
+ * Copyright 2019-2022 NXP
  *
  */
 
@@ -1237,6 +1237,8 @@ struct qman_fq {
 
/* DPDK Interface */
void *dpaa_intf;
+   /*to store tx_conf_queue corresponding to tx_queue*/
+   struct qman_fq *tx_conf_queue;
 
struct rte_event ev;
/* affined portal in case of static queue */
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 9ffb8c578c..17058d762c 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -1867,10 +1867,33 @@ static int dpaa_tx_queue_init(struct qman_fq *fq,
return ret;
 }
 
-#if defined(RTE_LIBRTE_DPAA_DEBUG_DRIVER) || defined(RTE_LIBRTE_IEEE1588)
-/* Initialise a DEBUG FQ ([rt]x_error, rx_default) and DPAA TX CONFIRM queue
- * to support PTP
- */
+#if defined(RTE_LIBRTE_IEEE1588)
+static int
+dpaa_tx_conf_queue_init(struct qman_fq *fq)
+{
+   struct qm_mcc_initfq opts = {0};
+   int ret;
+
+   PMD_INIT_FUNC_TRACE();
+
+   ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID, fq);
+   if (ret) {
+   DPAA_PMD_ERR("create Tx_conf failed with ret: %d", ret);
+   return ret;
+   }
+
+   opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL;
+   opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY;
+   ret = qman_init_fq(fq, 0, &opts);
+   if (ret)
+   DPAA_PMD_ERR("init Tx_conf fqid %d failed with ret: %d",
+   fq->fqid, ret);
+   return ret;
+}
+#endif
+
+#if defined(RTE_LIBRTE_DPAA_DEBUG_DRIVER)
+/* Initialise a DEBUG FQ ([rt]x_error, rx_default) */
 static int dpaa_def_queue_init(struct qman_fq *fq, uint32_t fqid)
 {
struct qm_mcc_initfq opts = {0};
@@ -2128,6 +2151,14 @@ dpaa_dev_init(struct rte_eth_dev *eth_dev)
if (ret)
goto free_tx;
dpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf;
+
+#if defined(RTE_LIBRTE_IEEE1588)
+   ret = dpaa_tx_conf_queue_init(&dpaa_intf->tx_conf_queues[loop]);
+   if (ret)
+   goto free_tx;
+   dpaa_intf->tx_conf_queues[loop].dpaa_intf = dpaa_intf;
+   dpaa_intf->tx_queues[loop].tx_conf_queue = 
&dpaa_intf->tx_conf_queues[loop];
+#endif
}
dpaa_intf->nb_tx_queues = MAX_DPAA_CORES;
 
@@ -2145,14 +2176,6 @@ dpaa_dev_init(struct rte_eth_dev *eth_dev)
DPAA_PMD_ERR("DPAA TX ERROR queue init failed!");
goto free_tx;
}
-   dpaa_intf->debug_queues[DPAA_DEBUG_FQ_TX_ERROR].dpaa_intf = dpaa_intf;
-   ret = dpaa_def_queue_init(dpaa_intf->tx_conf_queues,
-   fman_intf->fqid_tx_confirm);
-   if (ret) {
-   DPAA_PMD_ERR("DPAA TX CONFIRM queue init failed!");
-   goto free_tx;
-   }
-   dpaa_intf->tx_conf_queues->dpaa_intf = dpaa_intf;
 #endif
 
DPAA_PMD_DEBUG("All frame queues created");
diff --git a/drivers/net/dpaa/dpaa_rxtx.c b/drivers/net/dpaa/dpaa_rxtx.c
index 189af748e9..c15538116d 100644
--- a/drivers/net/dpaa/dpaa_rxtx.c
+++ b/drivers/net/dpaa/dpaa_rxtx.c
@@ -1085,7 +1085,7 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, 
uint16_t nb_bufs)
 #if defined(RTE_LIBRTE_IEEE1588)
struct qman_fq *fq = q;
struct dpaa_if *dpaa_intf = fq->dpaa_intf;
-   struct qman_fq *fq_txconf = dpaa_intf->tx_conf_queues;
+   struct qman_fq *fq_txconf = fq->tx_conf_queue;
 #endif
 
if (unlikely(!DPAA_PER_LCORE_PORTAL)) {
-- 
2.25.1



[PATCH 07/17] net/dpaa: share MAC FMC scheme and CC parse

2024-08-01 Thread Hemant Agrawal
From: Jun Yang 

For Shared MAC:
1) Allocate RXQ from VSP scheme.
2) Allocate RXQ from CC directed to VSP.
2) Remove RXQ allocated which is reconfigured without VSP.
3) Don't alloc default queue and err queues.

Signed-off-by: Jun Yang 
Acked-by: Hemant Agrawal 
---
 drivers/bus/dpaa/base/fman/fman.c |   2 +-
 drivers/bus/dpaa/include/fman.h   |   3 +-
 drivers/net/dpaa/dpaa_ethdev.c|  53 ++--
 drivers/net/dpaa/dpaa_ethdev.h|  13 +-
 drivers/net/dpaa/dpaa_flow.c  |   8 +-
 drivers/net/dpaa/dpaa_fmc.c   | 421 +++---
 drivers/net/dpaa/dpaa_rxtx.c  |  20 +-
 7 files changed, 345 insertions(+), 175 deletions(-)

diff --git a/drivers/bus/dpaa/base/fman/fman.c 
b/drivers/bus/dpaa/base/fman/fman.c
index beeb03dbf2..bf41a3ed96 100644
--- a/drivers/bus/dpaa/base/fman/fman.c
+++ b/drivers/bus/dpaa/base/fman/fman.c
@@ -42,7 +42,7 @@ if_destructor(struct __fman_if *__if)
if (!__if)
return;
 
-   if (__if->__if.mac_type == fman_offline)
+   if (__if->__if.mac_type == fman_offline_internal)
goto cleanup;
 
list_for_each_entry_safe(bp, tmpbp, &__if->__if.bpool_list, node) {
diff --git a/drivers/bus/dpaa/include/fman.h b/drivers/bus/dpaa/include/fman.h
index 60681068ea..3642b43be7 100644
--- a/drivers/bus/dpaa/include/fman.h
+++ b/drivers/bus/dpaa/include/fman.h
@@ -72,10 +72,11 @@ TAILQ_HEAD(rte_fman_if_list, __fman_if);
 
 /* Represents the different flavour of network interface */
 enum fman_mac_type {
-   fman_offline = 0,
+   fman_offline_internal = 0,
fman_mac_1g,
fman_mac_10g,
fman_mac_2_5g,
+   fman_onic,
 };
 
 struct mac_addr {
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 17058d762c..e3cb15cad5 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -252,7 +252,6 @@ dpaa_eth_dev_configure(struct rte_eth_dev *dev)
DPAA_PMD_ERR("Cannot open IF socket");
return -errno;
}
-
strncpy(ifr.ifr_name, dpaa_intf->name, IFNAMSIZ - 1);
 
if (ioctl(socket_fd, SIOCGIFMTU, &ifr) < 0) {
@@ -1958,6 +1957,41 @@ dpaa_dev_init_secondary(struct rte_eth_dev *eth_dev)
return 0;
 }
 
+#ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
+static int
+dpaa_error_queue_init(struct dpaa_if *dpaa_intf,
+   struct fman_if *fman_intf)
+{
+   int i, ret;
+   struct qman_fq *err_queues = dpaa_intf->debug_queues;
+   uint32_t err_fqid = 0;
+
+   if (fman_intf->is_shared_mac) {
+   DPAA_PMD_DEBUG("Shared MAC's err queues are handled in kernel");
+   return 0;
+   }
+
+   for (i = 0; i < DPAA_DEBUG_FQ_MAX_NUM; i++) {
+   if (i == DPAA_DEBUG_FQ_RX_ERROR)
+   err_fqid = fman_intf->fqid_rx_err;
+   else if (i == DPAA_DEBUG_FQ_TX_ERROR)
+   err_fqid = fman_intf->fqid_tx_err;
+   else
+   continue;
+   ret = dpaa_def_queue_init(&err_queues[i], err_fqid);
+   if (ret) {
+   DPAA_PMD_ERR("DPAA %s ERROR queue init failed!",
+   i == DPAA_DEBUG_FQ_RX_ERROR ?
+   "RX" : "TX");
+   return ret;
+   }
+   err_queues[i].dpaa_intf = dpaa_intf;
+   }
+
+   return 0;
+}
+#endif
+
 /* Initialise a network interface */
 static int
 dpaa_dev_init(struct rte_eth_dev *eth_dev)
@@ -2162,22 +2196,11 @@ dpaa_dev_init(struct rte_eth_dev *eth_dev)
}
dpaa_intf->nb_tx_queues = MAX_DPAA_CORES;
 
-#if defined(RTE_LIBRTE_DPAA_DEBUG_DRIVER) || defined(RTE_LIBRTE_IEEE1588)
-   ret = dpaa_def_queue_init(&dpaa_intf->debug_queues
-   [DPAA_DEBUG_FQ_RX_ERROR], fman_intf->fqid_rx_err);
-   if (ret) {
-   DPAA_PMD_ERR("DPAA RX ERROR queue init failed!");
-   goto free_tx;
-   }
-   dpaa_intf->debug_queues[DPAA_DEBUG_FQ_RX_ERROR].dpaa_intf = dpaa_intf;
-   ret = dpaa_def_queue_init(&dpaa_intf->debug_queues
-   [DPAA_DEBUG_FQ_TX_ERROR], fman_intf->fqid_tx_err);
-   if (ret) {
-   DPAA_PMD_ERR("DPAA TX ERROR queue init failed!");
+#if defined(RTE_LIBRTE_DPAA_DEBUG_DRIVER)
+   ret = dpaa_error_queue_init(dpaa_intf, fman_intf);
+   if (ret)
goto free_tx;
-   }
 #endif
-
DPAA_PMD_DEBUG("All frame queues created");
 
/* Get the initial configuration for flow control */
diff --git a/drivers/net/dpaa/dpaa_ethdev.h b/drivers/net/dpaa/dpaa_ethdev.h
index 6aced9d5e9..df179b18e8 100644
--- a/drivers/net/dpaa/dpaa_ethdev.h
+++ b/drivers/net/dpaa/dpaa_ethdev.h
@@ -78,8 +78,11 @@
 #define DPAA_IF_RX_CONTE

[PATCH 08/17] net/dpaa: support Rx/Tx timestamp read

2024-08-01 Thread Hemant Agrawal
From: Vanshika Shukla 

This patch implements Rx/Tx timestamp read operations
for DPAA1 platform.

Signed-off-by: Vanshika Shukla 
---
 drivers/bus/dpaa/base/fman/fman.c| 21 +++-
 drivers/bus/dpaa/base/fman/fman_hw.c |  6 ++-
 drivers/bus/dpaa/include/fman.h  | 18 ++-
 drivers/net/dpaa/dpaa_ethdev.c   |  6 ++-
 drivers/net/dpaa/dpaa_ethdev.h   | 19 ++-
 drivers/net/dpaa/dpaa_ptp.c  | 43 +++
 drivers/net/dpaa/dpaa_rxtx.c | 79 +++-
 drivers/net/dpaa/dpaa_rxtx.h |  4 +-
 drivers/net/dpaa/meson.build |  1 +
 9 files changed, 178 insertions(+), 19 deletions(-)
 create mode 100644 drivers/net/dpaa/dpaa_ptp.c

diff --git a/drivers/bus/dpaa/base/fman/fman.c 
b/drivers/bus/dpaa/base/fman/fman.c
index bf41a3ed96..89786636d9 100644
--- a/drivers/bus/dpaa/base/fman/fman.c
+++ b/drivers/bus/dpaa/base/fman/fman.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2010-2016 Freescale Semiconductor Inc.
- * Copyright 2017-2020 NXP
+ * Copyright 2017-2024 NXP
  *
  */
 
@@ -520,6 +520,25 @@ fman_if_init(const struct device_node *dpa_node)
goto err;
}
 
+   regs_addr = of_get_address(tx_node, 0, &__if->regs_size, NULL);
+   if (!regs_addr) {
+   FMAN_ERR(-EINVAL, "of_get_address(%s)\n", mname);
+   goto err;
+   }
+   phys_addr = of_translate_address(tx_node, regs_addr);
+   if (!phys_addr) {
+   FMAN_ERR(-EINVAL, "of_translate_address(%s, %p)\n",
+   mname, regs_addr);
+   goto err;
+   }
+   __if->tx_bmi_map = mmap(NULL, __if->regs_size,
+   PROT_READ | PROT_WRITE, MAP_SHARED,
+   fman_ccsr_map_fd, phys_addr);
+   if (__if->tx_bmi_map == MAP_FAILED) {
+   FMAN_ERR(-errno, "mmap(0x%"PRIx64")\n", phys_addr);
+   goto err;
+   }
+
/* No channel ID for MAC-less */
assert(lenp == sizeof(*tx_channel_id));
na = of_n_addr_cells(mac_node);
diff --git a/drivers/bus/dpaa/base/fman/fman_hw.c 
b/drivers/bus/dpaa/base/fman/fman_hw.c
index 27b39a4975..466709bfc9 100644
--- a/drivers/bus/dpaa/base/fman/fman_hw.c
+++ b/drivers/bus/dpaa/base/fman/fman_hw.c
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
- * Copyright 2017,2020 NXP
+ * Copyright 2017,2020,2022 NXP
  *
  */
 
@@ -564,6 +564,10 @@ fman_if_set_ic_params(struct fman_if *fm_if,
&((struct rx_bmi_regs *)__if->bmi_map)->fmbm_ricp;
out_be32(fmbm_ricp, val);
 
+   unsigned int *fmbm_ticp =
+   &((struct tx_bmi_regs *)__if->tx_bmi_map)->fmbm_ticp;
+   out_be32(fmbm_ticp, val);
+
return 0;
 }
 
diff --git a/drivers/bus/dpaa/include/fman.h b/drivers/bus/dpaa/include/fman.h
index 3642b43be7..857eef3d2f 100644
--- a/drivers/bus/dpaa/include/fman.h
+++ b/drivers/bus/dpaa/include/fman.h
@@ -2,7 +2,7 @@
  *
  * Copyright 2010-2012 Freescale Semiconductor, Inc.
  * All rights reserved.
- * Copyright 2019-2021 NXP
+ * Copyright 2019-2022 NXP
  *
  */
 
@@ -292,6 +292,21 @@ struct rx_bmi_regs {
uint32_t fmbm_rdbg; /**< Rx Debug-*/
 };
 
+struct tx_bmi_regs {
+   uint32_t fmbm_tcfg; /**< Tx Configuration*/
+   uint32_t fmbm_tst;  /**< Tx Status*/
+   uint32_t fmbm_tda;  /**< Tx DMA attributes*/
+   uint32_t fmbm_tfp;  /**< Tx FIFO Parameters*/
+   uint32_t fmbm_tfed; /**< Tx Frame End Data*/
+   uint32_t fmbm_ticp; /**< Tx Internal Context Parameters*/
+   uint32_t fmbm_tfdne;/**< Tx Frame Dequeue Next Engine*/
+   uint32_t fmbm_tfca; /**< Tx Frame Attributes*/
+   uint32_t fmbm_tcfqid;   /**< Tx Confirmation Frame Queue ID*/
+   uint32_t fmbm_tefqid;   /**< Tx Error Frame Queue ID*/
+   uint32_t fmbm_tfene;/**< Tx Frame Enqueue Next Engine*/
+   uint32_t fmbm_trlmts;   /**< Tx Rate Limiter Scale*/
+   uint32_t fmbm_trlmt;/**< Tx Rate Limiter*/
+};
 struct fman_port_qmi_regs {
uint32_t fmqm_pnc;  /**< PortID n Configuration Register */
uint32_t fmqm_pns;  /**< PortID n Status Register */
@@ -380,6 +395,7 @@ struct __fman_if {
uint64_t regs_size;
void *ccsr_map;
void *bmi_map;
+   void *tx_bmi_map;
void *qmi_map;
struct list_head node;
 };
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index e3cb15cad5..f7cd7c0d33 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2017-2020 NXP
+ *   Copyright 2017-2020,2022 NXP
  *
  */
 /* System headers */
@@ -1670,6 +1670,10 @@ static 

[PATCH 09/17] net/dpaa: support IEEE 1588 PTP

2024-08-01 Thread Hemant Agrawal
From: Vanshika Shukla 

This patch adds the support for the ethdev APIs
to enable/disable and read/write/adjust IEEE1588
PTP timestamps for DPAA platform.

Signed-off-by: Vanshika Shukla 
---
 doc/guides/nics/dpaa.rst  |  1 +
 drivers/bus/dpaa/base/fman/fman.c | 15 ++
 drivers/bus/dpaa/include/fman.h   | 45 +
 drivers/net/dpaa/dpaa_ethdev.c|  5 ++
 drivers/net/dpaa/dpaa_ethdev.h| 16 +++
 drivers/net/dpaa/dpaa_ptp.c   | 80 ++-
 6 files changed, 160 insertions(+), 2 deletions(-)

diff --git a/doc/guides/nics/dpaa.rst b/doc/guides/nics/dpaa.rst
index e8402dff52..580edd9327 100644
--- a/doc/guides/nics/dpaa.rst
+++ b/doc/guides/nics/dpaa.rst
@@ -148,6 +148,7 @@ Features
   - Packet type information
   - Checksum offload
   - Promiscuous mode
+  - IEEE1588 PTP
 
 DPAA Mempool Driver
 ~~~
diff --git a/drivers/bus/dpaa/base/fman/fman.c 
b/drivers/bus/dpaa/base/fman/fman.c
index 89786636d9..a79b0b75dd 100644
--- a/drivers/bus/dpaa/base/fman/fman.c
+++ b/drivers/bus/dpaa/base/fman/fman.c
@@ -28,6 +28,7 @@ u32 fman_dealloc_bufs_mask_lo;
 
 int fman_ccsr_map_fd = -1;
 static COMPAT_LIST_HEAD(__ifs);
+void *rtc_map;
 
 /* This is the (const) global variable that callers have read-only access to.
  * Internally, we have read-write access directly to __ifs.
@@ -539,6 +540,20 @@ fman_if_init(const struct device_node *dpa_node)
goto err;
}
 
+   if (!rtc_map) {
+   __if->rtc_map = mmap(NULL, FMAN_IEEE_1588_SIZE,
+   PROT_READ | PROT_WRITE, MAP_SHARED,
+   fman_ccsr_map_fd, FMAN_IEEE_1588_OFFSET);
+   if (__if->rtc_map == MAP_FAILED) {
+   pr_err("Can not map FMan RTC regs base\n");
+   _errno = -EINVAL;
+   goto err;
+   }
+   rtc_map = __if->rtc_map;
+   } else {
+   __if->rtc_map = rtc_map;
+   }
+
/* No channel ID for MAC-less */
assert(lenp == sizeof(*tx_channel_id));
na = of_n_addr_cells(mac_node);
diff --git a/drivers/bus/dpaa/include/fman.h b/drivers/bus/dpaa/include/fman.h
index 857eef3d2f..109c1a4a22 100644
--- a/drivers/bus/dpaa/include/fman.h
+++ b/drivers/bus/dpaa/include/fman.h
@@ -64,6 +64,12 @@
 #define GROUP_ADDRESS  0x0100LL
 #define HASH_CTRL_ADDR_MASK0x003F
 
+#define FMAN_RTC_MAX_NUM_OF_ALARMS 3
+#define FMAN_RTC_MAX_NUM_OF_PERIODIC_PULSES4
+#define FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS   3
+#define FMAN_IEEE_1588_OFFSET  0X1AFE000
+#define FMAN_IEEE_1588_SIZE4096
+
 /* Pre definitions of FMAN interface and Bpool structures */
 struct __fman_if;
 struct fman_if_bpool;
@@ -307,6 +313,44 @@ struct tx_bmi_regs {
uint32_t fmbm_trlmts;   /**< Tx Rate Limiter Scale*/
uint32_t fmbm_trlmt;/**< Tx Rate Limiter*/
 };
+
+/* Description FM RTC timer alarm */
+struct t_tmr_alarm {
+   uint32_t tmr_alarm_h;
+   uint32_t tmr_alarm_l;
+};
+
+/* Description FM RTC timer Ex trigger */
+struct t_tmr_ext_trigger {
+   uint32_t tmr_etts_h;
+   uint32_t tmr_etts_l;
+};
+
+struct rtc_regs {
+   uint32_t tmr_id;/* 0x000 Module ID register */
+   uint32_t tmr_id2;   /* 0x004 Controller ID register */
+   uint32_t reserved0008[30];
+   uint32_t tmr_ctrl;  /* 0x0080 timer control register */
+   uint32_t tmr_tevent;/* 0x0084 timer event register */
+   uint32_t tmr_temask;/* 0x0088 timer event mask register */
+   uint32_t reserved008c[3];
+   uint32_t tmr_cnt_h; /* 0x0098 timer counter high register */
+   uint32_t tmr_cnt_l; /* 0x009c timer counter low register */
+   uint32_t tmr_add;   /* 0x00a0 timer drift compensation addend 
register */
+   uint32_t tmr_acc;   /* 0x00a4 timer accumulator register */
+   uint32_t tmr_prsc;  /* 0x00a8 timer prescale */
+   uint32_t reserved00ac;
+   uint32_t tmr_off_h; /* 0x00b0 timer offset high */
+   uint32_t tmr_off_l; /* 0x00b4 timer offset low  */
+   struct t_tmr_alarm tmr_alarm[FMAN_RTC_MAX_NUM_OF_ALARMS];
+   /* 0x00b8 timer alarm */
+   uint32_t tmr_fiper[FMAN_RTC_MAX_NUM_OF_PERIODIC_PULSES];
+   /* 0x00d0 timer fixed period interval */
+   struct t_tmr_ext_trigger tmr_etts[FMAN_RTC_MAX_NUM_OF_EXT_TRIGGERS];
+   /* 0x00e0 time stamp general purpose external */
+   uint32_t reserved00f0[4];
+};
+
 struct fman_port_qmi_regs {
uint32_t fmqm_pnc;  /**< PortID n Configuration Register */
uint32_t fmqm_pns;  /**< PortID n Status Register */
@@ -396,6 +440,7 @@ struct __fman_if {
void *ccsr_map;
void *bmi_map;
void *tx_bmi_map;
+   void *rtc_map;
void *qmi_ma

[PATCH 10/17] net/dpaa: implement detailed packet parsing

2024-08-01 Thread Hemant Agrawal
This patch implements the detailed packet parsing using
the annotation info from the hardware.

decode parser to set RX muf packet type by dpaa_slow_parsing.
Support to identify the IPSec ESP, GRE and SCTP packets.

Signed-off-by: Jun Yang 
Signed-off-by: Hemant Agrawal 
---
 drivers/net/dpaa/dpaa_rxtx.c |  35 -
 drivers/net/dpaa/dpaa_rxtx.h | 143 +++
 2 files changed, 92 insertions(+), 86 deletions(-)

diff --git a/drivers/net/dpaa/dpaa_rxtx.c b/drivers/net/dpaa/dpaa_rxtx.c
index 44d9bc1adb..588a78a50c 100644
--- a/drivers/net/dpaa/dpaa_rxtx.c
+++ b/drivers/net/dpaa/dpaa_rxtx.c
@@ -110,11 +110,38 @@ static void dpaa_display_frame_info(const struct qm_fd 
*fd,
 #define dpaa_display_frame_info(a, b, c)
 #endif
 
-static inline void dpaa_slow_parsing(struct rte_mbuf *m __rte_unused,
-uint64_t prs __rte_unused)
+static inline void
+dpaa_slow_parsing(struct rte_mbuf *m,
+   const struct annotations_t *annot)
 {
+   const struct dpaa_eth_parse_results_t *parse;
+
DPAA_DP_LOG(DEBUG, "Slow parsing");
-   /*TBD:XXX: to be implemented*/
+   parse = &annot->parse;
+
+   if (parse->ethernet)
+   m->packet_type |= RTE_PTYPE_L2_ETHER;
+   if (parse->vlan)
+   m->packet_type |= RTE_PTYPE_L2_ETHER_VLAN;
+   if (parse->first_ipv4)
+   m->packet_type |= RTE_PTYPE_L3_IPV4;
+   if (parse->first_ipv6)
+   m->packet_type |= RTE_PTYPE_L3_IPV6;
+   if (parse->gre)
+   m->packet_type |= RTE_PTYPE_TUNNEL_GRE;
+   if (parse->last_ipv4)
+   m->packet_type |= RTE_PTYPE_L3_IPV4_EXT;
+   if (parse->last_ipv6)
+   m->packet_type |= RTE_PTYPE_L3_IPV6_EXT;
+   if (parse->l4_type == DPAA_PR_L4_TCP_TYPE)
+   m->packet_type |= RTE_PTYPE_L4_TCP;
+   else if (parse->l4_type == DPAA_PR_L4_UDP_TYPE)
+   m->packet_type |= RTE_PTYPE_L4_UDP;
+   else if (parse->l4_type == DPAA_PR_L4_IPSEC_TYPE &&
+   !parse->l4_info_err && parse->esp_sum)
+   m->packet_type |= RTE_PTYPE_TUNNEL_ESP;
+   else if (parse->l4_type == DPAA_PR_L4_SCTP_TYPE)
+   m->packet_type |= RTE_PTYPE_L4_SCTP;
 }
 
 static inline void dpaa_eth_packet_info(struct rte_mbuf *m, void *fd_virt_addr)
@@ -229,7 +256,7 @@ static inline void dpaa_eth_packet_info(struct rte_mbuf *m, 
void *fd_virt_addr)
break;
/* More switch cases can be added */
default:
-   dpaa_slow_parsing(m, prs);
+   dpaa_slow_parsing(m, annot);
}
 
m->tx_offload = annot->parse.ip_off[0];
diff --git a/drivers/net/dpaa/dpaa_rxtx.h b/drivers/net/dpaa/dpaa_rxtx.h
index 1048e86d41..215bdeaf7f 100644
--- a/drivers/net/dpaa/dpaa_rxtx.h
+++ b/drivers/net/dpaa/dpaa_rxtx.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2017,2020-2022 NXP
+ *   Copyright 2017,2020-2024 NXP
  *
  */
 
@@ -162,98 +162,77 @@
 
 #define DPAA_PKT_L3_LEN_SHIFT  7
 
+enum dpaa_parse_result_l4_type {
+   DPAA_PR_L4_TCP_TYPE = 1,
+   DPAA_PR_L4_UDP_TYPE = 2,
+   DPAA_PR_L4_IPSEC_TYPE = 3,
+   DPAA_PR_L4_SCTP_TYPE = 4,
+   DPAA_PR_L4_DCCP_TYPE = 5
+};
+
 /**
  * FMan parse result array
  */
 struct dpaa_eth_parse_results_t {
-uint8_t lpid;   /**< Logical port id */
-uint8_t shimr;  /**< Shim header result  */
-union {
-   uint16_t  l2r;  /**< Layer 2 result */
+   uint8_t lpid; /**< Logical port id */
+   uint8_t shimr; /**< Shim header result  */
+   union {
+   uint16_t l2r; /**< Layer 2 result */
struct {
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
-   uint16_t  ethernet:1;
-   uint16_t  vlan:1;
-   uint16_t  llc_snap:1;
-   uint16_t  mpls:1;
-   uint16_t  ppoe_ppp:1;
-   uint16_t  unused_1:3;
-   uint16_t  unknown_eth_proto:1;
-   uint16_t  eth_frame_type:2;
-   uint16_t  l2r_err:5;
+   uint16_t unused_1:3;
+   uint16_t ppoe_ppp:1;
+   uint16_t mpls:1;
+   uint16_t llc_snap:1;
+   uint16_t vlan:1;
+   uint16_t ethernet:1;
+
+   uint16_t l2r_err:5;
+   uint16_t eth_frame_type:2;
/*00-unicast, 01-multicast, 11-broadcast*/
-#else
-   uint16_t  l2r_err:5;
-   uint16_t  

[PATCH 11/17] net/dpaa: enhance DPAA frame display

2024-08-01 Thread Hemant Agrawal
This patch enhances the received packet debugging capability.
This help displaying the full packet parsing output.

Signed-off-by: Jun Yang 
Signed-off-by: Hemant Agrawal 
---
 doc/guides/nics/dpaa.rst   |   5 ++
 drivers/net/dpaa/dpaa_ethdev.c |   6 ++
 drivers/net/dpaa/dpaa_rxtx.c   | 138 +++--
 drivers/net/dpaa/dpaa_rxtx.h   |   5 ++
 4 files changed, 130 insertions(+), 24 deletions(-)

diff --git a/doc/guides/nics/dpaa.rst b/doc/guides/nics/dpaa.rst
index 580edd9327..448607e9ac 100644
--- a/doc/guides/nics/dpaa.rst
+++ b/doc/guides/nics/dpaa.rst
@@ -227,6 +227,11 @@ state during application initialization:
   application want to use eventdev with DPAA device.
   Currently these queues are not used for LS1023/LS1043 platform by default.
 
+- ``DPAA_DISPLAY_FRAME_AND_PARSER_RESULT`` (default 0)
+
+  This defines the debug flag, whether to dump the detailed frame and packet
+  parsing result for the incoming packets.
+
 
 Driver compilation and testing
 --
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index e92f1c25b2..979220a700 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -2094,6 +2094,12 @@ dpaa_dev_init(struct rte_eth_dev *eth_dev)
td_tx_threshold = CGR_RX_PERFQ_THRESH;
}
 
+#ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
+   penv = getenv("DPAA_DISPLAY_FRAME_AND_PARSER_RESULT");
+   if (penv)
+   dpaa_force_display_frame_set(atoi(penv));
+#endif
+
/* If congestion control is enabled globally*/
if (num_rx_fqs > 0 && td_threshold) {
dpaa_intf->cgr_rx = rte_zmalloc(NULL,
diff --git a/drivers/net/dpaa/dpaa_rxtx.c b/drivers/net/dpaa/dpaa_rxtx.c
index 588a78a50c..56b4ce1056 100644
--- a/drivers/net/dpaa/dpaa_rxtx.c
+++ b/drivers/net/dpaa/dpaa_rxtx.c
@@ -47,6 +47,10 @@
 #include 
 #include 
 
+#ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
+static int s_force_display_frm;
+#endif
+
 #define DPAA_MBUF_TO_CONTIG_FD(_mbuf, _fd, _bpid) \
do { \
(_fd)->opaque_addr = 0; \
@@ -58,37 +62,122 @@
} while (0)
 
 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
+void
+dpaa_force_display_frame_set(int set)
+{
+   s_force_display_frm = set;
+}
+
 #define DISPLAY_PRINT printf
-static void dpaa_display_frame_info(const struct qm_fd *fd,
-   uint32_t fqid, bool rx)
+static void
+dpaa_display_frame_info(const struct qm_fd *fd,
+   uint32_t fqid, bool rx)
 {
-   int ii;
-   char *ptr;
+   int pos, offset = 0;
+   char *ptr, info[1024];
struct annotations_t *annot = rte_dpaa_mem_ptov(fd->addr);
uint8_t format;
+   const struct dpaa_eth_parse_results_t *psr;
 
-   if (!fd->status) {
-   /* Do not display correct packets.*/
+   if (!fd->status && !s_force_display_frm) {
+   /* Do not display correct packets unless force display.*/
return;
}
+   psr = &annot->parse;
 
-   format = (fd->opaque & DPAA_FD_FORMAT_MASK) >>
-   DPAA_FD_FORMAT_SHIFT;
-
-   DISPLAY_PRINT("fqid %d bpid %d addr 0x%lx, format %d\r\n",
- fqid, fd->bpid, (unsigned long)fd->addr, fd->format);
-   DISPLAY_PRINT("off %d, len %d stat 0x%x\r\n",
- fd->offset, fd->length20, fd->status);
+   format = (fd->opaque & DPAA_FD_FORMAT_MASK) >> DPAA_FD_FORMAT_SHIFT;
+   if (format == qm_fd_contig)
+   sprintf(info, "simple");
+   else if (format == qm_fd_sg)
+   sprintf(info, "sg");
+   else
+   sprintf(info, "unknown format(%d)", format);
+
+   DISPLAY_PRINT("%s: fqid=%08x, bpid=%d, phy addr=0x%lx ",
+   rx ? "RX" : "TX", fqid, fd->bpid, (unsigned long)fd->addr);
+   DISPLAY_PRINT("format=%s offset=%d, len=%d, stat=0x%x\r\n",
+   info, fd->offset, fd->length20, fd->status);
if (rx) {
-   ptr = (char *)&annot->parse;
-   DISPLAY_PRINT("RX parser result:\r\n");
-   for (ii = 0; ii < (int)sizeof(struct dpaa_eth_parse_results_t);
-   ii++) {
-   DISPLAY_PRINT("%02x ", ptr[ii]);
-   if (((ii + 1) % 16) == 0)
-   DISPLAY_PRINT("\n");
+   DISPLAY_PRINT("Display usual RX parser result:\r\n");
+   if (psr->eth_frame_type == 0)
+   offset += sprintf(&info[offset], "unicast");
+   else if (psr->eth_frame_type == 1)
+   offset += sprintf(&info[offset], "multicast");
+   else if (p

[PATCH 12/17] net/dpaa: support mempool debug

2024-08-01 Thread Hemant Agrawal
From: Gagandeep Singh 

This patch adds support to compile time debug the mempool
corruptions in dpaa driver.

Signed-off-by: Gagandeep Singh 
---
 drivers/net/dpaa/dpaa_rxtx.c | 40 
 1 file changed, 40 insertions(+)

diff --git a/drivers/net/dpaa/dpaa_rxtx.c b/drivers/net/dpaa/dpaa_rxtx.c
index 56b4ce1056..84fd0c57a4 100644
--- a/drivers/net/dpaa/dpaa_rxtx.c
+++ b/drivers/net/dpaa/dpaa_rxtx.c
@@ -496,6 +496,10 @@ dpaa_eth_sg_to_mbuf(const struct qm_fd *fd, uint32_t ifid)
first_seg->data_len = sg_temp->length;
first_seg->pkt_len = sg_temp->length;
rte_mbuf_refcnt_set(first_seg, 1);
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+   rte_mempool_check_cookies(rte_mempool_from_obj((void *)first_seg),
+   (void **)&first_seg, 1, 1);
+#endif
 
first_seg->port = ifid;
first_seg->nb_segs = 1;
@@ -513,6 +517,10 @@ dpaa_eth_sg_to_mbuf(const struct qm_fd *fd, uint32_t ifid)
first_seg->pkt_len += sg_temp->length;
first_seg->nb_segs += 1;
rte_mbuf_refcnt_set(cur_seg, 1);
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+   rte_mempool_check_cookies(rte_mempool_from_obj((void *)cur_seg),
+   (void **)&cur_seg, 1, 1);
+#endif
prev_seg->next = cur_seg;
if (sg_temp->final) {
cur_seg->next = NULL;
@@ -524,6 +532,10 @@ dpaa_eth_sg_to_mbuf(const struct qm_fd *fd, uint32_t ifid)
first_seg->pkt_len, first_seg->nb_segs);
 
dpaa_eth_packet_info(first_seg, vaddr);
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+   rte_mempool_check_cookies(rte_mempool_from_obj((void *)temp),
+   (void **)&temp, 1, 1);
+#endif
rte_pktmbuf_free_seg(temp);
 
return first_seg;
@@ -564,6 +576,10 @@ dpaa_eth_fd_to_mbuf(const struct qm_fd *fd, uint32_t ifid)
mbuf->ol_flags = 0;
mbuf->next = NULL;
rte_mbuf_refcnt_set(mbuf, 1);
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+   rte_mempool_check_cookies(rte_mempool_from_obj((void *)mbuf),
+   (void **)&mbuf, 1, 1);
+#endif
dpaa_eth_packet_info(mbuf, mbuf->buf_addr);
 
return mbuf;
@@ -680,6 +696,10 @@ dpaa_rx_cb_no_prefetch(struct qman_fq **fq, struct 
qm_dqrr_entry **dqrr,
mbuf->ol_flags = 0;
mbuf->next = NULL;
rte_mbuf_refcnt_set(mbuf, 1);
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+   rte_mempool_check_cookies(rte_mempool_from_obj((void *)mbuf),
+   (void **)&mbuf, 1, 1);
+#endif
dpaa_eth_packet_info(mbuf, mbuf->buf_addr);
dpaa_display_frame_info(fd, fq[0]->fqid, true);
 #if defined(RTE_LIBRTE_IEEE1588)
@@ -727,6 +747,10 @@ dpaa_rx_cb(struct qman_fq **fq, struct qm_dqrr_entry 
**dqrr,
mbuf->ol_flags = 0;
mbuf->next = NULL;
rte_mbuf_refcnt_set(mbuf, 1);
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+   rte_mempool_check_cookies(rte_mempool_from_obj((void *)mbuf),
+   (void **)&mbuf, 1, 1);
+#endif
dpaa_eth_packet_info(mbuf, mbuf->buf_addr);
dpaa_display_frame_info(fd, fq[0]->fqid, true);
 #if defined(RTE_LIBRTE_IEEE1588)
@@ -978,6 +1002,10 @@ dpaa_eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf,
return -1;
}
 
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+   rte_mempool_check_cookies(rte_mempool_from_obj((void *)temp),
+   (void **)&temp, 1, 0);
+#endif
fd->cmd = 0;
fd->opaque_addr = 0;
 
@@ -1023,6 +1051,10 @@ dpaa_eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf,
} else {
sg_temp->bpid =
DPAA_MEMPOOL_TO_BPID(cur_seg->pool);
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+   
rte_mempool_check_cookies(rte_mempool_from_obj((void *)cur_seg),
+   (void **)&cur_seg, 1, 0);
+#endif
}
} else if (RTE_MBUF_HAS_EXTBUF(cur_seg)) {
free_buf[*free_count].seg = cur_seg;
@@ -1080,6 +1112,10 @@ tx_on_dpaa_pool_unsegmented(struct rte_mbuf *mbuf,
 * released by BMAN.
 */
DPAA_MBUF_TO_CONTIG_FD(mbuf, fd_arr, bp_info->bpid);
+#ifdef RTE_LIBRTE_MEMPOOL_DEBUG
+   rte_mempool_check_cookies(rte_mempool_from_obj((void 
*)mbuf),
+   (void **)&mbuf, 1, 0);
+#endif
}
} else if (RTE_MBUF_HAS_EXTBUF(mbuf)) {
buf_to_free[*free_count].seg = mbuf;
@@ -1310,6 +1346,10 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, 
uint16_t nb_bufs)
DPAA_TX_CKSUM_OFFLOAD_MASK)
dpaa_unsegmented_checksum(mbuf,

[PATCH 13/17] net/dpaa: add Tx rate limiting DPAA PMD API

2024-08-01 Thread Hemant Agrawal
From: Vinod Pullabhatla 

Add support to set Tx rate on DPAA platform through PMD APIs

Signed-off-by: Vinod Pullabhatla 
Signed-off-by: Rohit Raj 
---
 .mailmap |  1 +
 drivers/net/dpaa/dpaa_flow.c | 95 +---
 drivers/net/dpaa/fmlib/fm_lib.c  | 32 +-
 drivers/net/dpaa/fmlib/fm_port_ext.h |  2 +-
 drivers/net/dpaa/rte_pmd_dpaa.h  | 25 +++-
 drivers/net/dpaa/version.map |  7 ++
 6 files changed, 151 insertions(+), 11 deletions(-)

diff --git a/.mailmap b/.mailmap
index 4a508bafad..cb0fd52404 100644
--- a/.mailmap
+++ b/.mailmap
@@ -1562,6 +1562,7 @@ Vincent Jardin 
 Vincent Li 
 Vincent S. Cojot 
 Vinh Tran 
+Vinod Pullabhatla 
 Vipin Padmam Ramesh 
 Vipin Varghese  
 Vipul Ashri 
diff --git a/drivers/net/dpaa/dpaa_flow.c b/drivers/net/dpaa/dpaa_flow.c
index 082bd5d014..dfc81e4e43 100644
--- a/drivers/net/dpaa/dpaa_flow.c
+++ b/drivers/net/dpaa/dpaa_flow.c
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #define DPAA_MAX_NUM_ETH_DEV   8
 
@@ -29,6 +30,11 @@ return 
&scheme_params->param.key_ext_and_hash.extract_array[hdr_idx];
 #define SCH_EXT_FULL_FLD(scheme_params, hdr_idx) \
SCH_EXT_HDR(scheme_params, hdr_idx).extract_by_hdr_type.full_field
 
+/* FMAN mac indexes mappings (0 is unused, first 8 are for 1G, next for 10G
+ * ports).
+ */
+const uint8_t mac_idx[] = {-1, 0, 1, 2, 3, 4, 5, 6, 7, 0, 1};
+
 /* FM global info */
 struct dpaa_fm_info {
t_handle fman_handle;
@@ -649,7 +655,7 @@ static inline int set_pcd_netenv_scheme(struct dpaa_if 
*dpaa_intf,
 }
 
 
-static inline int get_port_type(struct fman_if *fif)
+static inline int get_rx_port_type(struct fman_if *fif)
 {
/* For 1G fm-mac9 and fm-mac10 ports, configure the VSP as 10G
 * ports so that kernel can configure correct port.
@@ -668,6 +674,19 @@ static inline int get_port_type(struct fman_if *fif)
return -1;
 }
 
+static inline int get_tx_port_type(struct fman_if *fif)
+{
+   if (fif->mac_type == fman_mac_1g)
+   return e_FM_PORT_TYPE_TX;
+   else if (fif->mac_type == fman_mac_2_5g)
+   return e_FM_PORT_TYPE_TX_2_5G;
+   else if (fif->mac_type == fman_mac_10g)
+   return e_FM_PORT_TYPE_TX_10G;
+
+   DPAA_PMD_ERR("MAC type unsupported");
+   return -1;
+}
+
 static inline int set_fm_port_handle(struct dpaa_if *dpaa_intf,
 uint64_t req_dist_set,
 struct fman_if *fif)
@@ -676,17 +695,12 @@ static inline int set_fm_port_handle(struct dpaa_if 
*dpaa_intf,
ioc_fm_pcd_net_env_params_t dist_units;
PMD_INIT_FUNC_TRACE();
 
-   /* FMAN mac indexes mappings (0 is unused,
-* first 8 are for 1G, next for 10G ports
-*/
-   uint8_t mac_idx[] = {-1, 0, 1, 2, 3, 4, 5, 6, 7, 0, 1};
-
/* Memset FM port params */
memset(&fm_port_params, 0, sizeof(fm_port_params));
 
/* Set FM port params */
fm_port_params.h_fm = fm_info.fman_handle;
-   fm_port_params.port_type = get_port_type(fif);
+   fm_port_params.port_type = get_rx_port_type(fif);
fm_port_params.port_id = mac_idx[fif->mac_idx];
 
/* FM PORT Open */
@@ -949,7 +963,6 @@ static int dpaa_port_vsp_configure(struct dpaa_if 
*dpaa_intf,
 {
t_fm_vsp_params vsp_params;
t_fm_buffer_prefix_content buf_prefix_cont;
-   uint8_t mac_idx[] = {-1, 0, 1, 2, 3, 4, 5, 6, 7, 0, 1};
uint8_t idx = mac_idx[fif->mac_idx];
int ret;
 
@@ -1079,3 +1092,69 @@ int dpaa_port_vsp_cleanup(struct dpaa_if *dpaa_intf, 
struct fman_if *fif)
 
return E_OK;
 }
+
+int rte_pmd_dpaa_port_set_rate_limit(uint16_t port_id, uint16_t burst,
+uint32_t rate)
+{
+   t_fm_port_rate_limit port_rate_limit;
+   bool port_handle_exists = true;
+   void *handle;
+   uint32_t ret;
+   struct rte_eth_dev *dev;
+   struct dpaa_if *dpaa_intf;
+   struct fman_if *fif;
+
+   RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
+   dev = &rte_eth_devices[port_id];
+   dpaa_intf = dev->data->dev_private;
+   fif = dev->process_private;
+
+   memset(&port_rate_limit, 0, sizeof(port_rate_limit));
+   port_rate_limit.max_burst_size = burst;
+   port_rate_limit.rate_limit = rate;
+
+   DPAA_PMD_DEBUG("Setting Rate Limiter for port:%s  Max Burst =%u Max 
Rate =%u\n",
+  dpaa_intf->name, burst, rate);
+
+   if (!dpaa_intf->port_handle) {
+   t_fm_port_params fm_port_params;
+
+   /* Memset FM port params */
+   memset(&fm_port_params, 0, sizeof(fm_port_params));
+
+   /* Set FM port params */
+   fm_port_params.h_fm = fm_open(0);
+   fm_port_params.port_type = get_tx_port_type(fif);
+   fm_port_params.port_id = mac_idx[fif->mac_idx];
+
+   /* FM PORT Open */
+   

[PATCH 14/17] bus/dpaa: add OH port mode for dpaa eth

2024-08-01 Thread Hemant Agrawal
From: Rohit Raj 

NXP DPAA architecture supports the concept of DPAA
port as Offline Port - meaning - not connected to an actual MAC.
This is an virtual port to be used by application for exchanging data.

This property is completely driven by the device-tree. During the
DPAA bus scan, based on the platform device properties as in
device-tree, the port can be classified as OH port.

This patch add support in the driver to use dpaa eth port
in OH mode as well with DPDK applications.

Signed-off-by: Rohit Raj 
---
 drivers/bus/dpaa/base/fman/fman.c | 261 ++
 drivers/bus/dpaa/base/fman/fman_hw.c  |  24 +-
 drivers/bus/dpaa/base/fman/netcfg_layer.c |  19 +-
 drivers/bus/dpaa/dpaa_bus.c   |  23 +-
 drivers/bus/dpaa/include/fman.h   |  33 ++-
 drivers/net/dpaa/dpaa_ethdev.c|  87 ++--
 drivers/net/dpaa/dpaa_ethdev.h|   8 +-
 drivers/net/dpaa/dpaa_flow.c  |  39 ++--
 drivers/net/dpaa/dpaa_fmc.c   |   3 +-
 9 files changed, 353 insertions(+), 144 deletions(-)

diff --git a/drivers/bus/dpaa/base/fman/fman.c 
b/drivers/bus/dpaa/base/fman/fman.c
index a79b0b75dd..f817305ab7 100644
--- a/drivers/bus/dpaa/base/fman/fman.c
+++ b/drivers/bus/dpaa/base/fman/fman.c
@@ -43,7 +43,7 @@ if_destructor(struct __fman_if *__if)
if (!__if)
return;
 
-   if (__if->__if.mac_type == fman_offline_internal)
+   if (__if->__if.mac_type == fman_offline)
goto cleanup;
 
list_for_each_entry_safe(bp, tmpbp, &__if->__if.bpool_list, node) {
@@ -246,26 +246,34 @@ fman_if_init(const struct device_node *dpa_node)
uint64_t port_cell_idx_val = 0;
uint64_t ext_args_cell_idx_val = 0;
 
-   const struct device_node *mac_node = NULL, *tx_node, *ext_args_node;
-   const struct device_node *pool_node, *fman_node, *rx_node;
+   const struct device_node *mac_node = NULL, *ext_args_node;
+   const struct device_node *pool_node, *fman_node;
+   const struct device_node *rx_node = NULL, *tx_node = NULL;
+   const struct device_node *oh_node = NULL;
const uint32_t *regs_addr = NULL;
const char *mname, *fname;
const char *dname = dpa_node->full_name;
size_t lenp;
-   int _errno, is_shared = 0;
+   int _errno, is_shared = 0, is_offline = 0;
const char *char_prop;
uint32_t na;
 
if (of_device_is_available(dpa_node) == false)
return 0;
 
-   if (!of_device_is_compatible(dpa_node, "fsl,dpa-ethernet-init") &&
-   !of_device_is_compatible(dpa_node, "fsl,dpa-ethernet")) {
+   if (of_device_is_compatible(dpa_node, "fsl,dpa-oh"))
+   is_offline = 1;
+
+   if (!of_device_is_compatible(dpa_node, "fsl,dpa-oh") &&
+   !of_device_is_compatible(dpa_node, "fsl,dpa-ethernet-init") &&
+   !of_device_is_compatible(dpa_node, "fsl,dpa-ethernet")) {
return 0;
}
 
-   rprop = "fsl,qman-frame-queues-rx";
-   mprop = "fsl,fman-mac";
+   rprop = is_offline ? "fsl,qman-frame-queues-oh" :
+"fsl,qman-frame-queues-rx";
+   mprop = is_offline ? "fsl,fman-oh-port" :
+"fsl,fman-mac";
 
/* Obtain the MAC node used by this interface except macless */
mac_phandle = of_get_property(dpa_node, mprop, &lenp);
@@ -281,27 +289,43 @@ fman_if_init(const struct device_node *dpa_node)
}
mname = mac_node->full_name;
 
-   /* Extract the Rx and Tx ports */
-   ports_phandle = of_get_property(mac_node, "fsl,port-handles",
-   &lenp);
-   if (!ports_phandle)
-   ports_phandle = of_get_property(mac_node, "fsl,fman-ports",
+   if (!is_offline) {
+   /* Extract the Rx and Tx ports */
+   ports_phandle = of_get_property(mac_node, "fsl,port-handles",
&lenp);
-   if (!ports_phandle) {
-   FMAN_ERR(-EINVAL, "%s: no fsl,port-handles",
-mname);
-   return -EINVAL;
-   }
-   assert(lenp == (2 * sizeof(phandle)));
-   rx_node = of_find_node_by_phandle(ports_phandle[0]);
-   if (!rx_node) {
-   FMAN_ERR(-ENXIO, "%s: bad fsl,port-handle[0]", mname);
-   return -ENXIO;
-   }
-   tx_node = of_find_node_by_phandle(ports_phandle[1]);
-   if (!tx_node) {
-   FMAN_ERR(-ENXIO, "%s: bad fsl,port-handle[1]", mname);
-   return -ENXIO;
+   if (!ports_phandle)
+   ports_phandle = of_get_property(mac_node, 
"fsl,fman-ports",
+   &lenp);
+   if (!ports_phandle) {
+   FMAN_ERR(-EINVAL, "%s: no fsl,port-handles",
+mname);
+   return -EINVAL;
+   }
+   

[PATCH 15/17] bus/dpaa: add ONIC port mode for the DPAA eth

2024-08-01 Thread Hemant Agrawal
From: Rohit Raj 

The OH ports can also be used by two application, processing contexts
to communicate to each other.
This patch enables this mode for dpaa-eth OH port as ONIC port,
so that application can use the dpaa-eth to communicate to each
other on the same SoC.

Again,this properties is driven by the system device-tree variables.

Signed-off-by: Rohit Raj 
---
 doc/guides/nics/dpaa.rst  |   3 +
 drivers/bus/dpaa/base/fman/fman.c | 299 +-
 drivers/bus/dpaa/base/fman/fman_hw.c  |  20 +-
 drivers/bus/dpaa/base/fman/netcfg_layer.c |   4 +-
 drivers/bus/dpaa/dpaa_bus.c   |  10 +-
 drivers/bus/dpaa/include/fman.h   |  15 +-
 drivers/net/dpaa/dpaa_ethdev.c| 114 +++--
 drivers/net/dpaa/dpaa_flow.c  |  28 +-
 drivers/net/dpaa/dpaa_fmc.c   |   3 +-
 9 files changed, 439 insertions(+), 57 deletions(-)

diff --git a/doc/guides/nics/dpaa.rst b/doc/guides/nics/dpaa.rst
index 448607e9ac..4bd95398ca 100644
--- a/doc/guides/nics/dpaa.rst
+++ b/doc/guides/nics/dpaa.rst
@@ -136,6 +136,8 @@ RTE framework and DPAA internal components/drivers.
   The Ethernet driver is bound to a FMAN port and implements the interfaces
   needed to connect the DPAA network interface to the network stack.
   Each FMAN Port corresponds to a DPDK network interface.
+- PMD also support OH/ONIC mode, where the port works as a HW assisted
+  virtual port without actually connecting to a Physical MAC.
 
 
 Features
@@ -149,6 +151,7 @@ Features
   - Checksum offload
   - Promiscuous mode
   - IEEE1588 PTP
+  - OH/ONIC virtual port support
 
 DPAA Mempool Driver
 ~~~
diff --git a/drivers/bus/dpaa/base/fman/fman.c 
b/drivers/bus/dpaa/base/fman/fman.c
index f817305ab7..efe6eab4a9 100644
--- a/drivers/bus/dpaa/base/fman/fman.c
+++ b/drivers/bus/dpaa/base/fman/fman.c
@@ -43,7 +43,7 @@ if_destructor(struct __fman_if *__if)
if (!__if)
return;
 
-   if (__if->__if.mac_type == fman_offline)
+   if (__if->__if.mac_type == fman_offline_internal)
goto cleanup;
 
list_for_each_entry_safe(bp, tmpbp, &__if->__if.bpool_list, node) {
@@ -465,7 +465,7 @@ fman_if_init(const struct device_node *dpa_node)
__if->__if.is_memac = 0;
 
if (is_offline)
-   __if->__if.mac_type = fman_offline;
+   __if->__if.mac_type = fman_offline_internal;
else if (of_device_is_compatible(mac_node, "fsl,fman-1g-mac"))
__if->__if.mac_type = fman_mac_1g;
else if (of_device_is_compatible(mac_node, "fsl,fman-10g-mac"))
@@ -791,6 +791,292 @@ fman_if_init(const struct device_node *dpa_node)
dname, __if->__if.tx_channel_id, __if->__if.fman_idx,
__if->__if.mac_idx);
 
+   /* Don't add OH port to the port list since they will be used by ONIC
+* ports.
+*/
+   if (!is_offline)
+   list_add_tail(&__if->__if.node, &__ifs);
+
+   return 0;
+err:
+   if_destructor(__if);
+   return _errno;
+}
+
+static int fman_if_init_onic(const struct device_node *dpa_node)
+{
+   struct __fman_if *__if;
+   struct fman_if_bpool *bpool;
+   const phandle *tx_pools_phandle;
+   const phandle *tx_channel_id, *mac_addr, *cell_idx;
+   const phandle *rx_phandle;
+   const struct device_node *pool_node;
+   size_t lenp;
+   int _errno;
+   const phandle *p_onic_oh_nodes = NULL;
+   const struct device_node *rx_oh_node = NULL;
+   const struct device_node *tx_oh_node = NULL;
+   const phandle *p_fman_rx_oh_node = NULL, *p_fman_tx_oh_node = NULL;
+   const struct device_node *fman_rx_oh_node = NULL;
+   const struct device_node *fman_tx_oh_node = NULL;
+   const struct device_node *fman_node;
+   uint32_t na = OF_DEFAULT_NA;
+   uint64_t rx_phandle_host[4] = {0};
+   uint64_t cell_idx_host = 0;
+
+   if (of_device_is_available(dpa_node) == false)
+   return 0;
+
+   if (!of_device_is_compatible(dpa_node, "fsl,dpa-ethernet-generic"))
+   return 0;
+
+   /* Allocate an object for this network interface */
+   __if = rte_malloc(NULL, sizeof(*__if), RTE_CACHE_LINE_SIZE);
+   if (!__if) {
+   FMAN_ERR(-ENOMEM, "malloc(%zu)\n", sizeof(*__if));
+   goto err;
+   }
+   memset(__if, 0, sizeof(*__if));
+
+   INIT_LIST_HEAD(&__if->__if.bpool_list);
+
+   strlcpy(__if->node_name, dpa_node->name, IF_NAME_MAX_LEN - 1);
+   __if->node_name[IF_NAME_MAX_LEN - 1] = '\0';
+
+   strlcpy(__if->node_path, dpa_node->full_name, PATH_MAX - 1);
+   __if->node_path[PATH_MAX - 1] = '\0';
+
+   /* Mac node is onic */
+   __if->__if.is_memac = 0;
+   __if->__if.mac_type = fman_onic;
+
+   /* Extract the MAC address for linux peer */
+   mac_addr = of_get_property(dpa_node, "local-mac-address", &lenp);
+   if (!mac_addr) {
+   

[PATCH 16/17] net/dpaa: improve the dpaa port cleanup

2024-08-01 Thread Hemant Agrawal
From: Gagandeep Singh 

During DPAA cleanup in FMCLESS mode, application can
see segmentation fault in device close API and in DPAA
destructor execution.
Segmentation fault in device close is because driver
reducing the number of queues initialised during
device configuration without releasing the actual queues.

And segmentation fault in DPAA destruction is because
it is trying to access RTE* devices whose memory has
been released in rte_eal_cleanup() call by the application.

This patch improves the behavior.

Signed-off-by: Gagandeep Singh 
---
 drivers/net/dpaa/dpaa_ethdev.c | 35 --
 drivers/net/dpaa/dpaa_flow.c   |  8 
 2 files changed, 16 insertions(+), 27 deletions(-)

diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 56607034a9..863c1155c8 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2017-2020,2022 NXP
+ *   Copyright 2017-2020,2022-2023 NXP
  *
  */
 /* System headers */
@@ -557,10 +557,10 @@ static int dpaa_eth_dev_close(struct rte_eth_dev *dev)
if (dpaa_intf->cgr_rx) {
for (loop = 0; loop < dpaa_intf->nb_rx_queues; loop++)
qman_delete_cgr(&dpaa_intf->cgr_rx[loop]);
+   rte_free(dpaa_intf->cgr_rx);
+   dpaa_intf->cgr_rx = NULL;
}
 
-   rte_free(dpaa_intf->cgr_rx);
-   dpaa_intf->cgr_rx = NULL;
/* Release TX congestion Groups */
if (dpaa_intf->cgr_tx) {
for (loop = 0; loop < MAX_DPAA_CORES; loop++)
@@ -574,6 +574,15 @@ static int dpaa_eth_dev_close(struct rte_eth_dev *dev)
 
rte_free(dpaa_intf->tx_queues);
dpaa_intf->tx_queues = NULL;
+   if (dpaa_intf->port_handle) {
+   if (dpaa_fm_deconfig(dpaa_intf, fif))
+   DPAA_PMD_WARN("DPAA FM "
+   "deconfig failed\n");
+   }
+   if (fif->num_profiles) {
+   if (dpaa_port_vsp_cleanup(dpaa_intf, fif))
+   DPAA_PMD_WARN("DPAA FM vsp cleanup failed\n");
+   }
 
return ret;
 }
@@ -2563,26 +2572,6 @@ static void __attribute__((destructor(102))) 
dpaa_finish(void)
return;
 
if (!(default_q || fmc_q)) {
-   unsigned int i;
-
-   for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
-   if (rte_eth_devices[i].dev_ops == &dpaa_devops) {
-   struct rte_eth_dev *dev = &rte_eth_devices[i];
-   struct dpaa_if *dpaa_intf =
-   dev->data->dev_private;
-   struct fman_if *fif =
-   dev->process_private;
-   if (dpaa_intf->port_handle)
-   if (dpaa_fm_deconfig(dpaa_intf, fif))
-   DPAA_PMD_WARN("DPAA FM "
-   "deconfig failed");
-   if (fif->num_profiles) {
-   if (dpaa_port_vsp_cleanup(dpaa_intf,
- fif))
-   DPAA_PMD_WARN("DPAA FM vsp 
cleanup failed");
-   }
-   }
-   }
if (is_global_init)
if (dpaa_fm_term())
DPAA_PMD_WARN("DPAA FM term failed");
diff --git a/drivers/net/dpaa/dpaa_flow.c b/drivers/net/dpaa/dpaa_flow.c
index 810b187405..2240f8d27c 100644
--- a/drivers/net/dpaa/dpaa_flow.c
+++ b/drivers/net/dpaa/dpaa_flow.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2017-2019,2021 NXP
+ * Copyright 2017-2019,2021-2023 NXP
  */
 
 /* System headers */
@@ -812,8 +812,6 @@ int dpaa_fm_config(struct rte_eth_dev *dev, uint64_t 
req_dist_set)
return -1;
}
 
-   dpaa_intf->nb_rx_queues = dev->data->nb_rx_queues;
-
/* Open FM Port and set it in port info */
ret = set_fm_port_handle(dpaa_intf, req_dist_set, fif);
if (ret) {
@@ -822,7 +820,7 @@ int dpaa_fm_config(struct rte_eth_dev *dev, uint64_t 
req_dist_set)
}
 
if (fif->num_profiles) {
-   for (i = 0; i < dpaa_intf->nb_rx_queues; i++)
+   for (i = 0; i < dev->data->nb_rx_queues; i++)
dpaa_intf->rx_queues[i].vsp_id =
fm_default_vsp_id(fif);
 
@@ -1147,6 +1145,8 @@ int rte_pmd_dpaa_port_set_rate_limit(uint16_t port_id, 
uint16_t burst,
 
if (ret) {
DPAA_PMD_ERR("Failed to set rate limit ret = %#x\n", -ret);
+   if (!port_handle_exists)
+

[PATCH 17/17] net/dpaa: improve dpaa errata A010022 handling

2024-08-01 Thread Hemant Agrawal
From: Jun Yang 

This patch improves the errata handling for
"RTE_LIBRTE_DPAA_ERRATA_LS1043_A010022"

Signed-off-by: Jun Yang 
---
 drivers/net/dpaa/dpaa_rxtx.c | 40 
 1 file changed, 32 insertions(+), 8 deletions(-)

diff --git a/drivers/net/dpaa/dpaa_rxtx.c b/drivers/net/dpaa/dpaa_rxtx.c
index 84fd0c57a4..325785480a 100644
--- a/drivers/net/dpaa/dpaa_rxtx.c
+++ b/drivers/net/dpaa/dpaa_rxtx.c
@@ -1264,6 +1264,35 @@ reallocate_mbuf(struct qman_fq *txq, struct rte_mbuf 
*mbuf)
return new_mbufs[0];
 }
 
+#ifdef RTE_LIBRTE_DPAA_ERRATA_LS1043_A010022
+/* In case the data offset is not multiple of 16,
+ * FMAN can stall because of an errata. So reallocate
+ * the buffer in such case.
+ */
+static inline int
+dpaa_eth_ls1043a_mbuf_realloc(struct rte_mbuf *mbuf)
+{
+   uint64_t len, offset;
+
+   if (dpaa_svr_family != SVR_LS1043A_FAMILY)
+   return 0;
+
+   while (mbuf) {
+   len = mbuf->data_len;
+   offset = mbuf->data_off;
+   if ((mbuf->next &&
+   !rte_is_aligned((void *)len, 16)) ||
+   !rte_is_aligned((void *)offset, 16)) {
+   DPAA_PMD_DEBUG("Errata condition hit");
+
+   return 1;
+   }
+   mbuf = mbuf->next;
+   }
+   return 0;
+}
+#endif
+
 uint16_t
 dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs)
 {
@@ -1304,20 +1333,15 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, 
uint16_t nb_bufs)
DPAA_TX_BURST_SIZE : nb_bufs;
for (loop = 0; loop < frames_to_send; loop++) {
mbuf = *(bufs++);
-   /* In case the data offset is not multiple of 16,
-* FMAN can stall because of an errata. So reallocate
-* the buffer in such case.
-*/
-   if (dpaa_svr_family == SVR_LS1043A_FAMILY &&
-   (mbuf->data_off & 0x7F) != 0x0)
-   realloc_mbuf = 1;
-
fd_arr[loop].cmd = 0;
 #if defined(RTE_LIBRTE_IEEE1588)
fd_arr[loop].cmd |= DPAA_FD_CMD_FCO |
qman_fq_fqid(fq_txconf);
fd_arr[loop].cmd |= DPAA_FD_CMD_RPD |
DPAA_FD_CMD_UPD;
+#endif
+#ifdef RTE_LIBRTE_DPAA_ERRATA_LS1043_A010022
+   realloc_mbuf = dpaa_eth_ls1043a_mbuf_realloc(mbuf);
 #endif
seqn = *dpaa_seqn(mbuf);
if (seqn != DPAA_INVALID_MBUF_SEQN) {
-- 
2.25.1



Re: [v1 7/7] crypto/dpaa2_sec: rework debug code

2024-08-06 Thread Hemant Agrawal

Hi Gagan,

On 06-08-2024 14:11, Gagandeep Singh wrote:

From: Jun Yang 

Output debug information according to various modes.

Signed-off-by: Jun Yang 
---
  drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 63 -
  1 file changed, 48 insertions(+), 15 deletions(-)

diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c 
b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 1e28c71b53..da3bd871ba 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -1095,7 +1095,7 @@ build_auth_fd(dpaa2_sec_session *sess, struct 
rte_crypto_op *op,
  
  static int

  build_cipher_sg_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,
-   struct qbman_fd *fd, __rte_unused uint16_t bpid)
+   struct qbman_fd *fd, uint16_t bpid)
  {
struct rte_crypto_sym_op *sym_op = op->sym;
struct qbman_fle *ip_fle, *op_fle, *sge, *fle;
@@ -1105,6 +1105,10 @@ build_cipher_sg_fd(dpaa2_sec_session *sess, struct 
rte_crypto_op *op,
struct rte_mbuf *mbuf;
uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
sess->iv.offset);
+#if (RTE_LOG_DEBUG <= RTE_LOG_DP_LEVEL)
+   char debug_str[1024];
+   int offset;
+#endif
  
  	data_len = sym_op->cipher.data.length;

data_offset = sym_op->cipher.data.offset;
@@ -1210,14 +1214,26 @@ build_cipher_sg_fd(dpaa2_sec_session *sess, struct 
rte_crypto_op *op,
DPAA2_SET_FD_COMPOUND_FMT(fd);
DPAA2_SET_FD_FLC(fd, DPAA2_VADDR_TO_IOVA(flc));
  
-	DPAA2_SEC_DP_DEBUG(

-   "CIPHER SG: fdaddr =%" PRIx64 " bpid =%d meta =%d"
-   " off =%d, len =%d\n",
+#if (RTE_LOG_DEBUG <= RTE_LOG_DP_LEVEL)
+   offset = sprintf(debug_str,
+   "CIPHER SG: fdaddr =%" PRIx64 ", from %s pool ",
DPAA2_GET_FD_ADDR(fd),
-   DPAA2_GET_FD_BPID(fd),
-   rte_dpaa2_bpid_info[bpid].meta_data_size,
-   DPAA2_GET_FD_OFFSET(fd),
-   DPAA2_GET_FD_LEN(fd));
+   bpid < MAX_BPID ? "SW" : "BMAN");
+   if (bpid < MAX_BPID) {
+   offset += sprintf(&debug_str[offset],
+   "bpid = %d ", bpid);
+   }
+   offset += sprintf(&debug_str[offset],
+   "private size = %d ",
+   mbuf->pool->private_data_size);
+   offset += sprintf(&debug_str[offset],
+   "off =%d, len =%d\n",
+   DPAA2_GET_FD_OFFSET(fd), DPAA2_GET_FD_LEN(fd));
+   DPAA2_SEC_DP_DEBUG("%s", debug_str);
+#else
+   RTE_SET_USED(bpid);
+#endif
+
return 0;
  }
  
@@ -1233,6 +1249,10 @@ build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,

uint8_t *iv_ptr = rte_crypto_op_ctod_offset(op, uint8_t *,
sess->iv.offset);
struct rte_mbuf *dst;
+#if (RTE_LOG_DEBUG <= RTE_LOG_DP_LEVEL)
+   char debug_str[1024];
+   int offset;
+#endif
  
  	data_len = sym_op->cipher.data.length;

data_offset = sym_op->cipher.data.offset;
@@ -1324,14 +1344,23 @@ build_cipher_fd(dpaa2_sec_session *sess, struct 
rte_crypto_op *op,
DPAA2_SET_FLE_FIN(sge);
DPAA2_SET_FLE_FIN(fle);
  
-	DPAA2_SEC_DP_DEBUG(

-   "CIPHER: fdaddr =%" PRIx64 " bpid =%d meta =%d"
-   " off =%d, len =%d\n",
+#if (RTE_LOG_DEBUG <= RTE_LOG_DP_LEVEL)
+   offset = sprintf(debug_str,
+   "CIPHER: fdaddr =%" PRIx64 ", from %s pool ",
DPAA2_GET_FD_ADDR(fd),
-   DPAA2_GET_FD_BPID(fd),
-   rte_dpaa2_bpid_info[bpid].meta_data_size,
-   DPAA2_GET_FD_OFFSET(fd),
-   DPAA2_GET_FD_LEN(fd));
+   bpid < MAX_BPID ? "SW" : "BMAN");
+   if (bpid < MAX_BPID) {
+   offset += sprintf(&debug_str[offset],
+   "bpid = %d ", bpid);
+   }
+   offset += sprintf(&debug_str[offset],
+   "private size = %d ",
+   dst->pool->private_data_size);
+   offset += sprintf(&debug_str[offset],
+   "off =%d, len =%d\n",
+   DPAA2_GET_FD_OFFSET(fd), DPAA2_GET_FD_LEN(fd));
+   DPAA2_SEC_DP_DEBUG("%s", debug_str);
+#endif
  
  	return 0;

  }
@@ -1564,6 +1593,10 @@ sec_fd_to_mbuf(const struct qbman_fd *fd, struct 
dpaa2_sec_qp *qp)
struct qbman_fle *fle;
struct rte_crypto_op *op;
struct rte_mbuf *dst, *src;
+#if (RTE_LOG_DEBUG <= RTE_LOG_DP_LEVEL)
+   char debug_str[1024];
+   int offset;
+#endif


you have defined these variables but not used?  have you missed 
something in this patch?



  
  	if (DPAA2_FD_GET_FORMAT(fd) == qbman_fd_single)

return sec_simple_fd_to_mbuf(fd);


Re: [v1 5/7] net/dpaa2: support FLC stashing API

2024-08-06 Thread Hemant Agrawal

Hi Gagan,


I think this patch shall come before the 4th patch:   [v1 4/7] 
crypto/dpaa2_sec: enhance pdcp FLC handling



- Hemant


On 06-08-2024 14:11, Gagandeep Singh wrote:

From: Jun Yang 

Configure flow steering action with FLC enabled to align stashing
setting with RSS configuration.

Signed-off-by: Jun Yang 
Acked-by: Hemant Agrawal 
---
  drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 44 +
  drivers/net/dpaa2/dpaa2_ethdev.c| 25 +++---
  2 files changed, 58 insertions(+), 11 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h 
b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 169c7917ea..4c30e6db18 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -179,6 +179,7 @@ struct __rte_cache_aligned dpaa2_queue {
uint16_t resv;
uint64_t offloads;
uint64_t lpbk_cntx;
+   uint8_t data_stashing_off;
  };
  
  struct swp_active_dqs {

@@ -463,6 +464,49 @@ struct qbman_result *get_swp_active_dqs(uint16_t 
dpio_index)
return rte_global_active_dqs_list[dpio_index].global_active_dqs;
  }
  
+/* 00 00 00 - last 6 bit represent data, annotation,

+ * context stashing setting 01 01 00 (0x14)
+ * (in following order ->DS AS CS)
+ * to enable 1 line data, 1 line annotation.
+ * For LX2, this setting should be 01 00 00 (0x10)
+ */
+#define DPAA2_FLC_STASHING_MAX_BIT_SIZE 2
+#define DPAA2_FLC_STASHING_MAX_CACHE_LINE \
+   ((1ULL << DPAA2_FLC_STASHING_MAX_BIT_SIZE) - 1)
+
+enum dpaa2_flc_stashing_type {
+   DPAA2_FLC_CNTX_STASHING = 0,
+   DPAA2_FLC_ANNO_STASHING =
+   DPAA2_FLC_CNTX_STASHING + DPAA2_FLC_STASHING_MAX_BIT_SIZE,
+   DPAA2_FLC_DATA_STASHING =
+   DPAA2_FLC_ANNO_STASHING + DPAA2_FLC_STASHING_MAX_BIT_SIZE,
+   DPAA2_FLC_END_STASHING =
+   DPAA2_FLC_DATA_STASHING + DPAA2_FLC_STASHING_MAX_BIT_SIZE
+};
+
+#define DPAA2_STASHING_ALIGN_SIZE (1 << DPAA2_FLC_END_STASHING)
+
+static inline void
+dpaa2_flc_stashing_set(enum dpaa2_flc_stashing_type type,
+   uint8_t cache_line, uint64_t *flc)
+{
+   RTE_ASSERT(cache_line <= DPAA2_FLC_STASHING_MAX_CACHE_LINE);
+   RTE_ASSERT(type == DPAA2_FLC_CNTX_STASHING ||
+   type == DPAA2_FLC_ANNO_STASHING ||
+   type == DPAA2_FLC_DATA_STASHING);
+
+   (*flc) &= ~(DPAA2_FLC_STASHING_MAX_CACHE_LINE << type);
+   (*flc) |= (cache_line << type);
+}
+
+static inline void
+dpaa2_flc_stashing_clear_all(uint64_t *flc)
+{
+   dpaa2_flc_stashing_set(DPAA2_FLC_CNTX_STASHING, 0, flc);
+   dpaa2_flc_stashing_set(DPAA2_FLC_ANNO_STASHING, 0, flc);
+   dpaa2_flc_stashing_set(DPAA2_FLC_DATA_STASHING, 0, flc);
+}
+
  static inline
  void set_swp_active_dqs(uint16_t dpio_index, struct qbman_result *dqs)
  {
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 449bbda7ca..726bc0cf3e 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -786,17 +786,20 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
if ((dpaa2_svr_family & 0x) != SVR_LS2080A) {
options |= DPNI_QUEUE_OPT_FLC;
cfg.flc.stash_control = true;
-   cfg.flc.value &= 0xFFC0;
-   /* 00 00 00 - last 6 bit represent annotation, context stashing,
-* data stashing setting 01 01 00 (0x14)
-* (in following order ->DS AS CS)
-* to enable 1 line data, 1 line annotation.
-* For LX2, this setting should be 01 00 00 (0x10)
-*/
-   if ((dpaa2_svr_family & 0x) == SVR_LX2160A)
-   cfg.flc.value |= 0x10;
-   else
-   cfg.flc.value |= 0x14;
+   dpaa2_flc_stashing_clear_all(&cfg.flc.value);
+   if (getenv("DPAA2_DATA_STASHING_OFF")) {
+   dpaa2_flc_stashing_set(DPAA2_FLC_DATA_STASHING, 0,
+   &cfg.flc.value);
+   dpaa2_q->data_stashing_off = 1;
+   } else {
+   dpaa2_flc_stashing_set(DPAA2_FLC_DATA_STASHING, 1,
+   &cfg.flc.value);
+   dpaa2_q->data_stashing_off = 0;
+   }
+   if ((dpaa2_svr_family & 0x) != SVR_LX2160A) {
+   dpaa2_flc_stashing_set(DPAA2_FLC_ANNO_STASHING, 1,
+   &cfg.flc.value);
+   }
}
ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
 dpaa2_q->tc_index, flow_id, options, &cfg);


Re: [PATCH 00/17] NXP DPAA ETH driver enhancement and fixes

2024-08-08 Thread Hemant Agrawal



On 07-08-2024 21:12, Ferruh Yigit wrote:

On 8/1/2024 11:52 AM, Hemant Agrawal wrote:

This series adds several enhancement to the NXP DPAA Ethernet driver.

Primarily:
1. timestamp and IEEE 1588 support
2. OH and ONIC based virtual port config in DPAA
3. frame display and debugging infra

Gagandeep Singh (3):
   bus/dpaa: fix PFDRs leaks due to FQRNIs
   net/dpaa: support mempool debug
   net/dpaa: improve the dpaa port cleanup

Hemant Agrawal (4):
   bus/dpaa: fix VSP for 1G fm1-mac9 and 10
   bus/dpaa: add port buffer manager stats
   net/dpaa: implement detailed packet parsing
   net/dpaa: enhance DPAA frame display

Jun Yang (2):
   net/dpaa: share MAC FMC scheme and CC parse
   net/dpaa: improve dpaa errata A010022 handling

Rohit Raj (3):
   net/dpaa: fix typecasting ch ID to u32
   bus/dpaa: add OH port mode for dpaa eth
   bus/dpaa: add ONIC port mode for the DPAA eth

Vanshika Shukla (4):
   net/dpaa: support Tx confirmation to enable PTP
   net/dpaa: add support to separate Tx conf queues
   net/dpaa: support Rx/Tx timestamp read
   net/dpaa: support IEEE 1588 PTP

Vinod Pullabhatla (1):
   net/dpaa: add Tx rate limiting DPAA PMD API


There are some new features in this series, it can be good to add
release note update for those.
(But please not as a separate doc update, but each patch adding a
feature can update the document.)


Hi Ferruh,

    Thanks for the detailed review. We will re-work as advised.


Regards,

Hemant




Re: [PATCH v2 0/3] bbdev: sdditional queue stats

2024-08-13 Thread Hemant Agrawal

Series-

Acked-by: Hemant Agrawal 


On 13-08-2024 05:11, Nicolas Chautru wrote:

v2: update to ABI doc suggested by Maxime.

  These series include introducing a new paramter in the queue stat
which can be used to monitor the number of available enqueue
still possible.
The acc PMD is then refactored to use a set of common function
to update several queue status parameters including the new one.
The application is also updated.
Thanks
Nic

Nicolas Chautru (3):
   bbdev: new queue stat for available enqueue depth
   baseband/acc: refactor queue status update
   test/bbdev: update for queue stats

  app/test-bbdev/test_bbdev_perf.c   |  1 +
  doc/guides/rel_notes/release_24_11.rst |  3 ++
  drivers/baseband/acc/acc_common.h  | 18 
  drivers/baseband/acc/rte_acc100_pmd.c  | 45 ++-
  drivers/baseband/acc/rte_vrb_pmd.c | 61 --
  lib/bbdev/rte_bbdev.h  |  2 +
  6 files changed, 56 insertions(+), 74 deletions(-)



[PATCH v2 00/18] NXP DPAA ETH driver enhancement and fixes

2024-08-23 Thread Hemant Agrawal
v2: address review comments
 - improve commit message
 - add documentarion for new functions
 - make IEEE1588 config runtime

This series adds several enhancement to the NXP DPAA Ethernet driver.

Primarily:
1. timestamp and IEEE 1588 support
2. OH and ONIC based virtual port config in DPAA
3. frame display and debugging infra

Gagandeep Singh (3):
  bus/dpaa: fix PFDRs leaks due to FQRNIs
  net/dpaa: support mempool debug
  net/dpaa: improve the dpaa port cleanup

Hemant Agrawal (5):
  bus/dpaa: fix VSP for 1G fm1-mac9 and 10
  bus/dpaa: fix the fman details status
  bus/dpaa: add port buffer manager stats
  net/dpaa: implement detailed packet parsing
  net/dpaa: enhance DPAA frame display

Jun Yang (2):
  net/dpaa: share MAC FMC scheme and CC parse
  net/dpaa: improve dpaa errata A010022 handling

Rohit Raj (3):
  net/dpaa: fix typecasting ch ID to u32
  bus/dpaa: add OH port mode for dpaa eth
  bus/dpaa: add ONIC port mode for the DPAA eth

Vanshika Shukla (4):
  net/dpaa: support Tx confirmation to enable PTP
  net/dpaa: add support to separate Tx conf queues
  net/dpaa: support Rx/Tx timestamp read
  net/dpaa: support IEEE 1588 PTP

Vinod Pullabhatla (1):
  net/dpaa: add Tx rate limiting DPAA PMD API

 .mailmap  |   1 +
 doc/guides/nics/dpaa.rst  |  64 ++-
 doc/guides/nics/features/dpaa.ini |   3 +
 drivers/bus/dpaa/base/fman/fman.c | 583 +++---
 drivers/bus/dpaa/base/fman/fman_hw.c  | 102 +++-
 drivers/bus/dpaa/base/fman/netcfg_layer.c |  19 +-
 drivers/bus/dpaa/base/qbman/qman.c|  46 +-
 drivers/bus/dpaa/dpaa_bus.c   |  31 +-
 drivers/bus/dpaa/include/fman.h   | 112 -
 drivers/bus/dpaa/include/fsl_fman.h   |  12 +
 drivers/bus/dpaa/include/fsl_qman.h   |   4 +-
 drivers/bus/dpaa/version.map  |   4 +
 drivers/net/dpaa/dpaa_ethdev.c| 428 +---
 drivers/net/dpaa/dpaa_ethdev.h|  68 ++-
 drivers/net/dpaa/dpaa_flow.c  | 150 --
 drivers/net/dpaa/dpaa_fmc.c   | 421 ++--
 drivers/net/dpaa/dpaa_ptp.c   | 119 +
 drivers/net/dpaa/dpaa_rxtx.c  | 376 --
 drivers/net/dpaa/dpaa_rxtx.h  | 152 +++---
 drivers/net/dpaa/fmlib/fm_lib.c   |  32 +-
 drivers/net/dpaa/fmlib/fm_port_ext.h  |   2 +-
 drivers/net/dpaa/meson.build  |   1 +
 drivers/net/dpaa/rte_pmd_dpaa.h   |  25 +-
 drivers/net/dpaa/version.map  |   7 +
 24 files changed, 2250 insertions(+), 512 deletions(-)
 create mode 100644 drivers/net/dpaa/dpaa_ptp.c

-- 
2.25.1



[PATCH v2 01/18] bus/dpaa: fix PFDRs leaks due to FQRNIs

2024-08-23 Thread Hemant Agrawal
From: Gagandeep Singh 

When a Retire FQ command is executed on a FQ in the
Tentatively Scheduled or Parked states, in that case FQ
is retired immediately and a FQRNI (Frame Queue Retirement
Notification Immediate) message is generated. Software
must read this message from MR and consume it to free
the memory used by it.

Although it is not mentioned about which memory to be used
by FQRNIs in the RM but through experiments it is proven
that it can use PFDRs. So if these messages are allowed to
build up indefinitely then PFDR resources can become exhausted
and cause enqueues to stall. Therefore software must consume
these MR messages on a regular basis to avoid depleting
the available PFDR resources.

This is the PFDRs leak issue which user can experienace while
using the DPDK crypto driver and creating and destroying the
sessions multiple times. On a session destroy, DPDK calls the
qman_retire_fq() for each FQ used by the session, but it does
not handle the FQRNIs generated and allowed them to build up
indefinitely in MR.

This patch fixes this issue by consuming the FQRNIs received
from MR immediately after FQ retire by calling drain_mr_fqrni().

Please note that this drain_mr_fqrni() only look for
FQRNI type messages to consume. If there are other type of messages
like FQRN, FQRL, FQPN, ERN etc. also coming on MR then those
messages need to be handled separately.

Fixes: c47ff048b99a ("bus/dpaa: add QMAN driver core routines")
Cc: sta...@dpdk.org

Signed-off-by: Gagandeep Singh 
---
 drivers/bus/dpaa/base/qbman/qman.c | 46 --
 1 file changed, 25 insertions(+), 21 deletions(-)

diff --git a/drivers/bus/dpaa/base/qbman/qman.c 
b/drivers/bus/dpaa/base/qbman/qman.c
index 301057723e..9c90ee25a6 100644
--- a/drivers/bus/dpaa/base/qbman/qman.c
+++ b/drivers/bus/dpaa/base/qbman/qman.c
@@ -292,10 +292,32 @@ static inline void qman_stop_dequeues_ex(struct 
qman_portal *p)
qm_dqrr_set_maxfill(&p->p, 0);
 }
 
+static inline void qm_mr_pvb_update(struct qm_portal *portal)
+{
+   register struct qm_mr *mr = &portal->mr;
+   const struct qm_mr_entry *res = qm_cl(mr->ring, mr->pi);
+
+#ifdef RTE_LIBRTE_DPAA_HWDEBUG
+   DPAA_ASSERT(mr->pmode == qm_mr_pvb);
+#endif
+   /* when accessing 'verb', use __raw_readb() to ensure that compiler
+* inlining doesn't try to optimise out "excess reads".
+*/
+   if ((__raw_readb(&res->ern.verb) & QM_MR_VERB_VBIT) == mr->vbit) {
+   mr->pi = (mr->pi + 1) & (QM_MR_SIZE - 1);
+   if (!mr->pi)
+   mr->vbit ^= QM_MR_VERB_VBIT;
+   mr->fill++;
+   res = MR_INC(res);
+   }
+   dcbit_ro(res);
+}
+
 static int drain_mr_fqrni(struct qm_portal *p)
 {
const struct qm_mr_entry *msg;
 loop:
+   qm_mr_pvb_update(p);
msg = qm_mr_current(p);
if (!msg) {
/*
@@ -317,6 +339,7 @@ static int drain_mr_fqrni(struct qm_portal *p)
do {
now = mfatb();
} while ((then + 1) > now);
+   qm_mr_pvb_update(p);
msg = qm_mr_current(p);
if (!msg)
return 0;
@@ -479,27 +502,6 @@ static inline int qm_mr_init(struct qm_portal *portal,
return 0;
 }
 
-static inline void qm_mr_pvb_update(struct qm_portal *portal)
-{
-   register struct qm_mr *mr = &portal->mr;
-   const struct qm_mr_entry *res = qm_cl(mr->ring, mr->pi);
-
-#ifdef RTE_LIBRTE_DPAA_HWDEBUG
-   DPAA_ASSERT(mr->pmode == qm_mr_pvb);
-#endif
-   /* when accessing 'verb', use __raw_readb() to ensure that compiler
-* inlining doesn't try to optimise out "excess reads".
-*/
-   if ((__raw_readb(&res->ern.verb) & QM_MR_VERB_VBIT) == mr->vbit) {
-   mr->pi = (mr->pi + 1) & (QM_MR_SIZE - 1);
-   if (!mr->pi)
-   mr->vbit ^= QM_MR_VERB_VBIT;
-   mr->fill++;
-   res = MR_INC(res);
-   }
-   dcbit_ro(res);
-}
-
 struct qman_portal *
 qman_init_portal(struct qman_portal *portal,
   const struct qm_portal_config *c,
@@ -1794,6 +1796,8 @@ int qman_retire_fq(struct qman_fq *fq, u32 *flags)
}
 out:
FQUNLOCK(fq);
+   /* Draining FQRNIs, if any */
+   drain_mr_fqrni(&p->p);
return rval;
 }
 
-- 
2.25.1



[PATCH v2 02/18] net/dpaa: fix typecasting ch ID to u32

2024-08-23 Thread Hemant Agrawal
From: Rohit Raj 

Avoid typecasting ch_id to u32 and passing it to another API since it
can corrupt other data. Instead, create new u32 variable and typecase
it back to u16 after it gets updated by the API.

Fixes: 0c504f6950b6 ("net/dpaa: support push mode")
Cc: hemant.agra...@nxp.com
Cc: sta...@dpdk.org

Signed-off-by: Rohit Raj 
---
 drivers/net/dpaa/dpaa_ethdev.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 060b8c678f..1a2de5240f 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -972,7 +972,7 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, 
uint16_t queue_idx,
struct fman_if *fif = dev->process_private;
struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_idx];
struct qm_mcc_initfq opts = {0};
-   u32 flags = 0;
+   u32 ch_id, flags = 0;
int ret;
u32 buffsz = rte_pktmbuf_data_room_size(mp) - RTE_PKTMBUF_HEADROOM;
uint32_t max_rx_pktlen;
@@ -1096,7 +1096,9 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, 
uint16_t queue_idx,
DPAA_IF_RX_CONTEXT_STASH;
 
/*Create a channel and associate given queue with the channel*/
-   qman_alloc_pool_range((u32 *)&rxq->ch_id, 1, 1, 0);
+   qman_alloc_pool_range(&ch_id, 1, 1, 0);
+   rxq->ch_id = (u16)ch_id;
+
opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
opts.fqd.dest.channel = rxq->ch_id;
opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY;
-- 
2.25.1



  1   2   3   4   5   6   7   8   9   10   >