Re: [PATCH v3] config/arm: add Ampere AmpereOneX platform
On 2024/6/27 10:44 AM, Yutang Jiang wrote: Signed-off-by: Yutang Jiang --- config/arm/arm64_ampereonex_linux_gcc | 17 + config/arm/meson.build| 19 +++ 2 files changed, 36 insertions(+) create mode 100644 config/arm/arm64_ampereonex_linux_gcc Acked-by: Ruifeng Wang
[PATCH v3] config/arm: add Ampere AmpereOneX platform
Signed-off-by: Yutang Jiang
---
config/arm/arm64_ampereonex_linux_gcc | 17 +
config/arm/meson.build| 19 +++
2 files changed, 36 insertions(+)
create mode 100644 config/arm/arm64_ampereonex_linux_gcc
diff --git a/config/arm/arm64_ampereonex_linux_gcc
b/config/arm/arm64_ampereonex_linux_gcc
new file mode 100644
index 00..ac95653a6c
--- /dev/null
+++ b/config/arm/arm64_ampereonex_linux_gcc
@@ -0,0 +1,17 @@
+[binaries]
+c = ['ccache', 'aarch64-linux-gnu-gcc']
+cpp = ['ccache', 'aarch64-linux-gnu-g++']
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pkg-config = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8.6-a'
+endian = 'little'
+
+[properties]
+platform = 'ampereonex'
diff --git a/config/arm/meson.build b/config/arm/meson.build
index a45aa9e466..40d63b5e4b 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -210,6 +210,16 @@ implementer_ampere = {
['RTE_MAX_LCORE', 320],
['RTE_MAX_NUMA_NODES', 8]
]
+},
+'0xac4': {
+'march': 'armv8.6-a',
+'march_features': ['crc', 'crypto'],
+'mcpu': 'ampere1a',
+'flags': [
+['RTE_MACHINE', '"AmpereOneX"'],
+['RTE_MAX_LCORE', 384],
+['RTE_MAX_NUMA_NODES', 8]
+]
}
}
}
@@ -371,6 +381,13 @@ soc_ampereone = {
'numa': true
}
+soc_ampereonex = {
+'description': 'Ampere AmpereOneX',
+'implementer': '0xc0',
+'part_number': '0xac4',
+'numa': true
+}
+
soc_armada = {
'description': 'Marvell ARMADA',
'implementer': '0x41',
@@ -621,6 +638,7 @@ generic: Generic un-optimized build for armv8
aarch64 execution mode.
generic_aarch32: Generic un-optimized build for armv8 aarch32 execution mode.
altra: Ampere Altra/AltraMax
ampereone: Ampere AmpereOne
+ampereonex: Ampere AmpereOneX
armada: Marvell ARMADA
bluefield: NVIDIA BlueField
bluefield3: NVIDIA BlueField-3
@@ -658,6 +676,7 @@ socs = {
'generic_aarch32': soc_generic_aarch32,
'altra': soc_altra,
'ampereone': soc_ampereone,
+'ampereonex': soc_ampereonex,
'armada': soc_armada,
'bluefield': soc_bluefield,
'bluefield3': soc_bluefield3,
--
2.43.0
[PATCH v5 03/23] net/ntnic: add minimal initialization for PCI device
add implementation for probe/init and remove/deinit of the PCI device
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/ntnic_ethdev.c | 104 ++-
1 file changed, 103 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ntnic/ntnic_ethdev.c b/drivers/net/ntnic/ntnic_ethdev.c
index 3079bd98e4..e9a584877f 100644
--- a/drivers/net/ntnic/ntnic_ethdev.c
+++ b/drivers/net/ntnic/ntnic_ethdev.c
@@ -17,14 +17,63 @@
/* Global static variables: */
static int
-nthw_pci_dev_init(struct rte_pci_device *pci_dev __rte_unused)
+nthw_pci_dev_init(struct rte_pci_device *pci_dev)
{
+ uint32_t n_port_mask = -1; /* All ports enabled by default */
+ int n_phy_ports;
+ NT_LOG_DBGX(DEBUG, NTNIC, "Dev %s PF #%i Init : %02x:%02x:%i\n",
pci_dev->name,
+ pci_dev->addr.function, pci_dev->addr.bus, pci_dev->addr.devid,
+ pci_dev->addr.function);
+
+ n_phy_ports = 0;
+
+ for (int n_intf_no = 0; n_intf_no < n_phy_ports; n_intf_no++) {
+ struct rte_eth_dev *eth_dev = NULL;
+ char name[32];
+
+ if ((1 << n_intf_no) & ~n_port_mask)
+ continue;
+
+ snprintf(name, sizeof(name), "ntnic%d", n_intf_no);
+
+ eth_dev = rte_eth_dev_allocate(name); /* TODO: name */
+
+ if (!eth_dev) {
+ NT_LOG_DBGX(ERR, NTNIC, "%s: %s: error=%d\n",
+ (pci_dev->name[0] ? pci_dev->name : "NA"),
name, -1);
+ return -1;
+ }
+
+ NT_LOG_DBGX(DEBUG, NTNIC, "eth_dev %p, port_id %u, if_index
%u\n",
+ eth_dev, eth_dev->data->port_id,
n_intf_no);
+
+
+ struct rte_eth_link pmd_link;
+ pmd_link.link_speed = RTE_ETH_SPEED_NUM_NONE;
+ pmd_link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
+ pmd_link.link_status = RTE_ETH_LINK_DOWN;
+ pmd_link.link_autoneg = RTE_ETH_LINK_AUTONEG;
+
+ eth_dev->device = &pci_dev->device;
+ eth_dev->data->dev_link = pmd_link;
+ eth_dev->data->numa_node = pci_dev->device.numa_node;
+ eth_dev->dev_ops = NULL;
+ eth_dev->state = RTE_ETH_DEV_ATTACHED;
+
+ rte_eth_copy_pci_info(eth_dev, pci_dev);
+ /* performs rte_eth_copy_pci_info() */
+ eth_dev_pci_specific_init(eth_dev, pci_dev);
+
+ /* increase initialized ethernet devices - PF */
+ }
+
return 0;
}
static int
nthw_pci_dev_deinit(struct rte_eth_dev *eth_dev __rte_unused)
{
+ NT_LOG_DBGX(DEBUG, NTNIC, "PCI device deinitialization\n");
return 0;
}
@@ -33,13 +82,65 @@ nthw_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
struct rte_pci_device *pci_dev)
{
int res;
+
+ NT_LOG_DBGX(DEBUG, NTNIC, "pcidev: name: '%s'\n", pci_dev->name);
+ NT_LOG_DBGX(DEBUG, NTNIC, "devargs: name: '%s'\n",
pci_dev->device.name);
+
+ if (pci_dev->device.devargs) {
+ NT_LOG_DBGX(DEBUG, NTNIC, "devargs: args: '%s'\n",
+ (pci_dev->device.devargs->args ?
pci_dev->device.devargs->args : "NULL"));
+ NT_LOG_DBGX(DEBUG, NTNIC, "devargs: data: '%s'\n",
+ (pci_dev->device.devargs->data ?
pci_dev->device.devargs->data : "NULL"));
+ }
+
+ const int n_rte_has_pci = rte_eal_has_pci();
+ NT_LOG(DBG, NTNIC, "has_pci=%d\n", n_rte_has_pci);
+
+ if (n_rte_has_pci == 0) {
+ NT_LOG(ERR, NTNIC, "has_pci=%d: this PMD needs hugepages\n",
n_rte_has_pci);
+ return -1;
+ }
+
+ const int n_rte_vfio_no_io_mmu_enabled = rte_vfio_noiommu_is_enabled();
+ NT_LOG(DBG, NTNIC, "vfio_no_iommu_enabled=%d\n",
n_rte_vfio_no_io_mmu_enabled);
+
+ if (n_rte_vfio_no_io_mmu_enabled) {
+ NT_LOG(ERR, NTNIC, "vfio_no_iommu_enabled=%d: this PMD needs
VFIO IOMMU\n",
+ n_rte_vfio_no_io_mmu_enabled);
+ return -1;
+ }
+
+ const enum rte_iova_mode n_rte_io_va_mode = rte_eal_iova_mode();
+ NT_LOG(DBG, NTNIC, "iova mode=%d\n", n_rte_io_va_mode);
+
+ if (n_rte_io_va_mode != RTE_IOVA_PA) {
+ NT_LOG(WRN, NTNIC, "iova mode (%d) should be PA for performance
reasons\n",
+ n_rte_io_va_mode);
+ }
+
+ NT_LOG(DBG, NTNIC,
+ "busid=" PCI_PRI_FMT
+ " pciid=%04x:%04x_%04x:%04x locstr=%s @ numanode=%d: drv=%s
drvalias=%s\n",
+ pci_dev->addr.domain, pci_dev->addr.bus, pci_dev->addr.devid,
+ pci_dev->addr.function, pci_dev->id.vendor_id,
pci_dev->id.device_id,
+ pci_dev->id.subsystem_vendor_id,
pci_dev->id.subsystem_device_id,
+ pci_dev->name[0] ? pci_dev->name : "NA",/* locstr */
+ pci_dev->device.numa_node,
+
[PATCH v5 01/23] net/ntnic: add ethdev and makes PMD available
Add ntnic ethdev base implementation
Signed-off-by: Serhii Iliushyk
---
.mailmap | 1 +
MAINTAINERS| 7
doc/guides/nics/features/ntnic.ini | 9 +
doc/guides/nics/index.rst | 1 +
doc/guides/nics/ntnic.rst | 43
drivers/net/meson.build| 1 +
drivers/net/ntnic/meson.build | 24 ++
drivers/net/ntnic/ntnic_ethdev.c | 53 ++
8 files changed, 139 insertions(+)
create mode 100644 doc/guides/nics/features/ntnic.ini
create mode 100644 doc/guides/nics/ntnic.rst
create mode 100644 drivers/net/ntnic/meson.build
create mode 100644 drivers/net/ntnic/ntnic_ethdev.c
diff --git a/.mailmap b/.mailmap
index 6b396107d0..42c4d1473d 100644
--- a/.mailmap
+++ b/.mailmap
@@ -1289,6 +1289,7 @@ Sergey Madaminov
Sergey Mironov
Sergey Temerkhanov
Sergio Gonzalez Monroy
+Serhii Iliushyk
Seth Arnold
Seth Howell
Shachar Beiser
diff --git a/MAINTAINERS b/MAINTAINERS
index c9adff9846..d640ff88b5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -857,6 +857,13 @@ F: drivers/net/octeon_ep/
F: doc/guides/nics/features/octeon_ep.ini
F: doc/guides/nics/octeon_ep.rst
+Napatech ntnic
+M: Christian Koue Muf
+M: Serhii Iliushyk
+F: drivers/net/ntnic/
+F: doc/guides/nics/ntnic.rst
+F: doc/guides/nics/features/ntnic.ini
+
NVIDIA mlx4
M: Matan Azrad
M: Viacheslav Ovsiienko
diff --git a/doc/guides/nics/features/ntnic.ini
b/doc/guides/nics/features/ntnic.ini
new file mode 100644
index 00..25abc6df89
--- /dev/null
+++ b/doc/guides/nics/features/ntnic.ini
@@ -0,0 +1,9 @@
+;
+; Supported features of the 'ntnic' network poll mode driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Link status = Y
+Linux= Y
+x86-64 = Y
diff --git a/doc/guides/nics/index.rst b/doc/guides/nics/index.rst
index 7bfcac880f..c14bc7988a 100644
--- a/doc/guides/nics/index.rst
+++ b/doc/guides/nics/index.rst
@@ -53,6 +53,7 @@ Network Interface Controller Drivers
nfb
nfp
ngbe
+ntnic
null
octeon_ep
octeontx
diff --git a/doc/guides/nics/ntnic.rst b/doc/guides/nics/ntnic.rst
new file mode 100644
index 00..68996eac35
--- /dev/null
+++ b/doc/guides/nics/ntnic.rst
@@ -0,0 +1,43 @@
+.. SPDX-License-Identifier: BSD-3-Clause
+Copyright(c) 2023 Napatech A/S
+
+NTNIC Poll Mode Driver
+==
+
+The NTNIC PMD provides poll mode driver support for Napatech smartNICs.
+
+
+Design
+--
+
+The NTNIC PMD is designed as a pure user-space driver, and requires no special
+Napatech kernel modules.
+
+The Napatech smartNIC presents one control PCI device (PF0). NTNIC PMD accesses
+smartNIC PF0 via vfio-pci kernel driver. Access to PF0 for all purposes is
+exclusive, so only one process should access it. The physical ports are located
+behind PF0 as DPDK port 0 and 1.
+
+
+Supported NICs
+--
+
+- NT200A02 2x100G SmartNIC
+
+- FPGA ID 9563 (Inline Flow Management)
+
+
+Features
+
+
+- Link state information.
+
+
+Limitations
+~~~
+
+Kernel versions before 5.7 are not supported. Kernel version 5.7 added vfio-pci
+support for creating VFs from the PF which is required for the PMD to use
+vfio-pci on the PF. This support has been back-ported to older Linux
+distributions and they are also supported. If vfio-pci is not required kernel
+version 4.18 is supported.
diff --git a/drivers/net/meson.build b/drivers/net/meson.build
index bd38b533c5..fb6d34b782 100644
--- a/drivers/net/meson.build
+++ b/drivers/net/meson.build
@@ -45,6 +45,7 @@ drivers = [
'nfb',
'nfp',
'ngbe',
+'ntnic',
'null',
'octeontx',
'octeon_ep',
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
new file mode 100644
index 00..227949eacb
--- /dev/null
+++ b/drivers/net/ntnic/meson.build
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2020-2023 Napatech A/S
+
+if not is_linux or not dpdk_conf.has('RTE_ARCH_X86_64')
+build = false
+reason = 'only supported on x86_64 Linux'
+subdir_done()
+endif
+
+# cflags
+cflags += [
+'-std=c11',
+]
+
+# includes
+includes = [
+include_directories('.'),
+]
+
+# all sources
+sources = files(
+'ntnic_ethdev.c',
+)
+# END
diff --git a/drivers/net/ntnic/ntnic_ethdev.c b/drivers/net/ntnic/ntnic_ethdev.c
new file mode 100644
index 00..9cc727ac4b
--- /dev/null
+++ b/drivers/net/ntnic/ntnic_ethdev.c
@@ -0,0 +1,53 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+/* Global static variables: */
+
+static int
+nthw_pci_dev_init(struct rte_pci_device *pci_dev __rte_unused)
+{
+ return 0;
+}
+
+static int
+nthw_pci_dev_deinit(struct rte_eth_dev *eth_dev __rte_unused)
+{
+
[PATCH v5 05/23] net/ntnic: add VFIO module
Add ntnic VFIO functionality.
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/meson.build | 1 +
drivers/net/ntnic/ntnic_ethdev.c | 20 +-
drivers/net/ntnic/ntnic_vfio.c | 235 +
drivers/net/ntnic/ntnic_vfio.h | 29 +++
drivers/net/ntnic/ntutil/include/nt_util.h | 15 ++
drivers/net/ntnic/ntutil/nt_util.c | 65 ++
6 files changed, 362 insertions(+), 3 deletions(-)
create mode 100644 drivers/net/ntnic/ntnic_vfio.c
create mode 100644 drivers/net/ntnic/ntnic_vfio.h
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index d364cf8621..145f586a92 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -23,6 +23,7 @@ includes = [
sources = files(
'ntlog/ntlog.c',
'ntutil/nt_util.c',
+'ntnic_vfio.c',
'ntnic_ethdev.c',
)
# END
diff --git a/drivers/net/ntnic/ntnic_ethdev.c b/drivers/net/ntnic/ntnic_ethdev.c
index c9726343a1..a4e32c30fa 100644
--- a/drivers/net/ntnic/ntnic_ethdev.c
+++ b/drivers/net/ntnic/ntnic_ethdev.c
@@ -8,25 +8,37 @@
#include
#include
#include
-#include
-#include
-#include
#include "ntlog.h"
+#include "ntnic_vfio.h"
#include "nt_util.h"
+#define EXCEPTION_PATH_HID 0
+
/* Global static variables: */
static int
nthw_pci_dev_init(struct rte_pci_device *pci_dev)
{
+ nt_vfio_init();
+
uint32_t n_port_mask = -1; /* All ports enabled by default */
int n_phy_ports;
NT_LOG_DBGX(DEBUG, NTNIC, "Dev %s PF #%i Init : %02x:%02x:%i\n",
pci_dev->name,
pci_dev->addr.function, pci_dev->addr.bus, pci_dev->addr.devid,
pci_dev->addr.function);
+
+ /* Setup VFIO context */
+ int vfio = nt_vfio_setup(pci_dev);
+
+ if (vfio < 0) {
+ NT_LOG_DBGX(ERR, TNIC, "%s: vfio_setup error %d\n",
+ (pci_dev->name[0] ? pci_dev->name : "NA"), -1);
+ return -1;
+ }
+
n_phy_ports = 0;
for (int n_intf_no = 0; n_intf_no < n_phy_ports; n_intf_no++) {
@@ -76,6 +88,7 @@ static int
nthw_pci_dev_deinit(struct rte_eth_dev *eth_dev __rte_unused)
{
NT_LOG_DBGX(DEBUG, NTNIC, "PCI device deinitialization\n");
+ nt_vfio_remove(EXCEPTION_PATH_HID);
return 0;
}
@@ -157,3 +170,4 @@ static struct rte_pci_driver rte_nthw_pmd = {
};
RTE_PMD_REGISTER_PCI(net_ntnic, rte_nthw_pmd);
+RTE_PMD_REGISTER_KMOD_DEP(net_ntnic, "* vfio-pci");
diff --git a/drivers/net/ntnic/ntnic_vfio.c b/drivers/net/ntnic/ntnic_vfio.c
new file mode 100644
index 00..f4433152b7
--- /dev/null
+++ b/drivers/net/ntnic/ntnic_vfio.c
@@ -0,0 +1,235 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include "ntnic_vfio.h"
+
+#define ONE_G_SIZE 0x4000
+#define ONE_G_MASK (ONE_G_SIZE - 1)
+#define START_VF_IOVA 0x2200
+
+int
+nt_vfio_vf_num(const struct rte_pci_device *pdev)
+{
+ return ((pdev->addr.devid & 0x1f) << 3) + ((pdev->addr.function) & 0x7);
+}
+
+/* Internal API */
+struct vfio_dev {
+ int container_fd;
+ int group_fd;
+ int dev_fd;
+ uint64_t iova_addr;
+};
+
+static struct vfio_dev vfio_list[256];
+
+static struct vfio_dev *
+vfio_get(int vf_num)
+{
+ if (vf_num < 0 || vf_num > 255)
+ return NULL;
+
+ return &vfio_list[vf_num];
+}
+
+/* External API */
+int
+nt_vfio_setup(struct rte_pci_device *dev)
+{
+ char devname[RTE_DEV_NAME_MAX_LEN] = { 0 };
+ int iommu_group_num;
+ int vf_num;
+ struct vfio_dev *vfio;
+
+ NT_LOG(INF, NTNIC, "NT VFIO device setup %s\n", dev->name);
+
+ vf_num = nt_vfio_vf_num(dev);
+
+ vfio = vfio_get(vf_num);
+
+ if (vfio == NULL) {
+ NT_LOG(ERR, NTNIC, "VFIO device setup failed. Illegal device
id\n");
+ return -1;
+ }
+
+ vfio->dev_fd = -1;
+ vfio->group_fd = -1;
+ vfio->container_fd = -1;
+ vfio->iova_addr = START_VF_IOVA;
+
+ rte_pci_device_name(&dev->addr, devname, RTE_DEV_NAME_MAX_LEN);
+ rte_vfio_get_group_num(rte_pci_get_sysfs_path(), devname,
&iommu_group_num);
+
+ if (vf_num == 0) {
+ /* use default container for pf0 */
+ vfio->container_fd = RTE_VFIO_DEFAULT_CONTAINER_FD;
+
+ } else {
+ vfio->container_fd = rte_vfio_container_create();
+
+ if (vfio->container_fd < 0) {
+ NT_LOG(ERR, NTNIC,
+ "VFIO device setup failed. VFIO container
creation failed.\n");
+ return -1;
+ }
+ }
+
+ vfio->group_fd = rte_vfio_container_group_bind(vfio->container_fd,
iommu_group_num);
+
+ if (vfio->group_fd < 0) {
+ NT_LOG(ERR, NTNIC,
+ "VFIO device se
[PATCH v5 02/23] net/ntnic: add logging implementation
Add ntnic specific implementation for logging
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/meson.build | 2 +
drivers/net/ntnic/ntlog/include/ntlog.h | 49 +++
drivers/net/ntnic/ntlog/ntlog.c | 53 +
drivers/net/ntnic/ntnic_ethdev.c| 2 +
4 files changed, 106 insertions(+)
create mode 100644 drivers/net/ntnic/ntlog/include/ntlog.h
create mode 100644 drivers/net/ntnic/ntlog/ntlog.c
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index 227949eacb..b1ba8a860f 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -15,10 +15,12 @@ cflags += [
# includes
includes = [
include_directories('.'),
+include_directories('ntlog/include'),
]
# all sources
sources = files(
+'ntlog/ntlog.c',
'ntnic_ethdev.c',
)
# END
diff --git a/drivers/net/ntnic/ntlog/include/ntlog.h
b/drivers/net/ntnic/ntlog/include/ntlog.h
new file mode 100644
index 00..58dcce0580
--- /dev/null
+++ b/drivers/net/ntnic/ntlog/include/ntlog.h
@@ -0,0 +1,49 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef NTOSS_SYSTEM_NTLOG_H
+#define NTOSS_SYSTEM_NTLOG_H
+
+#include
+#include
+#include
+
+extern int nt_logtype;
+
+#define NT_DRIVER_NAME "ntnic"
+
+#define NT_PMD_DRV_LOG(level, ...) \
+ rte_log(RTE_LOG_ ## level, nt_logtype, \
+ RTE_FMT(NT_DRIVER_NAME ": " \
+ RTE_FMT_HEAD(__VA_ARGS__, ""), \
+ RTE_FMT_TAIL(__VA_ARGS__, "")))
+
+
+#define NT_LOG_ERR(...) NT_PMD_DRV_LOG(ERR, __VA_ARGS__)
+#define NT_LOG_WRN(...) NT_PMD_DRV_LOG(WARNING, __VA_ARGS__)
+#define NT_LOG_INF(...) NT_PMD_DRV_LOG(INFO, __VA_ARGS__)
+#define NT_LOG_DBG(...) NT_PMD_DRV_LOG(DEBUG, __VA_ARGS__)
+
+#define NT_LOG(level, module, ...) \
+ NT_LOG_##level(#module ": " #level ":" __VA_ARGS__)
+
+#define NT_LOG_DBGX(level, module, ...) \
+ rte_log(RTE_LOG_ ##level, nt_logtype, \
+ RTE_FMT(NT_DRIVER_NAME #module ": [%s:%u]" \
+ RTE_FMT_HEAD(__VA_ARGS__, ""),
__func__, __LINE__, \
+ RTE_FMT_TAIL(__VA_ARGS__, "")))
+/*
+ * nt log helper functions
+ * to create a string for NT_LOG usage to output a one-liner log
+ * to use when one single function call to NT_LOG is not optimal - that is
+ * you do not know the number of parameters at programming time or it is
variable
+ */
+char *ntlog_helper_str_alloc(const char *sinit);
+
+void ntlog_helper_str_add(char *s, const char *format, ...);
+
+void ntlog_helper_str_free(char *s);
+
+#endif /* NTOSS_SYSTEM_NTLOG_H */
diff --git a/drivers/net/ntnic/ntlog/ntlog.c b/drivers/net/ntnic/ntlog/ntlog.c
new file mode 100644
index 00..2732a9e857
--- /dev/null
+++ b/drivers/net/ntnic/ntlog/ntlog.c
@@ -0,0 +1,53 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include "ntlog.h"
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#define NTLOG_HELPER_STR_SIZE_MAX (1024)
+
+RTE_LOG_REGISTER_DEFAULT(nt_logtype, INFO)
+
+char *ntlog_helper_str_alloc(const char *sinit)
+{
+ char *s = malloc(NTLOG_HELPER_STR_SIZE_MAX);
+
+ if (!s)
+ return NULL;
+
+ if (sinit)
+ snprintf(s, NTLOG_HELPER_STR_SIZE_MAX, "%s", sinit);
+
+ else
+ s[0] = '\0';
+
+ return s;
+}
+
+__rte_format_printf(2, 0)
+void ntlog_helper_str_add(char *s, const char *format, ...)
+{
+ if (!s)
+ return;
+
+ va_list args;
+ va_start(args, format);
+ int len = strlen(s);
+ vsnprintf(&s[len], (NTLOG_HELPER_STR_SIZE_MAX - 1 - len), format, args);
+ va_end(args);
+}
+
+void ntlog_helper_str_free(char *s)
+{
+ free(s);
+}
diff --git a/drivers/net/ntnic/ntnic_ethdev.c b/drivers/net/ntnic/ntnic_ethdev.c
index 9cc727ac4b..3079bd98e4 100644
--- a/drivers/net/ntnic/ntnic_ethdev.c
+++ b/drivers/net/ntnic/ntnic_ethdev.c
@@ -12,6 +12,8 @@
#include
#include
+#include "ntlog.h"
+
/* Global static variables: */
static int
--
2.45.0
[PATCH v5 04/23] net/ntnic: add NT utilities implementation
Add ntnic utilities.
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/meson.build | 2 ++
drivers/net/ntnic/ntnic_ethdev.c | 2 ++
drivers/net/ntnic/ntutil/include/nt_util.h | 28 ++
drivers/net/ntnic/ntutil/nt_util.c | 33 ++
4 files changed, 65 insertions(+)
create mode 100644 drivers/net/ntnic/ntutil/include/nt_util.h
create mode 100644 drivers/net/ntnic/ntutil/nt_util.c
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index b1ba8a860f..d364cf8621 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -16,11 +16,13 @@ cflags += [
includes = [
include_directories('.'),
include_directories('ntlog/include'),
+include_directories('ntutil/include'),
]
# all sources
sources = files(
'ntlog/ntlog.c',
+'ntutil/nt_util.c',
'ntnic_ethdev.c',
)
# END
diff --git a/drivers/net/ntnic/ntnic_ethdev.c b/drivers/net/ntnic/ntnic_ethdev.c
index e9a584877f..c9726343a1 100644
--- a/drivers/net/ntnic/ntnic_ethdev.c
+++ b/drivers/net/ntnic/ntnic_ethdev.c
@@ -14,6 +14,8 @@
#include "ntlog.h"
+#include "nt_util.h"
+
/* Global static variables: */
static int
diff --git a/drivers/net/ntnic/ntutil/include/nt_util.h
b/drivers/net/ntnic/ntutil/include/nt_util.h
new file mode 100644
index 00..3c7b6cfce4
--- /dev/null
+++ b/drivers/net/ntnic/ntutil/include/nt_util.h
@@ -0,0 +1,28 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef NTOSS_SYSTEM_NT_UTIL_H
+#define NTOSS_SYSTEM_NT_UTIL_H
+
+#include
+
+#ifndef ARRAY_SIZE
+#define ARRAY_SIZE(arr) RTE_DIM(arr)
+#endif
+
+#define PCIIDENT_TO_DOMAIN(pci_ident) ((uint16_t)(((unsigned int)(pci_ident)
>> 16) & 0xU))
+#define PCIIDENT_TO_BUSNR(pci_ident) ((uint8_t)(((unsigned int)(pci_ident) >>
8) & 0xFFU))
+#define PCIIDENT_TO_DEVNR(pci_ident) ((uint8_t)(((unsigned int)(pci_ident) >>
3) & 0x1FU))
+#define PCIIDENT_TO_FUNCNR(pci_ident) ((uint8_t)(((unsigned int)(pci_ident) >>
0) & 0x7U))
+#define PCIIDENT_PRINT_STR "%04x:%02x:%02x.%x"
+#define BDF_TO_PCIIDENT(dom, bus, dev, fnc) (((dom) << 16) | ((bus) << 8) |
((dev) << 3) | (fnc))
+
+uint64_t nt_os_get_time_monotonic_counter(void);
+void nt_os_wait_usec(int val);
+
+uint64_t nt_util_align_size(uint64_t size);
+
+
+#endif /* NTOSS_SYSTEM_NT_UTIL_H */
diff --git a/drivers/net/ntnic/ntutil/nt_util.c
b/drivers/net/ntnic/ntutil/nt_util.c
new file mode 100644
index 00..5395bf6993
--- /dev/null
+++ b/drivers/net/ntnic/ntutil/nt_util.c
@@ -0,0 +1,33 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+
+#include "ntlog.h"
+#include "nt_util.h"
+
+/* uses usleep which schedules out the calling thread */
+void nt_os_wait_usec(int val)
+{
+ rte_delay_us_sleep(val);
+}
+
+uint64_t nt_os_get_time_monotonic_counter(void)
+{
+ return rte_get_timer_cycles();
+}
+
+/* Allocation size matching minimum alignment of specified size */
+uint64_t nt_util_align_size(uint64_t size)
+{
+ return 1 << rte_log2_u64(size);
+}
--
2.45.0
[PATCH v5 07/23] net/ntnic: add core platform functionality
Add ntnic basic platform interfaces
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/ntos_drv.h | 2 +
drivers/net/ntnic/meson.build | 2 +
drivers/net/ntnic/nthw/nthw_drv.h | 88 ++
drivers/net/ntnic/nthw/nthw_platform.c | 14
drivers/net/ntnic/nthw/nthw_platform_drv.h | 21 ++
5 files changed, 127 insertions(+)
create mode 100644 drivers/net/ntnic/nthw/nthw_drv.h
create mode 100644 drivers/net/ntnic/nthw/nthw_platform.c
create mode 100644 drivers/net/ntnic/nthw/nthw_platform_drv.h
diff --git a/drivers/net/ntnic/include/ntos_drv.h
b/drivers/net/ntnic/include/ntos_drv.h
index aed9e83c8d..0014e267ec 100644
--- a/drivers/net/ntnic/include/ntos_drv.h
+++ b/drivers/net/ntnic/include/ntos_drv.h
@@ -13,6 +13,8 @@
#include
+#include "nthw_drv.h"
+
#define NUM_MAC_ADDRS_PER_PORT (16U)
#define NUM_MULTICAST_ADDRS_PER_PORT (16U)
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index ff5dd81a37..3ded7fd8a9 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -18,10 +18,12 @@ includes = [
include_directories('include'),
include_directories('ntlog/include'),
include_directories('ntutil/include'),
+include_directories('nthw'),
]
# all sources
sources = files(
+'nthw/nthw_platform.c',
'ntlog/ntlog.c',
'ntutil/nt_util.c',
'ntnic_vfio.c',
diff --git a/drivers/net/ntnic/nthw/nthw_drv.h
b/drivers/net/ntnic/nthw/nthw_drv.h
new file mode 100644
index 00..0b89a5c5a0
--- /dev/null
+++ b/drivers/net/ntnic/nthw/nthw_drv.h
@@ -0,0 +1,88 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __NTHW_DRV_H__
+#define __NTHW_DRV_H__
+
+#include
+#include "nthw_platform_drv.h"
+
+typedef enum nt_meta_port_type_e {
+ PORT_TYPE_PHYSICAL,
+ PORT_TYPE_VIRTUAL,
+ PORT_TYPE_OVERRIDE,
+} nt_meta_port_type_t;
+
+enum fpga_info_profile {
+ FPGA_INFO_PROFILE_UNKNOWN = 0,
+ FPGA_INFO_PROFILE_VSWITCH = 1,
+ FPGA_INFO_PROFILE_INLINE = 2,
+ FPGA_INFO_PROFILE_CAPTURE = 3,
+};
+
+typedef struct mcu_info_s {
+ int mn_mcu_type;
+ int mn_mcu_dram_size;
+} mcu_info_t;
+
+typedef struct nthw_hw_info_s {
+ /* From FW */
+ int hw_id;
+ int hw_id_emulated;
+ char hw_plat_id_str[32];
+
+ struct vpd_info_s {
+ int mn_mac_addr_count;
+ uint64_t mn_mac_addr_value;
+ uint8_t ma_mac_addr_octets[6];
+ } vpd_info;
+} nthw_hw_info_t;
+
+typedef struct fpga_info_s {
+ uint64_t n_fpga_ident;
+
+ int n_fpga_type_id;
+ int n_fpga_prod_id;
+ int n_fpga_ver_id;
+ int n_fpga_rev_id;
+
+ int n_fpga_build_time;
+
+ int n_fpga_debug_mode;
+
+ int n_phy_ports;
+ int n_phy_quads;
+ int n_rx_ports;
+ int n_tx_ports;
+ int n_vf_offset;
+
+ enum fpga_info_profile profile;
+
+ struct nthw_fpga_s *mp_fpga;
+
+ struct nthw_rac *mp_nthw_rac;
+ struct nthw_hif *mp_nthw_hif;
+ struct nthw_pcie3 *mp_nthw_pcie3;
+ struct nthw_tsm *mp_nthw_tsm;
+
+ uint8_t *bar0_addr; /* Needed for register read/write */
+ size_t bar0_size;
+
+ int adapter_no; /* Needed for nthw_rac DMA array indexing */
+ uint32_t pciident; /* Needed for nthw_rac DMA memzone_reserve */
+ int numa_node; /* Needed for nthw_rac DMA memzone_reserve */
+
+ char *mp_adapter_id_str;/* Pointer to string literal used in nthw log
messages */
+
+ struct mcu_info_s mcu_info;
+
+ struct nthw_hw_info_s nthw_hw_info;
+
+ nthw_adapter_id_t n_nthw_adapter_id;
+
+} fpga_info_t;
+
+
+#endif /* __NTHW_DRV_H__ */
diff --git a/drivers/net/ntnic/nthw/nthw_platform.c
b/drivers/net/ntnic/nthw/nthw_platform.c
new file mode 100644
index 00..181330dd37
--- /dev/null
+++ b/drivers/net/ntnic/nthw/nthw_platform.c
@@ -0,0 +1,14 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include "nthw_platform_drv.h"
+
+nthw_adapter_id_t nthw_platform_get_nthw_adapter_id(const uint16_t
n_pci_device_id)
+{
+ switch (n_pci_device_id) {
+ default:
+ return NT_HW_ADAPTER_ID_UNKNOWN;
+ }
+}
diff --git a/drivers/net/ntnic/nthw/nthw_platform_drv.h
b/drivers/net/ntnic/nthw/nthw_platform_drv.h
new file mode 100644
index 00..ab26d8149a
--- /dev/null
+++ b/drivers/net/ntnic/nthw/nthw_platform_drv.h
@@ -0,0 +1,21 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __NTHW_PLATFORM_DRV_H__
+#define __NTHW_PLATFORM_DRV_H__
+
+#include
+
+#define NT_HW_PCI_VENDOR_ID (0x18f4)
+
+enum nthw_adapter_id_e {
+ NT_HW_ADAPTER_ID_UNKNOWN = 0,
+};
+
+typedef enum nthw_adapter_id_e nthw_adapter_id_t;
+
+nthw_adapter_id_t nthw_platform_get_nthw_adapter_id(const uint16_t
n_pci_device_id);
+
+#endif /* __NTHW
[PATCH v5 08/23] net/ntnic: add adapter initialization
Add interfaces for initialize the adapter
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/adapter/nt4ga_adapter.c | 148 ++
drivers/net/ntnic/include/nt4ga_adapter.h | 40 ++
drivers/net/ntnic/include/ntdrv_4ga.h | 2 +
drivers/net/ntnic/meson.build | 2 +
drivers/net/ntnic/ntnic_ethdev.c | 73 ++-
drivers/net/ntnic/ntnic_mod_reg.c | 20 +++
drivers/net/ntnic/ntnic_mod_reg.h | 27
7 files changed, 311 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ntnic/adapter/nt4ga_adapter.c
create mode 100644 drivers/net/ntnic/include/nt4ga_adapter.h
create mode 100644 drivers/net/ntnic/ntnic_mod_reg.c
create mode 100644 drivers/net/ntnic/ntnic_mod_reg.h
diff --git a/drivers/net/ntnic/adapter/nt4ga_adapter.c
b/drivers/net/ntnic/adapter/nt4ga_adapter.c
new file mode 100644
index 00..7cc3841ecf
--- /dev/null
+++ b/drivers/net/ntnic/adapter/nt4ga_adapter.c
@@ -0,0 +1,148 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include
+
+#include "ntlog.h"
+#include "nt_util.h"
+#include "ntnic_mod_reg.h"
+
+static int nt4ga_adapter_show_info(struct adapter_info_s *p_adapter_info, FILE
*pfh)
+{
+ const char *const p_dev_name = p_adapter_info->p_dev_name;
+ const char *const p_adapter_id_str = p_adapter_info->mp_adapter_id_str;
+ fpga_info_t *p_fpga_info = &p_adapter_info->fpga_info;
+ hw_info_t *p_hw_info = &p_adapter_info->hw_info;
+ char a_pci_ident_str[32];
+
+ snprintf(a_pci_ident_str, sizeof(a_pci_ident_str), PCIIDENT_PRINT_STR,
+ PCIIDENT_TO_DOMAIN(p_fpga_info->pciident),
+ PCIIDENT_TO_BUSNR(p_fpga_info->pciident),
+ PCIIDENT_TO_DEVNR(p_fpga_info->pciident),
+ PCIIDENT_TO_FUNCNR(p_fpga_info->pciident));
+
+ fprintf(pfh, "%s: DeviceName: %s\n", p_adapter_id_str, (p_dev_name ?
p_dev_name : "NA"));
+ fprintf(pfh, "%s: PCI Details:\n", p_adapter_id_str);
+ fprintf(pfh, "%s: %s: %08X: %04X:%04X %04X:%04X\n", p_adapter_id_str,
a_pci_ident_str,
+ p_fpga_info->pciident, p_hw_info->pci_vendor_id,
p_hw_info->pci_device_id,
+ p_hw_info->pci_sub_vendor_id, p_hw_info->pci_sub_device_id);
+ fprintf(pfh, "%s: FPGA Details:\n", p_adapter_id_str);
+ fprintf(pfh, "%s: %03d-%04d-%02d-%02d [%016" PRIX64 "] (%08X)\n",
p_adapter_id_str,
+ p_fpga_info->n_fpga_type_id, p_fpga_info->n_fpga_prod_id,
+ p_fpga_info->n_fpga_ver_id, p_fpga_info->n_fpga_rev_id,
p_fpga_info->n_fpga_ident,
+ p_fpga_info->n_fpga_build_time);
+ fprintf(pfh, "%s: FpgaDebugMode=0x%x\n", p_adapter_id_str,
p_fpga_info->n_fpga_debug_mode);
+ fprintf(pfh, "%s: Hw=0x%02X_rev%d: %s\n", p_adapter_id_str,
p_hw_info->hw_platform_id,
+ p_fpga_info->nthw_hw_info.hw_id,
p_fpga_info->nthw_hw_info.hw_plat_id_str);
+ fprintf(pfh, "%s: MCU Details:\n", p_adapter_id_str);
+
+
+ return 0;
+}
+
+static int nt4ga_adapter_init(struct adapter_info_s *p_adapter_info)
+{
+ char *const p_dev_name = malloc(24);
+ char *const p_adapter_id_str = malloc(24);
+ fpga_info_t *fpga_info = &p_adapter_info->fpga_info;
+ hw_info_t *p_hw_info = &p_adapter_info->hw_info;
+
+
+ p_hw_info->n_nthw_adapter_id =
nthw_platform_get_nthw_adapter_id(p_hw_info->pci_device_id);
+
+ fpga_info->n_nthw_adapter_id = p_hw_info->n_nthw_adapter_id;
+ /* ref: DN-0060 section 9 */
+ p_hw_info->hw_product_type = p_hw_info->pci_device_id & 0x000f;
+ /* ref: DN-0060 section 9 */
+ p_hw_info->hw_platform_id = (p_hw_info->pci_device_id >> 4) & 0x00ff;
+ /* ref: DN-0060 section 9 */
+ p_hw_info->hw_reserved1 = (p_hw_info->pci_device_id >> 12) & 0x000f;
+
+ /* mp_dev_name */
+ p_adapter_info->p_dev_name = p_dev_name;
+
+ if (p_dev_name) {
+ snprintf(p_dev_name, 24, PCIIDENT_PRINT_STR,
+ PCIIDENT_TO_DOMAIN(p_adapter_info->fpga_info.pciident),
+ PCIIDENT_TO_BUSNR(p_adapter_info->fpga_info.pciident),
+ PCIIDENT_TO_DEVNR(p_adapter_info->fpga_info.pciident),
+ PCIIDENT_TO_FUNCNR(p_adapter_info->fpga_info.pciident));
+ NT_LOG(DBG, NTNIC, "%s: (0x%08X)\n", p_dev_name,
+ p_adapter_info->fpga_info.pciident);
+ }
+
+ /* mp_adapter_id_str */
+ p_adapter_info->mp_adapter_id_str = p_adapter_id_str;
+
+ p_adapter_info->fpga_info.mp_adapter_id_str = p_adapter_id_str;
+
+ if (p_adapter_id_str) {
+ snprintf(p_adapter_id_str, 24, "PCI:" PCIIDENT_PRINT_STR,
+ PCIIDENT_TO_DOMAIN(p_adapter_info->fpga_info.pciident),
+ PCIIDENT_TO_BUSNR(p_adapter_info->fpga_info.pciident),
+ PCIIDENT_TO_DEVNR(p_adapter_info->fpga_info.pciident),
+
[PATCH v5 11/23] net/ntnic: add FPGA initialization functionality
Enable FPGA initialization
Signed-off-by: Serhii Iliushyk
---
v5
* Fix Typo/Spelling
---
drivers/net/ntnic/adapter/nt4ga_adapter.c | 52 +++-
drivers/net/ntnic/meson.build | 7 +
.../net/ntnic/nthw/core/include/nthw_core.h | 4 +
.../net/ntnic/nthw/core/include/nthw_fpga.h | 22 ++
drivers/net/ntnic/nthw/core/nthw_fpga.c | 222 ++
drivers/net/ntnic/nthw/nthw_drv.h | 1 +
drivers/net/ntnic/nthw/nthw_register.h| 1 +
drivers/net/ntnic/ntnic_ethdev.c | 39 ++-
drivers/net/ntnic/ntnic_mod_reg.h | 1 +
9 files changed, 345 insertions(+), 4 deletions(-)
create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_fpga.h
create mode 100644 drivers/net/ntnic/nthw/core/nthw_fpga.c
diff --git a/drivers/net/ntnic/adapter/nt4ga_adapter.c
b/drivers/net/ntnic/adapter/nt4ga_adapter.c
index 7cc3841ecf..99083dd2dd 100644
--- a/drivers/net/ntnic/adapter/nt4ga_adapter.c
+++ b/drivers/net/ntnic/adapter/nt4ga_adapter.c
@@ -6,7 +6,7 @@
#include
#include "ntlog.h"
-#include "nt_util.h"
+#include "nthw_fpga.h"
#include "ntnic_mod_reg.h"
static int nt4ga_adapter_show_info(struct adapter_info_s *p_adapter_info, FILE
*pfh)
@@ -15,6 +15,7 @@ static int nt4ga_adapter_show_info(struct adapter_info_s
*p_adapter_info, FILE *
const char *const p_adapter_id_str = p_adapter_info->mp_adapter_id_str;
fpga_info_t *p_fpga_info = &p_adapter_info->fpga_info;
hw_info_t *p_hw_info = &p_adapter_info->hw_info;
+ mcu_info_t *mcu_info = &p_adapter_info->fpga_info.mcu_info;
char a_pci_ident_str[32];
snprintf(a_pci_ident_str, sizeof(a_pci_ident_str), PCIIDENT_PRINT_STR,
@@ -37,7 +38,8 @@ static int nt4ga_adapter_show_info(struct adapter_info_s
*p_adapter_info, FILE *
fprintf(pfh, "%s: Hw=0x%02X_rev%d: %s\n", p_adapter_id_str,
p_hw_info->hw_platform_id,
p_fpga_info->nthw_hw_info.hw_id,
p_fpga_info->nthw_hw_info.hw_plat_id_str);
fprintf(pfh, "%s: MCU Details:\n", p_adapter_id_str);
-
+ fprintf(pfh, "%s: HasMcu=%d McuType=%d McuDramSize=%d\n",
p_adapter_id_str,
+ mcu_info->mb_has_mcu, mcu_info->mn_mcu_type,
mcu_info->mn_mcu_dram_size);
return 0;
}
@@ -49,6 +51,13 @@ static int nt4ga_adapter_init(struct adapter_info_s
*p_adapter_info)
fpga_info_t *fpga_info = &p_adapter_info->fpga_info;
hw_info_t *p_hw_info = &p_adapter_info->hw_info;
+ /*
+* IMPORTANT: Most variables cannot be determined before nthw fpga
model is instantiated
+* (nthw_fpga_init())
+*/
+ int n_phy_ports = -1;
+ int res = -1;
+ nthw_fpga_t *p_fpga = NULL;
p_hw_info->n_nthw_adapter_id =
nthw_platform_get_nthw_adapter_id(p_hw_info->pci_device_id);
@@ -102,6 +111,39 @@ static int nt4ga_adapter_init(struct adapter_info_s
*p_adapter_info)
}
}
+ res = nthw_fpga_init(&p_adapter_info->fpga_info);
+
+ if (res) {
+ NT_LOG_DBGX(ERR, NTNIC, "%s: %s: FPGA=%04d res=x%08X\n",
p_adapter_id_str,
+ p_dev_name, fpga_info->n_fpga_prod_id, res);
+ return res;
+ }
+
+ assert(fpga_info);
+ p_fpga = fpga_info->mp_fpga;
+ assert(p_fpga);
+ n_phy_ports = fpga_info->n_phy_ports;
+ assert(n_phy_ports >= 1);
+
+ {
+ assert(fpga_info->n_fpga_prod_id > 0);
+
+ switch (fpga_info->n_fpga_prod_id) {
+ default:
+ NT_LOG(ERR, NTNIC, "Unsupported FPGA product: %04d\n",
+ fpga_info->n_fpga_prod_id);
+ res = -1;
+ break;
+ }
+
+ if (res) {
+ NT_LOG_DBGX(ERR, NTNIC, "%s: %s: FPGA=%04d res=x%08X\n",
+ p_adapter_id_str, p_dev_name,
+ fpga_info->n_fpga_prod_id, res);
+ return res;
+ }
+ }
+
return 0;
}
@@ -109,8 +151,12 @@ static int nt4ga_adapter_deinit(struct adapter_info_s
*p_adapter_info)
{
fpga_info_t *fpga_info = &p_adapter_info->fpga_info;
int i;
- int res = -1;
+ int res;
+
+ nthw_fpga_shutdown(&p_adapter_info->fpga_info);
+ /* Rac rab reset flip flop */
+ res = nthw_rac_rab_reset(fpga_info->mp_nthw_rac);
/* Free adapter port ident strings */
for (i = 0; i < fpga_info->n_phy_ports; i++) {
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index aa839f4de3..fced38e41a 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -21,6 +21,7 @@ includes = [
include_directories('nthw/core/include'),
include_directories('nthw'),
include_directories('nthw/supported'),
+include_directories('nthw/model'),
]
# all sources
@@ -29,7 +30,13 @@ sources = files(
'nt
[PATCH v5 12/23] net/ntnic: add support of the NT200A0X smartNIC
Add ntnic support for NT200A0X NIC
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/adapter/nt4ga_adapter.c | 6 +++
drivers/net/ntnic/meson.build | 1 +
.../net/ntnic/nthw/core/include/nthw_fpga.h | 7 +++
.../nthw/core/nt200a0x/nthw_fpga_nt200a0x.c | 54 +++
drivers/net/ntnic/nthw/core/nthw_fpga.c | 31 +++
drivers/net/ntnic/nthw/nthw_platform.c| 3 ++
drivers/net/ntnic/nthw/nthw_platform_drv.h| 2 +
drivers/net/ntnic/ntnic_ethdev.c | 12 +
8 files changed, 116 insertions(+)
create mode 100644 drivers/net/ntnic/nthw/core/nt200a0x/nthw_fpga_nt200a0x.c
diff --git a/drivers/net/ntnic/adapter/nt4ga_adapter.c
b/drivers/net/ntnic/adapter/nt4ga_adapter.c
index 99083dd2dd..a87a06204e 100644
--- a/drivers/net/ntnic/adapter/nt4ga_adapter.c
+++ b/drivers/net/ntnic/adapter/nt4ga_adapter.c
@@ -129,6 +129,12 @@ static int nt4ga_adapter_init(struct adapter_info_s
*p_adapter_info)
assert(fpga_info->n_fpga_prod_id > 0);
switch (fpga_info->n_fpga_prod_id) {
+ /* NT200A01: 2x100G (Xilinx) */
+ case 9563: /* NT200A02 (Cap) */
+ NT_LOG(ERR, NTNIC, "NT200A02 100G link module
uninitialized\n");
+ res = -1;
+ break;
+
default:
NT_LOG(ERR, NTNIC, "Unsupported FPGA product: %04d\n",
fpga_info->n_fpga_prod_id);
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index fced38e41a..79d89b1031 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -30,6 +30,7 @@ sources = files(
'nthw/supported/nthw_fpga_9563_055_039_.c',
'nthw/supported/nthw_fpga_instances.c',
'nthw/supported/nthw_fpga_mod_str_map.c',
+'nthw/core/nt200a0x/nthw_fpga_nt200a0x.c',
'nthw/core/nthw_fpga.c',
'nthw/core/nthw_hif.c',
'nthw/core/nthw_iic.c',
diff --git a/drivers/net/ntnic/nthw/core/include/nthw_fpga.h
b/drivers/net/ntnic/nthw/core/include/nthw_fpga.h
index 1943f6e225..ba86b4d8d2 100644
--- a/drivers/net/ntnic/nthw/core/include/nthw_fpga.h
+++ b/drivers/net/ntnic/nthw/core/include/nthw_fpga.h
@@ -18,5 +18,12 @@ int nthw_fpga_shutdown(struct fpga_info_s *p_fpga_info);
int nthw_fpga_get_param_info(struct fpga_info_s *p_fpga_info, nthw_fpga_t
*p_fpga);
+struct nt200a0x_ops {
+ int (*nthw_fpga_nt200a0x_init)(struct fpga_info_s *p_fpga_info);
+};
+
+void register_nt200a0x_ops(struct nt200a0x_ops *ops);
+struct nt200a0x_ops *get_nt200a0x_ops(void);
+void nt200a0x_ops_init(void);
#endif /* __NTHW_FPGA_H__ */
diff --git a/drivers/net/ntnic/nthw/core/nt200a0x/nthw_fpga_nt200a0x.c
b/drivers/net/ntnic/nthw/core/nt200a0x/nthw_fpga_nt200a0x.c
new file mode 100644
index 00..7db6a03d88
--- /dev/null
+++ b/drivers/net/ntnic/nthw/core/nt200a0x/nthw_fpga_nt200a0x.c
@@ -0,0 +1,54 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include "ntlog.h"
+
+#include "nthw_fpga.h"
+#include "ntnic_mod_reg.h"
+
+static int nthw_fpga_nt200a0x_init(struct fpga_info_s *p_fpga_info)
+{
+ assert(p_fpga_info);
+
+ const char *const p_adapter_id_str = p_fpga_info->mp_adapter_id_str;
+ int res = -1;
+
+ bool included = true;
+
+ /* reset specific */
+ switch (p_fpga_info->n_fpga_prod_id) {
+ case 9563:
+ included = false;
+ break;
+
+ default:
+ NT_LOG(ERR, NTHW, "%s: Unsupported FPGA product: %04d\n",
p_adapter_id_str,
+ p_fpga_info->n_fpga_prod_id);
+ res = -1;
+ break;
+ }
+
+ if (!included) {
+ NT_LOG(ERR, NTHW, "%s: NOT INCLUDED FPGA product: %04d\n",
p_adapter_id_str,
+ p_fpga_info->n_fpga_prod_id);
+ res = -1;
+ }
+
+ if (res) {
+ NT_LOG_DBGX(ERR, NTHW, "%s: FPGA=%04d res=%d\n",
p_adapter_id_str,
+ p_fpga_info->n_fpga_prod_id, res);
+ return res;
+ }
+
+ return res;
+}
+
+static struct nt200a0x_ops nt200a0x_ops = { .nthw_fpga_nt200a0x_init =
nthw_fpga_nt200a0x_init };
+
+void nt200a0x_ops_init(void)
+{
+ NT_LOG(INF, NTHW, "NT200A0X OPS INIT\n");
+ register_nt200a0x_ops(&nt200a0x_ops);
+}
diff --git a/drivers/net/ntnic/nthw/core/nthw_fpga.c
b/drivers/net/ntnic/nthw/core/nthw_fpga.c
index df238ec4ef..98d29744cb 100644
--- a/drivers/net/ntnic/nthw/core/nthw_fpga.c
+++ b/drivers/net/ntnic/nthw/core/nthw_fpga.c
@@ -152,7 +152,18 @@ int nthw_fpga_init(struct fpga_info_s *p_fpga_info)
nthw_rac_rab_flush(p_nthw_rac);
p_fpga_info->mp_nthw_rac = p_nthw_rac;
+ bool included = true;
+ struct nt200a0x_ops *nt200a0x_ops = get_nt200a0x_ops();
+
switch (p_fpga_info->n_nthw_adapter_id) {
+ case NT_HW_ADAPTE
[PATCH v5 10/23] net/ntnic: add core platform functionality
Add ntnic platform interfaces for FPGA registers
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/meson.build | 1 +
.../net/ntnic/nthw/core/include/nthw_core.h | 16 +
.../net/ntnic/nthw/core/include/nthw_hif.h| 151
.../net/ntnic/nthw/core/include/nthw_iic.h| 100 +++
.../net/ntnic/nthw/core/include/nthw_pcie3.h | 96 +++
drivers/net/ntnic/nthw/core/nthw_hif.c| 312 +++
drivers/net/ntnic/nthw/core/nthw_iic.c| 527
drivers/net/ntnic/nthw/core/nthw_pcie3.c | 259 ++
drivers/net/ntnic/nthw/nthw_drv.h | 3 +-
drivers/net/ntnic/nthw/nthw_rac.c | 785 ++
drivers/net/ntnic/nthw/nthw_rac.h | 153
11 files changed, 2401 insertions(+), 2 deletions(-)
create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_core.h
create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_hif.h
create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_iic.h
create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_pcie3.h
create mode 100644 drivers/net/ntnic/nthw/core/nthw_hif.c
create mode 100644 drivers/net/ntnic/nthw/core/nthw_iic.c
create mode 100644 drivers/net/ntnic/nthw/core/nthw_pcie3.c
create mode 100644 drivers/net/ntnic/nthw/nthw_rac.c
create mode 100644 drivers/net/ntnic/nthw/nthw_rac.h
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index 490a10c442..aa839f4de3 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -18,6 +18,7 @@ includes = [
include_directories('include'),
include_directories('ntlog/include'),
include_directories('ntutil/include'),
+include_directories('nthw/core/include'),
include_directories('nthw'),
include_directories('nthw/supported'),
]
diff --git a/drivers/net/ntnic/nthw/core/include/nthw_core.h
b/drivers/net/ntnic/nthw/core/include/nthw_core.h
new file mode 100644
index 00..c2602e396f
--- /dev/null
+++ b/drivers/net/ntnic/nthw/core/include/nthw_core.h
@@ -0,0 +1,16 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __NTHW_CORE_H__
+#define __NTHW_CORE_H__
+
+#include
+#include
+#include
+
+#include "nthw_platform_drv.h"
+
+
+#endif /* __NTHW_CORE_H__ */
diff --git a/drivers/net/ntnic/nthw/core/include/nthw_hif.h
b/drivers/net/ntnic/nthw/core/include/nthw_hif.h
new file mode 100644
index 00..c8f4669f83
--- /dev/null
+++ b/drivers/net/ntnic/nthw/core/include/nthw_hif.h
@@ -0,0 +1,151 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __NTHW_HIF_H__
+#define __NTHW_HIF_H__
+
+#define NTHW_TG_CNT_SIZE (4ULL)
+
+struct nthw_hif {
+ nthw_fpga_t *mp_fpga;
+ nthw_module_t *mp_mod_hif;
+ int mn_instance;
+
+ nthw_register_t *mp_reg_ctrl;
+ nthw_field_t *mp_fld_ctrl_fsr;
+
+ nthw_register_t *mp_reg_prod_id_lsb;
+ nthw_field_t *mp_fld_prod_id_lsb_rev_id;
+ nthw_field_t *mp_fld_prod_id_lsb_ver_id;
+ nthw_field_t *mp_fld_prod_id_lsb_group_id;
+
+ nthw_register_t *mp_reg_prod_id_msb;
+ nthw_field_t *mp_fld_prod_id_msb_type_id;
+ nthw_field_t *mp_fld_prod_id_msb_build_no;
+
+ nthw_register_t *mp_reg_build_time;
+ nthw_field_t *mp_fld_build_time;
+
+ nthw_register_t *mp_reg_build_seed;
+ nthw_field_t *mp_fld_build_seed;
+
+ nthw_register_t *mp_reg_core_speed;
+ nthw_field_t *mp_fld_core_speed;
+ nthw_field_t *mp_fld_ddr3_speed;
+
+ nthw_register_t *mp_reg_int_mask;
+ nthw_field_t *mp_fld_int_mask_timer;
+ nthw_field_t *mp_fld_int_mask_port;
+ nthw_field_t *mp_fld_int_mask_pps;
+
+ nthw_register_t *mp_reg_int_clr;
+ nthw_field_t *mp_fld_int_clr_timer;
+ nthw_field_t *mp_fld_int_clr_port;
+ nthw_field_t *mp_fld_int_clr_pps;
+
+ nthw_register_t *mp_reg_int_force;
+ nthw_field_t *mp_fld_int_force_timer;
+ nthw_field_t *mp_fld_int_force_port;
+ nthw_field_t *mp_fld_int_force_pps;
+
+ nthw_register_t *mp_reg_sample_time;
+ nthw_field_t *mp_fld_sample_time;
+
+ nthw_register_t *mp_reg_status;
+ nthw_field_t *mp_fld_status_tags_in_use;
+ nthw_field_t *mp_fld_status_wr_err;
+ nthw_field_t *mp_fld_status_rd_err;
+
+ nthw_register_t *mp_reg_stat_ctrl;
+ nthw_field_t *mp_fld_stat_ctrl_ena;
+ nthw_field_t *mp_fld_stat_ctrl_req;
+
+ nthw_register_t *mp_reg_stat_rx;
+ nthw_field_t *mp_fld_stat_rx_counter;
+
+ nthw_register_t *mp_reg_stat_tx;
+ nthw_field_t *mp_fld_stat_tx_counter;
+
+ nthw_register_t *mp_reg_stat_ref_clk;
+ nthw_field_t *mp_fld_stat_ref_clk_ref_clk;
+
+ nthw_register_t *mp_reg_pci_test0;
+ nthw_field_t *mp_fld_pci_test0;
+
+ nthw_register_t *mp_reg_pci_test1;
+ nthw_field_t *mp_fld_pci_test1;
+
+ nthw_register_t *mp_reg_pci_test2;
+ nthw_field
[PATCH v5 06/23] net/ntnic: add NT NIC driver dependencies
Add structures and interfaces specific for NT smartNiC
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/ntdrv_4ga.h | 17 ++
drivers/net/ntnic/include/ntos_drv.h| 33
drivers/net/ntnic/include/ntos_system.h | 21 ++
drivers/net/ntnic/meson.build | 1 +
drivers/net/ntnic/ntnic_ethdev.c| 243 +++-
5 files changed, 314 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ntnic/include/ntdrv_4ga.h
create mode 100644 drivers/net/ntnic/include/ntos_drv.h
create mode 100644 drivers/net/ntnic/include/ntos_system.h
diff --git a/drivers/net/ntnic/include/ntdrv_4ga.h
b/drivers/net/ntnic/include/ntdrv_4ga.h
new file mode 100644
index 00..bcb7ddc242
--- /dev/null
+++ b/drivers/net/ntnic/include/ntdrv_4ga.h
@@ -0,0 +1,17 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __NTDRV_4GA_H__
+#define __NTDRV_4GA_H__
+
+
+typedef struct ntdrv_4ga_s {
+ uint32_t pciident;
+ char *p_drv_name;
+
+ volatile bool b_shutdown;
+} ntdrv_4ga_t;
+
+#endif /* __NTDRV_4GA_H__ */
diff --git a/drivers/net/ntnic/include/ntos_drv.h
b/drivers/net/ntnic/include/ntos_drv.h
new file mode 100644
index 00..aed9e83c8d
--- /dev/null
+++ b/drivers/net/ntnic/include/ntos_drv.h
@@ -0,0 +1,33 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __NTOS_DRV_H__
+#define __NTOS_DRV_H__
+
+#include
+#include
+#include
+#include
+
+#include
+
+#define NUM_MAC_ADDRS_PER_PORT (16U)
+#define NUM_MULTICAST_ADDRS_PER_PORT (16U)
+
+#define NUM_ADAPTER_MAX (8)
+#define NUM_ADAPTER_PORTS_MAX (128)
+
+struct pmd_internals {
+ const struct rte_pci_device *pci_dev;
+ char name[20];
+ int n_intf_no;
+ int if_index;
+ uint32_t port;
+ uint32_t port_id;
+ struct drv_s *p_drv;
+ struct pmd_internals *next;
+};
+
+#endif /* __NTOS_DRV_H__ */
diff --git a/drivers/net/ntnic/include/ntos_system.h
b/drivers/net/ntnic/include/ntos_system.h
new file mode 100644
index 00..74d7edf313
--- /dev/null
+++ b/drivers/net/ntnic/include/ntos_system.h
@@ -0,0 +1,21 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __NTOS_SYSTEM_H__
+#define __NTOS_SYSTEM_H__
+
+#include "ntdrv_4ga.h"
+
+struct drv_s {
+ int adapter_no;
+ struct rte_pci_device *p_dev;
+ struct ntdrv_4ga_s ntdrv;
+
+ int n_eth_dev_init_count;
+ int probe_finished;
+ int setup_finished;
+};
+
+#endif /* __NTOS_SYSTEM_H__ */
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index 145f586a92..ff5dd81a37 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -15,6 +15,7 @@ cflags += [
# includes
includes = [
include_directories('.'),
+include_directories('include'),
include_directories('ntlog/include'),
include_directories('ntutil/include'),
]
diff --git a/drivers/net/ntnic/ntnic_ethdev.c b/drivers/net/ntnic/ntnic_ethdev.c
index a4e32c30fa..7571fce12e 100644
--- a/drivers/net/ntnic/ntnic_ethdev.c
+++ b/drivers/net/ntnic/ntnic_ethdev.c
@@ -11,37 +11,240 @@
#include "ntlog.h"
+#include "ntdrv_4ga.h"
+#include "ntos_drv.h"
+#include "ntos_system.h"
#include "ntnic_vfio.h"
#include "nt_util.h"
#define EXCEPTION_PATH_HID 0
/* Global static variables: */
+static rte_spinlock_t hwlock = RTE_SPINLOCK_INITIALIZER;
+
+/*
+ * Store and get adapter info
+ */
+
+static struct drv_s *_g_p_drv[NUM_ADAPTER_MAX] = { NULL };
+
+static void
+store_pdrv(struct drv_s *p_drv)
+{
+ if (p_drv->adapter_no > NUM_ADAPTER_MAX) {
+ NT_LOG(ERR, NTNIC,
+ "Internal error adapter number %u out of range. Max
number of adapters: %u\n",
+ p_drv->adapter_no, NUM_ADAPTER_MAX);
+ return;
+ }
+
+ if (_g_p_drv[p_drv->adapter_no] != 0) {
+ NT_LOG(WRN, NTNIC,
+ "Overwriting adapter structure for PCI "
PCIIDENT_PRINT_STR
+ " with adapter structure for PCI " PCIIDENT_PRINT_STR
"\n",
+
PCIIDENT_TO_DOMAIN(_g_p_drv[p_drv->adapter_no]->ntdrv.pciident),
+
PCIIDENT_TO_BUSNR(_g_p_drv[p_drv->adapter_no]->ntdrv.pciident),
+
PCIIDENT_TO_DEVNR(_g_p_drv[p_drv->adapter_no]->ntdrv.pciident),
+
PCIIDENT_TO_FUNCNR(_g_p_drv[p_drv->adapter_no]->ntdrv.pciident),
+ PCIIDENT_TO_DOMAIN(p_drv->ntdrv.pciident),
+ PCIIDENT_TO_BUSNR(p_drv->ntdrv.pciident),
+ PCIIDENT_TO_DEVNR(p_drv->ntdrv.pciident),
+ PCIIDENT_TO_FUNCNR(p_drv->ntdrv.pciident));
+ }
+
+ rte_spinlock_lock(&hwlock);
+ _g_p_drv[p_drv->adapter_no] = p_drv;
+ rte_spinlock_unlock(&hwlock);
+}
+
+static void
+clear_pdrv(struct drv_s *p_drv)
+{
+
[PATCH v5 14/23] net/ntnic: add clock profiles for the NT200A0X smartNIC
Add API for control clock NT200 and FW 9563
Signed-off-by: Serhii Iliushyk
---
.../ntnic/include/clock_profiles_structs.h| 35 +
.../include/ntnic_nthw_fpga_rst_nt200a0x.h| 1 +
drivers/net/ntnic/meson.build | 2 +
.../net/ntnic/nthw/core/include/nthw_core.h | 2 +
.../net/ntnic/nthw/core/include/nthw_fpga.h | 4 +
.../net/ntnic/nthw/core/include/nthw_si5340.h | 33 +
.../NT200A02_U23_Si5340_adr0_v5-Registers.h | 753 ++
.../clock_profiles/nthw_fpga_clk9563.c| 47 ++
.../core/nt200a0x/reset/nthw_fpga_rst9563.c | 35 +
.../nt200a0x/reset/nthw_fpga_rst_nt200a0x.c | 3 +
drivers/net/ntnic/nthw/core/nthw_fpga.c | 23 +
drivers/net/ntnic/nthw/core/nthw_si5340.c | 198 +
drivers/net/ntnic/ntnic_mod_reg.c | 14 +
drivers/net/ntnic/ntnic_mod_reg.h | 9 +
14 files changed, 1159 insertions(+)
create mode 100644 drivers/net/ntnic/include/clock_profiles_structs.h
create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_si5340.h
create mode 100644
drivers/net/ntnic/nthw/core/nt200a0x/clock_profiles/NT200A02_U23_Si5340_adr0_v5-Registers.h
create mode 100644
drivers/net/ntnic/nthw/core/nt200a0x/clock_profiles/nthw_fpga_clk9563.c
create mode 100644 drivers/net/ntnic/nthw/core/nthw_si5340.c
diff --git a/drivers/net/ntnic/include/clock_profiles_structs.h
b/drivers/net/ntnic/include/clock_profiles_structs.h
new file mode 100644
index 00..e7aa2daf93
--- /dev/null
+++ b/drivers/net/ntnic/include/clock_profiles_structs.h
@@ -0,0 +1,35 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef _NT_CLOCK_PROFILES_STRUCTS_H_
+#define _NT_CLOCK_PROFILES_STRUCTS_H_
+
+#include
+
+#define clk_profile_size_error_msg "Size test failed"
+
+struct clk_profile_data_fmt1_s {
+ uint16_t reg_addr;
+ uint8_t reg_val;
+};
+
+struct clk_profile_data_fmt2_s {
+ unsigned int reg_addr;
+ unsigned char reg_val;
+};
+
+typedef struct clk_profile_data_fmt1_s clk_profile_data_fmt1_t;
+typedef struct clk_profile_data_fmt2_s clk_profile_data_fmt2_t;
+
+enum clk_profile_data_fmt_e {
+ clk_profile_data_fmt_1,
+ clk_profile_data_fmt_2,
+};
+
+typedef enum clk_profile_data_fmt_e clk_profile_data_fmt_t;
+
+#endif /* _NT_CLOCK_PROFILES_STRUCTS_H_ */
+
+/* EOF */
diff --git a/drivers/net/ntnic/include/ntnic_nthw_fpga_rst_nt200a0x.h
b/drivers/net/ntnic/include/ntnic_nthw_fpga_rst_nt200a0x.h
index 6ceec93bac..8b7ebdf1fd 100644
--- a/drivers/net/ntnic/include/ntnic_nthw_fpga_rst_nt200a0x.h
+++ b/drivers/net/ntnic/include/ntnic_nthw_fpga_rst_nt200a0x.h
@@ -17,6 +17,7 @@ struct nthw_fpga_rst_nt200a0x {
int mn_hw_id;
int mn_si_labs_clock_synth_model;
+ uint8_t mn_si_labs_clock_synth_i2c_addr;
nthw_field_t *mp_fld_rst_sys;
nthw_field_t *mp_fld_rst_sys_mmcm;
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index 4f7e57b5ad..3f02474f4e 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -30,6 +30,7 @@ sources = files(
'nthw/supported/nthw_fpga_9563_055_039_.c',
'nthw/supported/nthw_fpga_instances.c',
'nthw/supported/nthw_fpga_mod_str_map.c',
+'nthw/core/nt200a0x/clock_profiles/nthw_fpga_clk9563.c',
'nthw/core/nt200a0x/nthw_fpga_nt200a0x.c',
'nthw/core/nt200a0x/reset/nthw_fpga_rst9563.c',
'nthw/core/nt200a0x/reset/nthw_fpga_rst_nt200a0x.c',
@@ -38,6 +39,7 @@ sources = files(
'nthw/core/nthw_iic.c',
'nthw/core/nthw_pcie3.c',
'nthw/core/nthw_sdc.c',
+'nthw/core/nthw_si5340.c',
'nthw/model/nthw_fpga_model.c',
'nthw/nthw_platform.c',
'nthw/nthw_rac.c',
diff --git a/drivers/net/ntnic/nthw/core/include/nthw_core.h
b/drivers/net/ntnic/nthw/core/include/nthw_core.h
index 8bdf7ee01d..5648bd8983 100644
--- a/drivers/net/ntnic/nthw/core/include/nthw_core.h
+++ b/drivers/net/ntnic/nthw/core/include/nthw_core.h
@@ -18,5 +18,7 @@
#include "nthw_sdc.h"
+#include "nthw_si5340.h"
+
#endif /* __NTHW_CORE_H__ */
diff --git a/drivers/net/ntnic/nthw/core/include/nthw_fpga.h
b/drivers/net/ntnic/nthw/core/include/nthw_fpga.h
index 1df1480109..cee1d23090 100644
--- a/drivers/net/ntnic/nthw/core/include/nthw_fpga.h
+++ b/drivers/net/ntnic/nthw/core/include/nthw_fpga.h
@@ -24,6 +24,10 @@ int nthw_fpga_iic_scan(nthw_fpga_t *p_fpga, const int
n_instance_no_begin,
int nthw_fpga_silabs_detect(nthw_fpga_t *p_fpga, const int n_instance_no,
const int n_dev_addr,
const int n_page_reg_addr);
+int nthw_fpga_si5340_clock_synth_init_fmt2(nthw_fpga_t *p_fpga, const uint8_t
n_iic_addr,
+ const clk_profile_data_fmt2_t *p_clk_profile,
+ const int n_clk_profile_rec_cnt);
+
struct nt200a0x_ops {
int (*nthw_fpga_nt200a0x_init)(struct fpga_info_s *p_fpga_info);
};
diff --git a/drivers/net/ntnic/nthw/core/include/nthw_si5340.h
b/drivers/net/ntnic/nthw/core/include/nthw_si5340.h
new file mode
[PATCH v5 16/23] net/ntnic: add link management module
Add link control API
Signed-off-by: Serhii Iliushyk
---
v5
* Fix Typo/Spelling
---
drivers/net/ntnic/adapter/nt4ga_adapter.c | 6 +
drivers/net/ntnic/include/nt4ga_adapter.h | 5 +-
drivers/net/ntnic/include/nt4ga_link.h | 84 +++
drivers/net/ntnic/link_mgmt/nt4ga_link.c | 176 +++
drivers/net/ntnic/meson.build | 1 +
drivers/net/ntnic/ntnic_ethdev.c | 242 +
drivers/net/ntnic/ntnic_mod_reg.c | 14 ++
drivers/net/ntnic/ntnic_mod_reg.h | 50 -
drivers/net/ntnic/ntutil/include/nt_util.h | 11 +
drivers/net/ntnic/ntutil/nt_util.c | 131 +++
10 files changed, 718 insertions(+), 2 deletions(-)
create mode 100644 drivers/net/ntnic/include/nt4ga_link.h
create mode 100644 drivers/net/ntnic/link_mgmt/nt4ga_link.c
diff --git a/drivers/net/ntnic/adapter/nt4ga_adapter.c
b/drivers/net/ntnic/adapter/nt4ga_adapter.c
index a87a06204e..18089833d6 100644
--- a/drivers/net/ntnic/adapter/nt4ga_adapter.c
+++ b/drivers/net/ntnic/adapter/nt4ga_adapter.c
@@ -126,8 +126,14 @@ static int nt4ga_adapter_init(struct adapter_info_s
*p_adapter_info)
assert(n_phy_ports >= 1);
{
+ int i;
assert(fpga_info->n_fpga_prod_id > 0);
+ for (i = 0; i < NUM_ADAPTER_PORTS_MAX; i++) {
+ /* Disable all ports. Must be enabled later */
+ p_adapter_info->nt4ga_link.port_action[i].port_disable
= true;
+ }
+
switch (fpga_info->n_fpga_prod_id) {
/* NT200A01: 2x100G (Xilinx) */
case 9563: /* NT200A02 (Cap) */
diff --git a/drivers/net/ntnic/include/nt4ga_adapter.h
b/drivers/net/ntnic/include/nt4ga_adapter.h
index 2c72583caf..ed14936b38 100644
--- a/drivers/net/ntnic/include/nt4ga_adapter.h
+++ b/drivers/net/ntnic/include/nt4ga_adapter.h
@@ -6,7 +6,8 @@
#ifndef _NT4GA_ADAPTER_H_
#define _NT4GA_ADAPTER_H_
-#include "ntos_drv.h"
+#include "nt4ga_link.h"
+
typedef struct hw_info_s {
/* pciids */
uint16_t pci_vendor_id;
@@ -23,6 +24,8 @@ typedef struct hw_info_s {
} hw_info_t;
typedef struct adapter_info_s {
+ struct nt4ga_link_s nt4ga_link;
+
struct hw_info_s hw_info;
struct fpga_info_s fpga_info;
diff --git a/drivers/net/ntnic/include/nt4ga_link.h
b/drivers/net/ntnic/include/nt4ga_link.h
new file mode 100644
index 00..849261ce3a
--- /dev/null
+++ b/drivers/net/ntnic/include/nt4ga_link.h
@@ -0,0 +1,84 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef NT4GA_LINK_H_
+#define NT4GA_LINK_H_
+
+#include "ntos_drv.h"
+
+enum nt_link_state_e {
+ NT_LINK_STATE_UNKNOWN = 0, /* The link state has not been read yet
*/
+ NT_LINK_STATE_DOWN = 1, /* The link state is DOWN */
+ NT_LINK_STATE_UP = 2, /* The link state is UP */
+ NT_LINK_STATE_ERROR = 3 /* The link state could not be read */
+};
+
+typedef enum nt_link_state_e nt_link_state_t, *nt_link_state_p;
+
+enum nt_link_duplex_e {
+ NT_LINK_DUPLEX_UNKNOWN = 0,
+ NT_LINK_DUPLEX_HALF = 0x01, /* Half duplex */
+ NT_LINK_DUPLEX_FULL = 0x02, /* Full duplex */
+};
+
+typedef enum nt_link_duplex_e nt_link_duplex_t;
+
+enum nt_link_loopback_e {
+ NT_LINK_LOOPBACK_OFF = 0,
+ NT_LINK_LOOPBACK_HOST = 0x01, /* Host loopback mode */
+ NT_LINK_LOOPBACK_LINE = 0x02, /* Line loopback mode */
+};
+
+enum nt_link_auto_neg_e {
+ NT_LINK_AUTONEG_NA = 0,
+ NT_LINK_AUTONEG_MANUAL = 0x01,
+ NT_LINK_AUTONEG_OFF = NT_LINK_AUTONEG_MANUAL, /* Auto negotiation OFF
*/
+ NT_LINK_AUTONEG_AUTO = 0x02,
+ NT_LINK_AUTONEG_ON = NT_LINK_AUTONEG_AUTO, /* Auto negotiation ON
*/
+};
+
+typedef struct link_state_s {
+ bool link_disabled;
+ bool link_up;
+ enum nt_link_state_e link_state;
+ enum nt_link_state_e link_state_latched;
+} link_state_t;
+
+enum nt_link_speed_e {
+ NT_LINK_SPEED_UNKNOWN = 0,
+ NT_LINK_SPEED_10M = 0x01, /* 10 Mbps */
+ NT_LINK_SPEED_100M = 0x02, /* 100 Mbps */
+ NT_LINK_SPEED_1G = 0x04,/* 1 Gbps (Autoneg only) */
+ NT_LINK_SPEED_10G = 0x08, /* 10 Gbps (Autoneg only) */
+ NT_LINK_SPEED_40G = 0x10, /* 40 Gbps (Autoneg only) */
+ NT_LINK_SPEED_100G = 0x20, /* 100 Gbps (Autoneg only) */
+ NT_LINK_SPEED_50G = 0x40, /* 50 Gbps (Autoneg only) */
+ NT_LINK_SPEED_25G = 0x80, /* 25 Gbps (Autoneg only) */
+ NT_LINK_SPEED_END /* always keep this entry as the last in enum */
+};
+typedef enum nt_link_speed_e nt_link_speed_t;
+
+typedef struct link_info_s {
+ enum nt_link_speed_e link_speed;
+ enum nt_link_duplex_e link_duplex;
+ enum nt_link_auto_neg_e link_auto_neg;
+} link_info_t;
+
+typedef struct port_action_s {
+ bool port_disable;
+ enum nt_link_speed_e port_speed;
+
[PATCH v5 15/23] net/ntnic: add MAC and packet features
Add basic control for MAC addresses packets and queues
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/ntos_drv.h | 15 +++
drivers/net/ntnic/ntnic_ethdev.c | 39 ++--
2 files changed, 52 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ntnic/include/ntos_drv.h
b/drivers/net/ntnic/include/ntos_drv.h
index 0014e267ec..6fdffa8357 100644
--- a/drivers/net/ntnic/include/ntos_drv.h
+++ b/drivers/net/ntnic/include/ntos_drv.h
@@ -26,9 +26,24 @@ struct pmd_internals {
char name[20];
int n_intf_no;
int if_index;
+ int lpbk_mode;
+ uint8_t ts_multiplier;
+ uint16_t min_tx_pkt_size;
+ uint16_t max_tx_pkt_size;
+ unsigned int nb_rx_queues;
+ unsigned int nb_tx_queues;
uint32_t port;
uint32_t port_id;
+ /* Offset of the VF from the PF */
+ uint8_t vf_offset;
+ nt_meta_port_type_t type;
+ /* if a virtual port type - the vhid */
+ int vhid;
struct drv_s *p_drv;
+ /* Ethernet (MAC) addresses. Element number zero denotes default
address. */
+ struct rte_ether_addr eth_addrs[NUM_MAC_ADDRS_PER_PORT];
+ /* Multicast ethernet (MAC) addresses. */
+ struct rte_ether_addr mc_addrs[NUM_MULTICAST_ADDRS_PER_PORT];
struct pmd_internals *next;
};
diff --git a/drivers/net/ntnic/ntnic_ethdev.c b/drivers/net/ntnic/ntnic_ethdev.c
index 364ef8df17..2d2a228bdc 100644
--- a/drivers/net/ntnic/ntnic_ethdev.c
+++ b/drivers/net/ntnic/ntnic_ethdev.c
@@ -19,6 +19,9 @@
#include "ntnic_mod_reg.h"
#include "nt_util.h"
+#define HW_MAX_PKT_LEN (1)
+#define MAX_MTU (HW_MAX_PKT_LEN - RTE_ETHER_HDR_LEN - RTE_ETHER_CRC_LEN)
+
#define EXCEPTION_PATH_HID 0
/* Global static variables: */
@@ -108,6 +111,16 @@ eth_dev_infos_get(struct rte_eth_dev *eth_dev, struct
rte_eth_dev_info *dev_info
dev_info->if_index = internals->if_index;
dev_info->driver_name = internals->name;
+ dev_info->max_mac_addrs = NUM_MAC_ADDRS_PER_PORT;
+ dev_info->max_rx_pktlen = HW_MAX_PKT_LEN;
+ dev_info->max_mtu = MAX_MTU;
+
+ if (internals->p_drv) {
+ dev_info->max_rx_queues = internals->nb_rx_queues;
+ dev_info->max_tx_queues = internals->nb_tx_queues;
+
+ dev_info->min_rx_bufsize = 64;
+ }
return 0;
}
@@ -142,8 +155,8 @@ eth_dev_stop(struct rte_eth_dev *eth_dev)
{
struct pmd_internals *internals = (struct pmd_internals
*)eth_dev->data->dev_private;
- NT_LOG_DBGX(DEBUG, NTNIC, "Port %u, %u\n",
- internals->n_intf_no, internals->if_index);
+ NT_LOG_DBGX(DEBUG, NTNIC, "Port %u, %u, type %u\n",
+ internals->n_intf_no, internals->if_index, internals->type);
eth_dev->data->dev_link.link_status = RTE_ETH_LINK_DOWN;
return 0;
@@ -212,6 +225,9 @@ eth_fw_version_get(struct rte_eth_dev *eth_dev, char
*fw_version, size_t fw_size
{
struct pmd_internals *internals = (struct pmd_internals
*)eth_dev->data->dev_private;
+ if (internals->type == PORT_TYPE_VIRTUAL || internals->type ==
PORT_TYPE_OVERRIDE)
+ return 0;
+
fpga_info_t *fpga_info =
&internals->p_drv->ntdrv.adapter_info.fpga_info;
const int length = snprintf(fw_version, fw_size, "%03d-%04d-%02d-%02d",
fpga_info->n_fpga_type_id, fpga_info->n_fpga_prod_id,
@@ -384,6 +400,12 @@ nthw_pci_dev_init(struct rte_pci_device *pci_dev)
internals->pci_dev = pci_dev;
internals->n_intf_no = n_intf_no;
internals->if_index = n_intf_no;
+ internals->min_tx_pkt_size = 64;
+ internals->max_tx_pkt_size = 1;
+ internals->type = PORT_TYPE_PHYSICAL;
+ internals->vhid = -1;
+ internals->nb_rx_queues = nb_rx_queues;
+ internals->nb_tx_queues = nb_tx_queues;
/* Setup queue_ids */
@@ -399,6 +421,18 @@ nthw_pci_dev_init(struct rte_pci_device *pci_dev)
0 /*port*/, nb_tx_queues);
}
+ /* Set MAC address (but only if the MAC address is permitted) */
+ if (n_intf_no <
fpga_info->nthw_hw_info.vpd_info.mn_mac_addr_count) {
+ const uint64_t mac =
+
fpga_info->nthw_hw_info.vpd_info.mn_mac_addr_value + n_intf_no;
+ internals->eth_addrs[0].addr_bytes[0] = (mac >> 40) &
0xFFu;
+ internals->eth_addrs[0].addr_bytes[1] = (mac >> 32) &
0xFFu;
+ internals->eth_addrs[0].addr_bytes[2] = (mac >> 24) &
0xFFu;
+ internals->eth_addrs[0].addr_bytes[3] = (mac >> 16) &
0xFFu;
+ internals->eth_addrs[0].addr_bytes[4] = (mac >> 8) &
0xFFu;
+ internals->eth_addrs[0].addr_bytes[5] = (mac >> 0) &
0xFFu;
+ }
+
[PATCH v5 13/23] net/ntnic: add reset module for the NT200A0X smartNIC
Add API for reset NT200 and FW 9563
Signed-off-by: Serhii Iliushyk
---
v5
* Fix Typo/Spelling
---
.../include/ntnic_nthw_fpga_rst_nt200a0x.h| 81 +++
drivers/net/ntnic/meson.build | 3 +
.../net/ntnic/nthw/core/include/nthw_core.h | 2 +
.../net/ntnic/nthw/core/include/nthw_fpga.h | 6 +
.../net/ntnic/nthw/core/include/nthw_sdc.h| 42 ++
.../nthw/core/nt200a0x/nthw_fpga_nt200a0x.c | 24 +-
.../core/nt200a0x/reset/nthw_fpga_rst9563.c | 216 +++
.../nt200a0x/reset/nthw_fpga_rst_nt200a0x.c | 570 ++
drivers/net/ntnic/nthw/core/nthw_fpga.c | 82 +++
drivers/net/ntnic/nthw/core/nthw_sdc.c| 176 ++
drivers/net/ntnic/ntnic_mod_reg.c | 28 +
drivers/net/ntnic/ntnic_mod_reg.h | 20 +
12 files changed, 1249 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ntnic/include/ntnic_nthw_fpga_rst_nt200a0x.h
create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_sdc.h
create mode 100644
drivers/net/ntnic/nthw/core/nt200a0x/reset/nthw_fpga_rst9563.c
create mode 100644
drivers/net/ntnic/nthw/core/nt200a0x/reset/nthw_fpga_rst_nt200a0x.c
create mode 100644 drivers/net/ntnic/nthw/core/nthw_sdc.c
diff --git a/drivers/net/ntnic/include/ntnic_nthw_fpga_rst_nt200a0x.h
b/drivers/net/ntnic/include/ntnic_nthw_fpga_rst_nt200a0x.h
new file mode 100644
index 00..6ceec93bac
--- /dev/null
+++ b/drivers/net/ntnic/include/ntnic_nthw_fpga_rst_nt200a0x.h
@@ -0,0 +1,81 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2024 Napatech A/S
+ */
+
+#ifndef __NTNIC_NTHW_FPGA_RST_NT200A0X_H__
+#define __NTNIC_NTHW_FPGA_RST_NT200A0X_H__
+
+#include "nthw_drv.h"
+#include "nthw_fpga_model.h"
+
+struct nthw_fpga_rst_nt200a0x {
+ int mn_fpga_product_id;
+ int mn_fpga_version;
+ int mn_fpga_revision;
+
+ int mn_hw_id;
+
+ int mn_si_labs_clock_synth_model;
+
+ nthw_field_t *mp_fld_rst_sys;
+ nthw_field_t *mp_fld_rst_sys_mmcm;
+ nthw_field_t *mp_fld_rst_core_mmcm;
+ nthw_field_t *mp_fld_rst_rpp;
+ nthw_field_t *mp_fld_rst_ddr4;
+ nthw_field_t *mp_fld_rst_sdc;
+ nthw_field_t *mp_fld_rst_phy;
+ nthw_field_t *mp_fld_rst_serdes_rx;
+ nthw_field_t *mp_fld_rst_serdes_tx;
+ nthw_field_t *mp_fld_rst_serdes_rx_datapath;
+ nthw_field_t *mp_fld_rst_pcs_rx;
+ nthw_field_t *mp_fld_rst_mac_rx;
+ nthw_field_t *mp_fld_rst_mac_tx;
+ nthw_field_t *mp_fld_rst_ptp;
+ nthw_field_t *mp_fld_rst_ts;
+ nthw_field_t *mp_fld_rst_ptp_mmcm;
+ nthw_field_t *mp_fld_rst_ts_mmcm;
+ nthw_field_t *mp_fld_rst_periph;
+ nthw_field_t *mp_fld_rst_tsm_ref_mmcm;
+ nthw_field_t *mp_fld_rst_tmc;
+
+ /* CTRL register field pointers */
+ nthw_field_t *mp_fld_ctrl_ts_clk_sel_override;
+ nthw_field_t *mp_fld_ctrl_ts_clk_sel;
+ nthw_field_t *mp_fld_ctrl_ts_clk_sel_ref;
+ nthw_field_t *mp_fld_ctrl_ptp_mmcm_clk_sel;
+
+ /* STAT register field pointers */
+ nthw_field_t *mp_fld_stat_ddr4_mmcm_locked;
+ nthw_field_t *mp_fld_stat_sys_mmcm_locked;
+ nthw_field_t *mp_fld_stat_core_mmcm_locked;
+ nthw_field_t *mp_fld_stat_ddr4_pll_locked;
+ nthw_field_t *mp_fld_stat_ptp_mmcm_locked;
+ nthw_field_t *mp_fld_stat_ts_mmcm_locked;
+ nthw_field_t *mp_fld_stat_tsm_ref_mmcm_locked;
+
+ /* STICKY register field pointers */
+ nthw_field_t *mp_fld_sticky_ptp_mmcm_unlocked;
+ nthw_field_t *mp_fld_sticky_ts_mmcm_unlocked;
+ nthw_field_t *mp_fld_sticky_ddr4_mmcm_unlocked;
+ nthw_field_t *mp_fld_sticky_ddr4_pll_unlocked;
+ nthw_field_t *mp_fld_sticky_core_mmcm_unlocked;
+ nthw_field_t *mp_fld_sticky_pci_sys_mmcm_unlocked;
+ nthw_field_t *mp_fld_sticky_tsm_ref_mmcm_unlocked;
+
+ /* POWER register field pointers */
+ nthw_field_t *mp_fld_power_pu_phy;
+ nthw_field_t *mp_fld_power_pu_nseb;
+
+ void (*reset_serdes_rx)(struct nthw_fpga_rst_nt200a0x *p, uint32_t
intf_no, uint32_t rst);
+ void (*pcs_rx_rst)(struct nthw_fpga_rst_nt200a0x *p, uint32_t intf_no,
uint32_t rst);
+ void (*get_serdes_rx_rst)(struct nthw_fpga_rst_nt200a0x *p, uint32_t
intf_no,
+ uint32_t *p_set);
+ void (*get_pcs_rx_rst)(struct nthw_fpga_rst_nt200a0x *p, uint32_t
intf_no,
+ uint32_t *p_set);
+ bool (*is_rst_serdes_rx_datapath_implemented)(struct
nthw_fpga_rst_nt200a0x *p);
+};
+
+typedef struct nthw_fpga_rst_nt200a0x nthw_fpga_rst_nt200a0x_t;
+
+#endif /* __NTHW_FPGA_RST_NT200A0X_H__ */
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index 79d89b1031..4f7e57b5ad 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -31,10 +31,13 @@ sources = files(
'nthw/supported/nthw_fpga_instances.c',
'nthw/supported/nthw_fpga_mod_str_map.c',
'nthw/core/nt200a0x/nthw_fpga_nt200a0x.c',
+'nthw/core
[PATCH v5 17/23] net/ntnic: add link 100G module
Add ntnic 100G link support.
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/adapter/nt4ga_adapter.c | 12 -
.../link_mgmt/link_100g/nt4ga_link_100g.c | 49 +++
drivers/net/ntnic/meson.build | 1 +
drivers/net/ntnic/ntnic_mod_reg.c | 14 ++
drivers/net/ntnic/ntnic_mod_reg.h | 8 +++
5 files changed, 82 insertions(+), 2 deletions(-)
create mode 100644 drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
diff --git a/drivers/net/ntnic/adapter/nt4ga_adapter.c
b/drivers/net/ntnic/adapter/nt4ga_adapter.c
index 18089833d6..807c1dcde3 100644
--- a/drivers/net/ntnic/adapter/nt4ga_adapter.c
+++ b/drivers/net/ntnic/adapter/nt4ga_adapter.c
@@ -127,6 +127,7 @@ static int nt4ga_adapter_init(struct adapter_info_s
*p_adapter_info)
{
int i;
+ const struct link_ops_s *link_ops = NULL;
assert(fpga_info->n_fpga_prod_id > 0);
for (i = 0; i < NUM_ADAPTER_PORTS_MAX; i++) {
@@ -137,8 +138,15 @@ static int nt4ga_adapter_init(struct adapter_info_s
*p_adapter_info)
switch (fpga_info->n_fpga_prod_id) {
/* NT200A01: 2x100G (Xilinx) */
case 9563: /* NT200A02 (Cap) */
- NT_LOG(ERR, NTNIC, "NT200A02 100G link module
uninitialized\n");
- res = -1;
+ link_ops = get_100g_link_ops();
+
+ if (link_ops == NULL) {
+ NT_LOG(ERR, NTNIC, "NT200A02 100G link module
uninitialized\n");
+ res = -1;
+ break;
+ }
+
+ res = link_ops->link_init(p_adapter_info, p_fpga);
break;
default:
diff --git a/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
b/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
new file mode 100644
index 00..36c4bf031f
--- /dev/null
+++ b/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
@@ -0,0 +1,49 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include /* memcmp, memset */
+
+#include "nt_util.h"
+#include "ntlog.h"
+#include "ntnic_mod_reg.h"
+
+/*
+ * Initialize all ports
+ * The driver calls this function during initialization (of the driver).
+ */
+static int nt4ga_link_100g_ports_init(struct adapter_info_s *p_adapter_info,
nthw_fpga_t *fpga)
+{
+ (void)fpga;
+ const int adapter_no = p_adapter_info->adapter_no;
+ int res = 0;
+
+ NT_LOG(DBG, NTNIC, "%s: Initializing ports\n",
p_adapter_info->mp_adapter_id_str);
+
+ /*
+* Initialize global variables
+*/
+ assert(adapter_no >= 0 && adapter_no < NUM_ADAPTER_MAX);
+
+ if (res == 0 && !p_adapter_info->nt4ga_link.variables_initialized) {
+ if (res == 0) {
+ p_adapter_info->nt4ga_link.speed_capa =
NT_LINK_SPEED_100G;
+ p_adapter_info->nt4ga_link.variables_initialized = true;
+ }
+ }
+
+ return res;
+}
+
+/*
+ * Init 100G link ops variables
+ */
+static struct link_ops_s link_100g_ops = {
+ .link_init = nt4ga_link_100g_ports_init,
+};
+
+void link_100g_init(void)
+{
+ register_100g_link_ops(&link_100g_ops);
+}
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index 4d2559c46b..ace080c0b8 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -27,6 +27,7 @@ includes = [
# all sources
sources = files(
'adapter/nt4ga_adapter.c',
+'link_mgmt/link_100g/nt4ga_link_100g.c',
'link_mgmt/nt4ga_link.c',
'nthw/supported/nthw_fpga_9563_055_039_.c',
'nthw/supported/nthw_fpga_instances.c',
diff --git a/drivers/net/ntnic/ntnic_mod_reg.c
b/drivers/net/ntnic/ntnic_mod_reg.c
index b79929c696..40e22c60fa 100644
--- a/drivers/net/ntnic/ntnic_mod_reg.c
+++ b/drivers/net/ntnic/ntnic_mod_reg.c
@@ -5,6 +5,20 @@
#include "ntnic_mod_reg.h"
+static struct link_ops_s *link_100g_ops;
+
+void register_100g_link_ops(struct link_ops_s *ops)
+{
+ link_100g_ops = ops;
+}
+
+const struct link_ops_s *get_100g_link_ops(void)
+{
+ if (link_100g_ops == NULL)
+ link_100g_init();
+ return link_100g_ops;
+}
+
static const struct port_ops *port_ops;
void register_port_ops(const struct port_ops *ops)
diff --git a/drivers/net/ntnic/ntnic_mod_reg.h
b/drivers/net/ntnic/ntnic_mod_reg.h
index 8d1971a9c4..68629412b7 100644
--- a/drivers/net/ntnic/ntnic_mod_reg.h
+++ b/drivers/net/ntnic/ntnic_mod_reg.h
@@ -13,6 +13,14 @@
#include "nt4ga_adapter.h"
#include "ntnic_nthw_fpga_rst_nt200a0x.h"
+struct link_ops_s {
+ int (*link_init)(struct adapter_info_s *p_adapter_info, nthw_fpga_t
*p_fpga);
+};
+
+void register_100g_link_ops(struct link_ops_s *ops);
+const struct link_ops_s *get_100g_link_ops(void);
+vo
[PATCH v5 19/23] net/ntnic: add QSFP support
Includes support for QSFP and QSFP+.
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/ntnic_nim.h | 10 +
.../link_mgmt/link_100g/nt4ga_link_100g.c | 12 +-
drivers/net/ntnic/nim/i2c_nim.c | 310 +-
drivers/net/ntnic/nim/i2c_nim.h | 14 +-
drivers/net/ntnic/nim/nim_defines.h | 3 +
drivers/net/ntnic/nim/qsfp_registers.h| 43 +++
6 files changed, 389 insertions(+), 3 deletions(-)
create mode 100644 drivers/net/ntnic/nim/qsfp_registers.h
diff --git a/drivers/net/ntnic/include/ntnic_nim.h
b/drivers/net/ntnic/include/ntnic_nim.h
index 263875a857..300842b570 100644
--- a/drivers/net/ntnic/include/ntnic_nim.h
+++ b/drivers/net/ntnic/include/ntnic_nim.h
@@ -15,6 +15,8 @@ typedef enum i2c_type {
enum nt_port_type_e {
NT_PORT_TYPE_NOT_AVAILABLE = 0, /* The NIM/port type is not available
(unknown) */
NT_PORT_TYPE_NOT_RECOGNISED,/* The NIM/port type not recognized */
+ NT_PORT_TYPE_QSFP_PLUS_NOT_PRESENT, /* QSFP type but slot is empty
*/
+ NT_PORT_TYPE_QSFP_PLUS, /* QSFP type */
};
typedef enum nt_port_type_e nt_port_type_t, *nt_port_type_p;
@@ -51,6 +53,14 @@ typedef struct nim_i2c_ctx {
bool tx_disable;
bool dmi_supp;
+ union {
+ struct {
+ bool rx_only;
+ union {
+ } specific_u;
+ } qsfp;
+
+ } specific_u;
} nim_i2c_ctx_t, *nim_i2c_ctx_p;
struct nim_sensor_group {
diff --git a/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
b/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
index 4c159431e1..1f4ed62498 100644
--- a/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
+++ b/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
@@ -18,6 +18,7 @@ static int _create_nim(adapter_info_t *drv, int port)
int res = 0;
const uint8_t valid_nim_id = 17U;
nim_i2c_ctx_t *nim_ctx;
+ sfp_nim_state_t nim;
nt4ga_link_t *link_info = &drv->nt4ga_link;
assert(port >= 0 && port < NUM_ADAPTER_PORTS_MAX);
@@ -31,11 +32,20 @@ static int _create_nim(adapter_info_t *drv, int port)
*/
nt_os_wait_usec(100); /* pause 1.0s */
- res = construct_and_preinit_nim(nim_ctx);
+ res = construct_and_preinit_nim(nim_ctx, NULL);
if (res)
return res;
+ res = nim_state_build(nim_ctx, &nim);
+
+ if (res)
+ return res;
+
+ NT_LOG(DBG, NTHW, "%s: NIM id = %u (%s), br = %u, vendor = '%s', pn =
'%s', sn='%s'\n",
+ drv->mp_port_id_str[port], nim_ctx->nim_id,
nim_id_to_text(nim_ctx->nim_id), nim.br,
+ nim_ctx->vendor_name, nim_ctx->prod_no, nim_ctx->serial_no);
+
/*
* Does the driver support the NIM module type?
*/
diff --git a/drivers/net/ntnic/nim/i2c_nim.c b/drivers/net/ntnic/nim/i2c_nim.c
index 2918eda072..4831078a2c 100644
--- a/drivers/net/ntnic/nim/i2c_nim.c
+++ b/drivers/net/ntnic/nim/i2c_nim.c
@@ -10,6 +10,7 @@
#include "ntlog.h"
#include "nt_util.h"
#include "ntnic_mod_reg.h"
+#include "qsfp_registers.h"
#include "nim_defines.h"
#define NIM_READ false
@@ -17,6 +18,25 @@
#define NIM_PAGE_SEL_REGISTER 127
#define NIM_I2C_0XA0 0xA0 /* Basic I2C address */
+
+static bool page_addressing(nt_nim_identifier_t id)
+{
+ switch (id) {
+ case NT_NIM_QSFP:
+ case NT_NIM_QSFP_PLUS:
+ return true;
+
+ default:
+ NT_LOG(DBG, NTNIC, "Unknown NIM identifier %d\n", id);
+ return false;
+ }
+}
+
+static nt_nim_identifier_t translate_nimid(const nim_i2c_ctx_t *ctx)
+{
+ return (nt_nim_identifier_t)ctx->nim_id;
+}
+
static int nim_read_write_i2c_data(nim_i2c_ctx_p ctx, bool do_write, uint16_t
lin_addr,
uint8_t i2c_addr, uint8_t a_reg_addr, uint8_t seq_cnt,
uint8_t *p_data)
@@ -158,6 +178,13 @@ static int nim_read_write_data_lin(nim_i2c_ctx_p ctx, bool
m_page_addressing, ui
return 0;
}
+static int read_data_lin(nim_i2c_ctx_p ctx, uint16_t lin_addr, uint16_t
length, void *data)
+{
+ /* Wrapper for using Mutex for QSFP TODO */
+ return nim_read_write_data_lin(ctx, page_addressing(ctx->nim_id),
lin_addr, length, data,
+ NIM_READ);
+}
+
static int nim_read_id(nim_i2c_ctx_t *ctx)
{
/* We are only reading the first byte so we don't care about pages
here. */
@@ -205,20 +232,301 @@ static int i2c_nim_common_construct(nim_i2c_ctx_p ctx)
return 0;
}
+/*
+ * Read vendor information at a certain address. Any trailing whitespace is
+ * removed and a missing string termination in the NIM data is handled.
+ */
+static int nim_read_vendor_info(nim_i2c_ctx_p ctx, uint16_t addr, uint8_t
max_len, char *p_data)
+{
+ const bool pg_addr = page_addressing(ctx->nim_id);
+ int i;
+ /* Subtract "1" from max_len that in
[PATCH v5 21/23] net/ntnic: add GPIO PHY module
Add GPIO API for communication with NIM
Signed-off-by: Serhii Iliushyk
---
v5
* Fix Typo/Spelling
---
drivers/net/ntnic/include/nt4ga_link.h| 1 +
.../link_mgmt/link_100g/nt4ga_link_100g.c | 71 -
drivers/net/ntnic/meson.build | 1 +
.../net/ntnic/nthw/core/include/nthw_core.h | 1 +
.../ntnic/nthw/core/include/nthw_gpio_phy.h | 48 ++
drivers/net/ntnic/nthw/core/nthw_gpio_phy.c | 145 ++
6 files changed, 263 insertions(+), 4 deletions(-)
create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_gpio_phy.h
create mode 100644 drivers/net/ntnic/nthw/core/nthw_gpio_phy.c
diff --git a/drivers/net/ntnic/include/nt4ga_link.h
b/drivers/net/ntnic/include/nt4ga_link.h
index 0851057f81..5a16afea2a 100644
--- a/drivers/net/ntnic/include/nt4ga_link.h
+++ b/drivers/net/ntnic/include/nt4ga_link.h
@@ -78,6 +78,7 @@ typedef struct port_action_s {
typedef struct adapter_100g_s {
nim_i2c_ctx_t nim_ctx[NUM_ADAPTER_PORTS_MAX]; /* Should be the first
field */
+ nthw_gpio_phy_t gpio_phy[NUM_ADAPTER_PORTS_MAX];
} adapter_100g_t;
typedef union adapter_var_s {
diff --git a/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
b/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
index 1f4ed62498..499f5de8eb 100644
--- a/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
+++ b/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
@@ -10,13 +10,24 @@
#include "i2c_nim.h"
#include "ntnic_mod_reg.h"
+/*
+ * Check whether a NIM module is present
+ */
+static bool _nim_is_present(nthw_gpio_phy_t *gpio_phy, uint8_t if_no)
+{
+ assert(if_no < NUM_ADAPTER_PORTS_MAX);
+
+ return nthw_gpio_phy_is_module_present(gpio_phy, if_no);
+}
+
/*
* Initialize NIM, Code based on nt200e3_2_ptp.cpp: MyPort::createNim()
*/
-static int _create_nim(adapter_info_t *drv, int port)
+static int _create_nim(adapter_info_t *drv, int port, bool enable)
{
int res = 0;
const uint8_t valid_nim_id = 17U;
+ nthw_gpio_phy_t *gpio_phy;
nim_i2c_ctx_t *nim_ctx;
sfp_nim_state_t nim;
nt4ga_link_t *link_info = &drv->nt4ga_link;
@@ -24,14 +35,43 @@ static int _create_nim(adapter_info_t *drv, int port)
assert(port >= 0 && port < NUM_ADAPTER_PORTS_MAX);
assert(link_info->variables_initialized);
+ gpio_phy = &link_info->u.var100g.gpio_phy[port];
nim_ctx = &link_info->u.var100g.nim_ctx[port];
+ /*
+* Check NIM is present before doing GPIO PHY reset.
+*/
+ if (!_nim_is_present(gpio_phy, (uint8_t)port)) {
+ NT_LOG(INF, NTNIC, "%s: NIM module is absent\n",
drv->mp_port_id_str[port]);
+ return 0;
+ }
+
+ /*
+* Perform PHY reset.
+*/
+ NT_LOG(DBG, NTNIC, "%s: Performing NIM reset\n",
drv->mp_port_id_str[port]);
+ nthw_gpio_phy_set_reset(gpio_phy, (uint8_t)port, true);
+ nt_os_wait_usec(10);/* pause 0.1s */
+ nthw_gpio_phy_set_reset(gpio_phy, (uint8_t)port, false);
+
/*
* Wait a little after a module has been inserted before trying to
access I2C
* data, otherwise the module will not respond correctly.
*/
nt_os_wait_usec(100); /* pause 1.0s */
+ if (!_nim_is_present(gpio_phy, (uint8_t)port)) {
+ NT_LOG(DBG, NTNIC, "%s: NIM module is no longer absent!\n",
+ drv->mp_port_id_str[port]);
+ return -1;
+ }
+
+ if (!_nim_is_present(gpio_phy, (uint8_t)port)) {
+ NT_LOG(DBG, NTNIC, "%s: NIM module is no longer absent!\n",
+ drv->mp_port_id_str[port]);
+ return -1;
+ }
+
res = construct_and_preinit_nim(nim_ctx, NULL);
if (res)
@@ -57,6 +97,15 @@ static int _create_nim(adapter_info_t *drv, int port)
return -1;
}
+ if (enable) {
+ NT_LOG(DBG, NTNIC, "%s: De-asserting low power\n",
drv->mp_port_id_str[port]);
+ nthw_gpio_phy_set_low_power(gpio_phy, (uint8_t)port, false);
+
+ } else {
+ NT_LOG(DBG, NTNIC, "%s: Asserting low power\n",
drv->mp_port_id_str[port]);
+ nthw_gpio_phy_set_low_power(gpio_phy, (uint8_t)port, true);
+ }
+
return res;
}
@@ -89,7 +138,7 @@ static int _port_init(adapter_info_t *drv, int port)
/* Phase 3. Link state machine steps */
/* 3.1) Create NIM, ::createNim() */
- res = _create_nim(drv, port);
+ res = _create_nim(drv, port, true);
if (res) {
NT_LOG(WRN, NTNIC, "%s: NIM initialization failed\n",
drv->mp_port_id_str[port]);
@@ -115,6 +164,7 @@ static int _common_ptp_nim_state_machine(void *data)
uint32_t last_lpbk_mode[NUM_ADAPTER_PORTS_MAX];
link_state_t *link_state;
+ nthw_gpio_phy_t *gpio_phy;
if (!fpga) {
NT_LOG(ERR, NTNIC, "%s: fpga is
[PATCH v5 23/23] net/ntnic: add GMF (Generic MAC Feeder) module
Add API for Generic MAC Feeder
Signed-off-by: Serhii Iliushyk
---
.../link_mgmt/link_100g/nt4ga_link_100g.c | 8 ++
drivers/net/ntnic/meson.build | 1 +
.../net/ntnic/nthw/core/include/nthw_core.h | 1 +
.../net/ntnic/nthw/core/include/nthw_gmf.h| 64 +
drivers/net/ntnic/nthw/core/nthw_gmf.c| 133 ++
5 files changed, 207 insertions(+)
create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_gmf.h
create mode 100644 drivers/net/ntnic/nthw/core/nthw_gmf.c
diff --git a/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
b/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
index 9d55733ddc..da570256f1 100644
--- a/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
+++ b/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
@@ -404,6 +404,14 @@ static int _port_init(adapter_info_t *drv, nthw_fpga_t
*fpga, int port)
_enable_tx(drv, mac_pcs);
_reset_rx(drv, mac_pcs);
+ /* 2.2) Nt4gaPort::setup() */
+ if (nthw_gmf_init(NULL, fpga, port) == 0) {
+ nthw_gmf_t gmf;
+
+ if (nthw_gmf_init(&gmf, fpga, port) == 0)
+ nthw_gmf_set_enable(&gmf, true);
+ }
+
/* Phase 3. Link state machine steps */
/* 3.1) Create NIM, ::createNim() */
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index 77f87ffa8e..4ae9358073 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -39,6 +39,7 @@ sources = files(
'nthw/core/nt200a0x/reset/nthw_fpga_rst9563.c',
'nthw/core/nt200a0x/reset/nthw_fpga_rst_nt200a0x.c',
'nthw/core/nthw_fpga.c',
+'nthw/core/nthw_gmf.c',
'nthw/core/nthw_gpio_phy.c',
'nthw/core/nthw_hif.c',
'nthw/core/nthw_i2cm.c',
diff --git a/drivers/net/ntnic/nthw/core/include/nthw_core.h
b/drivers/net/ntnic/nthw/core/include/nthw_core.h
index fe32891712..4073f9632c 100644
--- a/drivers/net/ntnic/nthw/core/include/nthw_core.h
+++ b/drivers/net/ntnic/nthw/core/include/nthw_core.h
@@ -17,6 +17,7 @@
#include "nthw_iic.h"
#include "nthw_i2cm.h"
+#include "nthw_gmf.h"
#include "nthw_gpio_phy.h"
#include "nthw_mac_pcs.h"
#include "nthw_sdc.h"
diff --git a/drivers/net/ntnic/nthw/core/include/nthw_gmf.h
b/drivers/net/ntnic/nthw/core/include/nthw_gmf.h
new file mode 100644
index 00..cc5be85154
--- /dev/null
+++ b/drivers/net/ntnic/nthw/core/include/nthw_gmf.h
@@ -0,0 +1,64 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __NTHW_GMF_H__
+#define __NTHW_GMF_H__
+
+struct nthw_gmf {
+ nthw_fpga_t *mp_fpga;
+ nthw_module_t *mp_mod_gmf;
+ int mn_instance;
+
+ nthw_register_t *mp_ctrl;
+ nthw_field_t *mp_ctrl_enable;
+ nthw_field_t *mp_ctrl_ifg_enable;
+ nthw_field_t *mp_ctrl_ifg_tx_now_always;
+ nthw_field_t *mp_ctrl_ifg_tx_on_ts_always;
+ nthw_field_t *mp_ctrl_ifg_tx_on_ts_adjust_on_set_clock;
+ nthw_field_t *mp_ctrl_ifg_auto_adjust_enable;
+ nthw_field_t *mp_ctrl_ts_inject_always;
+ nthw_field_t *mp_ctrl_fcs_always;
+
+ nthw_register_t *mp_speed;
+ nthw_field_t *mp_speed_ifg_speed;
+
+ nthw_register_t *mp_ifg_clock_delta;
+ nthw_field_t *mp_ifg_clock_delta_delta;
+
+ nthw_register_t *mp_ifg_clock_delta_adjust;
+ nthw_field_t *mp_ifg_clock_delta_adjust_delta;
+
+ nthw_register_t *mp_ifg_max_adjust_slack;
+ nthw_field_t *mp_ifg_max_adjust_slack_slack;
+
+ nthw_register_t *mp_debug_lane_marker;
+ nthw_field_t *mp_debug_lane_marker_compensation;
+
+ nthw_register_t *mp_stat_sticky;
+ nthw_field_t *mp_stat_sticky_data_underflowed;
+ nthw_field_t *mp_stat_sticky_ifg_adjusted;
+
+ nthw_register_t *mp_stat_next_pkt;
+ nthw_field_t *mp_stat_next_pkt_ns;
+
+ nthw_register_t *mp_stat_max_delayed_pkt;
+ nthw_field_t *mp_stat_max_delayed_pkt_ns;
+
+ nthw_register_t *mp_ts_inject;
+ nthw_field_t *mp_ts_inject_offset;
+ nthw_field_t *mp_ts_inject_pos;
+ int mn_param_gmf_ifg_speed_mul;
+ int mn_param_gmf_ifg_speed_div;
+
+ bool m_administrative_block;/* Used to enforce license expiry */
+};
+
+typedef struct nthw_gmf nthw_gmf_t;
+
+int nthw_gmf_init(nthw_gmf_t *p, nthw_fpga_t *p_fpga, int n_instance);
+
+void nthw_gmf_set_enable(nthw_gmf_t *p, bool enable);
+
+#endif /* __NTHW_GMF_H__ */
diff --git a/drivers/net/ntnic/nthw/core/nthw_gmf.c
b/drivers/net/ntnic/nthw/core/nthw_gmf.c
new file mode 100644
index 00..a56fb80d3a
--- /dev/null
+++ b/drivers/net/ntnic/nthw/core/nthw_gmf.c
@@ -0,0 +1,133 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include
+#include
+#include "ntlog.h"
+
+#include "nthw_drv.h"
+#include "nthw_register.h"
+
+#include "nthw_gmf.h"
+
+int nthw_gmf_init(nthw_gmf_t *p, nthw_fpga_t *p_fpga, int n_instance)
+{
+ nthw_module_t *m
[PATCH v5 20/23] net/ntnic: add QSFP28 support
Includes support for QSFP28
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/ntnic_nim.h| 21 ++
drivers/net/ntnic/link_mgmt/nt4ga_link.c | 25 +++
drivers/net/ntnic/nim/i2c_nim.c | 267 ++-
drivers/net/ntnic/nim/nim_defines.h | 1 +
4 files changed, 313 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ntnic/include/ntnic_nim.h
b/drivers/net/ntnic/include/ntnic_nim.h
index 300842b570..f3bd159130 100644
--- a/drivers/net/ntnic/include/ntnic_nim.h
+++ b/drivers/net/ntnic/include/ntnic_nim.h
@@ -17,6 +17,19 @@ enum nt_port_type_e {
NT_PORT_TYPE_NOT_RECOGNISED,/* The NIM/port type not recognized */
NT_PORT_TYPE_QSFP_PLUS_NOT_PRESENT, /* QSFP type but slot is empty
*/
NT_PORT_TYPE_QSFP_PLUS, /* QSFP type */
+ NT_PORT_TYPE_QSFP28_NOT_PRESENT,/* QSFP28 type but slot is empty */
+ NT_PORT_TYPE_QSFP28,/* QSFP28 type */
+ NT_PORT_TYPE_QSFP28_SR4,/* QSFP28-SR4 type */
+ NT_PORT_TYPE_QSFP28_LR4,/* QSFP28-LR4 type */
+ NT_PORT_TYPE_QSFP28_CR_CA_L,/* QSFP28-CR-CA-L type */
+ NT_PORT_TYPE_QSFP28_CR_CA_S,/* QSFP28-CR-CA-S type */
+ NT_PORT_TYPE_QSFP28_CR_CA_N,/* QSFP28-CR-CA-N type */
+ /* QSFP28-FR type. Uses PAM4 modulation on one lane only */
+ NT_PORT_TYPE_QSFP28_FR,
+ /* QSFP28-DR type. Uses PAM4 modulation on one lane only */
+ NT_PORT_TYPE_QSFP28_DR,
+ /* QSFP28-LR type. Uses PAM4 modulation on one lane only */
+ NT_PORT_TYPE_QSFP28_LR,
};
typedef enum nt_port_type_e nt_port_type_t, *nt_port_type_p;
@@ -56,7 +69,15 @@ typedef struct nim_i2c_ctx {
union {
struct {
bool rx_only;
+ bool qsfp28;
union {
+ struct {
+ uint8_t rev_compliance;
+ bool media_side_fec_ctrl;
+ bool host_side_fec_ctrl;
+ bool media_side_fec_ena;
+ bool host_side_fec_ena;
+ } qsfp28;
} specific_u;
} qsfp;
diff --git a/drivers/net/ntnic/link_mgmt/nt4ga_link.c
b/drivers/net/ntnic/link_mgmt/nt4ga_link.c
index bc362776fc..4dc1c3d467 100644
--- a/drivers/net/ntnic/link_mgmt/nt4ga_link.c
+++ b/drivers/net/ntnic/link_mgmt/nt4ga_link.c
@@ -140,6 +140,26 @@ static uint32_t nt4ga_port_get_loopback_mode(struct
adapter_info_s *p, int port)
return p_link->port_action[port].port_lpbk_mode;
}
+/*
+ * port: tx power
+ */
+static int nt4ga_port_tx_power(struct adapter_info_s *p, int port, bool
disable)
+{
+ nt4ga_link_t *link_info = &p->nt4ga_link;
+
+ if (link_info->u.nim_ctx[port].port_type == NT_PORT_TYPE_QSFP28_SR4 ||
+ link_info->u.nim_ctx[port].port_type == NT_PORT_TYPE_QSFP28 ||
+ link_info->u.nim_ctx[port].port_type ==
NT_PORT_TYPE_QSFP28_LR4) {
+ nim_i2c_ctx_t *nim_ctx = &link_info->u.var100g.nim_ctx[port];
+
+ if (!nim_ctx->specific_u.qsfp.rx_only) {
+ if (nim_qsfp_plus_nim_set_tx_laser_disable(nim_ctx,
disable, -1) != 0)
+ return 1;
+ }
+ }
+
+ return 0;
+}
static const struct port_ops ops = {
.get_nim_present = nt4ga_port_get_nim_present,
@@ -181,6 +201,11 @@ static const struct port_ops ops = {
.get_loopback_mode = nt4ga_port_get_loopback_mode,
.get_link_speed_capabilities = nt4ga_port_get_link_speed_capabilities,
+
+ /*
+* port: tx power
+*/
+ .tx_power = nt4ga_port_tx_power,
};
void port_init(void)
diff --git a/drivers/net/ntnic/nim/i2c_nim.c b/drivers/net/ntnic/nim/i2c_nim.c
index 4831078a2c..10848029ee 100644
--- a/drivers/net/ntnic/nim/i2c_nim.c
+++ b/drivers/net/ntnic/nim/i2c_nim.c
@@ -24,6 +24,7 @@ static bool page_addressing(nt_nim_identifier_t id)
switch (id) {
case NT_NIM_QSFP:
case NT_NIM_QSFP_PLUS:
+ case NT_NIM_QSFP28:
return true;
default:
@@ -185,6 +186,14 @@ static int read_data_lin(nim_i2c_ctx_p ctx, uint16_t
lin_addr, uint16_t length,
NIM_READ);
}
+/* Read and return a single byte */
+static uint8_t read_byte(nim_i2c_ctx_p ctx, uint16_t addr)
+{
+ uint8_t data;
+ read_data_lin(ctx, addr, sizeof(data), &data);
+ return data;
+}
+
static int nim_read_id(nim_i2c_ctx_t *ctx)
{
/* We are only reading the first byte so we don't care about pages
here. */
@@ -294,8 +303,12 @@ static int qsfp_nim_state_build(nim_i2c_ctx_t *ctx,
sfp_nim_state_t *state)
state->br = 103U; /* QSFP+: 4 x 10G = 40G */
break;
+ case 17U:
+ state->br = 255U; /* QSFP28: 4 x 25G = 100G */
+
[PATCH v5 18/23] net/ntnic: add NIM module
Add API for control NIM
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/adapter/nt4ga_adapter.c | 34 +++
drivers/net/ntnic/include/nt4ga_adapter.h | 3 +
drivers/net/ntnic/include/nt4ga_link.h| 13 +
drivers/net/ntnic/include/ntnic_nim.h | 61 +
.../link_mgmt/link_100g/nt4ga_link_100g.c | 214 -
drivers/net/ntnic/link_mgmt/nt4ga_link.c | 13 +
drivers/net/ntnic/meson.build | 3 +
drivers/net/ntnic/nim/i2c_nim.c | 224 ++
drivers/net/ntnic/nim/i2c_nim.h | 24 ++
drivers/net/ntnic/nim/nim_defines.h | 29 +++
.../net/ntnic/nthw/core/include/nthw_core.h | 1 +
.../net/ntnic/nthw/core/include/nthw_i2cm.h | 50
drivers/net/ntnic/nthw/core/nthw_fpga.c | 3 +
drivers/net/ntnic/nthw/core/nthw_i2cm.c | 192 +++
drivers/net/ntnic/nthw/nthw_drv.h | 1 +
drivers/net/ntnic/ntnic_mod_reg.h | 7 +
16 files changed, 871 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ntnic/include/ntnic_nim.h
create mode 100644 drivers/net/ntnic/nim/i2c_nim.c
create mode 100644 drivers/net/ntnic/nim/i2c_nim.h
create mode 100644 drivers/net/ntnic/nim/nim_defines.h
create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_i2cm.h
create mode 100644 drivers/net/ntnic/nthw/core/nthw_i2cm.c
diff --git a/drivers/net/ntnic/adapter/nt4ga_adapter.c
b/drivers/net/ntnic/adapter/nt4ga_adapter.c
index 807c1dcde3..b22ffd6cef 100644
--- a/drivers/net/ntnic/adapter/nt4ga_adapter.c
+++ b/drivers/net/ntnic/adapter/nt4ga_adapter.c
@@ -9,6 +9,32 @@
#include "nthw_fpga.h"
#include "ntnic_mod_reg.h"
+/*
+ * Global variables shared by NT adapter types
+ */
+rte_thread_t monitor_tasks[NUM_ADAPTER_MAX];
+volatile int monitor_task_is_running[NUM_ADAPTER_MAX];
+
+/*
+ * Signal-handler to stop all monitor threads
+ */
+static void stop_monitor_tasks(int signum)
+{
+ const size_t N = ARRAY_SIZE(monitor_task_is_running);
+ size_t i;
+
+ /* Stop all monitor tasks */
+ for (i = 0; i < N; i++) {
+ const int is_running = monitor_task_is_running[i];
+ monitor_task_is_running[i] = 0;
+
+ if (signum == -1 && is_running != 0) {
+ rte_thread_join(monitor_tasks[i], NULL);
+ memset(&monitor_tasks[i], 0, sizeof(monitor_tasks[0]));
+ }
+ }
+}
+
static int nt4ga_adapter_show_info(struct adapter_info_s *p_adapter_info, FILE
*pfh)
{
const char *const p_dev_name = p_adapter_info->p_dev_name;
@@ -35,6 +61,9 @@ static int nt4ga_adapter_show_info(struct adapter_info_s
*p_adapter_info, FILE *
p_fpga_info->n_fpga_ver_id, p_fpga_info->n_fpga_rev_id,
p_fpga_info->n_fpga_ident,
p_fpga_info->n_fpga_build_time);
fprintf(pfh, "%s: FpgaDebugMode=0x%x\n", p_adapter_id_str,
p_fpga_info->n_fpga_debug_mode);
+ fprintf(pfh, "%s: Nims=%d PhyPorts=%d PhyQuads=%d RxPorts=%d
TxPorts=%d\n",
+ p_adapter_id_str, p_fpga_info->n_nims, p_fpga_info->n_phy_ports,
+ p_fpga_info->n_phy_quads, p_fpga_info->n_rx_ports,
p_fpga_info->n_tx_ports);
fprintf(pfh, "%s: Hw=0x%02X_rev%d: %s\n", p_adapter_id_str,
p_hw_info->hw_platform_id,
p_fpga_info->nthw_hw_info.hw_id,
p_fpga_info->nthw_hw_info.hw_plat_id_str);
fprintf(pfh, "%s: MCU Details:\n", p_adapter_id_str);
@@ -56,6 +85,7 @@ static int nt4ga_adapter_init(struct adapter_info_s
*p_adapter_info)
* (nthw_fpga_init())
*/
int n_phy_ports = -1;
+ int n_nim_ports = -1;
int res = -1;
nthw_fpga_t *p_fpga = NULL;
@@ -124,6 +154,8 @@ static int nt4ga_adapter_init(struct adapter_info_s
*p_adapter_info)
assert(p_fpga);
n_phy_ports = fpga_info->n_phy_ports;
assert(n_phy_ports >= 1);
+ n_nim_ports = fpga_info->n_nims;
+ assert(n_nim_ports >= 1);
{
int i;
@@ -173,6 +205,8 @@ static int nt4ga_adapter_deinit(struct adapter_info_s
*p_adapter_info)
int i;
int res;
+ stop_monitor_tasks(-1);
+
nthw_fpga_shutdown(&p_adapter_info->fpga_info);
/* Rac rab reset flip flop */
diff --git a/drivers/net/ntnic/include/nt4ga_adapter.h
b/drivers/net/ntnic/include/nt4ga_adapter.h
index ed14936b38..4b204742a2 100644
--- a/drivers/net/ntnic/include/nt4ga_adapter.h
+++ b/drivers/net/ntnic/include/nt4ga_adapter.h
@@ -39,5 +39,8 @@ typedef struct adapter_info_s {
int n_tx_host_buffers;
} adapter_info_t;
+extern rte_thread_t monitor_tasks[NUM_ADAPTER_MAX];
+extern volatile int monitor_task_is_running[NUM_ADAPTER_MAX];
+
#endif /* _NT4GA_ADAPTER_H_ */
diff --git a/drivers/net/ntnic/include/nt4ga_link.h
b/drivers/net/ntnic/include/nt4ga_link.h
index 849261ce3a..0851057f81 100644
--- a/drivers/net/ntnic/include/nt4ga_link.h
+++ b/drivers/net/ntnic/include/nt4ga_lin
[PATCH v5 22/23] net/ntnic: add MAC PCS register interface module
Add API for MAC and PCS(Physical Coding Sublayer)
Signed-off-by: Serhii Iliushyk
---
drivers/net/ntnic/include/nt4ga_link.h| 1 +
.../link_mgmt/link_100g/nt4ga_link_100g.c | 393 +++-
drivers/net/ntnic/meson.build | 1 +
.../net/ntnic/nthw/core/include/nthw_core.h | 1 +
.../ntnic/nthw/core/include/nthw_mac_pcs.h| 250 +
drivers/net/ntnic/nthw/core/nthw_mac_pcs.c| 894 ++
6 files changed, 1538 insertions(+), 2 deletions(-)
create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_mac_pcs.h
create mode 100644 drivers/net/ntnic/nthw/core/nthw_mac_pcs.c
diff --git a/drivers/net/ntnic/include/nt4ga_link.h
b/drivers/net/ntnic/include/nt4ga_link.h
index 5a16afea2a..8366484830 100644
--- a/drivers/net/ntnic/include/nt4ga_link.h
+++ b/drivers/net/ntnic/include/nt4ga_link.h
@@ -78,6 +78,7 @@ typedef struct port_action_s {
typedef struct adapter_100g_s {
nim_i2c_ctx_t nim_ctx[NUM_ADAPTER_PORTS_MAX]; /* Should be the first
field */
+ nthw_mac_pcs_t mac_pcs100g[NUM_ADAPTER_PORTS_MAX];
nthw_gpio_phy_t gpio_phy[NUM_ADAPTER_PORTS_MAX];
} adapter_100g_t;
diff --git a/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
b/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
index 499f5de8eb..9d55733ddc 100644
--- a/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
+++ b/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
@@ -10,6 +10,168 @@
#include "i2c_nim.h"
#include "ntnic_mod_reg.h"
+/*
+ * Swap tx/rx polarity
+ */
+static int _swap_tx_rx_polarity(adapter_info_t *drv, nthw_mac_pcs_t *mac_pcs,
int port, bool swap)
+{
+ const bool tx_polarity_swap[2][4] = { { true, true, false, false },
+ { false, true, false, false }
+ };
+ const bool rx_polarity_swap[2][4] = { { false, true, true, true },
+ { false, true, true, false }
+ };
+ uint8_t lane;
+
+ (void)drv;
+
+ for (lane = 0U; lane < 4U; lane++) {
+ if (swap) {
+ nthw_mac_pcs_swap_gty_tx_polarity(mac_pcs, lane,
+ tx_polarity_swap[port][lane]);
+ nthw_mac_pcs_swap_gty_rx_polarity(mac_pcs, lane,
+ rx_polarity_swap[port][lane]);
+
+ } else {
+ nthw_mac_pcs_swap_gty_tx_polarity(mac_pcs, lane, false);
+ nthw_mac_pcs_swap_gty_rx_polarity(mac_pcs, lane, false);
+ }
+ }
+
+ return 0;
+}
+
+/*
+ * Reset RX
+ */
+static int _reset_rx(adapter_info_t *drv, nthw_mac_pcs_t *mac_pcs)
+{
+ (void)drv;
+
+ nthw_mac_pcs_rx_path_rst(mac_pcs, true);
+ nt_os_wait_usec(1); /* 10ms */
+ nthw_mac_pcs_rx_path_rst(mac_pcs, false);
+ nt_os_wait_usec(1); /* 10ms */
+
+ return 0;
+}
+
+static void _set_loopback(struct adapter_info_s *p_adapter_info,
+ nthw_mac_pcs_t *mac_pcs,
+ int intf_no,
+ uint32_t mode,
+ uint32_t last_mode)
+{
+ bool swap_polerity = true;
+
+ switch (mode) {
+ case 1:
+ NT_LOG(INF, NTNIC, "%s: Applying host loopback\n",
+ p_adapter_info->mp_port_id_str[intf_no]);
+ nthw_mac_pcs_set_fec(mac_pcs, true);
+ nthw_mac_pcs_set_host_loopback(mac_pcs, true);
+ swap_polerity = false;
+ break;
+
+ case 2:
+ NT_LOG(INF, NTNIC, "%s: Applying line loopback\n",
+ p_adapter_info->mp_port_id_str[intf_no]);
+ nthw_mac_pcs_set_line_loopback(mac_pcs, true);
+ break;
+
+ default:
+ switch (last_mode) {
+ case 1:
+ NT_LOG(INF, NTNIC, "%s: Removing host loopback\n",
+ p_adapter_info->mp_port_id_str[intf_no]);
+ nthw_mac_pcs_set_host_loopback(mac_pcs, false);
+ break;
+
+ case 2:
+ NT_LOG(INF, NTNIC, "%s: Removing line loopback\n",
+ p_adapter_info->mp_port_id_str[intf_no]);
+ nthw_mac_pcs_set_line_loopback(mac_pcs, false);
+ break;
+
+ default:
+ /* Do nothing */
+ break;
+ }
+
+ break;
+ }
+
+ if (p_adapter_info->fpga_info.nthw_hw_info.hw_id == 2 ||
+ p_adapter_info->hw_info.n_nthw_adapter_id ==
NT_HW_ADAPTER_ID_NT200A02) {
+ (void)_swap_tx_rx_polarity(p_adapter_info, mac_pcs, intf_no,
swap_polerity);
+ }
+
+ /* After changing the loopback the system must be properly reset */
+ _reset_rx(p_adapter_info, mac_pcs);
+
+ nt_os_wait_usec(1); /* 10ms - arbitrary choice */
+
+ if (!nthw_mac_pcs_is_rx_path_rst(mac_pcs)) {
+ nthw_mac_pcs_reset_bip_counters(mac_pcs
RE: [PATCH v3] config/arm: add Ampere AmpereOneX platform
Hi Ruifeng, Thank you for reviewing. Temporarily suspended. Colleagues remind that the company has just standardized external naming rules, and the time happens to be between the v2 and v3 of this patch. Wait for me to go through again the internal process before sending it to the DPDK community. Best Regards, Yutang Jiang > -Original Message- > From: Ruifeng Wang > Sent: Thursday, June 27, 2024 3:15 PM > To: Yutang Jiang OS ; > dev@dpdk.org > Cc: Open Source Submission ; Yutang Jiang > ; n...@arm.com; > juraj.lin...@pantheon.tech; wathsala.vithan...@arm.com > Subject: Re: [PATCH v3] config/arm: add Ampere AmpereOneX platform > > [EXTERNAL EMAIL NOTICE: This email originated from an external sender. > Please be mindful of safe email handling and proprietary information > protection practices.] > > > On 2024/6/27 10:44 AM, Yutang Jiang wrote: > > Signed-off-by: Yutang Jiang > > --- > > config/arm/arm64_ampereonex_linux_gcc | 17 + > > config/arm/meson.build| 19 +++ > > 2 files changed, 36 insertions(+) > > create mode 100644 config/arm/arm64_ampereonex_linux_gcc > > > Acked-by: Ruifeng Wang
[PATCH v2] mbuf: fix API to copy mbuf dynamic fields
Fixed rte_mbuf_dynfield_copy() API to copy dynamic fields from one mbuf
to another. When RTE_IOVA_AS_PA is not defined during the build, an
additional dynamic field (dynfield2) becomes available. This field
should be conditionally copied to ensure the complete duplication of
dynamic fields between mbufs. This patch fixes the same.
see https://bugs.dpdk.org/show_bug.cgi?id=1472
Bugzilla ID: 1472
Fixes: 03b57eb7ab9a ("mbuf: add second dynamic field member")
Cc: sta...@dpdk.org
Signed-off-by: Shijith Thotton
Reviewed-by: Morten Brørup
Acked-by: Stephen Hemminger
---
v2:
- Moved copy of dynfield2 before dynfield1.
- Added Reviewed-by and Acked-by tags.
lib/mbuf/rte_mbuf.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/lib/mbuf/rte_mbuf.h b/lib/mbuf/rte_mbuf.h
index 4c4722e002..babe16c72c 100644
--- a/lib/mbuf/rte_mbuf.h
+++ b/lib/mbuf/rte_mbuf.h
@@ -1119,6 +1119,9 @@ rte_pktmbuf_attach_extbuf(struct rte_mbuf *m, void
*buf_addr,
static inline void
rte_mbuf_dynfield_copy(struct rte_mbuf *mdst, const struct rte_mbuf *msrc)
{
+#if !RTE_IOVA_IN_MBUF
+ mdst->dynfield2 = msrc->dynfield2;
+#endif
memcpy(&mdst->dynfield1, msrc->dynfield1, sizeof(mdst->dynfield1));
}
--
2.25.1
RE: [EXTERNAL] [PATCH v2] examples/fips_validation: fix coverity issues
Recheck-request: iol-intel-Performance
[DPDK/ethdev Bug 1473] [dpdk-24.07] vxlan/vxlan_ipv6_checksum_offload: IPV6-Vxlan TX droped by outer sw csum
https://bugs.dpdk.org/show_bug.cgi?id=1473
Bug ID: 1473
Summary: [dpdk-24.07] vxlan/vxlan_ipv6_checksum_offload:
IPV6-Vxlan TX droped by outer sw csum
Product: DPDK
Version: 24.07
Hardware: x86
OS: Linux
Status: UNCONFIRMED
Severity: normal
Priority: Normal
Component: ethdev
Assignee: dev@dpdk.org
Reporter: zhiminx.hu...@intel.com
Target Milestone: ---
Environment:
DPDK version: v24.07-rc1: 4a44d97f0a52a76258c6a6cb6a713f4380a8ab1f
OS: Ubuntu 24.04 LTS/6.8.0-31-generic
Compiler: gcc version 13.2.0
Hardware platform: Intel(R) Xeon(R) Gold 6139 CPU @ 2.30GHz
NIC hardware: Intel Corporation Ethernet Controller XXV710 for 25GbE SFP28
[8086:158b]
NIC firmware:
i40e: 2.25.7
FW: 9.50 0x8000f167 1.3597.0
Test Setup:
1.
usertools/dpdk-devbind.py --force --bind=vfio-pci :af:00.0
2.
./x86_64-native-linuxapp-gcc/app/dpdk-testpmd -l 1-5 -n 4 -a :af:00.0 --
-i --enable-rx-cksum
set fwd csum
rx_vxlan_port add 4789 0
port stop all
csum set udp hw 0
csum set tcp hw 0
csum set sctp hw 0
csum parse-tunnel on 0
csum set outer-ip sw 0
port start all
start
3.
scapy:
sendp([Ether(src='00:00:10:00:00:00',
dst='3c:fd:fe:cf:33:74')/IPv6(src='fe80::', dst='fe80::1')/UDP(sport=63,
dport=4789)/VXLAN(vni=1)/Ether(src='00:00:20:00:00:00',
dst='00:00:20:00:00:01')/IP(src='192.168.2.1',
dst='192.168.2.2')/UDP()/Raw(load=b'XX')],iface="ens2f0",count=1,inter=0,verbose=False)
4.stop testpmd and check the output
Show the output from the previous commands.
-- Forward statistics for port 0 --
RX-packets: 1 RX-dropped: 0 RX-total: 1
Bad-ipcsum: 0 Bad-l4csum: 0 Bad-outer-l4csum: 0
Bad-outer-ipcsum: 0
TX-packets: 0 TX-dropped: 1 TX-total: 1
+++ Accumulated forward statistics for all ports+++
RX-packets: 1 RX-dropped: 0 RX-total: 1
TX-packets: 0 TX-dropped: 1 TX-total: 1
Expected Result:
no tx-droped
Is this issue a regression: (Y/N) Y
commit 6b5e31f7fbd71675c8f3f6d8c0f74fd1f3a0dff5
Author: David Marchand
Date: Thu Apr 18 10:20:19 2024 +0200
net/i40e: fix outer UDP checksum offload for X710
According to the X710 datasheet (and confirmed on the field..), X710
devices do not support outer checksum offload.
"""
8.4.4.2 Transmit L3 and L4 Integrity Offload
Tunneling UDP headers and GRE header are not offloaded while the
X710/XXV710/XL710 leaves their checksum field as is.
If a checksum is required, software should provide it as well as the inner
checksum value(s) that are required for the outer checksum.
"""
Fix Tx offload capabilities according to the hardware.
X722 may support such offload by setting I40E_TXD_CTX_QW0_L4T_CS_MASK.
Bugzilla ID: 1406
Fixes: 8cc79a1636cd ("net/i40e: fix forward outer IPv6 VXLAN")
Cc: sta...@dpdk.org
Reported-by: Jun Wang
Signed-off-by: David Marchand
Tested-by: Ali Alnubani
--
You are receiving this mail because:
You are the assignee for the bug.
[PATCH 1/2] common/cnxk: enable second pass RQ in mask config
This will enable second pass RQ and drop interrupt by default in
mask configuration to avoid buffer leak possibilities during dev
stop and interrupts to indicate drops if any.
Signed-off-by: Rahul Bhansali
---
drivers/common/cnxk/roc_features.h | 6 ++
drivers/common/cnxk/roc_nix_inl.c | 9 -
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/common/cnxk/roc_features.h
b/drivers/common/cnxk/roc_features.h
index 3b512be132..6abb35c296 100644
--- a/drivers/common/cnxk/roc_features.h
+++ b/drivers/common/cnxk/roc_features.h
@@ -90,4 +90,10 @@ roc_feature_nix_has_rx_inject(void)
return (roc_model_is_cn10ka_b0() || roc_model_is_cn10kb());
}
+static inline bool
+roc_feature_nix_has_second_pass_drop(void)
+{
+ return 0;
+}
+
#endif
diff --git a/drivers/common/cnxk/roc_nix_inl.c
b/drivers/common/cnxk/roc_nix_inl.c
index 74a688abbd..a984ac56d9 100644
--- a/drivers/common/cnxk/roc_nix_inl.c
+++ b/drivers/common/cnxk/roc_nix_inl.c
@@ -734,6 +734,13 @@ nix_inl_rq_mask_cfg(struct roc_nix *roc_nix, bool enable)
msk_req->rq_set.xqe_drop_ena = 0;
msk_req->rq_set.spb_ena = 1;
+ if (!roc_feature_nix_has_second_pass_drop()) {
+ msk_req->rq_set.ena = 1;
+ msk_req->rq_set.rq_int_ena = 1;
+ msk_req->rq_mask.ena = 0;
+ msk_req->rq_mask.rq_int_ena = 0;
+ }
+
msk_req->rq_mask.len_ol3_dis = 0;
msk_req->rq_mask.len_ol4_dis = 0;
msk_req->rq_mask.len_il3_dis = 0;
@@ -1467,7 +1474,7 @@ roc_nix_inl_rq_ena_dis(struct roc_nix *roc_nix, bool
enable)
if (!idev)
return -EFAULT;
- if (roc_feature_nix_has_inl_rq_mask()) {
+ if (roc_feature_nix_has_inl_rq_mask() && enable) {
rc = nix_inl_rq_mask_cfg(roc_nix, enable);
if (rc) {
plt_err("Failed to get rq mask rc=%d", rc);
--
2.25.1
[PATCH 2/2] net/cnxk: avoid NPC Rx and MCAM entries disable
For inline IPsec, Rx misses are observed during dev stop process.
There can be a situation of 2nd pass packets are being dropped and
can cause a buffer leak.
To handle such case, will avoid NPC Rx and MCAM entries disable in
dev stop. These will be handled in dev close routine.
Signed-off-by: Rahul Bhansali
---
drivers/net/cnxk/cnxk_ethdev.c | 27 ---
1 file changed, 20 insertions(+), 7 deletions(-)
diff --git a/drivers/net/cnxk/cnxk_ethdev.c b/drivers/net/cnxk/cnxk_ethdev.c
index db8feca620..38746c81c5 100644
--- a/drivers/net/cnxk/cnxk_ethdev.c
+++ b/drivers/net/cnxk/cnxk_ethdev.c
@@ -1625,18 +1625,26 @@ cnxk_nix_dev_stop(struct rte_eth_dev *eth_dev)
int count, i, j, rc;
void *rxq;
- /* Disable all the NPC entries */
- rc = roc_npc_mcam_enable_all_entries(&dev->npc, 0);
- if (rc)
- return rc;
+ /* In case of Inline IPSec, will need to avoid disabling the MCAM rules
and NPC Rx
+* in this routine to continue processing of second pass inflight
packets if any.
+* Drop of second pass packets will leak first pass buffers on some
platforms
+* due to hardware limitations.
+*/
+ if (roc_feature_nix_has_second_pass_drop() ||
+ !(dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY)) {
+ /* Disable all the NPC entries */
+ rc = roc_npc_mcam_enable_all_entries(&dev->npc, 0);
+ if (rc)
+ return rc;
+
+ /* Disable Rx via NPC */
+ roc_nix_npc_rx_ena_dis(&dev->nix, false);
+ }
/* Stop link change events */
if (!roc_nix_is_vf_or_sdp(&dev->nix))
roc_nix_mac_link_event_start_stop(&dev->nix, false);
- /* Disable Rx via NPC */
- roc_nix_npc_rx_ena_dis(&dev->nix, false);
-
roc_nix_inl_outb_soft_exp_poll_switch(&dev->nix, false);
/* Stop inline device RQ first */
@@ -2047,6 +2055,11 @@ cnxk_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool
reset)
/* Clear the flag since we are closing down */
dev->configured = 0;
+ /* Disable all the NPC entries */
+ rc = roc_npc_mcam_enable_all_entries(&dev->npc, 0);
+ if (rc)
+ return rc;
+
roc_nix_npc_rx_ena_dis(nix, false);
/* Restore 802.3 Flow control configuration */
--
2.25.1
[PATCH v4 1/2] cryptodev: fix crypto callbacks on unsetting callbacks macro
Crypto callbacks APIs are available in header files but when
the macro RTE_CRYPTO_CALLBACKS unset, test application need to
put #ifdef in its code.
The test application should be able to build and run, regardless
DPDK library is built with RTE_CRYPTO_CALLBACKS defined or not.
Added ENOTSUP from the beginning of the APIs implementation
if RTE_CRYPTO_CALLBACKS macro is unset/undefined.
Fixes: 1c3ffb95595e ("cryptodev: add enqueue and dequeue callbacks")
Fixes: 5523a75af539 ("test/crypto: add case for enqueue/dequeue callbacks")
Signed-off-by: Ganapati Kundapura
---
v4:
* replaced ifdef with ifndef in APIs implementation
* Removed TEST_SKIP macro
* checked for ENOTSUP for first usage only
v3:
* Added NOTSUP from the beginning of the APIs
diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 94438c5..6d57ea1 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -14794,6 +14794,12 @@ test_enq_callback_setup(void)
/* Test with invalid crypto device */
cb = rte_cryptodev_add_enq_callback(RTE_CRYPTO_MAX_DEVS,
qp_id, test_enq_callback, NULL);
+ if (rte_errno == ENOTSUP) {
+ RTE_LOG(ERR, USER1, "%s line %d: "
+ "rte_cryptodev_add_enq_callback() "
+ "Not supported, skipped\n", __func__, __LINE__);
+ return TEST_SKIPPED;
+ }
TEST_ASSERT_NULL(cb, "Add callback on qp %u on "
"cryptodev %u did not fail",
qp_id, RTE_CRYPTO_MAX_DEVS);
@@ -14909,6 +14915,12 @@ test_deq_callback_setup(void)
/* Test with invalid crypto device */
cb = rte_cryptodev_add_deq_callback(RTE_CRYPTO_MAX_DEVS,
qp_id, test_deq_callback, NULL);
+ if (rte_errno == ENOTSUP) {
+ RTE_LOG(ERR, USER1, "%s line %d: "
+ "rte_cryptodev_add_deq_callback() "
+ "Not supported, skipped\n", __func__, __LINE__);
+ return TEST_SKIPPED;
+ }
TEST_ASSERT_NULL(cb, "Add callback on qp %u on "
"cryptodev %u did not fail",
qp_id, RTE_CRYPTO_MAX_DEVS);
diff --git a/lib/cryptodev/rte_cryptodev.c b/lib/cryptodev/rte_cryptodev.c
index 886eb7a..682c9f4 100644
--- a/lib/cryptodev/rte_cryptodev.c
+++ b/lib/cryptodev/rte_cryptodev.c
@@ -1491,6 +1491,10 @@ rte_cryptodev_add_enq_callback(uint8_t dev_id,
rte_cryptodev_callback_fn cb_fn,
void *cb_arg)
{
+#ifndef RTE_CRYPTO_CALLBACKS
+ rte_errno = ENOTSUP;
+ return NULL;
+#endif
struct rte_cryptodev *dev;
struct rte_cryptodev_cb_rcu *list;
struct rte_cryptodev_cb *cb, *tail;
@@ -1556,6 +1560,9 @@ rte_cryptodev_remove_enq_callback(uint8_t dev_id,
uint16_t qp_id,
struct rte_cryptodev_cb *cb)
{
+#ifndef RTE_CRYPTO_CALLBACKS
+ return -ENOTSUP;
+#endif
struct rte_cryptodev *dev;
RTE_ATOMIC(struct rte_cryptodev_cb *) *prev_cb;
struct rte_cryptodev_cb *curr_cb;
@@ -1630,6 +1637,10 @@ rte_cryptodev_add_deq_callback(uint8_t dev_id,
rte_cryptodev_callback_fn cb_fn,
void *cb_arg)
{
+#ifndef RTE_CRYPTO_CALLBACKS
+ rte_errno = ENOTSUP;
+ return NULL;
+#endif
struct rte_cryptodev *dev;
struct rte_cryptodev_cb_rcu *list;
struct rte_cryptodev_cb *cb, *tail;
@@ -1696,6 +1707,9 @@ rte_cryptodev_remove_deq_callback(uint8_t dev_id,
uint16_t qp_id,
struct rte_cryptodev_cb *cb)
{
+#ifndef RTE_CRYPTO_CALLBACKS
+ return -ENOTSUP;
+#endif
struct rte_cryptodev *dev;
RTE_ATOMIC(struct rte_cryptodev_cb *) *prev_cb;
struct rte_cryptodev_cb *curr_cb;
--
2.6.4
[PATCH v3 2/2] cryptodev: validate crypto callbacks from next node
Crypto callbacks are invoked on checking from head node
which is always valid pointer.
This patch checks next node from the head node if callbacks
registered before invoking callbacks.
Fixes: 1c3ffb95595e ("cryptodev: add enqueue and dequeue callbacks")
Signed-off-by: Ganapati Kundapura
---
v3: retained ifdef
diff --git a/lib/cryptodev/rte_cryptodev.h b/lib/cryptodev/rte_cryptodev.h
index c946f74..bec947f 100644
--- a/lib/cryptodev/rte_cryptodev.h
+++ b/lib/cryptodev/rte_cryptodev.h
@@ -1910,7 +1910,7 @@ rte_cryptodev_dequeue_burst(uint8_t dev_id, uint16_t
qp_id,
nb_ops = fp_ops->dequeue_burst(qp, ops, nb_ops);
#ifdef RTE_CRYPTO_CALLBACKS
- if (unlikely(fp_ops->qp.deq_cb != NULL)) {
+ if (unlikely(fp_ops->qp.deq_cb[qp_id].next != NULL)) {
struct rte_cryptodev_cb_rcu *list;
struct rte_cryptodev_cb *cb;
@@ -1977,7 +1977,7 @@ rte_cryptodev_enqueue_burst(uint8_t dev_id, uint16_t
qp_id,
fp_ops = &rte_crypto_fp_ops[dev_id];
qp = fp_ops->qp.data[qp_id];
#ifdef RTE_CRYPTO_CALLBACKS
- if (unlikely(fp_ops->qp.enq_cb != NULL)) {
+ if (unlikely(fp_ops->qp.enq_cb[qp_id].next != NULL)) {
struct rte_cryptodev_cb_rcu *list;
struct rte_cryptodev_cb *cb;
--
2.6.4
RE: [EXTERNAL] [PATCH v3 1/2] cryptodev: fix crypto callbacks on unsetting callbacks macro
Hi Akhil,
> -Original Message-
> From: Akhil Goyal
> Sent: Thursday, June 27, 2024 11:50 AM
> To: Kundapura, Ganapati ;
> ferruh.yi...@amd.com; Richardson, Bruce ;
> m...@smartsharesystems.com; tho...@monjalon.net
> Cc: fanzhang@gmail.com; Senthil, Bala ; Gujjar,
> Abhinandan S ; Mcnamara, John
> ; dev@dpdk.org
> Subject: RE: [EXTERNAL] [PATCH v3 1/2] cryptodev: fix crypto callbacks on
> unsetting callbacks macro
>
> > Crypto callbacks APIs are available in header files but when the macro
> > RTE_CRYPTO_CALLBACKS unset, test application need to put #ifdef in its
> > code.
> >
> > The test application should be able to build and run, regardless DPDK
> > library is built with RTE_CRYPTO_CALLBACKS defined or not.
> >
> > Added ENOTSUP from the beginning of the APIs implementation if
> > RTE_CRYPTO_CALLBACKS macro is unset/undefined.
> >
> > Fixes: 1c3ffb95595e ("cryptodev: add enqueue and dequeue callbacks")
> > Fixes: 5523a75af539 ("test/crypto: add case for enqueue/dequeue
> > callbacks")
> >
> > Signed-off-by: Ganapati Kundapura
> >
> > ---
> > v3:
> > * Added NOTSUP from the beginning of the APIs
> >
> > diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
> > index 94438c5..7dca2c9 100644
> > --- a/app/test/test_cryptodev.c
> > +++ b/app/test/test_cryptodev.c
> > @@ -118,6 +118,18 @@ struct crypto_unittest_params {
> > for (j = index; j < index + num_blk_types; j++)
> > \
> > free_blockcipher_test_suite(parent_ts.unit_test_suites[j])
> >
> > +#define TEST_SKIP_LOG(cond, msg, ...) do { \
> > + if ((cond)) { \
> > + RTE_LOG(ERR, CRYPTODEV, "%s line %d: "
> > \
> > + msg "\n", __func__, __LINE__, ##__VA_ARGS__);
> > \
> > + RTE_TEST_TRACE_FAILURE(__FILE__, __LINE__, __func__);
> > \
> > + return TEST_SKIPPED;\
> > + } \
> > +} while (0)
> > +
> > +#define TEST_SKIP(a, b, msg, ...) \
> > + TEST_SKIP_LOG(a == b, msg, ##__VA_ARGS__)
> > +
>
> This can be moved to app/test/test.h
> Also can we rename it to TEST_ASSERT_SKIP?
Removed this macro
>
> > /*
> > * Forward declarations.
> > */
> > @@ -14754,7 +14766,7 @@ test_enq_callback_setup(void)
> >
> > struct rte_cryptodev_cb *cb;
> > uint16_t qp_id = 0;
> > - int j = 0;
> > + int j = 0, ret;
> >
> > /* Verify the crypto capabilities for which enqueue/dequeue is done.
> > */
> > cap_idx.type = RTE_CRYPTO_SYM_XFORM_AUTH; @@ -14794,6
> +14806,7 @@
> > test_enq_callback_setup(void)
> > /* Test with invalid crypto device */
> > cb = rte_cryptodev_add_enq_callback(RTE_CRYPTO_MAX_DEVS,
> > qp_id, test_enq_callback, NULL);
> > + TEST_SKIP(rte_errno, ENOTSUP, "Not supported, skipped");
> > TEST_ASSERT_NULL(cb, "Add callback on qp %u on "
> > "cryptodev %u did not fail",
> > qp_id, RTE_CRYPTO_MAX_DEVS);
> > @@ -14802,6 +14815,7 @@ test_enq_callback_setup(void)
> > cb = rte_cryptodev_add_enq_callback(ts_params->valid_devs[0],
> > dev_info.max_nb_queue_pairs + 1,
> > test_enq_callback, NULL);
> > + TEST_SKIP(rte_errno, ENOTSUP, "Not supported, skipped");
>
> Why do we need to check for ENOTSUP at multiple places in the same
> function?
> This can be checked at the first usage only.
Checked for ENOTSUP only for first usage
>
> > TEST_ASSERT_NULL(cb, "Add callback on qp %u on "
> > "cryptodev %u did not fail",
> > dev_info.max_nb_queue_pairs + 1,
> > @@ -14810,6 +14824,7 @@ test_enq_callback_setup(void)
> > /* Test with NULL callback */
> > cb = rte_cryptodev_add_enq_callback(ts_params->valid_devs[0],
> > qp_id, NULL, NULL);
> > + TEST_SKIP(rte_errno, ENOTSUP, "Not supported, skipped");
> > TEST_ASSERT_NULL(cb, "Add callback on qp %u on "
> > "cryptodev %u did not fail",
> > qp_id, ts_params->valid_devs[0]);
> > @@ -14817,6 +14832,7 @@ test_enq_callback_setup(void)
> > /* Test with valid configuration */
> > cb = rte_cryptodev_add_enq_callback(ts_params->valid_devs[0],
> > qp_id, test_enq_callback, NULL);
> > + TEST_SKIP(rte_errno, ENOTSUP, "Not supported, skipped");
> > TEST_ASSERT_NOT_NULL(cb, "Failed test to add callback on "
> > "qp %u on cryptodev %u",
> > qp_id, ts_params->valid_devs[0]);
> > @@ -14830,24 +14846,35 @@ test_enq_callback_setup(void)
> > rte_delay_ms(10);
> >
> > /* Test with invalid crypto device */
> > - TEST_ASSERT_FAIL(rte_cryptodev_remove_enq_callback(
> > - RTE_CRYPTO_MAX_DEVS, qp_id, cb),
> > + ret = rte_cryptodev_remove_enq_callback(RTE_CRYPTO_MAX_DEVS,
> > + q
[PATCH] buildtools: fix invalid symbols
ELF files generated by higher version compilers wrap multiple
symbols prefixed with "this_pmd_name".
This patch fixes the issue by filtering invalid symbols.
Bugzilla ID: 1466
Fixes: 6c4bf8f42432 ("buildtools: add Python pmdinfogen")
Cc: sta...@dpdk.org
Signed-off-by: Mingjin Ye
---
buildtools/pmdinfogen.py | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/buildtools/pmdinfogen.py b/buildtools/pmdinfogen.py
index 2a44f17bda..6ea97caec7 100755
--- a/buildtools/pmdinfogen.py
+++ b/buildtools/pmdinfogen.py
@@ -200,7 +200,8 @@ def dump(self, file):
def load_drivers(image):
drivers = []
for symbol in image.find_by_prefix("this_pmd_name"):
-drivers.append(Driver.load(image, symbol))
+if len(symbol.string_value) != 0:
+drivers.append(Driver.load(image, symbol))
return drivers
--
2.25.1
Re: [PATCH] buildtools: fix invalid symbols
On Thu, Jun 27, 2024 at 10:11:44AM +, Mingjin Ye wrote:
> ELF files generated by higher version compilers wrap multiple
> symbols prefixed with "this_pmd_name".
>
> This patch fixes the issue by filtering invalid symbols.
>
> Bugzilla ID: 1466
> Fixes: 6c4bf8f42432 ("buildtools: add Python pmdinfogen")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Mingjin Ye
> ---
> buildtools/pmdinfogen.py | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/buildtools/pmdinfogen.py b/buildtools/pmdinfogen.py
> index 2a44f17bda..6ea97caec7 100755
> --- a/buildtools/pmdinfogen.py
> +++ b/buildtools/pmdinfogen.py
> @@ -200,7 +200,8 @@ def dump(self, file):
> def load_drivers(image):
> drivers = []
> for symbol in image.find_by_prefix("this_pmd_name"):
> -drivers.append(Driver.load(image, symbol))
> +if len(symbol.string_value) != 0:
> +drivers.append(Driver.load(image, symbol))
One small suggestion. Empty strings evaluate to boolean false, so the
condition can just be simplified to:
if symbol.string_value:
drivers.append()
/Bruce
Re: [PATCH v4 00/13] Optionally have rte_memcpy delegate to compiler memcpy
On Wed, Jun 26, 2024 at 10:16:06PM +0200, Morten Brørup wrote: > > From: Mattias Rönnblom [mailto:hof...@lysator.liu.se] > > Sent: Wednesday, 26 June 2024 20.48 > > > > On Wed, Jun 26, 2024 at 05:24:04PM +0200, Maxime Coquelin wrote: > > > > > > > > > On 6/26/24 16:58, Stephen Hemminger wrote: > > > > On Wed, 26 Jun 2024 10:37:31 +0200 > > > > Maxime Coquelin wrote: > > > > > > > > > On 6/25/24 21:27, Mattias Rönnblom wrote: > > > > > > On Tue, Jun 25, 2024 at 05:29:35PM +0200, Maxime Coquelin wrote: > > > > > > > Hi Mattias, > > > > > > > > > > > > > > On 6/20/24 19:57, Mattias Rönnblom wrote: > > > > > > > > This patch set make DPDK library, driver, and application > > code use the > > > > > > > > compiler/libc memcpy() by default when functions in > > are > > > > > > > > invoked. > > > > > > > > > > > > > > > > The various custom DPDK rte_memcpy() implementations may be > > retained > > > > > > > > by means of a build-time option. > > > > > > > > > > > > > > > > This patch set only make a difference on x86, PPC and ARM. > > Loongarch > > > > > > > > and RISCV already used compiler/libc memcpy(). > > > > > > > > > > > > > > It indeed makes a difference on x86! > > > > > > > > > > > > > > Just tested latest main with and without your series on > > > > > > > Intel(R) Xeon(R) Gold 6438N. > > > > > > > > > > > > > > The test is a simple IO loop between a Vhost PMD and a Virtio- > > user PMD: > > > > > > > # dpdk-testpmd -l 4-6 --file-prefix=virtio1 --no-pci --vdev > > 'net_virtio_user0,mac=00:01:02:03:04:05,path=./vhost- > > net,server=1,mrg_rxbuf=1,in_order=1' > > > > > > > --single-file-segments -- -i > > > > > > > testpmd> start > > > > > > > > > > > > > > # dpdk-testpmd -l 8-10 --file-prefix=vhost1 --no-pci --vdev > > > > > > > 'net_vhost0,iface=vhost-net,client=1' --single-file-segments > > -- -i > > > > > > > testpmd> start tx_first 32 > > > > > > > > > > > > > > Latest main: 14.5Mpps > > > > > > > Latest main + this series: 10Mpps > > > > > > > > > > > > I ran the above benchmark on my Raptor Lake desktop (locked to > > 3,2 > > > > > > GHz). GCC 12.3.0. > > > > > > > > > > > > Core use_cc_memcpy Mpps > > > > > > Efalse 9.5 > > > > > > Etrue 9.7 > > > > > > Pfalse 16.4 > > > > > > Ptrue 13.5 > > > > > > > > > > > > On the P-cores, there's a significant performance regression, > > although > > > > > > not as bad as the one you see on your Sapphire Rapids Xeon. On > > the > > > > > > E-cores, there's actually a slight performance gain. > > > > > > > > > > > > The virtio PMD does not directly invoke rte_memcpy() or anything > > else > > > > > > from , but rather use memcpy(), so I'm not sure I > > > > > > understand what's going on here. Does the virtio driver delegate > > some > > > > > > performance-critical task to some module that in turns uses > > > > > > rte_memcpy()? > > > > > > > > > > This is because Vhost is the bottleneck here, not Virtio driver. > > > > > Indeed, the virtqueues memory belongs to the Virtio driver and the > > > > > descriptors buffers are Virtio's mbufs, so not much memcpy's are > > done > > > > > there. > > > > > > > > > > Vhost however, is a heavy memcpy user, as all the descriptors > > buffers > > > > > are copied to/from its mbufs. > > > > > > > > Would be good to now the size (if small it is inlining that matters, > > or > > > > maybe alignment matters), and have test results for multiple > > compiler versions. > > > > Ideally, feed results back and update Gcc and Clang. > > > > > > I was testing with GCC 11 on RHEL-9: > > > gcc (GCC) 11.4.1 20231218 (Red Hat 11.4.1-3) > > > > > > I was using the default one, 64B packets. > > > > > > I don't have time to perform these tests, but if you are willing to do > > > it I'll be happy to review the results. > > > > > > > DPDK doesn't need to be in the optimize C library space. > > > > > > Certainly, but we already have an optimized version currently, so not > > > much to do now on our side. When C libraries implementations will be > > on > > > par, we should definitely use them by default. > > > > > > > I think it's not so much about optimized versus non-optimized at this > > point. It's just that cc/libc memcpy sometimes performs better than > > RTE memcpy, and sometimes doesn't. > > > > For virtio, a single memory copy in > > lib/vhost/virtio_net.c:do_data_copy_enqueue() > > is responsible for >95% of the performance regression introduced by > > the cc memcpy patch for small packets on Intel P-cores. > > > > I'm not so sure this performance regression will go away in newer > > compilers. PGO would certainly help, but PGO is a hassle. > > > > One way to fix this issue would be to introduce a custom, > > memcpy()-based packet copying routine. I tried the below patch, with > > the following results: > > > > Raptor Lake @ 3,2 GHz > > GCC 12 > > > > 64 bytes packets > > Core Mode Mpps > > > > E RTE memcpy9.5 > > E
Re: [PATCH] buildtools: fix invalid symbols
On Thu, Jun 27, 2024 at 12:36 PM Mingjin Ye wrote:
>
> ELF files generated by higher version compilers wrap multiple
> symbols prefixed with "this_pmd_name".
>
> This patch fixes the issue by filtering invalid symbols.
>
> Bugzilla ID: 1466
> Fixes: 6c4bf8f42432 ("buildtools: add Python pmdinfogen")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Mingjin Ye
Is it the same issue as:
https://patchwork.dpdk.org/project/dpdk/patch/20240320155814.617220-1-alia...@nvidia.com/
?
--
David Marchand
Re: Hairpin Queues Throughput ConnectX-6
Hi Dmitry, Thank you for your helpful reply. Try enabling "Explicit Tx rule" mode if possible. I was able to achieve 137 Mpps @ 64B with the following command: dpdk-testpmd -a 21:00.0 -a c1:00.0 --in-memory -- \ -i --rxq=1 --txq=1 --hairpinq=8 --hairpin-mode=0x10 Based o this I was able to achieve 142 Mpps(96.08 Gbps) @ 64B with the following command: sudo dpdk-testpmd -l 0-1 -n 4 -a :c4:00.0,hp_buf_log_sz=13 \ --in-memory -- --rxq=1 --txq=1 --hairpinq=12 --hairpin-mode=0x10 -i flow create 0 ingress pattern eth src is 00:10:94:00:00:02 / end actions rss queues 1 2 3 4 5 6 7 8 9 10 11 12 end / end Almost full speed :). Any other value of "hp_buf_log_sz" or more queues does not get better results, but instead makes them worse. RxQ pinned in device memory requires firmware configuration [1]: mlxconfig -y -d $pci_addr set MEMIC_SIZE_LIMIT=0 HAIRPIN_DATA_BUFFER_LOCK=1 mlxfwreset -y -d $pci_addr reset [1]:https://doc.dpdk.org/guides/platform/mlx5.html?highlight=hairpin_data_buffer_lock However, pinned RxQ didn't improve anything for me. I tried it, but it didn't improve anything for me either. Mário On 25/06/2024 02:22, Kozlyuk wrote: Hi Mário, 2024-06-19 08:45 (UTC+0200), Mário Kuka: Hello, I want to use hairpin queues to forward high priority traffic (such as LACP). My goal is to ensure that this traffic is not dropped in case the software pipeline is overwhelmed. But during testing with dpdk-testpmd I can't achieve full throughput for hairpin queues. For maintainers: I'd like to express interest in this use case too. The best result I have been able to achieve for 64B packets is 83 Gbps in this configuration: $ sudo dpdk-testpmd -l 0-1 -n 4 -a :17:00.0,hp_buf_log_sz=19 -- --rxq=1 --txq=1 --rxd=4096 --txd=4096 --hairpinq=2 testpmd> flow create 0 ingress pattern eth src is 00:10:94:00:00:03 / end actions rss queues 1 2 end / end Try enabling "Explicit Tx rule" mode if possible. I was able to achieve 137 Mpps @ 64B with the following command: dpdk-testpmd -a 21:00.0 -a c1:00.0 --in-memory -- \ -i --rxq=1 --txq=1 --hairpinq=8 --hairpin-mode=0x10 You might get even better speed, because my flow rules were more complicated (RTE Flow based "router on-a-stick"): flow create 0 ingress group 1 pattern eth / vlan vid is 721 / end actions of_set_vlan_vid vlan_vid 722 / rss queues 1 2 3 4 5 6 7 8 end / end flow create 1 ingress group 1 pattern eth / vlan vid is 721 / end actions of_set_vlan_vid vlan_vid 722 / rss queues 1 2 3 4 5 6 7 8 end / end flow create 0 ingress group 1 pattern eth / vlan vid is 722 / end actions of_set_vlan_vid vlan_vid 721 / rss queues 1 2 3 4 5 6 7 8 end / end flow create 1 ingress group 1 pattern eth / vlan vid is 722 / end actions of_set_vlan_vid vlan_vid 721 / rss queues 1 2 3 4 5 6 7 8 end / end flow create 0 ingress group 0 pattern end actions jump group 1 / end flow create 1 ingress group 0 pattern end actions jump group 1 / end For packets in the range 68-80B I measured even lower throughput. Full throughput I measured only from packets larger than 112B For only one queue, I didn't get more than 55Gbps: $ sudo dpdk-testpmd -l 0-1 -n 4 -a :17:00.0,hp_buf_log_sz=19 -- --rxq=1 --txq=1 --rxd=4096 --txd=4096 --hairpinq=1 -i testpmd> flow create 0 ingress pattern eth src is 00:10:94:00:00:03 / end actions queue index 1 / end I tried to use locked device memory for TX and RX queues, but it seems that this is not supported: "--hairpin-mode=0x011000" (bit 16 - hairpin TX queues will use locked device memory, bit 12 - hairpin RX queues will use locked device memory) RxQ pinned in device memory requires firmware configuration [1]: mlxconfig -y -d $pci_addr set MEMIC_SIZE_LIMIT=0 HAIRPIN_DATA_BUFFER_LOCK=1 mlxfwreset -y -d $pci_addr reset [1]:https://doc.dpdk.org/guides/platform/mlx5.html?highlight=hairpin_data_buffer_lock However, pinned RxQ didn't improve anything for me. TxQ pinned in device memory is not supported by net/mlx5. TxQ pinned to DPDK memory made performance awful (predictably). I was expecting that achieving full throughput with hairpin queues would not be a problem. Is my expectation too optimistic? What other parameters besides 'hp_buf_log_sz' can I use to achieve full throughput? In my experiments, default "hp_buf_log_sz" of 16 is optimal. The most influential parameter appears to be the number of hairpin queues. I tried combining the following parameters: mprq_en=, rxqs_min_mprq=, mprq_log_stride_num=, txq_inline_mpw=, rxq_pkt_pad_en=, but with no positive impact on throughput. smime.p7s Description: S/MIME Cryptographic Signature
[PATCH 0/3] fix bpf load hangs with six IPv6 addresses
From: Konstantin Ananyev Konstantin Ananyev (3): bfp: fix MOV instruction evaluation bfp: fix load hangs with six IPv6 addresses test/bpf: add extra test cases for bpf convert app/test/test_bpf.c| 6 + lib/bpf/bpf_validate.c | 314 ++--- 2 files changed, 266 insertions(+), 54 deletions(-) -- 2.35.3
[PATCH 1/3] bfp: fix MOV instruction evaluation
From: Konstantin Ananyev
Verifier might left some register-state values uninitialized while
evaluating MOV instructions.
Add explicit initialization.
Fixes: 8021917293d0 ("bpf: add extra validation for input BPF program")
Cc: sta...@dpdk.org
Signed-off-by: Konstantin Ananyev
---
lib/bpf/bpf_validate.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/lib/bpf/bpf_validate.c b/lib/bpf/bpf_validate.c
index 79be5e917d..11344fff4d 100644
--- a/lib/bpf/bpf_validate.c
+++ b/lib/bpf/bpf_validate.c
@@ -636,14 +636,14 @@ eval_alu(struct bpf_verifier *bvf, const struct ebpf_insn
*ins)
{
uint64_t msk;
uint32_t op;
- size_t opsz;
+ size_t opsz, sz;
const char *err;
struct bpf_eval_state *st;
struct bpf_reg_val *rd, rs;
- opsz = (BPF_CLASS(ins->code) == BPF_ALU) ?
+ sz = (BPF_CLASS(ins->code) == BPF_ALU) ?
sizeof(uint32_t) : sizeof(uint64_t);
- opsz = opsz * CHAR_BIT;
+ opsz = sz * CHAR_BIT;
msk = RTE_LEN2MASK(opsz, uint64_t);
st = bvf->evst;
@@ -652,8 +652,10 @@ eval_alu(struct bpf_verifier *bvf, const struct ebpf_insn
*ins)
if (BPF_SRC(ins->code) == BPF_X) {
rs = st->rv[ins->src_reg];
eval_apply_mask(&rs, msk);
- } else
+ } else {
+ rs = (struct bpf_reg_val){.v = {.size = sz,},};
eval_fill_imm(&rs, msk, ins->imm);
+ }
eval_apply_mask(rd, msk);
--
2.35.3
[PATCH 2/3] bfp: fix load hangs with six IPv6 addresses
From: Konstantin Ananyev
As described in: https://bugs.dpdk.org/show_bug.cgi?id=1465
converting from following cBPF filter:
"host 1::1 or host 1::1 or host 1::1 or host 1::1 or host 1::1 or host 1::1"
taking too long for BPF verifier ito complete (up to 25 seconds).
Looking at it I didn't find any actual functional bug.
In fact, it does what is expected: goes through each possible path of
BPF program and evaluates register/stack state for each instruction.
The problem is that for program with a lot of conditional branches number
of possible paths starts to grow exponentially and such walk becomes very
excessive.
So to minimize number of evaluations, this patch implements heuristic
similar to what Linux kernel does - state pruning:
If from given instruction for given program state we explore all possible
paths and for each of them reach bpf_exit() without any complaints and a
valid R0 value, then for that instruction this program state can be
marked as 'safe'. When we later arrive at the same instruction with a state
equivalent to an earlier instruction 'safe' state, we can prune the search.
For now, only states for JCC targets are saved/examined.
Plus added few extra logging for DEBUG level.
Bugzilla ID: 1465
Fixes: 8021917293d0 ("bpf: add extra validation for input BPF program")
Cc: sta...@dpdk.org
Reported-by: Isaac Boukris
Signed-off-by: Konstantin Ananyev
---
lib/bpf/bpf_validate.c | 304 ++---
1 file changed, 254 insertions(+), 50 deletions(-)
diff --git a/lib/bpf/bpf_validate.c b/lib/bpf/bpf_validate.c
index 11344fff4d..2dae55b216 100644
--- a/lib/bpf/bpf_validate.c
+++ b/lib/bpf/bpf_validate.c
@@ -29,10 +29,13 @@ struct bpf_reg_val {
};
struct bpf_eval_state {
+ SLIST_ENTRY(bpf_eval_state) next; /* for @safe list traversal */
struct bpf_reg_val rv[EBPF_REG_NUM];
struct bpf_reg_val sv[MAX_BPF_STACK_SIZE / sizeof(uint64_t)];
};
+SLIST_HEAD(bpf_evst_head, bpf_eval_state);
+
/* possible instruction node colour */
enum {
WHITE,
@@ -52,6 +55,9 @@ enum {
#defineMAX_EDGES 2
+/* max number of 'safe' evaluated states to track per node */
+#define NODE_EVST_MAX 32
+
struct inst_node {
uint8_t colour;
uint8_t nb_edge:4;
@@ -59,7 +65,18 @@ struct inst_node {
uint8_t edge_type[MAX_EDGES];
uint32_t edge_dest[MAX_EDGES];
uint32_t prev_node;
- struct bpf_eval_state *evst;
+ struct {
+ struct bpf_eval_state *cur; /*save/restore for jcc targets */
+ struct bpf_eval_state *start;
+ struct bpf_evst_head safe;/* safe states for track/prune */
+ uint32_t nb_safe;
+ } evst;
+};
+
+struct evst_pool {
+ uint32_t num;
+ uint32_t cur;
+ struct bpf_eval_state *ent;
};
struct bpf_verifier {
@@ -73,11 +90,8 @@ struct bpf_verifier {
uint32_t edge_type[MAX_EDGE_TYPE];
struct bpf_eval_state *evst;
struct inst_node *evin;
- struct {
- uint32_t num;
- uint32_t cur;
- struct bpf_eval_state *ent;
- } evst_pool;
+ struct evst_pool evst_sr_pool; /* for evst save/restore */
+ struct evst_pool evst_tp_pool; /* for evst track/prune */
};
struct bpf_ins_check {
@@ -1085,7 +1099,7 @@ eval_jcc(struct bpf_verifier *bvf, const struct ebpf_insn
*ins)
struct bpf_reg_val rvf, rvt;
tst = bvf->evst;
- fst = bvf->evin->evst;
+ fst = bvf->evin->evst.cur;
frd = fst->rv + ins->dst_reg;
trd = tst->rv + ins->dst_reg;
@@ -1814,8 +1828,8 @@ add_edge(struct bpf_verifier *bvf, struct inst_node
*node, uint32_t nidx)
uint32_t ne;
if (nidx > bvf->prm->nb_ins) {
- RTE_BPF_LOG_LINE(ERR, "%s: program boundary violation at pc:
%u, "
- "next pc: %u",
+ RTE_BPF_LOG_LINE(ERR,
+ "%s: program boundary violation at pc: %u, next pc: %u",
__func__, get_node_idx(bvf, node), nidx);
return -EINVAL;
}
@@ -2091,60 +2105,114 @@ validate(struct bpf_verifier *bvf)
* helper functions get/free eval states.
*/
static struct bpf_eval_state *
-pull_eval_state(struct bpf_verifier *bvf)
+pull_eval_state(struct evst_pool *pool)
{
uint32_t n;
- n = bvf->evst_pool.cur;
- if (n == bvf->evst_pool.num)
+ n = pool->cur;
+ if (n == pool->num)
return NULL;
- bvf->evst_pool.cur = n + 1;
- return bvf->evst_pool.ent + n;
+ pool->cur = n + 1;
+ return pool->ent + n;
}
static void
-push_eval_state(struct bpf_verifier *bvf)
+push_eval_state(struct evst_pool *pool)
{
- bvf->evst_pool.cur--;
+ RTE_ASSERT(pool->cur != 0);
+ pool->cur--;
}
static void
evst_pool_fini(struct bpf_verifier *bvf)
{
bvf->evst = NULL;
- free(bvf->evst_pool.ent);
- memset(&bvf->evst_p
[PATCH 3/3] test/bpf: add extra test cases for bpf convert
From: Konstantin Ananyev
Add few extra cases to catch problems similar to:
https://bugs.dpdk.org/show_bug.cgi?id=1465
Plus made it dump cBPF filter and converted eBPF program
to make things easier to track.
Suggested-by: Isaac Boukris
Signed-off-by: Konstantin Ananyev
---
app/test/test_bpf.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/app/test/test_bpf.c b/app/test/test_bpf.c
index 64c3c90b0a..993e181b76 100644
--- a/app/test/test_bpf.c
+++ b/app/test/test_bpf.c
@@ -3423,6 +3423,9 @@ static const char * const sample_filters[] = {
" and ((ip[2:2] - 4 * (ip[0] & 0x0F) - 4 * ((tcp[12] & 0xF0) >> 4) >
69))",
/* Other */
"len = 128",
+ "host 1::1 or host 1::1 or host 1::1 or host 1::1 or host 1::1 or host
1::1",
+ "host 1::1 or host 1::2 or host 1::3 or host 1::4 or host 1::5 "
+ "or host 192.0.2.1 or host 192.0.2.100 or host 192.0.2.200",
};
static int
@@ -3445,6 +3448,9 @@ test_bpf_filter(pcap_t *pcap, const char *s)
goto error;
}
+ printf("bpf convert for \"%s\" produced:\n", s);
+ rte_bpf_dump(stdout, prm->ins, prm->nb_ins);
+
bpf = rte_bpf_load(prm);
if (bpf == NULL) {
printf("%s@%d: failed to load bpf code, error=%d(%s);\n",
--
2.35.3
RE: [PATCH] app/eventdev: increase default queue depth for cryptodev
Acked-by: Abhinandan Gujjar > -Original Message- > From: Aakash Sasidharan > Sent: Thursday, June 27, 2024 10:45 AM > To: Jerin Jacob > Cc: gak...@marvell.com; ano...@marvell.com; vvelum...@marvell.com; > asasidha...@marvell.com; Gujjar, Abhinandan S > ; dev@dpdk.org > Subject: [PATCH] app/eventdev: increase default queue depth for cryptodev > > With crypto adapter, larger queue depths are desirable since same queue could > be used from multiple cores at the same time. With devices that are capable of > doing large bursts, larger queues would help in multi core management of same > queue. > > Increase default queue depth in cryptodev to cater to such use cases. > > Signed-off-by: Aakash Sasidharan > --- > app/test-eventdev/test_perf_common.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/app/test-eventdev/test_perf_common.c b/app/test- > eventdev/test_perf_common.c > index db0f9c1f3b..66d22cd559 100644 > --- a/app/test-eventdev/test_perf_common.c > +++ b/app/test-eventdev/test_perf_common.c > @@ -6,7 +6,7 @@ > > #include "test_perf_common.h" > > -#define NB_CRYPTODEV_DESCRIPTORS 1024 > +#define NB_CRYPTODEV_DESCRIPTORS 4096 > #define DATA_SIZE512 > #define IV_OFFSET (sizeof(struct rte_crypto_op) + \ > sizeof(struct rte_crypto_sym_op) + \ > -- > 2.25.1
[PATCH 1/1] maintainers: update for vmbus/mana/netvsc drivers
Add myself as maintainer for vmbus, mana and netvsc. Signed-off-by: Wei Hu --- MAINTAINERS | 3 +++ 1 file changed, 3 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index c9adff9846..58947b57ce 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -624,6 +624,7 @@ F: app/test/test_vdev.c VMBUS bus driver M: Long Li +M: Wei Hu F: drivers/bus/vmbus/ @@ -882,6 +883,7 @@ F: doc/guides/nics/features/mlx5.ini Microsoft mana M: Long Li +M: Wei Hu F: drivers/net/mana/ F: doc/guides/nics/mana.rst F: doc/guides/nics/features/mana.ini @@ -893,6 +895,7 @@ F: doc/guides/nics/vdev_netvsc.rst Microsoft Hyper-V netvsc M: Long Li +M: Wei Hu F: drivers/net/netvsc/ F: doc/guides/nics/netvsc.rst F: doc/guides/nics/features/netvsc.ini -- 2.34.1
Re: [PATCH] buildtools: fix build with clang 17
On Wed, Mar 20, 2024 at 5:30 PM David Marchand
wrote:
>
> Hello Ali, Thomas,
>
> On Wed, Mar 20, 2024 at 5:01 PM Ali Alnubani wrote:
> >
> > On Fedora 39 with Clang 17.0.3 and ASan enabled,
> > RTE_PMD_EXPORT_NAME seems to be done twice for a single
> > lib, which results in load_drivers() returning a list
> > consisting of 2 drivers (e.g., ['mlx5_common_pci', '']).
> > image.find_by_prefix("this_pmd_name") returns 2 symbols in this case,
> > "mlx5_common_pci" and an empty string ''. This didn't reproduce
> > with clang version 16.0.6.
> >
> > This patch ensures that a symbol with an empty string_value doesn't
> > cause an addition to the list of drivers.
>
> I suppose this comes from ASan instrumenting the code:
> # nm /root/dpdk/build-clang/drivers/libtmp_rte_common_mlx5.a | grep this_pmd
> r this_pmd_name3
> n this_pmd_name3.e5676185d74e2e1a9de646deebca963f
> r this_pmd_name3
> n this_pmd_name3.a2533baf7a46959f41383725087d4086
>
> The name of the symbols this script should look for has a clear
> format, which is this_pmd_name[0-9]+.
> Filtering with this pattern, there would be no need to go and
> interpret a symbol content.
Ali, can you send a v2?
--
David Marchand
Re: [PATCH] buildtools: fix invalid symbols
On Thu, Jun 27, 2024 at 12:57 PM Bruce Richardson
wrote:
>
> On Thu, Jun 27, 2024 at 10:11:44AM +, Mingjin Ye wrote:
> > ELF files generated by higher version compilers wrap multiple
> > symbols prefixed with "this_pmd_name".
> >
> > This patch fixes the issue by filtering invalid symbols.
> >
> > Bugzilla ID: 1466
> > Fixes: 6c4bf8f42432 ("buildtools: add Python pmdinfogen")
> > Cc: sta...@dpdk.org
> >
> > Signed-off-by: Mingjin Ye
> > ---
> > buildtools/pmdinfogen.py | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/buildtools/pmdinfogen.py b/buildtools/pmdinfogen.py
> > index 2a44f17bda..6ea97caec7 100755
> > --- a/buildtools/pmdinfogen.py
> > +++ b/buildtools/pmdinfogen.py
> > @@ -200,7 +200,8 @@ def dump(self, file):
> > def load_drivers(image):
> > drivers = []
> > for symbol in image.find_by_prefix("this_pmd_name"):
> > -drivers.append(Driver.load(image, symbol))
> > +if len(symbol.string_value) != 0:
> > +drivers.append(Driver.load(image, symbol))
>
> One small suggestion. Empty strings evaluate to boolean false, so the
> condition can just be simplified to:
>
> if symbol.string_value:
> drivers.append()
I have the same comment than what Ali tried with:
https://patchwork.dpdk.org/project/dpdk/patch/20240320155814.617220-1-alia...@nvidia.com/
I would prefer we don't rely on the content of symbols (that we don't
know anything about) when we can filter on the symbol names exactly
which is something DPDK controls.
My suggestion is to filter symbol *names* with regex ^this_pmd_name[0-9]+$.
--
David Marchand
RE: [PATCH 0/3] fix bpf load hangs with six IPv6 addresses
> From: Konstantin Ananyev > > Konstantin Ananyev (3): > bfp: fix MOV instruction evaluation > bfp: fix load hangs with six IPv6 addresses > test/bpf: add extra test cases for bpf convert > > app/test/test_bpf.c| 6 + > lib/bpf/bpf_validate.c | 314 ++--- > 2 files changed, 266 insertions(+), 54 deletions(-) > > -- > 2.35.3 Series-acked-by: Morten Brørup
Re: [PATCH v3] dmadev: fix structure alignment
20/03/2024 10:31, fengchengwen:
> Reviewed-by: Chengwen Feng
>
> On 2024/3/20 15:23, Wenwu Ma wrote:
> > The structure rte_dma_dev needs to be aligned to the cache line, but
> > the return value of malloc may not be aligned to the cache line. When
> > we use memset to clear the rte_dma_dev object, it may cause a segmentation
> > fault in clang-x86-platform.
> >
> > This is because clang uses the "vmovaps" assembly instruction for
> > memset, which requires that the operands (rte_dma_dev objects) must
> > aligned on a 16-byte boundary or a general-protection exception (#GP)
> > is generated.
> >
> > Therefore, either additional memory is applied for re-alignment, or the
> > rte_dma_dev object does not require cache line alignment. The patch
> > chooses the former option to fix the issue.
> >
> > Fixes: b36970f2e13e ("dmadev: introduce DMA device library")
> > Cc: sta...@dpdk.org
> >
> > Signed-off-by: Wenwu Ma
I keep thinking we should have a wrapper for aligned allocations,
with Windows support and fallback to malloc + RTE_PTR_ALIGN.
Probably not a reason to block this patch, so applied, thanks.
Linux Foundation DPDK Project Budget 2024 Summary
Dear DPDK Community Members, I am writing on behalf of the DPDK governing board to share a high level summary of the 2024 project budget, as approved by the governing board members. This is a new practice that we are establishing to provide visibility to the community on where the project budget is being spent and how it is being used to support and grow the DPDK project. Some notes about the budget summary, explaining the formatting, content and context are below, followed by the budget summary table. Budget Summary Notes: 1. Below is a summarised view of the DPDK project budget, highlighting income and expenditure against major categories (the "Category" column) 2. The numerical values shown in each budget category are aggregated from underlying individual budget line items that LF accounting and the DPDK project treasurer maintain. The main contributors to these aggregations are summarised out in the "Content" column 3. Figures in the "Income" and "Expenditure" columns are rounded to nearest $5K for summarisation purposes 4. Total income and anticipated expenditure for calendar year 2024 are indicated in the final row DPDK Project Budget 2024 (in USD thousands): Category Content Income Expenditure Project Income DPDK membership dues, Account interest 575 Linux Foundation Expenses LF membership, program manager, IT services 85 DPDK Summit Events DPDK Asia Summit, DPDK North America Summit, Staff travel 270 Community Lab UNH lab, DTS developers, Updated server equipment 245 Community and Marketing Lead marketing contractor, Tech writer 170 Totals 575 770 Providing some FAQ to pre-empt questions that community members may have: 1. Why are we using this summary format? * As this is the first time the project is publishing its budget summary, we have chosen a simple table to make the information easy to understand. We welcome feedback on the format for future iterations 2. Why is DPDK project expenditure greater than income in 2024? * There are a couple of reasons. In recent past, the global situation (eg pandemic restricting travel to summit events) has meant that the project's yearly running cost has been lower than income, meaning that the project account has a baseline of existing cash available. Furthermore, the project has some required spend in 2024 to upgrade in several areas (eg purchasing new server equipment for the lab, DTS framework development, tech writer to update DPDK documentation). We are therefore taking this opportunity to spend some of the available cash in 2024 and address the latent spend 3. Who sets and approves the DPDK budget? * The DPDK governing board treasurer is responsible for setting the project budget and managing any changes * The governing board approves the baseline budget on an annual basis and also approves material changes to this baseline throughout the year * For more information regarding the DPDK governing board membership, please refer to this page: https://www.dpdk.org/about/governance/ 4. If there are further questions, we will be happy to add them to the FAQ Kind Regards, Robin Giller DPDK Governing Board Treasurer & Vice Chair On Behalf of the DPDK Governing Board -- Intel Research and Development Ireland Limited Registered in Ireland Registered Office: Collinstown Industrial Park, Leixlip, County Kildare Registered Number: 308263 This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies.
Re: [PATCH v3 2/2] eventdev: add support for enqueue reorder
On Thu, Jun 27, 2024 at 12:01 AM Sevincer, Abdullah wrote: > > Hi Jerin my responses below: > >+# Is this feature or limitation? > This is a new feature to enable enqueuing to PMD in any order when the > underlined hardware device needs enqueues in a strict dequeue order. > >+# What is the use case for this feature? > This is needed by the applications which processes events in batches based on > their flow ids. Received burst is sorted based on flow ids. OK. It is not clear from the Doxygen comment, add more details in comment in next version, especially if it is applicable for batch mode. In general, the concept looks good to me. Add new RTE_EVENT_DEV_CAP_* for this feature. Update doc/guides/eventdevs/features/default.ini and your PMD feature list. Adding other eventdev PMD maintainers if there are any comments.
Re: [PATCH 0/2] provide toolchain abstracted __builtin_constant_p
Recheck-request: iol-compile-amd64-testing, iol-unit-amd64-testing, iol-intel-Functional, iol-compile-arm64-testing, iol-unit-arm64-testing, github-robot
Re: [PATCH v2] graph: fix head move when graph walk in mcore dispatch
28/03/2024 09:32, Yan, Zhirun: > From: Wu, Jingjing > > --- a/lib/graph/rte_graph_model_mcore_dispatch.h > > +++ b/lib/graph/rte_graph_model_mcore_dispatch.h > > @@ -100,9 +100,8 @@ rte_graph_walk_mcore_dispatch(struct rte_graph > > *graph) > > node = (struct rte_node *)RTE_PTR_ADD(graph, > > cir_start[(int32_t)head++]); > > > > /* skip the src nodes which not bind with current worker */ > > - if ((int32_t)head < 0 && node->dispatch.lcore_id != graph- > > >dispatch.lcore_id) > > + if ((int32_t)head < 1 && node->dispatch.lcore_id != > > +graph->dispatch.lcore_id) > > continue; > > - > No need for this line. > > > /* Schedule the node until all task/objs are done */ > > if (node->dispatch.lcore_id != RTE_MAX_LCORE && > > graph->dispatch.lcore_id != node->dispatch.lcore_id && > > -- > > 2.34.1 > > With small change, > > Acked-by: Zhirun Yan Applied with above change, thanks.
Re: [PATCH v3 1/2] bus/pci: fix secondary process PCI uio resource map problem
19/04/2024 05:26, Chaoyong He:
> From: Zerun Fu
>
> For the primary process, the logic loops all BARs and will skip
> the map of BAR with an invalid physical address (0), also will
> assign 'uio_res->nb_maps' with the real mapped BARs number. But
> for the secondary process, instead of loops all BARs, the logic
> using the 'uio_res->nb_map' as index. If the device uses continuous
> BARs there will be no problem, whereas if it uses discrete BARs,
> it will lead to mapping errors.
>
> Fix this problem by also loops all BARs and skip the map of BAR
> with an invalid physical address in secondary process.
>
> Fixes: 9b957f378abf ("pci: merge uio functions for linux and bsd")
> Cc: muk...@igel.co.jp
> Cc: sta...@dpdk.org
>
> Signed-off-by: Zerun Fu
> Reviewed-by: Chaoyong He
> Reviewed-by: Long Wu
> Reviewed-by: Peng Zhang
You should have kept the ack from Anatoly here.
> drivers/bus/pci/pci_common_uio.c | 40
> 1 file changed, 25 insertions(+), 15 deletions(-)
There are too many changes in this sensitive code.
Please could you introduce a first patch for the renaming of the variable "i"?
It should make this patch simpler to read.
Thank you
Re: [PATCH] devtools: fix version variable not initialized
On Wed, Apr 17, 2024 at 11:32 AM Dengdui Huang wrote:
>
> The version variable is not initialized. Therefore, if the -V option
> is not specified, the value of $version is obtained from the context,
> which may cause the version map parsing failure.
>
> Fixes: 6edec7f202ac ("devtools: list symbols by version")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Dengdui Huang
This is an internal script and I wonder how the mentionned issue is hit.
In any case this fix is correct.
Reviewed-by: David Marchand
--
David Marchand
RE: [PATCH v1] crypto/ipsec_mb: use new ipad/opad calculation API
Acked-by: Wathsala Vithanage
> Subject: [PATCH v1] crypto/ipsec_mb: use new ipad/opad calculation API
>
> From: Pablo de Lara
>
> IPSec Multi-buffer library v1.4 added a new API to calculate inner/outer
> padding for HMAC-SHAx/MD5.
>
> Signed-off-by: Pablo de Lara
> Signed-off-by: Brian Dooley
> ---
> drivers/crypto/ipsec_mb/pmd_aesni_mb.c | 34
> +-
> 1 file changed, 33 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
> b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
> index 69a546697b..b3fdea02ff 100644
> --- a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
> +++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
> @@ -13,6 +13,7 @@ struct aesni_mb_op_buf_data {
> uint32_t offset;
> };
>
> +#if IMB_VERSION(1, 3, 0) >= IMB_VERSION_NUM
> /**
> * Calculate the authentication pre-computes
> *
> @@ -55,6 +56,7 @@ calculate_auth_precomputes(hash_one_block_t
> one_block_hash,
> memset(ipad_buf, 0, blocksize);
> memset(opad_buf, 0, blocksize);
> }
> +#endif
>
> static inline int
> is_aead_algo(IMB_HASH_ALG hash_alg, IMB_CIPHER_MODE cipher_mode)
> @@ -66,12 +68,14 @@ is_aead_algo(IMB_HASH_ALG hash_alg,
> IMB_CIPHER_MODE cipher_mode)
>
> /** Set session authentication parameters */ static int -
> aesni_mb_set_session_auth_parameters(const IMB_MGR *mb_mgr,
> +aesni_mb_set_session_auth_parameters(IMB_MGR *mb_mgr,
> struct aesni_mb_session *sess,
> const struct rte_crypto_sym_xform *xform) {
> +#if IMB_VERSION(1, 3, 0) >= IMB_VERSION_NUM
> hash_one_block_t hash_oneblock_fn = NULL;
> unsigned int key_larger_block_size = 0;
> +#endif
> uint8_t hashed_key[HMAC_MAX_BLOCK_SIZE] = { 0 };
> uint32_t auth_precompute = 1;
>
> @@ -267,18 +271,24 @@ aesni_mb_set_session_auth_parameters(const
> IMB_MGR *mb_mgr,
> switch (xform->auth.algo) {
> case RTE_CRYPTO_AUTH_MD5_HMAC:
> sess->template_job.hash_alg = IMB_AUTH_MD5;
> +#if IMB_VERSION(1, 3, 0) >= IMB_VERSION_NUM
> hash_oneblock_fn = mb_mgr->md5_one_block;
> +#endif
> break;
> case RTE_CRYPTO_AUTH_SHA1_HMAC:
> sess->template_job.hash_alg = IMB_AUTH_HMAC_SHA_1;
> +#if IMB_VERSION(1, 3, 0) >= IMB_VERSION_NUM
> hash_oneblock_fn = mb_mgr->sha1_one_block;
> +#endif
> if (xform->auth.key.length > get_auth_algo_blocksize(
> IMB_AUTH_HMAC_SHA_1)) {
> IMB_SHA1(mb_mgr,
> xform->auth.key.data,
> xform->auth.key.length,
> hashed_key);
> +#if IMB_VERSION(1, 3, 0) >= IMB_VERSION_NUM
> key_larger_block_size = 1;
> +#endif
> }
> break;
> case RTE_CRYPTO_AUTH_SHA1:
> @@ -287,14 +297,18 @@ aesni_mb_set_session_auth_parameters(const
> IMB_MGR *mb_mgr,
> break;
> case RTE_CRYPTO_AUTH_SHA224_HMAC:
> sess->template_job.hash_alg = IMB_AUTH_HMAC_SHA_224;
> +#if IMB_VERSION(1, 3, 0) >= IMB_VERSION_NUM
> hash_oneblock_fn = mb_mgr->sha224_one_block;
> +#endif
> if (xform->auth.key.length > get_auth_algo_blocksize(
> IMB_AUTH_HMAC_SHA_224)) {
> IMB_SHA224(mb_mgr,
> xform->auth.key.data,
> xform->auth.key.length,
> hashed_key);
> +#if IMB_VERSION(1, 3, 0) >= IMB_VERSION_NUM
> key_larger_block_size = 1;
> +#endif
> }
> break;
> case RTE_CRYPTO_AUTH_SHA224:
> @@ -303,14 +317,18 @@ aesni_mb_set_session_auth_parameters(const
> IMB_MGR *mb_mgr,
> break;
> case RTE_CRYPTO_AUTH_SHA256_HMAC:
> sess->template_job.hash_alg = IMB_AUTH_HMAC_SHA_256;
> +#if IMB_VERSION(1, 3, 0) >= IMB_VERSION_NUM
> hash_oneblock_fn = mb_mgr->sha256_one_block;
> +#endif
> if (xform->auth.key.length > get_auth_algo_blocksize(
> IMB_AUTH_HMAC_SHA_256)) {
> IMB_SHA256(mb_mgr,
> xform->auth.key.data,
> xform->auth.key.length,
> hashed_key);
> +#if IMB_VERSION(1, 3, 0) >= IMB_VERSION_NUM
> key_larger_block_size = 1;
> +#endif
> }
> break;
> case RTE_CRYPTO_AUTH_SHA256:
> @@ -319,14 +337,18 @@ aesni_mb_set_session_auth_parameters(const
> IMB_MGR *mb_mgr,
> break;
> case RTE_CRYPTO_AUTH_SHA384_HMAC:
> sess->template_job.hash_alg = IMB_AUTH_HMAC_SHA_384;
> +#if IMB_VERSION(1, 3, 0) >= IMB_VERSION_NUM
> hash_oneblock_fn = mb_mgr->sha384_one_block;
> +#endif
> if (xform->auth.key.length > get_auth_algo_blocksize(
> IMB_AUTH
Re: [PATCH v9 0/4] hash: add SVE support for bulk key lookup
30/04/2024 18:27, Yoan Picchi: > This patchset adds SVE support for the signature comparison in the cuckoo > hash lookup and improves the existing NEON implementation. These > optimizations required changes to the data format and signature of the > relevant functions to support dense hitmasks (no padding) and having the > primary and secondary hitmasks interleaved instead of being in their own > array each. > > Benchmarking the cuckoo hash perf test, I observed this effect on speed: > There are no significant changes on Intel (ran on Sapphire Rapids) > Neon is up to 7-10% faster (ran on ampere altra) > 128b SVE is about 3-5% slower than the optimized neon (ran on a graviton > 3 cloud instance) > 256b SVE is about 0-3% slower than the optimized neon (ran on a graviton > 3 cloud instance) > > V2->V3: > Remove a redundant if in the test > Change a couple int to uint16_t in compare_signatures_dense > Several codding-style fix > > V3->V4: > Rebase > > V4->V5: > Commit message > > V5->V6: > Move the arch-specific code into new arch-specific files > Isolate the data struture refactor from adding SVE > > V6->V7: > Commit message > Moved RTE_HASH_COMPARE_SVE to the last commit of the chain > > V7->V8: > Commit message > Typos and missing spaces > > V8->V9: > Use __rte_unused instead of (void) > Fix an indentation mistake Waiting for a new version after comments sent in June please. Note: we didn't have a review from the lib maintainers.
Re: [PATCH v3 0/2] deque: add multithread unsafe deque library
02/05/2024 22:19, Aditya Ambadipudi: > As previously discussed in the mailing list [1] we are sending out this > patch that provides the implementation and unit test cases for the > RTE_DEQUE library. This includes functions for creating a RTE_DEQUE > object. Allocating memory to it. Deleting that object and free'ing the > memory associated with it. Enqueue/Dequeue functions. Functions for > zero-copy API. > > Aditya Ambadipudi (1): > deque: add unit tests for the deque library > > Honnappa Nagarahalli (1): > deque: add multi-thread unsafe double ended queue There were many comments on previous versions, and no ack on the v3, so I'm not sure all comments are addressed. We probably need a new round of reviews on this new library. Also, in order to show its benefits, would it be a good idea to replace some existing code with calls to this lib, inside this patch series?
Re: [PATCH] doc: documentation update for idxd driver
On Thu, 27 Jun 2024 04:42:14 + Shaiq Wani wrote: > Added a note to avoid usage errors by end user. > > Signed-off-by: Shaiq Wani If it is going in the documentation, it needs more explanation as to what that parameters do.
Re: [PATCH v2] eal/arm: replace RTE_BUILD_BUG on non-constant
04/05/2024 02:59, Stephen Hemminger:
> On Fri, 3 May 2024 19:27:30 +0100
> Daniel Gregory wrote:
>
> > The ARM implementation of rte_pause uses RTE_BUILD_BUG_ON to check
> > memorder, which is not constant. This causes compile errors when it is
> > enabled with RTE_ARM_USE_WFE. eg.
> >
> > ../lib/eal/arm/include/rte_pause_64.h: In function
> > ‘rte_wait_until_equal_16’:
> > ../lib/eal/include/rte_common.h:530:56: error: expression in static
> > assertion is not constant
> > 530 | #define RTE_BUILD_BUG_ON(condition) do {
> > static_assert(!(condition), #condition); } while (0)
> > |^~~~
> > ../lib/eal/arm/include/rte_pause_64.h:156:9: note: in expansion of macro
> > ‘RTE_BUILD_BUG_ON’
> > 156 | RTE_BUILD_BUG_ON(memorder != rte_memory_order_acquire &&
> > | ^~~~
> >
> > Fix the compile errors by replacing the check with an assert, like in
> > the generic implementation (lib/eal/include/generic/rte_pause.h).
>
> No, don't hide the problem.
>
> What code is calling these. Looks like a real bug. Could be behind layers of
> wrappers.
I support Stephen's opinion.
Please look for the real issue.
Re: [PATCH v4 00/13] Optionally have rte_memcpy delegate to compiler memcpy
On Thu, 27 Jun 2024 13:06:22 +0200 Mattias Rönnblom wrote: > On Wed, Jun 26, 2024 at 10:16:06PM +0200, Morten Brørup wrote: > > > From: Mattias Rönnblom [mailto:hof...@lysator.liu.se] > > > Sent: Wednesday, 26 June 2024 20.48 > > > > > > On Wed, Jun 26, 2024 at 05:24:04PM +0200, Maxime Coquelin wrote: > > > > > > > > > > > > On 6/26/24 16:58, Stephen Hemminger wrote: > > > > > On Wed, 26 Jun 2024 10:37:31 +0200 > > > > > Maxime Coquelin wrote: > > > > > > > > > > > On 6/25/24 21:27, Mattias Rönnblom wrote: > > > > > > > On Tue, Jun 25, 2024 at 05:29:35PM +0200, Maxime Coquelin wrote: > > > > > > > > Hi Mattias, > > > > > > > > > > > > > > > > On 6/20/24 19:57, Mattias Rönnblom wrote: > > > > > > > > > This patch set make DPDK library, driver, and application > > > code use the > > > > > > > > > compiler/libc memcpy() by default when functions in > > > are > > > > > > > > > invoked. > > > > > > > > > > > > > > > > > > The various custom DPDK rte_memcpy() implementations may be > > > retained > > > > > > > > > by means of a build-time option. > > > > > > > > > > > > > > > > > > This patch set only make a difference on x86, PPC and ARM. > > > Loongarch > > > > > > > > > and RISCV already used compiler/libc memcpy(). > > > > > > > > > > > > > > > > It indeed makes a difference on x86! > > > > > > > > > > > > > > > > Just tested latest main with and without your series on > > > > > > > > Intel(R) Xeon(R) Gold 6438N. > > > > > > > > > > > > > > > > The test is a simple IO loop between a Vhost PMD and a Virtio- > > > user PMD: > > > > > > > > # dpdk-testpmd -l 4-6 --file-prefix=virtio1 --no-pci --vdev > > > 'net_virtio_user0,mac=00:01:02:03:04:05,path=./vhost- > > > net,server=1,mrg_rxbuf=1,in_order=1' > > > > > > > > --single-file-segments -- -i > > > > > > > > testpmd> start > > > > > > > > > > > > > > > > # dpdk-testpmd -l 8-10 --file-prefix=vhost1 --no-pci --vdev > > > > > > > > 'net_vhost0,iface=vhost-net,client=1' --single-file-segments > > > -- -i > > > > > > > > testpmd> start tx_first 32 > > > > > > > > > > > > > > > > Latest main: 14.5Mpps > > > > > > > > Latest main + this series: 10Mpps > > > > > > > > > > > > > > I ran the above benchmark on my Raptor Lake desktop (locked to > > > 3,2 > > > > > > > GHz). GCC 12.3.0. > > > > > > > > > > > > > > Core use_cc_memcpy Mpps > > > > > > > Efalse 9.5 > > > > > > > Etrue 9.7 > > > > > > > Pfalse 16.4 > > > > > > > Ptrue 13.5 > > > > > > > > > > > > > > On the P-cores, there's a significant performance regression, > > > although > > > > > > > not as bad as the one you see on your Sapphire Rapids Xeon. On > > > the > > > > > > > E-cores, there's actually a slight performance gain. > > > > > > > > > > > > > > The virtio PMD does not directly invoke rte_memcpy() or anything > > > else > > > > > > > from , but rather use memcpy(), so I'm not sure I > > > > > > > understand what's going on here. Does the virtio driver delegate > > > some > > > > > > > performance-critical task to some module that in turns uses > > > > > > > rte_memcpy()? > > > > > > > > > > > > This is because Vhost is the bottleneck here, not Virtio driver. > > > > > > Indeed, the virtqueues memory belongs to the Virtio driver and the > > > > > > descriptors buffers are Virtio's mbufs, so not much memcpy's are > > > done > > > > > > there. > > > > > > > > > > > > Vhost however, is a heavy memcpy user, as all the descriptors > > > buffers > > > > > > are copied to/from its mbufs. > > > > > > > > > > Would be good to now the size (if small it is inlining that matters, > > > or > > > > > maybe alignment matters), and have test results for multiple > > > compiler versions. > > > > > Ideally, feed results back and update Gcc and Clang. > > > > > > > > I was testing with GCC 11 on RHEL-9: > > > > gcc (GCC) 11.4.1 20231218 (Red Hat 11.4.1-3) > > > > > > > > I was using the default one, 64B packets. > > > > > > > > I don't have time to perform these tests, but if you are willing to do > > > > it I'll be happy to review the results. > > > > > > > > > DPDK doesn't need to be in the optimize C library space. > > > > > > > > Certainly, but we already have an optimized version currently, so not > > > > much to do now on our side. When C libraries implementations will be > > > on > > > > par, we should definitely use them by default. > > > > > > > > > > I think it's not so much about optimized versus non-optimized at this > > > point. It's just that cc/libc memcpy sometimes performs better than > > > RTE memcpy, and sometimes doesn't. > > > > > > For virtio, a single memory copy in > > > lib/vhost/virtio_net.c:do_data_copy_enqueue() > > > is responsible for >95% of the performance regression introduced by > > > the cc memcpy patch for small packets on Intel P-cores. > > > > > > I'm not so sure this performance regression will go away in newer > > >
Re: [PATCH v4 00/13] Optionally have rte_memcpy delegate to compiler memcpy
On Thu, Jun 27, 2024 at 08:10:19AM -0700, Stephen Hemminger wrote: > On Thu, 27 Jun 2024 13:06:22 +0200 > Mattias Rönnblom wrote: > > > On Wed, Jun 26, 2024 at 10:16:06PM +0200, Morten Brørup wrote: > > > > From: Mattias Rönnblom [mailto:hof...@lysator.liu.se] > > > > Sent: Wednesday, 26 June 2024 20.48 > > > > > > > > On Wed, Jun 26, 2024 at 05:24:04PM +0200, Maxime Coquelin wrote: > > > > > > > > > > > > > > > On 6/26/24 16:58, Stephen Hemminger wrote: > > > > > > On Wed, 26 Jun 2024 10:37:31 +0200 > > > > > > Maxime Coquelin wrote: > > > > > > > > > > > > > On 6/25/24 21:27, Mattias Rönnblom wrote: > > > > > > > > On Tue, Jun 25, 2024 at 05:29:35PM +0200, Maxime Coquelin > > > > > > > > wrote: > > > > > > > > > Hi Mattias, > > > > > > > > > > > > > > > > > > On 6/20/24 19:57, Mattias Rönnblom wrote: > > > > > > > > > > This patch set make DPDK library, driver, and application > > > > code use the > > > > > > > > > > compiler/libc memcpy() by default when functions in > > > > are > > > > > > > > > > invoked. > > > > > > > > > > > > > > > > > > > > The various custom DPDK rte_memcpy() implementations may be > > > > > > > > > > > > > > retained > > > > > > > > > > by means of a build-time option. > > > > > > > > > > > > > > > > > > > > This patch set only make a difference on x86, PPC and ARM. > > > > Loongarch > > > > > > > > > > and RISCV already used compiler/libc memcpy(). > > > > > > > > > > > > > > > > > > It indeed makes a difference on x86! > > > > > > > > > > > > > > > > > > Just tested latest main with and without your series on > > > > > > > > > Intel(R) Xeon(R) Gold 6438N. > > > > > > > > > > > > > > > > > > The test is a simple IO loop between a Vhost PMD and a > > > > > > > > > Virtio- > > > > user PMD: > > > > > > > > > # dpdk-testpmd -l 4-6 --file-prefix=virtio1 --no-pci --vdev > > > > > > > > > > > > > 'net_virtio_user0,mac=00:01:02:03:04:05,path=./vhost- > > > > net,server=1,mrg_rxbuf=1,in_order=1' > > > > > > > > > --single-file-segments -- -i > > > > > > > > > testpmd> start > > > > > > > > > > > > > > > > > > # dpdk-testpmd -l 8-10 --file-prefix=vhost1 --no-pci --vdev > > > > > > > > > 'net_vhost0,iface=vhost-net,client=1' > > > > > > > > > --single-file-segments > > > > -- -i > > > > > > > > > testpmd> start tx_first 32 > > > > > > > > > > > > > > > > > > Latest main: 14.5Mpps > > > > > > > > > Latest main + this series: 10Mpps > > > > > > > > > > > > > > > > I ran the above benchmark on my Raptor Lake desktop (locked to > > > > 3,2 > > > > > > > > GHz). GCC 12.3.0. > > > > > > > > > > > > > > > > Core use_cc_memcpy Mpps > > > > > > > > Efalse 9.5 > > > > > > > > Etrue 9.7 > > > > > > > > Pfalse 16.4 > > > > > > > > Ptrue 13.5 > > > > > > > > > > > > > > > > On the P-cores, there's a significant performance regression, > > > > although > > > > > > > > not as bad as the one you see on your Sapphire Rapids Xeon. On > > > > the > > > > > > > > E-cores, there's actually a slight performance gain. > > > > > > > > > > > > > > > > The virtio PMD does not directly invoke rte_memcpy() or > > > > > > > > anything > > > > else > > > > > > > > from , but rather use memcpy(), so I'm not sure I > > > > > > > > understand what's going on here. Does the virtio driver > > > > > > > > delegate > > > > some > > > > > > > > performance-critical task to some module that in turns uses > > > > > > > > rte_memcpy()? > > > > > > > > > > > > > > This is because Vhost is the bottleneck here, not Virtio driver. > > > > > > > Indeed, the virtqueues memory belongs to the Virtio driver and the > > > > > > > descriptors buffers are Virtio's mbufs, so not much memcpy's are > > > > done > > > > > > > there. > > > > > > > > > > > > > > Vhost however, is a heavy memcpy user, as all the descriptors > > > > buffers > > > > > > > are copied to/from its mbufs. > > > > > > > > > > > > Would be good to now the size (if small it is inlining that > > > > > > matters, > > > > or > > > > > > maybe alignment matters), and have test results for multiple > > > > compiler versions. > > > > > > Ideally, feed results back and update Gcc and Clang. > > > > > > > > > > I was testing with GCC 11 on RHEL-9: > > > > > gcc (GCC) 11.4.1 20231218 (Red Hat 11.4.1-3) > > > > > > > > > > I was using the default one, 64B packets. > > > > > > > > > > I don't have time to perform these tests, but if you are willing to do > > > > > it I'll be happy to review the results. > > > > > > > > > > > DPDK doesn't need to be in the optimize C library space. > > > > > > > > > > Certainly, but we already have an optimized version currently, so not > > > > > much to do now on our side. When C libraries implementations will be > > > > on > > > > > par, we should definitely use them by default. > > > > > > > > > > > > > I think it's not so much about optimized versus non-optimized at this > > >
Re: [PATCH v2 2/2] eal: add Arm WFET in power management intrinsics
19/06/2024 08:45, Wathsala Vithanage:
> --- a/lib/eal/arm/include/rte_cpuflags_64.h
> +++ b/lib/eal/arm/include/rte_cpuflags_64.h
> @@ -36,6 +36,7 @@ enum rte_cpu_flag_t {
> RTE_CPUFLAG_SVEF64MM,
> RTE_CPUFLAG_SVEBF16,
> RTE_CPUFLAG_AARCH64,
> + RTE_CPUFLAG_WFXT,
> };
It may be useful to add comments explaining each flag.
May be a separate patch in this series?
> - * Copyright(c) 2019 Arm Limited
> + * Copyright(c) 2024 Arm Limited
No, it's wrong to remove initial date,
and no, you don't need to update dates at all.
> -#ifdef RTE_WAIT_UNTIL_EQUAL_ARCH_DEFINED
Why removing this #ifdef?
> -/* Send a local event to quit WFE. */
> +/* Send a local event to quit WFE/WFxT. */
> #define __RTE_ARM_SEVL() { asm volatile("sevl" : : : "memory"); }
>
> -/* Send a global event to quit WFE for all cores. */
> +/* Send a global event to quit WFE/WFxT for all cores. */
> #define __RTE_ARM_SEV() { asm volatile("sev" : : : "memory"); }
>
> /* Put processor into low power WFE(Wait For Event) state. */
> #define __RTE_ARM_WFE() { asm volatile("wfe" : : : "memory"); }
>
> +/* Put processor into low power WFET (WFE with Timeout) state. */
> +#ifdef RTE_ARM_FEATURE_WFXT
> +#define __RTE_ARM_WFET(t) { \
> + asm volatile("wfet %x[to]"\
> + : \
> + : [to] "r" (t)\
> + : "memory"); \
> + }
Is there any intrinsic function available?
[...]
> --- a/lib/eal/arm/rte_cpuflags.c
> +++ b/lib/eal/arm/rte_cpuflags.c
> @@ -115,6 +115,7 @@ const struct feature_entry rte_cpu_feature_table[] = {
> FEAT_DEF(SVEF32MM, REG_HWCAP2, 10)
> FEAT_DEF(SVEF64MM, REG_HWCAP2, 11)
> FEAT_DEF(SVEBF16, REG_HWCAP2, 12)
> + FEAT_DEF(WFXT, REG_HWCAP2, 31)
> FEAT_DEF(AARCH64, REG_PLATFORM, 0)
Are you sure of alignment? (looks wrong in my email client)
[...]
> rte_cpu_get_intrinsics_support(struct rte_cpu_intrinsics *intrinsics)
> {
> memset(intrinsics, 0, sizeof(*intrinsics));
> -#ifdef RTE_ARM_USE_WFE
> intrinsics->power_monitor = 1;
> -#endif
Why removing this #ifdef?
> +uint8_t wfet_en;
It should be made static probably.
This variable will be unused in some cases, needs #ifdef.
> +
> +RTE_INIT(rte_power_intrinsics_init)
> +{
> +#ifdef RTE_ARCH_64
> + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_WFXT))
> + wfet_en = 1;
> +#endif
> +}
> +
> +/**
> + * This function uses WFE/WFET instruction to make lcore suspend
> * execution on ARM.
> - * Note that timestamp based timeout is not supported yet.
> */
> int
> rte_power_monitor(const struct rte_power_monitor_cond *pmc,
> const uint64_t tsc_timestamp)
> {
> - RTE_SET_USED(tsc_timestamp);
> -
> -#ifdef RTE_ARM_USE_WFE
> +#ifdef RTE_ARCH_64
It looks wrong.
If RTE_ARM_USE_WFE is disabled, you should not call __RTE_ARM_WFE().
> const unsigned int lcore_id = rte_lcore_id();
> uint64_t cur_value;
>
> @@ -33,28 +44,30 @@ rte_power_monitor(const struct rte_power_monitor_cond
> *pmc,
>
> switch (pmc->size) {
> case sizeof(uint8_t):
> - __RTE_ARM_LOAD_EXC_8(pmc->addr, cur_value,
> rte_memory_order_relaxed)
> - __RTE_ARM_WFE()
> + __RTE_ARM_LOAD_EXC_8(pmc->addr, cur_value,
> rte_memory_order_relaxed);
Re: [PATCH] bpf: don't verify classic bpfs
16/05/2024 11:36, Konstantin Ananyev: > > > On Sun, 12 May 2024 08:55:45 +0300 > > Yoav Winstein wrote: > > > > > When classic BPFs with lots of branching instructions are compiled, > > > __rte_bpf_bpf_validate runs way too slow. A simple bpf such as: > > > 'ether host a0:38:6d:af:17:eb or b3:a3:ff:b6:c1:ef or ...' 12 times > > > > > > results in ~1 minute of bpf validation. > > > This patch makes __rte_bpf_bpf_validate be aware of bpf_prm originating > > > from classic BPF, allowing to safely skip over the validation. > > > > > > Signed-off-by: Yoav Winstein > > > --- > > > > No. > > Wallpapering over a performance bug in the BPF library is not > > the best way to handle this. Please analyze the problem in the BPF > > library; it should be fixed there. > > +1 > Blindly disabling verification for all cBPFs is the worst possible option > here. > We need at least try to understand what exactly causing such slowdown. +1 You didn't mention it is also breaking ABI compatibility.
DPDK Release Status Meeting 2024-06-27
Release status meeting minutes 2024-06-27 = Agenda: * Release Dates * Subtrees * Roadmaps * LTS * Defects * Opens Participants: * ARM * Debian/Microsoft * Intel * Marvell * Nvidia * Red Hat Release Dates - The following are the current/updated working dates for 24.07: - Proposal deadline (RFC/v1 patches): 26 April 2024 - API freeze (-rc1): 14 June 2024 - PMD features freeze (-rc2): 5 July 2024 - Builtin applications features freeze (-rc3): 12 July 2024 - Release: 23 July 2023 https://core.dpdk.org/roadmap/#dates Subtrees * next-net * No other updates this week. * next-net-intel * Large ICE driver base code update under review. * Some under patches under review. * next-net-mlx * No update. * next-net-mvl * PR sent and merged. * next-eventdev * PR sent and merged. * next-baseband * Some of the main series merged for RC1. * Working on remaining series. * next-virtio * Some series merged for RC1. * More patches need reviews and will go to rc2. * next-crypto * Majority of patches merged. * OpenSSL patches reviewed and acked. * main * RC1 is out. * Some test reports coming in. * Discussion ongoing about replacing rte_memcpy with standard memcpy. LTS --- Please add acks to confirm validation support for a 3 year LTS window: http://inbox.dpdk.org/dev/20240117161804.223582-1-ktray...@redhat.com/ * 23.11.2 - Released. * 22.11.6 - Released. * 21.11.8 - Released. * 20.11.10 - Will only be updated with CVE and critical fixes. * 19.11.15 - Will only be updated with CVE and critical fixes. * Distros * Debian 12 contains DPDK v22.11 * Ubuntu 24.04 contains DPDK v23.11 * Ubuntu 23.04 contains DPDK v22.11 * RHEL 8/9 contains DPDK 23.11 Defects --- * Bugzilla links, 'Bugs', added for hosted projects * https://www.dpdk.org/hosted-projects/ DPDK Release Status Meetings The DPDK Release Status Meeting is intended for DPDK Committers to discuss the status of the master tree and sub-trees, and for project managers to track progress or milestone dates. The meeting occurs on every Thursday at 9:30 UTC over Jitsi on https://meet.jit.si/DPDK You don't need an invite to join the meeting but if you want a calendar reminder just send an email to "John McNamara john.mcnam...@intel.com" for the invite.
RE: [PATCH] buildtools: fix build with clang 17
> -Original Message-
> From: David Marchand
> Sent: Thursday, June 27, 2024 3:37 PM
> To: Ali Alnubani
> Cc: dev@dpdk.org; NBU-Contact-Thomas Monjalon (EXTERNAL)
> ; sta...@dpdk.org; Bruce Richardson
> ; Mingjin Ye
> Subject: Re: [PATCH] buildtools: fix build with clang 17
>
> On Wed, Mar 20, 2024 at 5:30 PM David Marchand
> wrote:
> >
> > Hello Ali, Thomas,
> >
> > On Wed, Mar 20, 2024 at 5:01 PM Ali Alnubani wrote:
> > >
> > > On Fedora 39 with Clang 17.0.3 and ASan enabled,
> > > RTE_PMD_EXPORT_NAME seems to be done twice for a single
> > > lib, which results in load_drivers() returning a list
> > > consisting of 2 drivers (e.g., ['mlx5_common_pci', '']).
> > > image.find_by_prefix("this_pmd_name") returns 2 symbols in this case,
> > > "mlx5_common_pci" and an empty string ''. This didn't reproduce
> > > with clang version 16.0.6.
> > >
> > > This patch ensures that a symbol with an empty string_value doesn't
> > > cause an addition to the list of drivers.
> >
> > I suppose this comes from ASan instrumenting the code:
> > # nm /root/dpdk/build-clang/drivers/libtmp_rte_common_mlx5.a | grep
> this_pmd
> > r this_pmd_name3
> > n this_pmd_name3.e5676185d74e2e1a9de646deebca963f
> > r this_pmd_name3
> > n this_pmd_name3.a2533baf7a46959f41383725087d4086
> >
> > The name of the symbols this script should look for has a clear
> > format, which is this_pmd_name[0-9]+.
> > Filtering with this pattern, there would be no need to go and
> > interpret a symbol content.
>
> Ali, can you send a v2?
>
Hi David,
Apologies for the delay, will continue working on this as soon as possible.
Regards,
Ali
Re: [PATCH] net/ice: support FEC feature
Hi Mingjin,
On 11/04/2024 10:45, Mingjin Ye wrote:
This patch enable three Forward Error Correction(FEC) related ops
in ice driver. As no speed information can get from HW, this patch
only show FEC capability.
Signed-off-by: Mingjin Ye
---
doc/guides/nics/features/ice.ini | 1 +
doc/guides/nics/ice.rst | 5 +
drivers/net/ice/ice_ethdev.c | 176 +++
3 files changed, 182 insertions(+)
diff --git a/doc/guides/nics/features/ice.ini b/doc/guides/nics/features/ice.ini
index 62869ef0a0..a9be394696 100644
--- a/doc/guides/nics/features/ice.ini
+++ b/doc/guides/nics/features/ice.ini
@@ -9,6 +9,7 @@
[Features]
Speed capabilities = Y
Link speed configuration = Y
+FEC = Y
Link status = Y
Link status event= Y
Rx interrupt = Y
diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst
index 3deeea9e6c..3d7e4ed7f1 100644
--- a/doc/guides/nics/ice.rst
+++ b/doc/guides/nics/ice.rst
@@ -323,6 +323,11 @@ The DCF PMD needs to advertise and acquire DCF capability
which allows DCF to
send AdminQ commands that it would like to execute over to the PF and receive
responses for the same from PF.
+Forward Error Correction (FEC)
+
+
+Supports get/set FEC mode and get FEC capability.
+
Generic Flow Support
diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index 87385d2649..56d0f2bb28 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -181,6 +181,10 @@ static int ice_timesync_read_time(struct rte_eth_dev *dev,
static int ice_timesync_write_time(struct rte_eth_dev *dev,
const struct timespec *timestamp);
static int ice_timesync_disable(struct rte_eth_dev *dev);
+static int ice_fec_get_capability(struct rte_eth_dev *dev, struct
rte_eth_fec_capa *speed_fec_capa,
+ unsigned int num);
+static int ice_fec_get(struct rte_eth_dev *dev, uint32_t *fec_capa);
+static int ice_fec_set(struct rte_eth_dev *dev, uint32_t fec_capa);
static const uint32_t *ice_buffer_split_supported_hdr_ptypes_get(struct
rte_eth_dev *dev,
size_t *no_of_elements);
@@ -298,6 +302,9 @@ static const struct eth_dev_ops ice_eth_dev_ops = {
.timesync_write_time = ice_timesync_write_time,
.timesync_disable = ice_timesync_disable,
.tm_ops_get = ice_tm_ops_get,
+ .fec_get_capability = ice_fec_get_capability,
+ .fec_get = ice_fec_get,
+ .fec_set = ice_fec_set,
.buffer_split_supported_hdr_ptypes_get =
ice_buffer_split_supported_hdr_ptypes_get,
};
@@ -6644,6 +6651,175 @@ ice_buffer_split_supported_hdr_ptypes_get(struct rte_eth_dev *dev __rte_unused,
return ptypes;
}
+static int
+ice_fec_get_capa_num(struct ice_aqc_get_phy_caps_data *pcaps,
+ struct rte_eth_fec_capa *speed_fec_capa)
+{
+ int num = 0;
+
+ if (!pcaps)
+ return ICE_ERR_NO_MEMORY;
no need to check since it was checked before in ice_fec_get_capability
+
+ if (pcaps->caps & ICE_AQC_PHY_EN_AUTO_FEC) {
+ if (speed_fec_capa)
+ speed_fec_capa[num].capa =
RTE_ETH_FEC_MODE_CAPA_MASK(AUTO);
+ num++;
+ }
+
+ if (pcaps->link_fec_options & ICE_AQC_PHY_FEC_10G_KR_40G_KR4_EN ||
+ pcaps->link_fec_options & ICE_AQC_PHY_FEC_10G_KR_40G_KR4_REQ ||
+ pcaps->link_fec_options & ICE_AQC_PHY_FEC_25G_KR_CLAUSE74_EN ||
+ pcaps->link_fec_options & ICE_AQC_PHY_FEC_25G_KR_REQ) {
+ if (speed_fec_capa)
+ speed_fec_capa[num].capa =
RTE_ETH_FEC_MODE_CAPA_MASK(BASER);
+ num++;
+ }
+
+ if (pcaps->link_fec_options & ICE_AQC_PHY_FEC_25G_RS_528_REQ ||
+ pcaps->link_fec_options & ICE_AQC_PHY_FEC_25G_RS_544_REQ ||
+ pcaps->link_fec_options & ICE_AQC_PHY_FEC_25G_RS_CLAUSE91_EN) {
+ if (speed_fec_capa)
+ speed_fec_capa[num].capa =
RTE_ETH_FEC_MODE_CAPA_MASK(RS);
+ num++;
+ }
+
+ if (pcaps->link_fec_options == 0) {
+ if (speed_fec_capa)
+ speed_fec_capa[num].capa =
RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC);
+ num++;
+ }
+
+ return num;
+}
here in this function above I see a number of problems:
1. according to API returning speed_fec_capa must have capabilities
associated with corresponding link speed.
2. RTE_ETH_FEC_MODE_CAPA_MASK(AUTO) is not an unique fec capability, if
it is supported then it should be presented in capability bitmask for
every speed
3. Same applied for RTE_ETH_FEC_MODE_CAPA_MASK(NOFEC)
My suggestions here:
- check for available speed in pcaps->eee_cap
- look at Table 3-20. Sup
Re: [PATCH v4 000/103] Update net/ice base driver to latest upstream snapshot
On Wed, Jun 26, 2024 at 06:33:36PM +0100, Bruce Richardson wrote: > On Wed, Jun 26, 2024 at 12:40:48PM +0100, Anatoly Burakov wrote: > > This is a patchset loosely based on internal development tree which > > tracked ICE driver development over a period of time since last > > snapshot update. > > > > v3-> v4: > > - Rebased on top of latest next-net-intel as some patches were already > > merged > > - Addressed review comments that were added to v2 after work on v3 was > > finished > > - Clarified and corrected more commit messages > > - Split most of the "squash a few fixes together" style patches > > - Moved around and squashed a few changes that felt better together > > - Merged all of the "update style to match upstream" style patches into one > > big patch > > - Moved all style patches to the end of the patchset > > > As mentioned on v3, will be applying this patchset in stages. > > Patches 1-25 acked and applied to dpdk-next-net-intel with minor adjustments: > * commit log (mainly title) updates > * added some fixes tags where appropriate > * added missing mailmap entries. > Patches 1-62 now acked and merged as above. Thanks, /Bruce
[PATCH v2 0/3] fix bpf load hangs with six IPv6 addresses
From: Konstantin Ananyev v2: - fix compilation warnings - fix nit in comments (Stephen) Konstantin Ananyev (3): bfp: fix MOV instruction evaluation bfp: fix load hangs with six IPv6 addresses test/bpf: add extra test cases for bpf convert app/test/test_bpf.c| 6 + lib/bpf/bpf_validate.c | 315 ++--- 2 files changed, 267 insertions(+), 54 deletions(-) -- 2.35.3
[PATCH v2 1/3] bfp: fix MOV instruction evaluation
From: Konstantin Ananyev
Verifier might left some register-state values uninitialized while
evaluating MOV instructions.
Add explicit initialization.
Fixes: 8021917293d0 ("bpf: add extra validation for input BPF program")
Cc: sta...@dpdk.org
Signed-off-by: Konstantin Ananyev
Acked-by: Morten Brørup
---
lib/bpf/bpf_validate.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/lib/bpf/bpf_validate.c b/lib/bpf/bpf_validate.c
index 79be5e917d..11344fff4d 100644
--- a/lib/bpf/bpf_validate.c
+++ b/lib/bpf/bpf_validate.c
@@ -636,14 +636,14 @@ eval_alu(struct bpf_verifier *bvf, const struct ebpf_insn
*ins)
{
uint64_t msk;
uint32_t op;
- size_t opsz;
+ size_t opsz, sz;
const char *err;
struct bpf_eval_state *st;
struct bpf_reg_val *rd, rs;
- opsz = (BPF_CLASS(ins->code) == BPF_ALU) ?
+ sz = (BPF_CLASS(ins->code) == BPF_ALU) ?
sizeof(uint32_t) : sizeof(uint64_t);
- opsz = opsz * CHAR_BIT;
+ opsz = sz * CHAR_BIT;
msk = RTE_LEN2MASK(opsz, uint64_t);
st = bvf->evst;
@@ -652,8 +652,10 @@ eval_alu(struct bpf_verifier *bvf, const struct ebpf_insn
*ins)
if (BPF_SRC(ins->code) == BPF_X) {
rs = st->rv[ins->src_reg];
eval_apply_mask(&rs, msk);
- } else
+ } else {
+ rs = (struct bpf_reg_val){.v = {.size = sz,},};
eval_fill_imm(&rs, msk, ins->imm);
+ }
eval_apply_mask(rd, msk);
--
2.35.3
[PATCH v2 2/3] bfp: fix load hangs with six IPv6 addresses
From: Konstantin Ananyev
As described in: https://bugs.dpdk.org/show_bug.cgi?id=1465
converting from following cBPF filter:
"host 1::1 or host 1::1 or host 1::1 or host 1::1 or host 1::1 or host 1::1"
taking too long for BPF verifier ito complete (up to 25 seconds).
Looking at it I didn't find any actual functional bug.
In fact, it does what is expected: goes through each possible path of
BPF program and evaluates register/stack state for each instruction.
The problem is that for program with a lot of conditional branches number
of possible paths starts to grow exponentially and such walk becomes very
excessive.
So to minimize number of evaluations, this patch implements heuristic
similar to what Linux kernel does - state pruning:
If from given instruction for given program state we explore all possible
paths and for each of them reach bpf_exit() without any complaints and a
valid R0 value, then for that instruction this program state can be
marked as 'safe'. When we later arrive at the same instruction with a state
equivalent to an earlier instruction 'safe' state, we can prune the search.
For now, only states for JCC targets are saved/examined.
Plus added few extra logging for DEBUG level.
Bugzilla ID: 1465
Fixes: 8021917293d0 ("bpf: add extra validation for input BPF program")
Cc: sta...@dpdk.org
Reported-by: Isaac Boukris
Signed-off-by: Konstantin Ananyev
Acked-by: Morten Brørup
Acked-by: Stephen Hemminger
---
lib/bpf/bpf_validate.c | 305 ++---
1 file changed, 255 insertions(+), 50 deletions(-)
diff --git a/lib/bpf/bpf_validate.c b/lib/bpf/bpf_validate.c
index 11344fff4d..3cfdc9ddf4 100644
--- a/lib/bpf/bpf_validate.c
+++ b/lib/bpf/bpf_validate.c
@@ -29,10 +29,13 @@ struct bpf_reg_val {
};
struct bpf_eval_state {
+ SLIST_ENTRY(bpf_eval_state) next; /* for @safe list traversal */
struct bpf_reg_val rv[EBPF_REG_NUM];
struct bpf_reg_val sv[MAX_BPF_STACK_SIZE / sizeof(uint64_t)];
};
+SLIST_HEAD(bpf_evst_head, bpf_eval_state);
+
/* possible instruction node colour */
enum {
WHITE,
@@ -52,6 +55,9 @@ enum {
#defineMAX_EDGES 2
+/* max number of 'safe' evaluated states to track per node */
+#define NODE_EVST_MAX 32
+
struct inst_node {
uint8_t colour;
uint8_t nb_edge:4;
@@ -59,7 +65,18 @@ struct inst_node {
uint8_t edge_type[MAX_EDGES];
uint32_t edge_dest[MAX_EDGES];
uint32_t prev_node;
- struct bpf_eval_state *evst;
+ struct {
+ struct bpf_eval_state *cur; /* save/restore for jcc targets */
+ struct bpf_eval_state *start;
+ struct bpf_evst_head safe;/* safe states for track/prune */
+ uint32_t nb_safe;
+ } evst;
+};
+
+struct evst_pool {
+ uint32_t num;
+ uint32_t cur;
+ struct bpf_eval_state *ent;
};
struct bpf_verifier {
@@ -73,11 +90,8 @@ struct bpf_verifier {
uint32_t edge_type[MAX_EDGE_TYPE];
struct bpf_eval_state *evst;
struct inst_node *evin;
- struct {
- uint32_t num;
- uint32_t cur;
- struct bpf_eval_state *ent;
- } evst_pool;
+ struct evst_pool evst_sr_pool; /* for evst save/restore */
+ struct evst_pool evst_tp_pool; /* for evst track/prune */
};
struct bpf_ins_check {
@@ -1085,7 +1099,7 @@ eval_jcc(struct bpf_verifier *bvf, const struct ebpf_insn
*ins)
struct bpf_reg_val rvf, rvt;
tst = bvf->evst;
- fst = bvf->evin->evst;
+ fst = bvf->evin->evst.cur;
frd = fst->rv + ins->dst_reg;
trd = tst->rv + ins->dst_reg;
@@ -1814,8 +1828,8 @@ add_edge(struct bpf_verifier *bvf, struct inst_node
*node, uint32_t nidx)
uint32_t ne;
if (nidx > bvf->prm->nb_ins) {
- RTE_BPF_LOG_LINE(ERR, "%s: program boundary violation at pc:
%u, "
- "next pc: %u",
+ RTE_BPF_LOG_LINE(ERR,
+ "%s: program boundary violation at pc: %u, next pc: %u",
__func__, get_node_idx(bvf, node), nidx);
return -EINVAL;
}
@@ -2091,60 +2105,114 @@ validate(struct bpf_verifier *bvf)
* helper functions get/free eval states.
*/
static struct bpf_eval_state *
-pull_eval_state(struct bpf_verifier *bvf)
+pull_eval_state(struct evst_pool *pool)
{
uint32_t n;
- n = bvf->evst_pool.cur;
- if (n == bvf->evst_pool.num)
+ n = pool->cur;
+ if (n == pool->num)
return NULL;
- bvf->evst_pool.cur = n + 1;
- return bvf->evst_pool.ent + n;
+ pool->cur = n + 1;
+ return pool->ent + n;
}
static void
-push_eval_state(struct bpf_verifier *bvf)
+push_eval_state(struct evst_pool *pool)
{
- bvf->evst_pool.cur--;
+ RTE_ASSERT(pool->cur != 0);
+ pool->cur--;
}
static void
evst_pool_fini(struct bpf_verifier *bvf)
{
bvf->evst = NULL;
-
[PATCH v2 3/3] test/bpf: add extra test cases for bpf convert
From: Konstantin Ananyev
Add few extra cases to catch problems similar to:
https://bugs.dpdk.org/show_bug.cgi?id=1465
Plus made it dump cBPF filter and converted eBPF program
to make things easier to track.
Suggested-by: Isaac Boukris
Signed-off-by: Konstantin Ananyev
Acked-by: Morten Brørup
Acked-by: Stephen Hemminger
---
app/test/test_bpf.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/app/test/test_bpf.c b/app/test/test_bpf.c
index 64c3c90b0a..7819d6aba9 100644
--- a/app/test/test_bpf.c
+++ b/app/test/test_bpf.c
@@ -3423,6 +3423,9 @@ static const char * const sample_filters[] = {
" and ((ip[2:2] - 4 * (ip[0] & 0x0F) - 4 * ((tcp[12] & 0xF0) >> 4) >
69))",
/* Other */
"len = 128",
+ "host 1::1 or host 1::1 or host 1::1 or host 1::1 or host 1::1 or host
1::1",
+ ("host 1::1 or host 1::2 or host 1::3 or host 1::4 or host 1::5 "
+ "or host 192.0.2.1 or host 192.0.2.100 or host 192.0.2.200"),
};
static int
@@ -3445,6 +3448,9 @@ test_bpf_filter(pcap_t *pcap, const char *s)
goto error;
}
+ printf("bpf convert for \"%s\" produced:\n", s);
+ rte_bpf_dump(stdout, prm->ins, prm->nb_ins);
+
bpf = rte_bpf_load(prm);
if (bpf == NULL) {
printf("%s@%d: failed to load bpf code, error=%d(%s);\n",
--
2.35.3
RE: [PATCH] bpf: don't verify classic bpfs
> > > > When classic BPFs with lots of branching instructions are compiled, > > > > __rte_bpf_bpf_validate runs way too slow. A simple bpf such as: > > > > 'ether host a0:38:6d:af:17:eb or b3:a3:ff:b6:c1:ef or ...' 12 times > > > > > > > > results in ~1 minute of bpf validation. > > > > This patch makes __rte_bpf_bpf_validate be aware of bpf_prm originating > > > > from classic BPF, allowing to safely skip over the validation. > > > > > > > > Signed-off-by: Yoav Winstein > > > > --- > > > > > > No. > > > Wallpapering over a performance bug in the BPF library is not > > > the best way to handle this. Please analyze the problem in the BPF > > > library; it should be fixed there. > > > > +1 > > Blindly disabling verification for all cBPFs is the worst possible option > > here. > > We need at least try to understand what exactly causing such slowdown. > > +1 > > You didn't mention it is also breaking ABI compatibility. Yep, it does, thanks Thomas for highlighting it. Yoav, can I ask submitter to check would: https://patchwork.dpdk.org/project/dpdk/list/?series=32321 fix the problem you are facing? I think that the root cause is the same.
RE: [PATCH 1/1] maintainers: update for vmbus/mana/netvsc drivers
> Subject: [PATCH 1/1] maintainers: update for vmbus/mana/netvsc drivers > > Add myself as maintainer for vmbus, mana and netvsc. > > Signed-off-by: Wei Hu Reviewed-by: Long Li > --- > MAINTAINERS | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index c9adff9846..58947b57ce 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -624,6 +624,7 @@ F: app/test/test_vdev.c > > VMBUS bus driver > M: Long Li > +M: Wei Hu > F: drivers/bus/vmbus/ > > > @@ -882,6 +883,7 @@ F: doc/guides/nics/features/mlx5.ini > > Microsoft mana > M: Long Li > +M: Wei Hu > F: drivers/net/mana/ > F: doc/guides/nics/mana.rst > F: doc/guides/nics/features/mana.ini > @@ -893,6 +895,7 @@ F: doc/guides/nics/vdev_netvsc.rst > > Microsoft Hyper-V netvsc > M: Long Li > +M: Wei Hu > F: drivers/net/netvsc/ > F: doc/guides/nics/netvsc.rst > F: doc/guides/nics/features/netvsc.ini > -- > 2.34.1
Testpmd usage in new DTS
Hi Thomas, Last November when we chatted in tech board about 2024 DTS goals, you said testpmd should be the primary tool used to drive the testsuites, and that if testpmd was missing some support for any DPDK features we want to test in DTS, then the support should be added into testpmd. So, we have recently been ramping up writing Ethernet API tests, and have done it only with testpmd so far based on this understanding. It seems like a good approach. Today we discussed in the CI meeting whether we should port over the l2fwd test, which is a test existing in the "old" DTS framework, based on the l2fwd sample app. For bringing this test coverage to new DTS, I think the correct approach is to write a testsuite which validates the same l2 forwarding functions, but using testpmd app instead of l2fwd app. I think this aligns with your expectation of driving testpmd usage in new DTS, but let me know if I have the wrong idea. So does this sound fine to you? And a second thing I want to raise which is tangentially related is I guess in the future we will have to determine what other apps can be used for tests which can't run from testpmd. I.e. right now at UNH lab we are running cryptodev tests on an Intel Quickassist 8970 card on our ARM server, and that test runs from an old DTS testsuite based on dpdk-test-cryptodev-perf. I'm guessing usage of such applications which have extensive support not existing in testpmd will be permitted at some point. It's fairly forward looking as we are really focused on ethdev work currently, but I figured I'd bring it up now.
Community CI Meeting Minutes - June 27, 2024
# Attendees 1. Patrick Robb 2. Paul Szczepanek 3. Luca Vizzarro 4. Nicholas Pratte 5. Aaron Conole 6. Dean Marx 7. Jeremy Spewock 8. Juraj Linkeš 9. Manit Mahajan 10. Tomas Durovec 11. Adam Hassick # Minutes = General Announcements * DPDK Summit in Montreal will be September 24-25: https://www.dpdk.org/event/dpdk-summit-2024/ * CFP closes July 21 * Tech board voted yesterday to allow remote presentations at Montreal (with lower priority) * Luca will make a submission for a remote DTS talk * David commented last week stating that there could be a section for how to setup DTS, run the hello world testsuite * Nathan Southern set up a call with some folks from AWS next Monday to discuss testing on cloud infrastructure. Email Nathan if you want to join this call. * David indicated there will be a vote over email for a DTS branch for framework patches = CI Status - UNH-IOL Community Lab * David noted this week that the template engine is out of date (UNH-IOL fork has some update from the past months). UNH now has a 60 day reminder for aggregation all commits made to our fork and upstreaming. * New Servers have arrived at UNH-IOL. Getting these mounted onto our 2nd DPDK Rack, setting up the associated infrastructure etc. * Setting up the UPS, tor switch, etc for DPDK rack 2. * Pending: * Pending emails are going out, but the checks are not being written to the API * Emailed Ali - will have to debug with him * We only are running this for ABI testing right now, but as soon as the behavior with the PW API looks good, we can turn this on for all the other labels (the PR for pending for all testing is ready) * Depends-on support: Adam has submitted a patchseries to the PW project which adds the changes to the Django models. Is under review. * Github PR: https://github.com/getpatchwork/patchwork/pull/590 * Has put together the corresponding changes to git-pw (client side) * Some overlap between the PW server and git-pw client - the pw server maintainer is aware of this feature being added for git-pw which will pair up with the dashboard updates * SPDK: Submitted a patch fixing a malloc error which affected Fedora 40. This is now merged, so we added Fedora 40 coverage in our lab. * We increased the retest limit per patchseries to 3 (was previously 1) due to a submitter who needed to retest multiple sets of contexts. - Intel Lab * None - Github Actions * None, the Robot is running smoothly. * There was a GitHub outage itself a few weeks ago, but anyone who was affected would have been able to request a retest. - Loongarch Lab * None = DTS Improvements & Test Development * Jumboframes testsuite: MTU behavior on different NIC drivers. * Within each driver, there are variables set for taking off ethernet overhead when setting max packet length. * MLNX subtracts 18 bytes * Intel/Broadcom subtract 26 bytes. * But from testing it appears that you can only send packets with MTU + 22 packets, not 26? * These variables are not common across drivers… so basically MTU as defined by different drivers is not the same * When we build scapy packets, the ethernet overhead is 14 bytes (source mac address, destination mac, error correction), so we can actually increase the l3 packet above the given MTU and still send packets * Juraj: Important to make sure we are running from the latest firmware/drivers on each device * Firmware driver versions for devices are published per DPDK release * Patrick Robbshould set up a 4 month reminder (during beginning of dpdk release cycle) to update all firmware to whatever was published as being supported for the release which just came out - use this version for all testing for the upcoming release * Mac Filter Testsuite: Submitted, getting reviews on the mailing list. Nick will respond to Jeremy’s comments today and submit a new version. * VLAN Filter: Bugzilla ticket is submitted for the VLAN filtering bug. David requested some verbose logs, so Dean redid the test and attached those to the ticket. * Queue Start/Stop and Dynamic Queue: * Show port into exposes a capability for whether you can stop or start the queue. * There is another bugzilla ticket out for –max-packet-len. It does not update the MTU if you are using a kernel driver. * https://bugs.dpdk.org/show_bug.cgi?id=1470 * Need to double check
Re: [PATCH v5] eal: verify mmu type for DPDK support (ppc64le)
On 5/29/24 11:32 AM, David Christensen wrote: IBM POWER systems support more than one type of memory management unit (MMU). The Power ISA 3.0 specification, which applies to P9 and later CPUs, defined a new Radix MMU which, among other things, allows an anonymous memory page mapping to be converted into a hugepage mapping at a specific address. This is a required feature in DPDK so we need to test the MMU type when POWER systems are used and provide a more useful error message for the user when running on an unsupported system such as P8/P9 on PowerVM. All architectures other than ppc64le unconditionally report that the MMU is supported. When running with ppc64le on Linux, the MMU is tested and the actual result is returned, while running with ppc64le on FreeBSD unconditionally reports that the MMU is supported to avoid unnecessary breakage until an actual test can be implemented for that environment (i.e. keeps existing behavior without the patch). Bugzilla ID: 1221 Any chance I'll receive a review for this patch in this release cycle or should I go ahead and mark the Bugzilla as will not address? Dave
RE: [PATCH v3 1/2] bus/pci: fix secondary process PCI uio resource map problem
> 19/04/2024 05:26, Chaoyong He:
> > From: Zerun Fu
> >
> > For the primary process, the logic loops all BARs and will skip the
> > map of BAR with an invalid physical address (0), also will assign
> > 'uio_res->nb_maps' with the real mapped BARs number. But for the
> > secondary process, instead of loops all BARs, the logic using the
> > 'uio_res->nb_map' as index. If the device uses continuous BARs there
> > will be no problem, whereas if it uses discrete BARs, it will lead to
> > mapping errors.
> >
> > Fix this problem by also loops all BARs and skip the map of BAR with
> > an invalid physical address in secondary process.
> >
> > Fixes: 9b957f378abf ("pci: merge uio functions for linux and bsd")
> > Cc: muk...@igel.co.jp
> > Cc: sta...@dpdk.org
> >
> > Signed-off-by: Zerun Fu
> > Reviewed-by: Chaoyong He
> > Reviewed-by: Long Wu
> > Reviewed-by: Peng Zhang
>
> You should have kept the ack from Anatoly here.
>
> > drivers/bus/pci/pci_common_uio.c | 40
> >
> > 1 file changed, 25 insertions(+), 15 deletions(-)
>
> There are too many changes in this sensitive code.
> Please could you introduce a first patch for the renaming of the variable "i"?
> It should make this patch simpler to read.
>
> Thank you
>
Okay, will do it in the next version patch.
Thanks for your review.
RE: [DPDK][PATCH v4] config/arm: add Ampere AmpereOneAC04 platform
Due to changes in product family naming conventions, this updated version has
no other changes except for some string adjustments.
Hi Thomas,
According to your suggestion, this version has also added a small description
of the platform.
Best Regards,
Yutang Jiang
> -Original Message-
> From: Yutang Jiang OS
> Sent: Friday, June 28, 2024 11:23 AM
> To: dev@dpdk.org
> Cc: Open Source Submission ; Yutang Jiang
> ; Yutang Jiang OS
> ; ruifeng.w...@arm.com;
> n...@arm.com; juraj.lin...@pantheon.tech; wathsala.vithan...@arm.com;
> tho...@monjalon.net; honnappa.nagaraha...@arm.com
> Subject: [DPDK][PATCH v4] config/arm: add Ampere AmpereOneAC04
> platform
>
> The AmpereOneAC04 is efficient Cloud Native CPU:
> Up to 192 Cores
> 2MB Private L2 Cache per Core
> 8 channel DDR5
> 128 lanes PCIe Gen5
>
> Signed-off-by: Yutang Jiang
> ---
> config/arm/arm64_ampereoneac04_linux_gcc | 17 +
> config/arm/meson.build | 19 +++
> 2 files changed, 36 insertions(+)
> create mode 100644 config/arm/arm64_ampereoneac04_linux_gcc
>
> diff --git a/config/arm/arm64_ampereoneac04_linux_gcc
> b/config/arm/arm64_ampereoneac04_linux_gcc
> new file mode 100644
> index 00..a8dfd6551f
> --- /dev/null
> +++ b/config/arm/arm64_ampereoneac04_linux_gcc
> @@ -0,0 +1,17 @@
> +[binaries]
> +c = ['ccache', 'aarch64-linux-gnu-gcc'] cpp = ['ccache',
> +'aarch64-linux-gnu-g++'] ar = 'aarch64-linux-gnu-gcc-ar'
> +strip = 'aarch64-linux-gnu-strip'
> +pkgconfig = 'aarch64-linux-gnu-pkg-config'
> +pkg-config = 'aarch64-linux-gnu-pkg-config'
> +pcap-config = ''
> +
> +[host_machine]
> +system = 'linux'
> +cpu_family = 'aarch64'
> +cpu = 'armv8.6-a'
> +endian = 'little'
> +
> +[properties]
> +platform = 'ampereoneac04'
> diff --git a/config/arm/meson.build b/config/arm/meson.build index
> a45aa9e466..012935d5d7 100644
> --- a/config/arm/meson.build
> +++ b/config/arm/meson.build
> @@ -210,6 +210,16 @@ implementer_ampere = {
> ['RTE_MAX_LCORE', 320],
> ['RTE_MAX_NUMA_NODES', 8]
> ]
> +},
> +'0xac4': {
> +'march': 'armv8.6-a',
> +'march_features': ['crc', 'crypto'],
> +'mcpu': 'ampere1a',
> +'flags': [
> +['RTE_MACHINE', '"AmpereOneAC04"'],
> +['RTE_MAX_LCORE', 384],
> +['RTE_MAX_NUMA_NODES', 8]
> +]
> }
> }
> }
> @@ -371,6 +381,13 @@ soc_ampereone = {
> 'numa': true
> }
>
> +soc_ampereoneac04 = {
> +'description': 'Ampere AmpereOne AC04',
> +'implementer': '0xc0',
> +'part_number': '0xac4',
> +'numa': true
> +}
> +
> soc_armada = {
> 'description': 'Marvell ARMADA',
> 'implementer': '0x41',
> @@ -621,6 +638,7 @@ generic: Generic un-optimized build for armv8
> aarch64 execution mode.
> generic_aarch32: Generic un-optimized build for armv8 aarch32 execution
> mode.
> altra: Ampere Altra/AltraMax
> ampereone: Ampere AmpereOne
> +ampereoneac04: Ampere AmpereOneAC04
> armada: Marvell ARMADA
> bluefield: NVIDIA BlueField
> bluefield3: NVIDIA BlueField-3
> @@ -658,6 +676,7 @@ socs = {
> 'generic_aarch32': soc_generic_aarch32,
> 'altra': soc_altra,
> 'ampereone': soc_ampereone,
> +'ampereoneac04': soc_ampereoneac04,
> 'armada': soc_armada,
> 'bluefield': soc_bluefield,
> 'bluefield3': soc_bluefield3,
> --
> 2.43.0
RE: [PATCH v3] config/arm: add Ampere AmpereOneX platform
Superseded. The latest updated patch name is "config/arm: add Ampere AmpereOneAC04 platform" Best Regards, Yutang Jiang > On 2024/6/27 10:44 AM, Yutang Jiang wrote: > > Signed-off-by: Yutang Jiang > > --- > > config/arm/arm64_ampereonex_linux_gcc | 17 + > > config/arm/meson.build| 19 +++ > > 2 files changed, 36 insertions(+) > > create mode 100644 config/arm/arm64_ampereonex_linux_gcc > > > Acked-by: Ruifeng Wang
Re: [PATCH v4 1/2] power: introduce PM QoS API on CPU wide
在 2024/6/27 23:06, Stephen Hemminger 写道:
On Thu, 27 Jun 2024 14:00:10 +0800
Huisong Li wrote:
+ char buf[BUFSIZ] = {0};
BUFSIZ is 4K and you probably don't need all of that.
I rember the maximum buffer length of sysfs show in Linux is BUFSIZ.
Just from the same size, here is ok to receive the data from Linux.
But LINE_MAX is also enough to use.
And initializing to 0 here should not be needed.
Ack
Why not:
char buf[LINE_MAX];
Thanks for your suggestion. use it in next version.
+ if (latency == 0)
+ sprintf(buf, "%s", "n/a");
+ else if (latency == RTE_POWER_QOS_RESUME_LATENCY_NO_CONSTRAINT)
+ sprintf(buf, "%u", 0);
+ else
+ sprintf(buf, "%u", latency);
Use snprintf instead.
Ack
.
[PATCH] dma/idxd: fix failure to configure a device instance for DSA
In ubuntu 24.04, DSA's workqueue has a new driver_name file in sysfs,
DPDK needs to write a correct value to this file when configuring a device
instance using the dpdk_idxd_cfg.py script, otherwise it will fail to be
configured, this patch fixes the issue.
Signed-off-by: Wenwu Ma
---
drivers/dma/idxd/dpdk_idxd_cfg.py | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/dma/idxd/dpdk_idxd_cfg.py
b/drivers/dma/idxd/dpdk_idxd_cfg.py
index c0c833ade9..9ca4c4d76c 100755
--- a/drivers/dma/idxd/dpdk_idxd_cfg.py
+++ b/drivers/dma/idxd/dpdk_idxd_cfg.py
@@ -104,8 +104,10 @@ def configure_dsa(dsa_id, args):
"priority": 1,
"max_batch_size": 1024,
"size": int(max_work_queues_size / nb_queues)}
-wqcfg.update(parse_wq_opts(args.wq_option))
wq_dir = SysfsDir(os.path.join(dsa_dir.path, f"wq{dsa_id}.{q}"))
+if os.path.exists(SysfsDir(os.path.join(wq_dir.path,
f"driver_name")).path):
+wqcfg.update({"driver_name": "user"})
+wqcfg.update(parse_wq_opts(args.wq_option))
wq_dir.write_values(wqcfg)
# enable device and then queues
--
2.25.1
Re: [PATCH] devtools: fix version variable not initialized
On 2024/6/27 22:28, David Marchand wrote:
> On Wed, Apr 17, 2024 at 11:32 AM Dengdui Huang
> wrote:
>>
>> The version variable is not initialized. Therefore, if the -V option
>> is not specified, the value of $version is obtained from the context,
>> which may cause the version map parsing failure.
>>
>> Fixes: 6edec7f202ac ("devtools: list symbols by version")
>> Cc: sta...@dpdk.org
>>
>> Signed-off-by: Dengdui Huang
>
> This is an internal script and I wonder how the mentionned issue is hit.
> In any case this fix is correct.
>
> Reviewed-by: David Marchand
>
>
Thanks for your review.
The project build script may pass version information through environment
variables.
This problem occurs if the following execution sequence exists:
export version=devel
meson build
ninja -C build
