Add API for Generic MAC Feeder
Signed-off-by: Serhii Iliushyk <sil-...@napatech.com>
---
.../link_mgmt/link_100g/nt4ga_link_100g.c | 8 ++
drivers/net/ntnic/meson.build | 1 +
.../net/ntnic/nthw/core/include/nthw_core.h | 1 +
.../net/ntnic/nthw/core/include/nthw_gmf.h | 64 +++++++++
drivers/net/ntnic/nthw/core/nthw_gmf.c | 133 ++++++++++++++++++
5 files changed, 207 insertions(+)
create mode 100644 drivers/net/ntnic/nthw/core/include/nthw_gmf.h
create mode 100644 drivers/net/ntnic/nthw/core/nthw_gmf.c
diff --git a/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
b/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
index 9d55733ddc..da570256f1 100644
--- a/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
+++ b/drivers/net/ntnic/link_mgmt/link_100g/nt4ga_link_100g.c
@@ -404,6 +404,14 @@ static int _port_init(adapter_info_t *drv, nthw_fpga_t
*fpga, int port)
_enable_tx(drv, mac_pcs);
_reset_rx(drv, mac_pcs);
+ /* 2.2) Nt4gaPort::setup() */
+ if (nthw_gmf_init(NULL, fpga, port) == 0) {
+ nthw_gmf_t gmf;
+
+ if (nthw_gmf_init(&gmf, fpga, port) == 0)
+ nthw_gmf_set_enable(&gmf, true);
+ }
+
/* Phase 3. Link state machine steps */
/* 3.1) Create NIM, ::createNim() */
diff --git a/drivers/net/ntnic/meson.build b/drivers/net/ntnic/meson.build
index 77f87ffa8e..4ae9358073 100644
--- a/drivers/net/ntnic/meson.build
+++ b/drivers/net/ntnic/meson.build
@@ -39,6 +39,7 @@ sources = files(
'nthw/core/nt200a0x/reset/nthw_fpga_rst9563.c',
'nthw/core/nt200a0x/reset/nthw_fpga_rst_nt200a0x.c',
'nthw/core/nthw_fpga.c',
+ 'nthw/core/nthw_gmf.c',
'nthw/core/nthw_gpio_phy.c',
'nthw/core/nthw_hif.c',
'nthw/core/nthw_i2cm.c',
diff --git a/drivers/net/ntnic/nthw/core/include/nthw_core.h
b/drivers/net/ntnic/nthw/core/include/nthw_core.h
index fe32891712..4073f9632c 100644
--- a/drivers/net/ntnic/nthw/core/include/nthw_core.h
+++ b/drivers/net/ntnic/nthw/core/include/nthw_core.h
@@ -17,6 +17,7 @@
#include "nthw_iic.h"
#include "nthw_i2cm.h"
+#include "nthw_gmf.h"
#include "nthw_gpio_phy.h"
#include "nthw_mac_pcs.h"
#include "nthw_sdc.h"
diff --git a/drivers/net/ntnic/nthw/core/include/nthw_gmf.h
b/drivers/net/ntnic/nthw/core/include/nthw_gmf.h
new file mode 100644
index 0000000000..cc5be85154
--- /dev/null
+++ b/drivers/net/ntnic/nthw/core/include/nthw_gmf.h
@@ -0,0 +1,64 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#ifndef __NTHW_GMF_H__
+#define __NTHW_GMF_H__
+
+struct nthw_gmf {
+ nthw_fpga_t *mp_fpga;
+ nthw_module_t *mp_mod_gmf;
+ int mn_instance;
+
+ nthw_register_t *mp_ctrl;
+ nthw_field_t *mp_ctrl_enable;
+ nthw_field_t *mp_ctrl_ifg_enable;
+ nthw_field_t *mp_ctrl_ifg_tx_now_always;
+ nthw_field_t *mp_ctrl_ifg_tx_on_ts_always;
+ nthw_field_t *mp_ctrl_ifg_tx_on_ts_adjust_on_set_clock;
+ nthw_field_t *mp_ctrl_ifg_auto_adjust_enable;
+ nthw_field_t *mp_ctrl_ts_inject_always;
+ nthw_field_t *mp_ctrl_fcs_always;
+
+ nthw_register_t *mp_speed;
+ nthw_field_t *mp_speed_ifg_speed;
+
+ nthw_register_t *mp_ifg_clock_delta;
+ nthw_field_t *mp_ifg_clock_delta_delta;
+
+ nthw_register_t *mp_ifg_clock_delta_adjust;
+ nthw_field_t *mp_ifg_clock_delta_adjust_delta;
+
+ nthw_register_t *mp_ifg_max_adjust_slack;
+ nthw_field_t *mp_ifg_max_adjust_slack_slack;
+
+ nthw_register_t *mp_debug_lane_marker;
+ nthw_field_t *mp_debug_lane_marker_compensation;
+
+ nthw_register_t *mp_stat_sticky;
+ nthw_field_t *mp_stat_sticky_data_underflowed;
+ nthw_field_t *mp_stat_sticky_ifg_adjusted;
+
+ nthw_register_t *mp_stat_next_pkt;
+ nthw_field_t *mp_stat_next_pkt_ns;
+
+ nthw_register_t *mp_stat_max_delayed_pkt;
+ nthw_field_t *mp_stat_max_delayed_pkt_ns;
+
+ nthw_register_t *mp_ts_inject;
+ nthw_field_t *mp_ts_inject_offset;
+ nthw_field_t *mp_ts_inject_pos;
+ int mn_param_gmf_ifg_speed_mul;
+ int mn_param_gmf_ifg_speed_div;
+
+ bool m_administrative_block; /* Used to enforce license expiry */
+};
+
+typedef struct nthw_gmf nthw_gmf_t;
+
+int nthw_gmf_init(nthw_gmf_t *p, nthw_fpga_t *p_fpga, int n_instance);
+
+void nthw_gmf_set_enable(nthw_gmf_t *p, bool enable);
+
+#endif /* __NTHW_GMF_H__ */
diff --git a/drivers/net/ntnic/nthw/core/nthw_gmf.c
b/drivers/net/ntnic/nthw/core/nthw_gmf.c
new file mode 100644
index 0000000000..a56fb80d3a
--- /dev/null
+++ b/drivers/net/ntnic/nthw/core/nthw_gmf.c
@@ -0,0 +1,133 @@
+/*
+ * SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Napatech A/S
+ */
+
+#include <limits.h>
+#include <math.h>
+#include "ntlog.h"
+
+#include "nthw_drv.h"
+#include "nthw_register.h"
+
+#include "nthw_gmf.h"
+
+int nthw_gmf_init(nthw_gmf_t *p, nthw_fpga_t *p_fpga, int n_instance)
+{
+ nthw_module_t *mod = nthw_fpga_query_module(p_fpga, MOD_GMF,
n_instance);
+
+ if (p == NULL)
+ return mod == NULL ? -1 : 0;
+
+ if (mod == NULL) {
+ NT_LOG(ERR, NTHW, "%s: GMF %d: no such instance\n",
+ p_fpga->p_fpga_info->mp_adapter_id_str, n_instance);
+ return -1;
+ }
+
+ p->mp_fpga = p_fpga;
+ p->mn_instance = n_instance;
+ p->mp_mod_gmf = mod;
+
+ p->mp_ctrl = nthw_module_get_register(p->mp_mod_gmf, GMF_CTRL);
+ p->mp_ctrl_enable = nthw_register_get_field(p->mp_ctrl,
GMF_CTRL_ENABLE);
+ p->mp_ctrl_ifg_enable = nthw_register_get_field(p->mp_ctrl,
GMF_CTRL_IFG_ENABLE);
+ p->mp_ctrl_ifg_auto_adjust_enable =
+ nthw_register_get_field(p->mp_ctrl,
GMF_CTRL_IFG_AUTO_ADJUST_ENABLE);
+ p->mp_ctrl_ts_inject_always =
+ nthw_register_query_field(p->mp_ctrl,
GMF_CTRL_TS_INJECT_ALWAYS);
+ p->mp_ctrl_fcs_always = nthw_register_query_field(p->mp_ctrl,
GMF_CTRL_FCS_ALWAYS);
+
+ p->mp_speed = nthw_module_get_register(p->mp_mod_gmf, GMF_SPEED);
+ p->mp_speed_ifg_speed = nthw_register_get_field(p->mp_speed,
GMF_SPEED_IFG_SPEED);
+
+ p->mp_ifg_clock_delta = nthw_module_get_register(p->mp_mod_gmf,
GMF_IFG_SET_CLOCK_DELTA);
+ p->mp_ifg_clock_delta_delta =
+ nthw_register_get_field(p->mp_ifg_clock_delta,
GMF_IFG_SET_CLOCK_DELTA_DELTA);
+
+ p->mp_ifg_max_adjust_slack =
+ nthw_module_get_register(p->mp_mod_gmf,
GMF_IFG_MAX_ADJUST_SLACK);
+ p->mp_ifg_max_adjust_slack_slack =
nthw_register_get_field(p->mp_ifg_max_adjust_slack,
+ GMF_IFG_MAX_ADJUST_SLACK_SLACK);
+
+ p->mp_debug_lane_marker = nthw_module_get_register(p->mp_mod_gmf,
GMF_DEBUG_LANE_MARKER);
+ p->mp_debug_lane_marker_compensation =
+ nthw_register_get_field(p->mp_debug_lane_marker,
+ GMF_DEBUG_LANE_MARKER_COMPENSATION);
+
+ p->mp_stat_sticky = nthw_module_get_register(p->mp_mod_gmf,
GMF_STAT_STICKY);
+ p->mp_stat_sticky_data_underflowed =
+ nthw_register_get_field(p->mp_stat_sticky,
GMF_STAT_STICKY_DATA_UNDERFLOWED);
+ p->mp_stat_sticky_ifg_adjusted =
+ nthw_register_get_field(p->mp_stat_sticky,
GMF_STAT_STICKY_IFG_ADJUSTED);
+
+ p->mn_param_gmf_ifg_speed_mul =
+ nthw_fpga_get_product_param(p_fpga, NT_GMF_IFG_SPEED_MUL, 1);
+ p->mn_param_gmf_ifg_speed_div =
+ nthw_fpga_get_product_param(p_fpga, NT_GMF_IFG_SPEED_DIV, 1);
+
+ p->m_administrative_block = false;
+
+ p->mp_stat_next_pkt = nthw_module_query_register(p->mp_mod_gmf,
GMF_STAT_NEXT_PKT);
+
+ if (p->mp_stat_next_pkt) {
+ p->mp_stat_next_pkt_ns =
+ nthw_register_query_field(p->mp_stat_next_pkt,
GMF_STAT_NEXT_PKT_NS);
+
+ } else {
+ p->mp_stat_next_pkt_ns = NULL;
+ }
+
+ p->mp_stat_max_delayed_pkt =
+ nthw_module_query_register(p->mp_mod_gmf,
GMF_STAT_MAX_DELAYED_PKT);
+
+ if (p->mp_stat_max_delayed_pkt) {
+ p->mp_stat_max_delayed_pkt_ns =
+ nthw_register_query_field(p->mp_stat_max_delayed_pkt,
+ GMF_STAT_MAX_DELAYED_PKT_NS);
+
+ } else {
+ p->mp_stat_max_delayed_pkt_ns = NULL;
+ }
+
+ p->mp_ctrl_ifg_tx_now_always =
+ nthw_register_query_field(p->mp_ctrl,
GMF_CTRL_IFG_TX_NOW_ALWAYS);
+ p->mp_ctrl_ifg_tx_on_ts_always =
+ nthw_register_query_field(p->mp_ctrl,
GMF_CTRL_IFG_TX_ON_TS_ALWAYS);
+
+ p->mp_ctrl_ifg_tx_on_ts_adjust_on_set_clock =
+ nthw_register_query_field(p->mp_ctrl,
GMF_CTRL_IFG_TX_ON_TS_ADJUST_ON_SET_CLOCK);
+
+ p->mp_ifg_clock_delta_adjust =
+ nthw_module_query_register(p->mp_mod_gmf,
GMF_IFG_SET_CLOCK_DELTA_ADJUST);
+
+ if (p->mp_ifg_clock_delta_adjust) {
+ p->mp_ifg_clock_delta_adjust_delta =
+ nthw_register_query_field(p->mp_ifg_clock_delta_adjust,
+ GMF_IFG_SET_CLOCK_DELTA_ADJUST_DELTA);
+
+ } else {
+ p->mp_ifg_clock_delta_adjust_delta = NULL;
+ }
+
+ p->mp_ts_inject = nthw_module_query_register(p->mp_mod_gmf,
GMF_TS_INJECT);
+
+ if (p->mp_ts_inject) {
+ p->mp_ts_inject_offset =
+ nthw_register_query_field(p->mp_ts_inject,
GMF_TS_INJECT_OFFSET);
+ p->mp_ts_inject_pos =
+ nthw_register_query_field(p->mp_ts_inject,
GMF_TS_INJECT_POS);
+
+ } else {
+ p->mp_ts_inject_offset = NULL;
+ p->mp_ts_inject_pos = NULL;
+ }
+
+ return 0;
+}
+
+void nthw_gmf_set_enable(nthw_gmf_t *p, bool enable)
+{
+ if (!p->m_administrative_block)
+ nthw_field_set_val_flush32(p->mp_ctrl_enable, enable ? 1 : 0);
+}
--
2.45.0
