Re: [PATCH v5 04/10] app/test: build using per-file dependency matrix

[David Marchand]

On Sat, Aug 19, 2023 at 1:26 AM Patrick Robb  wrote:
> On Fri, Aug 18, 2023 at 6:33 PM Patrick Robb  wrote:
>>
>>
>> For your patch, it looks like there are actually more eal flags test 
>> failures: 
>> http://mails.dpdk.org/archives/test-report/2023-August/444170.html. In any 
>> case, for debugging purposes, I will do a run with the 
>> eal_flags_file_prefix_autotest also included and send you the meson test 
>> detail log on slack.
>>
> Quick follow up - I see with your patch it does pass on 
> eal_flags_file_prefix_autotest, but as stated fails some others now. The 
> detailed slack logs are DM'ed to you on slack. Thanks!

Thanks for the report.
Interestingly those failures pointed out that I broke secondary
processes when no port gets initialised in the primary process.

I'll send a v3.


-- 
David Marchand

RE: [PATCH] net/ice: omit IP protocol id from IP/TCP/UDP RSS

[Zhang, Qi Z]

Hi Visa:

This change may potentially disrupt existing usage, particularly for 
customers who rely on a default 5-tuple hash configuration. These customers 
require this configuration to distinguish between TCP and UDP traffic with the 
same IP and port numbers.

The challenge arises from the absence of an available RSS_TYPE that can 
instruct the PMD on whether a protocol ID should be included in the hash or 
not. Therefore, we had to make a decision on a default behavior. (It might be 
worth considering the introduction of a new RSS_TYPE for this purpose, 
@Ori Kam

To work around this issue, we've introduced a raw packet filter which 
allow users to select specific fields as hash keys using a mask. If you require 
further information or have any questions, please don't hesitate to reach out.

Regards
Qi

> -Original Message-
> From: Visa Hankala 
> Sent: Sunday, August 20, 2023 6:51 PM
> To: dev@dpdk.org
> Cc: Yang, Qiming ; Zhang, Qi Z
> 
> Subject: [PATCH] net/ice: omit IP protocol id from IP/TCP/UDP RSS
> 
> Omit the IP protocol id from the IP/TCP/UDP RSS templates so that the hash
> computation uses only the source and destination addresses, and ports.
> Otherwise, the hash input set would contain an extra IP protocol id word at 
> the
> start, giving RSS hashes that do not match the usual 2-tuple and 4-tuple RSS
> hash algorithms.
> 
> In principle, the IP protocol id could be dropped from the hash config in
> ice_refine_hash_cfg_l234(). However, it is not obvious which combination of
> RTE_ETH_RSS_* flags would preserve the id. Therefore, remove the id from the
> templates completely.
> 
> Fixes: 38d632cbdc88 ("net/ice: refactor PF RSS")
> 
> Signed-off-by: Visa Hankala 
> ---
>  drivers/net/ice/ice_hash.c | 31 ++-
>  1 file changed, 14 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/net/ice/ice_hash.c b/drivers/net/ice/ice_hash.c index
> 52646e9408..ab2eab8fdf 100644
> --- a/drivers/net/ice/ice_hash.c
> +++ b/drivers/net/ice/ice_hash.c
> @@ -37,9 +37,6 @@
>  #define ICE_GTPU_EH_DWNLINK  0
>  #define ICE_GTPU_EH_UPLINK   1
> 
> -#define ICE_IPV4_PROT
>   BIT_ULL(ICE_FLOW_FIELD_IDX_IPV4_PROT)
> -#define ICE_IPV6_PROT
>   BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PROT)
> -
>  #define VALID_RSS_IPV4_L4(RTE_ETH_RSS_NONFRAG_IPV4_UDP   | \
>RTE_ETH_RSS_NONFRAG_IPV4_TCP   | \
>RTE_ETH_RSS_NONFRAG_IPV4_SCTP)
> @@ -122,7 +119,7 @@ struct ice_rss_hash_cfg ipv4_tmplt = {  struct
> ice_rss_hash_cfg ipv4_udp_tmplt = {
>   ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_IPV4 |
>   ICE_FLOW_SEG_HDR_IPV_OTHER | ICE_FLOW_SEG_HDR_UDP,
> - ICE_FLOW_HASH_ETH | ICE_HASH_UDP_IPV4 | ICE_IPV4_PROT,
> + ICE_FLOW_HASH_ETH | ICE_HASH_UDP_IPV4,
>   ICE_RSS_OUTER_HEADERS,
>   0
>  };
> @@ -130,7 +127,7 @@ struct ice_rss_hash_cfg ipv4_udp_tmplt = {  struct
> ice_rss_hash_cfg ipv4_tcp_tmplt = {
>   ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_IPV4 |
>   ICE_FLOW_SEG_HDR_IPV_OTHER | ICE_FLOW_SEG_HDR_TCP,
> - ICE_FLOW_HASH_ETH | ICE_HASH_TCP_IPV4 | ICE_IPV4_PROT,
> + ICE_FLOW_HASH_ETH | ICE_HASH_TCP_IPV4,
>   ICE_RSS_OUTER_HEADERS,
>   0
>  };
> @@ -138,7 +135,7 @@ struct ice_rss_hash_cfg ipv4_tcp_tmplt = {  struct
> ice_rss_hash_cfg ipv4_sctp_tmplt = {
>   ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_IPV4 |
>   ICE_FLOW_SEG_HDR_IPV_OTHER | ICE_FLOW_SEG_HDR_SCTP,
> - ICE_FLOW_HASH_ETH | ICE_HASH_SCTP_IPV4 | ICE_IPV4_PROT,
> + ICE_FLOW_HASH_ETH | ICE_HASH_SCTP_IPV4,
>   ICE_RSS_OUTER_HEADERS,
>   0
>  };
> @@ -162,7 +159,7 @@ struct ice_rss_hash_cfg ipv6_frag_tmplt = {  struct
> ice_rss_hash_cfg ipv6_udp_tmplt = {
>   ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_IPV6 |
>   ICE_FLOW_SEG_HDR_IPV_OTHER | ICE_FLOW_SEG_HDR_UDP,
> - ICE_FLOW_HASH_ETH | ICE_HASH_UDP_IPV6 | ICE_IPV6_PROT,
> + ICE_FLOW_HASH_ETH | ICE_HASH_UDP_IPV6,
>   ICE_RSS_OUTER_HEADERS,
>   0
>  };
> @@ -170,7 +167,7 @@ struct ice_rss_hash_cfg ipv6_udp_tmplt = {  struct
> ice_rss_hash_cfg ipv6_tcp_tmplt = {
>   ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_IPV6 |
>   ICE_FLOW_SEG_HDR_IPV_OTHER | ICE_FLOW_SEG_HDR_TCP,
> - ICE_FLOW_HASH_ETH | ICE_HASH_TCP_IPV6 | ICE_IPV6_PROT,
> + ICE_FLOW_HASH_ETH | ICE_HASH_TCP_IPV6,
>   ICE_RSS_OUTER_HEADERS,
>   0
>  };
> @@ -178,7 +175,7 @@ struct ice_rss_hash_cfg ipv6_tcp_tmplt = {  struct
> ice_rss_hash_cfg ipv6_sctp_tmplt = {
>   ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_IPV6 |
>   ICE_FLOW_SEG_HDR_IPV_OTHER | ICE_FLOW_SEG_HDR_SCTP,
> - ICE_FLOW_HASH_ETH | ICE_HASH_SCTP_IPV6 | ICE_IPV6_PROT,
> + ICE_FLOW_HASH_ETH | ICE_HASH_SCTP_IPV6,
>   ICE_RSS_OUTER_HEADERS,
>   0
>  };
> @@ -192,7 +189,7 @@ struct ice_rss_hash_cfg outer_ipv4_inner_ipv4_tmplt
> = {  struct ice_rss_hash_cfg outer_ipv4_inner_ipv4_udp_tmplt = {
>   ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV_OTHER |
> 

RE: [RFC] lib/st_ring: add single thread ring

[Morten Brørup]

> From: Honnappa Nagarahalli [mailto:honnappa.nagaraha...@arm.com]
> Sent: Monday, 21 August 2023 08.04
> 
> Add a single thread safe and multi-thread unsafe ring data structure.
> This library provides an simple and efficient alternative to multi-
> thread
> safe ring when multi-thread safety is not required.
> 
> Signed-off-by: Honnappa Nagarahalli 
> ---

Good idea.

However, I prefer it to be implemented in the ring lib as one more ring type. 
That would also give us a lot of the infrastructure (management functions, 
documentation and tests) for free.

The ring lib already has performance-optimized APIs for single-consumer and 
single-producer use, rte_ring_sc_dequeue_bulk() and 
rte_ring_sp_enqueue_burst(). Similar performance-optimized APIs for 
single-thread use could be added: rte_ring_st_dequeue_bulk() and 
rte_ring_st_enqueue_burst().

Regardless if added to the ring lib or as a separate lib, "reverse" APIs (for 
single-thread use only) and zero-copy APIs can be added at any time later.

Re: [PATCH] net/iavf: fix checksum offloading

[Eelco Chaudron]

On 18 Aug 2023, at 11:03, David Marchand wrote:

> The only presence of RTE_MBUF_F_TX_IPV4 can't be used as an indicator
> that a checksum offload has been requested by an application.
> Check that RTE_MBUF_F_TX_IP_CKSUM or others flags have been set.
>
> Fixes: 1e728b01120c ("net/iavf: rework Tx path")
> Cc: sta...@dpdk.org

Thanks for fixing this David! I tested and reviewed this change and it works 
now.

Tested-by: Eelco Chaudron 
Acked-by: Eelco Chaudron 

> Signed-off-by: David Marchand 
> ---
>  drivers/net/iavf/iavf_rxtx.c | 4 
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c
> index f7df4665d1..b9e2879764 100644
> --- a/drivers/net/iavf/iavf_rxtx.c
> +++ b/drivers/net/iavf/iavf_rxtx.c
> @@ -2652,6 +2652,9 @@ iavf_build_data_desc_cmd_offset_fields(volatile 
> uint64_t *qw1,
>   offset |= (m->l2_len >> 1)
>   << IAVF_TX_DESC_LENGTH_MACLEN_SHIFT;
>
> + if ((m->ol_flags & IAVF_TX_CKSUM_OFFLOAD_MASK) == 0)
> + goto skip_cksum;
> +
>   /* Enable L3 checksum offloading inner */
>   if (m->ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {
>   if (m->ol_flags & RTE_MBUF_F_TX_IPV4) {
> @@ -2702,6 +2705,7 @@ iavf_build_data_desc_cmd_offset_fields(volatile 
> uint64_t *qw1,
>   break;
>   }
>
> +skip_cksum:
>   *qw1 = rte_cpu_to_le_64uint64_t)command <<
>   IAVF_TXD_DATA_QW1_CMD_SHIFT) & IAVF_TXD_DATA_QW1_CMD_MASK) |
>   (((uint64_t)offset << IAVF_TXD_DATA_QW1_OFFSET_SHIFT) &
> -- 
> 2.41.0

RE: [PATCH v1] app/test: typo correction in Asym tests

[Power, Ciara]

> -Original Message-
> From: Sivaramakrishnan, VenkatX 
> Sent: Friday 18 August 2023 10:53
> To: Thomas Monjalon ; Akhil Goyal
> ; Fan Zhang 
> Cc: dev@dpdk.org; sta...@dpdk.org; Sivaramakrishnan, VenkatX
> ; sunila.s...@caviumnetworks.com;
> Power, Ciara 
> Subject: [PATCH v1] app/test: typo correction in Asym tests
> 
> test_dh_keygenration() changed to test_dh_key_generation()
> 
> Fixes: fc6c9066e40d ("test/crypto: add DH and DSA tests")
> Fixes: da74df7d38c0 ("test/crypto: move test suite parameters to header
> file")
> 
> Cc: sunila.s...@caviumnetworks.com
> Cc: ciara.po...@intel.com
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Sivaramakrishnan VenkatX
> 
> ---
>  .mailmap   | 1 +
>  app/test/test_cryptodev_asym.c | 4 ++--
>  2 files changed, 3 insertions(+), 2 deletions(-)
> 

Acked-by: Ciara Power 

Re: [PATCH] net/iavf: fix checksum offloading

[David Marchand]

On Mon, Aug 21, 2023 at 10:03 AM Eelco Chaudron  wrote:
> On 18 Aug 2023, at 11:03, David Marchand wrote:
>
> > The only presence of RTE_MBUF_F_TX_IPV4 can't be used as an indicator
> > that a checksum offload has been requested by an application.
> > Check that RTE_MBUF_F_TX_IP_CKSUM or others flags have been set.
> >
> > Fixes: 1e728b01120c ("net/iavf: rework Tx path")
> > Cc: sta...@dpdk.org
>
> Thanks for fixing this David! I tested and reviewed this change and it works 
> now.

For the record, Eelco encountered an issue with OVS 3.2 which now uses
ip checksum offloading.
Packets requiring such offloading were dropped by either the net/iavf
driver or the i40e VF hw itself.


-- 
David Marchand

Re: Bug in non-power-of-2 rings?

[Bruce Richardson]

On Sun, Aug 20, 2023 at 11:07:33AM +0200, Morten Brørup wrote:
> Bruce, Honnappa, Konstantin,
> 
> Back in 2017, Bruce added support for non-power-of-2 rings with this patch 
> [1].
> 
> [1]: 
> https://git.dpdk.org/dpdk/commit/lib/librte_ring/rte_ring.h?id=b74461155543430f5253e96ad6d413ebcad36693
> 
> I think that the calculation of "entries" in __rte_ring_move_cons_head() 
> [2][3] is incorrect when the ring capacity is not power-of-2, because it is 
> missing the capacity comparison you added to rte_ring_count() [4]. Please 
> review if I'm mistaken.
> 
> [2]: 
> https://elixir.bootlin.com/dpdk/v23.07/source/lib/ring/rte_ring_c11_pvt.h#L159
> [3]: 
> https://elixir.bootlin.com/dpdk/v23.07/source/lib/ring/rte_ring_generic_pvt.h#L150
> [4]: https://elixir.bootlin.com/dpdk/v23.07/source/lib/ring/rte_ring.h#L502
> 
thanks for flagging this inconsistency, but I think we are ok.

For consumer, I think this is correct, because we are only ever reducing
the number of entries in the ring, and the calculation of the number of
entries is made in the usual way using modulo arithmetic. We should never
have more than capacity entries in the ring so the check in ring count I
believe is superflous. [The exception would be if someone bypassed the
inline functions and accessed the ring directly themselves - at which point
"all bets are off", to use the English phrase]

The producer code (__rte_ring_move_prod_head) does do a capacity check,
which is where one is required to ensure we never exceed capacity.

/Bruce

[PATCH v3 0/3] Release ethdev shared memory on port cleanup

[David Marchand]

This series was triggered after investigating why the
eal_flags_file_prefix_autotest unit test was failing in the case of
statically built binaries [1]).

For now, I went with a simple (naive) approach and put all accesses to the
shared data under a single lock: ethdev maintainers, it is your turn to
shine and give me reasons why we should keep the locks the way they
were ;-).
And let's see what the CI reports...

1: 
https://inbox.dpdk.org/dev/20230816153439.551501-12-bruce.richard...@intel.com/T/#m0e4c23f7be80bbdac076a387f4a2f9094dd07e0a


-- 
David Marchand

Changes since v2:
- fixed multiprocess via patch 2,
- fixed "ownership" history (not releasing shared mem if some owner is
  registered),

Changes since v1:
- fixed uaf in port cleanup,

David Marchand (3):
  ethdev: protect shared memory accesses under one lock
  ethdev: avoid panicking in absence of ethdev shared data
  ethdev: cleanup shared data with the last port

 lib/eal/common/eal_common_mcfg.c|  6 ++
 lib/eal/common/eal_memcfg.h |  1 +
 lib/eal/include/rte_eal_memconfig.h |  4 ++
 lib/eal/version.map |  1 +
 lib/ethdev/ethdev_driver.c  | 53 ++-
 lib/ethdev/ethdev_private.c | 38 +++
 lib/ethdev/ethdev_private.h | 13 +++-
 lib/ethdev/ethdev_trace.h   |  6 +-
 lib/ethdev/rte_ethdev.c | 99 ++---
 9 files changed, 151 insertions(+), 70 deletions(-)

-- 
2.41.0

Re: 21.11.5 patches review and test

[Kevin Traynor]

On 17/08/2023 10:45, Ali Alnubani wrote:

-Original Message-
From: Kevin Traynor 
Sent: Wednesday, August 2, 2023 7:31 PM
To: sta...@dpdk.org
Cc: dev@dpdk.org; Abhishek Marathe ;
Ali Alnubani ; benjamin.wal...@intel.com; David
Christensen ; Hemant Agrawal
; Ian Stokes ; Jerin Jacob
; John McNamara ; Ju-
Hyoung Lee ; Kevin Traynor ;
Luca Boccassi ; Pei Zhang ;
qian.q...@intel.com; Raslan Darawsheh ; NBU-
Contact-Thomas Monjalon (EXTERNAL) ;
yangh...@redhat.com; yuan.p...@intel.com; zhaoyan.c...@intel.com
Subject: 21.11.5 patches review and test

Hi all,

Here is a list of patches targeted for stable release 21.11.5.

The planned date for the final release is 22nd August.

Please help with testing and validation of your use cases and report
any issues/results with reply-all to this mail. For the final release
the fixes and reported validations will be added to the release notes.



Hello,

We ran the following functional tests with Nvidia hardware on 21.11.5-rc1:
- Basic functionality:
   Send and receive multiple types of traffic.
- testpmd xstats counter test.
- testpmd timestamp test.
- Changing/checking link status through testpmd.
- rte_flow tests.
- Some RSS tests.
- VLAN filtering, stripping and insertion tests.
- Checksum and TSO tests.
- ptype tests.
- link_status_interrupt example application tests.
- l3fwd-power example application tests.
- Multi-process example applications tests.
- Hardware LRO tests.
- Regex application tests.
- Buffer Split tests.
- Tx scheduling tests.

Functional tests ran on:
- NIC: ConnectX-6 Dx / OS: Ubuntu 20.04 / Driver: MLNX_OFED_LINUX-23.07-0.5.0.0 
/ Firmware: 22.38.1002
- NIC: ConnectX-7 / OS: Ubuntu 20.04 / Driver: MLNX_OFED_LINUX-23.07-0.5.0.0 / 
Firmware: 28.38.1002
- DPU: BlueField-2 / DOCA SW version: 2.2.0 / Firmware: 24.38.1002


Build tests (all passed):
- Ubuntu 22.04.2 with MLNX_OFED_LINUX-23.07-0.5.0.0.
- Ubuntu 20.04.6 with MLNX_OFED_LINUX-23.04-1.1.3.0.
- Ubuntu 20.04.6 with rdma-core master (aba30bd).
- Ubuntu 20.04.6 with rdma-core v28.0.
- Ubuntu 18.04.6 with rdma-core master (aba30bd) (i386).
- Fedora 38 with rdma-core v44.0.
- Fedora 39 (Rawhide) with rdma-core v46.0.
- OpenSUSE Leap 15.5 with rdma-core v42.0.
- Windows Server 2019 with Clang 11.0.0.

We're investigating some internal test failures due to changes in environment, 
but we don't see new issues introduced by new changes in this rc yet, so we're 
ok to release.

Thanks,
Ali


Thanks for testing and report Ali. I will add to the release validation 
notes.


Kevin.

[PATCH v3 1/3] ethdev: protect shared memory accesses under one lock

[David Marchand]

ethdev currently uses two locks to protect access around
eth_dev_shared_data:
- one (process local) for avoiding multiple threads to reserve/lookup
  the eth_dev_shared_data memzone,
- one (shared with other processes) for protecting port
  allocation/destruction,

Simplify the logic and put everything under a single lock in DPDK shared
memory config.

Signed-off-by: David Marchand 
Acked-by: Morten Brørup 
---
 lib/eal/common/eal_common_mcfg.c|  6 +++
 lib/eal/common/eal_memcfg.h |  1 +
 lib/eal/include/rte_eal_memconfig.h |  4 ++
 lib/eal/version.map |  1 +
 lib/ethdev/ethdev_driver.c  | 30 ---
 lib/ethdev/ethdev_private.c |  9 -
 lib/ethdev/ethdev_private.h |  9 +++--
 lib/ethdev/rte_ethdev.c | 60 -
 8 files changed, 68 insertions(+), 52 deletions(-)

diff --git a/lib/eal/common/eal_common_mcfg.c b/lib/eal/common/eal_common_mcfg.c
index b60d41f7b6..2a785e74c4 100644
--- a/lib/eal/common/eal_common_mcfg.c
+++ b/lib/eal/common/eal_common_mcfg.c
@@ -177,6 +177,12 @@ rte_mcfg_timer_unlock(void)
rte_spinlock_unlock(rte_mcfg_timer_get_lock());
 }
 
+rte_spinlock_t *
+rte_mcfg_ethdev_get_lock(void)
+{
+   return &rte_eal_get_configuration()->mem_config->ethdev_lock;
+}
+
 bool
 rte_mcfg_get_single_file_segments(void)
 {
diff --git a/lib/eal/common/eal_memcfg.h b/lib/eal/common/eal_memcfg.h
index 8889ba063f..d5c63e2f4d 100644
--- a/lib/eal/common/eal_memcfg.h
+++ b/lib/eal/common/eal_memcfg.h
@@ -37,6 +37,7 @@ struct rte_mem_config {
rte_rwlock_t qlock;   /**< used by tailqs for thread safety. */
rte_rwlock_t mplock;  /**< used by mempool library for thread safety. */
rte_spinlock_t tlock; /**< used by timer library for thread safety. */
+   rte_spinlock_t ethdev_lock; /**< used by ethdev library. */
 
rte_rwlock_t memory_hotplug_lock;
/**< Indicates whether memory hotplug request is in progress. */
diff --git a/lib/eal/include/rte_eal_memconfig.h 
b/lib/eal/include/rte_eal_memconfig.h
index c527f9aa29..0b1d0d4ff0 100644
--- a/lib/eal/include/rte_eal_memconfig.h
+++ b/lib/eal/include/rte_eal_memconfig.h
@@ -39,6 +39,10 @@ __rte_internal
 rte_spinlock_t *
 rte_mcfg_timer_get_lock(void);
 
+__rte_internal
+rte_spinlock_t *
+rte_mcfg_ethdev_get_lock(void);
+
 /**
  * Lock the internal EAL shared memory configuration for shared access.
  */
diff --git a/lib/eal/version.map b/lib/eal/version.map
index 7940431e5a..0029db3c73 100644
--- a/lib/eal/version.map
+++ b/lib/eal/version.map
@@ -456,6 +456,7 @@ INTERNAL {
rte_intr_vec_list_free;
rte_intr_vec_list_index_get;
rte_intr_vec_list_index_set;
+   rte_mcfg_ethdev_get_lock;
rte_mcfg_mem_get_lock;
rte_mcfg_mempool_get_lock;
rte_mcfg_tailq_get_lock;
diff --git a/lib/ethdev/ethdev_driver.c b/lib/ethdev/ethdev_driver.c
index 0be1e8ca04..5bb9c3f97c 100644
--- a/lib/ethdev/ethdev_driver.c
+++ b/lib/ethdev/ethdev_driver.c
@@ -44,6 +44,7 @@ eth_dev_allocated(const char *name)
 
 static uint16_t
 eth_dev_find_free_port(void)
+   __rte_exclusive_locks_required(rte_mcfg_ethdev_get_lock())
 {
uint16_t i;
 
@@ -60,6 +61,7 @@ eth_dev_find_free_port(void)
 
 static struct rte_eth_dev *
 eth_dev_get(uint16_t port_id)
+   __rte_exclusive_locks_required(rte_mcfg_ethdev_get_lock())
 {
struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
 
@@ -86,10 +88,10 @@ rte_eth_dev_allocate(const char *name)
return NULL;
}
 
-   eth_dev_shared_data_prepare();
+   /* Synchronize port creation between primary and secondary processes. */
+   rte_spinlock_lock(rte_mcfg_ethdev_get_lock());
 
-   /* Synchronize port creation between primary and secondary threads. */
-   rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
+   eth_dev_shared_data_prepare();
 
if (eth_dev_allocated(name) != NULL) {
RTE_ETHDEV_LOG(ERR,
@@ -113,7 +115,7 @@ rte_eth_dev_allocate(const char *name)
pthread_mutex_init(ð_dev->data->flow_ops_mutex, NULL);
 
 unlock:
-   rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
+   rte_spinlock_unlock(rte_mcfg_ethdev_get_lock());
 
return eth_dev;
 }
@@ -123,13 +125,13 @@ rte_eth_dev_allocated(const char *name)
 {
struct rte_eth_dev *ethdev;
 
-   eth_dev_shared_data_prepare();
+   rte_spinlock_lock(rte_mcfg_ethdev_get_lock());
 
-   rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
+   eth_dev_shared_data_prepare();
 
ethdev = eth_dev_allocated(name);
 
-   rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
+   rte_spinlock_unlock(rte_mcfg_ethdev_get_lock());
 
return ethdev;
 }
@@ -145,10 +147,10 @@ rte_eth_dev_attach_secondary(const char *name)
uint16_t i;
struct rte_eth_dev *eth_dev = NULL;
 
-   eth_dev_shared_data_prepare();
-
/* Synchronize port attachment to 

[PATCH v3 2/3] ethdev: avoid panicking in absence of ethdev shared data

[David Marchand]

This is a preparation step before freeing the ethdev shared data
memzone.

Previously, because the primary process never freed the memzone, a
secondary process could assume this memzone was present.
But in the next commit, this will change.
Make eth_dev_shared_data_prepare() report whether the memzone is
available so that upper level API can react accordingly.

Signed-off-by: David Marchand 
---
 lib/ethdev/ethdev_driver.c  | 23 ++-
 lib/ethdev/ethdev_private.c | 10 +---
 lib/ethdev/ethdev_private.h |  2 +-
 lib/ethdev/ethdev_trace.h   |  6 +++--
 lib/ethdev/rte_ethdev.c | 46 +
 5 files changed, 60 insertions(+), 27 deletions(-)

diff --git a/lib/ethdev/ethdev_driver.c b/lib/ethdev/ethdev_driver.c
index 5bb9c3f97c..f04666f3a2 100644
--- a/lib/ethdev/ethdev_driver.c
+++ b/lib/ethdev/ethdev_driver.c
@@ -91,7 +91,8 @@ rte_eth_dev_allocate(const char *name)
/* Synchronize port creation between primary and secondary processes. */
rte_spinlock_lock(rte_mcfg_ethdev_get_lock());
 
-   eth_dev_shared_data_prepare();
+   if (eth_dev_shared_data_prepare() == NULL)
+   goto unlock;
 
if (eth_dev_allocated(name) != NULL) {
RTE_ETHDEV_LOG(ERR,
@@ -127,9 +128,10 @@ rte_eth_dev_allocated(const char *name)
 
rte_spinlock_lock(rte_mcfg_ethdev_get_lock());
 
-   eth_dev_shared_data_prepare();
-
-   ethdev = eth_dev_allocated(name);
+   if (eth_dev_shared_data_prepare() != NULL)
+   ethdev = eth_dev_allocated(name);
+   else
+   ethdev = NULL;
 
rte_spinlock_unlock(rte_mcfg_ethdev_get_lock());
 
@@ -150,7 +152,8 @@ rte_eth_dev_attach_secondary(const char *name)
/* Synchronize port attachment to primary port creation and release. */
rte_spinlock_lock(rte_mcfg_ethdev_get_lock());
 
-   eth_dev_shared_data_prepare();
+   if (eth_dev_shared_data_prepare() == NULL)
+   goto unlock;
 
for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
if (strcmp(eth_dev_shared_data->data[i].name, name) == 0)
@@ -165,6 +168,7 @@ rte_eth_dev_attach_secondary(const char *name)
RTE_ASSERT(eth_dev->data->port_id == i);
}
 
+unlock:
rte_spinlock_unlock(rte_mcfg_ethdev_get_lock());
return eth_dev;
 }
@@ -218,12 +222,19 @@ rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
 int
 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
 {
+   int ret;
+
if (eth_dev == NULL)
return -EINVAL;
 
rte_spinlock_lock(rte_mcfg_ethdev_get_lock());
-   eth_dev_shared_data_prepare();
+   if (eth_dev_shared_data_prepare() == NULL)
+   ret = -EINVAL;
+   else
+   ret = 0;
rte_spinlock_unlock(rte_mcfg_ethdev_get_lock());
+   if (ret != 0)
+   return ret;
 
if (eth_dev->state != RTE_ETH_DEV_UNUSED)
rte_eth_dev_callback_process(eth_dev,
diff --git a/lib/ethdev/ethdev_private.c b/lib/ethdev/ethdev_private.c
index 6756625729..911de1e595 100644
--- a/lib/ethdev/ethdev_private.c
+++ b/lib/ethdev/ethdev_private.c
@@ -318,7 +318,7 @@ rte_eth_call_tx_callbacks(uint16_t port_id, uint16_t 
queue_id,
return nb_pkts;
 }
 
-void
+void *
 eth_dev_shared_data_prepare(void)
 {
const unsigned int flags = 0;
@@ -332,8 +332,10 @@ eth_dev_shared_data_prepare(void)
rte_socket_id(), flags);
} else
mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
-   if (mz == NULL)
-   rte_panic("Cannot allocate ethdev shared data\n");
+   if (mz == NULL) {
+   RTE_ETHDEV_LOG(ERR, "Cannot allocate ethdev shared 
data\n");
+   goto out;
+   }
 
eth_dev_shared_data = mz->addr;
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
@@ -343,6 +345,8 @@ eth_dev_shared_data_prepare(void)
   sizeof(eth_dev_shared_data->data));
}
}
+out:
+   return eth_dev_shared_data;
 }
 
 void
diff --git a/lib/ethdev/ethdev_private.h b/lib/ethdev/ethdev_private.h
index f7706e6a95..1572da7b48 100644
--- a/lib/ethdev/ethdev_private.h
+++ b/lib/ethdev/ethdev_private.h
@@ -67,7 +67,7 @@ void eth_dev_fp_ops_setup(struct rte_eth_fp_ops *fpo,
const struct rte_eth_dev *dev);
 
 
-void eth_dev_shared_data_prepare(void)
+void *eth_dev_shared_data_prepare(void)
__rte_exclusive_locks_required(rte_mcfg_ethdev_get_lock());
 
 void eth_dev_rxq_release(struct rte_eth_dev *dev, uint16_t qid);
diff --git a/lib/ethdev/ethdev_trace.h b/lib/ethdev/ethdev_trace.h
index 423e71236e..e367d29c3a 100644
--- a/lib/ethdev/ethdev_trace.h
+++ b/lib/ethdev/ethdev_trace.h
@@ -112,8 +112,9 @@ RTE_TRACE_POINT(
 
 RTE_TRACE_POINT(
rte_ethdev_trace_owner_new,
-   RTE_TRACE_POINT_ARGS(uint64

[PATCH v3 3/3] ethdev: cleanup shared data with the last port

[David Marchand]

If no port is allocated and no port owner is still registered,
ethdev from a primary process may release the memzone used to store
port data.
This makes it possible for the DPDK memory allocator to release
associated resources back to the OS.

Signed-off-by: David Marchand 
Acked-by: Morten Brørup 
---
Changes since v2:
- tracked owners count and and avoided releasing shared mem if some
  owner is still registered,

---
 lib/ethdev/ethdev_driver.c  |  6 ++
 lib/ethdev/ethdev_private.c | 21 -
 lib/ethdev/ethdev_private.h |  4 
 lib/ethdev/rte_ethdev.c |  3 +++
 4 files changed, 33 insertions(+), 1 deletion(-)

diff --git a/lib/ethdev/ethdev_driver.c b/lib/ethdev/ethdev_driver.c
index f04666f3a2..c30cb33963 100644
--- a/lib/ethdev/ethdev_driver.c
+++ b/lib/ethdev/ethdev_driver.c
@@ -114,6 +114,8 @@ rte_eth_dev_allocate(const char *name)
eth_dev->data->backer_port_id = RTE_MAX_ETHPORTS;
eth_dev->data->mtu = RTE_ETHER_MTU;
pthread_mutex_init(ð_dev->data->flow_ops_mutex, NULL);
+   RTE_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
+   eth_dev_shared_data->allocated_ports++;
 
 unlock:
rte_spinlock_unlock(rte_mcfg_ethdev_get_lock());
@@ -264,6 +266,10 @@ rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
rte_free(eth_dev->data->dev_private);
pthread_mutex_destroy(ð_dev->data->flow_ops_mutex);
memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
+   eth_dev->data = NULL;
+
+   eth_dev_shared_data->allocated_ports--;
+   eth_dev_shared_data_release();
}
 
rte_spinlock_unlock(rte_mcfg_ethdev_get_lock());
diff --git a/lib/ethdev/ethdev_private.c b/lib/ethdev/ethdev_private.c
index 911de1e595..aea9112cc2 100644
--- a/lib/ethdev/ethdev_private.c
+++ b/lib/ethdev/ethdev_private.c
@@ -11,6 +11,7 @@
 
 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
 
+static const struct rte_memzone *eth_dev_shared_mz;
 struct eth_dev_shared *eth_dev_shared_data;
 
 /* spinlock for eth device callbacks */
@@ -324,7 +325,7 @@ eth_dev_shared_data_prepare(void)
const unsigned int flags = 0;
const struct rte_memzone *mz;
 
-   if (eth_dev_shared_data == NULL) {
+   if (eth_dev_shared_mz == NULL) {
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
/* Allocate port data and ownership shared memory. */
mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
@@ -337,10 +338,13 @@ eth_dev_shared_data_prepare(void)
goto out;
}
 
+   eth_dev_shared_mz = mz;
eth_dev_shared_data = mz->addr;
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+   eth_dev_shared_data->allocated_owners = 0;
eth_dev_shared_data->next_owner_id =
RTE_ETH_DEV_NO_OWNER + 1;
+   eth_dev_shared_data->allocated_ports = 0;
memset(eth_dev_shared_data->data, 0,
   sizeof(eth_dev_shared_data->data));
}
@@ -349,6 +353,21 @@ eth_dev_shared_data_prepare(void)
return eth_dev_shared_data;
 }
 
+void
+eth_dev_shared_data_release(void)
+{
+   RTE_ASSERT(rte_eal_process_type() == RTE_PROC_PRIMARY);
+
+   if (eth_dev_shared_data->allocated_ports != 0)
+   return;
+   if (eth_dev_shared_data->allocated_owners != 0)
+   return;
+
+   rte_memzone_free(eth_dev_shared_mz);
+   eth_dev_shared_mz = NULL;
+   eth_dev_shared_data = NULL;
+}
+
 void
 eth_dev_rxq_release(struct rte_eth_dev *dev, uint16_t qid)
 {
diff --git a/lib/ethdev/ethdev_private.h b/lib/ethdev/ethdev_private.h
index 1572da7b48..0d36b9c30f 100644
--- a/lib/ethdev/ethdev_private.h
+++ b/lib/ethdev/ethdev_private.h
@@ -14,7 +14,9 @@
 #include "rte_ethdev.h"
 
 struct eth_dev_shared {
+   uint64_t allocated_owners;
uint64_t next_owner_id;
+   uint64_t allocated_ports;
struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
 };
 
@@ -69,6 +71,8 @@ void eth_dev_fp_ops_setup(struct rte_eth_fp_ops *fpo,
 
 void *eth_dev_shared_data_prepare(void)
__rte_exclusive_locks_required(rte_mcfg_ethdev_get_lock());
+void eth_dev_shared_data_release(void)
+   __rte_exclusive_locks_required(rte_mcfg_ethdev_get_lock());
 
 void eth_dev_rxq_release(struct rte_eth_dev *dev, uint16_t qid);
 void eth_dev_txq_release(struct rte_eth_dev *dev, uint16_t qid);
diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
index ea430d8bab..35925a403a 100644
--- a/lib/ethdev/rte_ethdev.c
+++ b/lib/ethdev/rte_ethdev.c
@@ -444,6 +444,7 @@ rte_eth_dev_owner_new(uint64_t *owner_id)
 
if (eth_dev_shared_data_prepare() != NULL) {
*owner_id = eth_dev_shared_data->next_owner_id++;
+   eth_dev_shared_data->allocated_owners++;
   

Re: 21.11.5 patches review and test

[Kevin Traynor]

On 02/08/2023 17:31, Kevin Traynor wrote:

Hi all,

Here is a list of patches targeted for stable release 21.11.5.

The planned date for the final release is 22nd August.

Please help with testing and validation of your use cases and report
any issues/results with reply-all to this mail. For the final release
the fixes and reported validations will be added to the release notes.

A release candidate tarball can be found at:

 https://dpdk.org/browse/dpdk-stable/tag/?id=v21.11.5-rc1

These patches are located at branch 21.11 of dpdk-stable repo:
 https://dpdk.org/browse/dpdk-stable/

Thanks.

Kevin



Hi,

Any updates from Intel validation team ? The release is due tomorrow 
(22nd) but I can postpone it if you need a few more days to complete 
testing.


thanks,
Kevin.

RE: Bug in non-power-of-2 rings?

[Konstantin Ananyev]

Hi everyone,

> On Sun, Aug 20, 2023 at 11:07:33AM +0200, Morten Brørup wrote:
> > Bruce, Honnappa, Konstantin,
> >
> > Back in 2017, Bruce added support for non-power-of-2 rings with this patch 
> > [1].
> >
> > [1]: 
> > https://git.dpdk.org/dpdk/commit/lib/librte_ring/rte_ring.h?id=b74461155543430f5253e96ad6d413ebcad36693
> >
> > I think that the calculation of "entries" in __rte_ring_move_cons_head() 
> > [2][3] is incorrect when the ring capacity is not power-of-2,
> because it is missing the capacity comparison you added to rte_ring_count() 
> [4]. Please review if I'm mistaken.
> >
> > [2]: 
> > https://elixir.bootlin.com/dpdk/v23.07/source/lib/ring/rte_ring_c11_pvt.h#L159
> > [3]: 
> > https://elixir.bootlin.com/dpdk/v23.07/source/lib/ring/rte_ring_generic_pvt.h#L150
> > [4]: https://elixir.bootlin.com/dpdk/v23.07/source/lib/ring/rte_ring.h#L502

Just to confirm you suggest something like that:
-   *entries = (r->prod.tail - *old_head);
+   count = (r->prod.tail - *old_head);
+   entries = (count > r->capacity) ? r->capacity : count;
 right?

> >
> thanks for flagging this inconsistency, but I think we are ok.
> 
> For consumer, I think this is correct, because we are only ever reducing
> the number of entries in the ring, and the calculation of the number of
> entries is made in the usual way using modulo arithmetic. We should never
> have more than capacity entries in the ring so the check in ring count I
> believe is superflous. [The exception would be if someone bypassed the
> inline functions and accessed the ring directly themselves - at which point
> "all bets are off", to use the English phrase]
> 
> The producer code (__rte_ring_move_prod_head) does do a capacity check,
> which is where one is required to ensure we never exceed capacity.

I also can't come up with the case, when current code will cause an issue..
In properly operating ring, I think we should never  have more then r->capacity 
entries populated, so this extra check can be skipped.
Unless you do have some particular case in mind?
Konstantin  

RE: [PATCH v5 1/8] net/rnp: add skeleton

[11]

Hi Thomas,

Thanks for your useful advice, previously only focused on code format
and Ignored document format.

Regards Wenbo   

> -Original Message-
> From: Thomas Monjalon 
> Sent: 2023年8月15日 19:11
> To: Wenbo Cao 
> Cc: dev@dpdk.org; ferruh.yi...@amd.com; andrew.rybche...@oktetlabs.ru;
> yao...@mucse.com
> Subject: Re: [PATCH v5 1/8] net/rnp: add skeleton
> 
> Hi,
> 
> Wenbo Cao:
> > --- /dev/null
> > +++ b/doc/guides/nics/rnp.rst
> > @@ -0,0 +1,43 @@
> > +..  SPDX-License-Identifier: BSD-3-Clause
> > +Copyright(c) 2023 Mucse IC Design Ltd.
> > +
> > +RNP Poll Mode driver
> > +==
> 
> Please keep underlining the same size as the text above.
Thanks for your kindly comment,  the format  of document  I must lake of
this knowledge
> 
> > +
> > +The RNP ETHDEV PMD (**librte_net_rnp**) provides poll mode ethdev
> > +driver support for the inbuilt network device found in the **Mucse
> > +RNP**
> > +
> > +Prerequisites
> > +-
> > +More information can be found at `Mucse, Official Website
> > +`_.
> > +
> > +Supported RNP SoCs
> > +
> > +
> > +- N10
> > +
> > +Driver compilation and testing
> > +--
> > +
> > +Refer to the document :ref:`compiling and testing a PMD for a NIC
> > +` for details.
> 
> It was a mistake to originally introduce the anchor "pmd_build_and_test".
> You should achieve the same result with the shorter
> syntax :doc:`build_and_test`
> 
> > +
> > +#. Running testpmd:
> > +
> > +   Follow instructions available in the document
> > +   :ref:`compiling and testing a PMD for a NIC `
> > +   to run testpmd.
> 
> Do we really need that referencing the same document as above?
For this block,  there's really no need to add this.
Previous ideas I want to add new content as the subsequent code is
submitted.
Do I need to add full features and NIC Description at the first code commit
?
> 
> > +
> > +Limitations or Known issues
> > +
> > +Build with ICC is not supported yet.
> > +CRC stripping
> > +~~
> > +The RNP SoC family NICs strip the CRC for every packets coming into
> > +the host interface irrespective of the offload configuration.
> > +When You Want To Disable CRC_OFFLOAD The Feature Will Influence The
> > +RxCksum Offload VLAN Strip ~~~ For VLAN Strip RNP Just
> > +Support CVLAN(0x8100) Type If The Vlan Type Is SVLAN(0X88a8) VLAN
> > +Filter Or Strip Will Not Effert For This Packet It Will Bypass To The
Host.
> 
> Please check the doc contribution guide.
> You should add spaces before and after titles.
Yes this is my fault, :) , I have read the document  and  known that
Add 2 blank lines before each section header.
Add 1 blank line after each section header.
> 
> 

[PATCH v2] common/qat: enable QAT 2.0c devices

[Ciara Power]

This commit enables QAT 2.0c devices in the
Intel QuickAssist Technology PMD.
These are 4th Generation QAT, 402xx devices.

Signed-off-by: Ciara Power 

---
v2:
  - Fixed kernel module.
  - Modified commit to align naming of new QAT device.
---
 doc/guides/cryptodevs/qat.rst  | 4 
 doc/guides/rel_notes/release_23_11.rst | 4 
 drivers/common/qat/qat_device.c| 4 
 3 files changed, 12 insertions(+)

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index afdfb0bd22..730113da33 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -457,6 +457,10 @@ to see the full table)

+-+-+-+-+--+---+---+++--+++
| Yes | No  | No  | 4   | 401xxx   | IDZ/ N/A  | qat_401xxx| 4xxx   
| 4942   | 2| 4943   | 16 |

+-+-+-+-+--+---+---+++--+++
+   | Yes | Yes | Yes | 4   | 402xx| linux/6.4+| qat_4xxx  | 4xxx   
| 4944   | 2| 4945   | 16 |
+   
+-+-+-+-+--+---+---+++--+++
+   | Yes | No  | No  | 4   | 402xx| IDZ/ N/A  | qat_4xxx  | 4xxx   
| 4944   | 2| 4945   | 16 |
+   
+-+-+-+-+--+---+---+++--+++
 
 * Note: Symmetric mixed crypto algorithms feature on Gen 2 works only with IDZ 
driver version 4.9.0+
 
diff --git a/doc/guides/rel_notes/release_23_11.rst 
b/doc/guides/rel_notes/release_23_11.rst
index 4411bb32c1..72dfb3fbf0 100644
--- a/doc/guides/rel_notes/release_23_11.rst
+++ b/doc/guides/rel_notes/release_23_11.rst
@@ -72,6 +72,10 @@ New Features
  Also, make sure to start the actual text at the margin.
  ===
 
+* **Added support for QAT 2.0c devices to Intel QuickAssist Technology PMD.**
+
+  * QAT 2.0c (4944) devices are now enabled for QAT.
+
 
 Removed Items
 -
diff --git a/drivers/common/qat/qat_device.c b/drivers/common/qat/qat_device.c
index 2675f0d9d1..cbf1e6a988 100644
--- a/drivers/common/qat/qat_device.c
+++ b/drivers/common/qat/qat_device.c
@@ -50,6 +50,9 @@ static const struct rte_pci_id pci_id_qat_map[] = {
{
RTE_PCI_DEVICE(0x8086, 0x4943),
},
+   {
+   RTE_PCI_DEVICE(0x8086, 0x4945),
+   },
{.device_id = 0},
 };
 
@@ -202,6 +205,7 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev,
break;
case 0x4941:
case 0x4943:
+   case 0x4945:
qat_dev_gen = QAT_GEN4;
break;
default:
-- 
2.25.1

RE: Bug in non-power-of-2 rings?

[Morten Brørup]

+CC Olivier, referring to your review of the original patch.

> From: Konstantin Ananyev [mailto:konstantin.anan...@huawei.com]
> Sent: Monday, 21 August 2023 11.29
> 
> Hi everyone,
> 
> > On Sun, Aug 20, 2023 at 11:07:33AM +0200, Morten Brørup wrote:
> > > Bruce, Honnappa, Konstantin,
> > >
> > > Back in 2017, Bruce added support for non-power-of-2 rings with this
> patch [1].
> > >
> > > [1]:
> https://git.dpdk.org/dpdk/commit/lib/librte_ring/rte_ring.h?id=b74461155
> 543430f5253e96ad6d413ebcad36693
> > >
> > > I think that the calculation of "entries" in
> __rte_ring_move_cons_head() [2][3] is incorrect when the ring capacity
> is not power-of-2,
> > because it is missing the capacity comparison you added to
> rte_ring_count() [4]. Please review if I'm mistaken.
> > >
> > > [2]:
> https://elixir.bootlin.com/dpdk/v23.07/source/lib/ring/rte_ring_c11_pvt.
> h#L159
> > > [3]:
> https://elixir.bootlin.com/dpdk/v23.07/source/lib/ring/rte_ring_generic_
> pvt.h#L150
> > > [4]:
> https://elixir.bootlin.com/dpdk/v23.07/source/lib/ring/rte_ring.h#L502
> 
> Just to confirm you suggest something like that:
> - *entries = (r->prod.tail - *old_head);
> + count = (r->prod.tail - *old_head);
> + entries = (count > r->capacity) ? r->capacity : count;
>  right?

Yes, since rte_ring_count() does it, it might be required here too.

> 
> > >
> > thanks for flagging this inconsistency, but I think we are ok.
> >
> > For consumer, I think this is correct, because we are only ever
> reducing
> > the number of entries in the ring, and the calculation of the number
> of
> > entries is made in the usual way using modulo arithmetic. We should
> never
> > have more than capacity entries in the ring so the check in ring count
> I
> > believe is superflous. [The exception would be if someone bypassed the
> > inline functions and accessed the ring directly themselves - at which
> point
> > "all bets are off", to use the English phrase]

I have now found the comments to the original patch [5]. It seems that Olivier 
flagged this as a risk for rte_ring_free_count(), which reads r->prod.tail and 
r->cons.tail without synchronization.

However, since __rte_ring_move_cons_head() uses synchronization, I guess that 
such a risk is not present here.

[5]: 
https://patchwork.dpdk.org/project/dpdk/patch/20170607133620.275801-2-bruce.richard...@intel.com/

> >
> > The producer code (__rte_ring_move_prod_head) does do a capacity
> check,
> > which is where one is required to ensure we never exceed capacity.

Agreed. Thanks for double checking.

> 
> I also can't come up with the case, when current code will cause an
> issue..
> In properly operating ring, I think we should never  have more then r-
> >capacity
> entries populated, so this extra check can be skipped.
> Unless you do have some particular case in mind?

No special case in mind. Just stumbled over this code looking different than 
similar code in rte_ring_free_count().

RE: [PATCH] common/qat: enable gen4 c devices

[Power, Ciara]

Hi David,

> > 
> > +-+-+-+-+--+---+---++---
> -+--+++
> > | Yes | No  | No  | 4   | 401xxx   | IDZ/ N/A  | qat_401xxx| 
> > 4xxx   |
> 4942   | 2| 4943   | 16 |
> >
> > +-+-+-+-+--+---+---+--
> > --++--+++
> > +   | Yes | Yes | Yes | 4   | 402xxx   | linux/6.4+| qat_402xxx| 
> > 4xxx   |
> 4944   | 2| 4945   | 16 |
> > +   
> > +-+-+-+-+--+---+---++--
> --+--+++
> > +   | Yes | No  | No  | 4   | 402xxx   | IDZ/ N/A  | qat_402xxx| 
> > 4xxx   |
> 4944   | 2| 4945   | 16 |
> > +
> > + +-+-+-+-+--+---+---+
> > + ++--+++
> 
> Is there such a kernel module named qat_402xxx upstream?
> I can only find qat_4xxx.
> 
Good catch, you're right, there is no kernel module 402xxx.
These devices fall under the original 4xxx driver.
Will update here, and send a fix for the 401xxx entry later.

Have sent a v2 addressing the above comments:
https://patches.dpdk.org/project/dpdk/patch/20230821093349.3519591-1-ciara.po...@intel.com/

Thanks,
Ciara

[PATCH v4] net/iavf: fix VLAN offload strip flag inconsistency

[Wenjing Qiao]

For i40e kernel driver which only supports vlan(v1) VIRTCHNL OP,
it will set strip on when setting filter on but dpdk side will not
change strip flag. To be consistent with dpdk side, disable strip
again.

Fixes: cb25d4323fbf ("net/avf: enable MAC VLAN and promisc ops")
Cc: sta...@dpdk.org

Signed-off-by: Wenjing Qiao 
---
 drivers/net/iavf/iavf_ethdev.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c
index 00b963128b..bdfc0ed098 100644
--- a/drivers/net/iavf/iavf_ethdev.c
+++ b/drivers/net/iavf/iavf_ethdev.c
@@ -1361,6 +1361,7 @@ iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, 
uint16_t vlan_id, int on)
struct iavf_adapter *adapter =
IAVF_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(adapter);
+   struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
int err;
 
if (adapter->closed)
@@ -1379,6 +1380,23 @@ iavf_dev_vlan_filter_set(struct rte_eth_dev *dev, 
uint16_t vlan_id, int on)
err = iavf_add_del_vlan(adapter, vlan_id, on);
if (err)
return -EIO;
+
+   /* For i40e kernel driver which only supports vlan(v1) VIRTCHNL OP,
+* it will set strip on when setting filter on but dpdk side will not
+* change strip flag. To be consistent with dpdk side, disable strip
+* again.
+*
+* For i40e kernel driver which supports vlan v2, dpdk will invoke vlan 
v2
+* related function, so it won't go through here.
+*/
+   if (adapter->hw.mac.type == IAVF_MAC_XL710 ||
+   adapter->hw.mac.type == IAVF_MAC_X722_VF) {
+   if (on && !(dev_conf->rxmode.offloads & 
RTE_ETH_RX_OFFLOAD_VLAN_STRIP)) {
+   err = iavf_disable_vlan_strip(adapter);
+   if (err)
+   return -EIO;
+   }
+   }
return 0;
 }
 
-- 
2.34.1

Re: [PATCH v5] eventdev/eth_rx: add new adapter create API

[Jerin Jacob]

On Fri, Aug 18, 2023 at 3:07 PM Naga Harish K S V
 wrote:
>
> Add new API "rte_event_eth_rx_adapter_create_ext_with_params()" for
> creating Rx adapter instance. This API is similar to
> rte_event_eth_rx_adapter_create_ext() with an additional input
> argument for adapter configuration parameters of type
> "struct rte_event_eth_rx_adapter_params".
>
> Signed-off-by: Naga Harish K S V 
> ---
> diff --git a/doc/guides/prog_guide/event_ethernet_rx_adapter.rst 
> b/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
> index 7c5e73b9fd..2e68cca798 100644
> --- a/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
> +++ b/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
> @@ -71,6 +71,9 @@ set to true. The function is passed the event device to be 
> associated with
>  the adapter and port configuration for the adapter to setup an event port
>  if the adapter needs to use a service function.
>
> +If the application desires to control both the event port allocation and 
> event
> +buffer size, ``rte_event_eth_rx_adapter_create_ext_with_params()`` can be 
> used.
> +
>  Event device configuration for service based adapter
>  
>
> diff --git a/doc/guides/rel_notes/release_23_11.rst 
> b/doc/guides/rel_notes/release_23_11.rst
> index 4411bb32c1..0f4e677ee9 100644
> --- a/doc/guides/rel_notes/release_23_11.rst
> +++ b/doc/guides/rel_notes/release_23_11.rst
> @@ -72,6 +72,10 @@ New Features
>   Also, make sure to start the actual text at the margin.
>   ===
>
> +* **Added new Ethernet Rx Adapter create API.**
> +
> +  * Added new API ``rte_event_eth_rx_adapter_create_ext_with_params()``
> +for creating Rx adapter instance

Please add

for application desires to control both the event port allocation and event
buffer size,

>
>  Removed Items
>  -
> diff --git a/lib/eventdev/rte_event_eth_rx_adapter.c 
> b/lib/eventdev/rte_event_eth_rx_adapter.c
> index f7f93ccdfd..1574c89678 100644
> --- a/lib/eventdev/rte_event_eth_rx_adapter.c
> +++ b/lib/eventdev/rte_event_eth_rx_adapter.c
> @@ -2485,6 +2485,39 @@ rxa_create(uint8_t id, uint8_t dev_id,
> return 0;
>  }
>
> +static int __rte_cold

Another instance of __rte_cold which is not removed.

Please pay some attention when sending the new patch versions.

> +rxa_config_params_validate(struct rte_event_eth_rx_adapter_params 
> *rxa_params,
> +  struct rte_event_eth_rx_adapter_params 
> *temp_params)

RE: Ring library optimization idea

[Konstantin Ananyev]

Hi Morten,

> > Most of the fast path ring library functions access the two cache lines 
> > containing
> > respectively the r->prod and r->cons structures.
> >
> > Some of the fast path functions also have to fetch r->capacity and r->mask,
> > which reside in another cache line.
> >
> > What do you think about adding shadow variables of r->capacity and r->mask
> > to the same cache line as r->prod, to improve ring library performance (by
> > avoiding having to read a third cache line) when under CPU cache pressure?
> Agree with the idea. I am not sure about the performance as these are 
> read-only data. IMO, we should not worry about it as it saves
> one cache line (but we do not need to measure the performance). They will 
> occupy 12B, but I do not see how we will occupy the
> entire 64B of the cacheline in the near future.
> 
> Also, the shadow variables need to be part of both r->prod and r->cons.

Personally, I think that for majority of cases the perf gain with be either 
tiny or none.
>From other side, I don't see any harm with that approach, as Honnapa said, we
do should have space for that in prod/cons cache-lines.
So, no objections from me in general.
Thanks
Konstantin

 

RE: 21.11.5 patches review and test

[Mcnamara, John]

> -Original Message-
> From: Kevin Traynor 
> 
> Any updates from Intel validation team ? The release is due tomorrow
> (22nd) but I can postpone it if you need a few more days to complete
> testing.

Hi,

We have had some attritions on the Intel validation team so some of the 
co-ordination is behind schedule. Let me look into the current status.

John

[PATCH v2 00/15] Cleanup PCI(e) drivers

[David Marchand]

Rather than rely on Linux headers to find some PCI(e) standard constants
or reinvent the same PCI capability helper, this series complements the
pci library and the pci bus driver.
PCI drivers can then use OS agnostic macros and helpers.


-- 
David Marchand

Changes since v1:
- fix VFIO-backed drivers broken by v1 patch 3,
- enhanced rte_pci.h defines organisation,

David Marchand (15):
  drivers: remove duplicated PCI master control
  bus/pci: add const to some experimental API
  bus/pci: rework MSIX discovery with VFIO
  bus/pci: find PCI capability
  pci: define some capability constants
  pci: define some MSIX constants
  pci: define some command constants
  pci: define some BAR constants
  pci: define some PM constants
  pci: define some PCIe constants
  pci: define some extended capability constants
  pci: define some ACS constants
  pci: define some PRI constants
  pci: define some AER constants
  devtools: forbid inclusion of Linux header for PCI

 devtools/checkpatches.sh|   8 ++
 drivers/bus/pci/linux/pci_init.h|  18 
 drivers/bus/pci/linux/pci_uio.c |  32 +-
 drivers/bus/pci/linux/pci_vfio.c| 148 ++
 drivers/bus/pci/pci_common.c|  49 -
 drivers/bus/pci/rte_bus_pci.h   |  35 ++-
 drivers/bus/pci/version.map |   4 +
 drivers/crypto/virtio/virtio_pci.c  |  67 
 drivers/event/dlb2/pf/dlb2_main.c   | 156 
 drivers/net/bnx2x/bnx2x.c   |  86 ---
 drivers/net/bnx2x/bnx2x.h   |  46 
 drivers/net/cxgbe/base/adapter.h|  31 +-
 drivers/net/gve/gve_ethdev.c|  46 +---
 drivers/net/gve/gve_ethdev.h|  14 +--
 drivers/net/hns3/hns3_ethdev_vf.c   | 109 +++
 drivers/net/ngbe/base/ngbe_hw.c |  20 +---
 drivers/net/ngbe/base/ngbe_osdep.h  |   3 -
 drivers/net/virtio/virtio_pci.c | 131 ---
 drivers/vdpa/ifc/base/ifcvf_osdep.h |   4 +-
 lib/pci/rte_pci.h   |  90 ++--
 20 files changed, 358 insertions(+), 739 deletions(-)

-- 
2.41.0

[PATCH v2 01/15] drivers: remove duplicated PCI master control

[David Marchand]

Use existing API to cleanup duplicated code.

Signed-off-by: David Marchand 
Acked-by: Bruce Richardson 
---
 drivers/bus/pci/linux/pci_uio.c| 32 +--
 drivers/bus/pci/linux/pci_vfio.c   | 41 ++
 drivers/net/hns3/hns3_ethdev_vf.c  | 25 +-
 drivers/net/ngbe/base/ngbe_hw.c| 20 ++-
 drivers/net/ngbe/base/ngbe_osdep.h |  3 ---
 5 files changed, 6 insertions(+), 115 deletions(-)

diff --git a/drivers/bus/pci/linux/pci_uio.c b/drivers/bus/pci/linux/pci_uio.c
index 2bf16e9369..97d740dfe5 100644
--- a/drivers/bus/pci/linux/pci_uio.c
+++ b/drivers/bus/pci/linux/pci_uio.c
@@ -10,7 +10,6 @@
 #include 
 #include 
 #include 
-#include 
 
 #if defined(RTE_ARCH_X86)
 #include 
@@ -77,35 +76,6 @@ pci_uio_mmio_write(const struct rte_pci_device *dev, int bar,
return len;
 }
 
-static int
-pci_uio_set_bus_master(int dev_fd)
-{
-   uint16_t reg;
-   int ret;
-
-   ret = pread(dev_fd, ®, sizeof(reg), PCI_COMMAND);
-   if (ret != sizeof(reg)) {
-   RTE_LOG(ERR, EAL,
-   "Cannot read command from PCI config space!\n");
-   return -1;
-   }
-
-   /* return if bus mastering is already on */
-   if (reg & PCI_COMMAND_MASTER)
-   return 0;
-
-   reg |= PCI_COMMAND_MASTER;
-
-   ret = pwrite(dev_fd, ®, sizeof(reg), PCI_COMMAND);
-   if (ret != sizeof(reg)) {
-   RTE_LOG(ERR, EAL,
-   "Cannot write command to PCI config space!\n");
-   return -1;
-   }
-
-   return 0;
-}
-
 static int
 pci_mknod_uio_dev(const char *sysfs_uio_path, unsigned uio_num)
 {
@@ -299,7 +269,7 @@ pci_uio_alloc_resource(struct rte_pci_device *dev,
goto error;
 
/* set bus master that is not done by uio_pci_generic */
-   if (pci_uio_set_bus_master(uio_cfg_fd)) {
+   if (rte_pci_set_bus_master(dev, true)) {
RTE_LOG(ERR, EAL, "Cannot set up bus mastering!\n");
goto error;
}
diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
index e634de8322..8fa7fa458f 100644
--- a/drivers/bus/pci/linux/pci_vfio.c
+++ b/drivers/bus/pci/linux/pci_vfio.c
@@ -223,42 +223,6 @@ pci_vfio_enable_bus_memory(struct rte_pci_device *dev, int 
dev_fd)
return 0;
 }
 
-/* set PCI bus mastering */
-static int
-pci_vfio_set_bus_master(const struct rte_pci_device *dev, int dev_fd, bool op)
-{
-   uint64_t size, offset;
-   uint16_t reg;
-   int ret;
-
-   if (pci_vfio_get_region(dev, VFIO_PCI_CONFIG_REGION_INDEX,
-   &size, &offset) != 0) {
-   RTE_LOG(ERR, EAL, "Cannot get offset of CONFIG region.\n");
-   return -1;
-   }
-
-   ret = pread64(dev_fd, ®, sizeof(reg), offset + PCI_COMMAND);
-   if (ret != sizeof(reg)) {
-   RTE_LOG(ERR, EAL, "Cannot read command from PCI config 
space!\n");
-   return -1;
-   }
-
-   if (op)
-   /* set the master bit */
-   reg |= PCI_COMMAND_MASTER;
-   else
-   reg &= ~(PCI_COMMAND_MASTER);
-
-   ret = pwrite64(dev_fd, ®, sizeof(reg), offset + PCI_COMMAND);
-
-   if (ret != sizeof(reg)) {
-   RTE_LOG(ERR, EAL, "Cannot write command to PCI config 
space!\n");
-   return -1;
-   }
-
-   return 0;
-}
-
 /* set up interrupt support (but not enable interrupts) */
 static int
 pci_vfio_setup_interrupts(struct rte_pci_device *dev, int vfio_dev_fd)
@@ -535,8 +499,7 @@ pci_rte_vfio_setup_device(struct rte_pci_device *dev, int 
vfio_dev_fd)
return -1;
}
 
-   /* set bus mastering for the device */
-   if (pci_vfio_set_bus_master(dev, vfio_dev_fd, true)) {
+   if (rte_pci_set_bus_master(dev, true)) {
RTE_LOG(ERR, EAL, "Cannot set up bus mastering!\n");
return -1;
}
@@ -1226,7 +1189,7 @@ pci_vfio_unmap_resource_primary(struct rte_pci_device 
*dev)
if (vfio_dev_fd < 0)
return -1;
 
-   if (pci_vfio_set_bus_master(dev, vfio_dev_fd, false)) {
+   if (rte_pci_set_bus_master(dev, false)) {
RTE_LOG(ERR, EAL, "%s cannot unset bus mastering for PCI 
device!\n",
pci_addr);
return -1;
diff --git a/drivers/net/hns3/hns3_ethdev_vf.c 
b/drivers/net/hns3/hns3_ethdev_vf.c
index 5aac62a41f..7b3c5dc168 100644
--- a/drivers/net/hns3/hns3_ethdev_vf.c
+++ b/drivers/net/hns3/hns3_ethdev_vf.c
@@ -49,29 +49,6 @@ static int hns3vf_remove_mc_mac_addr(struct hns3_hw *hw,
 static int hns3vf_dev_link_update(struct rte_eth_dev *eth_dev,
   __rte_unused int wait_to_complete);
 
-/* set PCI bus mastering */
-static int
-hns3vf_set_bus_master(const struct rte_pci_device *device, bool op)
-{
-   uint16_t reg;
-   int ret;
-
-   

[PATCH v2 02/15] bus/pci: add const to some experimental API

[David Marchand]

Those functions are fine with a const on the device pointer.

Signed-off-by: David Marchand 
Acked-by: Bruce Richardson 
---
 drivers/bus/pci/pci_common.c  | 4 ++--
 drivers/bus/pci/rte_bus_pci.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/bus/pci/pci_common.c b/drivers/bus/pci/pci_common.c
index 52404ab0fe..382b0b8946 100644
--- a/drivers/bus/pci/pci_common.c
+++ b/drivers/bus/pci/pci_common.c
@@ -814,7 +814,7 @@ rte_pci_get_iommu_class(void)
 }
 
 off_t
-rte_pci_find_ext_capability(struct rte_pci_device *dev, uint32_t cap)
+rte_pci_find_ext_capability(const struct rte_pci_device *dev, uint32_t cap)
 {
off_t offset = RTE_PCI_CFG_SPACE_SIZE;
uint32_t header;
@@ -857,7 +857,7 @@ rte_pci_find_ext_capability(struct rte_pci_device *dev, 
uint32_t cap)
 }
 
 int
-rte_pci_set_bus_master(struct rte_pci_device *dev, bool enable)
+rte_pci_set_bus_master(const struct rte_pci_device *dev, bool enable)
 {
uint16_t old_cmd, cmd;
 
diff --git a/drivers/bus/pci/rte_bus_pci.h b/drivers/bus/pci/rte_bus_pci.h
index 9d59c4aef3..75d0030eae 100644
--- a/drivers/bus/pci/rte_bus_pci.h
+++ b/drivers/bus/pci/rte_bus_pci.h
@@ -85,7 +85,7 @@ void rte_pci_dump(FILE *f);
  *  = 0: Device does not support it.
  */
 __rte_experimental
-off_t rte_pci_find_ext_capability(struct rte_pci_device *dev, uint32_t cap);
+off_t rte_pci_find_ext_capability(const struct rte_pci_device *dev, uint32_t 
cap);
 
 /**
  * Enables/Disables Bus Master for device's PCI command register.
@@ -99,7 +99,7 @@ off_t rte_pci_find_ext_capability(struct rte_pci_device *dev, 
uint32_t cap);
  *  0 on success, -1 on error in PCI config space read/write.
  */
 __rte_experimental
-int rte_pci_set_bus_master(struct rte_pci_device *dev, bool enable);
+int rte_pci_set_bus_master(const struct rte_pci_device *dev, bool enable);
 
 /**
  * Read PCI config space.
-- 
2.41.0

[PATCH v2 03/15] bus/pci: rework MSIX discovery with VFIO

[David Marchand]

This is a preparatory step before using new helpers for finding PCI
capabilities.
In the code querying PCI capabilities for checking MSIX availability,
replace direct calls to VFIO fd with the existing helpers for reading
PCI configuration space: this requires setting VFIO fd in the PCI
device object than was done before this change and removes the need to
pass around this vfio_dev_fd variable.

Signed-off-by: David Marchand 
---
 drivers/bus/pci/linux/pci_vfio.c | 27 ++-
 1 file changed, 10 insertions(+), 17 deletions(-)

diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
index 8fa7fa458f..958f8b3b52 100644
--- a/drivers/bus/pci/linux/pci_vfio.c
+++ b/drivers/bus/pci/linux/pci_vfio.c
@@ -107,23 +107,16 @@ pci_vfio_write_config(const struct rte_pci_device *dev,
 
 /* get PCI BAR number where MSI-X interrupts are */
 static int
-pci_vfio_get_msix_bar(const struct rte_pci_device *dev, int fd,
+pci_vfio_get_msix_bar(const struct rte_pci_device *dev,
struct pci_msix_table *msix_table)
 {
int ret;
uint32_t reg;
uint16_t flags;
uint8_t cap_id, cap_offset;
-   uint64_t size, offset;
-
-   if (pci_vfio_get_region(dev, VFIO_PCI_CONFIG_REGION_INDEX,
-   &size, &offset) != 0) {
-   RTE_LOG(ERR, EAL, "Cannot get offset of CONFIG region.\n");
-   return -1;
-   }
 
/* read PCI capability pointer from config space */
-   ret = pread64(fd, ®, sizeof(reg), offset + PCI_CAPABILITY_LIST);
+   ret = rte_pci_read_config(dev, ®, sizeof(reg), PCI_CAPABILITY_LIST);
if (ret != sizeof(reg)) {
RTE_LOG(ERR, EAL,
"Cannot read capability pointer from PCI config 
space!\n");
@@ -136,7 +129,7 @@ pci_vfio_get_msix_bar(const struct rte_pci_device *dev, int 
fd,
while (cap_offset) {
 
/* read PCI capability ID */
-   ret = pread64(fd, ®, sizeof(reg), offset + cap_offset);
+   ret = rte_pci_read_config(dev, ®, sizeof(reg), cap_offset);
if (ret != sizeof(reg)) {
RTE_LOG(ERR, EAL,
"Cannot read capability ID from PCI config 
space!\n");
@@ -148,7 +141,7 @@ pci_vfio_get_msix_bar(const struct rte_pci_device *dev, int 
fd,
 
/* if we haven't reached MSI-X, check next capability */
if (cap_id != PCI_CAP_ID_MSIX) {
-   ret = pread64(fd, ®, sizeof(reg), offset + 
cap_offset);
+   ret = rte_pci_read_config(dev, ®, sizeof(reg), 
cap_offset);
if (ret != sizeof(reg)) {
RTE_LOG(ERR, EAL,
"Cannot read capability pointer from 
PCI config space!\n");
@@ -163,14 +156,14 @@ pci_vfio_get_msix_bar(const struct rte_pci_device *dev, 
int fd,
/* else, read table offset */
else {
/* table offset resides in the next 4 bytes */
-   ret = pread64(fd, ®, sizeof(reg), offset + 
cap_offset + 4);
+   ret = rte_pci_read_config(dev, ®, sizeof(reg), 
cap_offset + 4);
if (ret != sizeof(reg)) {
RTE_LOG(ERR, EAL,
"Cannot read table offset from PCI 
config space!\n");
return -1;
}
 
-   ret = pread64(fd, &flags, sizeof(flags), offset + 
cap_offset + 2);
+   ret = rte_pci_read_config(dev, &flags, sizeof(flags), 
cap_offset + 2);
if (ret != sizeof(flags)) {
RTE_LOG(ERR, EAL,
"Cannot read table flags from PCI 
config space!\n");
@@ -306,9 +299,6 @@ pci_vfio_setup_interrupts(struct rte_pci_device *dev, int 
vfio_dev_fd)
if (rte_intr_fd_set(dev->intr_handle, fd))
return -1;
 
-   if (rte_intr_dev_fd_set(dev->intr_handle, vfio_dev_fd))
-   return -1;
-
switch (i) {
case VFIO_PCI_MSIX_IRQ_INDEX:
intr_mode = RTE_INTR_MODE_MSIX;
@@ -838,6 +828,9 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev)
if (ret)
return ret;
 
+   if (rte_intr_dev_fd_set(dev->intr_handle, vfio_dev_fd))
+   goto err_vfio_dev_fd;
+
/* allocate vfio_res and get region info */
vfio_res = rte_zmalloc("VFIO_RES", sizeof(*vfio_res), 0);
if (vfio_res == NULL) {
@@ -869,7 +862,7 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev)
/* get MSI-X BAR, if any (we have to know where it is because we can't
 * easily mmap it when using VFIO)
 */
-   ret = pci_vfio_get_msix_bar(dev, vfio_dev_fd, &vfio_res->msix_table);
+   ret = pc

[PATCH v2 04/15] bus/pci: find PCI capability

[David Marchand]

Introduce two helpers so that drivers stop reinventing the wheel when it
comes to finding capabilities in a device PCI configuration space.
Use it in existing drivers.

Note:
- base/ drivers code is left untouched, only some wrappers in cxgbe
  are touched,
- bnx2x maintained a per device cache of capabilities, this code has been
  reworked to only cache the capabilities used in this driver,

Signed-off-by: David Marchand 
Acked-by: Bruce Richardson 
---
Changes since v1:
- updated commitlog,
- separated VFIO changes for using standard PCI helper in a separate
  patch,
- marked new experimental symbols with current version,
- reordered defines in rte_pci.h,

---
 drivers/bus/pci/linux/pci_vfio.c   |  74 --
 drivers/bus/pci/pci_common.c   |  45 +++
 drivers/bus/pci/rte_bus_pci.h  |  31 
 drivers/bus/pci/version.map|   4 +
 drivers/crypto/virtio/virtio_pci.c |  57 +-
 drivers/event/dlb2/pf/dlb2_main.c  |  42 +-
 drivers/net/bnx2x/bnx2x.c  |  41 +-
 drivers/net/cxgbe/base/adapter.h   |  28 +--
 drivers/net/gve/gve_ethdev.c   |  46 ++-
 drivers/net/gve/gve_ethdev.h   |   4 -
 drivers/net/hns3/hns3_ethdev_vf.c  |  79 +++
 drivers/net/virtio/virtio_pci.c| 121 +
 lib/pci/rte_pci.h  |  11 +++
 13 files changed, 186 insertions(+), 397 deletions(-)

diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
index 958f8b3b52..614ed5d696 100644
--- a/drivers/bus/pci/linux/pci_vfio.c
+++ b/drivers/bus/pci/linux/pci_vfio.c
@@ -110,74 +110,34 @@ static int
 pci_vfio_get_msix_bar(const struct rte_pci_device *dev,
struct pci_msix_table *msix_table)
 {
-   int ret;
-   uint32_t reg;
-   uint16_t flags;
-   uint8_t cap_id, cap_offset;
+   off_t cap_offset;
 
-   /* read PCI capability pointer from config space */
-   ret = rte_pci_read_config(dev, ®, sizeof(reg), PCI_CAPABILITY_LIST);
-   if (ret != sizeof(reg)) {
-   RTE_LOG(ERR, EAL,
-   "Cannot read capability pointer from PCI config 
space!\n");
+   cap_offset = rte_pci_find_capability(dev, PCI_CAP_ID_MSIX);
+   if (cap_offset < 0)
return -1;
-   }
 
-   /* we need first byte */
-   cap_offset = reg & 0xFF;
+   if (cap_offset != 0) {
+   uint16_t flags;
+   uint32_t reg;
 
-   while (cap_offset) {
-
-   /* read PCI capability ID */
-   ret = rte_pci_read_config(dev, ®, sizeof(reg), cap_offset);
-   if (ret != sizeof(reg)) {
+   /* table offset resides in the next 4 bytes */
+   if (rte_pci_read_config(dev, ®, sizeof(reg), cap_offset + 4) 
< 0) {
RTE_LOG(ERR, EAL,
-   "Cannot read capability ID from PCI config 
space!\n");
+   "Cannot read MSIX table from PCI config 
space!\n");
return -1;
}
 
-   /* we need first byte */
-   cap_id = reg & 0xFF;
-
-   /* if we haven't reached MSI-X, check next capability */
-   if (cap_id != PCI_CAP_ID_MSIX) {
-   ret = rte_pci_read_config(dev, ®, sizeof(reg), 
cap_offset);
-   if (ret != sizeof(reg)) {
-   RTE_LOG(ERR, EAL,
-   "Cannot read capability pointer from 
PCI config space!\n");
-   return -1;
-   }
-
-   /* we need second byte */
-   cap_offset = (reg & 0xFF00) >> 8;
-
-   continue;
+   if (rte_pci_read_config(dev, &flags, sizeof(flags), cap_offset 
+ 2) < 0) {
+   RTE_LOG(ERR, EAL,
+   "Cannot read MSIX flags from PCI config 
space!\n");
+   return -1;
}
-   /* else, read table offset */
-   else {
-   /* table offset resides in the next 4 bytes */
-   ret = rte_pci_read_config(dev, ®, sizeof(reg), 
cap_offset + 4);
-   if (ret != sizeof(reg)) {
-   RTE_LOG(ERR, EAL,
-   "Cannot read table offset from PCI 
config space!\n");
-   return -1;
-   }
-
-   ret = rte_pci_read_config(dev, &flags, sizeof(flags), 
cap_offset + 2);
-   if (ret != sizeof(flags)) {
-   RTE_LOG(ERR, EAL,
-   "Cannot read table flags from PCI 
config space!\n");
-   return -1;
-   }
-
-   msix_table->bar_index = reg & RTE_PCI_MSIX_TABLE_BIR;
-   

[PATCH v2 05/15] pci: define some capability constants

[David Marchand]

Define some PCI capability constants and use them in existing drivers.

Signed-off-by: David Marchand 
Acked-by: Bruce Richardson 
---
 drivers/bus/pci/linux/pci_vfio.c|  2 +-
 drivers/crypto/virtio/virtio_pci.c  | 12 ++--
 drivers/event/dlb2/pf/dlb2_main.c   |  6 ++
 drivers/net/bnx2x/bnx2x.c   | 16 
 drivers/net/bnx2x/bnx2x.h   |  4 
 drivers/net/cxgbe/base/adapter.h|  3 +--
 drivers/net/gve/gve_ethdev.c|  2 +-
 drivers/net/gve/gve_ethdev.h|  2 +-
 drivers/net/hns3/hns3_ethdev_vf.c   |  2 +-
 drivers/net/virtio/virtio_pci.c | 12 ++--
 drivers/vdpa/ifc/base/ifcvf_osdep.h |  4 +++-
 lib/pci/rte_pci.h   |  5 +
 12 files changed, 27 insertions(+), 43 deletions(-)

diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
index 614ed5d696..bfedbc1bed 100644
--- a/drivers/bus/pci/linux/pci_vfio.c
+++ b/drivers/bus/pci/linux/pci_vfio.c
@@ -112,7 +112,7 @@ pci_vfio_get_msix_bar(const struct rte_pci_device *dev,
 {
off_t cap_offset;
 
-   cap_offset = rte_pci_find_capability(dev, PCI_CAP_ID_MSIX);
+   cap_offset = rte_pci_find_capability(dev, RTE_PCI_CAP_ID_MSIX);
if (cap_offset < 0)
return -1;
 
diff --git a/drivers/crypto/virtio/virtio_pci.c 
b/drivers/crypto/virtio/virtio_pci.c
index abc52b4701..9e340f2b0d 100644
--- a/drivers/crypto/virtio/virtio_pci.c
+++ b/drivers/crypto/virtio/virtio_pci.c
@@ -14,14 +14,6 @@
 #include "virtio_pci.h"
 #include "virtqueue.h"
 
-/*
- * Following macros are derived from linux/pci_regs.h, however,
- * we can't simply include that header here, as there is no such
- * file for non-Linux platform.
- */
-#define PCI_CAP_ID_VNDR0x09
-#define PCI_CAP_ID_MSIX0x11
-
 /*
  * The remaining space is defined by each driver as the per-driver
  * configuration space.
@@ -356,7 +348,7 @@ virtio_read_caps(struct rte_pci_device *dev, struct 
virtio_crypto_hw *hw)
 * Transitional devices would also have this capability,
 * that's why we also check if msix is enabled.
 */
-   pos = rte_pci_find_capability(dev, PCI_CAP_ID_MSIX);
+   pos = rte_pci_find_capability(dev, RTE_PCI_CAP_ID_MSIX);
if (pos > 0 && rte_pci_read_config(dev, &flags, sizeof(flags),
pos + 2) == sizeof(flags)) {
if (flags & PCI_MSIX_ENABLE)
@@ -367,7 +359,7 @@ virtio_read_caps(struct rte_pci_device *dev, struct 
virtio_crypto_hw *hw)
hw->use_msix = VIRTIO_MSIX_NONE;
}
 
-   pos = rte_pci_find_capability(dev, PCI_CAP_ID_VNDR);
+   pos = rte_pci_find_capability(dev, RTE_PCI_CAP_ID_VNDR);
if (pos > 0 && rte_pci_read_config(dev, &cap, sizeof(cap), pos) == 
sizeof(cap)) {
VIRTIO_CRYPTO_INIT_LOG_DBG(
"[%2x] cfg type: %u, bar: %u, offset: %04x, len: %u",
diff --git a/drivers/event/dlb2/pf/dlb2_main.c 
b/drivers/event/dlb2/pf/dlb2_main.c
index 40e5cb594f..1a229baee0 100644
--- a/drivers/event/dlb2/pf/dlb2_main.c
+++ b/drivers/event/dlb2/pf/dlb2_main.c
@@ -38,8 +38,6 @@
 #define DLB2_PCI_EXP_DEVSTA_TRPND 0x20
 #define DLB2_PCI_EXP_DEVCTL_BCR_FLR 0x8000
 
-#define DLB2_PCI_CAP_ID_EXP   0x10
-#define DLB2_PCI_CAP_ID_MSIX  0x11
 #define DLB2_PCI_EXT_CAP_ID_PRI   0x13
 #define DLB2_PCI_EXT_CAP_ID_ACS   0xD
 
@@ -244,7 +242,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
return ret;
}
 
-   pcie_cap_offset = rte_pci_find_capability(pdev, DLB2_PCI_CAP_ID_EXP);
+   pcie_cap_offset = rte_pci_find_capability(pdev, RTE_PCI_CAP_ID_EXP);
 
if (pcie_cap_offset < 0) {
DLB2_LOG_ERR("[%s()] failed to find the pcie capability\n",
@@ -483,7 +481,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
}
}
 
-   msix_cap_offset = rte_pci_find_capability(pdev, DLB2_PCI_CAP_ID_MSIX);
+   msix_cap_offset = rte_pci_find_capability(pdev, RTE_PCI_CAP_ID_MSIX);
if (msix_cap_offset >= 0) {
off = msix_cap_offset + DLB2_PCI_MSIX_FLAGS;
if (rte_pci_read_config(pdev, &cmd, 2, off) == 2) {
diff --git a/drivers/net/bnx2x/bnx2x.c b/drivers/net/bnx2x/bnx2x.c
index 06f2949885..8a97de8806 100644
--- a/drivers/net/bnx2x/bnx2x.c
+++ b/drivers/net/bnx2x/bnx2x.c
@@ -7613,7 +7613,7 @@ static uint32_t bnx2x_pcie_capability_read(struct 
bnx2x_softc *sc, int reg)
struct bnx2x_pci_cap *caps;
 
/* ensure PCIe capability is enabled */
-   caps = pci_find_cap(sc, PCIY_EXPRESS, BNX2X_PCI_CAP);
+   caps = pci_find_cap(sc, RTE_PCI_CAP_ID_EXP, BNX2X_PCI_CAP);
if (NULL != caps) {
PMD_DRV_LOG(DEBUG, sc, "Found PCIe capability: "
"id=0x%04X type=0x%04X addr=0x%08X",
@@ -7647,7 +7647,7 @@ static void bnx2x_probe_pci_caps(struct bnx2x_softc *sc)
int reg = 0;
 
/* check if PCI Power Management is enabled */
-   caps = pci_

[PATCH v2 06/15] pci: define some MSIX constants

[David Marchand]

Define some PCI MSIX constants and use them in existing drivers.

Signed-off-by: David Marchand 
Acked-by: Bruce Richardson 
---
 drivers/bus/pci/linux/pci_init.h   | 18 --
 drivers/bus/pci/linux/pci_vfio.c   |  7 ---
 drivers/crypto/virtio/virtio_pci.c |  6 ++
 drivers/event/dlb2/pf/dlb2_main.c  | 13 +
 drivers/net/bnx2x/bnx2x.c  |  4 ++--
 drivers/net/bnx2x/bnx2x.h  |  2 --
 drivers/net/gve/gve_ethdev.c   |  4 ++--
 drivers/net/gve/gve_ethdev.h   |  8 
 drivers/net/hns3/hns3_ethdev_vf.c  |  9 -
 drivers/net/virtio/virtio_pci.c|  6 ++
 lib/pci/rte_pci.h  | 10 ++
 11 files changed, 31 insertions(+), 56 deletions(-)

diff --git a/drivers/bus/pci/linux/pci_init.h b/drivers/bus/pci/linux/pci_init.h
index d842809ccd..a4d37c0d0a 100644
--- a/drivers/bus/pci/linux/pci_init.h
+++ b/drivers/bus/pci/linux/pci_init.h
@@ -52,24 +52,6 @@ int pci_uio_ioport_unmap(struct rte_pci_ioport *p);
 
 #ifdef VFIO_PRESENT
 
-#ifdef PCI_MSIX_TABLE_BIR
-#define RTE_PCI_MSIX_TABLE_BIRPCI_MSIX_TABLE_BIR
-#else
-#define RTE_PCI_MSIX_TABLE_BIR0x7
-#endif
-
-#ifdef PCI_MSIX_TABLE_OFFSET
-#define RTE_PCI_MSIX_TABLE_OFFSET PCI_MSIX_TABLE_OFFSET
-#else
-#define RTE_PCI_MSIX_TABLE_OFFSET 0xfff8
-#endif
-
-#ifdef PCI_MSIX_FLAGS_QSIZE
-#define RTE_PCI_MSIX_FLAGS_QSIZE  PCI_MSIX_FLAGS_QSIZE
-#else
-#define RTE_PCI_MSIX_FLAGS_QSIZE  0x07ff
-#endif
-
 /* access config space */
 int pci_vfio_read_config(const struct rte_pci_device *dev,
 void *buf, size_t len, off_t offs);
diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
index bfedbc1bed..7881b7a946 100644
--- a/drivers/bus/pci/linux/pci_vfio.c
+++ b/drivers/bus/pci/linux/pci_vfio.c
@@ -120,14 +120,15 @@ pci_vfio_get_msix_bar(const struct rte_pci_device *dev,
uint16_t flags;
uint32_t reg;
 
-   /* table offset resides in the next 4 bytes */
-   if (rte_pci_read_config(dev, ®, sizeof(reg), cap_offset + 4) 
< 0) {
+   if (rte_pci_read_config(dev, ®, sizeof(reg), cap_offset +
+   RTE_PCI_MSIX_TABLE) < 0) {
RTE_LOG(ERR, EAL,
"Cannot read MSIX table from PCI config 
space!\n");
return -1;
}
 
-   if (rte_pci_read_config(dev, &flags, sizeof(flags), cap_offset 
+ 2) < 0) {
+   if (rte_pci_read_config(dev, &flags, sizeof(flags), cap_offset +
+   RTE_PCI_MSIX_FLAGS) < 0) {
RTE_LOG(ERR, EAL,
"Cannot read MSIX flags from PCI config 
space!\n");
return -1;
diff --git a/drivers/crypto/virtio/virtio_pci.c 
b/drivers/crypto/virtio/virtio_pci.c
index 9e340f2b0d..c9fb1087a9 100644
--- a/drivers/crypto/virtio/virtio_pci.c
+++ b/drivers/crypto/virtio/virtio_pci.c
@@ -329,8 +329,6 @@ get_cfg_addr(struct rte_pci_device *dev, struct 
virtio_pci_cap *cap)
return base + offset;
 }
 
-#define PCI_MSIX_ENABLE 0x8000
-
 static int
 virtio_read_caps(struct rte_pci_device *dev, struct virtio_crypto_hw *hw)
 {
@@ -350,8 +348,8 @@ virtio_read_caps(struct rte_pci_device *dev, struct 
virtio_crypto_hw *hw)
 */
pos = rte_pci_find_capability(dev, RTE_PCI_CAP_ID_MSIX);
if (pos > 0 && rte_pci_read_config(dev, &flags, sizeof(flags),
-   pos + 2) == sizeof(flags)) {
-   if (flags & PCI_MSIX_ENABLE)
+   pos + RTE_PCI_MSIX_FLAGS) == sizeof(flags)) {
+   if (flags & RTE_PCI_MSIX_FLAGS_ENABLE)
hw->use_msix = VIRTIO_MSIX_ENABLED;
else
hw->use_msix = VIRTIO_MSIX_DISABLED;
diff --git a/drivers/event/dlb2/pf/dlb2_main.c 
b/drivers/event/dlb2/pf/dlb2_main.c
index 1a229baee0..c6606a9bee 100644
--- a/drivers/event/dlb2/pf/dlb2_main.c
+++ b/drivers/event/dlb2/pf/dlb2_main.c
@@ -44,9 +44,6 @@
 #define DLB2_PCI_PRI_CTRL_ENABLE 0x1
 #define DLB2_PCI_PRI_ALLOC_REQ   0xC
 #define DLB2_PCI_PRI_CTRL0x4
-#define DLB2_PCI_MSIX_FLAGS  0x2
-#define DLB2_PCI_MSIX_FLAGS_ENABLE   0x8000
-#define DLB2_PCI_MSIX_FLAGS_MASKALL  0x4000
 #define DLB2_PCI_ERR_ROOT_STATUS 0x30
 #define DLB2_PCI_ERR_COR_STATUS  0x10
 #define DLB2_PCI_ERR_UNCOR_STATUS0x4
@@ -483,10 +480,10 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
 
msix_cap_offset = rte_pci_find_capability(pdev, RTE_PCI_CAP_ID_MSIX);
if (msix_cap_offset >= 0) {
-   off = msix_cap_offset + DLB2_PCI_MSIX_FLAGS;
+   off = msix_cap_offset + RTE_PCI_MSIX_FLAGS;
if (rte_pci_read_config(pdev, &cmd, 2, off) == 2) {
-   cmd |= DLB2_PCI_MSIX_FLAGS_ENABLE;
-   cmd |= DLB2_PCI_MSIX_FLAGS_MASKALL;
+  

[PATCH v2 07/15] pci: define some command constants

[David Marchand]

Define some PCI command constants and use them in existing drivers.

Signed-off-by: David Marchand 
Acked-by: Bruce Richardson 
---
 drivers/bus/pci/linux/pci_vfio.c  | 8 
 drivers/event/dlb2/pf/dlb2_main.c | 8 +++-
 lib/pci/rte_pci.h | 6 --
 3 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
index 7881b7a946..bf91492dd9 100644
--- a/drivers/bus/pci/linux/pci_vfio.c
+++ b/drivers/bus/pci/linux/pci_vfio.c
@@ -156,18 +156,18 @@ pci_vfio_enable_bus_memory(struct rte_pci_device *dev, 
int dev_fd)
return -1;
}
 
-   ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND);
+   ret = pread64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
 
if (ret != sizeof(cmd)) {
RTE_LOG(ERR, EAL, "Cannot read command from PCI config 
space!\n");
return -1;
}
 
-   if (cmd & PCI_COMMAND_MEMORY)
+   if (cmd & RTE_PCI_COMMAND_MEMORY)
return 0;
 
-   cmd |= PCI_COMMAND_MEMORY;
-   ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + PCI_COMMAND);
+   cmd |= RTE_PCI_COMMAND_MEMORY;
+   ret = pwrite64(dev_fd, &cmd, sizeof(cmd), offset + RTE_PCI_COMMAND);
 
if (ret != sizeof(cmd)) {
RTE_LOG(ERR, EAL, "Cannot write command to PCI config 
space!\n");
diff --git a/drivers/event/dlb2/pf/dlb2_main.c 
b/drivers/event/dlb2/pf/dlb2_main.c
index c6606a9bee..6dbaa2ff97 100644
--- a/drivers/event/dlb2/pf/dlb2_main.c
+++ b/drivers/event/dlb2/pf/dlb2_main.c
@@ -33,7 +33,6 @@
 #define DLB2_PCI_EXP_DEVCTL2 40
 #define DLB2_PCI_LNKCTL2 48
 #define DLB2_PCI_SLTCTL2 56
-#define DLB2_PCI_CMD 4
 #define DLB2_PCI_EXP_DEVSTA 10
 #define DLB2_PCI_EXP_DEVSTA_TRPND 0x20
 #define DLB2_PCI_EXP_DEVCTL_BCR_FLR 0x8000
@@ -47,7 +46,6 @@
 #define DLB2_PCI_ERR_ROOT_STATUS 0x30
 #define DLB2_PCI_ERR_COR_STATUS  0x10
 #define DLB2_PCI_ERR_UNCOR_STATUS0x4
-#define DLB2_PCI_COMMAND_INTX_DISABLE0x400
 #define DLB2_PCI_ACS_CAP 0x4
 #define DLB2_PCI_ACS_CTRL0x6
 #define DLB2_PCI_ACS_SV  0x1
@@ -286,7 +284,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
 
/* clear the PCI command register before issuing the FLR */
 
-   off = DLB2_PCI_CMD;
+   off = RTE_PCI_COMMAND;
cmd = 0;
if (rte_pci_write_config(pdev, &cmd, 2, off) != 2) {
DLB2_LOG_ERR("[%s()] failed to write the pci command\n",
@@ -468,9 +466,9 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
}
}
 
-   off = DLB2_PCI_CMD;
+   off = RTE_PCI_COMMAND;
if (rte_pci_read_config(pdev, &cmd, 2, off) == 2) {
-   cmd &= ~DLB2_PCI_COMMAND_INTX_DISABLE;
+   cmd &= ~RTE_PCI_COMMAND_INTX_DISABLE;
if (rte_pci_write_config(pdev, &cmd, 2, off) != 2) {
DLB2_LOG_ERR("[%s()] failed to write the pci command\n",
   __func__);
diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
index 41dc725cc4..9eb8f85ceb 100644
--- a/lib/pci/rte_pci.h
+++ b/lib/pci/rte_pci.h
@@ -37,8 +37,10 @@ extern "C" {
 #define RTE_PCI_STATUS 0x06/* 16 bits */
 #define RTE_PCI_CAPABILITY_LIST0x34/* 32 bits */
 
-/* PCI Command Register */
-#define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */
+/* PCI Command Register (RTE_PCI_COMMAND) */
+#define RTE_PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory 
space */
+#define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */
+#define RTE_PCI_COMMAND_INTX_DISABLE   0x400   /* INTx Emulation Disable */
 
 /* PCI Status Register (RTE_PCI_STATUS) */
 #define RTE_PCI_STATUS_CAP_LIST0x10/* Support Capability 
List */
-- 
2.41.0

[PATCH v2 08/15] pci: define some BAR constants

[David Marchand]

Define some PCI BAR constants and use them in existing drivers.

Signed-off-by: David Marchand 
Acked-by: Bruce Richardson 
---
 drivers/bus/pci/linux/pci_vfio.c | 7 +++
 lib/pci/rte_pci.h| 4 
 2 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
index bf91492dd9..3f3201daf2 100644
--- a/drivers/bus/pci/linux/pci_vfio.c
+++ b/drivers/bus/pci/linux/pci_vfio.c
@@ -5,7 +5,6 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
@@ -427,14 +426,14 @@ pci_vfio_is_ioport_bar(const struct rte_pci_device *dev, 
int vfio_dev_fd,
}
 
ret = pread64(vfio_dev_fd, &ioport_bar, sizeof(ioport_bar),
- offset + PCI_BASE_ADDRESS_0 + bar_index * 4);
+ offset + RTE_PCI_BASE_ADDRESS_0 + bar_index * 4);
if (ret != sizeof(ioport_bar)) {
RTE_LOG(ERR, EAL, "Cannot read command (%x) from config 
space!\n",
-   PCI_BASE_ADDRESS_0 + bar_index*4);
+   RTE_PCI_BASE_ADDRESS_0 + bar_index*4);
return -1;
}
 
-   return (ioport_bar & PCI_BASE_ADDRESS_SPACE_IO) != 0;
+   return (ioport_bar & RTE_PCI_BASE_ADDRESS_SPACE_IO) != 0;
 }
 
 static int
diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
index 9eb8f85ceb..62bf87aa10 100644
--- a/lib/pci/rte_pci.h
+++ b/lib/pci/rte_pci.h
@@ -35,6 +35,7 @@ extern "C" {
 #define RTE_PCI_DEVICE_ID  0x02/* 16 bits */
 #define RTE_PCI_COMMAND0x04/* 16 bits */
 #define RTE_PCI_STATUS 0x06/* 16 bits */
+#define RTE_PCI_BASE_ADDRESS_0 0x10/* 32 bits */
 #define RTE_PCI_CAPABILITY_LIST0x34/* 32 bits */
 
 /* PCI Command Register (RTE_PCI_COMMAND) */
@@ -45,6 +46,9 @@ extern "C" {
 /* PCI Status Register (RTE_PCI_STATUS) */
 #define RTE_PCI_STATUS_CAP_LIST0x10/* Support Capability 
List */
 
+/* Base addresses (RTE_PCI_BASE_ADDRESS_*) */
+#define RTE_PCI_BASE_ADDRESS_SPACE_IO  0x01
+
 /* Capability registers (RTE_PCI_CAPABILITY_LIST) */
 #define RTE_PCI_CAP_ID_PM  0x01/* Power Management */
 #define RTE_PCI_CAP_ID_MSI 0x05/* Message Signalled Interrupts 
*/
-- 
2.41.0

[PATCH v2 09/15] pci: define some PM constants

[David Marchand]

Define some PCI Power Management constants and use them in existing
drivers.

Signed-off-by: David Marchand 
Acked-by: Bruce Richardson 
---
 drivers/net/bnx2x/bnx2x.c | 17 +
 drivers/net/bnx2x/bnx2x.h |  5 -
 lib/pci/rte_pci.h |  6 ++
 3 files changed, 15 insertions(+), 13 deletions(-)

diff --git a/drivers/net/bnx2x/bnx2x.c b/drivers/net/bnx2x/bnx2x.c
index e3f14400cc..faf061beba 100644
--- a/drivers/net/bnx2x/bnx2x.c
+++ b/drivers/net/bnx2x/bnx2x.c
@@ -5843,17 +5843,17 @@ static int bnx2x_set_power_state(struct bnx2x_softc 
*sc, uint8_t state)
return 0;
}
 
-   pci_read(sc, (sc->devinfo.pcie_pm_cap_reg + PCIR_POWER_STATUS), &pmcsr,
+   pci_read(sc, (sc->devinfo.pcie_pm_cap_reg + RTE_PCI_PM_CTRL), &pmcsr,
 2);
 
switch (state) {
case PCI_PM_D0:
pci_write_word(sc,
   (sc->devinfo.pcie_pm_cap_reg +
-   PCIR_POWER_STATUS),
-  ((pmcsr & ~PCIM_PSTAT_DMASK) | PCIM_PSTAT_PME));
+   RTE_PCI_PM_CTRL),
+  ((pmcsr & ~RTE_PCI_PM_CTRL_STATE_MASK) | 
RTE_PCI_PM_CTRL_PME_STATUS));
 
-   if (pmcsr & PCIM_PSTAT_DMASK) {
+   if (pmcsr & RTE_PCI_PM_CTRL_STATE_MASK) {
/* delay required during transition out of D3hot */
DELAY(2);
}
@@ -5866,16 +5866,17 @@ static int bnx2x_set_power_state(struct bnx2x_softc 
*sc, uint8_t state)
return 0;
}
 
-   pmcsr &= ~PCIM_PSTAT_DMASK;
-   pmcsr |= PCIM_PSTAT_D3;
+   pmcsr &= ~RTE_PCI_PM_CTRL_STATE_MASK;
+   /* D3 power state */
+   pmcsr |= 0x3;
 
if (sc->wol) {
-   pmcsr |= PCIM_PSTAT_PMEENABLE;
+   pmcsr |= RTE_PCI_PM_CTRL_PME_ENABLE;
}
 
pci_write_long(sc,
   (sc->devinfo.pcie_pm_cap_reg +
-   PCIR_POWER_STATUS), pmcsr);
+   RTE_PCI_PM_CTRL), pmcsr);
 
/*
 * No more memory access after this point until device is 
brought back
diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h
index 60af75d336..1efa166316 100644
--- a/drivers/net/bnx2x/bnx2x.h
+++ b/drivers/net/bnx2x/bnx2x.h
@@ -41,11 +41,6 @@
 #define PCIR_EXPRESS_DEVICE_CTLPCI_EXP_DEVCTL
 #define PCIM_EXP_CTL_MAX_PAYLOAD   PCI_EXP_DEVCTL_PAYLOAD
 #define PCIM_EXP_CTL_MAX_READ_REQUEST  PCI_EXP_DEVCTL_READRQ
-#define PCIR_POWER_STATUS  PCI_PM_CTRL
-#define PCIM_PSTAT_DMASK   PCI_PM_CTRL_STATE_MASK
-#define PCIM_PSTAT_PME PCI_PM_CTRL_PME_STATUS
-#define PCIM_PSTAT_D3  0x3
-#define PCIM_PSTAT_PMEENABLE   PCI_PM_CTRL_PME_ENABLE
 #else
 #include 
 #endif
diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
index 62bf87aa10..542d142dfb 100644
--- a/lib/pci/rte_pci.h
+++ b/lib/pci/rte_pci.h
@@ -57,6 +57,12 @@ extern "C" {
 #define RTE_PCI_CAP_ID_MSIX0x11/* MSI-X */
 #define RTE_PCI_CAP_SIZEOF 4
 
+/* Power Management Registers (RTE_PCI_CAP_ID_PM) */
+#define RTE_PCI_PM_CTRL4   /* PM control and 
status register */
+#define RTE_PCI_PM_CTRL_STATE_MASK 0x0003  /* Current power state (D0 to 
D3) */
+#define RTE_PCI_PM_CTRL_PME_ENABLE 0x0100  /* PME pin enable */
+#define RTE_PCI_PM_CTRL_PME_STATUS 0x8000  /* PME pin status */
+
 /* MSI-X registers (RTE_PCI_CAP_ID_MSIX) */
 #define RTE_PCI_MSIX_FLAGS 2   /* Message Control */
 #define RTE_PCI_MSIX_FLAGS_QSIZE   0x07ff  /* Table size */
-- 
2.41.0

[PATCH v2 10/15] pci: define some PCIe constants

[David Marchand]

Define some PCI Express constants and use them in existing drivers.

Signed-off-by: David Marchand 
Acked-by: Bruce Richardson 
---
 drivers/event/dlb2/pf/dlb2_main.c | 40 ---
 drivers/net/bnx2x/bnx2x.c | 16 ++---
 drivers/net/bnx2x/bnx2x.h | 35 ---
 lib/pci/rte_pci.h | 21 +---
 4 files changed, 41 insertions(+), 71 deletions(-)

diff --git a/drivers/event/dlb2/pf/dlb2_main.c 
b/drivers/event/dlb2/pf/dlb2_main.c
index 6dbaa2ff97..8d960edef6 100644
--- a/drivers/event/dlb2/pf/dlb2_main.c
+++ b/drivers/event/dlb2/pf/dlb2_main.c
@@ -27,16 +27,6 @@
 #define NO_OWNER_VF 0  /* PF ONLY! */
 #define NOT_VF_REQ false /* PF ONLY! */
 
-#define DLB2_PCI_LNKCTL 16
-#define DLB2_PCI_SLTCTL 24
-#define DLB2_PCI_RTCTL 28
-#define DLB2_PCI_EXP_DEVCTL2 40
-#define DLB2_PCI_LNKCTL2 48
-#define DLB2_PCI_SLTCTL2 56
-#define DLB2_PCI_EXP_DEVSTA 10
-#define DLB2_PCI_EXP_DEVSTA_TRPND 0x20
-#define DLB2_PCI_EXP_DEVCTL_BCR_FLR 0x8000
-
 #define DLB2_PCI_EXT_CAP_ID_PRI   0x13
 #define DLB2_PCI_EXT_CAP_ID_ACS   0xD
 
@@ -249,27 +239,27 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
if (rte_pci_read_config(pdev, &dev_ctl_word, 2, off) != 2)
dev_ctl_word = 0;
 
-   off = pcie_cap_offset + DLB2_PCI_LNKCTL;
+   off = pcie_cap_offset + RTE_PCI_EXP_LNKCTL;
if (rte_pci_read_config(pdev, &lnk_word, 2, off) != 2)
lnk_word = 0;
 
-   off = pcie_cap_offset + DLB2_PCI_SLTCTL;
+   off = pcie_cap_offset + RTE_PCI_EXP_SLTCTL;
if (rte_pci_read_config(pdev, &slt_word, 2, off) != 2)
slt_word = 0;
 
-   off = pcie_cap_offset + DLB2_PCI_RTCTL;
+   off = pcie_cap_offset + RTE_PCI_EXP_RTCTL;
if (rte_pci_read_config(pdev, &rt_ctl_word, 2, off) != 2)
rt_ctl_word = 0;
 
-   off = pcie_cap_offset + DLB2_PCI_EXP_DEVCTL2;
+   off = pcie_cap_offset + RTE_PCI_EXP_DEVCTL2;
if (rte_pci_read_config(pdev, &dev_ctl2_word, 2, off) != 2)
dev_ctl2_word = 0;
 
-   off = pcie_cap_offset + DLB2_PCI_LNKCTL2;
+   off = pcie_cap_offset + RTE_PCI_EXP_LNKCTL2;
if (rte_pci_read_config(pdev, &lnk_word2, 2, off) != 2)
lnk_word2 = 0;
 
-   off = pcie_cap_offset + DLB2_PCI_SLTCTL2;
+   off = pcie_cap_offset + RTE_PCI_EXP_SLTCTL2;
if (rte_pci_read_config(pdev, &slt_word2, 2, off) != 2)
slt_word2 = 0;
 
@@ -296,7 +286,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
for (wait_count = 0; wait_count < 4; wait_count++) {
int sleep_time;
 
-   off = pcie_cap_offset + DLB2_PCI_EXP_DEVSTA;
+   off = pcie_cap_offset + RTE_PCI_EXP_DEVSTA;
ret = rte_pci_read_config(pdev, &devsta_busy_word, 2, off);
if (ret != 2) {
DLB2_LOG_ERR("[%s()] failed to read the pci device 
status\n",
@@ -304,7 +294,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
return ret;
}
 
-   if (!(devsta_busy_word & DLB2_PCI_EXP_DEVSTA_TRPND))
+   if (!(devsta_busy_word & RTE_PCI_EXP_DEVSTA_TRPND))
break;
 
sleep_time = (1 << (wait_count)) * 100;
@@ -325,7 +315,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
return ret;
}
 
-   devctl_word |= DLB2_PCI_EXP_DEVCTL_BCR_FLR;
+   devctl_word |= RTE_PCI_EXP_DEVCTL_BCR_FLR;
 
ret = rte_pci_write_config(pdev, &devctl_word, 2, off);
if (ret != 2) {
@@ -347,7 +337,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
return ret;
}
 
-   off = pcie_cap_offset + DLB2_PCI_LNKCTL;
+   off = pcie_cap_offset + RTE_PCI_EXP_LNKCTL;
ret = rte_pci_write_config(pdev, &lnk_word, 2, off);
if (ret != 2) {
DLB2_LOG_ERR("[%s()] failed to write the pcie config 
space at offset %d\n",
@@ -355,7 +345,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
return ret;
}
 
-   off = pcie_cap_offset + DLB2_PCI_SLTCTL;
+   off = pcie_cap_offset + RTE_PCI_EXP_SLTCTL;
ret = rte_pci_write_config(pdev, &slt_word, 2, off);
if (ret != 2) {
DLB2_LOG_ERR("[%s()] failed to write the pcie config 
space at offset %d\n",
@@ -363,7 +353,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
return ret;
}
 
-   off = pcie_cap_offset + DLB2_PCI_RTCTL;
+   off = pcie_cap_offset + RTE_PCI_EXP_RTCTL;
ret = rte_pci_write_config(pdev, &rt_ctl_word, 2, off);
if (ret != 2) {
DLB2_LOG_ERR("[%s()] failed to write the pcie config 
space at offset %d\n",
@@ -371,7 +361,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
return ret;

[PATCH v2 11/15] pci: define some extended capability constants

[David Marchand]

Define some PCI extended capability constants and use them in existing
drivers.

Signed-off-by: David Marchand 
Acked-by: Bruce Richardson 
---
 drivers/event/dlb2/pf/dlb2_main.c | 7 ++-
 lib/pci/rte_pci.h | 4 +++-
 2 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/event/dlb2/pf/dlb2_main.c 
b/drivers/event/dlb2/pf/dlb2_main.c
index 8d960edef6..29e3001627 100644
--- a/drivers/event/dlb2/pf/dlb2_main.c
+++ b/drivers/event/dlb2/pf/dlb2_main.c
@@ -27,9 +27,6 @@
 #define NO_OWNER_VF 0  /* PF ONLY! */
 #define NOT_VF_REQ false /* PF ONLY! */
 
-#define DLB2_PCI_EXT_CAP_ID_PRI   0x13
-#define DLB2_PCI_EXT_CAP_ID_ACS   0xD
-
 #define DLB2_PCI_PRI_CTRL_ENABLE 0x1
 #define DLB2_PCI_PRI_ALLOC_REQ   0xC
 #define DLB2_PCI_PRI_CTRL0x4
@@ -263,7 +260,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
if (rte_pci_read_config(pdev, &slt_word2, 2, off) != 2)
slt_word2 = 0;
 
-   off = DLB2_PCI_EXT_CAP_ID_PRI;
+   off = RTE_PCI_EXT_CAP_ID_PRI;
pri_cap_offset = rte_pci_find_ext_capability(pdev, off);
 
if (pri_cap_offset >= 0) {
@@ -490,7 +487,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
}
}
 
-   off = DLB2_PCI_EXT_CAP_ID_ACS;
+   off = RTE_PCI_EXT_CAP_ID_ACS;
acs_cap_offset = rte_pci_find_ext_capability(pdev, off);
 
if (acs_cap_offset >= 0) {
diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
index a82f073a7d..d2f7a96f17 100644
--- a/lib/pci/rte_pci.h
+++ b/lib/pci/rte_pci.h
@@ -97,9 +97,11 @@ extern "C" {
 
 #define RTE_PCI_EXT_CAP_ID_ERR 0x01/* Advanced Error Reporting */
 #define RTE_PCI_EXT_CAP_ID_DSN 0x03/* Device Serial Number */
+#define RTE_PCI_EXT_CAP_ID_ACS 0x0d/* Access Control Services */
 #define RTE_PCI_EXT_CAP_ID_SRIOV   0x10/* SR-IOV*/
+#define RTE_PCI_EXT_CAP_ID_PRI 0x13/* Page Request Interface */
 
-/* Single Root I/O Virtualization */
+/* Single Root I/O Virtualization (RTE_PCI_EXT_CAP_ID_SRIOV) */
 #define RTE_PCI_SRIOV_CAP  0x04/* SR-IOV Capabilities */
 #define RTE_PCI_SRIOV_CTRL 0x08/* SR-IOV Control */
 #define RTE_PCI_SRIOV_INITIAL_VF   0x0c/* Initial VFs */
-- 
2.41.0

[PATCH v2 12/15] pci: define some ACS constants

[David Marchand]

Define some PCI ACS extended feature constants and use them in existing
drivers.

Signed-off-by: David Marchand 
Acked-by: Bruce Richardson 
---
 drivers/event/dlb2/pf/dlb2_main.c | 23 ---
 lib/pci/rte_pci.h |  9 +
 2 files changed, 17 insertions(+), 15 deletions(-)

diff --git a/drivers/event/dlb2/pf/dlb2_main.c 
b/drivers/event/dlb2/pf/dlb2_main.c
index 29e3001627..8e729d1964 100644
--- a/drivers/event/dlb2/pf/dlb2_main.c
+++ b/drivers/event/dlb2/pf/dlb2_main.c
@@ -33,13 +33,6 @@
 #define DLB2_PCI_ERR_ROOT_STATUS 0x30
 #define DLB2_PCI_ERR_COR_STATUS  0x10
 #define DLB2_PCI_ERR_UNCOR_STATUS0x4
-#define DLB2_PCI_ACS_CAP 0x4
-#define DLB2_PCI_ACS_CTRL0x6
-#define DLB2_PCI_ACS_SV  0x1
-#define DLB2_PCI_ACS_RR  0x4
-#define DLB2_PCI_ACS_CR  0x8
-#define DLB2_PCI_ACS_UF  0x10
-#define DLB2_PCI_ACS_EC  0x20
 
 static int
 dlb2_pf_init_driver_state(struct dlb2_dev *dlb2_dev)
@@ -492,16 +485,16 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
 
if (acs_cap_offset >= 0) {
uint16_t acs_cap, acs_ctrl, acs_mask;
-   off = acs_cap_offset + DLB2_PCI_ACS_CAP;
+   off = acs_cap_offset + RTE_PCI_ACS_CAP;
if (rte_pci_read_config(pdev, &acs_cap, 2, off) != 2)
acs_cap = 0;
 
-   off = acs_cap_offset + DLB2_PCI_ACS_CTRL;
+   off = acs_cap_offset + RTE_PCI_ACS_CTRL;
if (rte_pci_read_config(pdev, &acs_ctrl, 2, off) != 2)
acs_ctrl = 0;
 
-   acs_mask = DLB2_PCI_ACS_SV | DLB2_PCI_ACS_RR;
-   acs_mask |= (DLB2_PCI_ACS_CR | DLB2_PCI_ACS_UF);
+   acs_mask = RTE_PCI_ACS_SV | RTE_PCI_ACS_RR;
+   acs_mask |= (RTE_PCI_ACS_CR | RTE_PCI_ACS_UF);
acs_ctrl |= (acs_cap & acs_mask);
 
ret = rte_pci_write_config(pdev, &acs_ctrl, 2, off);
@@ -511,15 +504,15 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
return ret;
}
 
-   off = acs_cap_offset + DLB2_PCI_ACS_CTRL;
+   off = acs_cap_offset + RTE_PCI_ACS_CTRL;
if (rte_pci_read_config(pdev, &acs_ctrl, 2, off) != 2)
acs_ctrl = 0;
 
-   acs_mask = DLB2_PCI_ACS_RR | DLB2_PCI_ACS_CR;
-   acs_mask |= DLB2_PCI_ACS_EC;
+   acs_mask = RTE_PCI_ACS_RR | RTE_PCI_ACS_CR;
+   acs_mask |= RTE_PCI_ACS_EC;
acs_ctrl &= ~acs_mask;
 
-   off = acs_cap_offset + DLB2_PCI_ACS_CTRL;
+   off = acs_cap_offset + RTE_PCI_ACS_CTRL;
ret = rte_pci_write_config(pdev, &acs_ctrl, 2, off);
if (ret != 2) {
DLB2_LOG_ERR("[%s()] failed to write the pcie config 
space at offset %d\n",
diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
index d2f7a96f17..a385285c94 100644
--- a/lib/pci/rte_pci.h
+++ b/lib/pci/rte_pci.h
@@ -101,6 +101,15 @@ extern "C" {
 #define RTE_PCI_EXT_CAP_ID_SRIOV   0x10/* SR-IOV*/
 #define RTE_PCI_EXT_CAP_ID_PRI 0x13/* Page Request Interface */
 
+/* Access Control Service (RTE_PCI_EXT_CAP_ID_ACS) */
+#define RTE_PCI_ACS_CAP0x04/* ACS Capability 
Register */
+#define RTE_PCI_ACS_CTRL   0x06/* ACS Control Register */
+#define RTE_PCI_ACS_SV 0x0001  /* Source Validation */
+#define RTE_PCI_ACS_RR 0x0004  /* P2P Request Redirect */
+#define RTE_PCI_ACS_CR 0x0008  /* P2P Completion Redirect */
+#define RTE_PCI_ACS_UF 0x0010  /* Upstream Forwarding */
+#define RTE_PCI_ACS_EC 0x0020  /* P2P Egress Control */
+
 /* Single Root I/O Virtualization (RTE_PCI_EXT_CAP_ID_SRIOV) */
 #define RTE_PCI_SRIOV_CAP  0x04/* SR-IOV Capabilities */
 #define RTE_PCI_SRIOV_CTRL 0x08/* SR-IOV Control */
-- 
2.41.0

[PATCH v2 13/15] pci: define some PRI constants

[David Marchand]

Define some PCI PRI extended feature constants and use them in existing
drivers.

Signed-off-by: David Marchand 
Acked-by: Bruce Richardson 
---
 drivers/event/dlb2/pf/dlb2_main.c | 11 ---
 lib/pci/rte_pci.h |  5 +
 2 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/event/dlb2/pf/dlb2_main.c 
b/drivers/event/dlb2/pf/dlb2_main.c
index 8e729d1964..187a356c24 100644
--- a/drivers/event/dlb2/pf/dlb2_main.c
+++ b/drivers/event/dlb2/pf/dlb2_main.c
@@ -27,9 +27,6 @@
 #define NO_OWNER_VF 0  /* PF ONLY! */
 #define NOT_VF_REQ false /* PF ONLY! */
 
-#define DLB2_PCI_PRI_CTRL_ENABLE 0x1
-#define DLB2_PCI_PRI_ALLOC_REQ   0xC
-#define DLB2_PCI_PRI_CTRL0x4
 #define DLB2_PCI_ERR_ROOT_STATUS 0x30
 #define DLB2_PCI_ERR_COR_STATUS  0x10
 #define DLB2_PCI_ERR_UNCOR_STATUS0x4
@@ -257,7 +254,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
pri_cap_offset = rte_pci_find_ext_capability(pdev, off);
 
if (pri_cap_offset >= 0) {
-   off = pri_cap_offset + DLB2_PCI_PRI_ALLOC_REQ;
+   off = pri_cap_offset + RTE_PCI_PRI_ALLOC_REQ;
if (rte_pci_read_config(pdev, &pri_reqs_dword, 4, off) != 4)
pri_reqs_dword = 0;
}
@@ -377,9 +374,9 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
}
 
if (pri_cap_offset >= 0) {
-   pri_ctrl_word = DLB2_PCI_PRI_CTRL_ENABLE;
+   pri_ctrl_word = RTE_PCI_PRI_CTRL_ENABLE;
 
-   off = pri_cap_offset + DLB2_PCI_PRI_ALLOC_REQ;
+   off = pri_cap_offset + RTE_PCI_PRI_ALLOC_REQ;
ret = rte_pci_write_config(pdev, &pri_reqs_dword, 4, off);
if (ret != 4) {
DLB2_LOG_ERR("[%s()] failed to write the pcie config 
space at offset %d\n",
@@ -387,7 +384,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
return ret;
}
 
-   off = pri_cap_offset + DLB2_PCI_PRI_CTRL;
+   off = pri_cap_offset + RTE_PCI_PRI_CTRL;
ret = rte_pci_write_config(pdev, &pri_ctrl_word, 2, off);
if (ret != 2) {
DLB2_LOG_ERR("[%s()] failed to write the pcie config 
space at offset %d\n",
diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
index a385285c94..b23671a2cf 100644
--- a/lib/pci/rte_pci.h
+++ b/lib/pci/rte_pci.h
@@ -122,6 +122,11 @@ extern "C" {
 #define RTE_PCI_SRIOV_VF_DID   0x1a/* VF Device ID */
 #define RTE_PCI_SRIOV_SUP_PGSIZE   0x1c/* Supported Page Sizes */
 
+/* Page Request Interface (RTE_PCI_EXT_CAP_ID_PRI) */
+#define RTE_PCI_PRI_CTRL   0x04/* PRI control register */
+#define RTE_PCI_PRI_CTRL_ENABLE0x0001  /* Enable */
+#define RTE_PCI_PRI_ALLOC_REQ  0x0c/* PRI max reqs allowed */
+
 /** Formatting string for PCI device identifier: Ex: :00:01.0 */
 #define PCI_PRI_FMT "%.4" PRIx32 ":%.2" PRIx8 ":%.2" PRIx8 ".%" PRIx8
 #define PCI_PRI_STR_SIZE sizeof(":XX:XX.X")
-- 
2.41.0

[PATCH v2 14/15] pci: define some AER constants

[David Marchand]

Define some Advanced Error Reporting constants and use them in existing
drivers.

Signed-off-by: David Marchand 
Acked-by: Bruce Richardson 
---
 drivers/event/dlb2/pf/dlb2_main.c | 10 +++---
 lib/pci/rte_pci.h |  5 +
 2 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/event/dlb2/pf/dlb2_main.c 
b/drivers/event/dlb2/pf/dlb2_main.c
index 187a356c24..aa03e4c311 100644
--- a/drivers/event/dlb2/pf/dlb2_main.c
+++ b/drivers/event/dlb2/pf/dlb2_main.c
@@ -27,10 +27,6 @@
 #define NO_OWNER_VF 0  /* PF ONLY! */
 #define NOT_VF_REQ false /* PF ONLY! */
 
-#define DLB2_PCI_ERR_ROOT_STATUS 0x30
-#define DLB2_PCI_ERR_COR_STATUS  0x10
-#define DLB2_PCI_ERR_UNCOR_STATUS0x4
-
 static int
 dlb2_pf_init_driver_state(struct dlb2_dev *dlb2_dev)
 {
@@ -399,7 +395,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
if (err_cap_offset >= 0) {
uint32_t tmp;
 
-   off = err_cap_offset + DLB2_PCI_ERR_ROOT_STATUS;
+   off = err_cap_offset + RTE_PCI_ERR_ROOT_STATUS;
if (rte_pci_read_config(pdev, &tmp, 4, off) != 4)
tmp = 0;
 
@@ -410,7 +406,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
return ret;
}
 
-   off = err_cap_offset + DLB2_PCI_ERR_COR_STATUS;
+   off = err_cap_offset + RTE_PCI_ERR_COR_STATUS;
if (rte_pci_read_config(pdev, &tmp, 4, off) != 4)
tmp = 0;
 
@@ -421,7 +417,7 @@ dlb2_pf_reset(struct dlb2_dev *dlb2_dev)
return ret;
}
 
-   off = err_cap_offset + DLB2_PCI_ERR_UNCOR_STATUS;
+   off = err_cap_offset + RTE_PCI_ERR_UNCOR_STATUS;
if (rte_pci_read_config(pdev, &tmp, 4, off) != 4)
tmp = 0;
 
diff --git a/lib/pci/rte_pci.h b/lib/pci/rte_pci.h
index b23671a2cf..dbeefb315f 100644
--- a/lib/pci/rte_pci.h
+++ b/lib/pci/rte_pci.h
@@ -101,6 +101,11 @@ extern "C" {
 #define RTE_PCI_EXT_CAP_ID_SRIOV   0x10/* SR-IOV*/
 #define RTE_PCI_EXT_CAP_ID_PRI 0x13/* Page Request Interface */
 
+/* Advanced Error Reporting (RTE_PCI_EXT_CAP_ID_ERR) */
+#define RTE_PCI_ERR_UNCOR_STATUS   0x04/* Uncorrectable Error Status */
+#define RTE_PCI_ERR_COR_STATUS 0x10/* Correctable Error Status */
+#define RTE_PCI_ERR_ROOT_STATUS0x30
+
 /* Access Control Service (RTE_PCI_EXT_CAP_ID_ACS) */
 #define RTE_PCI_ACS_CAP0x04/* ACS Capability 
Register */
 #define RTE_PCI_ACS_CTRL   0x06/* ACS Control Register */
-- 
2.41.0

[PATCH v2 15/15] devtools: forbid inclusion of Linux header for PCI

[David Marchand]

Refrain from including Linux-only pci_regs.h header.
Instead, prefer our own definitions from the pci library.

Signed-off-by: David Marchand 
Acked-by: Bruce Richardson 
---
 devtools/checkpatches.sh | 8 
 1 file changed, 8 insertions(+)

diff --git a/devtools/checkpatches.sh b/devtools/checkpatches.sh
index 43f5e36a18..5d3c5aaba5 100755
--- a/devtools/checkpatches.sh
+++ b/devtools/checkpatches.sh
@@ -127,6 +127,14 @@ check_forbidden_additions() { # 
-f $(dirname $(readlink -f $0))/check-forbidden-tokens.awk \
"$1" || res=1
 
+   # forbid inclusion of Linux header for PCI constants
+   awk -v FOLDERS="lib drivers app examples" \
+   -v EXPRESSIONS='include.*linux/pci_regs\\.h' \
+   -v RET_ON_FAIL=1 \
+   -v MESSAGE='Using linux/pci_regs.h, prefer rte_pci.h' \
+   -f $(dirname $(readlink -f $0))/check-forbidden-tokens.awk \
+   "$1" || res=1
+
# forbid use of experimental build flag except in examples
awk -v FOLDERS='lib drivers app' \
-v EXPRESSIONS='-DALLOW_EXPERIMENTAL_API 
allow_experimental_apis' \
-- 
2.41.0

RE: [PATCH] net/iavf: fix checksum offloading

[Zhang, Qi Z]

> -Original Message-
> From: David Marchand 
> Sent: Friday, August 18, 2023 5:04 PM
> To: dev@dpdk.org
> Cc: echau...@redhat.com; m...@redhat.com; sta...@dpdk.org; Wu, Jingjing
> ; Xing, Beilei ; Doherty, Declan
> ; Sinha, Abhijit ; Nicolau,
> Radu 
> Subject: [PATCH] net/iavf: fix checksum offloading
> 
> The only presence of RTE_MBUF_F_TX_IPV4 can't be used as an indicator that
> a checksum offload has been requested by an application.

According to current implementation, actually the only presence of 
RTE_MBUF_F_TX_IPV4 will cause IIPT = 10b, this scenario corresponds to an 'IPv4 
packet with no IP checksum offload,' according to datasheet.
So, I assume in this situation, the PMD  continues to operate under the 
assumption that the application has not requested checksum offloading.

Could you share more insight what is the failure,  maybe we can perform a more 
comprehensive investigation?

Thanks
Qi



> Check that RTE_MBUF_F_TX_IP_CKSUM or others flags have been set. 
> 
> Fixes: 1e728b01120c ("net/iavf: rework Tx path")
> Cc: sta...@dpdk.org
> 
> Signed-off-by: David Marchand 
> ---
>  drivers/net/iavf/iavf_rxtx.c | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/net/iavf/iavf_rxtx.c b/drivers/net/iavf/iavf_rxtx.c index
> f7df4665d1..b9e2879764 100644
> --- a/drivers/net/iavf/iavf_rxtx.c
> +++ b/drivers/net/iavf/iavf_rxtx.c
> @@ -2652,6 +2652,9 @@ iavf_build_data_desc_cmd_offset_fields(volatile
> uint64_t *qw1,
>   offset |= (m->l2_len >> 1)
>   << IAVF_TX_DESC_LENGTH_MACLEN_SHIFT;
> 
> + if ((m->ol_flags & IAVF_TX_CKSUM_OFFLOAD_MASK) == 0)
> + goto skip_cksum;
> +
>   /* Enable L3 checksum offloading inner */
>   if (m->ol_flags & RTE_MBUF_F_TX_IP_CKSUM) {
>   if (m->ol_flags & RTE_MBUF_F_TX_IPV4) { @@ -2702,6
> +2705,7 @@ iavf_build_data_desc_cmd_offset_fields(volatile uint64_t *qw1,
>   break;
>   }
> 
> +skip_cksum:
>   *qw1 = rte_cpu_to_le_64uint64_t)command <<
>   IAVF_TXD_DATA_QW1_CMD_SHIFT) &
> IAVF_TXD_DATA_QW1_CMD_MASK) |
>   (((uint64_t)offset << IAVF_TXD_DATA_QW1_OFFSET_SHIFT) &
> --
> 2.41.0

Re: 21.11.5 patches review and test

[Kevin Traynor]

On 21/08/2023 11:50, Mcnamara, John wrote:




-Original Message-
From: Kevin Traynor 

Any updates from Intel validation team ? The release is due tomorrow
(22nd) but I can postpone it if you need a few more days to complete
testing.


Hi,

We have had some attritions on the Intel validation team so some of the 
co-ordination is behind schedule. Let me look into the current status.



ok, thanks John. No problem, I'll hold on the release and please let me 
know when there is some news or an ETA.


thanks,
Kevin.


John

RE: [RFC] ring: further performance improvements with C11

[Konstantin Ananyev]

> > > > > For improved performance over the current C11 based ring
> > > > > implementation following changes were made.
> > > > > (1) Replace tail store with RELEASE semantics in
> > > > > __rte_ring_update_tail with a RELEASE fence. Replace load of the
> > > > > tail with ACQUIRE semantics in __rte_ring_move_prod_head and
> > > > > __rte_ring_move_cons_head with ACQUIRE fences.
> > > > > (2) Remove ACQUIRE fences between load of the old_head and load of
> > > > > the cons_tail in __rte_ring_move_prod_head and
> > __rte_ring_move_cons_head.
> > > > > These two fences are not required for the safety of the ring library.
> > > >
> > > > Hmm... with these changes, aren't we re-introducing the old bug
> > > > fixed by this
> > > > commit:
> > >
> > > Cover letter explains why this barrier does not solve what it intends
> > > to solve and Why it should not matter.
> > > https://mails.dpdk.org/archives/dev/2023-June/270874.html
> >
> > Ok, let's consider the case similar to yours (i), but when r->prod.head was
> > moved for distance greater then r->capacity.
> > To be more specific, let' start with the same initial state:
> > capacity = 32
> > r->cons.tail = 5
> > r->cons.head = 5
> > r->prod.head = 10
> > r-prod.tail = 10
> >
> > time 0,  thread1:
> > /* re-ordered load */
> >  const_tail = r->cons.tail; //= 5
> >
> > Now, thread1 was stalled for a bit, meanwhile there were few
> What exactly do you mean by 'stalled'? 

I mean: CPU pipeline the thread was running on get stalled by whatever reasons -
memory load latency, tlb miss, etc.

> If you are meaning, thread is preempted,
> then the ring algorithm is not designed for it. There
> are restrictions mentioned in [1].

I am not talking about SW thread preemption here.
With the example I provided, I think it is clear that the problem can happen 
even
with 'ideal' conditions: each thread runs non-preempted on a separate core.

> However, we do need to handle the re-ordering case.

To be clear: for me right now this patch is bogus,  it has to be either 
reworked or abandoned.

> 
> [1] 
> https://doc.dpdk.org/guides/prog_guide/env_abstraction_layer.html#known-issues
> 
> > enqueue/dequeus done by other threads, so current state of the ring:
> > r->cons.tail = 105
> > r->cons.head = 105
> > r->prod.head = 110
> > r-prod.tail = 110
> >
> > time 1,  thread1:
> > old_head =  r->prod.head; // 110
> > *free_entries = (capacity + cons_tail - old_head); // = (uint32_t)(32 + 5 - 
> > 110)
> > ==  (uint32_t)-73 == 4294967223
> >

> >  So, free_entries value is way too big, and that comparison:
> >
> > if (unlikely(n > *free_entries))
> >
> > might provide wrong result.
> >
> > So I still think we do need some sort of _read_fence_ between these two 
> > loads.
> > As I said before, that looks exactly like the old bug, fixed a while ago:
> > http://git.dpdk.org/dpdk/commit/?id=9bc2cbb007c0a3335c5582357ae9f6d37
> > ea0b654
> > but now re-introduced for C11 case.
> Agree that the re-ordering case should be handled.

Either handled, or simply not allowed. 

> I am thinking a check (*free_entries > capacity) and restarting the loop might
> suffice (without the barrier)?

I thought about the same thing, and at first glance it seems workable in 
principle.
Though I am still hesitate to remove ordering completely here:
As both compiler and CPU reordering will be possible, it will probably 
introduce a possibility of sort-of ABA problem:
old cons.tail is read at a very early stage
after that cur cons.tail value get wrapped around 2^32 and is now less then old 
cons.tail.
Then we read prod.head
So:
(invalid_free_ent=capacity + cons.tail._old - prod.head) <= capacity
and
(valid_free_ent=capacity + cons.tail._cur - prod.head) <= capacity

Are both true, but invalid > valid and we overestimate number of free entries.

In majority of cases possibility of such situation is negligible.
But for huge values for 'capacity' it will grow.

Can I ask a bit different question:  as I remember this series started as an 
attempt
to improve C11 ring enqueue/dequeue implementation.
Though looking at non-C11 one, there also exist a read-fence between these two 
loads:
https://elixir.bootlin.com/dpdk/v23.07/source/lib/ring/rte_ring_generic_pvt.h#L73
Which makes me - might be it is not actual read-ordering that causes slowdown 
of C11 version.
Did anyone try to compare generated  code for both cases, wonder what is the 
difference?

Konstantin

> >
> > > >
> > > > commit 9bc2cbb007c0a3335c5582357ae9f6d37ea0b654
> > > > Author: Jia He 
> > > > Date:   Fri Nov 10 03:30:42 2017 +
> > > >
> > > > ring: guarantee load/load order in enqueue and dequeue
> > > >
> > > > We watched a rte panic of mbuf_autotest in our qualcomm arm64 server
> > > > (Amberwing).
> > > >
> > > > Root cause:
> > > > In __rte_ring_move_cons_head()
> > > > ...
> > > > do {
> > > > /* Restore n as it may change every loop */
> > > > n = max;
> > > 

Re: [PATCH v3 1/8] common/cnxk: use unique name for DPI memzone

[Jerin Jacob]

On Fri, Aug 18, 2023 at 2:32 PM Amit Prakash Shukla
 wrote:
>
> roc_dpi was using vfid as part of name for memzone allocation.
> This led to memzone allocation failure in case of multiple
> physical functions. vfid is not unique by itself since multiple
> physical functions can have the same virtual function indices.
> So use complete DBDF as part of memzone name to make it unique.
>
> Fixes: b6e395692b6d ("common/cnxk: add DPI DMA support")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Radha Mohan Chintakuntla 

> ---
> v2:
> - Fix for bugs observed in v1.
> - Squashed few commits.
>
> v3:
> - Resolved review suggestions.
> - Code improvement.


Please fix below issues

Missing 'Fixes' tag:
dma/cnxk: fix last index return value

Invalid patch(es) found - checked 8 patches
check-git-log failed

### [PATCH] common/cnxk: use unique name for DPI memzone

ERROR:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch
author 'Amit Prakash Shukla '

total: 1 errors, 0 warnings, 13 lines checked

### [PATCH] dma/cnxk: add DMA devops for all models of cn10xxx

ERROR:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch
author 'Amit Prakash Shukla '

total: 1 errors, 0 warnings, 9 lines checked

6/8 valid patches

RE: [EXT] Re: [PATCH v5 1/1] devtools: add tracepoint check in checkpatch

[Ankur Dwivedi]

>-Original Message-
>From: Stephen Hemminger 
>Sent: Thursday, May 18, 2023 9:04 PM
>To: Ankur Dwivedi 
>Cc: Thomas Monjalon ; Jerin Jacob Kollanukkaran
>; dev@dpdk.org
>Subject: [EXT] Re: [PATCH v5 1/1] devtools: add tracepoint check in checkpatch
>
>External Email
>
>--
>On Thu, 18 May 2023 13:45:29 +
>Ankur Dwivedi  wrote:
>
>> >-Original Message-
>> >From: Ankur Dwivedi 
>> >Sent: Tuesday, March 7, 2023 5:35 PM
>> >To: dev@dpdk.org
>> >Cc: tho...@monjalon.net; Jerin Jacob Kollanukkaran
>> >; Ankur Dwivedi 
>> >Subject: [PATCH v5 1/1] devtools: add tracepoint check in checkpatch
>> >
>> >This patch adds a validation in checkpatch tool, to check if a
>> >tracepoint is present in any new function added in cryptodev, ethdev,
>> >eventdev and mempool library.
>> >
>> >In this patch, the build_map_changes function is copied from
>> >check-symbol- change.sh to check-tracepoint.sh. The
>> >check-tracepoint.sh script uses build_map_changes function to create a
>map of functions.
>> >In the map, the newly added functions, added in the experimental
>> >section are identified and their definition are checked for the
>> >presence of tracepoint. The checkpatch return error if the tracepoint is not
>present.
>> >
>> >For functions for which trace is not needed, they can be added to
>> >devtools/trace-skiplist.txt file. The above tracepoint check will be
>> >skipped for them.
>> >
>> >Signed-off-by: Ankur Dwivedi 
>
>Given the amount of string processing, it would be more readable in python.
>That is not a show stopper, just a suggestion.

Hi Thomas,

Please let me know if the shell script in this patch is fine or would a python 
implementation would be more preferable.

Regards,
Ankur

[PATCH v2] common/mlx5: replace use of PMD logtype

[Stephen Hemminger]

The goal to eliminate the generic PMD logtype.
One place it is used unnecessarily is in the mlx5 common code.
Change the one RTE_LOG() call here to use the same macro
as other log messages in same file.

Fixes: 9c410b28b27a ("common/mlx5: refactor HCA attributes query")
Cc: viachesl...@nvidia.com
Signed-off-by: Stephen Hemminger 
---
 drivers/common/mlx5/mlx5_devx_cmds.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c 
b/drivers/common/mlx5/mlx5_devx_cmds.c
index 66a77159a031..9db0b2ac8983 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -543,7 +543,7 @@ mlx5_devx_cmd_query_hca_vdpa_attr(void *ctx,
MLX5_GET_HCA_CAP_OP_MOD_VDPA_EMULATION |
MLX5_HCA_CAP_OPMOD_GET_CUR);
if (!hcattr) {
-   RTE_LOG(DEBUG, PMD, "Failed to query devx VDPA capabilities");
+   DRV_LOG(DEBUG, "Failed to query devx VDPA capabilities");
vdpa_attr->valid = 0;
} else {
vdpa_attr->valid = 1;
-- 
2.39.2

Re: [PATCH v5 04/10] app/test: build using per-file dependency matrix

[Patrick Robb]

Hi David,

Responding to your Slack request about merging Bruce's patch ahead of yours
here so there is more visibility.

That is fine, but as you point out it will mean a temporary loss of test
coverage, as it will disable arm unit testing until either 1. your patch
fixing the flags test hits mainline and we can re-enable testing without
failing everyone's patchseries or 2. Bruce's RFC ([RFC PATCH] app/test: add
support for skipping tests) is implemented and made a part of mainline. I
agree with you this is the best thing to do so as to not hold up Bruce and
his series.

On Mon, Aug 21, 2023 at 3:13 AM David Marchand 
wrote:

> On Sat, Aug 19, 2023 at 1:26 AM Patrick Robb  wrote:
> > On Fri, Aug 18, 2023 at 6:33 PM Patrick Robb  wrote:
> >>
> >>
> >> For your patch, it looks like there are actually more eal flags test
> failures:
> http://mails.dpdk.org/archives/test-report/2023-August/444170.html. In
> any case, for debugging purposes, I will do a run with the
> eal_flags_file_prefix_autotest also included and send you the meson test
> detail log on slack.
> >>
> > Quick follow up - I see with your patch it does pass on
> eal_flags_file_prefix_autotest, but as stated fails some others now. The
> detailed slack logs are DM'ed to you on slack. Thanks!
>
> Thanks for the report.
> Interestingly those failures pointed out that I broke secondary
> processes when no port gets initialised in the primary process.
>
> I'll send a v3.
>
>
> --
> David Marchand
>
>

-- 

Patrick Robb

Technical Service Manager

UNH InterOperability Laboratory

21 Madbury Rd, Suite 100, Durham, NH 03824

www.iol.unh.edu

[PATCH v2] crypto/ipsec_mb: add digest encrypted feature

[Brian Dooley]

AESNI_MB PMD does not support Digest Encrypted. This patch adds a check and
support for this feature.

Signed-off-by: Brian Dooley 
---
v2:
Fixed CHECKPATCH warning
---
 drivers/crypto/ipsec_mb/pmd_aesni_mb.c | 107 +++--
 1 file changed, 102 insertions(+), 5 deletions(-)

diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c 
b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
index 9e298023d7..66f3c82e80 100644
--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c
@@ -1438,6 +1438,54 @@ set_gcm_job(IMB_MGR *mb_mgr, IMB_JOB *job, const uint8_t 
sgl,
return 0;
 }
 
+/** Check if conditions are met for digest-appended operations */
+static uint8_t *
+aesni_mb_digest_appended_in_src(struct rte_crypto_op *op, IMB_JOB *job,
+   uint32_t oop)
+{
+   unsigned int auth_size, cipher_size;
+   uint8_t *end_cipher;
+   uint8_t *start_cipher;
+
+   if (job->cipher_mode == IMB_CIPHER_NULL)
+   return NULL;
+
+   if (job->cipher_mode == IMB_CIPHER_ZUC_EEA3 ||
+   job->cipher_mode == IMB_CIPHER_SNOW3G_UEA2_BITLEN ||
+   job->cipher_mode == IMB_CIPHER_KASUMI_UEA1_BITLEN) {
+   cipher_size = (op->sym->cipher.data.offset >> 3) +
+   (op->sym->cipher.data.length >> 3);
+   } else {
+   cipher_size = (op->sym->cipher.data.offset) +
+   (op->sym->cipher.data.length);
+   }
+   if (job->hash_alg == IMB_AUTH_ZUC_EIA3_BITLEN ||
+   job->hash_alg == IMB_AUTH_SNOW3G_UIA2_BITLEN ||
+   job->hash_alg == IMB_AUTH_KASUMI_UIA1 ||
+   job->hash_alg == IMB_AUTH_ZUC256_EIA3_BITLEN) {
+   auth_size = (op->sym->auth.data.offset >> 3) +
+   (op->sym->auth.data.length >> 3);
+   } else {
+   auth_size = (op->sym->auth.data.offset) +
+   (op->sym->auth.data.length);
+   }
+
+   if (!oop) {
+   end_cipher = rte_pktmbuf_mtod_offset(op->sym->m_src, uint8_t *, 
cipher_size);
+   start_cipher = rte_pktmbuf_mtod(op->sym->m_src, uint8_t *);
+   } else {
+   end_cipher = rte_pktmbuf_mtod_offset(op->sym->m_dst, uint8_t *, 
cipher_size);
+   start_cipher = rte_pktmbuf_mtod(op->sym->m_dst, uint8_t *);
+   }
+
+   if (start_cipher < op->sym->auth.digest.data &&
+   op->sym->auth.digest.data < end_cipher) {
+   return rte_pktmbuf_mtod_offset(op->sym->m_src, uint8_t *, 
auth_size);
+   } else {
+   return NULL;
+   }
+}
+
 /**
  * Process a crypto operation and complete a IMB_JOB job structure for
  * submission to the multi buffer library for processing.
@@ -1580,9 +1628,12 @@ set_mb_job_params(IMB_JOB *job, struct ipsec_mb_qp *qp,
} else {
if (aead)
job->auth_tag_output = op->sym->aead.digest.data;
-   else
-   job->auth_tag_output = op->sym->auth.digest.data;
-
+   else {
+   job->auth_tag_output = 
aesni_mb_digest_appended_in_src(op, job, oop);
+   if (job->auth_tag_output == NULL) {
+   job->auth_tag_output = 
op->sym->auth.digest.data;
+   }
+   }
if (session->auth.req_digest_len !=
job->auth_tag_output_len_in_bytes) {
job->auth_tag_output =
@@ -1917,6 +1968,7 @@ post_process_mb_job(struct ipsec_mb_qp *qp, IMB_JOB *job)
struct aesni_mb_session *sess = NULL;
uint8_t *linear_buf = NULL;
int sgl = 0;
+   uint8_t oop = 0;
uint8_t is_docsis_sec = 0;
 
if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
@@ -1962,8 +2014,52 @@ post_process_mb_job(struct ipsec_mb_qp *qp, IMB_JOB *job)
op->sym->auth.digest.data,
sess->auth.req_digest_len,
&op->status);
-   } else
+   } else {
+   if (!op->sym->m_dst || op->sym->m_dst == 
op->sym->m_src) {
+   /* in-place operation */
+   oop = 0;
+   } else { /* out-of-place operation */
+   oop = 1;
+   }
+
+   if (op->sym->m_src->nb_segs == 1 && 
op->sym->m_dst != NULL
+   && !is_aead_algo(job->hash_alg, 
sess->template_job.cipher_mode) &&
+   aesni_mb_digest_appended_in_src(op, job, oop) 
!= NULL) {
+   unsigned int auth_size, cipher_size;
+   int unencrypted_bytes = 0;
+

RE: [EXT] Re: [PATCH v5 1/1] devtools: add tracepoint check in checkpatch

[Morten Brørup]

> From: Ankur Dwivedi [mailto:adwiv...@marvell.com]
> Sent: Monday, 21 August 2023 15.54
> 
> >From: Stephen Hemminger 
> >Sent: Thursday, May 18, 2023 9:04 PM
> >
> >--
> >On Thu, 18 May 2023 13:45:29 +
> >Ankur Dwivedi  wrote:
> >
> >> >From: Ankur Dwivedi 
> >> >Sent: Tuesday, March 7, 2023 5:35 PM
> >> >
> >> >This patch adds a validation in checkpatch tool, to check if a
> >> >tracepoint is present in any new function added in cryptodev,
> ethdev,
> >> >eventdev and mempool library.
> >> >
> >> >In this patch, the build_map_changes function is copied from
> >> >check-symbol- change.sh to check-tracepoint.sh. The
> >> >check-tracepoint.sh script uses build_map_changes function to create
> a
> >map of functions.
> >> >In the map, the newly added functions, added in the experimental
> >> >section are identified and their definition are checked for the
> >> >presence of tracepoint. The checkpatch return error if the
> tracepoint is not
> >present.
> >> >
> >> >For functions for which trace is not needed, they can be added to
> >> >devtools/trace-skiplist.txt file. The above tracepoint check will be
> >> >skipped for them.
> >> >
> >> >Signed-off-by: Ankur Dwivedi 
> >
> >Given the amount of string processing, it would be more readable in
> python.
> >That is not a show stopper, just a suggestion.
> 
> Hi Thomas,
> 
> Please let me know if the shell script in this patch is fine or would a
> python implementation would be more preferable.
> 
> Regards,
> Ankur

The bigger question is: Do we really want to change tracepoints in functions 
from opt-in to opt-out?

In my opinion, opt-in for trace is more appropriate.

Nonetheless, having a tool to check for tracepoint presence might still be 
useful for library reviewers and maintainers. And such a tool might be useful 
for any library, not just the few libraries suggested by this patch.

[PATCH v6] eventdev/eth_rx: add new adapter create API

[Naga Harish K S V]

Add new API "rte_event_eth_rx_adapter_create_ext_with_params()" for
creating Rx adapter instance. This API is similar to
rte_event_eth_rx_adapter_create_ext() with an additional input
argument for adapter configuration parameters of type
"struct rte_event_eth_rx_adapter_params".

Signed-off-by: Naga Harish K S V 
---
v2:
 * Fix warning
v3:
 * remove __rte_cold hint as per review comments
v4:
 * address review comments
v5:
 * Update release notes document
v6:
 * incorporate review comments
---
---
 app/test/test_event_eth_rx_adapter.c  | 87 +++
 .../prog_guide/event_ethernet_rx_adapter.rst  |  3 +
 doc/guides/rel_notes/release_23_11.rst|  5 ++
 lib/eventdev/rte_event_eth_rx_adapter.c   | 75 +++-
 lib/eventdev/rte_event_eth_rx_adapter.h   | 37 +++-
 lib/eventdev/version.map  |  3 +
 6 files changed, 187 insertions(+), 23 deletions(-)

diff --git a/app/test/test_event_eth_rx_adapter.c 
b/app/test/test_event_eth_rx_adapter.c
index 52d146f97c..2d5e197666 100644
--- a/app/test/test_event_eth_rx_adapter.c
+++ b/app/test/test_event_eth_rx_adapter.c
@@ -444,6 +444,91 @@ adapter_create_with_params(void)
return TEST_SUCCESS;
 }
 
+static int
+test_port_conf_cb(uint8_t id, uint8_t event_dev_id,
+ struct rte_event_eth_rx_adapter_conf *conf,
+ void *conf_arg)
+{
+   struct rte_event_port_conf *port_conf, def_port_conf = {0};
+   uint32_t started;
+   static int port_allocated;
+   static uint8_t port_id;
+   int ret;
+
+   if (port_allocated) {
+   conf->event_port_id = port_id;
+   conf->max_nb_rx = 128;
+   return 0;
+   }
+
+   RTE_SET_USED(id);
+
+   ret = rte_event_dev_attr_get(event_dev_id, RTE_EVENT_DEV_ATTR_STARTED,
+&started);
+   if (ret < 0)
+   return ret;
+
+   if (started)
+   rte_event_dev_stop(event_dev_id);
+
+   port_id = 1;
+
+   if (conf_arg != NULL)
+   port_conf = conf_arg;
+   else {
+   port_conf = &def_port_conf;
+   ret = rte_event_port_default_conf_get(event_dev_id, port_id,
+ port_conf);
+   if (ret < 0)
+   return ret;
+   }
+
+   ret = rte_event_port_setup(event_dev_id, port_id, port_conf);
+   if (ret < 0)
+   return ret;
+
+   conf->event_port_id = port_id;
+   conf->max_nb_rx = 128;
+
+   if (started)
+   rte_event_dev_start(event_dev_id);
+
+   /* Reuse this port number next time this is called */
+   port_allocated = 1;
+
+   return 0;
+}
+
+static int
+adapter_create_ext_with_params(void)
+{
+   int err;
+   struct rte_event_dev_info dev_info;
+   struct rte_event_eth_rx_adapter_params rxa_params;
+
+   err = rte_event_dev_info_get(TEST_DEV_ID, &dev_info);
+   TEST_ASSERT(err == 0, "Expected 0 got %d", err);
+
+   rxa_params.use_queue_event_buf = false;
+   rxa_params.event_buf_size = 0;
+
+   err = rte_event_eth_rx_adapter_create_ext_with_params(TEST_INST_ID,
+   TEST_DEV_ID, test_port_conf_cb, NULL, &rxa_params);
+   TEST_ASSERT(err == -EINVAL, "Expected -EINVAL got %d", err);
+
+   rxa_params.event_buf_size = 128;
+
+   err = rte_event_eth_rx_adapter_create_ext_with_params(TEST_INST_ID,
+   TEST_DEV_ID, test_port_conf_cb, NULL, &rxa_params);
+   TEST_ASSERT(err == 0, "Expected 0 got %d", err);
+
+   err = rte_event_eth_rx_adapter_create_ext_with_params(TEST_INST_ID,
+   TEST_DEV_ID, test_port_conf_cb, NULL, &rxa_params);
+   TEST_ASSERT(err == -EEXIST, "Expected -EEXIST got %d", err);
+
+   return TEST_SUCCESS;
+}
+
 static int
 adapter_queue_event_buf_test(void)
 {
@@ -1337,6 +1422,8 @@ static struct unit_test_suite event_eth_rx_tests = {
 adapter_pollq_instance_get),
TEST_CASE_ST(adapter_create, adapter_free,
 adapter_get_set_params),
+   TEST_CASE_ST(adapter_create_ext_with_params, adapter_free,
+adapter_start_stop),
TEST_CASES_END() /**< NULL terminate unit test array */
}
 };
diff --git a/doc/guides/prog_guide/event_ethernet_rx_adapter.rst 
b/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
index 7c5e73b9fd..2e68cca798 100644
--- a/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
+++ b/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
@@ -71,6 +71,9 @@ set to true. The function is passed the event device to be 
associated with
 the adapter and port configuration for the adapter to setup an event port
 if the adapter needs to use a service function.
 
+If the application desires to control both the event port allocation and event
+buffer size, ``rte_event_eth_rx_adapter_create_ex

Re: [dpdk-dev] [PATCH ] common/cnxk: fix ROC naming convention

[Jerin Jacob]

On Fri, Aug 18, 2023 at 9:31 AM  wrote:
>
> From: Satheesh Paul 
>
> Fix ROC code naming convention.
>
> Fixes: d110c44d29e7 ("common/cnxk: support flow aging")
>
> Signed-off-by: Satheesh Paul 
> Reviewed-by: Jerin Jacob 

Applied to dpdk-next-net-mrvl/for-next-net. Thanks


> ---
>  drivers/common/cnxk/roc_npc.h   |  2 +-
>  drivers/common/cnxk/roc_npc_aging.c | 14 +-
>  2 files changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/common/cnxk/roc_npc.h b/drivers/common/cnxk/roc_npc.h
> index 2fb0aa7a4e..84c92f4c28 100644
> --- a/drivers/common/cnxk/roc_npc.h
> +++ b/drivers/common/cnxk/roc_npc.h
> @@ -224,7 +224,7 @@ struct roc_npc_action_port_id {
>  struct roc_npc_action_age {
> uint32_t timeout : 24; /**< Time in seconds. */
> uint32_t reserved : 8; /**< Reserved, must be zero. */
> -   /** The user flow context, NULL means the rte_flow pointer. */
> +   /** The user flow context, NULL means the flow pointer. */
> void *context;
>  };
>
> diff --git a/drivers/common/cnxk/roc_npc_aging.c 
> b/drivers/common/cnxk/roc_npc_aging.c
> index 94126fe9fd..874a7cd4ff 100644
> --- a/drivers/common/cnxk/roc_npc_aging.c
> +++ b/drivers/common/cnxk/roc_npc_aging.c
> @@ -62,7 +62,7 @@ check_timeout_cycles(struct roc_npc *roc_npc, uint32_t 
> mcam_id)
> list = &npc->age_flow_list;
> TAILQ_FOREACH(fl_iter, list, next) {
> if (fl_iter->flow->mcam_id == mcam_id &&
> -   fl_iter->flow->timeout_cycles < rte_get_timer_cycles()) {
> +   fl_iter->flow->timeout_cycles < plt_tsc_cycles()) {
> /* update bitmap */
> plt_bitmap_set(flow_age->aged_flows, mcam_id);
> if (!aging_enabled) {
> @@ -90,8 +90,8 @@ update_timeout_cycles(struct roc_npc *roc_npc, uint32_t 
> mcam_id)
> list = &npc->age_flow_list;
> TAILQ_FOREACH(fl_iter, list, next) {
> if (fl_iter->flow->mcam_id == mcam_id) {
> -   fl_iter->flow->timeout_cycles = 
> rte_get_timer_cycles() +
> -   fl_iter->flow->timeout * rte_get_timer_hz();
> +   fl_iter->flow->timeout_cycles = plt_tsc_cycles() +
> +   fl_iter->flow->timeout * plt_tsc_hz();
> break;
> }
> }
> @@ -214,6 +214,11 @@ npc_age_flow_list_entry_add(struct roc_npc *roc_npc, 
> struct roc_npc_flow *flow)
> struct npc_age_flow_entry *new_entry;
>
> new_entry = plt_zmalloc(sizeof(*new_entry), 0);
> +   if (new_entry == NULL) {
> +   plt_err("flow entry alloc failed");
> +   return;
> +   }
> +
> new_entry->flow = flow;
> roc_npc->flow_age.age_flow_refcnt++;
> /* List in ascending order of mcam entries */
> @@ -269,8 +274,7 @@ npc_aging_ctrl_thread_create(struct roc_npc *roc_npc,
>
> flow->age_context = age->context == NULL ? flow : age->context;
> flow->timeout = age->timeout;
> -   flow->timeout_cycles = rte_get_timer_cycles() + age->timeout *
> -  rte_get_timer_hz();
> +   flow->timeout_cycles = plt_tsc_cycles() + age->timeout * plt_tsc_hz();
>
> if (flow_age->age_flow_refcnt == 0) {
> flow_age->aged_flows_get_thread_exit = false;
> --
> 2.39.2
>

Re: [PATCH v6] eventdev/eth_rx: add new adapter create API

[Jerin Jacob]

On Mon, Aug 21, 2023 at 8:59 PM Naga Harish K S V
 wrote:
>
> Add new API "rte_event_eth_rx_adapter_create_ext_with_params()" for
> creating Rx adapter instance. This API is similar to
> rte_event_eth_rx_adapter_create_ext() with an additional input
> argument for adapter configuration parameters of type
> "struct rte_event_eth_rx_adapter_params".
>
> Signed-off-by: Naga Harish K S V 
> ---
> v2:
>  * Fix warning
> v3:
>  * remove __rte_cold hint as per review comments
> v4:
>  * address review comments
> v5:
>  * Update release notes document
> v6:
>  * incorporate review comments

> +static int __rte_cold

Missed again to remove _rte_cold.
Seriously, Please pay some attention when sending the patch(Same
comment given in last time).


> +rxa_config_params_validate(struct rte_event_eth_rx_adapter_params 
> *rxa_params,
> +  struct rte_event_eth_rx_adapter_params 
> *temp_params)

Re: [PATCH v5 3/3] power: amd power monitor support

[Tyler Retzlaff]

On Fri, Aug 18, 2023 at 02:48:42PM +0100, Bruce Richardson wrote:
> On Fri, Aug 18, 2023 at 02:25:14PM +0100, Ferruh Yigit wrote:
> > On 8/17/2023 3:18 PM, Konstantin Ananyev wrote:
> > > 
> > >>> Caution: This message originated from an External Source. Use proper 
> > >>> caution
> > >>> when opening attachments, clicking links, or responding.
> > >>>
> > >>>
> > >>> On Wed, Aug 16, 2023 at 11:59:59AM -0700, Sivaprasad Tummala wrote:
> >  mwaitx allows EPYC processors to enter a implementation dependent
> >  power/performance optimized state (C1 state) for a specific period or
> >  until a store to the monitored address range.
> > 
> >  Signed-off-by: Sivaprasad Tummala 
> >  Acked-by: Anatoly Burakov 
> >  ---
> >   lib/eal/x86/rte_power_intrinsics.c | 77
> >  +-
> >   1 file changed, 66 insertions(+), 11 deletions(-)
> > 
> >  diff --git a/lib/eal/x86/rte_power_intrinsics.c
> >  b/lib/eal/x86/rte_power_intrinsics.c
> >  index 6eb9e50807..b4754e17da 100644
> >  --- a/lib/eal/x86/rte_power_intrinsics.c
> >  +++ b/lib/eal/x86/rte_power_intrinsics.c
> >  @@ -17,6 +17,60 @@ static struct power_wait_status {
> >    volatile void *monitor_addr; /**< NULL if not currently sleeping
> >  */  } __rte_cache_aligned wait_status[RTE_MAX_LCORE];
> > 
> >  +/**
> >  + * These functions uses UMONITOR/UMWAIT instructions and will enter 
> >  C0.2
> > >>> state.
> >  + * For more information about usage of these instructions, please
> >  +refer to
> >  + * Intel(R) 64 and IA-32 Architectures Software Developer's Manual.
> >  + */
> >  +static void intel_umonitor(volatile void *addr) {
> >  + /* UMONITOR */
> >  + asm volatile(".byte 0xf3, 0x0f, 0xae, 0xf7;"
> >  + :
> >  + : "D"(addr));
> >  +}
> >  +
> >  +static void intel_umwait(const uint64_t timeout) {
> >  + const uint32_t tsc_l = (uint32_t)timeout;
> >  + const uint32_t tsc_h = (uint32_t)(timeout >> 32);
> >  + /* UMWAIT */
> >  + asm volatile(".byte 0xf2, 0x0f, 0xae, 0xf7;"
> >  + : /* ignore rflags */
> >  + : "D"(0), /* enter C0.2 */
> >  + "a"(tsc_l), "d"(tsc_h)); }
> > >>>
> > >>> question and perhaps Anatoly Burakov can chime in with expertise.
> > >>>
> > >>> gcc/clang have built-in intrinsics for umonitor and umwait i believe as 
> > >>> per our other
> > >>> thread of discussion is there a benefit to also providing inline 
> > >>> assembly over just
> > >>> using the intrinsics? I understand that the intrinsics may not exist 
> > >>> for the monitorx
> > >>> and mwaitx below so it is probably necessary for amd.
> > >>>
> > >>> so the suggestion here is when they are available just use the 
> > >>> intrinsics.
> > >>>
> > >>> thanks
> > >>>
> > >> The gcc built-in functions 
> > >> __builtin_ia32_monitorx()/__builtin_ia32_mwaitx are available only when 
> > >> -mmwaitx
> > >> is used specific for AMD platforms. On generic builds, these built-ins 
> > >> are not available and hence inline
> > >> assembly is required here.
> > > 
> > > Ok... but we can probably put them into a separate .c file that will be 
> > > compiled with that specific flag?
> > > Same thing can be probably done for Intel specific instructions.
> > > In general, I think it is much more preferable to use built-ins vs inline 
> > > assembly
> > > (if possible off-course). 
> > >
> > 
> > We don't compile different set of files for AMD and Intel, but there are
> > runtime checks, so putting into separate file is not much different.
> > 
> > It may be an option to always enable compiler flag (-mmwaitx), I think
> > it won't hurt other platforms but I am not sure about implications of
> > this to other platforms (what was the motivation for the compiler guys
> > to enable these build-ins with specific flag?).
> > 
> > Also this requires detecting compiler that supports 'mmwaitx' or not, etc..
> > 
> This is the biggest reason why we have in the past added support for these
> instructions via asm bytes rather than intrinsics. It takes a long time for
> end-user compilers, especially those in LTS releases, to get the necessary
> intrinsics. Consider a user running e.g. RHEL 8, who wants to take
> advantages of the latest DPDK features; they should not be required to
> upgrade their compiler - and possibly binutils/assembler - to do so.

yes, this is understood. just for clarity i'm only asking that the
intrinsics be used for intel since they are available. for amd we'll
have to use the inline asm if the older compilers don't have intrinsics.

ty

> 
> /Bruce

[PATCH v7] eventdev/eth_rx: add new adapter create API

[Naga Harish K S V]

Add new API "rte_event_eth_rx_adapter_create_ext_with_params()" for
creating Rx adapter instance. This API is similar to
rte_event_eth_rx_adapter_create_ext() with an additional input
argument for adapter configuration parameters of type
"struct rte_event_eth_rx_adapter_params".

Signed-off-by: Naga Harish K S V 
---
v2:
 * Fix warning
v3:
 * remove __rte_cold hint as per review comments
v4:
 * address review comments
v5:
 * Update release notes document
v6:
 * incorporate review comments
v7:
 * remove __rte_cold that is still remaining
---
---
 app/test/test_event_eth_rx_adapter.c  | 87 +++
 .../prog_guide/event_ethernet_rx_adapter.rst  |  3 +
 doc/guides/rel_notes/release_23_11.rst|  5 ++
 lib/eventdev/rte_event_eth_rx_adapter.c   | 75 +++-
 lib/eventdev/rte_event_eth_rx_adapter.h   | 37 +++-
 lib/eventdev/version.map  |  3 +
 6 files changed, 187 insertions(+), 23 deletions(-)

diff --git a/app/test/test_event_eth_rx_adapter.c 
b/app/test/test_event_eth_rx_adapter.c
index 52d146f97c..2d5e197666 100644
--- a/app/test/test_event_eth_rx_adapter.c
+++ b/app/test/test_event_eth_rx_adapter.c
@@ -444,6 +444,91 @@ adapter_create_with_params(void)
return TEST_SUCCESS;
 }
 
+static int
+test_port_conf_cb(uint8_t id, uint8_t event_dev_id,
+ struct rte_event_eth_rx_adapter_conf *conf,
+ void *conf_arg)
+{
+   struct rte_event_port_conf *port_conf, def_port_conf = {0};
+   uint32_t started;
+   static int port_allocated;
+   static uint8_t port_id;
+   int ret;
+
+   if (port_allocated) {
+   conf->event_port_id = port_id;
+   conf->max_nb_rx = 128;
+   return 0;
+   }
+
+   RTE_SET_USED(id);
+
+   ret = rte_event_dev_attr_get(event_dev_id, RTE_EVENT_DEV_ATTR_STARTED,
+&started);
+   if (ret < 0)
+   return ret;
+
+   if (started)
+   rte_event_dev_stop(event_dev_id);
+
+   port_id = 1;
+
+   if (conf_arg != NULL)
+   port_conf = conf_arg;
+   else {
+   port_conf = &def_port_conf;
+   ret = rte_event_port_default_conf_get(event_dev_id, port_id,
+ port_conf);
+   if (ret < 0)
+   return ret;
+   }
+
+   ret = rte_event_port_setup(event_dev_id, port_id, port_conf);
+   if (ret < 0)
+   return ret;
+
+   conf->event_port_id = port_id;
+   conf->max_nb_rx = 128;
+
+   if (started)
+   rte_event_dev_start(event_dev_id);
+
+   /* Reuse this port number next time this is called */
+   port_allocated = 1;
+
+   return 0;
+}
+
+static int
+adapter_create_ext_with_params(void)
+{
+   int err;
+   struct rte_event_dev_info dev_info;
+   struct rte_event_eth_rx_adapter_params rxa_params;
+
+   err = rte_event_dev_info_get(TEST_DEV_ID, &dev_info);
+   TEST_ASSERT(err == 0, "Expected 0 got %d", err);
+
+   rxa_params.use_queue_event_buf = false;
+   rxa_params.event_buf_size = 0;
+
+   err = rte_event_eth_rx_adapter_create_ext_with_params(TEST_INST_ID,
+   TEST_DEV_ID, test_port_conf_cb, NULL, &rxa_params);
+   TEST_ASSERT(err == -EINVAL, "Expected -EINVAL got %d", err);
+
+   rxa_params.event_buf_size = 128;
+
+   err = rte_event_eth_rx_adapter_create_ext_with_params(TEST_INST_ID,
+   TEST_DEV_ID, test_port_conf_cb, NULL, &rxa_params);
+   TEST_ASSERT(err == 0, "Expected 0 got %d", err);
+
+   err = rte_event_eth_rx_adapter_create_ext_with_params(TEST_INST_ID,
+   TEST_DEV_ID, test_port_conf_cb, NULL, &rxa_params);
+   TEST_ASSERT(err == -EEXIST, "Expected -EEXIST got %d", err);
+
+   return TEST_SUCCESS;
+}
+
 static int
 adapter_queue_event_buf_test(void)
 {
@@ -1337,6 +1422,8 @@ static struct unit_test_suite event_eth_rx_tests = {
 adapter_pollq_instance_get),
TEST_CASE_ST(adapter_create, adapter_free,
 adapter_get_set_params),
+   TEST_CASE_ST(adapter_create_ext_with_params, adapter_free,
+adapter_start_stop),
TEST_CASES_END() /**< NULL terminate unit test array */
}
 };
diff --git a/doc/guides/prog_guide/event_ethernet_rx_adapter.rst 
b/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
index 7c5e73b9fd..2e68cca798 100644
--- a/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
+++ b/doc/guides/prog_guide/event_ethernet_rx_adapter.rst
@@ -71,6 +71,9 @@ set to true. The function is passed the event device to be 
associated with
 the adapter and port configuration for the adapter to setup an event port
 if the adapter needs to use a service function.
 
+If the application desires to control both the event port allocation and event
+

Re: [PATCH v5 03/10] app/test: make telemetry data test buildable on windows

[Tyler Retzlaff]

On Tue, Aug 15, 2023 at 04:10:47PM +0100, Bruce Richardson wrote:
> To enable the building of the telemetry data tests file when building on
> windows, we need to provide a stub implementation. That way, the test
> file is buildable any time the library itself is built.
> 
> Signed-off-by: Bruce Richardson 
> Acked-by: Morten Brørup 
> ---

Acked-by: Tyler Retzlaff 

Re: [PATCH v6 04/11] app/test: make telemetry data test buildable on windows

[Tyler Retzlaff]

On Wed, Aug 16, 2023 at 04:34:32PM +0100, Bruce Richardson wrote:
> To enable the building of the telemetry data tests file when building on
> windows, we need to provide a stub implementation. That way, the test
> file is buildable any time the library itself is built.
> 
> Signed-off-by: Bruce Richardson 
> Acked-by: Morten Brørup 
> ---

let me also ack the latest v6

Acked-by: Tyler Retzlaff 

Re: [PATCH v4 15/19] event/opdl: remove term sanity

[Liang Ma]

On Wed, Aug 02, 2023 at 04:25:46PM -0700, Stephen Hemminger wrote:
> Don't use non-inclusive term.
> 
> Signed-off-by: Stephen Hemminger 
> ---

Acked-by: Liang Ma 


>  drivers/event/opdl/opdl_evdev.c  | 2 +-
>  drivers/event/opdl/opdl_evdev_init.c | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/event/opdl/opdl_evdev.c b/drivers/event/opdl/opdl_evdev.c
> index 9ce8b39b6098..862f3fa9b27a 100644
> --- a/drivers/event/opdl/opdl_evdev.c
> +++ b/drivers/event/opdl/opdl_evdev.c
> @@ -241,7 +241,7 @@ opdl_queue_setup(struct rte_eventdev *dev,
>  
>   struct opdl_evdev *device = opdl_pmd_priv(dev);
>  
> - /* Extra sanity check, probably not needed */
> + /* Extra check, probably not needed */
>   if (queue_id == OPDL_INVALID_QID) {
>   PMD_DRV_LOG(ERR, "DEV_ID:[%02d] : "
>"Invalid queue id %u requested\n",
> diff --git a/drivers/event/opdl/opdl_evdev_init.c 
> b/drivers/event/opdl/opdl_evdev_init.c
> index be3437fc2f40..12eb2695f5de 100644
> --- a/drivers/event/opdl/opdl_evdev_init.c
> +++ b/drivers/event/opdl/opdl_evdev_init.c
> @@ -300,7 +300,7 @@ static int opdl_add_deps(struct opdl_evdev *device,
>   struct opdl_queue *queue_deps = &device->queue[deps_q_id];
>   struct opdl_stage *dep_stages[OPDL_PORTS_MAX];
>  
> - /* sanity check that all stages are for same opdl ring */
> + /* check that all stages are for same opdl ring */
>   for (i = 0; i < queue->nb_ports; i++) {
>   struct opdl_ring *r =
>   opdl_stage_get_opdl_ring(stage_for_port(queue, i));
> -- 
> 2.39.2
> 

Re: [PATCH] test: remove use of word master in test_red

[Tyler Retzlaff]

On Thu, Aug 17, 2023 at 07:33:14PM -0700, Stephen Hemminger wrote:
> No need to use term master here.
> 
> Signed-off-by: Stephen Hemminger 
> ---

Acked-by: Tyler Retzlaff 

Re: [PATCH] app/test: fix reference to master in bonding test

[Tyler Retzlaff]

On Thu, Aug 17, 2023 at 07:44:48PM -0700, Stephen Hemminger wrote:
> Missed in previous patch
> 
> Signed-off-by: Stephen Hemminger 
> ---

Acked-by: Tyler Retzlaff 

[PATCH v13 00/21] Convert static log types in libraries to dynamic types

[Stephen Hemminger]

This patchset removes most of the uses of static LOGTYPE's in DPDK
libraries. It starts with the easy one and goes on to the more complex ones.

There are several options on how to treat the old static types:
leave them there, mark as deprecated, or remove them.
This version removes them since there is no guarantee in current
DPDK policies that says they can't be removed.

Note: there is one patch in this series that will get
flagged incorrectly as an ABI change.

v13 - rebase because log now moved.

v12 - rebase and add table and pipeline libraries

v11 - fix include check on arm cross build

v10 - add necessary rte_compat.h in thash_gfni stub for arm

v9 - fix handling of crc32 alg in lib/hash.
 make it an internal global variable.
 fix gfni stubs for case where they are not used.

Stephen Hemminger (21):
  gso: don't log message on non TCP/UDP
  eal: drop no longer used GSO logtype
  log: drop unused RTE_LOGTYPE_TIMER
  efd: convert RTE_LOGTYPE_EFD to dynamic type
  mbuf: convert RTE_LOGTYPE_MBUF to dynamic type
  acl: convert RTE_LOGTYPE_ACL to dynamic type
  examples/power: replace use of RTE_LOGTYPE_POWER
  examples/l3fwd-power: replace use of RTE_LOGTYPE_POWER
  power: convert RTE_LOGTYPE_POWER to dynamic type
  ring: convert RTE_LOGTYPE_RING to dynamic type
  mempool: convert RTE_LOGTYPE_MEMPOOL to dynamic type
  lpm: convert RTE_LOGTYPE_LPM to dynamic types
  sched: convert RTE_LOGTYPE_SCHED to dynamic type
  examples/ipsec-secgw: replace RTE_LOGTYPE_PORT
  port: convert RTE_LOGTYPE_PORT to dynamic type
  hash: move rte_thash_gfni stubs out of header file
  hash: move rte_hash_set_alg out header
  hash: convert RTE_LOGTYPE_HASH to dynamic type
  table: convert RTE_LOGTYPE_TABLE to dynamic type
  app/test: remove use of RTE_LOGTYPE_PIPELINE
  pipeline: convert RTE_LOGTYPE_PIPELINE to dynamic type

 app/test/test_acl.c |  2 +-
 app/test/test_table_acl.c   | 50 +++-
 app/test/test_table_pipeline.c  | 40 +--
 examples/distributor/main.c |  2 +-
 examples/ipsec-secgw/sa.c   |  6 +--
 examples/l3fwd-power/main.c | 17 +
 lib/acl/acl.h   |  1 +
 lib/acl/acl_bld.c   |  3 ++
 lib/acl/acl_gen.c   |  1 +
 lib/acl/acl_log.h   |  6 +++
 lib/acl/rte_acl.c   |  3 ++
 lib/acl/tb_mem.c|  3 +-
 lib/efd/rte_efd.c   |  4 ++
 lib/fib/fib_log.h   |  4 ++
 lib/fib/rte_fib.c   |  3 ++
 lib/fib/rte_fib6.c  |  2 +
 lib/gso/rte_gso.c   |  4 +-
 lib/gso/rte_gso.h   |  1 +
 lib/hash/meson.build|  9 -
 lib/hash/rte_crc_arm64.h|  8 ++--
 lib/hash/rte_crc_x86.h  | 10 ++---
 lib/hash/rte_cuckoo_hash.c  |  5 +++
 lib/hash/rte_fbk_hash.c |  5 +++
 lib/hash/rte_hash_crc.c | 68 +
 lib/hash/rte_hash_crc.h | 48 ++-
 lib/hash/rte_thash.c|  3 ++
 lib/hash/rte_thash_gfni.c   | 50 
 lib/hash/rte_thash_gfni.h   | 30 +--
 lib/hash/version.map| 11 ++
 lib/log/log.c   | 16 
 lib/log/rte_log.h   | 32 
 lib/lpm/lpm_log.h   |  4 ++
 lib/lpm/rte_lpm.c   |  3 ++
 lib/lpm/rte_lpm6.c  |  1 +
 lib/mbuf/mbuf_log.h |  4 ++
 lib/mbuf/rte_mbuf.c |  4 ++
 lib/mbuf/rte_mbuf_dyn.c |  2 +
 lib/mbuf/rte_mbuf_pool_ops.c|  2 +
 lib/mempool/rte_mempool.c   |  2 +
 lib/mempool/rte_mempool.h   |  8 
 lib/mempool/version.map |  3 ++
 lib/pipeline/rte_pipeline.c |  2 +
 lib/pipeline/rte_pipeline.h |  5 +++
 lib/port/rte_port_ethdev.c  |  3 ++
 lib/port/rte_port_eventdev.c|  4 ++
 lib/port/rte_port_fd.c  |  3 ++
 lib/port/rte_port_frag.c|  3 ++
 lib/port/rte_port_ras.c |  3 ++
 lib/port/rte_port_ring.c|  3 ++
 lib/port/rte_port_sched.c   |  3 ++
 lib/port/rte_port_source_sink.c |  3 ++
 lib/port/rte_port_sym_crypto.c  |  3 ++
 lib/power/guest_channel.c   |  3 +-
 lib/power/power_common.c|  2 +
 lib/power/power_common.h|  2 +
 lib/power/power_kvm_vm.c|  1 +
 lib/power/rte_power.c   |  1 +
 lib/rib/rib_log.h   |  4 ++
 lib/rib/rte_rib.c   |  3 ++
 lib/rib/rte_rib6.c  |  3 ++
 lib/ring/rte_ring.c |  3 ++
 lib/sched/rte_pie.c |  1 +
 lib/sched/rte_sched.c   |  5 +++
 lib/sched/rte_sched_log.h   |  4 ++
 lib/table/meson.build   |  1 +
 lib/table/rte_table.c   |  8 
 lib/table/rte_table.h   |  4 ++
 67 files changed, 387 insertions(+), 173 deletions(-)
 create mode 100644 lib/acl/acl_log.h
 create mode 100644 lib/fib/fib_log.h
 create mode 100644 lib/hash/rte_hash_crc.c
 create mode 100644 lib/hash/rte_thash_gfni.c
 create mode 100644 lib/lp

[PATCH v13 01/21] gso: don't log message on non TCP/UDP

[Stephen Hemminger]

If a large packet is passed into GSO routines of unknown protocol
then library would log a message.
Better to tell the application instead of logging.

Fixes: 119583797b6a ("gso: support TCP/IPv4 GSO")
Reviewed-by: Jiayu Hu 
Signed-off-by: Stephen Hemminger 
---
 lib/gso/rte_gso.c | 4 +---
 lib/gso/rte_gso.h | 1 +
 2 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/lib/gso/rte_gso.c b/lib/gso/rte_gso.c
index 4b59217c16ee..e29c7d884aed 100644
--- a/lib/gso/rte_gso.c
+++ b/lib/gso/rte_gso.c
@@ -80,9 +80,7 @@ rte_gso_segment(struct rte_mbuf *pkt,
ret = gso_udp4_segment(pkt, gso_size, direct_pool,
indirect_pool, pkts_out, nb_pkts_out);
} else {
-   /* unsupported packet, skip */
-   RTE_LOG(DEBUG, GSO, "Unsupported packet type\n");
-   ret = 0;
+   ret = -ENOTSUP; /* only UDP or TCP allowed */
}
 
if (ret < 0) {
diff --git a/lib/gso/rte_gso.h b/lib/gso/rte_gso.h
index 40922524df42..c0f9a1b66ff2 100644
--- a/lib/gso/rte_gso.h
+++ b/lib/gso/rte_gso.h
@@ -114,6 +114,7 @@ struct rte_gso_ctx {
  *  - The number of GSO segments filled in pkts_out on success.
  *  - Return 0 if it does not need to be GSO'd.
  *  - Return -ENOMEM if run out of memory in MBUF pools.
+ *  - Return -ENOTSUP for protocols that can not be segmented
  *  - Return -EINVAL for invalid parameters.
  */
 int rte_gso_segment(struct rte_mbuf *pkt,
-- 
2.39.2

[PATCH v13 02/21] eal: drop no longer used GSO logtype

[Stephen Hemminger]

The message that used this was replaced in previous patch.

Signed-off-by: Stephen Hemminger 
---
 lib/log/log.c | 1 -
 lib/log/rte_log.h | 2 +-
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/lib/log/log.c b/lib/log/log.c
index 52c771fb6b84..b51beb1a7604 100644
--- a/lib/log/log.c
+++ b/lib/log/log.c
@@ -370,7 +370,6 @@ static const struct logtype logtype_strings[] = {
{RTE_LOGTYPE_CRYPTODEV,  "lib.cryptodev"},
{RTE_LOGTYPE_EFD,"lib.efd"},
{RTE_LOGTYPE_EVENTDEV,   "lib.eventdev"},
-   {RTE_LOGTYPE_GSO,"lib.gso"},
{RTE_LOGTYPE_USER1,  "user1"},
{RTE_LOGTYPE_USER2,  "user2"},
{RTE_LOGTYPE_USER3,  "user3"},
diff --git a/lib/log/rte_log.h b/lib/log/rte_log.h
index bdefff2a5933..4ed11a80069a 100644
--- a/lib/log/rte_log.h
+++ b/lib/log/rte_log.h
@@ -46,7 +46,7 @@ extern "C" {
 #define RTE_LOGTYPE_CRYPTODEV 17 /**< Log related to cryptodev. */
 #define RTE_LOGTYPE_EFD   18 /**< Log related to EFD. */
 #define RTE_LOGTYPE_EVENTDEV  19 /**< Log related to eventdev. */
-#define RTE_LOGTYPE_GSO   20 /**< Log related to GSO. */
+/* was RTE_LOGTYPE_GSO */
 
 /* these log types can be used in an application */
 #define RTE_LOGTYPE_USER1 24 /**< User-defined log type 1. */
-- 
2.39.2

[PATCH v13 03/21] log: drop unused RTE_LOGTYPE_TIMER

[Stephen Hemminger]

The timer code does not use rte_log.

Signed-off-by: Stephen Hemminger 
---
 lib/log/log.c | 1 -
 lib/log/rte_log.h | 2 +-
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/lib/log/log.c b/lib/log/log.c
index b51beb1a7604..4a7ff738750b 100644
--- a/lib/log/log.c
+++ b/lib/log/log.c
@@ -355,7 +355,6 @@ static const struct logtype logtype_strings[] = {
{RTE_LOGTYPE_MALLOC, "lib.malloc"},
{RTE_LOGTYPE_RING,   "lib.ring"},
{RTE_LOGTYPE_MEMPOOL,"lib.mempool"},
-   {RTE_LOGTYPE_TIMER,  "lib.timer"},
{RTE_LOGTYPE_PMD,"pmd"},
{RTE_LOGTYPE_HASH,   "lib.hash"},
{RTE_LOGTYPE_LPM,"lib.lpm"},
diff --git a/lib/log/rte_log.h b/lib/log/rte_log.h
index 4ed11a80069a..bc9d1fc8f106 100644
--- a/lib/log/rte_log.h
+++ b/lib/log/rte_log.h
@@ -30,7 +30,7 @@ extern "C" {
 #define RTE_LOGTYPE_MALLOC 1 /**< Log related to malloc. */
 #define RTE_LOGTYPE_RING   2 /**< Log related to ring. */
 #define RTE_LOGTYPE_MEMPOOL3 /**< Log related to mempool. */
-#define RTE_LOGTYPE_TIMER  4 /**< Log related to timers. */
+/* was RTE_LOGTYPE_TIMER */
 #define RTE_LOGTYPE_PMD5 /**< Log related to poll mode driver. */
 #define RTE_LOGTYPE_HASH   6 /**< Log related to hash table. */
 #define RTE_LOGTYPE_LPM7 /**< Log related to LPM. */
-- 
2.39.2

[PATCH v13 04/21] efd: convert RTE_LOGTYPE_EFD to dynamic type

[Stephen Hemminger]

Replace all uses of the global logtype with a dynamic log type.

Signed-off-by: Stephen Hemminger 
---
 lib/efd/rte_efd.c | 4 
 lib/log/log.c | 1 -
 lib/log/rte_log.h | 2 +-
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/lib/efd/rte_efd.c b/lib/efd/rte_efd.c
index dad962ce29bf..78fb9250ef87 100644
--- a/lib/efd/rte_efd.c
+++ b/lib/efd/rte_efd.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 
+#include 
 #include 
 #include 
 #include 
@@ -28,6 +29,9 @@
 #include "rte_efd_arm64.h"
 #endif
 
+RTE_LOG_REGISTER_DEFAULT(efd_logtype, INFO);
+#define RTE_LOGTYPE_EFDefd_logtype
+
 #define EFD_KEY(key_idx, table) (table->keys + ((key_idx) * table->key_len))
 /** Hash function used to determine chunk_id and bin_id for a group */
 #define EFD_HASH(key, table) \
diff --git a/lib/log/log.c b/lib/log/log.c
index 4a7ff738750b..7a6b5c335753 100644
--- a/lib/log/log.c
+++ b/lib/log/log.c
@@ -367,7 +367,6 @@ static const struct logtype logtype_strings[] = {
{RTE_LOGTYPE_PIPELINE,   "lib.pipeline"},
{RTE_LOGTYPE_MBUF,   "lib.mbuf"},
{RTE_LOGTYPE_CRYPTODEV,  "lib.cryptodev"},
-   {RTE_LOGTYPE_EFD,"lib.efd"},
{RTE_LOGTYPE_EVENTDEV,   "lib.eventdev"},
{RTE_LOGTYPE_USER1,  "user1"},
{RTE_LOGTYPE_USER2,  "user2"},
diff --git a/lib/log/rte_log.h b/lib/log/rte_log.h
index bc9d1fc8f106..6df66366608b 100644
--- a/lib/log/rte_log.h
+++ b/lib/log/rte_log.h
@@ -44,7 +44,7 @@ extern "C" {
 #define RTE_LOGTYPE_PIPELINE  15 /**< Log related to pipeline. */
 #define RTE_LOGTYPE_MBUF  16 /**< Log related to mbuf. */
 #define RTE_LOGTYPE_CRYPTODEV 17 /**< Log related to cryptodev. */
-#define RTE_LOGTYPE_EFD   18 /**< Log related to EFD. */
+/* was RTE_LOGTYPE_EFD */
 #define RTE_LOGTYPE_EVENTDEV  19 /**< Log related to eventdev. */
 /* was RTE_LOGTYPE_GSO */
 
-- 
2.39.2

[PATCH v13 05/21] mbuf: convert RTE_LOGTYPE_MBUF to dynamic type

[Stephen Hemminger]

Introduce a new dynamic logtype for mbuf related messages.
Since this is used in multiple files put one macro in mbuf_log.h

Signed-off-by: Stephen Hemminger 
---
 lib/log/log.c| 1 -
 lib/log/rte_log.h| 2 +-
 lib/mbuf/mbuf_log.h  | 4 
 lib/mbuf/rte_mbuf.c  | 4 
 lib/mbuf/rte_mbuf_dyn.c  | 2 ++
 lib/mbuf/rte_mbuf_pool_ops.c | 2 ++
 6 files changed, 13 insertions(+), 2 deletions(-)
 create mode 100644 lib/mbuf/mbuf_log.h

diff --git a/lib/log/log.c b/lib/log/log.c
index 7a6b5c335753..718922b5e5ac 100644
--- a/lib/log/log.c
+++ b/lib/log/log.c
@@ -365,7 +365,6 @@ static const struct logtype logtype_strings[] = {
{RTE_LOGTYPE_PORT,   "lib.port"},
{RTE_LOGTYPE_TABLE,  "lib.table"},
{RTE_LOGTYPE_PIPELINE,   "lib.pipeline"},
-   {RTE_LOGTYPE_MBUF,   "lib.mbuf"},
{RTE_LOGTYPE_CRYPTODEV,  "lib.cryptodev"},
{RTE_LOGTYPE_EVENTDEV,   "lib.eventdev"},
{RTE_LOGTYPE_USER1,  "user1"},
diff --git a/lib/log/rte_log.h b/lib/log/rte_log.h
index 6df66366608b..8cab1f11f7b8 100644
--- a/lib/log/rte_log.h
+++ b/lib/log/rte_log.h
@@ -42,7 +42,7 @@ extern "C" {
 #define RTE_LOGTYPE_PORT  13 /**< Log related to port. */
 #define RTE_LOGTYPE_TABLE 14 /**< Log related to table. */
 #define RTE_LOGTYPE_PIPELINE  15 /**< Log related to pipeline. */
-#define RTE_LOGTYPE_MBUF  16 /**< Log related to mbuf. */
+/* was RTE_LOGTYPE_MBUF */
 #define RTE_LOGTYPE_CRYPTODEV 17 /**< Log related to cryptodev. */
 /* was RTE_LOGTYPE_EFD */
 #define RTE_LOGTYPE_EVENTDEV  19 /**< Log related to eventdev. */
diff --git a/lib/mbuf/mbuf_log.h b/lib/mbuf/mbuf_log.h
new file mode 100644
index ..d759a9a25501
--- /dev/null
+++ b/lib/mbuf/mbuf_log.h
@@ -0,0 +1,4 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
+extern int mbuf_logtype;
+#define RTE_LOGTYPE_MBUF   mbuf_logtype
diff --git a/lib/mbuf/rte_mbuf.c b/lib/mbuf/rte_mbuf.c
index 686e797c80c4..3eccc618270b 100644
--- a/lib/mbuf/rte_mbuf.c
+++ b/lib/mbuf/rte_mbuf.c
@@ -20,6 +20,10 @@
 #include 
 #include 
 
+#include "mbuf_log.h"
+
+RTE_LOG_REGISTER_DEFAULT(mbuf_logtype, INFO);
+
 /*
  * pktmbuf pool constructor, given as a callback function to
  * rte_mempool_create(), or called directly if using
diff --git a/lib/mbuf/rte_mbuf_dyn.c b/lib/mbuf/rte_mbuf_dyn.c
index 5049508bea6e..4fb1863a1043 100644
--- a/lib/mbuf/rte_mbuf_dyn.c
+++ b/lib/mbuf/rte_mbuf_dyn.c
@@ -17,6 +17,8 @@
 #include 
 #include 
 
+#include "mbuf_log.h"
+
 #define RTE_MBUF_DYN_MZNAME "rte_mbuf_dyn"
 
 struct mbuf_dynfield_elt {
diff --git a/lib/mbuf/rte_mbuf_pool_ops.c b/lib/mbuf/rte_mbuf_pool_ops.c
index 4c91f4ce8569..5318430126cb 100644
--- a/lib/mbuf/rte_mbuf_pool_ops.c
+++ b/lib/mbuf/rte_mbuf_pool_ops.c
@@ -8,6 +8,8 @@
 #include 
 #include 
 
+#include "mbuf_log.h"
+
 int
 rte_mbuf_set_platform_mempool_ops(const char *ops_name)
 {
-- 
2.39.2

[PATCH v13 06/21] acl: convert RTE_LOGTYPE_ACL to dynamic type

[Stephen Hemminger]

Get rid of RTE_LOGTYPE_ACL and RTE_LOGTYPE_MALLOC.
For ACL library use a dynamic type.
The one message using RTE_LOGTYPE_MALLOC should have been
under the ACL logtype anyway.

The test code should not have been using fixed log type
so just change that to stderr.

Signed-off-by: Stephen Hemminger 
---
 app/test/test_acl.c | 2 +-
 lib/acl/acl.h   | 1 +
 lib/acl/acl_bld.c   | 3 +++
 lib/acl/acl_gen.c   | 1 +
 lib/acl/acl_log.h   | 6 ++
 lib/acl/rte_acl.c   | 3 +++
 lib/acl/tb_mem.c| 3 ++-
 lib/log/log.c   | 2 --
 lib/log/rte_log.h   | 4 ++--
 9 files changed, 19 insertions(+), 6 deletions(-)
 create mode 100644 lib/acl/acl_log.h

diff --git a/app/test/test_acl.c b/app/test/test_acl.c
index 623f34682e69..7de54d4c8901 100644
--- a/app/test/test_acl.c
+++ b/app/test/test_acl.c
@@ -154,7 +154,7 @@ rte_acl_ipv4vlan_add_rules(struct rte_acl_ctx *ctx,
for (i = 0; i != num; i++) {
rc = acl_ipv4vlan_check_rule(rules + i);
if (rc != 0) {
-   RTE_LOG(ERR, ACL, "%s: rule #%u is invalid\n",
+   fprintf(stderr,  "%s: rule #%u is invalid\n",
__func__, i + 1);
return rc;
}
diff --git a/lib/acl/acl.h b/lib/acl/acl.h
index c8e4e72fabfb..baed9513cb31 100644
--- a/lib/acl/acl.h
+++ b/lib/acl/acl.h
@@ -225,6 +225,7 @@ int
 rte_acl_classify_altivec(const struct rte_acl_ctx *ctx, const uint8_t **data,
uint32_t *results, uint32_t num, uint32_t categories);
 
+
 #ifdef __cplusplus
 }
 #endif /* __cplusplus */
diff --git a/lib/acl/acl_bld.c b/lib/acl/acl_bld.c
index 2816632803bd..22d909309a4c 100644
--- a/lib/acl/acl_bld.c
+++ b/lib/acl/acl_bld.c
@@ -3,8 +3,11 @@
  */
 
 #include 
+#include 
+
 #include "tb_mem.h"
 #include "acl.h"
+#include "acl_log.h"
 
 #defineACL_POOL_ALIGN  8
 #defineACL_POOL_ALLOC_MIN  0x80
diff --git a/lib/acl/acl_gen.c b/lib/acl/acl_gen.c
index 25e75fec3534..03a47ea231ec 100644
--- a/lib/acl/acl_gen.c
+++ b/lib/acl/acl_gen.c
@@ -4,6 +4,7 @@
 
 #include 
 #include "acl.h"
+#include "acl_log.h"
 
 #defineQRANGE_MIN  ((uint8_t)INT8_MIN)
 
diff --git a/lib/acl/acl_log.h b/lib/acl/acl_log.h
new file mode 100644
index ..6147116d8d12
--- /dev/null
+++ b/lib/acl/acl_log.h
@@ -0,0 +1,6 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
+#include 
+
+extern int acl_logtype;
+#define RTE_LOGTYPE_ACLacl_logtype
diff --git a/lib/acl/rte_acl.c b/lib/acl/rte_acl.c
index a61c3ba188da..650d52a97c32 100644
--- a/lib/acl/rte_acl.c
+++ b/lib/acl/rte_acl.c
@@ -8,6 +8,9 @@
 #include 
 
 #include "acl.h"
+#include "acl_log.h"
+
+RTE_LOG_REGISTER_DEFAULT(acl_logtype, INFO);
 
 TAILQ_HEAD(rte_acl_list, rte_tailq_entry);
 
diff --git a/lib/acl/tb_mem.c b/lib/acl/tb_mem.c
index f14d7b4fa26e..6a9d96aaeda2 100644
--- a/lib/acl/tb_mem.c
+++ b/lib/acl/tb_mem.c
@@ -3,6 +3,7 @@
  */
 
 #include "tb_mem.h"
+#include "acl_log.h"
 
 /*
  *  Memory management routines for temporary memory.
@@ -25,7 +26,7 @@ tb_pool(struct tb_mem_pool *pool, size_t sz)
size = sz + pool->alignment - 1;
block = calloc(1, size + sizeof(*pool->block));
if (block == NULL) {
-   RTE_LOG(ERR, MALLOC, "%s(%zu)\n failed, currently allocated "
+   RTE_LOG(ERR, ACL, "%s(%zu)\n failed, currently allocated "
"by pool: %zu bytes\n", __func__, sz, pool->alloc);
siglongjmp(pool->fail, -ENOMEM);
return NULL;
diff --git a/lib/log/log.c b/lib/log/log.c
index 718922b5e5ac..6f04f75f9a25 100644
--- a/lib/log/log.c
+++ b/lib/log/log.c
@@ -352,13 +352,11 @@ struct logtype {
 
 static const struct logtype logtype_strings[] = {
{RTE_LOGTYPE_EAL,"lib.eal"},
-   {RTE_LOGTYPE_MALLOC, "lib.malloc"},
{RTE_LOGTYPE_RING,   "lib.ring"},
{RTE_LOGTYPE_MEMPOOL,"lib.mempool"},
{RTE_LOGTYPE_PMD,"pmd"},
{RTE_LOGTYPE_HASH,   "lib.hash"},
{RTE_LOGTYPE_LPM,"lib.lpm"},
-   {RTE_LOGTYPE_ACL,"lib.acl"},
{RTE_LOGTYPE_POWER,  "lib.power"},
{RTE_LOGTYPE_METER,  "lib.meter"},
{RTE_LOGTYPE_SCHED,  "lib.sched"},
diff --git a/lib/log/rte_log.h b/lib/log/rte_log.h
index 8cab1f11f7b8..04dfb3443ea4 100644
--- a/lib/log/rte_log.h
+++ b/lib/log/rte_log.h
@@ -27,7 +27,7 @@ extern "C" {
 
 /* SDK log type */
 #define RTE_LOGTYPE_EAL0 /**< Log related to eal. */
-#define RTE_LOGTYPE_MALLOC 1 /**< Log related to malloc. */
+/* was RTE_LOGTYPE_MALLOC */
 #define RTE_LOGTYPE_RING   2 /**< Log related to ring. */
 #define RTE_LOGTYPE_MEMPOOL3 /**< Log related to mempool. */
 /* was RTE_LOGTYPE_TIMER */
@@ -35,7 +35,7 @@ extern "C" {
 #define RTE_LOGTYPE_HASH   6 /**< Log related to hash table. */
 #define RTE_LOGTYPE_LPM7 /**< Log related to LPM. */
  

[PATCH v13 07/21] examples/power: replace use of RTE_LOGTYPE_POWER

[Stephen Hemminger]

Don't use static logtype in sample application.

Signed-off-by: Stephen Hemminger 
Acked-by: David Hunt 
---
 examples/distributor/main.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/examples/distributor/main.c b/examples/distributor/main.c
index 21304d661873..542f76cf9664 100644
--- a/examples/distributor/main.c
+++ b/examples/distributor/main.c
@@ -679,7 +679,7 @@ init_power_library(void)
/* init power management library */
ret = rte_power_init(lcore_id);
if (ret) {
-   RTE_LOG(ERR, POWER,
+   fprintf(stderr,
"Library initialization failed on core %u\n",
lcore_id);
/*
-- 
2.39.2

[PATCH v13 08/21] examples/l3fwd-power: replace use of RTE_LOGTYPE_POWER

[Stephen Hemminger]

Convert to using a dynamic logtype for the application.

Signed-off-by: Stephen Hemminger 
Acked-by: David Hunt 
---
 examples/l3fwd-power/main.c | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/examples/l3fwd-power/main.c b/examples/l3fwd-power/main.c
index 3f01cbd9e277..f3330fd735dd 100644
--- a/examples/l3fwd-power/main.c
+++ b/examples/l3fwd-power/main.c
@@ -51,7 +51,8 @@
 #include "perf_core.h"
 #include "main.h"
 
-#define RTE_LOGTYPE_L3FWD_POWER RTE_LOGTYPE_USER1
+RTE_LOG_REGISTER(l3fwd_power_logtype, l3fwd.power, INFO);
+#define RTE_LOGTYPE_L3FWD_POWER l3fwd_power_logtype
 
 #define MAX_PKT_BURST 32
 
@@ -2236,7 +2237,7 @@ init_power_library(void)
/* init power management library */
ret = rte_power_init(lcore_id);
if (ret) {
-   RTE_LOG(ERR, POWER,
+   RTE_LOG(ERR, L3FWD_POWER,
"Library initialization failed on core %u\n",
lcore_id);
return ret;
@@ -2246,8 +2247,8 @@ init_power_library(void)
if (env != PM_ENV_ACPI_CPUFREQ &&
env != PM_ENV_PSTATE_CPUFREQ &&
env != PM_ENV_CPPC_CPUFREQ) {
-   RTE_LOG(ERR, POWER,
-   "Only ACPI, PSTATE and CPPC mode are 
supported\n");
+   RTE_LOG(ERR, L3FWD_POWER,
+   "Only ACPI and PSTATE mode are supported\n");
return -1;
}
}
@@ -2264,7 +2265,7 @@ deinit_power_library(void)
/* deinit power management library */
ret = rte_power_exit(lcore_id);
if (ret) {
-   RTE_LOG(ERR, POWER,
+   RTE_LOG(ERR, L3FWD_POWER,
"Library deinitialization failed on core %u\n",
lcore_id);
return ret;
@@ -2333,7 +2334,7 @@ update_telemetry(__rte_unused struct rte_timer *tim,
ret = rte_metrics_update_values(RTE_METRICS_GLOBAL, telstats_index,
values, RTE_DIM(values));
if (ret < 0)
-   RTE_LOG(WARNING, POWER, "failed to update metrics\n");
+   RTE_LOG(WARNING, L3FWD_POWER, "failed to update metrics\n");
 }
 
 static int
@@ -2382,7 +2383,7 @@ launch_timer(unsigned int lcore_id)
rte_get_main_lcore());
}
 
-   RTE_LOG(INFO, POWER, "Bring up the Timer\n");
+   RTE_LOG(INFO, L3FWD_POWER, "Bring up the Timer\n");
 
telemetry_setup_timer();
 
@@ -2398,7 +2399,7 @@ launch_timer(unsigned int lcore_id)
}
}
 
-   RTE_LOG(INFO, POWER, "Timer_subsystem is done\n");
+   RTE_LOG(INFO, L3FWD_POWER, "Timer_subsystem is done\n");
 
return 0;
 }
-- 
2.39.2

[PATCH v13 09/21] power: convert RTE_LOGTYPE_POWER to dynamic type

[Stephen Hemminger]

Use dynamic log type for power library.
Also replace use of RTE_LOGTYPE_USER1 with lib.power.guest.

Signed-off-by: Stephen Hemminger 
Acked-by: David Hunt 
---
 lib/log/log.c | 1 -
 lib/log/rte_log.h | 2 +-
 lib/power/guest_channel.c | 3 ++-
 lib/power/power_common.c  | 2 ++
 lib/power/power_common.h  | 2 ++
 lib/power/power_kvm_vm.c  | 1 +
 lib/power/rte_power.c | 1 +
 7 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/lib/log/log.c b/lib/log/log.c
index 6f04f75f9a25..5ec3c16250f5 100644
--- a/lib/log/log.c
+++ b/lib/log/log.c
@@ -357,7 +357,6 @@ static const struct logtype logtype_strings[] = {
{RTE_LOGTYPE_PMD,"pmd"},
{RTE_LOGTYPE_HASH,   "lib.hash"},
{RTE_LOGTYPE_LPM,"lib.lpm"},
-   {RTE_LOGTYPE_POWER,  "lib.power"},
{RTE_LOGTYPE_METER,  "lib.meter"},
{RTE_LOGTYPE_SCHED,  "lib.sched"},
{RTE_LOGTYPE_PORT,   "lib.port"},
diff --git a/lib/log/rte_log.h b/lib/log/rte_log.h
index 04dfb3443ea4..a1949e606395 100644
--- a/lib/log/rte_log.h
+++ b/lib/log/rte_log.h
@@ -36,7 +36,7 @@ extern "C" {
 #define RTE_LOGTYPE_LPM7 /**< Log related to LPM. */
 /* was RTE_LOGTYPE_KNI */
 /* was RTE_LOGTYPE_ACL */
-#define RTE_LOGTYPE_POWER 10 /**< Log related to power. */
+/* was RTE_LOGTYPE_POWER */
 #define RTE_LOGTYPE_METER 11 /**< Log related to QoS meter. */
 #define RTE_LOGTYPE_SCHED 12 /**< Log related to QoS port scheduler. */
 #define RTE_LOGTYPE_PORT  13 /**< Log related to port. */
diff --git a/lib/power/guest_channel.c b/lib/power/guest_channel.c
index 7b2ae0b6506f..4932a0528691 100644
--- a/lib/power/guest_channel.c
+++ b/lib/power/guest_channel.c
@@ -17,7 +17,8 @@
 
 #include "guest_channel.h"
 
-#define RTE_LOGTYPE_GUEST_CHANNEL RTE_LOGTYPE_USER1
+RTE_LOG_REGISTER_SUFFIX(guest_channel_logtype, guest, INFO);
+#define RTE_LOGTYPE_GUEST_CHANNEL guest_channel_logtype
 
 /* Timeout for incoming message in milliseconds. */
 #define TIMEOUT 10
diff --git a/lib/power/power_common.c b/lib/power/power_common.c
index 1e09facb863f..bf77eafa886b 100644
--- a/lib/power/power_common.c
+++ b/lib/power/power_common.c
@@ -12,6 +12,8 @@
 
 #include "power_common.h"
 
+RTE_LOG_REGISTER_DEFAULT(power_logtype, INFO);
+
 #define POWER_SYSFILE_SCALING_DRIVER   \
"/sys/devices/system/cpu/cpu%u/cpufreq/scaling_driver"
 #define POWER_SYSFILE_GOVERNOR  \
diff --git a/lib/power/power_common.h b/lib/power/power_common.h
index c1c713927621..c3fcbf4c1000 100644
--- a/lib/power/power_common.h
+++ b/lib/power/power_common.h
@@ -10,6 +10,8 @@
 
 #define RTE_POWER_INVALID_FREQ_INDEX (~0)
 
+extern int power_logtype;
+#define RTE_LOGTYPE_POWER power_logtype
 
 #ifdef RTE_LIBRTE_POWER_DEBUG
 #define POWER_DEBUG_TRACE(fmt, args...) \
diff --git a/lib/power/power_kvm_vm.c b/lib/power/power_kvm_vm.c
index 6a8109d44959..db031f43105a 100644
--- a/lib/power/power_kvm_vm.c
+++ b/lib/power/power_kvm_vm.c
@@ -8,6 +8,7 @@
 
 #include "rte_power_guest_channel.h"
 #include "guest_channel.h"
+#include "power_common.h"
 #include "power_kvm_vm.h"
 
 #define FD_PATH "/dev/virtio-ports/virtio.serial.port.poweragent"
diff --git a/lib/power/rte_power.c b/lib/power/rte_power.c
index 63a43bd8f5ae..db0e7705a9ef 100644
--- a/lib/power/rte_power.c
+++ b/lib/power/rte_power.c
@@ -10,6 +10,7 @@
 #include "rte_power.h"
 #include "power_acpi_cpufreq.h"
 #include "power_cppc_cpufreq.h"
+#include "power_common.h"
 #include "power_kvm_vm.h"
 #include "power_pstate_cpufreq.h"
 
-- 
2.39.2

[PATCH v13 10/21] ring: convert RTE_LOGTYPE_RING to dynamic type

[Stephen Hemminger]

The logtype for ring only used in library.

Signed-off-by: Stephen Hemminger 
---
 lib/log/log.c   | 1 -
 lib/log/rte_log.h   | 2 +-
 lib/ring/rte_ring.c | 3 +++
 3 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/lib/log/log.c b/lib/log/log.c
index 5ec3c16250f5..212c5d7b8669 100644
--- a/lib/log/log.c
+++ b/lib/log/log.c
@@ -352,7 +352,6 @@ struct logtype {
 
 static const struct logtype logtype_strings[] = {
{RTE_LOGTYPE_EAL,"lib.eal"},
-   {RTE_LOGTYPE_RING,   "lib.ring"},
{RTE_LOGTYPE_MEMPOOL,"lib.mempool"},
{RTE_LOGTYPE_PMD,"pmd"},
{RTE_LOGTYPE_HASH,   "lib.hash"},
diff --git a/lib/log/rte_log.h b/lib/log/rte_log.h
index a1949e606395..4a1310385cf4 100644
--- a/lib/log/rte_log.h
+++ b/lib/log/rte_log.h
@@ -28,7 +28,7 @@ extern "C" {
 /* SDK log type */
 #define RTE_LOGTYPE_EAL0 /**< Log related to eal. */
 /* was RTE_LOGTYPE_MALLOC */
-#define RTE_LOGTYPE_RING   2 /**< Log related to ring. */
+/* was RTE_LOGTYPE_RING */
 #define RTE_LOGTYPE_MEMPOOL3 /**< Log related to mempool. */
 /* was RTE_LOGTYPE_TIMER */
 #define RTE_LOGTYPE_PMD5 /**< Log related to poll mode driver. */
diff --git a/lib/ring/rte_ring.c b/lib/ring/rte_ring.c
index 057d25ff6f2f..12046419f194 100644
--- a/lib/ring/rte_ring.c
+++ b/lib/ring/rte_ring.c
@@ -26,6 +26,9 @@
 #include "rte_ring.h"
 #include "rte_ring_elem.h"
 
+RTE_LOG_REGISTER_DEFAULT(ring_logtype, INFO);
+#define RTE_LOGTYPE_RING ring_logtype
+
 TAILQ_HEAD(rte_ring_list, rte_tailq_entry);
 
 static struct rte_tailq_elem rte_ring_tailq = {
-- 
2.39.2

[PATCH v13 11/21] mempool: convert RTE_LOGTYPE_MEMPOOL to dynamic type

[Stephen Hemminger]

Convert from RTE_LOGTYPE_MEMPOOL to logtype_mempool.

Signed-off-by: Stephen Hemminger 
---
 lib/log/log.c | 1 -
 lib/log/rte_log.h | 2 +-
 lib/mempool/rte_mempool.c | 2 ++
 lib/mempool/rte_mempool.h | 8 
 lib/mempool/version.map   | 3 +++
 5 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/lib/log/log.c b/lib/log/log.c
index 212c5d7b8669..58184548bb85 100644
--- a/lib/log/log.c
+++ b/lib/log/log.c
@@ -352,7 +352,6 @@ struct logtype {
 
 static const struct logtype logtype_strings[] = {
{RTE_LOGTYPE_EAL,"lib.eal"},
-   {RTE_LOGTYPE_MEMPOOL,"lib.mempool"},
{RTE_LOGTYPE_PMD,"pmd"},
{RTE_LOGTYPE_HASH,   "lib.hash"},
{RTE_LOGTYPE_LPM,"lib.lpm"},
diff --git a/lib/log/rte_log.h b/lib/log/rte_log.h
index 4a1310385cf4..48976fea1c3e 100644
--- a/lib/log/rte_log.h
+++ b/lib/log/rte_log.h
@@ -29,7 +29,7 @@ extern "C" {
 #define RTE_LOGTYPE_EAL0 /**< Log related to eal. */
 /* was RTE_LOGTYPE_MALLOC */
 /* was RTE_LOGTYPE_RING */
-#define RTE_LOGTYPE_MEMPOOL3 /**< Log related to mempool. */
+/* was RTE_LOGTYPE_MEMPOOL */
 /* was RTE_LOGTYPE_TIMER */
 #define RTE_LOGTYPE_PMD5 /**< Log related to poll mode driver. */
 #define RTE_LOGTYPE_HASH   6 /**< Log related to hash table. */
diff --git a/lib/mempool/rte_mempool.c b/lib/mempool/rte_mempool.c
index 4d337fca8dcd..841666164797 100644
--- a/lib/mempool/rte_mempool.c
+++ b/lib/mempool/rte_mempool.c
@@ -31,6 +31,8 @@
 #include "mempool_trace.h"
 #include "rte_mempool.h"
 
+RTE_LOG_REGISTER_DEFAULT(rte_mempool_logtype, INFO);
+
 TAILQ_HEAD(rte_mempool_list, rte_tailq_entry);
 
 static struct rte_tailq_elem rte_mempool_tailq = {
diff --git a/lib/mempool/rte_mempool.h b/lib/mempool/rte_mempool.h
index a05b25d5b9e0..3cf5bcb5fd57 100644
--- a/lib/mempool/rte_mempool.h
+++ b/lib/mempool/rte_mempool.h
@@ -43,6 +43,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -175,6 +176,13 @@ struct rte_mempool_objtlr {
 
 #endif
 
+
+/**
+ * @internal Logtype used for mempool related messages.
+ */
+extern int rte_mempool_logtype;
+#define RTE_LOGTYPE_MEMPOOLrte_mempool_logtype
+
 /**
  * A list of memory where objects are stored
  */
diff --git a/lib/mempool/version.map b/lib/mempool/version.map
index d0bfedd1d875..ca6cf89ce3ea 100644
--- a/lib/mempool/version.map
+++ b/lib/mempool/version.map
@@ -57,4 +57,7 @@ INTERNAL {
# added in 21.11
rte_mempool_event_callback_register;
rte_mempool_event_callback_unregister;
+
+   # added in 23.07
+   rte_mempool_logtype;
 };
-- 
2.39.2

[PATCH v13 12/21] lpm: convert RTE_LOGTYPE_LPM to dynamic types

[Stephen Hemminger]

Split lpm and lpm6 into separate log types since they
are in different files and user may want to change log
levels for IPv4 vs IPv6.

For rib and fib libraries give them own types as well.

Signed-off-by: Stephen Hemminger 
---
 lib/fib/fib_log.h  | 4 
 lib/fib/rte_fib.c  | 3 +++
 lib/fib/rte_fib6.c | 2 ++
 lib/log/log.c  | 1 -
 lib/log/rte_log.h  | 2 +-
 lib/lpm/lpm_log.h  | 4 
 lib/lpm/rte_lpm.c  | 3 +++
 lib/lpm/rte_lpm6.c | 1 +
 lib/rib/rib_log.h  | 4 
 lib/rib/rte_rib.c  | 3 +++
 lib/rib/rte_rib6.c | 3 +++
 11 files changed, 28 insertions(+), 2 deletions(-)
 create mode 100644 lib/fib/fib_log.h
 create mode 100644 lib/lpm/lpm_log.h
 create mode 100644 lib/rib/rib_log.h

diff --git a/lib/fib/fib_log.h b/lib/fib/fib_log.h
new file mode 100644
index ..c731c820f621
--- /dev/null
+++ b/lib/fib/fib_log.h
@@ -0,0 +1,4 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
+extern int fib_logtype;
+#define RTE_LOGTYPE_LPM fib_logtype
diff --git a/lib/fib/rte_fib.c b/lib/fib/rte_fib.c
index 0c3b20e00a5a..f88e71a59d5a 100644
--- a/lib/fib/rte_fib.c
+++ b/lib/fib/rte_fib.c
@@ -17,6 +17,9 @@
 #include 
 
 #include "dir24_8.h"
+#include "fib_log.h"
+
+RTE_LOG_REGISTER_DEFAULT(fib_logtype, INFO);
 
 TAILQ_HEAD(rte_fib_list, rte_tailq_entry);
 static struct rte_tailq_elem rte_fib_tailq = {
diff --git a/lib/fib/rte_fib6.c b/lib/fib/rte_fib6.c
index 28c69b38999f..ab1d9604796f 100644
--- a/lib/fib/rte_fib6.c
+++ b/lib/fib/rte_fib6.c
@@ -10,6 +10,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -17,6 +18,7 @@
 #include 
 
 #include "trie.h"
+#include "fib_log.h"
 
 TAILQ_HEAD(rte_fib6_list, rte_tailq_entry);
 static struct rte_tailq_elem rte_fib6_tailq = {
diff --git a/lib/log/log.c b/lib/log/log.c
index 58184548bb85..ab28edec11b8 100644
--- a/lib/log/log.c
+++ b/lib/log/log.c
@@ -354,7 +354,6 @@ static const struct logtype logtype_strings[] = {
{RTE_LOGTYPE_EAL,"lib.eal"},
{RTE_LOGTYPE_PMD,"pmd"},
{RTE_LOGTYPE_HASH,   "lib.hash"},
-   {RTE_LOGTYPE_LPM,"lib.lpm"},
{RTE_LOGTYPE_METER,  "lib.meter"},
{RTE_LOGTYPE_SCHED,  "lib.sched"},
{RTE_LOGTYPE_PORT,   "lib.port"},
diff --git a/lib/log/rte_log.h b/lib/log/rte_log.h
index 48976fea1c3e..dc2454a0d9de 100644
--- a/lib/log/rte_log.h
+++ b/lib/log/rte_log.h
@@ -33,7 +33,7 @@ extern "C" {
 /* was RTE_LOGTYPE_TIMER */
 #define RTE_LOGTYPE_PMD5 /**< Log related to poll mode driver. */
 #define RTE_LOGTYPE_HASH   6 /**< Log related to hash table. */
-#define RTE_LOGTYPE_LPM7 /**< Log related to LPM. */
+/* was RTE_LOGTYPE_LPM */
 /* was RTE_LOGTYPE_KNI */
 /* was RTE_LOGTYPE_ACL */
 /* was RTE_LOGTYPE_POWER */
diff --git a/lib/lpm/lpm_log.h b/lib/lpm/lpm_log.h
new file mode 100644
index ..a0621b70a5fe
--- /dev/null
+++ b/lib/lpm/lpm_log.h
@@ -0,0 +1,4 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
+extern int lpm_logtype;
+#define RTE_LOGTYPE_LPM lpm_logtype
diff --git a/lib/lpm/rte_lpm.c b/lib/lpm/rte_lpm.c
index cdcd1b7f9e47..0ca82147866a 100644
--- a/lib/lpm/rte_lpm.c
+++ b/lib/lpm/rte_lpm.c
@@ -18,6 +18,9 @@
 #include 
 
 #include "rte_lpm.h"
+#include "lpm_log.h"
+
+RTE_LOG_REGISTER_DEFAULT(lpm_logtype, INFO);
 
 TAILQ_HEAD(rte_lpm_list, rte_tailq_entry);
 
diff --git a/lib/lpm/rte_lpm6.c b/lib/lpm/rte_lpm6.c
index 8d21aeddb83c..873cc8bc267d 100644
--- a/lib/lpm/rte_lpm6.c
+++ b/lib/lpm/rte_lpm6.c
@@ -20,6 +20,7 @@
 #include 
 
 #include "rte_lpm6.h"
+#include "lpm_log.h"
 
 #define RTE_LPM6_TBL24_NUM_ENTRIES(1 << 24)
 #define RTE_LPM6_TBL8_GROUP_NUM_ENTRIES 256
diff --git a/lib/rib/rib_log.h b/lib/rib/rib_log.h
new file mode 100644
index ..f3ee513ca854
--- /dev/null
+++ b/lib/rib/rib_log.h
@@ -0,0 +1,4 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
+extern int rib_logtype;
+#define RTE_LOGTYPE_LPM rib_logtype
diff --git a/lib/rib/rte_rib.c b/lib/rib/rte_rib.c
index 812a2597d117..a62e951a8e0e 100644
--- a/lib/rib/rte_rib.c
+++ b/lib/rib/rte_rib.c
@@ -16,6 +16,9 @@
 
 #include 
 
+RTE_LOG_REGISTER_DEFAULT(rib_logtype, INFO);
+#define RTE_LOGTYPE_LPM rib_logtype
+
 TAILQ_HEAD(rte_rib_list, rte_tailq_entry);
 static struct rte_tailq_elem rte_rib_tailq = {
.name = "RTE_RIB",
diff --git a/lib/rib/rte_rib6.c b/lib/rib/rte_rib6.c
index ae44281ae105..5765995197f8 100644
--- a/lib/rib/rte_rib6.c
+++ b/lib/rib/rte_rib6.c
@@ -9,6 +9,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -16,6 +17,8 @@
 
 #include 
 
+#include "rib_log.h"
+
 #define RTE_RIB_VALID_NODE 1
 #define RIB6_MAXDEPTH  128
 /* Maximum length of a RIB6 name. */
-- 
2.39.2

[PATCH v13 13/21] sched: convert RTE_LOGTYPE_SCHED to dynamic type

[Stephen Hemminger]

Also can remove unused RTE_LOGTYPE_METER

Signed-off-by: Stephen Hemminger 
---
 lib/log/log.c | 2 --
 lib/log/rte_log.h | 4 ++--
 lib/sched/rte_pie.c   | 1 +
 lib/sched/rte_sched.c | 5 +
 lib/sched/rte_sched_log.h | 4 
 5 files changed, 12 insertions(+), 4 deletions(-)
 create mode 100644 lib/sched/rte_sched_log.h

diff --git a/lib/log/log.c b/lib/log/log.c
index ab28edec11b8..dfaf6f13b007 100644
--- a/lib/log/log.c
+++ b/lib/log/log.c
@@ -354,8 +354,6 @@ static const struct logtype logtype_strings[] = {
{RTE_LOGTYPE_EAL,"lib.eal"},
{RTE_LOGTYPE_PMD,"pmd"},
{RTE_LOGTYPE_HASH,   "lib.hash"},
-   {RTE_LOGTYPE_METER,  "lib.meter"},
-   {RTE_LOGTYPE_SCHED,  "lib.sched"},
{RTE_LOGTYPE_PORT,   "lib.port"},
{RTE_LOGTYPE_TABLE,  "lib.table"},
{RTE_LOGTYPE_PIPELINE,   "lib.pipeline"},
diff --git a/lib/log/rte_log.h b/lib/log/rte_log.h
index dc2454a0d9de..f185fcbc5a94 100644
--- a/lib/log/rte_log.h
+++ b/lib/log/rte_log.h
@@ -37,8 +37,8 @@ extern "C" {
 /* was RTE_LOGTYPE_KNI */
 /* was RTE_LOGTYPE_ACL */
 /* was RTE_LOGTYPE_POWER */
-#define RTE_LOGTYPE_METER 11 /**< Log related to QoS meter. */
-#define RTE_LOGTYPE_SCHED 12 /**< Log related to QoS port scheduler. */
+/* was RTE_LOGTYPE_METER */
+/* was RTE_LOGTYPE_SCHED */
 #define RTE_LOGTYPE_PORT  13 /**< Log related to port. */
 #define RTE_LOGTYPE_TABLE 14 /**< Log related to table. */
 #define RTE_LOGTYPE_PIPELINE  15 /**< Log related to pipeline. */
diff --git a/lib/sched/rte_pie.c b/lib/sched/rte_pie.c
index 947e2a059f6f..cce0ce762da8 100644
--- a/lib/sched/rte_pie.c
+++ b/lib/sched/rte_pie.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 
+#include "rte_sched_log.h"
 #include "rte_pie.h"
 
 #ifdef __INTEL_COMPILER
diff --git a/lib/sched/rte_sched.c b/lib/sched/rte_sched.c
index 751f6cf84197..96cd863b5467 100644
--- a/lib/sched/rte_sched.c
+++ b/lib/sched/rte_sched.c
@@ -16,9 +16,12 @@
 #include 
 
 #include "rte_sched.h"
+#include "rte_sched_log.h"
 #include "rte_sched_common.h"
+
 #include "rte_approx.h"
 
+
 #ifdef __INTEL_COMPILER
 #pragma warning(disable:2259) /* conversion may lose significant bits */
 #endif
@@ -2999,3 +3002,5 @@ rte_sched_port_dequeue(struct rte_sched_port *port, 
struct rte_mbuf **pkts, uint
 
return count;
 }
+
+RTE_LOG_REGISTER_DEFAULT(sched_logtype, INFO);
diff --git a/lib/sched/rte_sched_log.h b/lib/sched/rte_sched_log.h
new file mode 100644
index ..fde051f49d62
--- /dev/null
+++ b/lib/sched/rte_sched_log.h
@@ -0,0 +1,4 @@
+/* SPDX-License-Identifier: BSD-3-Clause */
+
+extern int sched_logtype;
+#define RTE_LOGTYPE_SCHED sched_logtype
-- 
2.39.2

[PATCH v13 14/21] examples/ipsec-secgw: replace RTE_LOGTYPE_PORT

[Stephen Hemminger]

Looks like some code got copy/paste in to the IPSEC gateway
example from another place. Shouldn't be using RTE_LOGTYPE_PORT
here.

Fixes: ec17993a145a ("examples/ipsec-secgw: support security offload")
Acked-by: Akhil Goyal 
Signed-off-by: Stephen Hemminger 
---
 examples/ipsec-secgw/sa.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/examples/ipsec-secgw/sa.c b/examples/ipsec-secgw/sa.c
index 6ae0e49fd7f8..c4bac17cd77c 100644
--- a/examples/ipsec-secgw/sa.c
+++ b/examples/ipsec-secgw/sa.c
@@ -1128,7 +1128,7 @@ check_eth_dev_caps(uint16_t portid, uint32_t inbound, 
uint32_t tso)
if (inbound) {
if ((dev_info.rx_offload_capa &
RTE_ETH_RX_OFFLOAD_SECURITY) == 0) {
-   RTE_LOG(WARNING, PORT,
+   RTE_LOG(WARNING, IPSEC,
"hardware RX IPSec offload is not supported\n");
return -EINVAL;
}
@@ -1136,13 +1136,13 @@ check_eth_dev_caps(uint16_t portid, uint32_t inbound, 
uint32_t tso)
} else { /* outbound */
if ((dev_info.tx_offload_capa &
RTE_ETH_TX_OFFLOAD_SECURITY) == 0) {
-   RTE_LOG(WARNING, PORT,
+   RTE_LOG(WARNING, IPSEC,
"hardware TX IPSec offload is not supported\n");
return -EINVAL;
}
if (tso && (dev_info.tx_offload_capa &
RTE_ETH_TX_OFFLOAD_TCP_TSO) == 0) {
-   RTE_LOG(WARNING, PORT,
+   RTE_LOG(WARNING, IPSEC,
"hardware TCP TSO offload is not supported\n");
return -EINVAL;
}
-- 
2.39.2

[PATCH v13 15/21] port: convert RTE_LOGTYPE_PORT to dynamic type

[Stephen Hemminger]

Split up the single static RTE_LOGTYPE_PORT into separate
sub types for each component: port.ethdev, port.evendev, ...

Signed-off-by: Stephen Hemminger 
---
 lib/log/log.c   | 1 -
 lib/log/rte_log.h   | 2 +-
 lib/port/rte_port_ethdev.c  | 3 +++
 lib/port/rte_port_eventdev.c| 4 
 lib/port/rte_port_fd.c  | 3 +++
 lib/port/rte_port_frag.c| 3 +++
 lib/port/rte_port_ras.c | 3 +++
 lib/port/rte_port_ring.c| 3 +++
 lib/port/rte_port_sched.c   | 3 +++
 lib/port/rte_port_source_sink.c | 3 +++
 lib/port/rte_port_sym_crypto.c  | 3 +++
 11 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/lib/log/log.c b/lib/log/log.c
index dfaf6f13b007..c089fc66affe 100644
--- a/lib/log/log.c
+++ b/lib/log/log.c
@@ -354,7 +354,6 @@ static const struct logtype logtype_strings[] = {
{RTE_LOGTYPE_EAL,"lib.eal"},
{RTE_LOGTYPE_PMD,"pmd"},
{RTE_LOGTYPE_HASH,   "lib.hash"},
-   {RTE_LOGTYPE_PORT,   "lib.port"},
{RTE_LOGTYPE_TABLE,  "lib.table"},
{RTE_LOGTYPE_PIPELINE,   "lib.pipeline"},
{RTE_LOGTYPE_CRYPTODEV,  "lib.cryptodev"},
diff --git a/lib/log/rte_log.h b/lib/log/rte_log.h
index f185fcbc5a94..b11aec69af78 100644
--- a/lib/log/rte_log.h
+++ b/lib/log/rte_log.h
@@ -39,7 +39,7 @@ extern "C" {
 /* was RTE_LOGTYPE_POWER */
 /* was RTE_LOGTYPE_METER */
 /* was RTE_LOGTYPE_SCHED */
-#define RTE_LOGTYPE_PORT  13 /**< Log related to port. */
+/* was RTE_LOGTYPE_PORT */
 #define RTE_LOGTYPE_TABLE 14 /**< Log related to table. */
 #define RTE_LOGTYPE_PIPELINE  15 /**< Log related to pipeline. */
 /* was RTE_LOGTYPE_MBUF */
diff --git a/lib/port/rte_port_ethdev.c b/lib/port/rte_port_ethdev.c
index 0da7890261e9..6685d304a6e9 100644
--- a/lib/port/rte_port_ethdev.c
+++ b/lib/port/rte_port_ethdev.c
@@ -10,6 +10,9 @@
 
 #include "rte_port_ethdev.h"
 
+RTE_LOG_REGISTER_SUFFIX(port_ethdev_logtype, ethdev, INFO);
+#define RTE_LOGTYPE_PORT port_ethdev_logtype
+
 /*
  * Port ETHDEV Reader
  */
diff --git a/lib/port/rte_port_eventdev.c b/lib/port/rte_port_eventdev.c
index fd7dac9a5661..04447bd7f7bc 100644
--- a/lib/port/rte_port_eventdev.c
+++ b/lib/port/rte_port_eventdev.c
@@ -5,11 +5,15 @@
 #include 
 #include 
 
+#include 
 #include 
 #include 
 
 #include "rte_port_eventdev.h"
 
+RTE_LOG_REGISTER_SUFFIX(port_eventdev_logtype, eventdev, INFO);
+#define RTE_LOGTYPE_PORT port_eventdev_logtype
+
 /*
  * Port EVENTDEV Reader
  */
diff --git a/lib/port/rte_port_fd.c b/lib/port/rte_port_fd.c
index 932ecd324e05..b2412e7706ee 100644
--- a/lib/port/rte_port_fd.c
+++ b/lib/port/rte_port_fd.c
@@ -10,6 +10,9 @@
 
 #include "rte_port_fd.h"
 
+RTE_LOG_REGISTER_SUFFIX(port_fd_logtype, fd, INFO);
+#define RTE_LOGTYPE_PORT port_fd_logtype
+
 /*
  * Port FD Reader
  */
diff --git a/lib/port/rte_port_frag.c b/lib/port/rte_port_frag.c
index e1f1892176c4..9adcbba47da1 100644
--- a/lib/port/rte_port_frag.c
+++ b/lib/port/rte_port_frag.c
@@ -7,6 +7,9 @@
 
 #include "rte_port_frag.h"
 
+RTE_LOG_REGISTER_SUFFIX(port_frag_logtype, frag, INFO);
+#define RTE_LOGTYPE_PORT port_frag_logtype
+
 /* Max number of fragments per packet allowed */
 #defineRTE_PORT_FRAG_MAX_FRAGS_PER_PACKET 0x80
 
diff --git a/lib/port/rte_port_ras.c b/lib/port/rte_port_ras.c
index e5de57da42ea..5a610b1ba5b5 100644
--- a/lib/port/rte_port_ras.c
+++ b/lib/port/rte_port_ras.c
@@ -9,6 +9,9 @@
 
 #include "rte_port_ras.h"
 
+RTE_LOG_REGISTER_SUFFIX(port_ras_logtype, ras, INFO);
+#define RTE_LOGTYPE_PORT port_ras_logtype
+
 #ifndef RTE_PORT_RAS_N_BUCKETS
 #define RTE_PORT_RAS_N_BUCKETS 4094
 #endif
diff --git a/lib/port/rte_port_ring.c b/lib/port/rte_port_ring.c
index 52b2d8e557f0..32a90e836579 100644
--- a/lib/port/rte_port_ring.c
+++ b/lib/port/rte_port_ring.c
@@ -10,6 +10,9 @@
 
 #include "rte_port_ring.h"
 
+RTE_LOG_REGISTER_SUFFIX(port_ring_logtype, ring, INFO);
+#define RTE_LOGTYPE_PORT port_ring_logtype
+
 /*
  * Port RING Reader
  */
diff --git a/lib/port/rte_port_sched.c b/lib/port/rte_port_sched.c
index 8a7d815ef323..6e0a8aba5419 100644
--- a/lib/port/rte_port_sched.c
+++ b/lib/port/rte_port_sched.c
@@ -7,6 +7,9 @@
 
 #include "rte_port_sched.h"
 
+RTE_LOG_REGISTER_SUFFIX(port_sched_logtype, sched, INFO);
+#define RTE_LOGTYPE_PORT port_sched_logtype
+
 /*
  * Reader
  */
diff --git a/lib/port/rte_port_source_sink.c b/lib/port/rte_port_source_sink.c
index 7d73adc1e79e..e9cdadbceb8f 100644
--- a/lib/port/rte_port_source_sink.c
+++ b/lib/port/rte_port_source_sink.c
@@ -15,6 +15,9 @@
 
 #include "rte_port_source_sink.h"
 
+RTE_LOG_REGISTER_SUFFIX(port_source_logtype, source, INFO);
+#define RTE_LOGTYPE_PORT port_source_logtype
+
 /*
  * Port SOURCE
  */
diff --git a/lib/port/rte_port_sym_crypto.c b/lib/port/rte_port_sym_crypto.c
index 

[PATCH v13 16/21] hash: move rte_thash_gfni stubs out of header file

[Stephen Hemminger]

Having stubs in header file makes it harder to update
RTE_LOG(). Also modify to only print warning once.

Signed-off-by: Stephen Hemminger 
---
 lib/hash/meson.build  |  8 ++-
 lib/hash/rte_thash_gfni.c | 47 +++
 lib/hash/rte_thash_gfni.h | 30 -
 lib/hash/version.map  |  4 
 4 files changed, 67 insertions(+), 22 deletions(-)
 create mode 100644 lib/hash/rte_thash_gfni.c

diff --git a/lib/hash/meson.build b/lib/hash/meson.build
index 2f757d45f9bc..e56ee8572564 100644
--- a/lib/hash/meson.build
+++ b/lib/hash/meson.build
@@ -17,7 +17,13 @@ indirect_headers += files(
 'rte_thash_x86_gfni.h',
 )
 
-sources = files('rte_cuckoo_hash.c', 'rte_fbk_hash.c', 'rte_thash.c')
+sources = files(
+'rte_cuckoo_hash.c',
+'rte_fbk_hash.c',
+'rte_thash.c',
+'rte_thash_gfni.c'
+)
+
 deps += ['net']
 deps += ['ring']
 deps += ['rcu']
diff --git a/lib/hash/rte_thash_gfni.c b/lib/hash/rte_thash_gfni.c
new file mode 100644
index ..eb334185725c
--- /dev/null
+++ b/lib/hash/rte_thash_gfni.c
@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2021 Intel Corporation
+ */
+
+#include 
+
+#include 
+#include 
+#include 
+
+#ifndef RTE_THASH_GFNI_DEFINED
+
+uint32_t
+rte_thash_gfni(const uint64_t *mtrx __rte_unused,
+  const uint8_t *key __rte_unused, int len __rte_unused)
+{
+   static bool warned;
+
+   if (!warned) {
+   warned = true;
+   RTE_LOG(ERR, HASH,
+   "%s is undefined under given arch\n", __func__);
+   }
+
+   return 0;
+}
+
+void
+rte_thash_gfni_bulk(const uint64_t *mtrx __rte_unused,
+   int len __rte_unused, uint8_t *tuple[] __rte_unused,
+   uint32_t val[], uint32_t num)
+{
+   unsigned int i;
+
+   static bool warned;
+
+   if (!warned) {
+   warned = true;
+   RTE_LOG(ERR, HASH,
+   "%s is undefined under given arch\n", __func__);
+   }
+
+   for (i = 0; i < num; i++)
+   val[i] = 0;
+}
+
+#endif
diff --git a/lib/hash/rte_thash_gfni.h b/lib/hash/rte_thash_gfni.h
index ef90faa302d1..4fc92984077e 100644
--- a/lib/hash/rte_thash_gfni.h
+++ b/lib/hash/rte_thash_gfni.h
@@ -9,13 +9,14 @@
 extern "C" {
 #endif
 
+#include 
+
 #include 
-#include 
+#include 
+#include 
 
 #ifdef RTE_ARCH_X86
-
 #include 
-
 #endif
 
 #ifndef RTE_THASH_GFNI_DEFINED
@@ -38,13 +39,8 @@ extern "C" {
  *  Calculated Toeplitz hash value.
  */
 __rte_experimental
-static inline uint32_t
-rte_thash_gfni(const uint64_t *mtrx __rte_unused,
-   const uint8_t *key __rte_unused, int len __rte_unused)
-{
-   RTE_LOG(ERR, HASH, "%s is undefined under given arch\n", __func__);
-   return 0;
-}
+uint32_t
+rte_thash_gfni(const uint64_t *mtrx, const uint8_t *key, int len);
 
 /**
  * Bulk implementation for Toeplitz hash.
@@ -67,17 +63,9 @@ rte_thash_gfni(const uint64_t *mtrx __rte_unused,
  *  Number of tuples to hash.
  */
 __rte_experimental
-static inline void
-rte_thash_gfni_bulk(const uint64_t *mtrx __rte_unused,
-   int len __rte_unused, uint8_t *tuple[] __rte_unused,
-   uint32_t val[], uint32_t num)
-{
-   unsigned int i;
-
-   RTE_LOG(ERR, HASH, "%s is undefined under given arch\n", __func__);
-   for (i = 0; i < num; i++)
-   val[i] = 0;
-}
+void
+rte_thash_gfni_bulk(const uint64_t *mtrx, int len, uint8_t *tuple[],
+   uint32_t val[], uint32_t num);
 
 #endif /* RTE_THASH_GFNI_DEFINED */
 
diff --git a/lib/hash/version.map b/lib/hash/version.map
index daaa9a8901db..8288c6e7967e 100644
--- a/lib/hash/version.map
+++ b/lib/hash/version.map
@@ -51,4 +51,8 @@ EXPERIMENTAL {
rte_thash_complete_matrix;
rte_thash_get_gfni_matrices;
rte_thash_gfni_supported;
+
+   # added in 22.07
+   rte_thash_gfni;
+   rte_thash_gfni_bulk;
 };
-- 
2.39.2

[PATCH v13 17/21] hash: move rte_hash_set_alg out header

[Stephen Hemminger]

The code for setting algorithm for hash is not at all perf sensitive,
and doing it inline has a couple of problems. First, it means that if
multiple files include the header, then the initialization gets done
multiple times. But also, it makes it harder to fix usage of RTE_LOG().

Despite what the checking script say. This is not an ABI change, the
previous version inlined the same code; therefore both old and new code
will work the same.

Signed-off-by: Stephen Hemminger 
Acked-by: Ruifeng Wang 
---
 lib/hash/meson.build |  1 +
 lib/hash/rte_crc_arm64.h |  8 ++---
 lib/hash/rte_crc_x86.h   | 10 +++---
 lib/hash/rte_hash_crc.c  | 68 
 lib/hash/rte_hash_crc.h  | 48 ++--
 lib/hash/version.map |  7 +
 6 files changed, 88 insertions(+), 54 deletions(-)
 create mode 100644 lib/hash/rte_hash_crc.c

diff --git a/lib/hash/meson.build b/lib/hash/meson.build
index e56ee8572564..c345c6f561fc 100644
--- a/lib/hash/meson.build
+++ b/lib/hash/meson.build
@@ -19,6 +19,7 @@ indirect_headers += files(
 
 sources = files(
 'rte_cuckoo_hash.c',
+'rte_hash_crc.c',
 'rte_fbk_hash.c',
 'rte_thash.c',
 'rte_thash_gfni.c'
diff --git a/lib/hash/rte_crc_arm64.h b/lib/hash/rte_crc_arm64.h
index c9f52510871b..414fe065caa8 100644
--- a/lib/hash/rte_crc_arm64.h
+++ b/lib/hash/rte_crc_arm64.h
@@ -53,7 +53,7 @@ crc32c_arm64_u64(uint64_t data, uint32_t init_val)
 static inline uint32_t
 rte_hash_crc_1byte(uint8_t data, uint32_t init_val)
 {
-   if (likely(crc32_alg & CRC32_ARM64))
+   if (likely(rte_hash_crc32_alg & CRC32_ARM64))
return crc32c_arm64_u8(data, init_val);
 
return crc32c_1byte(data, init_val);
@@ -67,7 +67,7 @@ rte_hash_crc_1byte(uint8_t data, uint32_t init_val)
 static inline uint32_t
 rte_hash_crc_2byte(uint16_t data, uint32_t init_val)
 {
-   if (likely(crc32_alg & CRC32_ARM64))
+   if (likely(rte_hash_crc32_alg & CRC32_ARM64))
return crc32c_arm64_u16(data, init_val);
 
return crc32c_2bytes(data, init_val);
@@ -81,7 +81,7 @@ rte_hash_crc_2byte(uint16_t data, uint32_t init_val)
 static inline uint32_t
 rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
 {
-   if (likely(crc32_alg & CRC32_ARM64))
+   if (likely(rte_hash_crc32_alg & CRC32_ARM64))
return crc32c_arm64_u32(data, init_val);
 
return crc32c_1word(data, init_val);
@@ -95,7 +95,7 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
 static inline uint32_t
 rte_hash_crc_8byte(uint64_t data, uint32_t init_val)
 {
-   if (likely(crc32_alg & CRC32_ARM64))
+   if (likely(rte_hash_crc32_alg & CRC32_ARM64))
return crc32c_arm64_u64(data, init_val);
 
return crc32c_2words(data, init_val);
diff --git a/lib/hash/rte_crc_x86.h b/lib/hash/rte_crc_x86.h
index 205bc182be77..3b865e251db2 100644
--- a/lib/hash/rte_crc_x86.h
+++ b/lib/hash/rte_crc_x86.h
@@ -67,7 +67,7 @@ crc32c_sse42_u64(uint64_t data, uint64_t init_val)
 static inline uint32_t
 rte_hash_crc_1byte(uint8_t data, uint32_t init_val)
 {
-   if (likely(crc32_alg & CRC32_SSE42))
+   if (likely(rte_hash_crc32_alg & CRC32_SSE42))
return crc32c_sse42_u8(data, init_val);
 
return crc32c_1byte(data, init_val);
@@ -81,7 +81,7 @@ rte_hash_crc_1byte(uint8_t data, uint32_t init_val)
 static inline uint32_t
 rte_hash_crc_2byte(uint16_t data, uint32_t init_val)
 {
-   if (likely(crc32_alg & CRC32_SSE42))
+   if (likely(rte_hash_crc32_alg & CRC32_SSE42))
return crc32c_sse42_u16(data, init_val);
 
return crc32c_2bytes(data, init_val);
@@ -95,7 +95,7 @@ rte_hash_crc_2byte(uint16_t data, uint32_t init_val)
 static inline uint32_t
 rte_hash_crc_4byte(uint32_t data, uint32_t init_val)
 {
-   if (likely(crc32_alg & CRC32_SSE42))
+   if (likely(rte_hash_crc32_alg & CRC32_SSE42))
return crc32c_sse42_u32(data, init_val);
 
return crc32c_1word(data, init_val);
@@ -110,11 +110,11 @@ static inline uint32_t
 rte_hash_crc_8byte(uint64_t data, uint32_t init_val)
 {
 #ifdef RTE_ARCH_X86_64
-   if (likely(crc32_alg == CRC32_SSE42_x64))
+   if (likely(rte_hash_crc32_alg == CRC32_SSE42_x64))
return crc32c_sse42_u64(data, init_val);
 #endif
 
-   if (likely(crc32_alg & CRC32_SSE42))
+   if (likely(rte_hash_crc32_alg & CRC32_SSE42))
return crc32c_sse42_u64_mimic(data, init_val);
 
return crc32c_2words(data, init_val);
diff --git a/lib/hash/rte_hash_crc.c b/lib/hash/rte_hash_crc.c
new file mode 100644
index ..1439d8a71f6a
--- /dev/null
+++ b/lib/hash/rte_hash_crc.c
@@ -0,0 +1,68 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2010-2014 Intel Corporation
+ */
+
+#include 
+#include 
+
+#include "rte_hash_crc.h"
+
+RTE_LOG_REGISTER_SUFFIX(hash_crc_logtype, crc, INFO);
+#define RTE_LOGTYPE_HASH_CRC hash_crc_logtype
+
+uint8_t rte_hash_crc32_alg = CRC32_SW;
+

[PATCH v13 18/21] hash: convert RTE_LOGTYPE_HASH to dynamic type

[Stephen Hemminger]

Use dynamic type for hash and add subtypes for crc and gfni.

Signed-off-by: Stephen Hemminger 
---
 lib/hash/rte_cuckoo_hash.c | 5 +
 lib/hash/rte_fbk_hash.c| 5 +
 lib/hash/rte_thash.c   | 3 +++
 lib/hash/rte_thash_gfni.c  | 3 +++
 lib/log/log.c  | 1 -
 lib/log/rte_log.h  | 2 +-
 6 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/lib/hash/rte_cuckoo_hash.c b/lib/hash/rte_cuckoo_hash.c
index d92a903bb39b..98d4366770d4 100644
--- a/lib/hash/rte_cuckoo_hash.c
+++ b/lib/hash/rte_cuckoo_hash.c
@@ -24,6 +24,11 @@
 #include 
 
 #include "rte_hash.h"
+
+/* needs to be before rte_cuckoo_hash.h */
+RTE_LOG_REGISTER_DEFAULT(hash_logtype, INFO);
+#define RTE_LOGTYPE_HASH hash_logtype
+
 #include "rte_cuckoo_hash.h"
 
 /* Mask of all flags supported by this version */
diff --git a/lib/hash/rte_fbk_hash.c b/lib/hash/rte_fbk_hash.c
index 538b23a4030a..b4c4c191abdc 100644
--- a/lib/hash/rte_fbk_hash.c
+++ b/lib/hash/rte_fbk_hash.c
@@ -8,6 +8,8 @@
 #include 
 
 #include 
+
+#include 
 #include 
 #include 
 #include 
@@ -18,6 +20,9 @@
 
 #include "rte_fbk_hash.h"
 
+RTE_LOG_REGISTER_SUFFIX(fbk_hash_logtype, fbk, INFO);
+#define RTE_LOGTYPE_HASH fbk_hash_logtype
+
 TAILQ_HEAD(rte_fbk_hash_list, rte_tailq_entry);
 
 static struct rte_tailq_elem rte_fbk_hash_tailq = {
diff --git a/lib/hash/rte_thash.c b/lib/hash/rte_thash.c
index 2228af576bb9..fbee0b2188e5 100644
--- a/lib/hash/rte_thash.c
+++ b/lib/hash/rte_thash.c
@@ -13,6 +13,9 @@
 #include 
 #include 
 
+RTE_LOG_REGISTER_SUFFIX(thash_logtype, thash, INFO);
+#define RTE_LOGTYPE_HASH thash_logtype
+
 #define THASH_NAME_LEN 64
 #define TOEPLITZ_HASH_LEN  32
 
diff --git a/lib/hash/rte_thash_gfni.c b/lib/hash/rte_thash_gfni.c
index eb334185725c..35206d575153 100644
--- a/lib/hash/rte_thash_gfni.c
+++ b/lib/hash/rte_thash_gfni.c
@@ -10,6 +10,9 @@
 
 #ifndef RTE_THASH_GFNI_DEFINED
 
+RTE_LOG_REGISTER_SUFFIX(hash_gfni_logtype, gfni, INFO);
+#define RTE_LOGTYPE_HASH hash_gfni_logtype
+
 uint32_t
 rte_thash_gfni(const uint64_t *mtrx __rte_unused,
   const uint8_t *key __rte_unused, int len __rte_unused)
diff --git a/lib/log/log.c b/lib/log/log.c
index c089fc66affe..3ce9300754dd 100644
--- a/lib/log/log.c
+++ b/lib/log/log.c
@@ -353,7 +353,6 @@ struct logtype {
 static const struct logtype logtype_strings[] = {
{RTE_LOGTYPE_EAL,"lib.eal"},
{RTE_LOGTYPE_PMD,"pmd"},
-   {RTE_LOGTYPE_HASH,   "lib.hash"},
{RTE_LOGTYPE_TABLE,  "lib.table"},
{RTE_LOGTYPE_PIPELINE,   "lib.pipeline"},
{RTE_LOGTYPE_CRYPTODEV,  "lib.cryptodev"},
diff --git a/lib/log/rte_log.h b/lib/log/rte_log.h
index b11aec69af78..4d1b892ab689 100644
--- a/lib/log/rte_log.h
+++ b/lib/log/rte_log.h
@@ -32,7 +32,7 @@ extern "C" {
 /* was RTE_LOGTYPE_MEMPOOL */
 /* was RTE_LOGTYPE_TIMER */
 #define RTE_LOGTYPE_PMD5 /**< Log related to poll mode driver. */
-#define RTE_LOGTYPE_HASH   6 /**< Log related to hash table. */
+/* was RTE_LOGTYPE_HASH */
 /* was RTE_LOGTYPE_LPM */
 /* was RTE_LOGTYPE_KNI */
 /* was RTE_LOGTYPE_ACL */
-- 
2.39.2

[PATCH v13 19/21] table: convert RTE_LOGTYPE_TABLE to dynamic type

[Stephen Hemminger]

Make an alias for RTE_LOGTYPE_TABLE in rte_table.h
and use it.

Signed-off-by: Stephen Hemminger 
---
 lib/log/log.c | 1 -
 lib/log/rte_log.h | 2 +-
 lib/table/meson.build | 1 +
 lib/table/rte_table.c | 8 
 lib/table/rte_table.h | 4 
 5 files changed, 14 insertions(+), 2 deletions(-)
 create mode 100644 lib/table/rte_table.c

diff --git a/lib/log/log.c b/lib/log/log.c
index 3ce9300754dd..1ad2f80e67cc 100644
--- a/lib/log/log.c
+++ b/lib/log/log.c
@@ -353,7 +353,6 @@ struct logtype {
 static const struct logtype logtype_strings[] = {
{RTE_LOGTYPE_EAL,"lib.eal"},
{RTE_LOGTYPE_PMD,"pmd"},
-   {RTE_LOGTYPE_TABLE,  "lib.table"},
{RTE_LOGTYPE_PIPELINE,   "lib.pipeline"},
{RTE_LOGTYPE_CRYPTODEV,  "lib.cryptodev"},
{RTE_LOGTYPE_EVENTDEV,   "lib.eventdev"},
diff --git a/lib/log/rte_log.h b/lib/log/rte_log.h
index 4d1b892ab689..6418479ee266 100644
--- a/lib/log/rte_log.h
+++ b/lib/log/rte_log.h
@@ -40,7 +40,7 @@ extern "C" {
 /* was RTE_LOGTYPE_METER */
 /* was RTE_LOGTYPE_SCHED */
 /* was RTE_LOGTYPE_PORT */
-#define RTE_LOGTYPE_TABLE 14 /**< Log related to table. */
+/* was RTE_LOGTYPE_TABLE */
 #define RTE_LOGTYPE_PIPELINE  15 /**< Log related to pipeline. */
 /* was RTE_LOGTYPE_MBUF */
 #define RTE_LOGTYPE_CRYPTODEV 17 /**< Log related to cryptodev. */
diff --git a/lib/table/meson.build b/lib/table/meson.build
index f8cef24b5918..e753b6fb23d8 100644
--- a/lib/table/meson.build
+++ b/lib/table/meson.build
@@ -7,6 +7,7 @@ sources = files(
 'rte_swx_table_learner.c',
 'rte_swx_table_selector.c',
 'rte_swx_table_wm.c',
+'rte_table.c',
 'rte_table_acl.c',
 'rte_table_array.c',
 'rte_table_hash_cuckoo.c',
diff --git a/lib/table/rte_table.c b/lib/table/rte_table.c
new file mode 100644
index ..4a083f4aaf0c
--- /dev/null
+++ b/lib/table/rte_table.c
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2010-2014 Intel Corporation
+ */
+
+#include 
+#include 
+
+RTE_LOG_REGISTER_DEFAULT(table_logtype, INFO);
diff --git a/lib/table/rte_table.h b/lib/table/rte_table.h
index 9a5faf0e323a..39654e51e8b2 100644
--- a/lib/table/rte_table.h
+++ b/lib/table/rte_table.h
@@ -264,6 +264,10 @@ struct rte_table_ops {
rte_table_op_stats_read f_stats;  /**< Stats */
 };
 
+/** Internal Logtype used */
+extern int table_logtype;
+#define RTE_LOGTYPE_TABLE table_logtype
+
 #ifdef __cplusplus
 }
 #endif
-- 
2.39.2

[PATCH v13 20/21] app/test: remove use of RTE_LOGTYPE_PIPELINE

[Stephen Hemminger]

Instead of using static type PIPELINE for logging in test application
use stderr instead.  If not testing RTE_LOG() better to not use
it since log also goes to syslog.

Signed-off-by: Stephen Hemminger 
---
 app/test/test_table_acl.c  | 50 --
 app/test/test_table_pipeline.c | 40 +--
 2 files changed, 43 insertions(+), 47 deletions(-)

diff --git a/app/test/test_table_acl.c b/app/test/test_table_acl.c
index e66f06b84d0a..dff9bddfb948 100644
--- a/app/test/test_table_acl.c
+++ b/app/test/test_table_acl.c
@@ -165,7 +165,7 @@ parse_cb_ipv4_rule(char *str, struct 
rte_table_acl_rule_add_params *v)
&v->field_value[SRC_FIELD_IPV4].value.u32,
&v->field_value[SRC_FIELD_IPV4].mask_range.u32);
if (rc != 0) {
-   RTE_LOG(ERR, PIPELINE, "failed to read src address/mask: %s\n",
+   fprintf(stderr, "failed to read src address/mask: %s\n",
in[CB_FLD_SRC_ADDR]);
return rc;
}
@@ -178,7 +178,7 @@ parse_cb_ipv4_rule(char *str, struct 
rte_table_acl_rule_add_params *v)
&v->field_value[DST_FIELD_IPV4].value.u32,
&v->field_value[DST_FIELD_IPV4].mask_range.u32);
if (rc != 0) {
-   RTE_LOG(ERR, PIPELINE, "failed to read dest address/mask: %s\n",
+   fprintf(stderr, "failed to read dest address/mask: %s\n",
in[CB_FLD_DST_ADDR]);
return rc;
}
@@ -190,7 +190,7 @@ parse_cb_ipv4_rule(char *str, struct 
rte_table_acl_rule_add_params *v)
&v->field_value[SRCP_FIELD_IPV4].value.u16,
&v->field_value[SRCP_FIELD_IPV4].mask_range.u16);
if (rc != 0) {
-   RTE_LOG(ERR, PIPELINE, "failed to read source port range: %s\n",
+   fprintf(stderr, "failed to read source port range: %s\n",
in[CB_FLD_SRC_PORT_RANGE]);
return rc;
}
@@ -202,7 +202,7 @@ parse_cb_ipv4_rule(char *str, struct 
rte_table_acl_rule_add_params *v)
&v->field_value[DSTP_FIELD_IPV4].value.u16,
&v->field_value[DSTP_FIELD_IPV4].mask_range.u16);
if (rc != 0) {
-   RTE_LOG(ERR, PIPELINE, "failed to read dest port range: %s\n",
+   fprintf(stderr, "failed to read dest port range: %s\n",
in[CB_FLD_DST_PORT_RANGE]);
return rc;
}
@@ -254,7 +254,7 @@ parse_cb_ipv4_rule_del(char *str, struct 
rte_table_acl_rule_delete_params *v)
&v->field_value[SRC_FIELD_IPV4].value.u32,
&v->field_value[SRC_FIELD_IPV4].mask_range.u32);
if (rc != 0) {
-   RTE_LOG(ERR, PIPELINE, "failed to read src address/mask: %s\n",
+   fprintf(stderr, "failed to read src address/mask: %s\n",
in[CB_FLD_SRC_ADDR]);
return rc;
}
@@ -267,7 +267,7 @@ parse_cb_ipv4_rule_del(char *str, struct 
rte_table_acl_rule_delete_params *v)
&v->field_value[DST_FIELD_IPV4].value.u32,
&v->field_value[DST_FIELD_IPV4].mask_range.u32);
if (rc != 0) {
-   RTE_LOG(ERR, PIPELINE, "failed to read dest address/mask: %s\n",
+   fprintf(stderr, "failed to read dest address/mask: %s\n",
in[CB_FLD_DST_ADDR]);
return rc;
}
@@ -279,7 +279,7 @@ parse_cb_ipv4_rule_del(char *str, struct 
rte_table_acl_rule_delete_params *v)
&v->field_value[SRCP_FIELD_IPV4].value.u16,
&v->field_value[SRCP_FIELD_IPV4].mask_range.u16);
if (rc != 0) {
-   RTE_LOG(ERR, PIPELINE, "failed to read source port range: %s\n",
+   fprintf(stderr, "failed to read source port range: %s\n",
in[CB_FLD_SRC_PORT_RANGE]);
return rc;
}
@@ -291,7 +291,7 @@ parse_cb_ipv4_rule_del(char *str, struct 
rte_table_acl_rule_delete_params *v)
&v->field_value[DSTP_FIELD_IPV4].value.u16,
&v->field_value[DSTP_FIELD_IPV4].mask_range.u16);
if (rc != 0) {
-   RTE_LOG(ERR, PIPELINE, "failed to read dest port range: %s\n",
+   fprintf(stderr, "failed to read dest port range: %s\n",
in[CB_FLD_DST_PORT_RANGE]);
return rc;
}
@@ -346,7 +346,7 @@ setup_acl_pipeline(void)
/* Pipeline configuration */
p = rte_pipeline_create(&pipeline_params);
if (p == NULL) {
-   RTE_LOG(INFO, PIPELINE, "%s: Failed to configure pipeline\n",
+   fprintf(stderr, "%s: Failed to configure pipeline\n",
__func__);
goto fail;
}
@@ -410,7 +410,7 @@ setup_acl_pipeline(void)
table_params.f_action_miss = NULL;
table_params.action_data_size = 0;
 
-   RTE_LOG(INFO, PIPELINE, 

[PATCH v13 21/21] pipeline: convert RTE_LOGTYPE_PIPELINE to dynamic type

[Stephen Hemminger]

Convert RTE_LOGTYPE_PIPELINE to a dynamic value.

Signed-off-by: Stephen Hemminger 
---
 lib/log/log.c   | 1 -
 lib/log/rte_log.h   | 2 +-
 lib/pipeline/rte_pipeline.c | 2 ++
 lib/pipeline/rte_pipeline.h | 5 +
 4 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/lib/log/log.c b/lib/log/log.c
index 1ad2f80e67cc..f58e40e6a9f8 100644
--- a/lib/log/log.c
+++ b/lib/log/log.c
@@ -353,7 +353,6 @@ struct logtype {
 static const struct logtype logtype_strings[] = {
{RTE_LOGTYPE_EAL,"lib.eal"},
{RTE_LOGTYPE_PMD,"pmd"},
-   {RTE_LOGTYPE_PIPELINE,   "lib.pipeline"},
{RTE_LOGTYPE_CRYPTODEV,  "lib.cryptodev"},
{RTE_LOGTYPE_EVENTDEV,   "lib.eventdev"},
{RTE_LOGTYPE_USER1,  "user1"},
diff --git a/lib/log/rte_log.h b/lib/log/rte_log.h
index 6418479ee266..29db07881a5a 100644
--- a/lib/log/rte_log.h
+++ b/lib/log/rte_log.h
@@ -41,7 +41,7 @@ extern "C" {
 /* was RTE_LOGTYPE_SCHED */
 /* was RTE_LOGTYPE_PORT */
 /* was RTE_LOGTYPE_TABLE */
-#define RTE_LOGTYPE_PIPELINE  15 /**< Log related to pipeline. */
+/* was RTE_LOGTYPE_PIPELINE */
 /* was RTE_LOGTYPE_MBUF */
 #define RTE_LOGTYPE_CRYPTODEV 17 /**< Log related to cryptodev. */
 /* was RTE_LOGTYPE_EFD */
diff --git a/lib/pipeline/rte_pipeline.c b/lib/pipeline/rte_pipeline.c
index 1fa9f9c47eda..6b937cf782ac 100644
--- a/lib/pipeline/rte_pipeline.c
+++ b/lib/pipeline/rte_pipeline.c
@@ -1608,3 +1608,5 @@ int rte_pipeline_table_stats_read(struct rte_pipeline *p, 
uint32_t table_id,
 
return 0;
 }
+
+RTE_LOG_REGISTER_DEFAULT(pipeline_logtype, INFO);
diff --git a/lib/pipeline/rte_pipeline.h b/lib/pipeline/rte_pipeline.h
index ec51b9bfaadd..9fd40566a80f 100644
--- a/lib/pipeline/rte_pipeline.h
+++ b/lib/pipeline/rte_pipeline.h
@@ -833,6 +833,11 @@ int rte_pipeline_ah_packet_hijack(struct rte_pipeline *p,
 int rte_pipeline_ah_packet_drop(struct rte_pipeline *p,
uint64_t pkts_mask);
 
+
+/** Internal Logtype used */
+extern int pipeline_logtype;
+#define RTE_LOGTYPE_PIPELINE pipeline_logtype
+
 #ifdef __cplusplus
 }
 #endif
-- 
2.39.2

Re: [PATCH v2 02/15] bus/pci: add const to some experimental API

[Tyler Retzlaff]

On Mon, Aug 21, 2023 at 01:35:35PM +0200, David Marchand wrote:
> Those functions are fine with a const on the device pointer.
> 
> Signed-off-by: David Marchand 
> Acked-by: Bruce Richardson 
> ---

Acked-by: Tyler Retzlaff 

[PATCH v3] common/mlx5: replace use of PMD logtype

[Stephen Hemminger]

The goal to eliminate the generic PMD logtype.
One place it is used unnecessarily is in the mlx5 common code.
Change the one RTE_LOG() call here to use the same macro
as other log messages in same file.

Fixes: 9c410b28b27a ("common/mlx5: refactor HCA attributes query")
Cc: viachesl...@nvidia.com
Signed-off-by: Stephen Hemminger 
---
v3 - also address use in glue code

 drivers/common/mlx5/linux/mlx5_common_os.c | 2 +-
 drivers/common/mlx5/mlx5_devx_cmds.c   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/common/mlx5/linux/mlx5_common_os.c 
b/drivers/common/mlx5/linux/mlx5_common_os.c
index 2ebb8ac8b6e5..7260c1a19fd3 100644
--- a/drivers/common/mlx5/linux/mlx5_common_os.c
+++ b/drivers/common/mlx5/linux/mlx5_common_os.c
@@ -266,7 +266,7 @@ mlx5_glue_path(char *buf, size_t size)
goto error;
return buf;
 error:
-   RTE_LOG(ERR, PMD, "unable to append \"-glue\" to last component of"
+   DRV_LOG(ERR, "unable to append \"-glue\" to last component of"
" RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"), please"
" re-configure DPDK");
return NULL;
diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c 
b/drivers/common/mlx5/mlx5_devx_cmds.c
index 66a77159a031..9db0b2ac8983 100644
--- a/drivers/common/mlx5/mlx5_devx_cmds.c
+++ b/drivers/common/mlx5/mlx5_devx_cmds.c
@@ -543,7 +543,7 @@ mlx5_devx_cmd_query_hca_vdpa_attr(void *ctx,
MLX5_GET_HCA_CAP_OP_MOD_VDPA_EMULATION |
MLX5_HCA_CAP_OPMOD_GET_CUR);
if (!hcattr) {
-   RTE_LOG(DEBUG, PMD, "Failed to query devx VDPA capabilities");
+   DRV_LOG(DEBUG, "Failed to query devx VDPA capabilities");
vdpa_attr->valid = 0;
} else {
vdpa_attr->valid = 1;
-- 
2.39.2

Re: [PATCH v2 15/15] devtools: forbid inclusion of Linux header for PCI

[Tyler Retzlaff]

On Mon, Aug 21, 2023 at 01:35:48PM +0200, David Marchand wrote:
> Refrain from including Linux-only pci_regs.h header.
> Instead, prefer our own definitions from the pci library.
> 
> Signed-off-by: David Marchand 
> Acked-by: Bruce Richardson 
> ---

Acked-by: Tyler Retzlaff 

Re: [PATCH v3] common/mlx5: replace use of PMD logtype

[Tyler Retzlaff]

On Mon, Aug 21, 2023 at 09:16:25AM -0700, Stephen Hemminger wrote:
> The goal to eliminate the generic PMD logtype.
> One place it is used unnecessarily is in the mlx5 common code.
> Change the one RTE_LOG() call here to use the same macro
> as other log messages in same file.
> 
> Fixes: 9c410b28b27a ("common/mlx5: refactor HCA attributes query")
> Cc: viachesl...@nvidia.com
> Signed-off-by: Stephen Hemminger 
> ---

Acked-by: Tyler Retzlaff 

Re: [PATCH] net/iavf: fix checksum offloading

[David Marchand]

On Mon, Aug 21, 2023 at 1:54 PM Zhang, Qi Z  wrote:
> > Subject: [PATCH] net/iavf: fix checksum offloading
> >
> > The only presence of RTE_MBUF_F_TX_IPV4 can't be used as an indicator that
> > a checksum offload has been requested by an application.
>
> According to current implementation, actually the only presence of 
> RTE_MBUF_F_TX_IPV4 will cause IIPT = 10b, this scenario corresponds to an 
> 'IPv4 packet with no IP checksum offload,' according to datasheet.
> So, I assume in this situation, the PMD  continues to operate under the 
> assumption that the application has not requested checksum offloading.
>
> Could you share more insight what is the failure,  maybe we can perform a 
> more comprehensive investigation?

I think the missing piece is that OVS passes a l2_len == l3_len == 0.
In our tests, we could see that tx_errors get incremented for each
failed packet to transmit.


-- 
David Marchand

[PATCH v4 1/8] common/cnxk: use unique name for DPI memzone

[Amit Prakash Shukla]

roc_dpi was using vfid as part of name for memzone allocation.
This led to memzone allocation failure in case of multiple
physical functions. vfid is not unique by itself since multiple
physical functions can have the same virtual function indices.
So use complete DBDF as part of memzone name to make it unique.

Fixes: b6e395692b6d ("common/cnxk: add DPI DMA support")
Cc: sta...@dpdk.org

Signed-off-by: Radha Mohan Chintakuntla 
Signed-off-by: Amit Prakash Shukla 
---
v2:
- Fix for bugs observed in v1.
- Squashed few commits.

v3:
- Resolved review suggestions.
- Code improvement.

v4:
- Resolved checkpatch warnings.

 drivers/common/cnxk/roc_dpi.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/common/cnxk/roc_dpi.c b/drivers/common/cnxk/roc_dpi.c
index 93c8318a3d..0e2f803077 100644
--- a/drivers/common/cnxk/roc_dpi.c
+++ b/drivers/common/cnxk/roc_dpi.c
@@ -81,10 +81,10 @@ roc_dpi_configure(struct roc_dpi *roc_dpi)
return rc;
}
 
-   snprintf(name, sizeof(name), "dpimem%d", roc_dpi->vfid);
+   snprintf(name, sizeof(name), "dpimem%d:%d:%d:%d", pci_dev->addr.domain, 
pci_dev->addr.bus,
+pci_dev->addr.devid, pci_dev->addr.function);
buflen = DPI_CMD_QUEUE_SIZE * DPI_CMD_QUEUE_BUFS;
-   dpi_mz = plt_memzone_reserve_aligned(name, buflen, 0,
-DPI_CMD_QUEUE_SIZE);
+   dpi_mz = plt_memzone_reserve_aligned(name, buflen, 0, 
DPI_CMD_QUEUE_SIZE);
if (dpi_mz == NULL) {
plt_err("dpi memzone reserve failed");
rc = -ENOMEM;
-- 
2.25.1

[PATCH v4 2/8] dma/cnxk: changes for dmadev driver

[Amit Prakash Shukla]

Dmadev driver changes to align with dpdk spec.

Fixes: 681851b347ad ("dma/cnxk: support CN10K DMA engine")
Cc: sta...@dpdk.org

Signed-off-by: Amit Prakash Shukla 
---
v2:
- Fix for bugs observed in v1.
- Squashed few commits.

v3:
- Resolved review suggestions.
- Code improvement.

v4:
- Resolved checkpatch warnings.

 drivers/dma/cnxk/cnxk_dmadev.c | 464 -
 drivers/dma/cnxk/cnxk_dmadev.h |  24 +-
 2 files changed, 294 insertions(+), 194 deletions(-)

diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index a6f4a31e0e..a0152fc6df 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -7,68 +7,76 @@
 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
 #include 
-#include 
-#include 
 
-#include 
 #include 
 
 static int
-cnxk_dmadev_info_get(const struct rte_dma_dev *dev,
-struct rte_dma_info *dev_info, uint32_t size)
+cnxk_dmadev_info_get(const struct rte_dma_dev *dev, struct rte_dma_info 
*dev_info, uint32_t size)
 {
RTE_SET_USED(dev);
RTE_SET_USED(size);
 
dev_info->max_vchans = 1;
dev_info->nb_vchans = 1;
-   dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM |
-   RTE_DMA_CAPA_MEM_TO_DEV | RTE_DMA_CAPA_DEV_TO_MEM |
-   RTE_DMA_CAPA_DEV_TO_DEV | RTE_DMA_CAPA_OPS_COPY |
-   RTE_DMA_CAPA_OPS_COPY_SG;
+   dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM | RTE_DMA_CAPA_MEM_TO_DEV |
+RTE_DMA_CAPA_DEV_TO_MEM | RTE_DMA_CAPA_DEV_TO_DEV |
+RTE_DMA_CAPA_OPS_COPY | RTE_DMA_CAPA_OPS_COPY_SG;
dev_info->max_desc = DPI_MAX_DESC;
-   dev_info->min_desc = 1;
+   dev_info->min_desc = 2;
dev_info->max_sges = DPI_MAX_POINTER;
 
return 0;
 }
 
 static int
-cnxk_dmadev_configure(struct rte_dma_dev *dev,
- const struct rte_dma_conf *conf, uint32_t conf_sz)
+cnxk_dmadev_configure(struct rte_dma_dev *dev, const struct rte_dma_conf 
*conf, uint32_t conf_sz)
 {
struct cnxk_dpi_vf_s *dpivf = NULL;
int rc = 0;
 
RTE_SET_USED(conf);
-   RTE_SET_USED(conf);
-   RTE_SET_USED(conf_sz);
RTE_SET_USED(conf_sz);
+
dpivf = dev->fp_obj->dev_private;
+
+   if (dpivf->flag & CNXK_DPI_DEV_CONFIG)
+   return rc;
+
rc = roc_dpi_configure(&dpivf->rdpi);
-   if (rc < 0)
+   if (rc < 0) {
plt_err("DMA configure failed err = %d", rc);
+   goto done;
+   }
 
+   dpivf->flag |= CNXK_DPI_DEV_CONFIG;
+
+done:
return rc;
 }
 
 static int
 cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t vchan,
-   const struct rte_dma_vchan_conf *conf,
-   uint32_t conf_sz)
+   const struct rte_dma_vchan_conf *conf, uint32_t conf_sz)
 {
struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
-   struct cnxk_dpi_compl_s *comp_data;
-   union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+   struct cnxk_dpi_conf *dpi_conf = &dpivf->conf;
+   union dpi_instr_hdr_s *header = &dpi_conf->hdr;
+   uint16_t max_desc;
+   uint32_t size;
int i;
 
RTE_SET_USED(vchan);
RTE_SET_USED(conf_sz);
 
+   if (dpivf->flag & CNXK_DPI_VCHAN_CONFIG)
+   return 0;
+
header->cn9k.pt = DPI_HDR_PT_ZBW_CA;
 
switch (conf->direction) {
@@ -96,35 +104,54 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t 
vchan,
header->cn9k.fport = conf->dst_port.pcie.coreid;
};
 
-   for (i = 0; i < conf->nb_desc; i++) {
-   comp_data = rte_zmalloc(NULL, sizeof(*comp_data), 0);
-   if (comp_data == NULL) {
-   plt_err("Failed to allocate for comp_data");
-   return -ENOMEM;
-   }
-   comp_data->cdata = DPI_REQ_CDATA;
-   dpivf->conf.c_desc.compl_ptr[i] = comp_data;
-   };
-   dpivf->conf.c_desc.max_cnt = DPI_MAX_DESC;
-   dpivf->conf.c_desc.head = 0;
-   dpivf->conf.c_desc.tail = 0;
+   max_desc = conf->nb_desc;
+   if (!rte_is_power_of_2(max_desc))
+   max_desc = rte_align32pow2(max_desc);
+
+   if (max_desc > DPI_MAX_DESC)
+   max_desc = DPI_MAX_DESC;
+
+   size = (max_desc * sizeof(struct cnxk_dpi_compl_s *));
+   dpi_conf->c_desc.compl_ptr = rte_zmalloc(NULL, size, 0);
+
+   if (dpi_conf->c_desc.compl_ptr == NULL) {
+   plt_err("Failed to allocate for comp_data");
+   return -ENOMEM;
+   }
+
+   for (i = 0; i < max_desc; i++) {
+   dpi_conf->c_desc.compl_ptr[i] =
+   rte_zmalloc(NULL, sizeof(struct cnxk_dpi_compl_s), 0);
+   dpi_conf->c_desc.compl_ptr[i]->cdata = DPI_REQ_CDATA;
+   }
+
+   dpi_conf->c_desc.max_cnt = (max_desc - 1);
+   dpi_conf->c_desc

[PATCH v4 3/8] dma/cnxk: add DMA devops for all models of cn10xxx

[Amit Prakash Shukla]

Valid function pointers are set for DMA device operations
i.e. cn10k_dmadev_ops are used for all cn10k devices.

Signed-off-by: Radha Mohan Chintakuntla 
Signed-off-by: Amit Prakash Shukla 
---
v2:
- Fix for bugs observed in v1.
- Squashed few commits.

v3:
- Resolved review suggestions.
- Code improvement.

v4:
- Resolved checkpatch warnings.

 drivers/dma/cnxk/cnxk_dmadev.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index a0152fc6df..1dc124e68f 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -763,7 +763,9 @@ cnxk_dmadev_probe(struct rte_pci_driver *pci_drv 
__rte_unused, struct rte_pci_de
dmadev->fp_obj->burst_capacity = cnxk_damdev_burst_capacity;
 
if (pci_dev->id.subsystem_device_id == PCI_SUBSYSTEM_DEVID_CN10KA ||
+   pci_dev->id.subsystem_device_id == PCI_SUBSYSTEM_DEVID_CN10KAS ||
pci_dev->id.subsystem_device_id == PCI_SUBSYSTEM_DEVID_CNF10KA ||
+   pci_dev->id.subsystem_device_id == PCI_SUBSYSTEM_DEVID_CNF10KB ||
pci_dev->id.subsystem_device_id == PCI_SUBSYSTEM_DEVID_CN10KB) {
dmadev->dev_ops = &cn10k_dmadev_ops;
dmadev->fp_obj->copy = cn10k_dmadev_copy;
-- 
2.25.1

[PATCH v4 4/8] dma/cnxk: update func field based on transfer type

[Amit Prakash Shukla]

Use pfid and vfid of src_port for incoming DMA transfers and dst_port
for outgoing DMA transfers.

Signed-off-by: Radha Mohan Chintakuntla 
Signed-off-by: Amit Prakash Shukla 
---
v2:
- Fix for bugs observed in v1.
- Squashed few commits.

v3:
- Resolved review suggestions.
- Code improvement.

v4:
- Resolved checkpatch warnings.

 drivers/dma/cnxk/cnxk_dmadev.c | 26 ++
 1 file changed, 22 insertions(+), 4 deletions(-)

diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index 1dc124e68f..d8cfb98cd7 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -84,13 +84,21 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t 
vchan,
header->cn9k.xtype = DPI_XTYPE_INBOUND;
header->cn9k.lport = conf->src_port.pcie.coreid;
header->cn9k.fport = 0;
-   header->cn9k.pvfe = 1;
+   header->cn9k.pvfe = conf->src_port.pcie.vfen;
+   if (header->cn9k.pvfe) {
+   header->cn9k.func = conf->src_port.pcie.pfid << 12;
+   header->cn9k.func |= conf->src_port.pcie.vfid;
+   }
break;
case RTE_DMA_DIR_MEM_TO_DEV:
header->cn9k.xtype = DPI_XTYPE_OUTBOUND;
header->cn9k.lport = 0;
header->cn9k.fport = conf->dst_port.pcie.coreid;
-   header->cn9k.pvfe = 1;
+   header->cn9k.pvfe = conf->dst_port.pcie.vfen;
+   if (header->cn9k.pvfe) {
+   header->cn9k.func = conf->dst_port.pcie.pfid << 12;
+   header->cn9k.func |= conf->dst_port.pcie.vfid;
+   }
break;
case RTE_DMA_DIR_MEM_TO_MEM:
header->cn9k.xtype = DPI_XTYPE_INTERNAL_ONLY;
@@ -102,6 +110,7 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t 
vchan,
header->cn9k.xtype = DPI_XTYPE_EXTERNAL_ONLY;
header->cn9k.lport = conf->src_port.pcie.coreid;
header->cn9k.fport = conf->dst_port.pcie.coreid;
+   header->cn9k.pvfe = 0;
};
 
max_desc = conf->nb_desc;
@@ -159,13 +168,21 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, 
uint16_t vchan,
header->cn10k.xtype = DPI_XTYPE_INBOUND;
header->cn10k.lport = conf->src_port.pcie.coreid;
header->cn10k.fport = 0;
-   header->cn10k.pvfe = 1;
+   header->cn10k.pvfe = conf->src_port.pcie.vfen;
+   if (header->cn10k.pvfe) {
+   header->cn10k.func = conf->src_port.pcie.pfid << 12;
+   header->cn10k.func |= conf->src_port.pcie.vfid;
+   }
break;
case RTE_DMA_DIR_MEM_TO_DEV:
header->cn10k.xtype = DPI_XTYPE_OUTBOUND;
header->cn10k.lport = 0;
header->cn10k.fport = conf->dst_port.pcie.coreid;
-   header->cn10k.pvfe = 1;
+   header->cn10k.pvfe = conf->dst_port.pcie.vfen;
+   if (header->cn10k.pvfe) {
+   header->cn10k.func = conf->dst_port.pcie.pfid << 12;
+   header->cn10k.func |= conf->dst_port.pcie.vfid;
+   }
break;
case RTE_DMA_DIR_MEM_TO_MEM:
header->cn10k.xtype = DPI_XTYPE_INTERNAL_ONLY;
@@ -177,6 +194,7 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t 
vchan,
header->cn10k.xtype = DPI_XTYPE_EXTERNAL_ONLY;
header->cn10k.lport = conf->src_port.pcie.coreid;
header->cn10k.fport = conf->dst_port.pcie.coreid;
+   header->cn10k.pvfe = 0;
};
 
max_desc = conf->nb_desc;
-- 
2.25.1

[PATCH v4 5/8] dma/cnxk: increase vchan per queue to max 4

[Amit Prakash Shukla]

To support multiple directions in same queue make use of multiple vchan
per queue. Each vchan can be configured in some direction and used.

Signed-off-by: Amit Prakash Shukla 
Signed-off-by: Radha Mohan Chintakuntla 
---
v2:
- Fix for bugs observed in v1.
- Squashed few commits.

v3:
- Resolved review suggestions.
- Code improvement.

v4:
- Resolved checkpatch warnings.

 drivers/dma/cnxk/cnxk_dmadev.c | 68 +++---
 drivers/dma/cnxk/cnxk_dmadev.h | 11 +++---
 2 files changed, 36 insertions(+), 43 deletions(-)

diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index d8cfb98cd7..7d83b70e8b 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -22,8 +22,8 @@ cnxk_dmadev_info_get(const struct rte_dma_dev *dev, struct 
rte_dma_info *dev_inf
RTE_SET_USED(dev);
RTE_SET_USED(size);
 
-   dev_info->max_vchans = 1;
-   dev_info->nb_vchans = 1;
+   dev_info->max_vchans = MAX_VCHANS_PER_QUEUE;
+   dev_info->nb_vchans = MAX_VCHANS_PER_QUEUE;
dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM | RTE_DMA_CAPA_MEM_TO_DEV |
 RTE_DMA_CAPA_DEV_TO_MEM | RTE_DMA_CAPA_DEV_TO_DEV |
 RTE_DMA_CAPA_OPS_COPY | RTE_DMA_CAPA_OPS_COPY_SG;
@@ -65,13 +65,12 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t 
vchan,
const struct rte_dma_vchan_conf *conf, uint32_t conf_sz)
 {
struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
-   struct cnxk_dpi_conf *dpi_conf = &dpivf->conf;
+   struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
union dpi_instr_hdr_s *header = &dpi_conf->hdr;
uint16_t max_desc;
uint32_t size;
int i;
 
-   RTE_SET_USED(vchan);
RTE_SET_USED(conf_sz);
 
if (dpivf->flag & CNXK_DPI_VCHAN_CONFIG)
@@ -149,13 +148,12 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, 
uint16_t vchan,
 const struct rte_dma_vchan_conf *conf, uint32_t 
conf_sz)
 {
struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
-   struct cnxk_dpi_conf *dpi_conf = &dpivf->conf;
+   struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
union dpi_instr_hdr_s *header = &dpi_conf->hdr;
uint16_t max_desc;
uint32_t size;
int i;
 
-   RTE_SET_USED(vchan);
RTE_SET_USED(conf_sz);
 
if (dpivf->flag & CNXK_DPI_VCHAN_CONFIG)
@@ -360,18 +358,17 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan, 
rte_iova_t src, rte_iova_t d
 uint64_t flags)
 {
struct cnxk_dpi_vf_s *dpivf = dev_private;
-   union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+   struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
+   union dpi_instr_hdr_s *header = &dpi_conf->hdr;
struct cnxk_dpi_compl_s *comp_ptr;
uint64_t cmd[DPI_MAX_CMD_SIZE];
rte_iova_t fptr, lptr;
int num_words = 0;
int rc;
 
-   RTE_SET_USED(vchan);
-
-   comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
+   comp_ptr = dpi_conf->c_desc.compl_ptr[dpi_conf->c_desc.tail];
header->cn9k.ptr = (uint64_t)comp_ptr;
-   STRM_INC(dpivf->conf.c_desc, tail);
+   STRM_INC(dpi_conf->c_desc, tail);
 
header->cn9k.nfst = 1;
header->cn9k.nlst = 1;
@@ -400,7 +397,7 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan, 
rte_iova_t src, rte_iova_t d
 
rc = __dpi_queue_write(&dpivf->rdpi, cmd, num_words);
if (unlikely(rc)) {
-   STRM_DEC(dpivf->conf.c_desc, tail);
+   STRM_DEC(dpi_conf->c_desc, tail);
return rc;
}
 
@@ -421,18 +418,17 @@ cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan, 
const struct rte_dma_sge
const struct rte_dma_sge *dst, uint16_t nb_src, uint16_t 
nb_dst, uint64_t flags)
 {
struct cnxk_dpi_vf_s *dpivf = dev_private;
-   union dpi_instr_hdr_s *header = &dpivf->conf.hdr;
+   struct cnxk_dpi_conf *dpi_conf = &dpivf->conf[vchan];
+   union dpi_instr_hdr_s *header = &dpi_conf->hdr;
const struct rte_dma_sge *fptr, *lptr;
struct cnxk_dpi_compl_s *comp_ptr;
uint64_t cmd[DPI_MAX_CMD_SIZE];
int num_words = 0;
int i, rc;
 
-   RTE_SET_USED(vchan);
-
-   comp_ptr = dpivf->conf.c_desc.compl_ptr[dpivf->conf.c_desc.tail];
+   comp_ptr = dpi_conf->c_desc.compl_ptr[dpi_conf->c_desc.tail];
header->cn9k.ptr = (uint64_t)comp_ptr;
-   STRM_INC(dpivf->conf.c_desc, tail);
+   STRM_INC(dpi_conf->c_desc, tail);
 
/*
 * For inbound case, src pointers are last pointers.
@@ -468,7 +464,7 @@ cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan, 
const struct rte_dma_sge
 
rc = __dpi_queue_write(&dpivf->rdpi, cmd, num_words);
if (unlikely(rc)) {
-   STRM_DEC(dpivf->conf.c_desc, tail);
+   STRM_DEC(dpi_conf->c_desc, tail);

[PATCH v4 6/8] dma/cnxk: vchan support enhancement

[Amit Prakash Shukla]

Code changes to realign dpi private structure based on vchan.
Changeset also resets DMA dev stats while starting dma device.

Signed-off-by: Amit Prakash Shukla 
---
v2:
- Fix for bugs observed in v1.
- Squashed few commits.

v3:
- Resolved review suggestions.
- Code improvement.

v4:
- Resolved checkpatch warnings.

 drivers/dma/cnxk/cnxk_dmadev.c | 210 -
 drivers/dma/cnxk/cnxk_dmadev.h |  18 +--
 2 files changed, 165 insertions(+), 63 deletions(-)

diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index 7d83b70e8b..9fb3bb264a 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -16,35 +16,79 @@
 
 #include 
 
+static int cnxk_stats_reset(struct rte_dma_dev *dev, uint16_t vchan);
+
 static int
 cnxk_dmadev_info_get(const struct rte_dma_dev *dev, struct rte_dma_info 
*dev_info, uint32_t size)
 {
-   RTE_SET_USED(dev);
+   struct cnxk_dpi_vf_s *dpivf = dev->fp_obj->dev_private;
RTE_SET_USED(size);
 
dev_info->max_vchans = MAX_VCHANS_PER_QUEUE;
-   dev_info->nb_vchans = MAX_VCHANS_PER_QUEUE;
+   dev_info->nb_vchans = dpivf->num_vchans;
dev_info->dev_capa = RTE_DMA_CAPA_MEM_TO_MEM | RTE_DMA_CAPA_MEM_TO_DEV |
 RTE_DMA_CAPA_DEV_TO_MEM | RTE_DMA_CAPA_DEV_TO_DEV |
 RTE_DMA_CAPA_OPS_COPY | RTE_DMA_CAPA_OPS_COPY_SG;
dev_info->max_desc = DPI_MAX_DESC;
-   dev_info->min_desc = 2;
+   dev_info->min_desc = DPI_MIN_DESC;
dev_info->max_sges = DPI_MAX_POINTER;
 
return 0;
 }
 
+static int
+cnxk_dmadev_vchan_free(struct cnxk_dpi_vf_s *dpivf, uint16_t vchan)
+{
+   struct cnxk_dpi_conf *dpi_conf;
+   uint16_t num_vchans;
+   uint16_t max_desc;
+   int i, j;
+
+   if (vchan == RTE_DMA_ALL_VCHAN) {
+   num_vchans = dpivf->num_vchans;
+   i = 0;
+   } else {
+   if (vchan >= MAX_VCHANS_PER_QUEUE)
+   return -EINVAL;
+
+   num_vchans = vchan + 1;
+   i = vchan;
+   }
+
+   for (; i < num_vchans; i++) {
+   dpi_conf = &dpivf->conf[i];
+   max_desc = dpi_conf->c_desc.max_cnt;
+   if (dpi_conf->c_desc.compl_ptr) {
+   for (j = 0; j < max_desc; j++)
+   rte_free(dpi_conf->c_desc.compl_ptr[j]);
+   }
+
+   rte_free(dpi_conf->c_desc.compl_ptr);
+   dpi_conf->c_desc.compl_ptr = NULL;
+   }
+
+   return 0;
+}
+
 static int
 cnxk_dmadev_configure(struct rte_dma_dev *dev, const struct rte_dma_conf 
*conf, uint32_t conf_sz)
 {
struct cnxk_dpi_vf_s *dpivf = NULL;
int rc = 0;
 
-   RTE_SET_USED(conf);
RTE_SET_USED(conf_sz);
 
dpivf = dev->fp_obj->dev_private;
 
+   /* Accept only number of vchans as config from application. */
+   if (!(dpivf->flag & CNXK_DPI_DEV_START)) {
+   /* After config function, vchan setup function has to be called.
+* Free up vchan memory if any, before configuring num_vchans.
+*/
+   cnxk_dmadev_vchan_free(dpivf, RTE_DMA_ALL_VCHAN);
+   dpivf->num_vchans = conf->nb_vchans;
+   }
+
if (dpivf->flag & CNXK_DPI_DEV_CONFIG)
return rc;
 
@@ -73,7 +117,7 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t 
vchan,
 
RTE_SET_USED(conf_sz);
 
-   if (dpivf->flag & CNXK_DPI_VCHAN_CONFIG)
+   if (dpivf->flag & CNXK_DPI_DEV_START)
return 0;
 
header->cn9k.pt = DPI_HDR_PT_ZBW_CA;
@@ -112,6 +156,9 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t 
vchan,
header->cn9k.pvfe = 0;
};
 
+   /* Free up descriptor memory before allocating. */
+   cnxk_dmadev_vchan_free(dpivf, vchan);
+
max_desc = conf->nb_desc;
if (!rte_is_power_of_2(max_desc))
max_desc = rte_align32pow2(max_desc);
@@ -130,15 +177,15 @@ cnxk_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t 
vchan,
for (i = 0; i < max_desc; i++) {
dpi_conf->c_desc.compl_ptr[i] =
rte_zmalloc(NULL, sizeof(struct cnxk_dpi_compl_s), 0);
+   if (!dpi_conf->c_desc.compl_ptr[i]) {
+   plt_err("Failed to allocate for descriptor memory");
+   return -ENOMEM;
+   }
+
dpi_conf->c_desc.compl_ptr[i]->cdata = DPI_REQ_CDATA;
}
 
dpi_conf->c_desc.max_cnt = (max_desc - 1);
-   dpi_conf->c_desc.head = 0;
-   dpi_conf->c_desc.tail = 0;
-   dpivf->pnum_words = 0;
-   dpivf->pending = 0;
-   dpivf->flag |= CNXK_DPI_VCHAN_CONFIG;
 
return 0;
 }
@@ -156,7 +203,7 @@ cn10k_dmadev_vchan_setup(struct rte_dma_dev *dev, uint16_t 
vchan,
 
RTE_SET_USED(conf_sz);
 
-   if (dpivf->flag & CNXK_DPI_VCHAN_CONFIG)
+   if (dpi

[PATCH v4 7/8] dma/cnxk: add completion ring tail wrap check

[Amit Prakash Shukla]

From: Vamsi Attunuru 

Adds a check to avoid tail wrap when completion desc ring
is full. Also patch increase max desc size to 2048.

Signed-off-by: Vamsi Attunuru 
---
v2:
- Fix for bugs observed in v1.
- Squashed few commits.

v3:
- Resolved review suggestions.
- Code improvement.

v4:
- Resolved checkpatch warnings.

 drivers/dma/cnxk/cnxk_dmadev.c | 22 --
 drivers/dma/cnxk/cnxk_dmadev.h |  2 +-
 2 files changed, 21 insertions(+), 3 deletions(-)

diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index 9fb3bb264a..288606bb3d 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -434,6 +434,11 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan, 
rte_iova_t src, rte_iova_t d
header->cn9k.ptr = (uint64_t)comp_ptr;
STRM_INC(dpi_conf->c_desc, tail);
 
+   if (unlikely(dpi_conf->c_desc.tail == dpi_conf->c_desc.head)) {
+   STRM_DEC(dpi_conf->c_desc, tail);
+   return -ENOSPC;
+   }
+
header->cn9k.nfst = 1;
header->cn9k.nlst = 1;
 
@@ -494,6 +499,11 @@ cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan, 
const struct rte_dma_sge
header->cn9k.ptr = (uint64_t)comp_ptr;
STRM_INC(dpi_conf->c_desc, tail);
 
+   if (unlikely(dpi_conf->c_desc.tail == dpi_conf->c_desc.head)) {
+   STRM_DEC(dpi_conf->c_desc, tail);
+   return -ENOSPC;
+   }
+
/*
 * For inbound case, src pointers are last pointers.
 * For all other cases, src pointers are first pointers.
@@ -561,6 +571,11 @@ cn10k_dmadev_copy(void *dev_private, uint16_t vchan, 
rte_iova_t src, rte_iova_t
header->cn10k.ptr = (uint64_t)comp_ptr;
STRM_INC(dpi_conf->c_desc, tail);
 
+   if (unlikely(dpi_conf->c_desc.tail == dpi_conf->c_desc.head)) {
+   STRM_DEC(dpi_conf->c_desc, tail);
+   return -ENOSPC;
+   }
+
header->cn10k.nfst = 1;
header->cn10k.nlst = 1;
 
@@ -613,6 +628,11 @@ cn10k_dmadev_copy_sg(void *dev_private, uint16_t vchan, 
const struct rte_dma_sge
header->cn10k.ptr = (uint64_t)comp_ptr;
STRM_INC(dpi_conf->c_desc, tail);
 
+   if (unlikely(dpi_conf->c_desc.tail == dpi_conf->c_desc.head)) {
+   STRM_DEC(dpi_conf->c_desc, tail);
+   return -ENOSPC;
+   }
+
header->cn10k.nfst = nb_src & DPI_MAX_POINTER;
header->cn10k.nlst = nb_dst & DPI_MAX_POINTER;
fptr = &src[0];
@@ -695,8 +715,6 @@ cnxk_dmadev_completed_status(void *dev_private, uint16_t 
vchan, const uint16_t n
struct cnxk_dpi_compl_s *comp_ptr;
int cnt;
 
-   RTE_SET_USED(last_idx);
-
for (cnt = 0; cnt < nb_cpls; cnt++) {
comp_ptr = c_desc->compl_ptr[c_desc->head];
status[cnt] = comp_ptr->cdata;
diff --git a/drivers/dma/cnxk/cnxk_dmadev.h b/drivers/dma/cnxk/cnxk_dmadev.h
index f375143b16..9c6c898d23 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.h
+++ b/drivers/dma/cnxk/cnxk_dmadev.h
@@ -9,7 +9,7 @@
 #define DPI_MAX_POINTER 15
 #define STRM_INC(s, var) ((s).var = ((s).var + 1) & (s).max_cnt)
 #define STRM_DEC(s, var) ((s).var = ((s).var - 1) == -1 ? (s).max_cnt : 
((s).var - 1))
-#define DPI_MAX_DESC1024
+#define DPI_MAX_DESC2048
 #define DPI_MIN_DESC2
 #define MAX_VCHANS_PER_QUEUE 4
 
-- 
2.25.1

[PATCH v4 8/8] dma/cnxk: track last index return value

[Amit Prakash Shukla]

From: Vamsi Attunuru 

last index value might lost the order when dma stats are reset
in between copy operations. Patch adds a variable to track the
completed count, that can be used to compute the last index, also
patch adds misc other changes.

Signed-off-by: Vamsi Attunuru 
---
v2:
- Fix for bugs observed in v1.
- Squashed few commits.

v3:
- Resolved review suggestions.
- Code improvement.

v4:
- Resolved checkpatch warnings.

 drivers/dma/cnxk/cnxk_dmadev.c | 17 ++---
 drivers/dma/cnxk/cnxk_dmadev.h |  1 +
 2 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/dma/cnxk/cnxk_dmadev.c b/drivers/dma/cnxk/cnxk_dmadev.c
index 288606bb3d..7e728b943b 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.c
+++ b/drivers/dma/cnxk/cnxk_dmadev.c
@@ -298,6 +298,7 @@ cnxk_dmadev_start(struct rte_dma_dev *dev)
}
 
cnxk_stats_reset(dev, i);
+   dpi_conf->completed_offset = 0;
}
 
roc_dpi_enable(&dpivf->rdpi);
@@ -479,7 +480,7 @@ cnxk_dmadev_copy(void *dev_private, uint16_t vchan, 
rte_iova_t src, rte_iova_t d
dpi_conf->pending++;
}
 
-   return (dpi_conf->desc_idx++);
+   return dpi_conf->desc_idx++;
 }
 
 static int
@@ -545,13 +546,13 @@ cnxk_dmadev_copy_sg(void *dev_private, uint16_t vchan, 
const struct rte_dma_sge
if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
rte_wmb();
plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL);
-   dpi_conf->stats.submitted += nb_src;
+   dpi_conf->stats.submitted++;
} else {
dpi_conf->pnum_words += num_words;
dpi_conf->pending++;
}
 
-   return (dpi_conf->desc_idx++);
+   return dpi_conf->desc_idx++;
 }
 
 static int
@@ -664,13 +665,13 @@ cn10k_dmadev_copy_sg(void *dev_private, uint16_t vchan, 
const struct rte_dma_sge
if (flags & RTE_DMA_OP_FLAG_SUBMIT) {
rte_wmb();
plt_write64(num_words, dpivf->rdpi.rbase + DPI_VDMA_DBELL);
-   dpi_conf->stats.submitted += nb_src;
+   dpi_conf->stats.submitted++;
} else {
dpi_conf->pnum_words += num_words;
dpi_conf->pending++;
}
 
-   return (dpi_conf->desc_idx++);
+   return dpi_conf->desc_idx++;
 }
 
 static uint16_t
@@ -700,7 +701,7 @@ cnxk_dmadev_completed(void *dev_private, uint16_t vchan, 
const uint16_t nb_cpls,
}
 
dpi_conf->stats.completed += cnt;
-   *last_idx = dpi_conf->stats.completed - 1;
+   *last_idx = (dpi_conf->completed_offset + dpi_conf->stats.completed - 
1) & 0x;
 
return cnt;
 }
@@ -729,7 +730,7 @@ cnxk_dmadev_completed_status(void *dev_private, uint16_t 
vchan, const uint16_t n
}
 
dpi_conf->stats.completed += cnt;
-   *last_idx = dpi_conf->stats.completed - 1;
+   *last_idx = (dpi_conf->completed_offset + dpi_conf->stats.completed - 
1) & 0x;
 
return cnt;
 }
@@ -814,6 +815,7 @@ cnxk_stats_reset(struct rte_dma_dev *dev, uint16_t vchan)
if (vchan == RTE_DMA_ALL_VCHAN) {
for (i = 0; i < dpivf->num_vchans; i++) {
dpi_conf = &dpivf->conf[i];
+   dpi_conf->completed_offset += dpi_conf->stats.completed;
dpi_conf->stats = (struct rte_dma_stats){0};
}
 
@@ -824,6 +826,7 @@ cnxk_stats_reset(struct rte_dma_dev *dev, uint16_t vchan)
return -EINVAL;
 
dpi_conf = &dpivf->conf[vchan];
+   dpi_conf->completed_offset += dpi_conf->stats.completed;
dpi_conf->stats = (struct rte_dma_stats){0};
 
return 0;
diff --git a/drivers/dma/cnxk/cnxk_dmadev.h b/drivers/dma/cnxk/cnxk_dmadev.h
index 9c6c898d23..254e7fea20 100644
--- a/drivers/dma/cnxk/cnxk_dmadev.h
+++ b/drivers/dma/cnxk/cnxk_dmadev.h
@@ -41,6 +41,7 @@ struct cnxk_dpi_conf {
uint16_t desc_idx;
uint16_t pad0;
struct rte_dma_stats stats;
+   uint64_t completed_offset;
 };
 
 struct cnxk_dpi_vf_s {
-- 
2.25.1

Reminder to Register for the DPDK Dublin Summit - Sep. 12-13, 2023

[Nathan Southern]

Dear DPDK Community,

September 12-13, 2023 we will have the DPDK Summit at the Gibson Hotel in
Point Square in Dublin. Once again, registration and attendance for this
event are *free! *Virtual and on-site attendance options will be available.

The schedule is posted here, and we have an outstanding two-day line-up of
speakers:

https://events.linuxfoundation.org/dpdk-summit/program/schedule/

If you have not already registered for the event, live or virtualy, please
do so now. *You may do so here:*

https://events.linuxfoundation.org/dpdk-userspace-summit/

Lastly, if you are traveling Dublin but have not booked flights or
accommodations, please do so now.

Any questions please let me know.

Thanks,

Nathan

Re: [RFC] lib/st_ring: add single thread ring

[Mattias Rönnblom]

On 2023-08-21 08:04, Honnappa Nagarahalli wrote:

Add a single thread safe and multi-thread unsafe ring data structure.


One must have set the bar very low, if one needs to specify that an API 
is single-thread safe.



This library provides an simple and efficient alternative to multi-thread
safe ring when multi-thread safety is not required.

Signed-off-by: Honnappa Nagarahalli 
---
v1:
1) The code is very prelimnary and is not even compiled
2) This is intended to show the APIs and some thoughts on implementation


If you haven't done it already, maybe it might be worth looking around 
in the code base for already-existing, more-or-less open-coded 
fifo/circular buffer type data structures. Just to make sure those can 
be eliminated if this makes it into DPDK.


There's one in rte_event_eth_rx_adapter.c, and I think one in the SW 
eventdev as well. Seems to be one in cmdline_cirbuf.h as well. I'm sure 
there are many more.


You could pick some other name for it, instead of the slightly awkward 
"st_ring" (e.g., "fifo", "cbuf", "cbuffer", "circ_buffer"). That would 
also leave you with more freedom to stray from the MT safe ring API 
without surprising the user, if needed (and I think it is needed).


Hopefully you can reduce API complexity compared to the MT-safe version. 
Having a name for these kinds of data structures doesn't make a lot of 
sense, for example. Skip the dump function. Relax from always_inline to 
just regular inline.


I'm not sure you need bulk/burst type operations. Without any memory 
fences, an optimizing compiler should do a pretty good job of unrolling 
multiple-element access type operations, assuming you leave the ST ring 
code in the header files (otherwise LTO is needed).


I think you will want a peek-type operation on the reader side. That 
more for convenience, rather than that I think the copies will actually 
be there in the object code (such should be eliminated by the compiler, 
given that the barriers are gone).



3) More APIs and the rest of the implementation will come in subsequent
versions

  lib/st_ring/rte_st_ring.h | 567 ++
  1 file changed, 567 insertions(+)
  create mode 100644 lib/st_ring/rte_st_ring.h

diff --git a/lib/st_ring/rte_st_ring.h b/lib/st_ring/rte_st_ring.h
new file mode 100644
index 00..8cb8832591
--- /dev/null
+++ b/lib/st_ring/rte_st_ring.h
@@ -0,0 +1,567 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2023 Arm Limited
+ */
+
+#ifndef _RTE_ST_RING_H_
+#define _RTE_ST_RING_H_
+
+/**
+ * @file
+ * RTE Signle Thread Ring (ST Ring)
+ *
+ * The ST Ring is a fixed-size queue intended to be accessed
+ * by one thread at a time. It does not provide concurrent access to
+ * multiple threads. If there are multiple threads accessing the ST ring,
+ * then the threads have to use locks to protect the ring from
+ * getting corrupted.


You are basically saying the same thing three times here.


+ *
+ * - FIFO (First In First Out)
+ * - Maximum size is fixed; the pointers are stored in a table.
+ * - Consumer and producer part of same thread.
+ * - Multi-thread producers and consumers need locking.


...two more times here. One might get the impression you really don't 
trust the reader.



+ * - Single/Bulk/burst dequeue at Tail or Head
+ * - Single/Bulk/burst enqueue at Head or Tail


Does this not sound more like a deque, than a FIFO/circular buffer? Are 
there any examples where this functionality (the double-endedness) is 
needed in the DPDK code base?



+ *
+ */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include 
+#include 


Is the intention to provide a ring with compile-time variable element 
size? In other words, where the elements of a particular ring instance 
has the same element size, but different rings may have different 
element sizes.


Seems like a good idea to me, in that case. Although often you will have 
pointers, it would be useful to store larger things like small structs, 
and maybe smaller elements as well.



+
+/**
+ * Calculate the memory size needed for a ST ring
+ *
+ * This function returns the number of bytes needed for a ST ring, given
+ * the number of elements in it. This value is the sum of the size of
+ * the structure rte_st_ring and the size of the memory needed by the
+ * elements. The value is aligned to a cache line size.
+ *
+ * @param count
+ *   The number of elements in the ring (must be a power of 2).
+ * @return
+ *   - The memory size needed for the ST ring on success.
+ *   - -EINVAL if count is not a power of 2.
+ */
+ssize_t rte_st_ring_get_memsize(unsigned int count);
+
+/**
+ * Initialize a ST ring structure.
+ *
+ * Initialize a ST ring structure in memory pointed by "r". The size of the
+ * memory area must be large enough to store the ring structure and the
+ * object table. It is advised to use rte_st_ring_get_memsize() to get the
+ * appropriate size.
+ *
+ * The ST ring size is set to *count*, which must be a power of two.
+ *

Re: [PATCH v5 0/6] optional rte optional stdatomics API

[Konstantin Ananyev]

This series introduces API additions prefixed in the rte namespace that allow
the optional use of stdatomics.h from C11 using enable_stdatomics=true for
targets where enable_stdatomics=false no functional change is intended.

Be aware this does not contain all changes to use stdatomics across the DPDK
tree it only introduces the minimum to allow the option to be used which is
a pre-requisite for a clean CI (probably using clang) that can be run
with enable_stdatomics=true enabled.

It is planned that subsequent series will be introduced per lib/driver as
appropriate to further enable stdatomics use when enable_stdatomics=true.

Notes:

* Additional libraries beyond EAL make visible atomics use across the
   API/ABI surface they will be converted in the subsequent series.

* The eal: add rte atomic qualifier with casts patch needs some discussion
   as to whether or not the legacy rte_atomic APIs should be converted to
   work with enable_stdatomic=true right now some implementation dependent
   casts are used to prevent cascading / having to convert too much in
   the intial series.

* Windows will obviously need complete conversion of libraries including
   atomics that are not crossing API/ABI boundaries. those conversions will
   introduced in separate series as new along side the existing msvc series.

Please keep in mind we would like to prioritize the review / acceptance of
this patch since it needs to be completed in the 23.11 merge window.

Thank you all for the discussion that lead to the formation of this series.

v5:
   * Add RTE_ATOMIC to doxygen configuration PREDEFINED macros list to
 fix documentation generation failure
   * Fix two typos in expansion of C11 atomics macros strong -> weak and
 add missing _explicit
   * Adjust devtools/checkpatches messages based on feedback. i have chosen
 not to try and catch use of C11 atomics or _Atomic since using those
 directly will be picked up by existing CI passes where by compilation
 error where enable_stdatomic=false (the default for most platforms)

v4:
   * Move the definition of #define RTE_ATOMIC(type) to patch 1 where it
 belongs (a mistake in v3)
   * Provide comments for both RTE_ATOMIC and __rte_atomic macros indicating
 their use as specified or qualified contexts.

v3:
   * Remove comments from APIs mentioning the mapping to C++ memory model
 memory orders
   * Introduce and use new macro RTE_ATOMIC(type) to be used in contexts
 where _Atomic is used as a type specifier to declare variables. The
 macro allows more clarity about what the atomic type being specified
 is. e.g. _Atomic(T *) vs _Atomic(T) it is easier to understand that
 the former is an atomic pointer type and the latter is an atomic
 type. it also has the benefit of (in the future) being interoperable
 with c++23 syntactically
 note: Morten i have retained your 'reviewed-by' tags if you disagree
 given the changes in the above version please indicate as such but
 i believe the changes are in the spirit of the feedback you provided

v2:
   * Wrap meson_options.txt option description to newline and indent to
 be consistent with other options.
   * Provide separate typedef of rte_memory_order for enable_stdatomic=true
 VS enable_stdatomic=false instead of a single typedef to int
 note: slight tweak to reviewers feedback i've chosen to use a typedef
   for both enable_stdatomic={true,false} (just seemed more consistent)
   * Bring in assert.h and use static_assert macro instead of _Static_assert
 keyword to better interoperate with c/c++
   * Directly include rte_stdatomic.h where into other places it is consumed
 instead of hacking it globally into rte_config.h
   * Provide and use __rte_atomic_thread_fence to allow conditional expansion
 within the body of existing rte_atomic_thread_fence inline function to
 maintain per-arch optimizations when enable_stdatomic=false

Tyler Retzlaff (6):
   eal: provide rte stdatomics optional atomics API
   eal: adapt EAL to present rte optional atomics API
   eal: add rte atomic qualifier with casts
   distributor: adapt for EAL optional atomics API changes
   bpf: adapt for EAL optional atomics API changes
   devtools: forbid new direct use of GCC atomic builtins

  app/test/test_mcslock.c  |   6 +-
  config/meson.build   |   1 +
  devtools/checkpatches.sh |   8 +-
  doc/api/doxy-api.conf.in |   1 +
  lib/bpf/bpf_pkt.c|   6 +-
  lib/distributor/distributor_private.h|   2 +-
  lib/distributor/rte_distributor_single.c |  44 +++
  lib/eal/arm/include/rte_atomic_32.h  |   4 +-
  lib/eal/arm/include/rte_atomic_64.h  |  36 +++---
  lib/eal/arm/include/rte_pause_64.h   |  26 ++--
  lib/eal/arm/rte_power_intrinsics.c   |   8 +-
  lib/eal/common/eal_common_trace.c|  16 +--
  lib/eal/include/generic/rte_atomic.h |  6

RE: [PATCH v6] eventdev/eth_rx: add new adapter create API

[Naga Harish K, S V]

> -Original Message-
> From: Jerin Jacob 
> Sent: Monday, August 21, 2023 9:07 PM
> To: Naga Harish K, S V 
> Cc: dev@dpdk.org; Carrillo, Erik G ; Gujjar,
> Abhinandan S ; McDaniel, Timothy
> ; pbhagavat...@marvell.com;
> sthot...@marvell.com; hemant.agra...@nxp.com;
> sachin.sax...@oss.nxp.com; Van Haaren, Harry
> ; mattias.ronnblom
> ; lian...@liangbit.com; Mccarthy, Peter
> ; Jayatheerthan, Jay
> 
> Subject: Re: [PATCH v6] eventdev/eth_rx: add new adapter create API
> 
> On Mon, Aug 21, 2023 at 8:59 PM Naga Harish K S V
>  wrote:
> >
> > Add new API "rte_event_eth_rx_adapter_create_ext_with_params()" for
> > creating Rx adapter instance. This API is similar to
> > rte_event_eth_rx_adapter_create_ext() with an additional input
> > argument for adapter configuration parameters of type "struct
> > rte_event_eth_rx_adapter_params".
> >
> > Signed-off-by: Naga Harish K S V 
> > ---
> > v2:
> >  * Fix warning
> > v3:
> >  * remove __rte_cold hint as per review comments
> > v4:
> >  * address review comments
> > v5:
> >  * Update release notes document
> > v6:
> >  * incorporate review comments
> 
> > +static int __rte_cold
> 
> Missed again to remove _rte_cold.
> Seriously, Please pay some attention when sending the patch(Same comment
> given in last time).
> 
__rte_cold is already removed for API definition and prototype. 
I thought having __rte_cold for this internal function is fine.
It is removed in the latest patch, thanks.

> 
> > +rxa_config_params_validate(struct rte_event_eth_rx_adapter_params
> *rxa_params,
> > +  struct rte_event_eth_rx_adapter_params
> > +*temp_params)

RE: [PATCH] net/iavf: fix checksum offloading

[Zhang, Qi Z]

> -Original Message-
> From: David Marchand 
> Sent: Tuesday, August 22, 2023 1:29 AM
> To: Zhang, Qi Z 
> Cc: dev@dpdk.org; echau...@redhat.com; m...@redhat.com;
> sta...@dpdk.org; Wu, Jingjing ; Xing, Beilei
> ; Doherty, Declan ; Sinha,
> Abhijit ; Nicolau, Radu 
> Subject: Re: [PATCH] net/iavf: fix checksum offloading
> 
> On Mon, Aug 21, 2023 at 1:54 PM Zhang, Qi Z  wrote:
> > > Subject: [PATCH] net/iavf: fix checksum offloading
> > >
> > > The only presence of RTE_MBUF_F_TX_IPV4 can't be used as an
> > > indicator that a checksum offload has been requested by an application.
> >
> > According to current implementation, actually the only presence of
> RTE_MBUF_F_TX_IPV4 will cause IIPT = 10b, this scenario corresponds to an
> 'IPv4 packet with no IP checksum offload,' according to datasheet.
> > So, I assume in this situation, the PMD  continues to operate under the
> assumption that the application has not requested checksum offloading.
> >
> > Could you share more insight what is the failure,  maybe we can perform a
> more comprehensive investigation?
> 
> I think the missing piece is that OVS passes a l2_len == l3_len == 0.
> In our tests, we could see that tx_errors get incremented for each failed 
> packet
> to transmit.

OK, do you think to ignore RTE_MBUF_F_TX_IPV4 when l3_len = 0 is a better fix?

> 
> 
> --
> David Marchand

RE: [PATCH v2] bus/pci: fix legacy device IO port map in secondary process

[Ma, WenwuX]

Hi,

> -Original Message-
> From: Stephen Hemminger 
> Sent: 2023年8月21日 10:53
> To: Ma, WenwuX 
> Cc: nipun.gu...@amd.com; dev@dpdk.org; david.march...@redhat.com;
> maxime.coque...@redhat.com; Xia, Chenbo ; Li,
> Miao ; Ling, WeiX ;
> sta...@dpdk.org
> Subject: Re: [PATCH v2] bus/pci: fix legacy device IO port map in secondary
> process
> 
> On Mon, 21 Aug 2023 09:27:07 +0800
> Wenwu Ma  wrote:
> 
> > +   struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
> > +   char pci_addr[PATH_MAX] = {0}
> 
> Not sure if some tools will complain about initializing chars as zero.
> Anyway, why bother since you are using it with snprintf.
> 
> Also, the new variables that are only used in the secondary case should be
> declared in that if() not for whole function.
> 
> 
Ok, thanks

[PATCH v3] bus/pci: fix legacy device IO port map in secondary process

[Wenwu Ma]

When doing IO port mapping for legacy device
in secondary process, the region information
is missing, so, we need to refill it.

Fixes: 4b741542ecde ("bus/pci: avoid depending on private kernel value")
Cc: sta...@dpdk.org

Signed-off-by: Wenwu Ma 
---
v3:
 - adjusting variable settings
v2:
 - add release of device in pci_vfio_ioport_unmap

---
 drivers/bus/pci/linux/pci_vfio.c | 43 ++--
 1 file changed, 41 insertions(+), 2 deletions(-)

diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c
index e634de8322..5ef26c98d1 100644
--- a/drivers/bus/pci/linux/pci_vfio.c
+++ b/drivers/bus/pci/linux/pci_vfio.c
@@ -1314,6 +1314,27 @@ pci_vfio_ioport_map(struct rte_pci_device *dev, int bar,
return -1;
}
 
+   if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
+   struct vfio_device_info device_info = { .argsz = 
sizeof(device_info) };
+   char pci_addr[PATH_MAX];
+   int vfio_dev_fd;
+   struct rte_pci_addr *loc = &dev->addr;
+   int ret;
+   /* store PCI address string */
+   snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
+   loc->domain, loc->bus, loc->devid, 
loc->function);
+
+   ret = rte_vfio_setup_device(rte_pci_get_sysfs_path(), pci_addr,
+   &vfio_dev_fd, &device_info);
+   if (ret)
+   return -1;
+
+   ret = pci_vfio_fill_regions(dev, vfio_dev_fd, &device_info);
+   if (ret)
+   return -1;
+
+   }
+
if (pci_vfio_get_region(dev, bar, &size, &offset) != 0) {
RTE_LOG(ERR, EAL, "Cannot get offset of region %d.\n", bar);
return -1;
@@ -1361,8 +1382,26 @@ pci_vfio_ioport_write(struct rte_pci_ioport *p,
 int
 pci_vfio_ioport_unmap(struct rte_pci_ioport *p)
 {
-   RTE_SET_USED(p);
-   return -1;
+   char pci_addr[PATH_MAX] = {0};
+   struct rte_pci_addr *loc = &p->dev->addr;
+   int ret, vfio_dev_fd;
+
+   /* store PCI address string */
+   snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
+   loc->domain, loc->bus, loc->devid, loc->function);
+
+   vfio_dev_fd = rte_intr_dev_fd_get(p->dev->intr_handle);
+   if (vfio_dev_fd < 0)
+   return -1;
+
+   ret = rte_vfio_release_device(rte_pci_get_sysfs_path(), pci_addr,
+ vfio_dev_fd);
+   if (ret < 0) {
+   RTE_LOG(ERR, EAL, "Cannot release VFIO device\n");
+   return ret;
+   }
+
+   return 0;
 }
 
 int
-- 
2.25.1

[PATCH] doc: update for Intel IPU

[beilei . xing]

From: Beilei Xing 

Remove *EXPERIMENTAL* for idpf and cpfl PMD.

Signed-off-by: Beilei Xing 
---
 doc/guides/nics/cpfl.rst | 4 ++--
 doc/guides/nics/idpf.rst | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/doc/guides/nics/cpfl.rst b/doc/guides/nics/cpfl.rst
index 39a2b603f3..73376a9608 100644
--- a/doc/guides/nics/cpfl.rst
+++ b/doc/guides/nics/cpfl.rst
@@ -6,8 +6,8 @@
 CPFL Poll Mode Driver
 =
 
-The [*EXPERIMENTAL*] cpfl PMD (**librte_net_cpfl**) provides poll mode driver 
support
-for Intel\ |reg| Infrastructure Processing Unit (Intel\ |reg| IPU) E2100.
+The cpfl PMD (**librte_net_cpfl**) provides poll mode driver support for
+Intel\ |reg| Infrastructure Processing Unit (Intel\ |reg| IPU) E2100.
 Please refer to
 
https://www.intel.com/content/www/us/en/products/network-io/infrastructure-processing-units/asic/e2000-asic.html
 for more information.
diff --git a/doc/guides/nics/idpf.rst b/doc/guides/nics/idpf.rst
index c55f81fb24..50bc92d9ea 100644
--- a/doc/guides/nics/idpf.rst
+++ b/doc/guides/nics/idpf.rst
@@ -6,8 +6,8 @@
 IDPF Poll Mode Driver
 =
 
-The [*EXPERIMENTAL*] idpf PMD (**librte_net_idpf**) provides poll mode driver 
support
-for Intel\ |reg| Infrastructure Processing Unit (Intel\ |reg| IPU) E2100.
+The idpf PMD (**librte_net_idpf**) provides poll mode driver support for
+Intel\ |reg| Infrastructure Processing Unit (Intel\ |reg| IPU) E2100.
 
 
 Linux Prerequisites
-- 
2.34.1