Re: [PATCH] app/test-eventdev: wait for workers before cryptodev destroy
On Mon, Jun 13, 2022 at 12:08 PM Pavan Nikhilesh Bhagavatula
wrote:
>
>
>
> > -Original Message-
> > From: Shijith Thotton
> > Sent: Thursday, June 2, 2022 5:15 PM
> > To: Jerin Jacob Kollanukkaran
> > Cc: Shijith Thotton ; dev@dpdk.org; Pavan
> > Nikhilesh Bhagavatula
> > Subject: [PATCH] app/test-eventdev: wait for workers before cryptodev
> > destroy
> >
> > Destroying cryptodev resources before exiting workers are not safe.
> > Moved cryptodev destroy after worker thread exit in main thread.
> >
> > Fixes: de2bc16e1bd1 ("app/eventdev: add crypto producer mode")
Cc: sta...@dpdk.org
> >
> > Signed-off-by: Shijith Thotton
>
> Acked-by: Pavan Nikhilesh
Acked-by: Jerin Jacob
Applied to dpdk-next-net-eventdev/for-main. Thanks
>
> > ---
> > app/test-eventdev/evt_main.c | 6 +++---
> > 1 file changed, 3 insertions(+), 3 deletions(-)
> >
> > diff --git a/app/test-eventdev/evt_main.c b/app/test-eventdev/evt_main.c
> > index c5d63061bf..b785e603ee 100644
> > --- a/app/test-eventdev/evt_main.c
> > +++ b/app/test-eventdev/evt_main.c
> > @@ -159,9 +159,6 @@ main(int argc, char **argv)
> > if (test->ops.ethdev_rx_stop)
> > test->ops.ethdev_rx_stop(test, &opt);
> >
> > - if (test->ops.cryptodev_destroy)
> > - test->ops.cryptodev_destroy(test, &opt);
> > -
> > rte_eal_mp_wait_lcore();
> >
> > if (test->ops.test_result)
> > @@ -173,6 +170,9 @@ main(int argc, char **argv)
> > if (test->ops.eventdev_destroy)
> > test->ops.eventdev_destroy(test, &opt);
> >
> > + if (test->ops.cryptodev_destroy)
> > + test->ops.cryptodev_destroy(test, &opt);
> > +
> > if (test->ops.mempool_destroy)
> > test->ops.mempool_destroy(test, &opt);
> >
> > --
> > 2.25.1
>
RE: [PATCH v2 1/2] raw/ifpga/base: add pmci driver
> -Original Message-
> From: Huang, Wei
> Sent: Friday, June 10, 2022 10:25 AM
> To: dev@dpdk.org; tho...@monjalon.net; nipun.gu...@nxp.com;
> hemant.agra...@nxp.com
> Cc: sta...@dpdk.org; Xu, Rosen ; Zhang, Tianfei
> ; Zhang, Qi Z ; Huang, Wei
>
> Subject: [PATCH v2 1/2] raw/ifpga/base: add pmci driver
>
> PMCI (Platform Management Control Interface) is a new module in FPGA,
> which is designed to cooperate with BMC chip to fulfill board management
> functions.
> This driver provide interfaces to access registers of BMC chip and
> external flash of FPGA.
>
> Signed-off-by: Wei Huang
> ---
> drivers/raw/ifpga/base/ifpga_defines.h | 103 ++-
> drivers/raw/ifpga/base/ifpga_feature_dev.c | 2 +
> drivers/raw/ifpga/base/ifpga_feature_dev.h | 1 +
> drivers/raw/ifpga/base/ifpga_fme.c | 265 +--
> drivers/raw/ifpga/base/ifpga_fme_error.c | 2 +
> drivers/raw/ifpga/base/ifpga_port_error.c| 2 +-
> drivers/raw/ifpga/base/ifpga_sec_mgr.c | 9 +-
> drivers/raw/ifpga/base/ifpga_sec_mgr.h | 9 +-
> drivers/raw/ifpga/base/opae_hw_api.c | 29 +
> drivers/raw/ifpga/base/opae_hw_api.h | 1 +
> drivers/raw/ifpga/base/opae_intel_max10.c| 938
> ---
> drivers/raw/ifpga/base/opae_intel_max10.h| 313 +++-
> drivers/raw/ifpga/base/opae_osdep.h | 43 +-
> drivers/raw/ifpga/base/osdep_rte/osdep_generic.h | 10 +
> 14 files changed, 1524 insertions(+), 203 deletions(-)
This patch is very huge. I thinks this patch can slit into 3 patches: base PMCI
driver, flash support and sensor support.
>
> diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
> b/drivers/raw/ifpga/base/ifpga_defines.h
> index 9a280eb..7c8fa89 100644
> --- a/drivers/raw/ifpga/base/ifpga_defines.h
> +++ b/drivers/raw/ifpga/base/ifpga_defines.h
> @@ -23,6 +23,7 @@
> #define FME_FEATURE_NIOS_SPI"fme_nios_spi"
> #define FME_FEATURE_I2C_MASTER "fme_i2c_master"
> #define FME_FEATURE_ETH_GROUP "fme_eth_group"
> +#define FME_FEATURE_PMCI"fme_pmci"
>
> #define PORT_FEATURE_HEADER "port_hdr"
> #define PORT_FEATURE_UAFU "port_uafu"
> @@ -91,6 +92,7 @@ enum fpga_id_type {
> #define FME_FEATURE_ID_NIOS_SPI 0xd
> #define FME_FEATURE_ID_I2C_MASTER 0xf
> #define FME_FEATURE_ID_ETH_GROUP 0x10
> +#define FME_FEATURE_ID_PMCI 0x12
>
> #define PORT_FEATURE_ID_HEADER FEATURE_ID_FIU_HEADER
> #define PORT_FEATURE_ID_ERROR 0x10
> @@ -266,6 +268,24 @@ struct feature_fme_bitstream_id {
> union {
> u64 csr;
> struct {
> + u8 build_patch:8;
> + u8 build_minor:8;
> + u8 build_major:8;
> + u8 fvl_bypass:1;
> + u8 mac_lightweight:1;
> + u8 disagregate:1;
> + u8 lightweiht:1;
> + u8 seu:1;
> + u8 ptp:1;
> + u8 reserve:2;
> + u8 interface:4;
> + u32 afu_revision:12;
> + u8 patch:4;
> + u8 minor:4;
> + u8 major:4;
> + u8 reserved:4;
> + } v1;
> + struct {
> u32 gitrepo_hash:32;/* GIT repository hash */
> /*
>* HSSI configuration identifier:
> @@ -274,7 +294,8 @@ struct feature_fme_bitstream_id {
>* 2 - Ethernet
>*/
> u8 hssi_id:4;
> - u16 rsvd1:12; /* Reserved */
> + u8 rsvd1:4;
> + u8 fim_type:8;
> /* Bitstream version patch number */
> u8 bs_verpatch:4;
> /* Bitstream version minor number */
> @@ -283,7 +304,7 @@ struct feature_fme_bitstream_id {
> u8 bs_vermajor:4;
> /* Bitstream version debug number */
> u8 bs_verdebug:4;
> - };
> + } v2;
> };
> };
>
> @@ -1670,31 +1691,6 @@ struct bts_header {
>
> #define check_support(n) (n == 1 ? "support" : "no")
>
> -/* bitstream id definition */
> -struct fme_bitstream_id {
> - union {
> - u64 id;
> - struct {
> - u8 build_patch:8;
> - u8 build_minor:8;
> - u8 build_major:8;
> - u8 fvl_bypass:1;
> - u8 mac_lightweight:1;
> - u8 disagregate:1;
> - u8 lightweiht:1;
> - u8 seu:1;
> - u8 ptp:1;
> - u8 reserve:2;
> - u8 interface:4;
> - u32 afu_revision:12;
> - u8 patch:4;
> -
[PATCH] drivers: rename octeon ep PMD
This patch renames octeon end point driver from
octeontx_ep to octeon_ep
Signed-off-by: Sathesh B Edara
---
MAINTAINERS | 6 +-
.../{octeontx_ep.ini => octeon_ep.ini}| 2 +-
doc/guides/nics/index.rst | 2 +-
.../nics/{octeontx_ep.rst => octeon_ep.rst} | 2 +-
drivers/net/meson.build | 2 +-
.../{octeontx_ep => octeon_ep}/meson.build| 0
.../{octeontx_ep => octeon_ep}/otx2_ep_vf.c | 0
.../{octeontx_ep => octeon_ep}/otx2_ep_vf.h | 0
.../otx_ep_common.h | 0
.../otx_ep_ethdev.c | 67 +++
.../{octeontx_ep => octeon_ep}/otx_ep_rxtx.c | 0
.../{octeontx_ep => octeon_ep}/otx_ep_rxtx.h | 0
.../{octeontx_ep => octeon_ep}/otx_ep_vf.c| 0
.../{octeontx_ep => octeon_ep}/otx_ep_vf.h| 0
.../{octeontx_ep => octeon_ep}/version.map| 0
15 files changed, 74 insertions(+), 7 deletions(-)
rename doc/guides/nics/features/{octeontx_ep.ini => octeon_ep.ini} (75%)
rename doc/guides/nics/{octeontx_ep.rst => octeon_ep.rst} (93%)
rename drivers/net/{octeontx_ep => octeon_ep}/meson.build (100%)
rename drivers/net/{octeontx_ep => octeon_ep}/otx2_ep_vf.c (100%)
rename drivers/net/{octeontx_ep => octeon_ep}/otx2_ep_vf.h (100%)
rename drivers/net/{octeontx_ep => octeon_ep}/otx_ep_common.h (100%)
rename drivers/net/{octeontx_ep => octeon_ep}/otx_ep_ethdev.c (86%)
rename drivers/net/{octeontx_ep => octeon_ep}/otx_ep_rxtx.c (100%)
rename drivers/net/{octeontx_ep => octeon_ep}/otx_ep_rxtx.h (100%)
rename drivers/net/{octeontx_ep => octeon_ep}/otx_ep_vf.c (100%)
rename drivers/net/{octeontx_ep => octeon_ep}/otx_ep_vf.h (100%)
rename drivers/net/{octeontx_ep => octeon_ep}/version.map (100%)
diff --git a/MAINTAINERS b/MAINTAINERS
index f34f6fa2e9..01c0c5ee5e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -798,9 +798,9 @@ M: Nalla Pradeep
M: Radha Mohan Chintakuntla
M: Veerasenareddy Burru
T: git://dpdk.org/next/dpdk-next-net-mrvl
-F: drivers/net/octeontx_ep/
-F: doc/guides/nics/features/octeontx_ep.ini
-F: doc/guides/nics/octeontx_ep.rst
+F: drivers/net/octeon_ep/
+F: doc/guides/nics/features/octeon_ep.ini
+F: doc/guides/nics/octeon_ep.rst
Mellanox mlx4
M: Matan Azrad
diff --git a/doc/guides/nics/features/octeontx_ep.ini
b/doc/guides/nics/features/octeon_ep.ini
similarity index 75%
rename from doc/guides/nics/features/octeontx_ep.ini
rename to doc/guides/nics/features/octeon_ep.ini
index d1453f5bee..141d918466 100644
--- a/doc/guides/nics/features/octeontx_ep.ini
+++ b/doc/guides/nics/features/octeon_ep.ini
@@ -1,5 +1,5 @@
;
-; Supported features of the 'octeontx_ep' network poll mode driver.
+; Supported features of the 'octeon_ep' network poll mode driver.
;
; Refer to default.ini for the full list of available PMD features.
;
diff --git a/doc/guides/nics/index.rst b/doc/guides/nics/index.rst
index f48e9f815c..f80906a97d 100644
--- a/doc/guides/nics/index.rst
+++ b/doc/guides/nics/index.rst
@@ -52,7 +52,7 @@ Network Interface Controller Drivers
ngbe
null
octeontx
-octeontx_ep
+octeon_ep
pfe
qede
sfc_efx
diff --git a/doc/guides/nics/octeontx_ep.rst b/doc/guides/nics/octeon_ep.rst
similarity index 93%
rename from doc/guides/nics/octeontx_ep.rst
rename to doc/guides/nics/octeon_ep.rst
index 2ec8a034b5..53610d7463 100644
--- a/doc/guides/nics/octeontx_ep.rst
+++ b/doc/guides/nics/octeon_ep.rst
@@ -4,7 +4,7 @@
OCTEON TX EP Poll Mode driver
=
-The OCTEON TX EP ETHDEV PMD (**librte_pmd_octeontx_ep**) provides poll mode
+The OCTEON TX EP ETHDEV PMD (**librte_pmd_octeon_ep**) provides poll mode
ethdev driver support for the virtual functions (VF) of **Marvell OCTEON 9**
and **Cavium OCTEON TX** families of adapters in SR-IOV context.
diff --git a/drivers/net/meson.build b/drivers/net/meson.build
index e35652fe63..37919eaf8b 100644
--- a/drivers/net/meson.build
+++ b/drivers/net/meson.build
@@ -45,7 +45,7 @@ drivers = [
'ngbe',
'null',
'octeontx',
-'octeontx_ep',
+'octeon_ep',
'pcap',
'pfe',
'qede',
diff --git a/drivers/net/octeontx_ep/meson.build
b/drivers/net/octeon_ep/meson.build
similarity index 100%
rename from drivers/net/octeontx_ep/meson.build
rename to drivers/net/octeon_ep/meson.build
diff --git a/drivers/net/octeontx_ep/otx2_ep_vf.c
b/drivers/net/octeon_ep/otx2_ep_vf.c
similarity index 100%
rename from drivers/net/octeontx_ep/otx2_ep_vf.c
rename to drivers/net/octeon_ep/otx2_ep_vf.c
diff --git a/drivers/net/octeontx_ep/otx2_ep_vf.h
b/drivers/net/octeon_ep/otx2_ep_vf.h
similarity index 100%
rename from drivers/net/octeontx_ep/otx2_ep_vf.h
rename to drivers/net/octeon_ep/otx2_ep_vf.h
diff --git a/drivers/net/octeontx_ep/otx_ep_common.h
b/drivers/net/octeon_ep/otx_ep_common.h
similarity index 100%
rename from drivers/net/octeontx_ep/otx_ep_common.h
rename to drivers/net/octeon_e
RE: [EXT] Re: [PATCH] drivers: rename octeon ep PMD
> -Original Message- > From: Thomas Monjalon > Sent: Tuesday, June 7, 2022 8:06 AM > To: Sathesh B Edara > Cc: Ray Kinsella ; Satananda Burla ; > Jerin Jacob Kollanukkaran ; Pradeep Kumar Nalla > ; Radha Chintakuntla ; > Veerasenareddy Burru ; dev@dpdk.org > Subject: [EXT] Re: [PATCH] drivers: rename octeon ep PMD > > External Email > > -- > 07/06/2022 16:38, Ray Kinsella: > > Sathesh B Edara writes: > > > > > This patch renames octeon end point driver from octeontx_ep to > > > octeon_ep > > > > > > Signed-off-by: Sathesh B Edara > > > > Straight forward rename, > > > > Acked-by: Ray Kinsella > > The name change was not announced. > Why is it required? Thomas, we acknowledge, missed to announce before submitting the change. Current driver name "octeontx_ep" was to support OcteonTX line of products. We are renaming it to apply for all Octeon EP products (OcteonTX + future Octeon chipsets). > >
RE: [EXT] Re: [PATCH] drivers: rename octeon ep PMD
> -Original Message- > From: Thomas Monjalon > Sent: Tuesday, June 7, 2022 9:56 AM > To: Sathesh B Edara ; Veerasenareddy Burru > > Cc: Ray Kinsella ; Satananda Burla ; > Jerin Jacob Kollanukkaran ; Pradeep Kumar Nalla > ; Radha Chintakuntla ; > dev@dpdk.org; david.march...@redhat.com > Subject: Re: [EXT] Re: [PATCH] drivers: rename octeon ep PMD > > 07/06/2022 18:18, Veerasenareddy Burru: > > From: Thomas Monjalon > > > 07/06/2022 16:38, Ray Kinsella: > > > > Sathesh B Edara writes: > > > > > > > > > This patch renames octeon end point driver from octeontx_ep to > > > > > octeon_ep > > > > > > > > > > Signed-off-by: Sathesh B Edara > > > > > > > > Straight forward rename, > > > > > > > > Acked-by: Ray Kinsella > > > > > > The name change was not announced. > > > Why is it required? > > Thomas, > > we acknowledge, missed to announce before submitting the change. > > Current driver name "octeontx_ep" was to support OcteonTX line of > products. We are renaming it to apply for all Octeon EP products (OcteonTX + > future Octeon chipsets). > > Do you want to announce it first and do the change in 22.11? Sure. We will do that. Will resubmit the patch after announcement. > It would allow users to be prepared for the change. >
pipeline port in /port out error (swx)
Hello, I'm using dpdk-22.03 in an Ubuntu 20.04 Virtual Machine using VirtualBox. Two network devices are binded. ./usertools/dpdk-devbind.py --status Nework devices using DPDK-compatible driver :00:08.0 "8254EM Gigabit" drv=uio_pci_generic unused=e1000,vfio-pci :00:09.0 "8254EM Gigabit" drv=uio_pci_generic unused=e1000,vfio-pci I am testing the pipeline application and the given examples (registers.cli, l2fwd.cli...), but the pipeline port in / port out commands always fail. For example, testing dpdk-pipeline -l0-1 -- -s ./examples/pipeline/examples/registers.cli mempool MEMPOOL0 buffer 2304 pool 32K cache 256 cpu 0 -> OK link LINK0 dev :00:08.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscouos on -> OK link LINK1 dev :00:09.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscouos on -> OK (also checked using "link show") pipeline PIPELINE0 create 0 -> OK pipeline PIPELINE0 port in 0 link LINK0 rxq 0 bsz 32 --> port in error pipeline PIPELINE0 port in 1 link LINK1 rxq 0 bsz 32 --> port in error pipeline PIPELINE0 port out 0 link LINK0 txq 0 bsz 32 --> port out error pipeline PIPELINE0 port out 1 link LINK1 txq 0 bsz 32 --> port out error rte_swx_ctl_pipeline_port_in_config(p->p, port_id,"ethdev",¶ms) returns -22 (EINVAL) incorrect values The same happens testing l2fwd_mac_swap_pcap.cli which uses "source" and "sink" types. Any idea what is happening or how to solve it? Thanks in advance
[PATCH] config/arm: add PHYTIUM ft2000plus
Here adds configs for PHYTIUM server.
Signed-off-by: luzhipeng
---
config/arm/arm64_ft2000plus_linux_gcc | 16
config/arm/meson.build| 26 +-
2 files changed, 41 insertions(+), 1 deletion(-)
create mode 100644 config/arm/arm64_ft2000plus_linux_gcc
diff --git a/config/arm/arm64_ft2000plus_linux_gcc
b/config/arm/arm64_ft2000plus_linux_gcc
new file mode 100644
index 00..554517054e
--- /dev/null
+++ b/config/arm/arm64_ft2000plus_linux_gcc
@@ -0,0 +1,16 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+platform = 'ft2000plus'
diff --git a/config/arm/meson.build b/config/arm/meson.build
index aa12eb76f4..48e5f6af5b 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -218,6 +218,20 @@ implementer_qualcomm = {
}
}
+implementer_phytium = {
+'description': 'PHYTIUM',
+'flags': [
+['RTE_MACHINE', '"armv8a"'],
+['RTE_USE_C11_MEM_MODEL', true],
+['RTE_CACHE_LINE_SIZE', 64],
+['RTE_MAX_LCORE', 64],
+['RTE_MAX_NUMA_NODES', 8]
+],
+'part_number_config': {
+'0x662': {'machine_args': ['-march=armv8-a+crc']}
+}
+}
+
## Arm implementers (ID from MIDR in Arm Architecture Reference Manual)
implementers = {
'generic': implementer_generic,
@@ -225,7 +239,8 @@ implementers = {
'0x43': implementer_cavium,
'0x48': implementer_hisilicon,
'0x50': implementer_ampere,
-'0x51': implementer_qualcomm
+'0x51': implementer_qualcomm,
+'0x70': implementer_phytium
}
# SoC specific armv8 flags have the highest priority
@@ -378,6 +393,13 @@ soc_thunderxt83 = {
'part_number': '0xa3'
}
+soc_ft2000plus = {
+'description': 'PHYTIUM ft2000plus',
+'implementer': '0x70',
+'part_number': '0x662',
+'numa': true
+}
+
'''
Start of SoCs list
generic: Generic un-optimized build for armv8 aarch64 execution mode.
@@ -398,6 +420,7 @@ stingray:Broadcom Stingray
thunderx2: Marvell ThunderX2 T99
thunderxt88: Marvell ThunderX T88
thunderxt83: Marvell ThunderX T83
+ft2000plus: PHYTIUM ft2000plus
End of SoCs list
'''
# The string above is included in the documentation, keep it in sync with the
@@ -421,6 +444,7 @@ socs = {
'thunderx2': soc_thunderx2,
'thunderxt88': soc_thunderxt88,
'thunderxt83': soc_thunderxt83,
+'ft2000plus': soc_ft2000plus,
}
dpdk_conf.set('RTE_ARCH_ARM', 1)
--
2.27.0
[PATCH] config/arm: add PHYTIUM ft2000plus
Here adds configs for PHYTIUM server.
Signed-off-by: luzhipeng
---
config/arm/arm64_ft2000plus_linux_gcc | 16
config/arm/meson.build| 26 +-
2 files changed, 41 insertions(+), 1 deletion(-)
create mode 100644 config/arm/arm64_ft2000plus_linux_gcc
diff --git a/config/arm/arm64_ft2000plus_linux_gcc
b/config/arm/arm64_ft2000plus_linux_gcc
new file mode 100644
index 00..554517054e
--- /dev/null
+++ b/config/arm/arm64_ft2000plus_linux_gcc
@@ -0,0 +1,16 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+platform = 'ft2000plus'
diff --git a/config/arm/meson.build b/config/arm/meson.build
index aa12eb76f4..48e5f6af5b 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -218,6 +218,20 @@ implementer_qualcomm = {
}
}
+implementer_phytium = {
+'description': 'PHYTIUM',
+'flags': [
+['RTE_MACHINE', '"armv8a"'],
+['RTE_USE_C11_MEM_MODEL', true],
+['RTE_CACHE_LINE_SIZE', 64],
+['RTE_MAX_LCORE', 64],
+['RTE_MAX_NUMA_NODES', 8]
+],
+'part_number_config': {
+'0x662': {'machine_args': ['-march=armv8-a+crc']}
+}
+}
+
## Arm implementers (ID from MIDR in Arm Architecture Reference Manual)
implementers = {
'generic': implementer_generic,
@@ -225,7 +239,8 @@ implementers = {
'0x43': implementer_cavium,
'0x48': implementer_hisilicon,
'0x50': implementer_ampere,
-'0x51': implementer_qualcomm
+'0x51': implementer_qualcomm,
+'0x70': implementer_phytium
}
# SoC specific armv8 flags have the highest priority
@@ -378,6 +393,13 @@ soc_thunderxt83 = {
'part_number': '0xa3'
}
+soc_ft2000plus = {
+'description': 'PHYTIUM ft2000plus',
+'implementer': '0x70',
+'part_number': '0x662',
+'numa': true
+}
+
'''
Start of SoCs list
generic: Generic un-optimized build for armv8 aarch64 execution mode.
@@ -398,6 +420,7 @@ stingray:Broadcom Stingray
thunderx2: Marvell ThunderX2 T99
thunderxt88: Marvell ThunderX T88
thunderxt83: Marvell ThunderX T83
+ft2000plus: PHYTIUM ft2000plus
End of SoCs list
'''
# The string above is included in the documentation, keep it in sync with the
@@ -421,6 +444,7 @@ socs = {
'thunderx2': soc_thunderx2,
'thunderxt88': soc_thunderxt88,
'thunderxt83': soc_thunderxt83,
+'ft2000plus': soc_ft2000plus,
}
dpdk_conf.set('RTE_ARCH_ARM', 1)
--
2.27.0
Re: [PATCH] config/arm: add PHYTIUM ft2000plus
Thanks
在 2022/6/13 11:39, Ruifeng Wang 写道:
-Original Message-
From: luzhipeng
Sent: Friday, June 10, 2022 1:47 PM
To: dev@dpdk.org
Cc: Jan Viktorin ; Ruifeng Wang
; Bruce Richardson
; luzhipeng
Subject: [PATCH] config/arm: add PHYTIUM ft2000plus
Here adds configs for PHYTIUM server.
Signed-off-by: luzhipeng
I cannot find this patch in Patchwork.
I send the patch and receive the message：
Your mail to 'dev' with the subject
[PATCH] config/arm: add PHYTIUM ft2000plus
Is being held until the list moderator can review it for approval.
The reason it is being held:
Post by non-member to a members-only list
---
config/arm/arm64_ft2000plus_linux_gcc | 16
config/arm/meson.build| 26 +-
2 files changed, 41 insertions(+), 1 deletion(-) create mode 100644
config/arm/arm64_ft2000plus_linux_gcc
diff --git a/config/arm/arm64_ft2000plus_linux_gcc
b/config/arm/arm64_ft2000plus_linux_gcc
new file mode 100644
index 00..554517054e
--- /dev/null
+++ b/config/arm/arm64_ft2000plus_linux_gcc
@@ -0,0 +1,16 @@
+[binaries]
+c = 'aarch64-linux-gnu-gcc'
You may want to add ccache support when below one is merged.
http://patches.dpdk.org/project/dpdk/patch/20220608171304.945454-1-jer...@marvell.com/
OK，
+cpp = 'aarch64-linux-gnu-cpp'
+ar = 'aarch64-linux-gnu-gcc-ar'
+strip = 'aarch64-linux-gnu-strip'
+pkgconfig = 'aarch64-linux-gnu-pkg-config'
+pcap-config = ''
+
+[host_machine]
+system = 'linux'
+cpu_family = 'aarch64'
+cpu = 'armv8-a'
+endian = 'little'
+
+[properties]
+platform = 'ft2000plus'
diff --git a/config/arm/meson.build b/config/arm/meson.build index
aa12eb76f4..48e5f6af5b 100644
--- a/config/arm/meson.build
+++ b/config/arm/meson.build
@@ -218,6 +218,20 @@ implementer_qualcomm = {
}
}
+implementer_phytium = {
+'description': 'PHYTIUM',
+'flags': [
+['RTE_MACHINE', '"armv8a"'],
+['RTE_USE_C11_MEM_MODEL', true],
+['RTE_CACHE_LINE_SIZE', 64],
+['RTE_MAX_LCORE', 64],
+['RTE_MAX_NUMA_NODES', 8]
+],
+'part_number_config': {
+'0x662': {'machine_args': ['-march=armv8-a+crc']}
+}
+}
+
## Arm implementers (ID from MIDR in Arm Architecture Reference Manual)
implementers = {
'generic': implementer_generic,
@@ -225,7 +239,8 @@ implementers = {
'0x43': implementer_cavium,
'0x48': implementer_hisilicon,
'0x50': implementer_ampere,
-'0x51': implementer_qualcomm
+'0x51': implementer_qualcomm,
+'0x70': implementer_phytium
}
# SoC specific armv8 flags have the highest priority @@ -378,6 +393,13 @@
soc_thunderxt83 = {
'part_number': '0xa3'
}
+soc_ft2000plus = {
+'description': 'PHYTIUM ft2000plus',
+'implementer': '0x70',
+'part_number': '0x662',
+'numa': true
+}
+
'''
Start of SoCs list
generic: Generic un-optimized build for armv8 aarch64 execution mode.
@@ -398,6 +420,7 @@ stingray:Broadcom Stingray
thunderx2: Marvell ThunderX2 T99
thunderxt88: Marvell ThunderX T88
thunderxt83: Marvell ThunderX T83
+ft2000plus: PHYTIUM ft2000plus
End of SoCs list
'''
# The string above is included in the documentation, keep it in sync with the
@@ -421,6 +444,7 @@ socs = {
'thunderx2': soc_thunderx2,
'thunderxt88': soc_thunderxt88,
'thunderxt83': soc_thunderxt83,
+'ft2000plus': soc_ft2000plus,
}
dpdk_conf.set('RTE_ARCH_ARM', 1)
--
2.27.0
Re: [PATCH] common/cnxk: alloc link map array if HWS is available
On Fri, Jun 3, 2022 at 10:41 AM Shijith Thotton wrote:
>
> Link map array is required only if work slots are available.
>
> Signed-off-by: Shijith Thotton
> ---
> drivers/common/cnxk/roc_sso.c | 45 +++
Applied to dpdk-next-net-eventdev/for-main. Thanks
> 1 file changed, 25 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/common/cnxk/roc_sso.c b/drivers/common/cnxk/roc_sso.c
> index 358d37a9f2..34b9896d5f 100644
> --- a/drivers/common/cnxk/roc_sso.c
> +++ b/drivers/common/cnxk/roc_sso.c
> @@ -784,29 +784,34 @@ roc_sso_dev_init(struct roc_sso *roc_sso)
> }
> rc = -ENOMEM;
>
> - sso->link_map =
> - plt_zmalloc(sizeof(struct plt_bitmap *) * roc_sso->max_hws,
> 0);
> - if (sso->link_map == NULL) {
> - plt_err("Failed to allocate memory for link_map array");
> - goto rsrc_fail;
> - }
> + if (roc_sso->max_hws) {
> + sso->link_map = plt_zmalloc(
> + sizeof(struct plt_bitmap *) * roc_sso->max_hws, 0);
> + if (sso->link_map == NULL) {
> + plt_err("Failed to allocate memory for link_map
> array");
> + goto rsrc_fail;
> + }
>
> - link_map_sz = plt_bitmap_get_memory_footprint(roc_sso->max_hwgrp);
> - sso->link_map_mem = plt_zmalloc(link_map_sz * roc_sso->max_hws, 0);
> - if (sso->link_map_mem == NULL) {
> - plt_err("Failed to get link_map memory");
> - goto rsrc_fail;
> - }
> + link_map_sz =
> + plt_bitmap_get_memory_footprint(roc_sso->max_hwgrp);
> + sso->link_map_mem =
> + plt_zmalloc(link_map_sz * roc_sso->max_hws, 0);
> + if (sso->link_map_mem == NULL) {
> + plt_err("Failed to get link_map memory");
> + goto rsrc_fail;
> + }
>
> - link_mem = sso->link_map_mem;
> - for (i = 0; i < roc_sso->max_hws; i++) {
> - sso->link_map[i] = plt_bitmap_init(roc_sso->max_hwgrp,
> link_mem,
> - link_map_sz);
> - if (sso->link_map[i] == NULL) {
> - plt_err("Failed to allocate link map");
> - goto link_mem_free;
> + link_mem = sso->link_map_mem;
> +
> + for (i = 0; i < roc_sso->max_hws; i++) {
> + sso->link_map[i] = plt_bitmap_init(
> + roc_sso->max_hwgrp, link_mem, link_map_sz);
> + if (sso->link_map[i] == NULL) {
> + plt_err("Failed to allocate link map");
> + goto link_mem_free;
> + }
> + link_mem = PLT_PTR_ADD(link_mem, link_map_sz);
> }
> - link_mem = PLT_PTR_ADD(link_mem, link_map_sz);
> }
> idev_sso_pffunc_set(sso->dev.pf_func);
> idev_sso_set(roc_sso);
> --
> 2.25.1
>
Re: [dpdk-dev] [PATCH] common/cnxk: fix channel number setting in MCAM entries
On Mon, May 2, 2022 at 2:17 PM wrote:
>
> From: Satheesh Paul
>
> Adding changes to accommodate the following requirements
> while masking the channel number.
> 1. For CN10K device, channel number should not be masked
>for first pass rules with RTE_FLOW_ACTION_TYPE_SECURITY
>action. And channel number should be masked for all
>other flow rules.
> 2. For CN9K device channel number should not be masked.
>
> Fixes: 29dcc20985 ("common/cnxk: support for CPT second pass flow rules")
Not correct. Updated as
Fixes: 4968b362b639 ("common/cnxk: support CPT second pass flow rules")
> Cc: sta...@dpdk.org
>
> Signed-off-by: Satheesh Paul
> Reviewed-by: Kiran Kumar Kokkilagadda
Updated as Reviewed-by: Kiran Kumar K
Please check this in future patches,
Applied to dpdk-next-net-mrvl/for-next-net. Thanks
> ---
> drivers/common/cnxk/roc_npc_mcam.c | 30 ++
> 1 file changed, 18 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/common/cnxk/roc_npc_mcam.c
> b/drivers/common/cnxk/roc_npc_mcam.c
> index bccbaaa51f..0ae58da0ba 100644
> --- a/drivers/common/cnxk/roc_npc_mcam.c
> +++ b/drivers/common/cnxk/roc_npc_mcam.c
> @@ -508,19 +508,25 @@ npc_mcam_set_channel(struct roc_npc_flow *flow,
> req->entry_data.kw_mask[0] &= ~(GENMASK(11, 0));
> flow->mcam_data[0] &= ~(GENMASK(11, 0));
> flow->mcam_mask[0] &= ~(GENMASK(11, 0));
> + chan = channel;
> + mask = chan_mask;
>
> - if (is_second_pass) {
> - chan = (channel | NIX_CHAN_CPT_CH_START);
> - mask = (chan_mask | NIX_CHAN_CPT_CH_START);
> - } else {
> - /*
> -* Clear bits 10 & 11 corresponding to CPT
> -* channel. By default, rules should match
> -* both first pass packets and second pass
> -* packets from CPT.
> -*/
> - chan = (channel & NIX_CHAN_CPT_X2P_MASK);
> - mask = (chan_mask & NIX_CHAN_CPT_X2P_MASK);
> + if (roc_model_runtime_is_cn10k()) {
> + if (is_second_pass) {
> + chan = (channel | NIX_CHAN_CPT_CH_START);
> + mask = (chan_mask | NIX_CHAN_CPT_CH_START);
> + } else {
> + if (!(flow->npc_action &
> NIX_RX_ACTIONOP_UCAST_IPSEC)) {
> + /*
> +* Clear bits 10 & 11 corresponding to CPT
> +* channel. By default, rules should match
> +* both first pass packets and second pass
> +* packets from CPT.
> +*/
> + chan = (channel & NIX_CHAN_CPT_X2P_MASK);
> + mask = (chan_mask & NIX_CHAN_CPT_X2P_MASK);
> + }
> + }
> }
>
> req->entry_data.kw[0] |= (uint64_t)chan;
> --
> 2.25.4
>
RE: [PATCH v2 1/2] raw/ifpga/base: add pmci driver
> -Original Message-
> From: Zhang, Tianfei
> Sent: Monday, June 13, 2022 15:01
> To: Huang, Wei ; dev@dpdk.org;
> tho...@monjalon.net; nipun.gu...@nxp.com; hemant.agra...@nxp.com
> Cc: sta...@dpdk.org; Xu, Rosen ; Zhang, Qi Z
>
> Subject: RE: [PATCH v2 1/2] raw/ifpga/base: add pmci driver
>
>
>
> > -Original Message-
> > From: Huang, Wei
> > Sent: Friday, June 10, 2022 10:25 AM
> > To: dev@dpdk.org; tho...@monjalon.net; nipun.gu...@nxp.com;
> > hemant.agra...@nxp.com
> > Cc: sta...@dpdk.org; Xu, Rosen ; Zhang, Tianfei
> > ; Zhang, Qi Z ; Huang,
> Wei
> >
> > Subject: [PATCH v2 1/2] raw/ifpga/base: add pmci driver
> >
> > PMCI (Platform Management Control Interface) is a new module in FPGA,
> > which is designed to cooperate with BMC chip to fulfill board management
> > functions.
> > This driver provide interfaces to access registers of BMC chip and
> > external flash of FPGA.
> >
> > Signed-off-by: Wei Huang
> > ---
> > drivers/raw/ifpga/base/ifpga_defines.h | 103 ++-
> > drivers/raw/ifpga/base/ifpga_feature_dev.c | 2 +
> > drivers/raw/ifpga/base/ifpga_feature_dev.h | 1 +
> > drivers/raw/ifpga/base/ifpga_fme.c | 265 +--
> > drivers/raw/ifpga/base/ifpga_fme_error.c | 2 +
> > drivers/raw/ifpga/base/ifpga_port_error.c| 2 +-
> > drivers/raw/ifpga/base/ifpga_sec_mgr.c | 9 +-
> > drivers/raw/ifpga/base/ifpga_sec_mgr.h | 9 +-
> > drivers/raw/ifpga/base/opae_hw_api.c | 29 +
> > drivers/raw/ifpga/base/opae_hw_api.h | 1 +
> > drivers/raw/ifpga/base/opae_intel_max10.c| 938
> > ---
> > drivers/raw/ifpga/base/opae_intel_max10.h| 313 +++-
> > drivers/raw/ifpga/base/opae_osdep.h | 43 +-
> > drivers/raw/ifpga/base/osdep_rte/osdep_generic.h | 10 +
> > 14 files changed, 1524 insertions(+), 203 deletions(-)
>
> This patch is very huge. I thinks this patch can slit into 3 patches: base
> PMCI
> driver, flash support and sensor support.
>
Agree, let me split it into three patches.
> >
> > diff --git a/drivers/raw/ifpga/base/ifpga_defines.h
> > b/drivers/raw/ifpga/base/ifpga_defines.h
> > index 9a280eb..7c8fa89 100644
> > --- a/drivers/raw/ifpga/base/ifpga_defines.h
> > +++ b/drivers/raw/ifpga/base/ifpga_defines.h
> > @@ -23,6 +23,7 @@
> > #define FME_FEATURE_NIOS_SPI"fme_nios_spi"
> > #define FME_FEATURE_I2C_MASTER "fme_i2c_master"
> > #define FME_FEATURE_ETH_GROUP "fme_eth_group"
> > +#define FME_FEATURE_PMCI"fme_pmci"
> >
> > #define PORT_FEATURE_HEADER "port_hdr"
> > #define PORT_FEATURE_UAFU "port_uafu"
> > @@ -91,6 +92,7 @@ enum fpga_id_type {
> > #define FME_FEATURE_ID_NIOS_SPI 0xd
> > #define FME_FEATURE_ID_I2C_MASTER 0xf
> > #define FME_FEATURE_ID_ETH_GROUP 0x10
> > +#define FME_FEATURE_ID_PMCI 0x12
> >
> > #define PORT_FEATURE_ID_HEADER FEATURE_ID_FIU_HEADER
> > #define PORT_FEATURE_ID_ERROR 0x10
> > @@ -266,6 +268,24 @@ struct feature_fme_bitstream_id {
> > union {
> > u64 csr;
> > struct {
> > + u8 build_patch:8;
> > + u8 build_minor:8;
> > + u8 build_major:8;
> > + u8 fvl_bypass:1;
> > + u8 mac_lightweight:1;
> > + u8 disagregate:1;
> > + u8 lightweiht:1;
> > + u8 seu:1;
> > + u8 ptp:1;
> > + u8 reserve:2;
> > + u8 interface:4;
> > + u32 afu_revision:12;
> > + u8 patch:4;
> > + u8 minor:4;
> > + u8 major:4;
> > + u8 reserved:4;
> > + } v1;
> > + struct {
> > u32 gitrepo_hash:32;/* GIT repository hash */
> > /*
> > * HSSI configuration identifier:
> > @@ -274,7 +294,8 @@ struct feature_fme_bitstream_id {
> > * 2 - Ethernet
> > */
> > u8 hssi_id:4;
> > - u16 rsvd1:12; /* Reserved */
> > + u8 rsvd1:4;
> > + u8 fim_type:8;
> > /* Bitstream version patch number */
> > u8 bs_verpatch:4;
> > /* Bitstream version minor number */
> > @@ -283,7 +304,7 @@ struct feature_fme_bitstream_id {
> > u8 bs_vermajor:4;
> > /* Bitstream version debug number */
> > u8 bs_verdebug:4;
> > - };
> > + } v2;
> > };
> > };
> >
> > @@ -1670,31 +1691,6 @@ struct bts_header {
> >
> > #define check_support(n) (n == 1 ? "support" : "no")
> >
> > -/* bitstream id definition */
> > -struct fme_bitstream_id {
> > - union {
> > - u64 id;
> > - struct {
> > - u8 build_pa
Re: [PATCH] common/cnxk: add cnf10kb support
On Wed, May 11, 2022 at 2:37 PM Harman Kalra wrote:
>
> Support for cnf10kb soc by adding its PCI device ID
>
> Signed-off-by: Harman Kalra
Please rebase
[for-next-net]dell[dpdk-next-net-mrvl] $ git pw series apply 22888
Failed to apply patch:
Applying: common/cnxk: add cnf10kb support
Using index info to reconstruct a base tree...
M drivers/common/cnxk/roc_constants.h
M drivers/event/cnxk/cn10k_eventdev.c
M drivers/mempool/cnxk/cnxk_mempool.c
M drivers/net/cnxk/cn10k_ethdev.c
Falling back to patching base and 3-way merge...
Auto-merging drivers/net/cnxk/cn10k_ethdev.c
CONFLICT (content): Merge conflict in drivers/net/cnxk/cn10k_ethdev.c
Auto-merging drivers/mempool/cnxk/cnxk_mempool.c
CONFLICT (content): Merge conflict in drivers/mempool/cnxk/cnxk_mempool.c
Auto-merging drivers/event/cnxk/cn10k_eventdev.c
CONFLICT (content): Merge conflict in drivers/event/cnxk/cn10k_eventdev.c
Auto-merging drivers/common/cnxk/roc_constants.h
CONFLICT (content): Merge conflict in drivers/common/cnxk/roc_constants.h
error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0001 common/cnxk: add cnf10kb support
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
> ---
> drivers/common/cnxk/roc_constants.h | 1 +
> drivers/event/cnxk/cn10k_eventdev.c | 2 ++
> drivers/mempool/cnxk/cnxk_mempool.c | 2 ++
> drivers/net/cnxk/cn10k_ethdev.c | 3 +++
> 4 files changed, 8 insertions(+)
>
> diff --git a/drivers/common/cnxk/roc_constants.h
> b/drivers/common/cnxk/roc_constants.h
> index 38e2087a26..e9248667bf 100644
> --- a/drivers/common/cnxk/roc_constants.h
> +++ b/drivers/common/cnxk/roc_constants.h
> @@ -52,6 +52,7 @@
> #define PCI_SUBSYSTEM_DEVID_CN10KA 0xB900
> #define PCI_SUBSYSTEM_DEVID_CN10KAS 0xB900
> #define PCI_SUBSYSTEM_DEVID_CNF10KA 0xBA00
> +#define PCI_SUBSYSTEM_DEVID_CNF10KB 0xBC00
>
> #define PCI_SUBSYSTEM_DEVID_CN9KA 0x
> #define PCI_SUBSYSTEM_DEVID_CN9KB 0xb400
> diff --git a/drivers/event/cnxk/cn10k_eventdev.c
> b/drivers/event/cnxk/cn10k_eventdev.c
> index 9b4d2895ec..f0709ebfe2 100644
> --- a/drivers/event/cnxk/cn10k_eventdev.c
> +++ b/drivers/event/cnxk/cn10k_eventdev.c
> @@ -935,9 +935,11 @@ static const struct rte_pci_id cn10k_pci_sso_map[] = {
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA,
> PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS,
> PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA,
> PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
> + CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KB,
> PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA,
> PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS,
> PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA,
> PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
> + CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KB,
> PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
> {
> .vendor_id = 0,
> },
> diff --git a/drivers/mempool/cnxk/cnxk_mempool.c
> b/drivers/mempool/cnxk/cnxk_mempool.c
> index ea473552dd..6d03aea1fd 100644
> --- a/drivers/mempool/cnxk/cnxk_mempool.c
> +++ b/drivers/mempool/cnxk/cnxk_mempool.c
> @@ -163,6 +163,7 @@ npa_probe(struct rte_pci_driver *pci_drv, struct
> rte_pci_device *pci_dev)
> static const struct rte_pci_id npa_pci_map[] = {
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_NPA_PF),
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_NPA_PF),
> + CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KB, PCI_DEVID_CNXK_RVU_NPA_PF),
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KA, PCI_DEVID_CNXK_RVU_NPA_PF),
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KB, PCI_DEVID_CNXK_RVU_NPA_PF),
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KC, PCI_DEVID_CNXK_RVU_NPA_PF),
> @@ -170,6 +171,7 @@ static const struct rte_pci_id npa_pci_map[] = {
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KE, PCI_DEVID_CNXK_RVU_NPA_PF),
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_NPA_VF),
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_NPA_VF),
> + CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KB, PCI_DEVID_CNXK_RVU_NPA_VF),
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KA, PCI_DEVID_CNXK_RVU_NPA_VF),
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KB, PCI_DEVID_CNXK_RVU_NPA_VF),
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KC, PCI_DEVID_CNXK_RVU_NPA_VF),
> diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c
> index 4cd82af7e5..fd8ef663fa 100644
> --- a/drivers/net/cnxk/cn10k_ethdev.c
> +++ b/drivers/net/cnxk/cn10k_ethdev.c
> @@ -817,12 +817,15 @@ static const struct rte_pci_id cn10k_pci_nix_map[] = {
> CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_PF),
> C
[PATCH] test: drop reference to removed tests
cycles_autotest and delay_us_sleep_autotest tests were removed in the
commit ee00af60170b ("test: remove strict timing requirements some tests")
and were wrongly reintroduced later.
Bugzilla ID: 1021
Fixes: 74822233bdc2 ("test: create a list of extra tests")
Cc: sta...@dpdk.org
Signed-off-by: David Marchand
---
app/test/meson.build | 2 --
1 file changed, 2 deletions(-)
diff --git a/app/test/meson.build b/app/test/meson.build
index 7fe261cae8..a86382524e 100644
--- a/app/test/meson.build
+++ b/app/test/meson.build
@@ -250,8 +250,6 @@ fast_tests = [
# Tests known to have issues or which don't belong in other tests lists.
extra_test_names = [
'alarm_autotest', # ee00af60170b ("test: remove strict timing
requirements some tests")
-'cycles_autotest', # ee00af60170b ("test: remove strict timing
requirements some tests")
-'delay_us_sleep_autotest', # ee00af60170b ("test: remove strict timing
requirements some tests")
'red_autotest', # https://bugs.dpdk.org/show_bug.cgi?id=826
]
--
2.36.1
Re: [PATCH 1/1] doc: add author name on cc to git fixline alias
On 6/12/2022 12:40 PM, Heinrich Schuchardt wrote:
We should add both the author name and the author email address to
the Cc: line of a blamed patch.
Fixes: f9ef083c6cfe ("doc: add author on cc to git fixline alias")
Cc: Harry van Haaren
Signed-off-by: Heinrich Schuchardt
---
doc/guides/contributing/patches.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/doc/guides/contributing/patches.rst
b/doc/guides/contributing/patches.rst
index bebcaf3925..aad2429e58 100644
--- a/doc/guides/contributing/patches.rst
+++ b/doc/guides/contributing/patches.rst
@@ -260,7 +260,7 @@ Here are some guidelines for the body of a commit message:
You can generate the required lines using the following git alias, which
prints
the commit SHA and the author of the original code::
- git config alias.fixline "log -1 --abbrev=12 --format='Fixes: %h (\"%s\")%nCc: %ae'"
+ git config alias.fixline "log -1 --abbrev=12 --format='Fixes: %h (\"%s\")%nCc: %an
<%ae>'"
Hi Heinrich,
We don't keep the 'Cc: ' lines in commit lines when pushing to repo,
it is mainly added to be sure author of the original change is cc'ed
since 'git send-email' picks emails from commit log.
So although it doesn't hurt, it is also not needed to have full name &
email since it will be stripped explicitly.
Thanks,
ferruh
RE: [PATCH 11/12] app/flow-perf: fix build with GCC 12
Hi, > > > -Original Message- > > > From: David Marchand > > > Sent: Wednesday, May 18, 2022 1:17 PM > > > To: dev@dpdk.org > > > Cc: NBU-Contact-Thomas Monjalon (EXTERNAL) > ; > > > ferruh.yi...@xilinx.com; sta...@dpdk.org; Wisam Monther > > > > > > Subject: [PATCH 11/12] app/flow-perf: fix build with GCC 12 > > > > > > GCC 12 raises the following warning: > > > > > > ../app/test-flow-perf/main.c: In function ‘start_forwarding’: > > > ../app/test-flow-perf/main.c:1737:28: error: ‘sprintf’ may write a > > > terminating nul past the end of the destination > > > [-Werror=format-overflow=] > > > 1737 | sprintf(p[i++], "%d", (int)n); > > > |^ > > > In function ‘pretty_number’, > > > inlined from ‘packet_per_second_stats’ at > > > ../app/test-flow-perf/main.c:1792:4, > > > inlined from ‘start_forwarding’ at > > > ../app/test-flow-perf/main.c:1831:3: > > > [...] > > > > > > We can simplify this code and rely on libc integer formatting via > > > this system locales. > > > > > > Cc: sta...@dpdk.org > > > > > > Signed-off-by: David Marchand > > > --- > > > > I've tested the patch and reviewed it, it's working fine, so thank you for > that. > > One comment > > The initial value of 0 is 000 > > > > Example: > > CMD: ./dpdk-test-flow-perf -n 4 -a -- ingress --group=1 --ether -- > queue --rules-count=20 --enable-fwd > > core tx tx drops rx > > -- > > 1 000 000 000 > > > > Can you handle this to be single 0 instead of not needed leading zeros? > > Hum, I don't remember why I added this precision... > This should be just a matter of changing the format from %'16.3s to %'16s, > can you confirm? Confirmed, you can go with it. Thanks in advance. BRs, Wisam Jaddo
Re: [PATCH v2 1/1] common/cnxk: added new macros to platform layer
On Mon, May 16, 2022 at 10:57 PM Srikanth Yalavarthi
wrote:
>
> Added new platform layer macros for pointer operations,
> bitwise operations, spinlocks and 32 bit read and write.
>
> Signed-off-by: Srikanth Yalavarthi
Acked-by: Jerin Jacob
Applied to dpdk-next-net-mrvl/for-next-net. Thanks
> ---
> drivers/common/cnxk/roc_platform.h | 26 ++
> 1 file changed, 22 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/common/cnxk/roc_platform.h
> b/drivers/common/cnxk/roc_platform.h
> index 86987aea3b..1ad3c16705 100644
> --- a/drivers/common/cnxk/roc_platform.h
> +++ b/drivers/common/cnxk/roc_platform.h
> @@ -41,6 +41,7 @@
> #define PLT_MEMZONE_NAMESIZERTE_MEMZONE_NAMESIZE
> #define PLT_STD_C11 RTE_STD_C11
> #define PLT_PTR_ADD RTE_PTR_ADD
> +#define PLT_PTR_SUB RTE_PTR_SUB
> #define PLT_PTR_DIFFRTE_PTR_DIFF
> #define PLT_MAX_RXTX_INTR_VEC_ID RTE_MAX_RXTX_INTR_VEC_ID
> #define PLT_INTR_VEC_RXTX_OFFSET RTE_INTR_VEC_RXTX_OFFSET
> @@ -70,6 +71,10 @@
> #define PLT_U32_CAST(val) ((uint32_t)(val))
> #define PLT_U16_CAST(val) ((uint16_t)(val))
>
> +/* Add / Sub pointer with scalar and cast to uint64_t */
> +#define PLT_PTR_ADD_U64_CAST(__ptr, __x) PLT_U64_CAST(PLT_PTR_ADD(__ptr,
> __x))
> +#define PLT_PTR_SUB_U64_CAST(__ptr, __x) PLT_U64_CAST(PLT_PTR_SUB(__ptr,
> __x))
> +
> /** Divide ceil */
> #define PLT_DIV_CEIL(x, y) \
> ({ \
> @@ -113,10 +118,11 @@
> #define plt_bitmap_scanrte_bitmap_scan
> #define plt_bitmap_get_memory_footprint rte_bitmap_get_memory_footprint
>
> -#define plt_spinlock_t rte_spinlock_t
> -#define plt_spinlock_init rte_spinlock_init
> -#define plt_spinlock_lock rte_spinlock_lock
> -#define plt_spinlock_unlock rte_spinlock_unlock
> +#define plt_spinlock_t rte_spinlock_t
> +#define plt_spinlock_initrte_spinlock_init
> +#define plt_spinlock_lockrte_spinlock_lock
> +#define plt_spinlock_unlock rte_spinlock_unlock
> +#define plt_spinlock_trylock rte_spinlock_trylock
>
> #define plt_intr_callback_register rte_intr_callback_register
> #define plt_intr_callback_unregister rte_intr_callback_unregister
> @@ -165,12 +171,24 @@
> #define plt_write64(val, addr)
> \
> rte_write64_relaxed((val), (volatile void *)(addr))
>
> +#define plt_read32(addr) rte_read32_relaxed((volatile void *)(addr))
> +#define plt_write32(val, addr)
> \
> + rte_write32_relaxed((val), (volatile void *)(addr))
> +
> #define plt_wmb() rte_wmb()
> #define plt_rmb() rte_rmb()
> #define plt_io_wmb() rte_io_wmb()
> #define plt_io_rmb() rte_io_rmb()
> #define plt_atomic_thread_fence rte_atomic_thread_fence
>
> +#define plt_bit_relaxed_get32 rte_bit_relaxed_get32
> +#define plt_bit_relaxed_set32 rte_bit_relaxed_set32
> +#define plt_bit_relaxed_clear32 rte_bit_relaxed_clear32
> +
> +#define plt_bit_relaxed_get64 rte_bit_relaxed_get64
> +#define plt_bit_relaxed_set64 rte_bit_relaxed_set64
> +#define plt_bit_relaxed_clear64 rte_bit_relaxed_clear64
> +
> #define plt_mmap mmap
> #define PLT_PROT_READ PROT_READ
> #define PLT_PROT_WRITE PROT_WRITE
> --
> 2.17.1
>
dev@dpdk.org
https://bugs.dpdk.org/show_bug.cgi?id=1032 Bug ID: 1032 Summary: [dpdk 22.07-rc1] app/test/test_cryptodev meson build failed with cflag param optimization=1 on Ubuntu22.04 &&RHEL8.6 with gcc11.2.0&&8.5.0 Product: DPDK Version: unspecified Hardware: All OS: All Status: UNCONFIRMED Severity: normal Priority: Normal Component: core Assignee: dev@dpdk.org Reporter: daxuex@intel.com Target Milestone: --- [DPDK version] commit 1ab4156e7d57858fca1db448ac7a0792e1d527b6 Author: Thomas Monjalon Date: Wed Jun 8 21:43:41 2022 +0200 version: 22.07-rc1 Signed-off-by: Thomas Monjalon [Bad commit]: commit 6d7d651bbc157bc5a66158dca4a120df96e2b3c8 Author: Rahul Lakkireddy Date: Tue May 17 01:04:39 2022 +0530 net/cxgbe: read firmware configuration file from filesystem Add support to read firmware configuration file from /lib/firmware/cxgb4/ path in the filesystem. The firmware config file is used to enable or disable NIC features before firmware initialization to help retrieve better debug data to analyze firmware init failures. The config file can also be used to redistribute resources, like queues, TCAMs, etc., from disabled physical functions (PFs) to main PF, before firmware init. Signed-off-by: Rahul Lakkireddy doc/guides/nics/cxgbe.rst | 48 + drivers/net/cxgbe/base/t4fw_interface.h | 1 + drivers/net/cxgbe/cxgbe_main.c | 329 +--- 3 files changed, 265 insertions(+), 113 deletions(-) [OS version]: gcc version gcc (Ubuntu 11.2.0-19ubuntu1) 11.2.0 Ubuntu22.04/ 5.15.0-25-generic RHEL8.6/4.18.0-372.9.1.el8.x86_64 gcc version 8.5.0 [Test Setup]: CC=gcc meson --optimization=1 --werror -Denable_kmods=True -Dlibdir=lib --default-library=static x86_64-native-linuxapp-gcc ninja -C x86_64-native-linuxapp-gcc -j 10 [Ubuntu22.04 log as below] [3304/3466] Compiling C object app/test/dpdk-test.p/test_cryptodev.c.o FAILED: app/test/dpdk-test.p/test_cryptodev.c.o gcc -Iapp/test/dpdk-test.p -Iapp/test -I../app/test -I. -I.. -Iconfig -I../config -Ilib/eal/include -I../lib/eal/include -Ilib/eal/linux/include -I../lib/eal/linux/include -Ilib/eal/x86/include -I../lib/eal/x86/include -Ilib/kvargs -I../lib/kvargs -Ilib/metrics -I../lib/metrics -Ilib/telemetry -I../lib/telemetry -Ilib/eal/common -I../lib/eal/common -Ilib/eal -I../lib/eal -Ilib/ring -I../lib/ring -Ilib/rcu -I../lib/rcu -Ilib/mempool -I../lib/mempool -Ilib/mbuf -I../lib/mbuf -Ilib/net -I../lib/net -Ilib/meter -I../lib/meter -Ilib/ethdev -I../lib/ethdev -Ilib/pci -I../lib/pci -Ilib/cmdline -I../lib/cmdline -Ilib/hash -I../lib/hash -Ilib/timer -I../lib/timer -Ilib/acl -I../lib/acl -Ilib/bbdev -I../lib/bbdev -Ilib/bitratestats -I../lib/bitratestats -Ilib/bpf -I../lib/bpf -Ilib/cfgfile -I../lib/cfgfile -Ilib/compressdev -I../lib/compressdev -Ilib/cryptodev -I../lib/cryptodev -Ilib/distributor -I../lib/distributor -Ilib/efd -I../lib/efd -Ilib/eventdev -I../lib/eventdev -Ilib/gpudev -I../lib/gpudev -Ilib/gro -I../lib/gro -Ilib/gso -I../lib/gso -Ilib/ip_frag -I../lib/ip_frag -Ilib/jobstats -I../lib/jobstats -Ilib/kni -I../lib/kni -Ilib/latencystats -I../lib/latencystats -Ilib/lpm -I../lib/lpm -Ilib/member -I../lib/member -Ilib/pcapng -I../lib/pcapng -Ilib/power -I../lib/power -Ilib/rawdev -I../lib/rawdev -Ilib/regexdev -I../lib/regexdev -Ilib/dmadev -I../lib/dmadev -Ilib/rib -I../lib/rib -Ilib/reorder -I../lib/reorder -Ilib/sched -I../lib/sched -Ilib/security -I../lib/security -Ilib/stack -I../lib/stack -Ilib/vhost -I../lib/vhost -Ilib/ipsec -I../lib/ipsec -Ilib/fib -I../lib/fib -Ilib/port -I../lib/port -Ilib/pdump -I../lib/pdump -Ilib/table -I../lib/table -Ilib/pipeline -I../lib/pipeline -Ilib/flow_classify -I../lib/flow_classify -Ilib/graph -I../lib/graph -Ilib/node -I../lib/node -Idrivers/bus/pci -I../drivers/bus/pci -I../drivers/bus/pci/linux -Idrivers/bus/vdev -I../drivers/bus/vdev -Idrivers/mempool/ring -I../drivers/mempool/ring -Idrivers/mempool/stack -I../drivers/mempool/stack -Idrivers/event/skeleton -I../drivers/event/skeleton -Idrivers/net/bonding -I../drivers/net/bonding -Idrivers/net/ring -I../drivers/net/ring -Idrivers/net/null -I../drivers/net/null -Idrivers/crypto/scheduler -I../drivers/crypto/scheduler -fdiagnostics-color=always -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -Wextra -Werror -O1 -include rte_config.h -Wcast-qual -Wdeprecated -Wformat -Wformat-nonliteral -Wformat-security -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -Wold-style-definition -Wpointer-arith -Wsign-compare -Wstrict-prototypes -Wundef -Wwrite-strings -Wno-address-of-packed-member -Wno-packed-not-aligned -Wno-missing-field-initializers -Wno-zero-length-bounds -D_GNU_SOURCE -march=native -DALLOW_EXPERIMENTAL_API -Wno-format-truncation -fno-strict-aliasing -DALLOW_INTERNAL_API -MD -MQ ap
dev@dpdk.org
https://bugs.dpdk.org/show_bug.cgi?id=1033 Bug ID: 1033 Summary: [dpdk 22.07-rc1] app/test-flow-perf meson build failed with cflag param optimization=1 on Ubuntu22.04 &&RHEL8.6 with gcc11.2.0&&8.5.0 Product: DPDK Version: unspecified Hardware: All OS: All Status: UNCONFIRMED Severity: normal Priority: Normal Component: core Assignee: dev@dpdk.org Reporter: daxuex@intel.com Target Milestone: --- [DPDK version] commit 1ab4156e7d57858fca1db448ac7a0792e1d527b6 Author: Thomas Monjalon Date: Wed Jun 8 21:43:41 2022 +0200 version: 22.07-rc1 Signed-off-by: Thomas Monjalon [OS version]: gcc version gcc (Ubuntu 11.2.0-19ubuntu1) 11.2.0 Ubuntu22.04/ 5.15.0-25-generic RHEL8.6/4.18.0-372.9.1.el8.x86_64 gcc version 8.5.0 [Test Setup]: CC=gcc meson --optimization=1 --werror -Denable_kmods=True -Dlibdir=lib --default-library=static x86_64-native-linuxapp-gcc ninja -C x86_64-native-linuxapp-gcc -j 10 [Ubuntu22.04 log as below] [3205/3466] Compiling C object app/dpdk-test-flow-perf.p/test-flow-perf_main.c.o FAILED: app/dpdk-test-flow-perf.p/test-flow-perf_main.c.o gcc -Iapp/dpdk-test-flow-perf.p -Iapp -I../app -Ilib/ethdev -I../lib/ethdev -I. -I.. -Iconfig -I../config -Ilib/eal/include -I../lib/eal/include -Ilib/eal/linux/include -I../lib/eal/linux/include -Ilib/eal/x86/include -I../lib/eal/x86/include -Ilib/eal/common -I../lib/eal/common -Ilib/eal -I../lib/eal -Ilib/kvargs -I../lib/kvargs -Ilib/metrics -I../lib/metrics -Ilib/telemetry -I../lib/telemetry -Ilib/net -I../lib/net -Ilib/mbuf -I../lib/mbuf -Ilib/mempool -I../lib/mempool -Ilib/ring -I../lib/ring -Ilib/meter -I../lib/meter -fdiagnostics-color=always -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -Wextra -Werror -O1 -include rte_config.h -Wcast-qual -Wdeprecated -Wformat -Wformat-nonliteral -Wformat-security -Wmissing-declarations -Wmissing-prototypes -Wnested-externs -Wold-style-definition -Wpointer-arith -Wsign-compare -Wstrict-prototypes -Wundef -Wwrite-strings -Wno-address-of-packed-member -Wno-packed-not-aligned -Wno-missing-field-initializers -Wno-zero-length-bounds -D_GNU_SOURCE -march=native -DALLOW_EXPERIMENTAL_API -MD -MQ app/dpdk-test-flow-perf.p/test-flow-perf_main.c.o -MF app/dpdk-test-flow-perf.p/test-flow-perf_main.c.o.d -o app/dpdk-test-flow-perf.p/test-flow-perf_main.c.o -c ../app/test-flow-perf/main.c ../app/test-flow-perf/main.c: In function ‘pretty_number’: ../app/test-flow-perf/main.c:1737:28: error: ‘__builtin___sprintf_chk’ may write a terminating nul past the end of the destination [-Werror=format-overflow=] 1737 | sprintf(p[i++], "%d", (int)n); |^ In file included from /usr/include/stdio.h:894, from ../app/test-flow-perf/main.c:19: /usr/include/x86_64-linux-gnu/bits/stdio2.h:38:10: note: ‘__builtin___sprintf_chk’ output between 2 and 5 bytes into a destination of size 4 38 | return __builtin___sprintf_chk (__s, __USE_FORTIFY_LEVEL - 1, | ^~ 39 | __glibc_objsize (__s), __fmt, | ~ 40 | __va_arg_pack ()); | ~ cc1: all warnings being treated as errors [3304/3466] Compiling C object app/test/dpdk-test.p/test_cryptodev.c.o -- You are receiving this mail because: You are the assignee for the bug.
[PATCH] maintainers: update for testpmd
From: "Li, Xiaoyun" Resigning my maintainership for testpmd. Signed-off-by: Li, Xiaoyun --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 17a0559ee7..4b527291be 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1688,7 +1688,6 @@ F: app/test/sample_packet_forward.c F: app/test/sample_packet_forward.h Networking drivers testing tool -M: Xiaoyun Li M: Aman Singh M: Yuying Zhang T: git://dpdk.org/next/dpdk-next-net -- 2.25.1
[PATCH] add support for async vhost packed ring dequeue
This patch implements packed ring dequeue data path for asynchronous
vhost.
Signed-off-by: Cheng Jiang
Reviewed-by: Maxime Coquelin
---
lib/vhost/virtio_net.c | 218 -
1 file changed, 192 insertions(+), 26 deletions(-)
diff --git a/lib/vhost/virtio_net.c b/lib/vhost/virtio_net.c
index 68a26eb17d..0d05f7cac3 100644
--- a/lib/vhost/virtio_net.c
+++ b/lib/vhost/virtio_net.c
@@ -3240,7 +3240,7 @@ rte_vhost_dequeue_burst(int vid, uint16_t queue_id,
}
static __rte_always_inline uint16_t
-async_poll_dequeue_completed_split(struct virtio_net *dev, struct
vhost_virtqueue *vq,
+async_poll_dequeue_completed(struct virtio_net *dev, struct vhost_virtqueue
*vq,
struct rte_mbuf **pkts, uint16_t count, int16_t dma_id,
uint16_t vchan_id, bool legacy_ol_flags)
{
@@ -3255,7 +3255,7 @@ async_poll_dequeue_completed_split(struct virtio_net
*dev, struct vhost_virtqueu
from = start_idx;
while (vq->async->pkts_cmpl_flag[from] && count--) {
vq->async->pkts_cmpl_flag[from] = false;
- from = (from + 1) & (vq->size - 1);
+ from = (from + 1) % vq->size;
nr_cpl_pkts++;
}
@@ -3263,7 +3263,7 @@ async_poll_dequeue_completed_split(struct virtio_net
*dev, struct vhost_virtqueu
return 0;
for (i = 0; i < nr_cpl_pkts; i++) {
- from = (start_idx + i) & (vq->size - 1);
+ from = (start_idx + i) % vq->size;
pkts[i] = pkts_info[from].mbuf;
if (virtio_net_with_host_offload(dev))
@@ -3272,10 +3272,14 @@ async_poll_dequeue_completed_split(struct virtio_net
*dev, struct vhost_virtqueu
}
/* write back completed descs to used ring and update used idx */
- write_back_completed_descs_split(vq, nr_cpl_pkts);
- __atomic_add_fetch(&vq->used->idx, nr_cpl_pkts, __ATOMIC_RELEASE);
- vhost_vring_call_split(dev, vq);
-
+ if (vq_is_packed(dev)) {
+ write_back_completed_descs_packed(vq, nr_cpl_pkts);
+ vhost_vring_call_packed(dev, vq);
+ } else {
+ write_back_completed_descs_split(vq, nr_cpl_pkts);
+ __atomic_add_fetch(&vq->used->idx, nr_cpl_pkts,
__ATOMIC_RELEASE);
+ vhost_vring_call_split(dev, vq);
+ }
vq->async->pkts_inflight_n -= nr_cpl_pkts;
return nr_cpl_pkts;
@@ -3412,8 +3416,8 @@ virtio_dev_tx_async_split(struct virtio_net *dev, struct
vhost_virtqueue *vq,
out:
/* DMA device may serve other queues, unconditionally check completed.
*/
- nr_done_pkts = async_poll_dequeue_completed_split(dev, vq, pkts,
pkts_size,
- dma_id, vchan_id,
legacy_ol_flags);
+ nr_done_pkts = async_poll_dequeue_completed(dev, vq, pkts, pkts_size,
+ dma_id, vchan_id,
legacy_ol_flags);
return nr_done_pkts;
}
@@ -3440,6 +3444,171 @@ virtio_dev_tx_async_split_compliant(struct virtio_net
*dev,
pkts, count, dma_id, vchan_id, false);
}
+static __rte_always_inline void
+vhost_async_shadow_dequeue_single_packed(struct vhost_virtqueue *vq, uint16_t
buf_id)
+{
+ struct vhost_async *async = vq->async;
+ uint16_t idx = async->buffer_idx_packed;
+
+ async->buffers_packed[idx].id = buf_id;
+ async->buffers_packed[idx].len = 0;
+ async->buffers_packed[idx].count = 1;
+
+ async->buffer_idx_packed++;
+ if (async->buffer_idx_packed >= vq->size)
+ async->buffer_idx_packed -= vq->size;
+
+}
+
+static __rte_always_inline int
+virtio_dev_tx_async_single_packed(struct virtio_net *dev,
+ struct vhost_virtqueue *vq,
+ struct rte_mempool *mbuf_pool,
+ struct rte_mbuf *pkts,
+ uint16_t slot_idx,
+ bool legacy_ol_flags)
+{
+ int err;
+ uint16_t buf_id, desc_count = 0;
+ uint16_t nr_vec = 0;
+ uint32_t buf_len;
+ struct buf_vector buf_vec[BUF_VECTOR_MAX];
+ static bool allocerr_warned;
+
+ if (unlikely(fill_vec_buf_packed(dev, vq, vq->last_avail_idx,
&desc_count,
+buf_vec, &nr_vec, &buf_id, &buf_len,
+VHOST_ACCESS_RO) < 0))
+ return -1;
+
+ if (unlikely(virtio_dev_pktmbuf_prep(dev, pkts, buf_len))) {
+ if (!allocerr_warned) {
+ VHOST_LOG_DATA(ERR, "(%s) Failed mbuf alloc of size %d
from %s.\n",
+ dev->ifname, buf_len, mbuf_pool->name);
+
+ allocerr_warned = true;
+ }
+ return -1;
+ }
+
+ err = desc_to_mbuf(dev, vq, buf_vec, nr_vec, pkts, mbuf_pool,
+ legacy_ol_flags, slot_idx, true);
+ if (unlikely
RE: [PATCH] maintainers: update for testpmd
Hi Xiaoyun, > -Original Message- > From: Li, Xiaoyun > Sent: Monday, June 13, 2022 4:37 PM > To: dev@dpdk.org; Zhang, Yuying ; Singh, Aman > Deep > Cc: Li, Xiaoyun ; Li > Subject: [PATCH] maintainers: update for testpmd > > From: "Li, Xiaoyun" > > Resigning my maintainership for testpmd. > > Signed-off-by: Li, Xiaoyun Acked-by: Yuying Zhang > --- > MAINTAINERS | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 17a0559ee7..4b527291be 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -1688,7 +1688,6 @@ F: app/test/sample_packet_forward.c > F: app/test/sample_packet_forward.h > > Networking drivers testing tool > -M: Xiaoyun Li > M: Aman Singh > M: Yuying Zhang > T: git://dpdk.org/next/dpdk-next-net > -- > 2.25.1
[PATCH v4] sched: enable CMAN at runtime
Added changes to enable CMAN (RED or PIE) at init
from profile configuration file.
By default CMAN code is enable but not in use, when
there is no RED or PIE profile configured.
Signed-off-by: Marcin Danilewicz
---
Log: v2 change in rte_sched.h to avoid ABI breakage.
v3 changes from comments
---
config/rte_config.h | 3 -
drivers/net/softnic/rte_eth_softnic_tm.c | 12 --
examples/ip_pipeline/tmgr.c | 4 -
examples/qos_sched/cfg_file.c| 11 +-
examples/qos_sched/cfg_file.h| 2 -
examples/qos_sched/init.c| 4 -
examples/qos_sched/main.h| 2 -
examples/qos_sched/profile.cfg | 130 ++---
examples/qos_sched/profile_pie.cfg | 142 ++
examples/qos_sched/profile_red.cfg | 143 +++
lib/sched/rte_sched.c| 47 +---
11 files changed, 359 insertions(+), 141 deletions(-)
create mode 100644 examples/qos_sched/profile_pie.cfg
create mode 100644 examples/qos_sched/profile_red.cfg
diff --git a/config/rte_config.h b/config/rte_config.h
index 8eb29c1525..1740a1d053 100644
--- a/config/rte_config.h
+++ b/config/rte_config.h
@@ -88,9 +88,6 @@
/* rte_power defines */
#define RTE_MAX_LCORE_FREQS 64
-/* rte_sched defines */
-#undef RTE_SCHED_CMAN
-
/* rte_graph defines */
#define RTE_GRAPH_BURST_SIZE 256
#define RTE_LIBRTE_GRAPH_STATS 1
diff --git a/drivers/net/softnic/rte_eth_softnic_tm.c
b/drivers/net/softnic/rte_eth_softnic_tm.c
index 6a7766ba1c..3a5fd676e9 100644
--- a/drivers/net/softnic/rte_eth_softnic_tm.c
+++ b/drivers/net/softnic/rte_eth_softnic_tm.c
@@ -420,11 +420,7 @@ pmd_tm_node_type_get(struct rte_eth_dev *dev,
return 0;
}
-#ifdef RTE_SCHED_CMAN
#define WRED_SUPPORTED 1
-#else
-#define WRED_SUPPORTED 0
-#endif
#define STATS_MASK_DEFAULT \
(RTE_TM_STATS_N_PKTS | \
@@ -2300,8 +2296,6 @@ tm_tc_wred_profile_get(struct rte_eth_dev *dev, uint32_t
tc_id)
return NULL;
}
-#ifdef RTE_SCHED_CMAN
-
static void
wred_profiles_set(struct rte_eth_dev *dev, uint32_t subport_id)
{
@@ -2325,12 +2319,6 @@ wred_profiles_set(struct rte_eth_dev *dev, uint32_t
subport_id)
}
}
-#else
-
-#define wred_profiles_set(dev, subport_id)
-
-#endif
-
static struct tm_shared_shaper *
tm_tc_shared_shaper_get(struct rte_eth_dev *dev, struct tm_node *tc_node)
{
diff --git a/examples/ip_pipeline/tmgr.c b/examples/ip_pipeline/tmgr.c
index b138e885cf..e68e9961be 100644
--- a/examples/ip_pipeline/tmgr.c
+++ b/examples/ip_pipeline/tmgr.c
@@ -17,7 +17,6 @@ static uint32_t n_subport_profiles;
static struct rte_sched_pipe_params
pipe_profile[TMGR_PIPE_PROFILE_MAX];
-#ifdef RTE_SCHED_CMAN
static struct rte_sched_cman_params cman_params = {
.red_params = {
/* Traffic Class 0 Colors Green / Yellow / Red */
@@ -86,7 +85,6 @@ static struct rte_sched_cman_params cman_params = {
[12][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2
= 9},
},
};
-#endif /* RTE_SCHED_CMAN */
static uint32_t n_pipe_profiles;
@@ -96,9 +94,7 @@ static const struct rte_sched_subport_params
subport_params_default = {
.pipe_profiles = pipe_profile,
.n_pipe_profiles = 0, /* filled at run time */
.n_max_pipe_profiles = RTE_DIM(pipe_profile),
-#ifdef RTE_SCHED_CMAN
.cman_params = &cman_params,
-#endif /* RTE_SCHED_CMAN */
};
static struct tmgr_port_list tmgr_port_list;
diff --git a/examples/qos_sched/cfg_file.c b/examples/qos_sched/cfg_file.c
index 450482f07d..3284b4d252 100644
--- a/examples/qos_sched/cfg_file.c
+++ b/examples/qos_sched/cfg_file.c
@@ -229,11 +229,14 @@ cfg_load_subport_profile(struct rte_cfgfile *cfg,
return 0;
}
-#ifdef RTE_SCHED_CMAN
void set_subport_cman_params(struct rte_sched_subport_params *subport_p,
struct rte_sched_cman_params cman_p)
{
int j, k;
+
+ if (subport_p->cman_params != NULL)
+ return;
+
subport_p->cman_params->cman_mode = cman_p.cman_mode;
for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
@@ -261,7 +264,6 @@ void set_subport_cman_params(struct
rte_sched_subport_params *subport_p,
}
}
}
-#endif
int
cfg_load_subport(struct rte_cfgfile *cfg, struct rte_sched_subport_params
*subport_params)
@@ -276,9 +278,7 @@ cfg_load_subport(struct rte_cfgfile *cfg, struct
rte_sched_subport_params *subpo
memset(active_queues, 0, sizeof(active_queues));
n_active_queues = 0;
-#ifdef RTE_SCHED_CMAN
struct rte_sched_cman_params cman_params = {
- .cman_mode = RTE_SCHED_CMAN_RED,
.red_params = { },
};
@@ -387,7 +387,6 @@ cfg_load_subport
Re: [PATCH v3 0/2] fix uncallable unit tests (Bugzilla 1002)
On Fri, Jun 10, 2022 at 4:24 PM Bruce Richardson wrote: > > The dump* unit tests are uncallable from our test framework because the > command > validation in the unit test binary is incorrect. Rather than trying to fix > this > directly in the binary, a better approach is to add command validation to the > cmdline library - which already has 99% of what we need already - and use that > from the test app. > > Patch fix not CC'ed to stable, as fix requires new function in cmdline > library. Series applied, thanks Bruce. -- David Marchand
Re: [PATCH 3/3] ci: use crossbuild-essential-riscv64 for compiling
On Thu, Jun 9, 2022 at 2:17 PM Stanislaw Kardach wrote: > > The current packages installed for RISC-V build check do not contain a > C++ compiler, which hid an issue with C++ type conversion in the > rte_vect.h header on RISC-V or in the scalar implementation of the LPM > x4 lookup. Now that this issue is fixed, use the full toolchain install > to enable the C++ test. > > Besides, the user's guide for RISC-V cross-compilation recommends the > use of crossbuild-essential-riscv64. > > Signed-off-by: Stanislaw Kardach Reviewed-by: David Marchand -- David Marchand
Re: [PATCH 2/3] lpm: fix xmm_t casting for C++ in scalar version
On Thu, Jun 9, 2022 at 2:17 PM Stanislaw Kardach wrote:
>
> rte_xmm_t is a union type which wraps around xmm_t and maps its contents
> to scalar structures. Since C++ has stricter type conversion rules than
> C, the rte_xmm_t::x has to be used instead of C-casting.
>
> The generated assembly is identical to the code without the fix (checked
> both on x86 and RISC-V).
Fixes: 406937f89ffd ("lpm: add scalar version of lookupx4")
>
> Signed-off-by: Stanislaw Kardach
Reviewed-by: David Marchand
> ---
> lib/lpm/rte_lpm_scalar.h | 11 ++-
> 1 file changed, 6 insertions(+), 5 deletions(-)
>
> diff --git a/lib/lpm/rte_lpm_scalar.h b/lib/lpm/rte_lpm_scalar.h
> index f0d9f37894..161b40ff80 100644
> --- a/lib/lpm/rte_lpm_scalar.h
> +++ b/lib/lpm/rte_lpm_scalar.h
> @@ -15,18 +15,19 @@ extern "C" {
>
> static inline void
> rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4],
> - uint32_t defv)
> +uint32_t defv)
Nit: unrelated whitespace change.
Besides, indent is supposed to be one tab.
This can be dropped when applying.
--
David Marchand
Re: [PATCH 1/3] eal/riscv: fix xmm_t casting for C++
On Thu, Jun 9, 2022 at 2:17 PM Stanislaw Kardach wrote:
>
> rte_xmm_t is a union type which wraps around xmm_t and maps its contents
> to scalar structures. Since C++ has stricter type conversion rules than
> C, the rte_xmm_t::x has to be used instead of C-casting.
>
Fixes: f22e705ebf12 ("eal/riscv: support RISC-V architecture")
> Signed-off-by: Stanislaw Kardach
Reviewed-by: David Marchand
--
David Marchand
Re: [PATCH 1/1] doc: expand description of no-huge and PMD issue
On Thu, Jun 9, 2022 at 3:40 PM Stanislaw Kardach wrote: > > Add more details to the description of a known issue of PMDs not being > usable when --no-huge EAL command line parameter is used. The issue > actually happens whenever there is a need for physical addresses, even > when there is no PMD attached. > > Signed-off-by: Stanislaw Kardach Anatoly, Dmitry, opinions? Thanks. -- David Marchand
Re: [Bug 1030] rte_malloc() and rte_free() get stuck when used with signal handler
Thank you for help, I'll do it this way. On Sat, Jun 11, 2022 at 9:25 PM Mattias Rönnblom wrote: > > On 2022-06-10 08:04, Sarosh Arif wrote: > > On Thu, Jun 9, 2022 at 8:26 PM Stephen Hemminger > > wrote: > >> > >> On Thu, 09 Jun 2022 12:47:43 + > >> bugzi...@dpdk.org wrote: > >> > >>> https://bugs.dpdk.org/show_bug.cgi?id=1030 > >>> > >>> Bug ID: 1030 > >>> Summary: rte_malloc() and rte_free() get stuck when used with > >>> signal handler > >>> Product: DPDK > >>> Version: 22.03 > >>>Hardware: All > >>> OS: Linux > >>> Status: UNCONFIRMED > >>>Severity: normal > >>>Priority: Normal > >>> Component: core > >>>Assignee: dev@dpdk.org > >>>Reporter: sarosh.a...@emumba.com > >>>Target Milestone: --- > >>> > >>> Created attachment 205 > >>>--> https://bugs.dpdk.org/attachment.cgi?id=205&action=edit > >>> calls rte_malloc and rte_free in the handler and main code > >>> > >>> I have a dpdk based application which uses rte_malloc() and rte_free() > >>> frequently in it's main code. The general method to close the application > >>> is > >>> though sending SIGINT. The application has a signal handler written for > >>> cleanup > >>> purposes before closing the application. The handler also uses rte_free() > >>> to > >>> release some of the memory during cleanup. The application gets stuck in a > >>> deadlock. > >>> > >>> > >>> Upon investigation I found out that both rte_free() and rte_malloc() use > >>> rte_spinlock_lock() function to place a lock on heap. While this lock is > >>> placed > >>> and the application receives SIGINT, it goes into the handler without > >>> releasing > >>> the lock. Since the handler itself calls rte_free() which tries to > >>> acquire the > >>> lock it gets stuck. > >>> > >>> > >>> I have attached a sample application to reproduce this problem. > >>> > >>> > >>> Steps to reproduce this problem: > >>> > >>> 1. compile the code provided in attachment with any version of dpdk > >>> 2. run the compiled binary > >>> 3. press ctrl+c till the prints stop > >>> > >>> Actual Results: > >>> The application gets stuck in either rte_free() or rte_malloc() > >>> > >>> Expected Results: > >>> Application should allocate and free the memory without getting stuck > >>> > >> > >> rte_malloc and rte_free are not async sigsafe() > >> > > Oh, I did not know that. This should be mentioned in the documentation. > > Is there anything except that is/should be async-signal-safe? > > >> but then again regular glibc is not either. > > Memory allocated with glibc malloc() is freed by itself upon closing > > the application. My application runs as a secondary process, and it > > needs to use rte_malloc() specifically because the memory should be > > shared between the two processes. If I don't free it upon closure it > > would just be leaked. Is there any other solution for it? > > The standard solution is that the signal handler using some appropriate, > async-signal-safe way talks to the main thread, which then goes on to > cleanly terminate the application. > > A write() to an fd, or an atomic store to a flag are two options.
[PATCH] common/cnxk: update extra stats for inline device
inline device NIX RX and RQ stats are updated
on PKTIO extra stats
Signed-off-by: Rakesh Kudurumalla
---
drivers/common/cnxk/roc_nix_stats.c | 179 +--
drivers/common/cnxk/roc_nix_xstats.h | 29 -
2 files changed, 144 insertions(+), 64 deletions(-)
diff --git a/drivers/common/cnxk/roc_nix_stats.c
b/drivers/common/cnxk/roc_nix_stats.c
index 946cda114d..8fd5c711c3 100644
--- a/drivers/common/cnxk/roc_nix_stats.c
+++ b/drivers/common/cnxk/roc_nix_stats.c
@@ -10,6 +10,16 @@
#define NIX_RX_STATS(val) plt_read64(nix->base + NIX_LF_RX_STATX(val))
#define NIX_TX_STATS(val) plt_read64(nix->base + NIX_LF_TX_STATX(val))
+#define INL_NIX_RX_STATS(val)
\
+ plt_read64(inl_dev->nix_base + NIX_LF_RX_STATX(val))
+
+#define NIX_XSTATS_NAME_PRINT(xstats_names, count, xstats, index)
\
+ do { \
+ if (xstats_names) \
+ snprintf(xstats_names[count].name, \
+sizeof(xstats_names[count].name), "%s", \
+xstats[index].name); \
+ } while (0)
int
roc_nix_num_xstats_get(struct roc_nix *roc_nix)
@@ -79,6 +89,20 @@ queue_is_valid(struct nix *nix, uint16_t qid, bool is_rx)
return 0;
}
+static uint64_t
+inl_qstat_read(struct nix_inl_dev *inl_dev, uint16_t qid, uint32_t off)
+{
+ uint64_t reg, val;
+ int64_t *addr;
+
+ addr = (int64_t *)(inl_dev->nix_base + off);
+ reg = (((uint64_t)qid) << 32);
+ val = roc_atomic64_add_nosync(reg, addr);
+ if (val & BIT_ULL(NIX_CQ_OP_STAT_OP_ERR))
+ val = 0;
+ return val;
+}
+
static uint64_t
qstat_read(struct nix *nix, uint16_t qid, uint32_t off)
{
@@ -267,15 +291,18 @@ roc_nix_xstats_get(struct roc_nix *roc_nix, struct
roc_nix_xstat *xstats,
unsigned int n)
{
struct nix *nix = roc_nix_to_nix_priv(roc_nix);
+ struct idev_cfg *idev = idev_get_cfg();
struct mbox *mbox = (&nix->dev)->mbox;
+ struct nix_inl_dev *inl_dev = NULL;
struct cgx_stats_rsp *cgx_resp;
struct rpm_stats_rsp *rpm_resp;
uint64_t i, count = 0;
struct msg_req *req;
+ uint16_t inl_rq_id;
uint32_t xstat_cnt;
int rc;
- xstat_cnt = roc_nix_num_xstats_get(roc_nix);
+ xstat_cnt = roc_nix_xstats_names_get(roc_nix, NULL, 0);
if (n < xstat_cnt)
return xstat_cnt;
@@ -294,6 +321,25 @@ roc_nix_xstats_get(struct roc_nix *roc_nix, struct
roc_nix_xstat *xstats,
xstats[count].id = count;
count++;
}
+ if (nix->inb_inl_dev && idev) {
+ if (idev->nix_inl_dev) {
+ inl_dev = idev->nix_inl_dev;
+ for (i = 0; i < CNXK_INL_NIX_NUM_RX_XSTATS; i++) {
+ xstats[count].value =
+
INL_NIX_RX_STATS(inl_nix_rx_xstats[i].offset);
+ xstats[count].id = count;
+ count++;
+ }
+ inl_rq_id = inl_dev->nb_rqs > 1 ? roc_nix->port_id : 0;
+ for (i = 0; i < CNXK_INL_NIX_RQ_XSTATS; i++) {
+ xstats[count].value =
+ inl_qstat_read(inl_dev, inl_rq_id,
+
inl_nix_rq_xstats[i].offset);
+ xstats[count].id = count;
+ count++;
+ }
+ }
+ }
for (i = 0; i < nix->nb_rx_queues; i++)
xstats[count].value +=
@@ -302,6 +348,15 @@ roc_nix_xstats_get(struct roc_nix *roc_nix, struct
roc_nix_xstat *xstats,
xstats[count].id = count;
count++;
+ if (roc_model_is_cn10k()) {
+ for (i = 0; i < CNXK_NIX_NUM_CN10K_RX_XSTATS; i++) {
+ xstats[count].value =
+ NIX_RX_STATS(nix_cn10k_rx_xstats[i].offset);
+ xstats[count].id = count;
+ count++;
+ }
+ }
+
if (roc_nix_is_vf_or_sdp(roc_nix))
return count;
@@ -353,13 +408,6 @@ roc_nix_xstats_get(struct roc_nix *roc_nix, struct
roc_nix_xstat *xstats,
xstats[count].id = count;
count++;
}
-
- for (i = 0; i < CNXK_NIX_NUM_CN10K_RX_XSTATS; i++) {
- xstats[count].value =
- NIX_RX_STATS(nix_cn10k_rx_xstats[i].offset);
- xstats[count].id = count;
- count++;
- }
}
return cou
[PATCH v2] test/crypto: fix warnings for optimization=1 build
Fail IPSec ESN and antireplay cases, if there are no packets. Fixes
following warning when using optimization=1 build flag with GCC 11.
../app/test/test_cryptodev.c: In function ‘test_ipsec_pkt_replay’:
../app/test/test_cryptodev.c:10074:15: warning: ‘td_outb’ may be used
uninitialized [-Wmaybe-uninitialized]
ret = test_ipsec_proto_process(td_outb, td_inb, nb_pkts, true,
^~~~
&flags);
~~~
../app/test/test_cryptodev.c:9150:1: note: by argument 1 of type ‘const struct
ipsec_test_data[]’ to ‘test_ipsec_proto_process’ declared here
test_ipsec_proto_process(const struct ipsec_test_data td[],
^~~~
../app/test/test_cryptodev.c:10056:32: note: ‘td_outb’ declared here
struct ipsec_test_data td_outb[IPSEC_TEST_PACKETS_MAX];
^~~
Bugzilla ID: 1032
Fixes: d02c6bfcb99a ("test/crypto: add ESN and antireplay cases")
Cc: sta...@dpdk.org
Reported-by: Daxue Gao
Signed-off-by: Rahul Lakkireddy
---
v2:
- Return TEST_FAILED, instead of TEST_SKIPPED
- Add the new Bugzilla ID in commit message
app/test/test_cryptodev.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 524019ce0e..2766e0cc10 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -10058,6 +10058,9 @@ test_ipsec_pkt_replay(const void *test_data, const
uint64_t esn[],
struct ipsec_test_flags flags;
uint32_t i = 0, ret = 0;
+ if (nb_pkts == 0)
+ return TEST_FAILED;
+
memset(&flags, 0, sizeof(flags));
flags.antireplay = true;
--
2.27.0
RE: [EXT] [PATCH v2] test/crypto: fix warnings for optimization=1 build
> Fail IPSec ESN and antireplay cases, if there are no packets. Fixes following
> warning when using optimization=1 build flag with GCC 11.
>
> ../app/test/test_cryptodev.c: In function ‘test_ipsec_pkt_replay’:
> ../app/test/test_cryptodev.c:10074:15: warning: ‘td_outb’ may be used
> uninitialized [-Wmaybe-uninitialized]
> ret = test_ipsec_proto_process(td_outb, td_inb, nb_pkts, true,
>
> ^~~~
> &flags);
> ~~~
> ../app/test/test_cryptodev.c:9150:1: note: by argument 1 of type ‘const
> struct ipsec_test_data[]’ to ‘test_ipsec_proto_process’ declared here
> test_ipsec_proto_process(const struct ipsec_test_data td[],
> ^~~~
> ../app/test/test_cryptodev.c:10056:32: note: ‘td_outb’ declared here
> struct ipsec_test_data td_outb[IPSEC_TEST_PACKETS_MAX];
> ^~~
>
> Bugzilla ID: 1032
> Fixes: d02c6bfcb99a ("test/crypto: add ESN and antireplay cases")
> Cc: sta...@dpdk.org
>
> Reported-by: Daxue Gao
> Signed-off-by: Rahul Lakkireddy
Acked-by: Anoob Joseph
Re: [PATCH] config: remove explicit undef of unset values
On Thu, Dec 16, 2021 at 11:14:30AM +, Bruce Richardson wrote: > Rather than explicitly clearing any setting of undefined values in our > rte_config.h file, it's better to instead just add a comment that the > value is not set. Using a comment allows the user to set the value using > CFLAGS or similar mechanism without the config file clearing the value > again. > > The text used " is not set" is modelled after the kernel approach > of doing the same thing. > > Signed-off-by: Bruce Richardson > --- > > Although DPDK coding convention forbids use of "//" for comments, using > regular C comment style makes the config settings less clear, as they can > be confused with regular comments in the file. Using "//" makes them stand > out better, so I prefer it. However, if others feel strongly, they can be > changed to standard. > > Note: this is a resubmission of patch [1] which was part of a rejected > series. However, the reasons for rejection - values in config being out > of sync with those used for building apps - are less relevant for > many, if not all, of these setting, so I believe the benefits for > testing outweigh the potential downsides. If any setting is likely > problematic, I can keep the explicit undef for that case in a new patch > version. > > [1] > http://patches.dpdk.org/project/dpdk/patch/20200903144942.671870-2-bruce.richard...@intel.com/ > --- Ping for review or feedback for this patch. I'd like to see it move forward into a DPDK release if possible. /Bruce > config/rte_config.h | 14 +++--- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/config/rte_config.h b/config/rte_config.h > index cab4390a97..953216babd 100644 > --- a/config/rte_config.h > +++ b/config/rte_config.h > @@ -83,17 +83,17 @@ > > /* ip_fragmentation defines */ > #define RTE_LIBRTE_IP_FRAG_MAX_FRAG 8 > -#undef RTE_LIBRTE_IP_FRAG_TBL_STAT > +// RTE_LIBRTE_IP_FRAG_TBL_STAT is not set > > /* rte_power defines */ > #define RTE_MAX_LCORE_FREQS 64 > > /* rte_sched defines */ > -#undef RTE_SCHED_CMAN > -#undef RTE_SCHED_COLLECT_STATS > -#undef RTE_SCHED_SUBPORT_TC_OV > +// RTE_SCHED_CMAN is not set > +// RTE_SCHED_COLLECT_STATS is not set > +// RTE_SCHED_SUBPORT_TC_OV is not set > #define RTE_SCHED_PORT_N_GRINDERS 8 > -#undef RTE_SCHED_VECTOR > +// RTE_SCHED_VECTOR is not set > > /* KNI defines */ > #define RTE_KNI_PREEMPT_DEFAULT 1 > @@ -127,7 +127,7 @@ > > /* i40e defines */ > #define RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC 1 > -#undef RTE_LIBRTE_I40E_16BYTE_RX_DESC > +// RTE_LIBRTE_I40E_16BYTE_RX_DESC is not set > #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF 64 > #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF 4 > #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM 4 > @@ -140,6 +140,6 @@ > #define RTE_LIBRTE_QEDE_FW "" > > /* DLB2 defines */ > -#undef RTE_LIBRTE_PMD_DLB2_QUELL_STATS > +// RTE_LIBRTE_PMD_DLB2_QUELL_STATS is not set > > #endif /* _RTE_CONFIG_H_ */ > -- > 2.32.0 >
Re: [PATCH] app/flow-perf: fix logic to add comma every three digits
On Friday, June 06/10/22, 2022 at 16:45:22 -0700, Stephen Hemminger wrote:
> On Sat, 11 Jun 2022 03:36:43 +0530
> Rahul Lakkireddy wrote:
>
> > Add comma after 1 in 1000 too, like 1,000. Also, since max uint64_t is
> > a 20 digit number, increase space in temporary array to hold 20 digits.
> > Fixes following warnings when using optimization=1 build flag with
> > GCC 11.
> >
> > ../app/test-flow-perf/main.c: In function ‘pretty_number’:
> > ../app/test-flow-perf/main.c:1737:28: warning: ‘sprintf’ may write a
> > terminating nul past the end of the destination [-Wformat-overflow=]
> > sprintf(p[i++], "%d", (int)n);
> > ^
> > ../app/test-flow-perf/main.c:1737:9: note: ‘sprintf’ output between 2 and 5
> > bytes into a destination of size 4
> > sprintf(p[i++], "%d", (int)n);
> > ^
> >
> > Bugzilla ID: 1029
> > Fixes: 15c431864000 ("app/flow-perf: add packet forwarding support")
> > Cc: sta...@dpdk.org
> >
> > Reported-by: Daxue Gao
> > Signed-off-by: Rahul Lakkireddy
>
> There was a better alternative proposed here:
>
> https://patchwork.dpdk.org/project/dpdk/patch/20220518101657.1230416-12-david.march...@redhat.com/
Thanks Stephen. I missed this earlier patch from David. My patch
can be dropped.
Thanks,
Rahul
RE: [RFC PATCH v1] net/i40e: put mempool cache out of API
> From: Feifei Wang [mailto:feifei.wa...@arm.com] > Sent: Monday, 13 June 2022 07.52 > > Refer to "i40e_tx_free_bufs_avx512", this patch puts mempool cache > out of API to free buffers directly. There are two changes different > with previous version: > 1. change txep from "i40e_entry" to "i40e_vec_entry" > 2. put cache out of "mempool_bulk" API to copy buffers into it directly > > Performance Test with l3fwd neon path: > with this patch > n1sdp:no perforamnce change > amper-altra: +4.0% > > Suggested-by: Konstantin Ananyev > Suggested-by: Honnappa Nagarahalli > Signed-off-by: Feifei Wang > --- Once again bypassing the mempool API and copy-pasting internal code from the mempool library to a PMD for performance optimization. Certainly not happy about it, but it's already done elsewhere, and thus we should not deny it here... Acked-by: Morten Brørup
RE: [PATCH] config: remove explicit undef of unset values
> From: Bruce Richardson [mailto:bruce.richard...@intel.com] > Sent: Monday, 13 June 2022 11.55 > To: dev@dpdk.org > Cc: david.march...@redhat.com; junx.d...@intel.com > Subject: Re: [PATCH] config: remove explicit undef of unset values > > On Thu, Dec 16, 2021 at 11:14:30AM +, Bruce Richardson wrote: > > Rather than explicitly clearing any setting of undefined values in > our > > rte_config.h file, it's better to instead just add a comment that the > > value is not set. Using a comment allows the user to set the value > using > > CFLAGS or similar mechanism without the config file clearing the > value > > again. > > > > The text used " is not set" is modelled after the kernel > approach > > of doing the same thing. > > > > Signed-off-by: Bruce Richardson > > --- > > > > Although DPDK coding convention forbids use of "//" for comments, > using > > regular C comment style makes the config settings less clear, as they > can > > be confused with regular comments in the file. Using "//" makes them > stand > > out better, so I prefer it. However, if others feel strongly, they > can be > > changed to standard. > > > > Note: this is a resubmission of patch [1] which was part of a > rejected > > series. However, the reasons for rejection - values in config being > out > > of sync with those used for building apps - are less relevant for > > many, if not all, of these setting, so I believe the benefits for > > testing outweigh the potential downsides. If any setting is likely > > problematic, I can keep the explicit undef for that case in a new > patch > > version. > > > > [1] http://patches.dpdk.org/project/dpdk/patch/20200903144942.671870- > 2-bruce.richard...@intel.com/ > > --- > > Ping for review or feedback for this patch. I'd like to see it move > forward > into a DPDK release if possible. > > /Bruce > > > config/rte_config.h | 14 +++--- > > 1 file changed, 7 insertions(+), 7 deletions(-) > > > > diff --git a/config/rte_config.h b/config/rte_config.h > > index cab4390a97..953216babd 100644 > > --- a/config/rte_config.h > > +++ b/config/rte_config.h > > @@ -83,17 +83,17 @@ > > > > /* ip_fragmentation defines */ > > #define RTE_LIBRTE_IP_FRAG_MAX_FRAG 8 > > -#undef RTE_LIBRTE_IP_FRAG_TBL_STAT > > +// RTE_LIBRTE_IP_FRAG_TBL_STAT is not set > > Yes, this is the right way to do it. Acked-by: Morten Brørup
RE: [EXT] Re: [PATCH] devtools: ensure proper tag sequence
> -Original Message- > From: Thomas Monjalon > Sent: Sunday, June 12, 2022 10:29 PM > To: Jakub Palider > Cc: dev@dpdk.org; david.march...@redhat.com > Subject: [EXT] Re: [PATCH] devtools: ensure proper tag sequence > > External Email > > -- > 12/06/2022 16:23, jpali...@marvell.com: > > From: Jakub Palider > > > > This change to log checking procedure ensures that all > > tags are in proper order. > > The order of tags is as follows: > > * Coverity issue > > * Bugzilla ID > > * Fixes > > * Cc > > * > > * Suggested-by > > * Reported-by > > + Signed-off-by > > * Acked-by > > * Reviewed-by > > * Tested-by > > For the *-by sequence, the order is more chronological. > Ack/Review/Test can be in any order I think. > > Hi Thomas, Do I get it right that the lines after are fine in current state and the patch could take care of the first section only?
[PATCH v9 0/4] add an api to support proto based buffer split
From: Wenxuan Wu Protocol type based buffer split consists of splitting a received packet into several separate segments based on the packet content. It is useful in some scenarios, such as GPU acceleration. The splitting will help to enable true zero copy and hence improve the performance significantly. This patchset aims to support protocol header split based on current buffer split. When Rx queue is configured with RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT offload and corresponding protocol, packets received will be directly split into different mempools. v8->v9: * Introduce a new api rte_eth_supported_hdrs_get to retrieve supported ptypes mask of a pmd to split. * Fix header protocol split check. * Support header protocol configuration of rxhdrs by default, e.g. ipv4, ipv6, mac, inner_mac, outer_mac, l3, l4. * Refine doc. v7->v8: * Refine ethdev doc. * Fix header protocol split check. v6->v7: * Fix supported header protocol check. * Add rxhdrs commands and parameters. v5->v6: * The header split deprecation notice is sent. * Refine the documents, protocol header based buffer split can actually support multi-segment split. * Add buffer split protocol header capability. * Fix some format issues. v4->v5: * Use protocol and mbuf_offset based buffer split instead of header split. * Use RTE_PTYPE* instead of enum rte_eth_rx_header_split_protocol_type. * Improve the description of rte_eth_rxseg_split.proto. v3->v4: * Use RTE_ETH_RX_HEADER_SPLIT_NONE instead of 0. v2->v3: * Fix a PMD bug. * Add rx queue header split check. * Revise the log and doc. v1->v2: * Add support for all header split protocol types. Wenxuan Wu (4): ethdev: introduce protocol header API ethdev: introduce protocol hdr based buffer split app/testpmd: add rxhdrs commands and parameters net/ice: support buffer split in Rx path app/test-pmd/cmdline.c | 133 ++- app/test-pmd/config.c | 75 + app/test-pmd/parameters.c | 15 +- app/test-pmd/testpmd.c | 6 +- app/test-pmd/testpmd.h | 6 + doc/guides/rel_notes/release_22_07.rst | 2 + drivers/net/ice/ice_ethdev.c | 38 - drivers/net/ice/ice_rxtx.c | 220 + drivers/net/ice/ice_rxtx.h | 16 ++ drivers/net/ice/ice_rxtx_vec_common.h | 3 + lib/ethdev/ethdev_driver.h | 18 ++ lib/ethdev/rte_ethdev.c| 61 +-- lib/ethdev/rte_ethdev.h| 36 +++- lib/ethdev/version.map | 3 + 14 files changed, 582 insertions(+), 50 deletions(-) -- 2.25.1
[PATCH v9 1/4] ethdev: introduce protocol header API
From: Wenxuan Wu
This patch added new ethdev API to retrieve supported protocol header mask
of a PMD, which helps to configure protocol header based buffer split.
Signed-off-by: Wenxuan Wu
---
doc/guides/rel_notes/release_22_07.rst | 2 ++
lib/ethdev/ethdev_driver.h | 18 +++
lib/ethdev/rte_ethdev.c| 31 +-
lib/ethdev/rte_ethdev.h| 22 ++
lib/ethdev/version.map | 3 +++
5 files changed, 65 insertions(+), 11 deletions(-)
diff --git a/doc/guides/rel_notes/release_22_07.rst
b/doc/guides/rel_notes/release_22_07.rst
index 42a5f2d990..a9b8ed3494 100644
--- a/doc/guides/rel_notes/release_22_07.rst
+++ b/doc/guides/rel_notes/release_22_07.rst
@@ -54,7 +54,9 @@ New Features
This section is a comment. Do not overwrite or remove it.
Also, make sure to start the actual text at the margin.
===
+* **Added new ethdev API for PMD to get buffer split supported protocol
types.**
+ Added ``rte_eth_supported_hdrs_get()``, to get supported header protocol
mask of a PMD to split.
Removed Items
-
diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h
index 69d9dc21d8..7b19842582 100644
--- a/lib/ethdev/ethdev_driver.h
+++ b/lib/ethdev/ethdev_driver.h
@@ -1054,6 +1054,21 @@ typedef int (*eth_ip_reassembly_conf_get_t)(struct
rte_eth_dev *dev,
typedef int (*eth_ip_reassembly_conf_set_t)(struct rte_eth_dev *dev,
const struct rte_eth_ip_reassembly_params *conf);
+/**
+ * @internal
+ * Get supported protocol flags of a PMD to split.
+ *
+ * @param dev
+ * ethdev handle of port.
+ *
+ * @param[out] ptype mask
+ * supported ptype mask of a PMD.
+ *
+ * @return
+ * Negative errno value on error, zero on success.
+ */
+typedef int (*eth_buffer_split_hdr_ptype_get_t)(struct rte_eth_dev *dev,
uint32_t *ptype);
+
/**
* @internal
* Dump private info from device to a file.
@@ -1281,6 +1296,9 @@ struct eth_dev_ops {
/** Set IP reassembly configuration */
eth_ip_reassembly_conf_set_t ip_reassembly_conf_set;
+ /** Get supported ptypes to split */
+ eth_buffer_split_hdr_ptype_get_t hdrs_supported_ptypes_get;
+
/** Dump private info from device */
eth_dev_priv_dump_t eth_dev_priv_dump;
};
diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
index 29a3d80466..e1f2a0ffe3 100644
--- a/lib/ethdev/rte_ethdev.c
+++ b/lib/ethdev/rte_ethdev.c
@@ -1636,9 +1636,10 @@ rte_eth_dev_is_removed(uint16_t port_id)
}
static int
-rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,
-uint16_t n_seg, uint32_t *mbp_buf_size,
-const struct rte_eth_dev_info *dev_info)
+rte_eth_rx_queue_check_split(uint16_t port_id,
+ const struct rte_eth_rxseg_split *rx_seg,
+ int16_t n_seg, uint32_t *mbp_buf_size,
+ const struct rte_eth_dev_info *dev_info)
{
const struct rte_eth_rxseg_capa *seg_capa = &dev_info->rx_seg_capa;
struct rte_mempool *mp_first;
@@ -1694,13 +1695,7 @@ rte_eth_rx_queue_check_split(const struct
rte_eth_rxseg_split *rx_seg,
}
offset += seg_idx != 0 ? 0 : RTE_PKTMBUF_HEADROOM;
*mbp_buf_size = rte_pktmbuf_data_room_size(mpl);
- length = length != 0 ? length : *mbp_buf_size;
- if (*mbp_buf_size < length + offset) {
- RTE_ETHDEV_LOG(ERR,
- "%s mbuf_data_room_size %u < %u (segment
length=%u + segment offset=%u)\n",
- mpl->name, *mbp_buf_size,
- length + offset, length, offset);
- return -EINVAL;
+
}
}
return 0;
@@ -1779,7 +1774,7 @@ rte_eth_rx_queue_setup(uint16_t port_id, uint16_t
rx_queue_id,
n_seg = rx_conf->rx_nseg;
if (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) {
- ret = rte_eth_rx_queue_check_split(rx_seg, n_seg,
+ ret = rte_eth_rx_queue_check_split(port_id, rx_seg,
n_seg,
&mbp_buf_size,
&dev_info);
if (ret != 0)
@@ -5844,6 +5839,20 @@ rte_eth_ip_reassembly_conf_set(uint16_t port_id,
(*dev->dev_ops->ip_reassembly_conf_set)(dev, conf));
}
+int
+rte_eth_supported_hdrs_get(uint16_t port_id, uint32_t *ptypes)
+{
+ struct rte_eth_dev *dev;
+ RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
+ dev = &rte_eth_devices[port_id];
+
+ RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hdrs_supported_ptypes_get,
+ -ENOTSUP);
+
+
[PATCH v9 2/4] ethdev: introduce protocol hdr based buffer split
From: Wenxuan Wu
Currently, Rx buffer split supports length based split. With Rx queue
offload RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT enabled and Rx packet segment
configured, PMD will be able to split the received packets into
multiple segments.
However, length based buffer split is not suitable for NICs that do split
based on protocol headers. Given an arbitrarily variable length in Rx
packet segment, it is almost impossible to pass a fixed protocol header to
driver. Besides, the existence of tunneling results in the composition of
a packet is various, which makes the situation even worse.
This patch extends current buffer split to support protocol header based
buffer split. A new proto_hdr field is introduced in the reserved field
of rte_eth_rxseg_split structure to specify protocol header. The proto_hdr
field defines the split position of packet, splitting will always happens
after the protocol header defined in the Rx packet segment. When Rx queue
offload RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT is enabled and corresponding
protocol header is configured, driver will split the ingress packets into
multiple segments.
struct rte_eth_rxseg_split {
struct rte_mempool *mp; /* memory pools to allocate segment from */
uint16_t length; /* segment maximal data length,
configures "split point" */
uint16_t offset; /* data offset from beginning
of mbuf data buffer */
uint32_t proto_hdr; /* inner/outer L2/L3/L4 protocol header,
configures "split point" */
};
If both inner and outer L2/L3/L4 level protocol header split can be
supported by a PMD. Corresponding protocol header capability is
RTE_PTYPE_L2_ETHER, RTE_PTYPE_L3_IPV4, RTE_PTYPE_L3_IPV6, RTE_PTYPE_L4_TCP,
RTE_PTYPE_L4_UDP, RTE_PTYPE_L4_SCTP, RTE_PTYPE_INNER_L2_ETHER,
RTE_PTYPE_INNER_L3_IPV4, RTE_PTYPE_INNER_L3_IPV6, RTE_PTYPE_INNER_L4_TCP,
RTE_PTYPE_INNER_L4_UDP, RTE_PTYPE_INNER_L4_SCTP.
For example, let's suppose we configured the Rx queue with the
following segments:
seg0 - pool0, proto_hdr0=RTE_PTYPE_L3_IPV4, off0=2B
seg1 - pool1, proto_hdr1=RTE_PTYPE_L4_UDP, off1=128B
seg2 - pool2, off1=0B
The packet consists of MAC_IPV4_UDP_PAYLOAD will be split like
following:
seg0 - ipv4 header @ RTE_PKTMBUF_HEADROOM + 2 in mbuf from pool0
seg1 - udp header @ 128 in mbuf from pool1
seg2 - payload @ 0 in mbuf from pool2
Now buffer split can be configured in two modes. For length based
buffer split, the mp, length, offset field in Rx packet segment should
be configured, while the proto_hdr field should not be configured.
For protocol header based buffer split, the mp, offset, proto_hdr field
in Rx packet segment should be configured, while the length field should
not be configured.
The split limitations imposed by underlying driver is reported in the
rte_eth_dev_info->rx_seg_capa field. The memory attributes for the split
parts may differ either, dpdk memory and external memory, respectively.
Signed-off-by: Xuan Ding
Signed-off-by: Wenxuan Wu
Signed-off-by: Yuan Wang
Reviewed-by: Qi Zhang
Acked-by: Ray Kinsella
---
lib/ethdev/rte_ethdev.c | 32 +++-
lib/ethdev/rte_ethdev.h | 14 +-
2 files changed, 44 insertions(+), 2 deletions(-)
diff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c
index e1f2a0ffe3..b89e30296f 100644
--- a/lib/ethdev/rte_ethdev.c
+++ b/lib/ethdev/rte_ethdev.c
@@ -1662,6 +1662,7 @@ rte_eth_rx_queue_check_split(uint16_t port_id,
struct rte_mempool *mpl = rx_seg[seg_idx].mp;
uint32_t length = rx_seg[seg_idx].length;
uint32_t offset = rx_seg[seg_idx].offset;
+ uint32_t proto_hdr = rx_seg[seg_idx].proto_hdr;
if (mpl == NULL) {
RTE_ETHDEV_LOG(ERR, "null mempool pointer\n");
@@ -1695,7 +1696,36 @@ rte_eth_rx_queue_check_split(uint16_t port_id,
}
offset += seg_idx != 0 ? 0 : RTE_PKTMBUF_HEADROOM;
*mbp_buf_size = rte_pktmbuf_data_room_size(mpl);
-
+ uint32_t ptypes_mask;
+ int ret = rte_eth_supported_hdrs_get(port_id, &ptypes_mask);
+
+ if (ret == ENOTSUP || ptypes_mask == RTE_PTYPE_UNKNOWN) {
+ /* Split at fixed length. */
+ length = length != 0 ? length : *mbp_buf_size;
+ if (*mbp_buf_size < length + offset) {
+ RTE_ETHDEV_LOG(ERR,
+ "%s mbuf_data_room_size %u < %u
(segment length=%u + segment offset=%u)\n",
+ mpl->name, *mbp_buf_size,
+ length + offset, length, offset);
+ return -EINVAL;
+ }
+ } else if (ret == 0) {
+ /* Split after specified protocol header. */
+
[PATCH v9 3/4] app/testpmd: add rxhdrs commands and parameters
From: Wenxuan Wu
Add command line parameter:
--rxhdrs=mac,[ipv4,udp]
Set the protocol_hdr of segments to scatter packets on receiving if
split feature is engaged. And the queues with BUFFER_SPLIT flag.
Add interactive mode command:
testpmd>set rxhdrs mac,ipv4,l3,tcp,udp,sctp
(protocol sequence should be valid)
The protocol split feature is off by default. To enable protocol split,
you need:
1. Start testpmd with two mempools. E.g. --mbuf-size=2048,2048
2. Configure Rx queue with rx_offload buffer split on.
3. Set the protocol type of buffer split. E.g. set rxhdrs mac,ipv4
(default protocols of testpmd : mac|icmp|ipv4|ipv6|l3|tcp|udp|
sctp|l4|inner_mac|inner_ipv4|inner_ipv6|
inner_l3|inner_tcp|inner_udp|inner_sctp|
inner_l4)
Above protocols can be configured in testpmd. But the configuration can
only be applied when it is supported by specific pmd.
Signed-off-by: Wenxuan Wu
Signed-off-by: Xuan Ding
Signed-off-by: Yuan Wang
Reviewed-by: Qi Zhang
---
app/test-pmd/cmdline.c| 133 +-
app/test-pmd/config.c | 75 +
app/test-pmd/parameters.c | 15 -
app/test-pmd/testpmd.c| 6 +-
app/test-pmd/testpmd.h| 6 ++
5 files changed, 229 insertions(+), 6 deletions(-)
diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 6ffea8e21a..474235bc91 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -183,7 +183,7 @@ static void cmd_help_long_parsed(void *parsed_result,
"show (rxq|txq) info (port_id) (queue_id)\n"
"Display information for configured RX/TX
queue.\n\n"
- "show config (rxtx|cores|fwd|rxoffs|rxpkts|txpkts)\n"
+ "show config
(rxtx|cores|fwd|rxoffs|rxpkts|rxhdrs|txpkts)\n"
"Display the given configuration.\n\n"
"read rxd (port_id) (queue_id) (rxd_id)\n"
@@ -316,6 +316,15 @@ static void cmd_help_long_parsed(void *parsed_result,
" Affects only the queues configured with split"
" offloads.\n\n"
+ "set rxhdrs (mac[,ipv4])*\n"
+ " Set the protocol hdr of each segment to scatter"
+ " packets on receiving if split feature is engaged."
+ " Affects only the queues configured with split"
+ " offloads.\n\n"
+ " Supported proto header:
mac|ipv4||qinq|gre|ipv6|l3|tcp|udp|sctp|l4|"
+ "inner_mac|inner_ipv4|inner_ipv6|inner_l3|inner_tcp|"
+ "inner_udp|inner_sctp\n"
+
"set txpkts (x[,y]*)\n"
"Set the length of each segment of TXONLY"
" and optionally CSUM packets.\n\n"
@@ -3617,6 +3626,78 @@ cmdline_parse_inst_t cmd_stop = {
},
};
+static unsigned int
+get_ptype(char *value)
+{
+ uint32_t protocol;
+ if (!strcmp(value, "mac"))
+ protocol = RTE_PTYPE_L2_ETHER;
+ else if (!strcmp(value, "ipv4"))
+ protocol = RTE_PTYPE_L3_IPV4;
+ else if (!strcmp(value, "ipv6"))
+ protocol = RTE_PTYPE_L3_IPV6;
+ else if (!strcmp(value, "l3"))
+ protocol = RTE_PTYPE_L3_IPV4|RTE_PTYPE_L3_IPV6;
+ else if (!strcmp(value, "tcp"))
+ protocol = RTE_PTYPE_L4_TCP;
+ else if (!strcmp(value, "udp"))
+ protocol = RTE_PTYPE_L4_UDP;
+ else if (!strcmp(value, "sctp"))
+ protocol = RTE_PTYPE_L4_SCTP;
+ else if (!strcmp(value, "l4"))
+ protocol = RTE_PTYPE_L4_TCP|RTE_PTYPE_L4_UDP|RTE_PTYPE_L4_SCTP;
+ else if (!strcmp(value, "inner_mac"))
+ protocol = RTE_PTYPE_INNER_L2_ETHER;
+ else if (!strcmp(value, "inner_ipv4"))
+ protocol = RTE_PTYPE_INNER_L3_IPV4;
+ else if (!strcmp(value, "inner_ipv6"))
+ protocol = RTE_PTYPE_INNER_L3_IPV6;
+ else if (!strcmp(value, "inner_l3"))
+ protocol = RTE_PTYPE_INNER_L3_IPV4|RTE_PTYPE_INNER_L3_IPV6;
+ else if (!strcmp(value, "inner_tcp"))
+ protocol = RTE_PTYPE_INNER_L4_TCP;
+ else if (!strcmp(value, "inner_udp"))
+ protocol = RTE_PTYPE_INNER_L4_UDP;
+ else if (!strcmp(value, "inner_sctp"))
+ protocol = RTE_PTYPE_INNER_L4_SCTP;
+ else if (!strcmp(value, "unknown"))
+ protocol = RTE_PTYPE_UNKNOWN;
+ else if (!strcmp(value, "gre"))
+ protocol = RTE_PTYPE_TUNNEL_GRE;
+ else if (!strcmp(value, "qinq"))
+ protocol = RTE_PTYPE_L2_ETHER_QINQ;
+ else {
+ fprintf(stderr, "Unsupported protocol name: %s\n", value);
+ return 0;
+ }
+ return protocol;
+}
+/
[PATCH v9 4/4] net/ice: support buffer split in Rx path
From: Wenxuan Wu
This patch adds support for protocol based buffer split in normal Rx
data paths. When the Rx queue is configured with specific protocol type,
packets received will be directly split into protocol header and
payload parts limitation of ice pmd. And the two parts will be
put into different mempools.
Currently, protocol based buffer split is not supported in vectorized
paths.
A new api ice_get_supported_split_hdrs() has been introduced, it will
return the supported header protocols of ice PMD to app for splitting.
Signed-off-by: Xuan Ding
Signed-off-by: Wenxuan Wu
Signed-off-by: Yuan Wang
Reviewed-by: Qi Zhang
---
drivers/net/ice/ice_ethdev.c | 38 -
drivers/net/ice/ice_rxtx.c| 220 ++
drivers/net/ice/ice_rxtx.h| 16 ++
drivers/net/ice/ice_rxtx_vec_common.h | 3 +
4 files changed, 245 insertions(+), 32 deletions(-)
diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index 73e550f5fb..dcd4ad2eb4 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -169,6 +169,8 @@ static int ice_timesync_read_time(struct rte_eth_dev *dev,
static int ice_timesync_write_time(struct rte_eth_dev *dev,
const struct timespec *timestamp);
static int ice_timesync_disable(struct rte_eth_dev *dev);
+static int ice_get_supported_split_hdrs(struct rte_eth_dev *dev,
+ uint32_t *ptypes);
static const struct rte_pci_id pci_id_ice_map[] = {
{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_BACKPLANE) },
@@ -267,6 +269,7 @@ static const struct eth_dev_ops ice_eth_dev_ops = {
.timesync_read_time = ice_timesync_read_time,
.timesync_write_time = ice_timesync_write_time,
.timesync_disable = ice_timesync_disable,
+ .hdrs_supported_ptypes_get= ice_get_supported_split_hdrs,
};
/* store statistics names and its offset in stats structure */
@@ -3713,7 +3716,8 @@ ice_dev_info_get(struct rte_eth_dev *dev, struct
rte_eth_dev_info *dev_info)
RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM |
RTE_ETH_RX_OFFLOAD_VLAN_EXTEND |
RTE_ETH_RX_OFFLOAD_RSS_HASH |
- RTE_ETH_RX_OFFLOAD_TIMESTAMP;
+ RTE_ETH_RX_OFFLOAD_TIMESTAMP |
+ RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT;
dev_info->tx_offload_capa |=
RTE_ETH_TX_OFFLOAD_QINQ_INSERT |
RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
@@ -3725,7 +3729,7 @@ ice_dev_info_get(struct rte_eth_dev *dev, struct
rte_eth_dev_info *dev_info)
dev_info->flow_type_rss_offloads |= ICE_RSS_OFFLOAD_ALL;
}
- dev_info->rx_queue_offload_capa = 0;
+ dev_info->rx_queue_offload_capa = RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT;
dev_info->tx_queue_offload_capa = RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE;
dev_info->reta_size = pf->hash_lut_size;
@@ -3794,6 +3798,11 @@ ice_dev_info_get(struct rte_eth_dev *dev, struct
rte_eth_dev_info *dev_info)
dev_info->default_rxportconf.ring_size = ICE_BUF_SIZE_MIN;
dev_info->default_txportconf.ring_size = ICE_BUF_SIZE_MIN;
+ dev_info->rx_seg_capa.max_nseg = ICE_RX_MAX_NSEG;
+ dev_info->rx_seg_capa.multi_pools = 1;
+ dev_info->rx_seg_capa.offset_allowed = 0;
+ dev_info->rx_seg_capa.offset_align_log2 = 0;
+
return 0;
}
@@ -5840,6 +5849,31 @@ ice_timesync_disable(struct rte_eth_dev *dev)
return 0;
}
+static int
+ice_get_supported_split_hdrs(struct rte_eth_dev *dev, uint32_t *ptypes)
+{
+ if (!dev)
+ return -EINVAL;
+/* Buffer split protocol header capability. */
+#define RTE_BUFFER_SPLIT_PROTO_HDR_MASK ( \
+ RTE_PTYPE_L2_ETHER | \
+ RTE_PTYPE_L3_IPV4 | \
+ RTE_PTYPE_L3_IPV6 | \
+ RTE_PTYPE_L4_TCP | \
+ RTE_PTYPE_L4_UDP | \
+ RTE_PTYPE_L4_SCTP | \
+ RTE_PTYPE_INNER_L2_ETHER | \
+ RTE_PTYPE_INNER_L3_IPV4 | \
+ RTE_PTYPE_INNER_L3_IPV6 | \
+ RTE_PTYPE_INNER_L4_TCP | \
+ RTE_PTYPE_INNER_L4_UDP | \
+ RTE_PTYPE_INNER_L4_SCTP)
+
+ *ptypes = RTE_BUFFER_SPLIT_PROTO_HDR_MASK;
+
+ return 0;
+}
+
static int
ice_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
struct rte_pci_device *pci_dev)
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index 2dd2637fbb..47ef5bbe35 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -282,7 +282,6 @@ ice_program_hw_rx_queue(struct ice_rx_queue *rxq)
/* Set buffer size as the head split is disabled. */
buf_size = (uint16_t)(rte_pktmbuf_data_room_size(rxq->mp) -
RTE_PKTMBUF_HEADROOM);
- rxq->rx_hdr_len = 0;
rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << ICE_RLAN_CTX_DBUF_S));
rxq->max_pkt_len =
[PATCH] common/cnxk: update CN103XX subsystem device ID
Updates the subsystem device ID for CN103XX. Signed-off-by: Rahul Bhansali --- drivers/common/cnxk/roc_constants.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/common/cnxk/roc_constants.h b/drivers/common/cnxk/roc_constants.h index d7a8bd23e2..2553d4d8fc 100644 --- a/drivers/common/cnxk/roc_constants.h +++ b/drivers/common/cnxk/roc_constants.h @@ -52,7 +52,7 @@ #define PCI_SUBSYSTEM_DEVID_CN10KA 0xB900 #define PCI_SUBSYSTEM_DEVID_CN10KAS 0xB900 #define PCI_SUBSYSTEM_DEVID_CNF10KA 0xBA00 -#define PCI_SUBSYSTEM_DEVID_CN10KB 0xB900 +#define PCI_SUBSYSTEM_DEVID_CN10KB 0xBD00 #define PCI_SUBSYSTEM_DEVID_CN9KA 0x #define PCI_SUBSYSTEM_DEVID_CN9KB 0xb400 -- 2.25.1
RE: [EXT] Re: [PATCH 01/12] common/cpt: fix build with GCC 12
Hi David,
>-Original Message-
>From: David Marchand
>Sent: Friday, June 10, 2022 6:42 PM
>To: Anoob Joseph ; Ankur Dwivedi
>
>Cc: Thomas Monjalon ; Ferruh Yigit
>; dpdk stable ; dev
>; Akhil Goyal ; Jerin Jacob
>Kollanukkaran
>Subject: [EXT] Re: [PATCH 01/12] common/cpt: fix build with GCC 12
>
>External Email
>
>--
>Hello maintainers,
>
>On Wed, May 18, 2022 at 12:17 PM David Marchand
> wrote:
>>
>> GCC 12 raises the following warning:
>>
>> In function ‘fill_sg_comp_from_iov’,
>> inlined from ‘cpt_kasumi_enc_prep’ at
>> ../drivers/common/cpt/cpt_ucode.h:2176:8,
>> inlined from ‘cpt_fc_enc_hmac_prep’ at
>> ../drivers/common/cpt/cpt_ucode.h:2475:3,
>> inlined from ‘fill_digest_params’ at
>> ../drivers/common/cpt/cpt_ucode.h:3548:14,
>> inlined from ‘otx_cpt_enq_single_sym’ at
>> ../drivers/crypto/octeontx/otx_cryptodev_ops.c:541:9,
>> inlined from ‘otx_cpt_enq_single_sym_sessless’ at
>> ../drivers/crypto/octeontx/otx_cryptodev_ops.c:584:8,
>> inlined from ‘otx_cpt_enq_single’ at
>> ../drivers/crypto/octeontx/otx_cryptodev_ops.c:611:11,
>> inlined from ‘otx_cpt_pkt_enqueue’ at
>> ../drivers/crypto/octeontx/otx_cryptodev_ops.c:643:9,
>> inlined from ‘otx_cpt_enqueue_sym’ at
>> ../drivers/crypto/octeontx/otx_cryptodev_ops.c:668:9:
>> ../drivers/common/cpt/cpt_ucode.h:415:36: error: array subscript 0 is
>> outside array bounds of ‘buf_ptr_t[0]’ {aka ‘struct buf_ptr[]’}
>> [-Werror=array-bounds]
>> 415 | e_dma_addr = bufs[j].dma_addr;
>> | ~~~^~
>> ../drivers/common/cpt/cpt_ucode.h:416:48: error: array subscript 0 is
>> outside array bounds of ‘buf_ptr_t[0]’ {aka ‘struct buf_ptr[]’}
>> [-Werror=array-bounds]
>> 416 | e_len = (size > bufs[j].size) ?
>> | ~~~^
>>
>> For now, waive this warning until we have a proper fix.
>
>Both common/cpt and crypto/cnxk have the same code that triggers this
>warning.
>Can you look into this please?
We will look into the issues in common/cpt and crypto/cnxk.
>
>Thanks.
>
>--
>David Marchand
Regards,
Ankur
[PATCH v2] common/cnxk: add cnf10kb support
Support for cnf10kb soc by adding its PCI device ID
Signed-off-by: Harman Kalra
---
V2:
- Rebased to fix apply conflicts.
drivers/common/cnxk/roc_constants.h | 1 +
drivers/event/cnxk/cn10k_eventdev.c | 2 ++
drivers/mempool/cnxk/cnxk_mempool.c | 2 ++
drivers/net/cnxk/cn10k_ethdev.c | 3 +++
4 files changed, 8 insertions(+)
diff --git a/drivers/common/cnxk/roc_constants.h
b/drivers/common/cnxk/roc_constants.h
index d7a8bd23e2..0a41f8318a 100644
--- a/drivers/common/cnxk/roc_constants.h
+++ b/drivers/common/cnxk/roc_constants.h
@@ -53,6 +53,7 @@
#define PCI_SUBSYSTEM_DEVID_CN10KAS 0xB900
#define PCI_SUBSYSTEM_DEVID_CNF10KA 0xBA00
#define PCI_SUBSYSTEM_DEVID_CN10KB 0xB900
+#define PCI_SUBSYSTEM_DEVID_CNF10KB 0xBC00
#define PCI_SUBSYSTEM_DEVID_CN9KA 0x
#define PCI_SUBSYSTEM_DEVID_CN9KB 0xb400
diff --git a/drivers/event/cnxk/cn10k_eventdev.c
b/drivers/event/cnxk/cn10k_eventdev.c
index 0da809db29..219826b9e1 100644
--- a/drivers/event/cnxk/cn10k_eventdev.c
+++ b/drivers/event/cnxk/cn10k_eventdev.c
@@ -1008,10 +1008,12 @@ static const struct rte_pci_id cn10k_pci_sso_map[] = {
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
+ CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KB, PCI_DEVID_CNXK_RVU_SSO_TIM_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
+ CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KB, PCI_DEVID_CNXK_RVU_SSO_TIM_VF),
{
.vendor_id = 0,
},
diff --git a/drivers/mempool/cnxk/cnxk_mempool.c
b/drivers/mempool/cnxk/cnxk_mempool.c
index 69c27b1cf5..54a1a7d3ae 100644
--- a/drivers/mempool/cnxk/cnxk_mempool.c
+++ b/drivers/mempool/cnxk/cnxk_mempool.c
@@ -164,6 +164,7 @@ static const struct rte_pci_id npa_pci_map[] = {
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_NPA_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_NPA_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_NPA_PF),
+ CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KB, PCI_DEVID_CNXK_RVU_NPA_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KA, PCI_DEVID_CNXK_RVU_NPA_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KB, PCI_DEVID_CNXK_RVU_NPA_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KC, PCI_DEVID_CNXK_RVU_NPA_PF),
@@ -173,6 +174,7 @@ static const struct rte_pci_id npa_pci_map[] = {
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_NPA_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_NPA_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_NPA_VF),
+ CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KB, PCI_DEVID_CNXK_RVU_NPA_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KA, PCI_DEVID_CNXK_RVU_NPA_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KB, PCI_DEVID_CNXK_RVU_NPA_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN9KC, PCI_DEVID_CNXK_RVU_NPA_VF),
diff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c
index 911a7d7aaf..550cec5c85 100644
--- a/drivers/net/cnxk/cn10k_ethdev.c
+++ b/drivers/net/cnxk/cn10k_ethdev.c
@@ -813,14 +813,17 @@ static const struct rte_pci_id cn10k_pci_nix_map[] = {
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA, PCI_DEVID_CNXK_RVU_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_PF),
+ CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KB, PCI_DEVID_CNXK_RVU_PF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA, PCI_DEVID_CNXK_RVU_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_VF),
+ CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KB, PCI_DEVID_CNXK_RVU_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KA, PCI_DEVID_CNXK_RVU_AF_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KAS, PCI_DEVID_CNXK_RVU_AF_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KA, PCI_DEVID_CNXK_RVU_AF_VF),
CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CN10KB, PCI_DEVID_CNXK_RVU_AF_VF),
+ CNXK_PCI_ID(PCI_SUBSYSTEM_DEVID_CNF10KB, PCI_DEVID_CNXK_RVU_AF_VF),
{
.vendor_id = 0,
},
--
2.18.0
[PATCH] pipeline: fix comparison
From: Harshad Narayane
Fix comparison used to check against the maximum number of learner
table timeouts.
Fixes: e2ecc53582fb ("pipeline: improve learner table timers")
Signed-off-by: Harshad Narayane
Signed-off-by: Cristian Dumitrescu
---
lib/pipeline/rte_swx_pipeline.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/pipeline/rte_swx_pipeline.c b/lib/pipeline/rte_swx_pipeline.c
index b4b44ad897..659d8726d1 100644
--- a/lib/pipeline/rte_swx_pipeline.c
+++ b/lib/pipeline/rte_swx_pipeline.c
@@ -8848,7 +8848,7 @@ rte_swx_pipeline_learner_config(struct rte_swx_pipeline
*p,
/* Any other checks. */
CHECK(size, EINVAL);
CHECK(timeout, EINVAL);
- CHECK(n_timeouts && (n_timeouts <
RTE_SWX_TABLE_LEARNER_N_KEY_TIMEOUTS_MAX), EINVAL);
+ CHECK(n_timeouts && (n_timeouts <=
RTE_SWX_TABLE_LEARNER_N_KEY_TIMEOUTS_MAX), EINVAL);
/* Memory allocation. */
l = calloc(1, sizeof(struct learner));
--
2.17.1
Re: [v9, 00/10] Add JSON vector set support to fips validation
On Tue, Jun 7, 2022 at 11:48 AM David Marchand wrote: > On Tue, May 31, 2022 at 5:23 PM Akhil Goyal wrote: > > > > > > Subject: [v9, 00/10] Add JSON vector set support to fips validation > > > > > > > > Adds a very basic introduction to JSON vector sets in > > > > the fips validation example application. This patch set > > > > will only introduce the AES-GCM test using a JSON request > > > > file because the other algorithms need more information > > > > than what is given in the new JSON format. > > > > > > > Series-acked-by: Fan Zhang > > > > Series Applied to dpdk-next-crypto > > This series breaks compiling the fips example out of DPDK. Gowri, Fan, Akhil, I disabled compilation checks for this example on my side. Can you look into this? Thanks. -- David Marchand
Re: [PATCH v2 1/6] Revert "app/testpmd: modify mac in csum forwarding"
Hi Maxime,
On 6/8/2022 6:19 PM, Maxime Coquelin wrote:
This patch reverts commit 10f4620f02e1 ("app/testpmd: modify mac in csum
forwarding"),
as the checksum forwarding is expected to only perform
checksum and not also overwrites the source and destination
MAC addresses.
Doing so, we can test checksum offloading with real traffic
without breaking broadcast packets.
Fixes: 10f4620f02e1 ("app/testpmd: modify mac in csum forwarding")
Cc: sta...@dpdk.org
Signed-off-by: Maxime Coquelin
Acked-by: Chenbo Xia
Acked-by: Aman Singh
---
app/test-pmd/csumonly.c | 4
1 file changed, 4 deletions(-)
diff --git a/app/test-pmd/csumonly.c b/app/test-pmd/csumonly.c
index 7df201e047..1a3fd9ce8a 100644
--- a/app/test-pmd/csumonly.c
+++ b/app/test-pmd/csumonly.c
@@ -916,10 +916,6 @@ pkt_burst_checksum_forward(struct fwd_stream *fs)
* and inner headers */
eth_hdr = rte_pktmbuf_mtod(m, struct rte_ether_hdr *);
- rte_ether_addr_copy(&peer_eth_addrs[fs->peer_addr],
- ð_hdr->dst_addr);
- rte_ether_addr_copy(&ports[fs->tx_port].eth_addr,
- ð_hdr->src_addr);
parse_ethernet(eth_hdr, &info);
l3_hdr = (char *)eth_hdr + info.l2_len;
LGTM, In principle csum mode should not modify the mac addresses.
This code has been there from start, so might break some TC's.
Re: [PATCH] config: remove explicit undef of unset values
On Mon, Jun 13, 2022 at 11:54 AM Bruce Richardson
wrote:
> On Thu, Dec 16, 2021 at 11:14:30AM +, Bruce Richardson wrote:
> > Rather than explicitly clearing any setting of undefined values in our
> > rte_config.h file, it's better to instead just add a comment that the
> > value is not set. Using a comment allows the user to set the value using
> > CFLAGS or similar mechanism without the config file clearing the value
> > again.
> >
> > The text used " is not set" is modelled after the kernel approach
> > of doing the same thing.
> >
> > Signed-off-by: Bruce Richardson
> > ---
> >
> > Although DPDK coding convention forbids use of "//" for comments, using
> > regular C comment style makes the config settings less clear, as they can
> > be confused with regular comments in the file. Using "//" makes them stand
> > out better, so I prefer it. However, if others feel strongly, they can be
> > changed to standard.
> >
> > Note: this is a resubmission of patch [1] which was part of a rejected
> > series. However, the reasons for rejection - values in config being out
> > of sync with those used for building apps - are less relevant for
> > many, if not all, of these setting, so I believe the benefits for
> > testing outweigh the potential downsides. If any setting is likely
> > problematic, I can keep the explicit undef for that case in a new patch
> > version.
> >
> > [1]
> > http://patches.dpdk.org/project/dpdk/patch/20200903144942.671870-2-bruce.richard...@intel.com/
> > ---
>
> Ping for review or feedback for this patch. I'd like to see it move forward
> into a DPDK release if possible.
I'd like a check like (below), to avoid new additions:
diff --git a/devtools/checkpatches.sh b/devtools/checkpatches.sh
index 34a2e43845..8dae47165e 100755
--- a/devtools/checkpatches.sh
+++ b/devtools/checkpatches.sh
@@ -158,6 +158,14 @@ check_forbidden_additions() { #
-f $(dirname $(readlink -f $0))/check-forbidden-tokens.awk \
"$1" || res=1
+ # '// XXX is not set' must be preferred over '#undef XXX'
+ awk -v FOLDERS='config/rte_config.h' \
+ -v EXPRESSIONS='#undef' \
+ -v RET_ON_FAIL=1 \
+ -v MESSAGE='Using "#undef XXX", prefer "// XXX is not set"' \
+ -f $(dirname $(readlink -f $0))/check-forbidden-tokens.awk \
+ "$1" || res=1
+
return $res
}
Otherwise, the change lgtm.
--
David Marchand
Re: [PATCH] config: remove explicit undef of unset values
On Mon, Jun 13, 2022 at 02:26:14PM +0200, David Marchand wrote:
> On Mon, Jun 13, 2022 at 11:54 AM Bruce Richardson
> wrote:
> > On Thu, Dec 16, 2021 at 11:14:30AM +, Bruce Richardson wrote:
> > > Rather than explicitly clearing any setting of undefined values in our
> > > rte_config.h file, it's better to instead just add a comment that the
> > > value is not set. Using a comment allows the user to set the value using
> > > CFLAGS or similar mechanism without the config file clearing the value
> > > again.
> > >
> > > The text used " is not set" is modelled after the kernel approach
> > > of doing the same thing.
> > >
> > > Signed-off-by: Bruce Richardson
> > > ---
> > >
> > > Although DPDK coding convention forbids use of "//" for comments, using
> > > regular C comment style makes the config settings less clear, as they can
> > > be confused with regular comments in the file. Using "//" makes them stand
> > > out better, so I prefer it. However, if others feel strongly, they can be
> > > changed to standard.
> > >
> > > Note: this is a resubmission of patch [1] which was part of a rejected
> > > series. However, the reasons for rejection - values in config being out
> > > of sync with those used for building apps - are less relevant for
> > > many, if not all, of these setting, so I believe the benefits for
> > > testing outweigh the potential downsides. If any setting is likely
> > > problematic, I can keep the explicit undef for that case in a new patch
> > > version.
> > >
> > > [1]
> > > http://patches.dpdk.org/project/dpdk/patch/20200903144942.671870-2-bruce.richard...@intel.com/
> > > ---
> >
> > Ping for review or feedback for this patch. I'd like to see it move forward
> > into a DPDK release if possible.
>
> I'd like a check like (below), to avoid new additions:
>
> diff --git a/devtools/checkpatches.sh b/devtools/checkpatches.sh
> index 34a2e43845..8dae47165e 100755
> --- a/devtools/checkpatches.sh
> +++ b/devtools/checkpatches.sh
> @@ -158,6 +158,14 @@ check_forbidden_additions() { #
> -f $(dirname $(readlink -f $0))/check-forbidden-tokens.awk \
> "$1" || res=1
>
> + # '// XXX is not set' must be preferred over '#undef XXX'
> + awk -v FOLDERS='config/rte_config.h' \
> + -v EXPRESSIONS='#undef' \
> + -v RET_ON_FAIL=1 \
> + -v MESSAGE='Using "#undef XXX", prefer "// XXX is not set"' \
> + -f $(dirname $(readlink -f $0))/check-forbidden-tokens.awk \
> + "$1" || res=1
> +
> return $res
> }
>
> Otherwise, the change lgtm.
>
Good idea. Do you want me to add your check above as a patch to this to
make a two-patch set for v2?
/Bruce
Re: [PATCH] net/cnxk: fix crash in IPsec telemetry
On Thu, May 19, 2022 at 5:52 PM David Marchand
wrote:
>
> Calling this telemetry callback with no argument caused a crash.
>
> Fixes: 41cc645c214f ("net/cnxk: add inline IPsec telemetry for CN9K")
> Cc: sta...@dpdk.org
>
> Signed-off-by: David Marchand
Applied to dpdk-next-net-mrvl/for-next-net. Thanks
> ---
> drivers/net/cnxk/cnxk_ethdev_sec_telemetry.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/net/cnxk/cnxk_ethdev_sec_telemetry.c
> b/drivers/net/cnxk/cnxk_ethdev_sec_telemetry.c
> index dfad5af8fe..bfdbd1ee5d 100644
> --- a/drivers/net/cnxk/cnxk_ethdev_sec_telemetry.c
> +++ b/drivers/net/cnxk/cnxk_ethdev_sec_telemetry.c
> @@ -229,6 +229,9 @@ ethdev_sec_tel_handle_info(const char *cmd __rte_unused,
> const char *params,
> uint32_t i;
> int ret;
>
> + if (params == NULL || strlen(params) == 0 || !isdigit(*params))
> + return -EINVAL;
> +
> port_id = strtoul(params, &end_p, 0);
> if (errno != 0)
> return -EINVAL;
> --
> 2.36.1
>
Re: [PATCH 3/6] eal: add basic rte thread ID equal API
On Sat, Jun 11, 2022 at 01:25:56PM +0100, Konstantin Ananyev wrote:
>
> >>>Add rte_thread_equal() that tests if two rte_thread_id are equal.
> >>>
> >>>Signed-off-by: Narcisa Vasile
> >>>Signed-off-by: Tyler Retzlaff
> >>>---
> >>> lib/eal/common/rte_thread.c | 6 ++
> >>> lib/eal/include/rte_thread.h | 19 +++
> >>> lib/eal/version.map | 1 +
> >>> 3 files changed, 26 insertions(+)
> >>>
> >>>diff --git a/lib/eal/common/rte_thread.c b/lib/eal/common/rte_thread.c
> >>>index 10d6652..21ed042 100644
> >>>--- a/lib/eal/common/rte_thread.c
> >>>+++ b/lib/eal/common/rte_thread.c
> >>>@@ -6,6 +6,12 @@
> >>> #include
> >>> int
> >>>+rte_thread_equal(rte_thread_t t1, rte_thread_t t2)
> >>>+{
> >>>+ return t1.opaque_id == t2.opaque_id;
> >>
> >>for posix systems, why not:
> >>return pthread_equal(t1.opaque_id, t2.opaque_id);
> >
> >because it would require 2 implementations
>
> We already have plenty of such cases for rte_thread implementation.
> Why it became a problem here?
>
> when this works for both
> >windows and posix platforms. (less code to maintain, no functional
> >difference).
> >
>
> Well posix insists that the only safe way for applications to
> directly compare two pthread_t values is to call pthread_equal().
> So I'd suggest we do what is recommended.
agreed, will provide a v2 that uses pthread_equal().
Re: [EXT] Re: [PATCH] devtools: ensure proper tag sequence
13/06/2022 12:35, Jakub Palider: > > -Original Message- > > From: Thomas Monjalon > > Sent: Sunday, June 12, 2022 10:29 PM > > To: Jakub Palider > > Cc: dev@dpdk.org; david.march...@redhat.com > > Subject: [EXT] Re: [PATCH] devtools: ensure proper tag sequence > > > > External Email > > > > -- > > 12/06/2022 16:23, jpali...@marvell.com: > > > From: Jakub Palider > > > > > > This change to log checking procedure ensures that all > > > tags are in proper order. > > > The order of tags is as follows: > > > * Coverity issue > > > * Bugzilla ID > > > * Fixes > > > * Cc > > > * > > > * Suggested-by > > > * Reported-by > > > + Signed-off-by > > > * Acked-by > > > * Reviewed-by > > > * Tested-by > > > > For the *-by sequence, the order is more chronological. > > Ack/Review/Test can be in any order I think. > > > > > Hi Thomas, > Do I get it right that the lines after are fine in > current state and the patch could take care of the first section > only? I'm not sure myself. We can check at least that Suggested/Reported is before Signed-off.
Re: [PATCH] eal: fix segment fault when exit trace
On Tue, Jun 7, 2022 at 2:26 PM fengchengwen wrote: > Hi Bruce, > > Could you please test freebsd platform? I think it also have > the same problem, but I hasn't freebsd enviorment. I can reproduce a crash with FreeBSD 13. Moving rte_trace_save() and co earlier (as is done for Linux in this proposed patch) avoids the crash, so I can't tell the traces file is valid. dpdk@freebsd:~/dpdk $ git diff diff --git a/lib/eal/freebsd/eal.c b/lib/eal/freebsd/eal.c index a6b20960f2..26fbc91b26 100644 --- a/lib/eal/freebsd/eal.c +++ b/lib/eal/freebsd/eal.c @@ -893,11 +893,11 @@ rte_eal_cleanup(void) eal_get_internal_configuration(); rte_service_finalize(); rte_mp_channel_cleanup(); + rte_trace_save(); + eal_trace_fini(); /* after this point, any DPDK pointers will become dangling */ rte_eal_memory_detach(); rte_eal_alarm_cleanup(); - rte_trace_save(); - eal_trace_fini(); eal_cleanup_config(internal_conf); return 0; } -- David Marchand
Re: [PATCH] config: remove explicit undef of unset values
On Mon, Jun 13, 2022 at 2:37 PM Bruce Richardson
wrote:
> > I'd like a check like (below), to avoid new additions:
> >
> > diff --git a/devtools/checkpatches.sh b/devtools/checkpatches.sh
> > index 34a2e43845..8dae47165e 100755
> > --- a/devtools/checkpatches.sh
> > +++ b/devtools/checkpatches.sh
> > @@ -158,6 +158,14 @@ check_forbidden_additions() { #
> > -f $(dirname $(readlink -f $0))/check-forbidden-tokens.awk \
> > "$1" || res=1
> >
> > + # '// XXX is not set' must be preferred over '#undef XXX'
> > + awk -v FOLDERS='config/rte_config.h' \
> > + -v EXPRESSIONS='#undef' \
> > + -v RET_ON_FAIL=1 \
> > + -v MESSAGE='Using "#undef XXX", prefer "// XXX is not set"'
> > \
> > + -f $(dirname $(readlink -f $0))/check-forbidden-tokens.awk \
> > + "$1" || res=1
> > +
> > return $res
> > }
> >
> > Otherwise, the change lgtm.
> >
> Good idea. Do you want me to add your check above as a patch to this to
> make a two-patch set for v2?
If you are fine with the check, I don't mind it is part of this simple patch.
I can do it when applying if you are okay with it.
--
David Marchand
Re: [PATCH] config: remove explicit undef of unset values
On Mon, Jun 13, 2022 at 10:54:33AM +0100, Bruce Richardson wrote: > On Thu, Dec 16, 2021 at 11:14:30AM +, Bruce Richardson wrote: > > Rather than explicitly clearing any setting of undefined values in our > > rte_config.h file, it's better to instead just add a comment that the > > value is not set. Using a comment allows the user to set the value using > > CFLAGS or similar mechanism without the config file clearing the value > > again. > > > > The text used " is not set" is modelled after the kernel approach > > of doing the same thing. > > > > Signed-off-by: Bruce Richardson > > --- > > > > Although DPDK coding convention forbids use of "//" for comments, using > > regular C comment style makes the config settings less clear, as they can > > be confused with regular comments in the file. Using "//" makes them stand > > out better, so I prefer it. However, if others feel strongly, they can be > > changed to standard. > > > > Note: this is a resubmission of patch [1] which was part of a rejected > > series. However, the reasons for rejection - values in config being out > > of sync with those used for building apps - are less relevant for > > many, if not all, of these setting, so I believe the benefits for > > testing outweigh the potential downsides. If any setting is likely > > problematic, I can keep the explicit undef for that case in a new patch > > version. > > > > [1] > > http://patches.dpdk.org/project/dpdk/patch/20200903144942.671870-2-bruce.richard...@intel.com/ Acked-by: Tyler Retzlaff
Re: [PATCH] config: remove explicit undef of unset values
On Mon, Jun 13, 2022 at 04:20:04PM +0200, David Marchand wrote:
> On Mon, Jun 13, 2022 at 2:37 PM Bruce Richardson
> wrote:
> > > I'd like a check like (below), to avoid new additions:
> > >
> > > diff --git a/devtools/checkpatches.sh b/devtools/checkpatches.sh
> > > index 34a2e43845..8dae47165e 100755
> > > --- a/devtools/checkpatches.sh
> > > +++ b/devtools/checkpatches.sh
> > > @@ -158,6 +158,14 @@ check_forbidden_additions() { #
> > > -f $(dirname $(readlink -f
> > > $0))/check-forbidden-tokens.awk \
> > > "$1" || res=1
> > >
> > > + # '// XXX is not set' must be preferred over '#undef XXX'
> > > + awk -v FOLDERS='config/rte_config.h' \
> > > + -v EXPRESSIONS='#undef' \
> > > + -v RET_ON_FAIL=1 \
> > > + -v MESSAGE='Using "#undef XXX", prefer "// XXX is not
> > > set"' \
> > > + -f $(dirname $(readlink -f
> > > $0))/check-forbidden-tokens.awk \
> > > + "$1" || res=1
> > > +
> > > return $res
> > > }
> > >
> > > Otherwise, the change lgtm.
> > >
> > Good idea. Do you want me to add your check above as a patch to this to
> > make a two-patch set for v2?
>
> If you are fine with the check, I don't mind it is part of this simple patch.
> I can do it when applying if you are okay with it.
>
Yes, I'm fine with it, thanks.
Re: [PATCH v7] net/i40e: add outer VLAN processing
Thanks for the information on 8.4. Unfortunately most of NICs are from
Dell so will need to push them to produce another update package and would
prefer to wait till we know what is required to fix our issue.
I loaded 8.6 and 8.7 on one of our test hosts and our issue still exists so
will continue pushing the open case we have with Intel as that is where we
still think this lies.
Cheers,
Ben
On Sun, Jun 12, 2022 at 10:14 PM Liu, KevinX wrote:
> Hi, Ben
>
> This patch can only take effect after firmware v8.6. It cannot be used on
> firmware v8.4 and v8.5. The reason is that the firmware team gave a clear
> reply that there are many related bugs in firmware v8.4 and v8.5, and they
> were fixed in firmware v8.6. The firmware team recommends using v8.6.
>
>
>
> Regards
>
> Kevin
>
>
>
> *From:* Ben Magistro
> *Sent:* 2022年6月10日 22:27
> *To:* Liu, KevinX
> *Cc:* dev@dpdk.org; Zhang, Yuying ; Xing, Beilei <
> beilei.x...@intel.com>; Yang, SteveX ; Zhang,
> RobinX
> *Subject:* Re: [PATCH v7] net/i40e: add outer VLAN processing
>
>
>
> I'm trying to understand if this change is at all related to an issue we
> are experiencing with newer firmwares (
> https://mails.dpdk.org/archives/dev/2022-April/238621.html) that happened
> to start with 8.4 and affected qinq offload processing. I can say loading
> this patch and running testpmd does not seem to have any effect on the
> issue we are experiencing.
>
>
>
> Side note, there is also a minor typo in the comment block
> "i40e_vlan_tpie_set" vs "i40e_vlan_tpid_set".
>
>
>
> Thanks
>
>
>
> On Fri, Jun 10, 2022 at 4:30 AM Kevin Liu wrote:
>
> From: Robin Zhang
>
> Outer VLAN processing is supported after firmware v8.4, kernel driver
> also change the default behavior to support this feature. To align with
> kernel driver, add support for outer VLAN processing in DPDK.
>
> But it is forbidden for firmware to change the Inner/Outer VLAN
> configuration while there are MAC/VLAN filters in the switch table.
> Therefore, we need to clear the MAC table before setting config,
> and then restore the MAC table after setting.
>
> This will not impact on an old firmware.
>
> Signed-off-by: Robin Zhang
> Signed-off-by: Kevin Liu
> ---
> drivers/net/i40e/i40e_ethdev.c | 94 --
> drivers/net/i40e/i40e_ethdev.h | 3 ++
> 2 files changed, 92 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/i40e/i40e_ethdev.c
> b/drivers/net/i40e/i40e_ethdev.c
> index 755786dc10..4cae163cb9 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -2575,6 +2575,7 @@ i40e_dev_close(struct rte_eth_dev *dev)
> struct i40e_hw *hw =
> I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
> struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
> struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
> + struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
> struct i40e_filter_control_settings settings;
> struct rte_flow *p_flow;
> uint32_t reg;
> @@ -2587,6 +2588,18 @@ i40e_dev_close(struct rte_eth_dev *dev)
> if (rte_eal_process_type() != RTE_PROC_PRIMARY)
> return 0;
>
> + /*
> +* It is a workaround, if the double VLAN is disabled when
> +* the program exits, an abnormal error will occur on the
> +* NIC. Need to enable double VLAN when dev is closed.
> +*/
> + if (pf->fw8_3gt) {
> + if (!(rxmode->offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND)) {
> + rxmode->offloads |= RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;
> + i40e_vlan_offload_set(dev,
> RTE_ETH_VLAN_EXTEND_MASK);
> + }
> + }
> +
> ret = rte_eth_switch_domain_free(pf->switch_domain_id);
> if (ret)
> PMD_INIT_LOG(WARNING, "failed to free switch domain: %d",
> ret);
> @@ -3909,6 +3922,7 @@ i40e_vlan_tpid_set(struct rte_eth_dev *dev,
> struct i40e_pf *pf =
> I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
> int qinq = dev->data->dev_conf.rxmode.offloads &
>RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;
> + u16 sw_flags = 0, valid_flags = 0;
> int ret = 0;
>
> if ((vlan_type != RTE_ETH_VLAN_TYPE_INNER &&
> @@ -3927,15 +3941,32 @@ i40e_vlan_tpid_set(struct rte_eth_dev *dev,
> /* 802.1ad frames ability is added in NVM API 1.7*/
> if (hw->flags & I40E_HW_FLAG_802_1AD_CAPABLE) {
> if (qinq) {
> + if (pf->fw8_3gt) {
> + sw_flags =
> I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN;
> + valid_flags =
> I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN;
> + }
> if (vlan_type == RTE_ETH_VLAN_TYPE_OUTER)
> hw->first_tag = rte_cpu_to_le_16(tpid);
> else if (vlan_type == RTE_ETH_VLAN_TYPE_INNER)
> hw-
[PATCH] net/af_xdp: allow using copy mode in XSK
DPDK assumes that users only want AF_XDP socket (XSK) into zero copy
mode when the kernel supports it. However, sometimes kernel driver
doesn't support it well and copy mode is more stable and preferred.
This patch allows using devarg "-a xx:xx.x,no_zerocopy=1" to force
the AF_XDP socket into copy mode.
Signed-off-by: Xiaoyun Li
---
doc/guides/nics/af_xdp.rst | 2 ++
drivers/net/af_xdp/rte_eth_af_xdp.c | 25 -
2 files changed, 22 insertions(+), 5 deletions(-)
diff --git a/doc/guides/nics/af_xdp.rst b/doc/guides/nics/af_xdp.rst
index 56681c8365..5bcdf55d05 100644
--- a/doc/guides/nics/af_xdp.rst
+++ b/doc/guides/nics/af_xdp.rst
@@ -36,6 +36,8 @@ The following options can be provided to set up an af_xdp
port in DPDK.
default 0);
* ``xdp_prog`` - path to custom xdp program (optional, default none);
* ``busy_budget`` - busy polling budget (optional, default 64);
+* ``no_zerocopy`` - PMD will force AF_XDP socket into copy mode (optional,
+default 0);
Prerequisites
-
diff --git a/drivers/net/af_xdp/rte_eth_af_xdp.c
b/drivers/net/af_xdp/rte_eth_af_xdp.c
index 1e37da6e84..61d7eabc14 100644
--- a/drivers/net/af_xdp/rte_eth_af_xdp.c
+++ b/drivers/net/af_xdp/rte_eth_af_xdp.c
@@ -150,6 +150,7 @@ struct pmd_internals {
bool shared_umem;
char prog_path[PATH_MAX];
bool custom_prog_configured;
+ bool no_zerocopy;
struct bpf_map *map;
struct rte_ether_addr eth_addr;
@@ -168,6 +169,7 @@ struct pmd_process_private {
#define ETH_AF_XDP_SHARED_UMEM_ARG "shared_umem"
#define ETH_AF_XDP_PROG_ARG"xdp_prog"
#define ETH_AF_XDP_BUDGET_ARG "busy_budget"
+#define ETH_AF_XDP_NO_ZEROCOPY_ARG "no_zerocopy"
static const char * const valid_arguments[] = {
ETH_AF_XDP_IFACE_ARG,
@@ -176,6 +178,7 @@ static const char * const valid_arguments[] = {
ETH_AF_XDP_SHARED_UMEM_ARG,
ETH_AF_XDP_PROG_ARG,
ETH_AF_XDP_BUDGET_ARG,
+ ETH_AF_XDP_NO_ZEROCOPY_ARG,
NULL
};
@@ -1308,6 +1311,10 @@ xsk_configure(struct pmd_internals *internals, struct
pkt_rx_queue *rxq,
cfg.xdp_flags = XDP_FLAGS_UPDATE_IF_NOEXIST;
cfg.bind_flags = 0;
+ /* Force AF_XDP socket into copy mode when users want no zerocopy mode
*/
+ if (internals->no_zerocopy)
+ cfg.bind_flags |= XDP_COPY;
+
#if defined(XDP_USE_NEED_WAKEUP)
cfg.bind_flags |= XDP_USE_NEED_WAKEUP;
#endif
@@ -1655,7 +1662,7 @@ xdp_get_channels_info(const char *if_name, int
*max_queues,
static int
parse_parameters(struct rte_kvargs *kvlist, char *if_name, int *start_queue,
int *queue_cnt, int *shared_umem, char *prog_path,
- int *busy_budget)
+ int *busy_budget, int *no_zerocopy)
{
int ret;
@@ -1691,6 +1698,11 @@ parse_parameters(struct rte_kvargs *kvlist, char
*if_name, int *start_queue,
if (ret < 0)
goto free_kvlist;
+ ret = rte_kvargs_process(kvlist, ETH_AF_XDP_NO_ZEROCOPY_ARG,
+ &parse_integer_arg, no_zerocopy);
+ if (ret < 0)
+ goto free_kvlist;
+
free_kvlist:
rte_kvargs_free(kvlist);
return ret;
@@ -1729,7 +1741,7 @@ get_iface_info(const char *if_name,
static struct rte_eth_dev *
init_internals(struct rte_vdev_device *dev, const char *if_name,
int start_queue_idx, int queue_cnt, int shared_umem,
- const char *prog_path, int busy_budget)
+ const char *prog_path, int busy_budget, int no_zerocopy)
{
const char *name = rte_vdev_device_name(dev);
const unsigned int numa_node = dev->device.numa_node;
@@ -1757,6 +1769,7 @@ init_internals(struct rte_vdev_device *dev, const char
*if_name,
}
#endif
internals->shared_umem = shared_umem;
+ internals->no_zerocopy = no_zerocopy;
if (xdp_get_channels_info(if_name, &internals->max_queue_cnt,
&internals->combined_queue_cnt)) {
@@ -1941,6 +1954,7 @@ rte_pmd_af_xdp_probe(struct rte_vdev_device *dev)
int shared_umem = 0;
char prog_path[PATH_MAX] = {'\0'};
int busy_budget = -1, ret;
+ int no_zerocopy = 0;
struct rte_eth_dev *eth_dev = NULL;
const char *name = rte_vdev_device_name(dev);
@@ -1986,7 +2000,7 @@ rte_pmd_af_xdp_probe(struct rte_vdev_device *dev)
if (parse_parameters(kvlist, if_name, &xsk_start_queue_idx,
&xsk_queue_cnt, &shared_umem, prog_path,
-&busy_budget) < 0) {
+&busy_budget, &no_zerocopy) < 0) {
AF_XDP_LOG(ERR, "Invalid kvargs value\n");
return -EINVAL;
}
@@ -2001,7 +2015,7 @@ rte_pmd_af_xdp_probe(struct rte_vdev_device *dev)
eth_dev = init_internals(dev, if_name, xsk_start_queue_idx,
[PATCH 2/2] lib/power:fix comparision to bool warning
From: newsky647 <835703...@qq.com>
expr "if ([expr] == true)" can be simplified to "if ([expr])".
Therefore, simplify it, no functional change.
Fixes: 450f0791312 ("lib/power: power: add traffic pattern aware power control"
Signed-off-by: newsky647 <835703...@qq.com>
---
lib/power/rte_power_empty_poll.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/lib/power/rte_power_empty_poll.c b/lib/power/rte_power_empty_poll.c
index 4a4db51247..c58f4155d9 100644
--- a/lib/power/rte_power_empty_poll.c
+++ b/lib/power/rte_power_empty_poll.c
@@ -326,9 +326,9 @@ empty_poll_training(struct priority_worker *poll_stats,
max_train_iter);
- if (poll_stats->thresh[LOW].trained == true
- && poll_stats->thresh[MED].trained == true
- && poll_stats->thresh[HGH].trained == true) {
+ if (poll_stats->thresh[LOW].trained
+ && poll_stats->thresh[MED].trained
+ && poll_stats->thresh[HGH].trained ) {
set_state(poll_stats, MED_NORMAL);
--
2.35.1.windows.2
Re: [PATCH v7] eal: add bus cleanup to eal cleanup
On Tue, Jun 07, 2022 at 05:12:02PM +0200, David Marchand wrote: > On Tue, Jun 7, 2022 at 1:09 PM Thomas Monjalon wrote: > > > > 03/06/2022 16:36, Kevin Laatz: > > > During EAL init, all buses are probed and the devices found are > > > initialized. On eal_cleanup(), the inverse does not happen, meaning any > > > allocated memory and other configuration will not be cleaned up > > > appropriately on exit. > > [...] > > > --- a/devtools/libabigail.abignore > > > +++ b/devtools/libabigail.abignore > > > @@ -56,3 +56,12 @@ > > > ; Ignore libabigail false-positive in clang builds, after moving code. > > > [suppress_function] > > > name = rte_eal_remote_launch > > > + > > > +; Ignore field inserted to rte_bus, adding cleanup function > > > +[suppress_type] > > > +name = rte_bus > > > +has_data_member_inserted_at = end > > > + > > > +; Ignore changes to internally used structs containing rte_bus > > > +[suppress_type] > > > +name = rte_pci_bus, rte_vmbus_bus, rte_vdev_bus > > (This change is strange as there is no rte_vdev_bus type, but I won't > investigate the relevance of this rule for now). > > > > > I'm not sure we can safely consider these structs as internal. > > The right process is to send a deprecation notice, > > and then remove them from the public API. > > Same for me, I don't think we can safely ignore. > > A rte_bus struct is embedded in rte_pci_bus (resp. rte_vmbus_bus). > If we make it grow, any inlined access (like walk in device_list or > driver_list) after the rte_bus object is broken for code accessing it > out of DPDK. > Such code might exist out there, since we expose > FOREACH_DEVICE_ON_PCIBUS, for example. > > > > > > For info, Li has sent a patch for the bus cleanup > > which is not updating the bus code: > > https://patches.dpdk.org/project/dpdk/patch/20220606114650.209612-3-l...@nvidia.com/ > > It may be a temporary solution before the deprecation. > > On the principle, that's probably the best, there is no question about > unclear frontier of the ABI. > (In practice though, the mentionned patch is triggering segfaults in > two CI, for pdump). > > Hiding rte_bus object should be straightforward in v22.11, I had some > patches, but never finished the work. > > It would be great too, to look into rte_driver and rte_device which > are exposed important types, but that's another story. > Agreed, we need to look into all this for 22.11 release, let's defer this patch until we get proper deprecation process. Temporary patch looks fine as a fix too. /Bruce
[dpdk-dev v3 0/4] crypto/openssl: EVP api update for 3.0 lib
This patch set update openssl pmd deprecated APIs to EVP APIs where supported in openssl 3.0 lib --- v3: - rebase to 22.07 rc1 v2: - addin DSA routine Kai Ji (4): crypto/openssl: 3.0 EVP update on HMAC routine crypto/openssl: 3.0 EVP update on RSA routine crypto/openssl: 3.0 EVP update on DH routine crypto/openssl: 3.0 EVP update on DSA routine app/test/test_cryptodev_asym.c | 90 ++- drivers/crypto/openssl/compat.h | 12 + drivers/crypto/openssl/openssl_pmd_private.h | 18 + drivers/crypto/openssl/rte_openssl_pmd.c | 698 ++- drivers/crypto/openssl/rte_openssl_pmd_ops.c | 231 +- 5 files changed, 1013 insertions(+), 36 deletions(-) -- 2.17.1
[dpdk-dev v3 1/4] crypto/openssl: 3.0 EVP update on HMAC routine
This patch update the symmetric HMAC routine in crypto openssl
pmd to adopt openssl 3.0 EVP apis.
Signed-off-by: Kai Ji
---
drivers/crypto/openssl/openssl_pmd_private.h | 4 +
drivers/crypto/openssl/rte_openssl_pmd.c | 187 ++-
2 files changed, 181 insertions(+), 10 deletions(-)
diff --git a/drivers/crypto/openssl/openssl_pmd_private.h
b/drivers/crypto/openssl/openssl_pmd_private.h
index b2054b3754..86dc169aaf 100644
--- a/drivers/crypto/openssl/openssl_pmd_private.h
+++ b/drivers/crypto/openssl/openssl_pmd_private.h
@@ -134,8 +134,12 @@ struct openssl_session {
/**< pointer to EVP key */
const EVP_MD *evp_algo;
/**< pointer to EVP algorithm function */
+# if OPENSSL_VERSION_NUMBER >= 0x3000L
+ EVP_MAC_CTX * ctx;
+# else
HMAC_CTX *ctx;
/**< pointer to EVP context structure */
+# endif
} hmac;
};
diff --git a/drivers/crypto/openssl/rte_openssl_pmd.c
b/drivers/crypto/openssl/rte_openssl_pmd.c
index 6ac2dfff5a..febfcb5a22 100644
--- a/drivers/crypto/openssl/rte_openssl_pmd.c
+++ b/drivers/crypto/openssl/rte_openssl_pmd.c
@@ -41,6 +41,61 @@ static void HMAC_CTX_free(HMAC_CTX *ctx)
}
#endif
+#if (OPENSSL_VERSION_NUMBER >= 0x3000L)
+
+#include
+#include
+
+#define MAX_OSSL_ALGO_NAME_SIZE16
+
+OSSL_PROVIDER *legacy;
+OSSL_PROVIDER *deflt;
+
+static void ossl_load_legacy_provider(void)
+{
+ /* Load Multiple providers into the default (NULL) library context */
+ legacy = OSSL_PROVIDER_load(NULL, "legacy");
+ if (legacy == NULL) {
+ OPENSSL_LOG(ERR, "Failed to load Legacy provider\n");
+ return;
+ }
+
+ deflt = OSSL_PROVIDER_load(NULL, "default");
+ if (deflt == NULL) {
+ OPENSSL_LOG(ERR, "Failed to load Default provider\n");
+ OSSL_PROVIDER_unload(legacy);
+ return;
+ }
+}
+
+static void ossl_unload_legacy_provider(void)
+{
+ OSSL_PROVIDER_unload(legacy);
+ OSSL_PROVIDER_unload(deflt);
+}
+
+static __rte_always_inline const char *
+get_digest_name(const struct rte_crypto_sym_xform *xform)
+{
+ switch (xform->auth.algo) {
+ case RTE_CRYPTO_AUTH_MD5_HMAC:
+ return OSSL_DIGEST_NAME_MD5;
+ case RTE_CRYPTO_AUTH_SHA1_HMAC:
+ return OSSL_DIGEST_NAME_SHA1;
+ case RTE_CRYPTO_AUTH_SHA224_HMAC:
+ return OSSL_DIGEST_NAME_SHA2_224;
+ case RTE_CRYPTO_AUTH_SHA256_HMAC:
+ return OSSL_DIGEST_NAME_SHA2_256;
+ case RTE_CRYPTO_AUTH_SHA384_HMAC:
+ return OSSL_DIGEST_NAME_SHA2_384;
+ case RTE_CRYPTO_AUTH_SHA512_HMAC:
+ return OSSL_DIGEST_NAME_SHA2_512;
+ default:
+ return NULL;
+ }
+}
+#endif
+
static int cryptodev_openssl_remove(struct rte_vdev_device *vdev);
/**/
@@ -582,6 +637,40 @@ openssl_set_session_auth_parameters(struct openssl_session
*sess,
sess->auth.auth.ctx = EVP_MD_CTX_create();
break;
+# if (OPENSSL_VERSION_NUMBER >= 0x3000L)
+ case RTE_CRYPTO_AUTH_MD5_HMAC:
+ case RTE_CRYPTO_AUTH_SHA1_HMAC:
+ case RTE_CRYPTO_AUTH_SHA224_HMAC:
+ case RTE_CRYPTO_AUTH_SHA256_HMAC:
+ case RTE_CRYPTO_AUTH_SHA384_HMAC:
+ case RTE_CRYPTO_AUTH_SHA512_HMAC:
+ sess->auth.mode = OPENSSL_AUTH_AS_HMAC;
+
+ OSSL_PARAM params[2];
+ const char *algo;
+ algo = get_digest_name(xform);
+ if (!algo)
+ return -EINVAL;
+ char algo_name[MAX_OSSL_ALGO_NAME_SIZE];
+ memcpy(algo_name, algo, (sizeof(algo)+1));
+
+ EVP_MAC *mac = EVP_MAC_fetch(NULL, "HMAC", NULL);
+ sess->auth.hmac.ctx = EVP_MAC_CTX_new(mac);
+ EVP_MAC_free(mac);
+ if (get_auth_algo(xform->auth.algo,
+ &sess->auth.hmac.evp_algo) != 0)
+ return -EINVAL;
+
+ params[0] = OSSL_PARAM_construct_utf8_string("digest",
+ algo_name, 0);
+ params[1] = OSSL_PARAM_construct_end();
+ if (EVP_MAC_init(sess->auth.hmac.ctx,
+ xform->auth.key.data,
+ xform->auth.key.length,
+ params) != 1)
+ return -EINVAL;
+ break;
+# else
case RTE_CRYPTO_AUTH_MD5_HMAC:
case RTE_CRYPTO_AUTH_SHA1_HMAC:
case RTE_CRYPTO_AUTH_SHA224_HMAC:
@@ -600,7 +689,7 @@ openssl_set_session_auth_parameters(struct openssl_session
*sess,
sess->auth.hmac.evp_alg
[dpdk-dev v3 3/4] crypto/openssl: 3.0 EVP update on DH routine
This patch updates asymmetric DH routine in crypto openssl pmd
to adopt openssl 3.0 EVP apis.
Signed-off-by: Kai Ji
---
drivers/crypto/openssl/openssl_pmd_private.h | 4 +
drivers/crypto/openssl/rte_openssl_pmd.c | 185 +++
drivers/crypto/openssl/rte_openssl_pmd_ops.c | 47 -
3 files changed, 235 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/openssl/openssl_pmd_private.h
b/drivers/crypto/openssl/openssl_pmd_private.h
index d603626fdf..8fdbc75511 100644
--- a/drivers/crypto/openssl/openssl_pmd_private.h
+++ b/drivers/crypto/openssl/openssl_pmd_private.h
@@ -177,6 +177,10 @@ struct openssl_asym_session {
struct dh {
DH *dh_key;
uint32_t key_op;
+#if (OPENSSL_VERSION_NUMBER >= 0x3000L)
+ OSSL_PARAM_BLD * param_bld;
+ OSSL_PARAM_BLD *param_bld_peer;
+#endif
} dh;
struct {
DSA *dsa;
diff --git a/drivers/crypto/openssl/rte_openssl_pmd.c
b/drivers/crypto/openssl/rte_openssl_pmd.c
index 6c3fef6356..fdf191b7ea 100644
--- a/drivers/crypto/openssl/rte_openssl_pmd.c
+++ b/drivers/crypto/openssl/rte_openssl_pmd.c
@@ -45,6 +45,7 @@ static void HMAC_CTX_free(HMAC_CTX *ctx)
#include
#include
+#include
#define MAX_OSSL_ALGO_NAME_SIZE16
@@ -1846,6 +1847,185 @@ process_openssl_dsa_verify_op(struct rte_crypto_op *cop,
}
/* process dh operation */
+#if (OPENSSL_VERSION_NUMBER >= 0x3000L)
+static int
+process_openssl_dh_op_evp(struct rte_crypto_op *cop,
+ struct openssl_asym_session *sess)
+{
+ struct rte_crypto_dh_op_param *op = &cop->asym->dh;
+ OSSL_PARAM_BLD *param_bld = sess->u.dh.param_bld;
+ OSSL_PARAM_BLD *param_bld_peer = sess->u.dh.param_bld_peer;
+ OSSL_PARAM *params = NULL;
+ EVP_PKEY *dhpkey = NULL;
+ EVP_PKEY *peerkey = NULL;
+ BIGNUM *priv_key = NULL;
+ BIGNUM *pub_key = NULL;
+ int ret = -1;
+
+ cop->status = RTE_CRYPTO_OP_STATUS_NOT_PROCESSED;
+ EVP_PKEY_CTX *dh_ctx = EVP_PKEY_CTX_new_id(EVP_PKEY_DH, NULL);
+ if (dh_ctx == NULL || param_bld == NULL)
+ return ret;
+
+ if (op->ke_type == RTE_CRYPTO_ASYM_KE_SHARED_SECRET_COMPUTE) {
+ OSSL_PARAM *params_peer = NULL;
+
+ if (!param_bld_peer)
+ return ret;
+
+ pub_key = BN_bin2bn(op->pub_key.data, op->pub_key.length,
+ pub_key);
+ if (pub_key == NULL) {
+ OSSL_PARAM_BLD_free(param_bld_peer);
+ return ret;
+ }
+
+ if (!OSSL_PARAM_BLD_push_BN(param_bld_peer,
OSSL_PKEY_PARAM_PUB_KEY,
+ pub_key)) {
+ OPENSSL_LOG(ERR, "Failed to set public key\n");
+ OSSL_PARAM_BLD_free(param_bld_peer);
+ BN_free(pub_key);
+ return ret;
+ }
+
+ params_peer = OSSL_PARAM_BLD_to_param(param_bld_peer);
+ if (!params_peer) {
+ OSSL_PARAM_BLD_free(param_bld_peer);
+ BN_free(pub_key);
+ return ret;
+ }
+
+ EVP_PKEY_CTX *peer_ctx = EVP_PKEY_CTX_new_id(EVP_PKEY_DH, NULL);
+ if (EVP_PKEY_keygen_init(peer_ctx) != 1) {
+ OSSL_PARAM_free(params_peer);
+ BN_free(pub_key);
+ return ret;
+ }
+
+ if (EVP_PKEY_CTX_set_params(peer_ctx, params_peer) != 1) {
+ EVP_PKEY_CTX_free(peer_ctx);
+ OSSL_PARAM_free(params_peer);
+ BN_free(pub_key);
+ return ret;
+ }
+
+ if (EVP_PKEY_keygen(peer_ctx, &peerkey) != 1) {
+ EVP_PKEY_CTX_free(peer_ctx);
+ OSSL_PARAM_free(params_peer);
+ BN_free(pub_key);
+ return ret;
+ }
+
+ priv_key = BN_bin2bn(op->priv_key.data, op->priv_key.length,
+ priv_key);
+ if (priv_key == NULL) {
+ EVP_PKEY_CTX_free(peer_ctx);
+ OSSL_PARAM_free(params_peer);
+ BN_free(pub_key);
+ return ret;
+ }
+
+ if (!OSSL_PARAM_BLD_push_BN(param_bld, OSSL_PKEY_PARAM_PRIV_KEY,
+ priv_key)) {
+ OPENSSL_LOG(ERR, "Failed to set private key\n");
+ EVP_PKEY_CTX_free(peer_ctx);
+ OSSL_PARAM_free(params_peer);
+ BN_free(pub_key);
+ BN_free(priv_key);
+ return ret;
+
[dpdk-dev v3 2/4] crypto/openssl: 3.0 EVP update on RSA routine
This patch updates asymmetric RSA routine in crypto openssl pmd
to adopt openssl 3.0 EVP apis.
Signed-off-by: Kai Ji
---
drivers/crypto/openssl/openssl_pmd_private.h | 7 +
drivers/crypto/openssl/rte_openssl_pmd.c | 149 +++
drivers/crypto/openssl/rte_openssl_pmd_ops.c | 112 +-
3 files changed, 267 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/openssl/openssl_pmd_private.h
b/drivers/crypto/openssl/openssl_pmd_private.h
index 86dc169aaf..d603626fdf 100644
--- a/drivers/crypto/openssl/openssl_pmd_private.h
+++ b/drivers/crypto/openssl/openssl_pmd_private.h
@@ -11,6 +11,10 @@
#include
#include
#include
+#if (OPENSSL_VERSION_NUMBER >= 0x3000L)
+#include
+#include
+#endif
#define CRYPTODEV_NAME_OPENSSL_PMD crypto_openssl
/**< Open SSL Crypto PMD device name */
@@ -157,6 +161,9 @@ struct openssl_asym_session {
union {
struct rsa {
RSA *rsa;
+#if (OPENSSL_VERSION_NUMBER >= 0x3000L)
+ EVP_PKEY_CTX * ctx;
+#endif
} r;
struct exp {
BIGNUM *exp;
diff --git a/drivers/crypto/openssl/rte_openssl_pmd.c
b/drivers/crypto/openssl/rte_openssl_pmd.c
index febfcb5a22..6c3fef6356 100644
--- a/drivers/crypto/openssl/rte_openssl_pmd.c
+++ b/drivers/crypto/openssl/rte_openssl_pmd.c
@@ -2046,6 +2046,150 @@ process_openssl_modexp_op(struct rte_crypto_op *cop,
}
/* process rsa operations */
+#if (OPENSSL_VERSION_NUMBER >= 0x3000L)
+static int
+process_openssl_rsa_op_evp(struct rte_crypto_op *cop,
+ struct openssl_asym_session *sess)
+{
+ struct rte_crypto_asym_op *op = cop->asym;
+ uint32_t pad = (op->rsa.padding.type);
+ uint8_t *tmp;
+ size_t outlen = 0;
+ int ret = -1;
+
+ cop->status = RTE_CRYPTO_OP_STATUS_ERROR;
+ EVP_PKEY_CTX *rsa_ctx = sess->u.r.ctx;
+ if (!rsa_ctx)
+ return ret;
+
+ switch (pad) {
+ case RTE_CRYPTO_RSA_PADDING_PKCS1_5:
+ pad = RSA_PKCS1_PADDING;
+ break;
+ case RTE_CRYPTO_RSA_PADDING_NONE:
+ pad = RSA_NO_PADDING;
+ break;
+ default:
+ cop->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;
+ OPENSSL_LOG(ERR,
+ "rsa pad type not supported %d\n", pad);
+ return ret;
+ }
+
+ switch (op->rsa.op_type) {
+ case RTE_CRYPTO_ASYM_OP_ENCRYPT:
+ if (EVP_PKEY_encrypt_init(rsa_ctx) != 1)
+ goto err_rsa;
+
+ if (EVP_PKEY_CTX_set_rsa_padding(rsa_ctx, pad) <= 0)
+ goto err_rsa;
+
+ if (EVP_PKEY_encrypt(rsa_ctx, NULL, &outlen,
+ op->rsa.message.data,
+ op->rsa.message.length)
<= 0)
+ goto err_rsa;
+
+ if (outlen <= 0)
+ goto err_rsa;
+
+ if (EVP_PKEY_encrypt(rsa_ctx, op->rsa.cipher.data, &outlen,
+ op->rsa.message.data,
+ op->rsa.message.length)
<= 0)
+ goto err_rsa;
+ op->rsa.cipher.length = outlen;
+
+ OPENSSL_LOG(DEBUG,
+ "length of encrypted text %zu\n", outlen);
+ break;
+
+ case RTE_CRYPTO_ASYM_OP_DECRYPT:
+ if (EVP_PKEY_decrypt_init(rsa_ctx) != 1)
+ goto err_rsa;
+
+ if (EVP_PKEY_CTX_set_rsa_padding(rsa_ctx, pad) <= 0)
+ goto err_rsa;
+
+ if (EVP_PKEY_decrypt(rsa_ctx, NULL, &outlen,
+ op->rsa.cipher.data,
+ op->rsa.cipher.length)
<= 0)
+ goto err_rsa;
+
+ if (outlen <= 0)
+ goto err_rsa;
+
+ if (EVP_PKEY_decrypt(rsa_ctx, op->rsa.message.data, &outlen,
+ op->rsa.cipher.data,
+ op->rsa.cipher.length)
<= 0)
+ goto err_rsa;
+ op->rsa.message.length = outlen;
+
+ OPENSSL_LOG(DEBUG, "length of decrypted text %zu\n", outlen);
+ break;
+
+ case RTE_CRYPTO_ASYM_OP_SIGN:
+ if (EVP_PKEY_sign_init(rsa_ctx) <= 0)
+ goto err_rsa;
+
+ if (EVP_PKEY_CTX_set_rsa_padding(rsa_ctx, pad) <= 0)
+ goto err_rsa;
+
+ if (EVP_PKEY_sign(rsa_ctx, op->rsa.sign.data, &outlen,
+ op->rsa.message.data,
+ op->rsa.messa
[dpdk-dev v3 4/4] crypto/openssl: 3.0 EVP update on DSA routine
This patch updates asymmetric DSA routine in crypto openssl pmd
to adopt openssl 3.0 EVP apis. Divide the single combined dsa sign
test to two indiviual dsa sign and dsa verfiy tests.
Signed-off-by: Kai Ji
---
app/test/test_cryptodev_asym.c | 90 --
drivers/crypto/openssl/compat.h | 12 ++
drivers/crypto/openssl/openssl_pmd_private.h | 3 +
drivers/crypto/openssl/rte_openssl_pmd.c | 177 ++-
drivers/crypto/openssl/rte_openssl_pmd_ops.c | 72 +++-
5 files changed, 330 insertions(+), 24 deletions(-)
diff --git a/app/test/test_cryptodev_asym.c b/app/test/test_cryptodev_asym.c
index 7bd7cde16e..c9c48d1e87 100644
--- a/app/test/test_cryptodev_asym.c
+++ b/app/test/test_cryptodev_asym.c
@@ -1642,7 +1642,7 @@ test_dh_keygenration(void)
}
static int
-test_dsa_sign(void)
+test_dsa_sign(struct rte_crypto_dsa_op_param *dsa_op)
{
struct crypto_testsuite_params_asym *ts_params = &testsuite_params;
struct rte_mempool *op_mpool = ts_params->op_mpool;
@@ -1652,9 +1652,6 @@ test_dsa_sign(void)
struct rte_crypto_op *op = NULL, *result_op = NULL;
void *sess = NULL;
int status = TEST_SUCCESS;
- uint8_t r[TEST_DH_MOD_LEN];
- uint8_t s[TEST_DH_MOD_LEN];
- uint8_t dgst[] = "35d81554afaad2cf18f3a1770d5fedc4ea5be344";
int ret;
ret = rte_cryptodev_asym_session_create(dev_id, &dsa_xform, sess_mpool,
&sess);
@@ -1676,6 +1673,7 @@ test_dsa_sign(void)
goto error_exit;
}
asym_op = op->asym;
+ asym_op->dsa = *dsa_op;
debug_hexdump(stdout, "p: ", dsa_xform.dsa.p.data,
dsa_xform.dsa.p.length);
@@ -1689,13 +1687,6 @@ test_dsa_sign(void)
/* attach asymmetric crypto session to crypto operations */
rte_crypto_op_attach_asym_session(op, sess);
asym_op->dsa.op_type = RTE_CRYPTO_ASYM_OP_SIGN;
- asym_op->dsa.message.data = dgst;
- asym_op->dsa.message.length = sizeof(dgst);
- asym_op->dsa.r.length = sizeof(r);
- asym_op->dsa.r.data = r;
- asym_op->dsa.s.length = sizeof(s);
- asym_op->dsa.s.data = s;
-
RTE_LOG(DEBUG, USER1, "Process ASYM operation");
/* Process crypto operation */
@@ -1719,12 +1710,71 @@ test_dsa_sign(void)
}
asym_op = result_op->asym;
+ dsa_op->r.length = asym_op->dsa.r.length;
+ dsa_op->s.length = asym_op->dsa.s.length;
debug_hexdump(stdout, "r:",
asym_op->dsa.r.data, asym_op->dsa.r.length);
debug_hexdump(stdout, "s:",
asym_op->dsa.s.data, asym_op->dsa.s.length);
+error_exit:
+ if (sess != NULL)
+ rte_cryptodev_asym_session_free(dev_id, sess);
+ if (op != NULL)
+ rte_crypto_op_free(op);
+ return status;
+}
+
+static int
+test_dsa_verify(struct rte_crypto_dsa_op_param *dsa_op)
+{
+ struct crypto_testsuite_params_asym *ts_params = &testsuite_params;
+ struct rte_mempool *op_mpool = ts_params->op_mpool;
+ struct rte_mempool *sess_mpool = ts_params->session_mpool;
+ uint8_t dev_id = ts_params->valid_devs[0];
+ struct rte_crypto_asym_op *asym_op = NULL;
+ struct rte_crypto_op *op = NULL, *result_op = NULL;
+ void *sess = NULL;
+ int status = TEST_SUCCESS;
+ int ret;
+ ret = rte_cryptodev_asym_session_create(dev_id, &dsa_xform, sess_mpool,
&sess);
+ if (ret < 0) {
+ RTE_LOG(ERR, USER1,
+"line %u FAILED: %s", __LINE__,
+ "Session creation failed");
+ status = (ret == -ENOTSUP) ? TEST_SKIPPED : TEST_FAILED;
+ goto error_exit;
+ }
+ /* set up crypto op data structure */
+ op = rte_crypto_op_alloc(op_mpool, RTE_CRYPTO_OP_TYPE_ASYMMETRIC);
+ if (!op) {
+ RTE_LOG(ERR, USER1,
+ "line %u FAILED: %s",
+ __LINE__, "Failed to allocate asymmetric crypto "
+ "operation struct");
+ status = TEST_FAILED;
+ goto error_exit;
+ }
+ asym_op = op->asym;
+ asym_op->dsa = *dsa_op;
+
+ debug_hexdump(stdout, "p: ", dsa_xform.dsa.p.data,
+ dsa_xform.dsa.p.length);
+ debug_hexdump(stdout, "q: ", dsa_xform.dsa.q.data,
+ dsa_xform.dsa.q.length);
+ debug_hexdump(stdout, "g: ", dsa_xform.dsa.g.data,
+ dsa_xform.dsa.g.length);
+
+ /* attach asymmetric crypto session to crypto operations */
+ rte_crypto_op_attach_asym_session(op, sess);
+
+ debug_hexdump(stdout, "r:",
+ asym_op->dsa.r.data, asym_op->dsa.r.length);
+ debug_hexdump(stdout, "s:",
+ asym_op->dsa.s.data, asym_op->dsa.s.length);
+
+ RTE_LOG(DEBUG, USER1, "Process ASYM verify operation");
/* Te
[dpdk-dev v7] crypto/qat: use intel-ipsec-mb for partial hash & aes
Since openssl 3.0 now deprecates the low level API QAT required to
perform partial hash & aes operation when creating the session. This
patch add in qat_ipsec_mb_lib driver parameter to allow QAT PMD to
switch APIs between openssl and intel ipsec-mb library.
Signed-off-by: Kai Ji
Signed-off-by: Fan Zhang
---
v7:
- rebase to 22.07 rc1
v6:
- code review comments resolution
v5:
- fix of Intel IPSEC-MB lib version check
v4:
- fix of memory leak in IMB_MGR
v3:
- Add in qat_ipsec_mb_lib driver parameter
v2:
- Add AES ECB job function for precompute
---
doc/guides/cryptodevs/qat.rst| 13 +
drivers/common/qat/meson.build | 13 +
drivers/common/qat/qat_device.c | 1 +
drivers/common/qat/qat_device.h | 1 +
drivers/crypto/qat/qat_sym.c | 5 +-
drivers/crypto/qat/qat_sym_session.c | 468 ---
6 files changed, 456 insertions(+), 45 deletions(-)
diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index 18ad1646a4..613603eed1 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -288,6 +288,19 @@ by comma. When the same parameter is used more than once
first occurrence of the
is used.
Maximum threshold that can be set is 32.
+Running QAT PMD with Intel IPSEC MB library for symmetric precomputes function
+~~
+
+The QAT PMD use Openssl library for partial hash calculation in symmetirc
precomputes function by
+default, the following parameter is allow QAT PMD switch over to multi-buffer
job API if Intel
+IPSEC MB library installed on system.
+
+- qat_ipsec_mb_lib
+
+To use this feature the user must set the parameter on process start as a
device additional parameter::
+
+ -a 03:01.1,qat_ipsec_mb_lib=1
+
Device and driver naming
diff --git a/drivers/common/qat/meson.build b/drivers/common/qat/meson.build
index b7027f3164..245c0fbe61 100644
--- a/drivers/common/qat/meson.build
+++ b/drivers/common/qat/meson.build
@@ -35,6 +35,19 @@ if qat_crypto and not libcrypto.found()
'missing dependency, libcrypto')
endif
+IMB_required_ver = '1.2.0'
+libipsecmb = cc.find_library('IPSec_MB', required: false)
+if libipsecmb.found()
+# version comes with quotes, so we split based on " and take the middle
+imb_ver = cc.get_define('IMB_VERSION_STR',
+prefix : '#include').split('"')[1]
+
+if (imb_ver.version_compare('>=' + IMB_required_ver))
+ext_deps += libipsecmb
+dpdk_conf.set('RTE_QAT_LIBIPSECMB', true)
+endif
+endif
+
# The driver should not build if both compression and crypto are disabled
#FIXME common code depends on compression files so check only compress!
if not qat_compress # and not qat_crypto
diff --git a/drivers/common/qat/qat_device.c b/drivers/common/qat/qat_device.c
index 6824d97050..db4b087d2b 100644
--- a/drivers/common/qat/qat_device.c
+++ b/drivers/common/qat/qat_device.c
@@ -364,6 +364,7 @@ static int qat_pci_probe(struct rte_pci_driver *pci_drv
__rte_unused,
struct qat_pci_device *qat_pci_dev;
struct qat_dev_hw_spec_funcs *ops_hw;
struct qat_dev_cmd_param qat_dev_cmd_param[] = {
+ { QAT_IPSEC_MB_LIB, 0 },
{ SYM_ENQ_THRESHOLD_NAME, 0 },
{ ASYM_ENQ_THRESHOLD_NAME, 0 },
{ COMP_ENQ_THRESHOLD_NAME, 0 },
diff --git a/drivers/common/qat/qat_device.h b/drivers/common/qat/qat_device.h
index 85fae7b7c7..e1a32a7e87 100644
--- a/drivers/common/qat/qat_device.h
+++ b/drivers/common/qat/qat_device.h
@@ -16,6 +16,7 @@
#define QAT_DEV_NAME_MAX_LEN 64
+#define QAT_IPSEC_MB_LIB "qat_ipsec_mb_lib"
#define SYM_ENQ_THRESHOLD_NAME "qat_sym_enq_threshold"
#define ASYM_ENQ_THRESHOLD_NAME "qat_asym_enq_threshold"
#define COMP_ENQ_THRESHOLD_NAME "qat_comp_enq_threshold"
diff --git a/drivers/crypto/qat/qat_sym.c b/drivers/crypto/qat/qat_sym.c
index 3a6c9dcc0a..3477cd89ad 100644
--- a/drivers/crypto/qat/qat_sym.c
+++ b/drivers/crypto/qat/qat_sym.c
@@ -2,8 +2,6 @@
* Copyright(c) 2015-2022 Intel Corporation
*/
-#define OPENSSL_API_COMPAT 0x1010L
-
#include
#include
@@ -17,6 +15,7 @@
#include "qat_qp.h"
uint8_t qat_sym_driver_id;
+int qat_ipsec_mb_lib;
struct qat_crypto_gen_dev_ops qat_sym_gen_dev_ops[QAT_N_GENS];
@@ -309,6 +308,8 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,
if (!strcmp(qat_dev_cmd_param[i].name, SYM_ENQ_THRESHOLD_NAME))
internals->min_enq_burst_threshold =
qat_dev_cmd_param[i].val;
+ if (!strcmp(qat_dev_cmd_param[i].name, QAT_IPSEC_MB_LIB))
+ qat_ipsec_mb_lib = qat_dev_cmd_param[i].val;
i++;
}
diff --git a/drivers/crypto/qat/qat_sym_session.c
b/drivers/crypto/qat/qat_sym_session.c
index 737a180810..30da20ce4d 100644
--- a/drivers/crypto/qat/qat_sy
[PATCH] pipeline: fix packet mirroring configuration
Fix segmentation fault due to null pointer dereferencing inside the
"mirror" instruction when number of mirroring slots is set to 0. This
was taking place when the "mirror" instruction was used without the
mirror feature being properly configured, i.e. the API function
rte_swx_pipeline_mirroring_config was not called at initialization.
Fixes: dac0ecd9098 (" pipeline: support packet mirroring")
Signed-off-by: Cristian Dumitrescu
---
lib/pipeline/rte_swx_pipeline.c | 5 ++---
lib/pipeline/rte_swx_pipeline.h | 10 ++
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/lib/pipeline/rte_swx_pipeline.c b/lib/pipeline/rte_swx_pipeline.c
index 659d8726d1..066356684e 100644
--- a/lib/pipeline/rte_swx_pipeline.c
+++ b/lib/pipeline/rte_swx_pipeline.c
@@ -612,9 +612,6 @@ mirroring_build(struct rte_swx_pipeline *p)
{
uint32_t i;
- if (!p->n_mirroring_slots || !p->n_mirroring_sessions)
- return 0;
-
for (i = 0; i < RTE_SWX_PIPELINE_THREADS_MAX; i++) {
struct thread *t = &p->threads[i];
@@ -9772,6 +9769,8 @@ rte_swx_pipeline_config(struct rte_swx_pipeline **p, int
numa_node)
TAILQ_INIT(&pipeline->metarrays);
pipeline->n_structs = 1; /* Struct 0 is reserved for action_data. */
+ pipeline->n_mirroring_slots = RTE_SWX_PACKET_MIRRORING_SLOTS_DEFAULT;
+ pipeline->n_mirroring_sessions =
RTE_SWX_PACKET_MIRRORING_SESSIONS_DEFAULT;
pipeline->numa_node = numa_node;
status = port_in_types_register(pipeline);
diff --git a/lib/pipeline/rte_swx_pipeline.h b/lib/pipeline/rte_swx_pipeline.h
index adc7fa53b7..184027ba44 100644
--- a/lib/pipeline/rte_swx_pipeline.h
+++ b/lib/pipeline/rte_swx_pipeline.h
@@ -163,6 +163,16 @@ rte_swx_pipeline_port_out_config(struct rte_swx_pipeline
*p,
* Packet mirroring
*/
+/** Default number of packet mirroring slots. */
+#ifndef RTE_SWX_PACKET_MIRRORING_SLOTS_DEFAULT
+#define RTE_SWX_PACKET_MIRRORING_SLOTS_DEFAULT 4
+#endif
+
+/** Default maxiumum number of packet mirroring sessions. */
+#ifndef RTE_SWX_PACKET_MIRRORING_SESSIONS_DEFAULT
+#define RTE_SWX_PACKET_MIRRORING_SESSIONS_DEFAULT 64
+#endif
+
/** Packet mirroring parameters. */
struct rte_swx_pipeline_mirroring_params {
/** Number of packet mirroring slots. */
--
2.17.1
[PATCH V2] pipeline: fix packet mirroring configuration
Fix segmentation fault due to null pointer dereferencing inside the
"mirror" instruction when number of mirroring slots is set to 0. This
was taking place when the "mirror" instruction was used without the
mirror feature being properly configured, i.e. the API function
rte_swx_pipeline_mirroring_config was not called at initialization.
Fixes: dac0ecd9098 (" pipeline: support packet mirroring")
Signed-off-by: Cristian Dumitrescu
---
lib/pipeline/rte_swx_pipeline.c | 5 ++---
lib/pipeline/rte_swx_pipeline.h | 10 ++
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/lib/pipeline/rte_swx_pipeline.c b/lib/pipeline/rte_swx_pipeline.c
index 659d8726d1..066356684e 100644
--- a/lib/pipeline/rte_swx_pipeline.c
+++ b/lib/pipeline/rte_swx_pipeline.c
@@ -612,9 +612,6 @@ mirroring_build(struct rte_swx_pipeline *p)
{
uint32_t i;
- if (!p->n_mirroring_slots || !p->n_mirroring_sessions)
- return 0;
-
for (i = 0; i < RTE_SWX_PIPELINE_THREADS_MAX; i++) {
struct thread *t = &p->threads[i];
@@ -9772,6 +9769,8 @@ rte_swx_pipeline_config(struct rte_swx_pipeline **p, int
numa_node)
TAILQ_INIT(&pipeline->metarrays);
pipeline->n_structs = 1; /* Struct 0 is reserved for action_data. */
+ pipeline->n_mirroring_slots = RTE_SWX_PACKET_MIRRORING_SLOTS_DEFAULT;
+ pipeline->n_mirroring_sessions =
RTE_SWX_PACKET_MIRRORING_SESSIONS_DEFAULT;
pipeline->numa_node = numa_node;
status = port_in_types_register(pipeline);
diff --git a/lib/pipeline/rte_swx_pipeline.h b/lib/pipeline/rte_swx_pipeline.h
index adc7fa53b7..9299f27094 100644
--- a/lib/pipeline/rte_swx_pipeline.h
+++ b/lib/pipeline/rte_swx_pipeline.h
@@ -163,6 +163,16 @@ rte_swx_pipeline_port_out_config(struct rte_swx_pipeline
*p,
* Packet mirroring
*/
+/** Default number of packet mirroring slots. */
+#ifndef RTE_SWX_PACKET_MIRRORING_SLOTS_DEFAULT
+#define RTE_SWX_PACKET_MIRRORING_SLOTS_DEFAULT 4
+#endif
+
+/** Default maximum number of packet mirroring sessions. */
+#ifndef RTE_SWX_PACKET_MIRRORING_SESSIONS_DEFAULT
+#define RTE_SWX_PACKET_MIRRORING_SESSIONS_DEFAULT 64
+#endif
+
/** Packet mirroring parameters. */
struct rte_swx_pipeline_mirroring_params {
/** Number of packet mirroring slots. */
--
2.17.1
[PATCH v3] event/dlb2: fix advertized capabilities
This commit corrects the advertized capabilities reported by the DLB2 PMD.
Previously DLB2 reported supporting RTE_EVENT_DEV_CAP_QUEUE_QOS, but the
DLB2 hardware does not support such capability. This commit removes that
feature from the reported capabilities feature set.
Additionally, two capabilities that DLB2 does support were not being
reported in the capabilities feature set. This commit adds those.
RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT = Event device is capable of
setting up the link between multiple queues and a single port. If the
flag is not set, the eventdev can only map a single queue to each
port or map a single queue to many port
RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK = Event device is capable of
configuring the queue/port link at runtime. If the flag is not set,
the eventdev queue/port link is only can be configured during
initialization
Finally, the file doc/guides/eventdevs/features/dlb2.ini has been updated
to match the capabilities actually reported by the PMD.
Fixes: e7c9971a857a ("event/dlb2: add probe-time hardware init")
Cc: sta...@dpdk.org
Signed-off-by: Timothy McDaniel
===
Changes since V2:
Added "fixes" line that was present in original, but missing in V2.
Changes since V1;
1) reorder capabilities flags to match the order that they appear in
in the default.ini file
2) update the dlb2.ini file with the new set of features supported by DLB2
3) expanded the commit message to provide additional details
---
doc/guides/eventdevs/features/dlb2.ini | 3 ++-
drivers/event/dlb2/dlb2.c | 9 +
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/doc/guides/eventdevs/features/dlb2.ini
b/doc/guides/eventdevs/features/dlb2.ini
index 29747b1c26..48a2a18aff 100644
--- a/doc/guides/eventdevs/features/dlb2.ini
+++ b/doc/guides/eventdevs/features/dlb2.ini
@@ -4,12 +4,13 @@
; Refer to default.ini for the full list of available PMD features.
;
[Scheduling Features]
-queue_qos = Y
event_qos = Y
distributed_sched = Y
queue_all_types= Y
burst_mode = Y
implicit_release_disable = Y
+runtime_port_link = Y
+multiple_queue_port= Y
maintenance_free = Y
[Eth Rx adapter Features]
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 3641ed2942..bc4e705e0b 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -61,12 +61,13 @@ static struct rte_event_dev_info evdev_dlb2_default_info = {
.max_num_events = DLB2_MAX_NUM_LDB_CREDITS,
.max_single_link_event_port_queue_pairs =
DLB2_MAX_NUM_DIR_PORTS(DLB2_HW_V2),
- .event_dev_cap = (RTE_EVENT_DEV_CAP_QUEUE_QOS |
- RTE_EVENT_DEV_CAP_EVENT_QOS |
- RTE_EVENT_DEV_CAP_BURST_MODE |
+ .event_dev_cap = (RTE_EVENT_DEV_CAP_EVENT_QOS |
RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED |
- RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE |
RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES |
+ RTE_EVENT_DEV_CAP_BURST_MODE |
+ RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE |
+ RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK |
+ RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT |
RTE_EVENT_DEV_CAP_MAINTENANCE_FREE),
};
--
2.25.1
[PATCH v1] bbdev: allow operation type enum for growth
Hi Thomas, I would like to get your view on this topic and best recommendation moving forward. This is related to the general intent to remove using MAX value for enums. There is consensus that we should avoid this for a while notably for future-proofed ABI concerns https://patches.dpdk.org/project/dpdk/patch/20200130142003.2645765-1-ferruh.yi...@intel.com/. But still there is arguably not yet an explicit best recommendation to handle this especially when we actualy need to expose array whose index is such an enum. As a specific example here I am refering to RTE_BBDEV_OP_TYPE_COUNT in enum rte_bbdev_op_type which is being extended for new operation type being support in bbdev (such as https://patches.dpdk.org/project/dpdk/patch/1646956157-245769-2-git-send-email-nicolas.chau...@intel.com/ adding new FFT operation) There is also the intent to be able to expose information for each operation type through the bbdev api such as dynamically configured queues information per such operation type https://patches.dpdk.org/project/dpdk/patch/1646785355-168133-2-git-send-email-nicolas.chau...@intel.com/ Basically we are considering best way to accomodate for this, notably based on discussions with Ray Kinsella and Bruce Richardson, to handle such a case moving forward: specifically for the example with RTE_BBDEV_OP_TYPE_COUNT and also more generally. One possible option is captured in that patchset and is basically based on the simple principle to allow for growth and prevent ABI breakage. Ie. the last value of the enum is set with a higher value than required so that to allow insertion of new enum outside of the major ABI versions. In that case the RTE_BBDEV_OP_TYPE_COUNT is still present and can be exposed and used while still allowing for addition thanks to the implicit padding-like room. As an alternate variant, instead of using that last enum value, that extended size could be exposed as an #define outside of the enum but would be fundamentally the same (public). Another option would be to avoid array alltogether and use each time this a new dedicated API function (operation type enum being an input argument instead of an index to an array in an existing structure so that to get access to structure related to a given operation type enum) but that is arguably not well scalable within DPDK to use such a scheme for each enums and keep an uncluttered and clean API. In that very example that would be very odd indeed not to get this simply from info_get(). Some pros and cons, arguably the simple option in that patchset is a valid compromise option and a step in the right direction but we would like to know your view wrt best recommendation, or any other thought. Note: Such a change is aimed for 22.11. Thanks and regards, Nic Nicolas Chautru (1): bbdev: allow operation type enum for growth lib/bbdev/rte_bbdev.c| 5 - lib/bbdev/rte_bbdev_op.h | 2 +- 2 files changed, 5 insertions(+), 2 deletions(-) -- 1.8.3.1
[PATCH v1] bbdev: allow operation type enum for growth
Updating the last enum for rte_bbdev_op_type
to allow for enum insertion.
Signed-off-by: Nicolas Chautru
---
lib/bbdev/rte_bbdev.c| 5 -
lib/bbdev/rte_bbdev_op.h | 2 +-
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/lib/bbdev/rte_bbdev.c b/lib/bbdev/rte_bbdev.c
index aaee7b7..6003118 100644
--- a/lib/bbdev/rte_bbdev.c
+++ b/lib/bbdev/rte_bbdev.c
@@ -1122,7 +1122,10 @@ struct rte_mempool *
"RTE_BBDEV_OP_TURBO_DEC",
"RTE_BBDEV_OP_TURBO_ENC",
"RTE_BBDEV_OP_LDPC_DEC",
- "RTE_BBDEV_OP_LDPC_ENC",
+ "RTE_BBDEV_OP_RESERVED_1",
+ "RTE_BBDEV_OP_RESERVED_2",
+ "RTE_BBDEV_OP_RESERVED_3",
+ "RTE_BBDEV_OP_RESERVED_4",
};
if (op_type < RTE_BBDEV_OP_TYPE_COUNT)
diff --git a/lib/bbdev/rte_bbdev_op.h b/lib/bbdev/rte_bbdev_op.h
index 6d56133..8d66007 100644
--- a/lib/bbdev/rte_bbdev_op.h
+++ b/lib/bbdev/rte_bbdev_op.h
@@ -748,7 +748,7 @@ enum rte_bbdev_op_type {
RTE_BBDEV_OP_TURBO_ENC, /**< Turbo encode */
RTE_BBDEV_OP_LDPC_DEC, /**< LDPC decode */
RTE_BBDEV_OP_LDPC_ENC, /**< LDPC encode */
- RTE_BBDEV_OP_TYPE_COUNT, /**< Count of different op types */
+ RTE_BBDEV_OP_TYPE_COUNT = 8, /**< Count of different op types */
};
/** Bit indexes of possible errors reported through status field */
--
1.8.3.1
Re: [PATCH v1] bbdev: allow operation type enum for growth
On Mon, 13 Jun 2022 11:24:35 -0700 Nicolas Chautru wrote: > Updating the last enum for rte_bbdev_op_type > to allow for enum insertion. > > Signed-off-by: Nicolas Chautru Only allowed if you check now for the any of the reserved types and fail.
RE: [PATCH v1] bbdev: allow operation type enum for growth
Hi Stephen, > -Original Message- > From: Stephen Hemminger > Sent: Monday, June 13, 2022 12:48 PM > To: Chautru, Nicolas > Cc: dev@dpdk.org; tho...@monjalon.net; maxime.coque...@redhat.com; > t...@redhat.com; m...@ashroe.eu; Richardson, Bruce > ; hemant.agra...@nxp.com; > david.march...@redhat.com > Subject: Re: [PATCH v1] bbdev: allow operation type enum for growth > > On Mon, 13 Jun 2022 11:24:35 -0700 > Nicolas Chautru wrote: > > > Updating the last enum for rte_bbdev_op_type to allow for enum > > insertion. > > > > Signed-off-by: Nicolas Chautru > > Only allowed if you check now for the any of the reserved types and fail. Let me try to clarify what you mean. You would enforce such check in which function? Do you mean in any implementation of bbdev function taking enum rte_bbdev_op_type as argument? In that case do you mean having in effect 2 values: - one for the number of supported implemented operation type = could be kept private within rte_bbdev.c implementation, purely to reject using a non-supported operation type - and another higher value for padded maximum numbers of operations allowing for enumeration insertion. That would sound fine to me, but please kindly confirm this is what you are implying. I will also check for Thomas feedback as well, thanks.
[PATCH v9] event/dlb2: add support for single 512B write of 4 QEs
On Xeon, 512b accesses are available, so movdir64 instruction is able to
perform 512b read and write to DLB producer port. In order for movdir64
to be able to pull its data from store buffers (store-buffer-forwarding)
(before actual write), data should be in single 512b write format.
This commit add change when code is built for Xeon with 512b AVX support
to make single 512b write of all 4 QEs instead of 4x64b writes.
Signed-off-by: Timothy McDaniel
Acked-by: Kent Wires
===
Changes since V8:
1) Removed compile time control of AVX512 enablement
2) Fixed copyright year in all updated and new source files
3) Further refinement of meson.build - only add avx512vl flag to cflags,
not others
Changes since V7:
Fixed whitespace issue in meson.build
Changes since V6:
1) Check for AVX512VL only, removing checks for other
AVX512 flags in meson.build
2) rename dlb2_sve.c to dlb2_sse.c
Changes since V5:
No code changes - just added --in-reply-to and copied Bruce
Changes since V4:
1) Add build-time control for avx512 support to meson.buildi, based
on implementation found in lib/acl/meson.build
2) Add rte_vect_get_max_simd_bitwidth runtime check before using
avx512 instructions
Changes since V3:
1) Renamed dlb2_noavx512.c to dlb2_sve.c, and fixed up meson.build
for new file name.
Changes since V1:
1) Split out dlb2_event_build_hcws into two implementations, one
that uses AVX512 instructions, and one that does not. Each implementation
is in its own source file in order to avoid build errors if the compiler
does not support the newer AVX512 instructions.
2) Update meson.build to and pull in appropriate source file based on
whether the compiler supports AVX512VL
3) Check if target supports AVX512VL, and use appropriate implementation
based on this runtime check.
---
drivers/event/dlb2/dlb2.c| 209 +---
drivers/event/dlb2/dlb2_avx512.c | 267 +++
drivers/event/dlb2/dlb2_priv.h | 10 +-
drivers/event/dlb2/dlb2_sse.c| 219 +
drivers/event/dlb2/meson.build | 44 +
5 files changed, 546 insertions(+), 203 deletions(-)
create mode 100644 drivers/event/dlb2/dlb2_avx512.c
create mode 100644 drivers/event/dlb2/dlb2_sse.c
diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c
index 3641ed2942..cf74a4a9f6 100644
--- a/drivers/event/dlb2/dlb2.c
+++ b/drivers/event/dlb2/dlb2.c
@@ -1,5 +1,5 @@
/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2016-2020 Intel Corporation
+ * Copyright(c) 2016-2022 Intel Corporation
*/
#include
@@ -1861,6 +1861,12 @@ dlb2_eventdev_port_setup(struct rte_eventdev *dev,
dev->data->ports[ev_port_id] = &dlb2->ev_ports[ev_port_id];
+ if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512VL) &&
+ rte_vect_get_max_simd_bitwidth() >= RTE_VECT_SIMD_512)
+ ev_port->qm_port.use_avx512 = true;
+ else
+ ev_port->qm_port.use_avx512 = false;
+
return 0;
}
@@ -2457,21 +2463,6 @@ dlb2_eventdev_start(struct rte_eventdev *dev)
return 0;
}
-static uint8_t cmd_byte_map[DLB2_NUM_PORT_TYPES][DLB2_NUM_HW_SCHED_TYPES] = {
- {
- /* Load-balanced cmd bytes */
- [RTE_EVENT_OP_NEW] = DLB2_NEW_CMD_BYTE,
- [RTE_EVENT_OP_FORWARD] = DLB2_FWD_CMD_BYTE,
- [RTE_EVENT_OP_RELEASE] = DLB2_COMP_CMD_BYTE,
- },
- {
- /* Directed cmd bytes */
- [RTE_EVENT_OP_NEW] = DLB2_NEW_CMD_BYTE,
- [RTE_EVENT_OP_FORWARD] = DLB2_NEW_CMD_BYTE,
- [RTE_EVENT_OP_RELEASE] = DLB2_NOOP_CMD_BYTE,
- },
-};
-
static inline uint32_t
dlb2_port_credits_get(struct dlb2_port *qm_port,
enum dlb2_hw_queue_types type)
@@ -2666,192 +2657,6 @@ dlb2_construct_token_pop_qe(struct dlb2_port *qm_port,
int idx)
qm_port->owed_tokens = 0;
}
-static inline void
-dlb2_event_build_hcws(struct dlb2_port *qm_port,
- const struct rte_event ev[],
- int num,
- uint8_t *sched_type,
- uint8_t *queue_id)
-{
- struct dlb2_enqueue_qe *qe;
- uint16_t sched_word[4];
- __m128i sse_qe[2];
- int i;
-
- qe = qm_port->qe4;
-
- sse_qe[0] = _mm_setzero_si128();
- sse_qe[1] = _mm_setzero_si128();
-
- switch (num) {
- case 4:
- /* Construct the metadata portion of two HCWs in one 128b SSE
-* register. HCW metadata is constructed in the SSE registers
-* like so:
-* sse_qe[0][63:0]: qe[0]'s metadata
-* sse_qe[0][127:64]: qe[1]'s metadata
-* sse_qe[1][63:0]: qe[2]'s metadata
-* sse_qe[1][127:64]: qe[3]'s metadata
-*/
-
- /* Convert the event operation into a command byte and store it
-* in the metadata:
-* sse_qe[0][63:56] = cmd_byte_
[PATCH v2] devtools: ensure proper tag sequence
From: Jakub Palider
This change to log checking procedure ensures that certain
tags are in proper order.
The order of tags is as follows:
* Coverity issue
* Bugzilla ID
* Fixes
* Cc
*
* Suggested-by
* Reported-by
+ Signed-off-by
where:
* => 0 or more than one instance possible
+ => more than once instance possible
In order to satisfy the above requirements an extra check
is performed for obligatory tags.
Signed-off-by: Jakub Palider
v2:
* narrowed down the tags under check
---
devtools/check-git-log.sh | 48 +
doc/guides/contributing/patches.rst | 24 +++
2 files changed, 72 insertions(+)
diff --git a/devtools/check-git-log.sh b/devtools/check-git-log.sh
index 23c6a7d9bb..c4d1d475c2 100755
--- a/devtools/check-git-log.sh
+++ b/devtools/check-git-log.sh
@@ -54,6 +54,7 @@ fixes=$(git log --format='%h %s' --reverse $range | grep -i
': *fix' | cut -d' '
stablefixes=$($selfdir/git-log-fixes.sh $range | sed '/(N\/A)$/d' | cut -d' '
-f2)
tags=$(git log --format='%b' --reverse $range | grep -i -e 'by *:' -e 'fix.*:')
bytag='\(Reported\|Suggested\|Signed-off\|Acked\|Reviewed\|Tested\)-by:'
+exttag='Coverity issue:\|Bugzilla ID:\|Fixes:\|Cc:'
failure=false
@@ -203,6 +204,53 @@ done)
[ -z "$bad" ] || { printf "Is it candidate for Cc: sta...@dpdk.org
backport?\n$bad\n"\
&& failure=true;}
+# check tag sequence
+bad=$(for commit in $commits; do
+ body=$(git log --format='%b' -1 $commit)
+ echo "$body" |\
+ grep -o -e "$exttag\|^[[:blank:]]*$\|$bytag" | \
+ # retrieve tags only
+ cut -f1 -d":" |\
+ # it is okay to have several tags of the same type but for processing
+ # we need to squash them
+ uniq |\
+ # make sure the tags are in the proper order as presented in SEQ
+ awk -v cmt="$commit" 'BEGIN{
+ SEQ[0] = "Coverity issue";
+ SEQ[1] = "Bugzilla ID";
+ SEQ[2] = "Fixes";
+ SEQ[3] = "Cc";
+ SEQ[4] = "^$";
+ SEQ[5] = "Suggested-by";
+ SEQ[6] = "Reported-by";
+ SEQ[7] = "Signed-off-by";
+ latest = 0;
+ }
+ {
+ for (seq = 0; seq < length(SEQ); seq++) {
+ if (match($0, SEQ[seq])) {
+ if (seq < latest) {
+ print "\tCommit " cmt " (" $0 ":)";
+ break;
+ } else {
+ latest = seq;
+ }
+ }
+ }
+}'
+done)
+[ -z "$bad" ] || { printf "Wrong tag order: \n$bad\n"\
+ && failure=true;}
+
+# check required tag
+bad=$(for commit in $commits; do
+ body=$(git log --format='%b' -1 $commit)
+ echo $body | grep -q "Signed-off-by:" \
+ || echo "\tCommit" $commit "(Signed-off-by:)"
+ done)
+[ -z "$bad" ] || { printf "Missing obligatory tag: \n$bad\n"\
+ && failure=true;}
+
total=$(echo "$commits" | wc -l)
if $failure ; then
printf "\nInvalid patch(es) found - checked $total patch"
diff --git a/doc/guides/contributing/patches.rst
b/doc/guides/contributing/patches.rst
index bebcaf3925..bbaaf10a42 100644
--- a/doc/guides/contributing/patches.rst
+++ b/doc/guides/contributing/patches.rst
@@ -360,6 +360,30 @@ Where ``N`` is patchwork ID for patch or series::
---
Depends-on: series-1 ("Title of the series")
+Tag order
+~
+
+There is a pattern indicating how certain tags should relate to each other.
+
+Example of proper tag sequence::
+
+ Coverity issue:
+ Bugzilla ID:
+ Fixes:
+ Cc:
+
+ Suggested-by:
+ Reported-by:
+ Signed-off-by:
+
+Between first and second tag section there is and empty line.
+
+While ``Signed-off-by:`` is an obligatory tag and must exists in each commit,
+all other tags are optional. Any tag, as long as it is in proper location
+to other adjacent tags (if present), may occur multiple times.
+
+Other tags shall be laid out in a chronological order.
+
Creating Patches
--
2.25.1
RE: [PATCH] net/af_xdp: allow using copy mode in XSK
> -Original Message- > From: Li, Xiaoyun > Sent: Monday, June 13, 2022 11:13 PM > To: Loftus, Ciara ; Zhang, Qi Z > ; dev@dpdk.org > Cc: Li, Xiaoyun > Subject: [PATCH] net/af_xdp: allow using copy mode in XSK > > DPDK assumes that users only want AF_XDP socket (XSK) into zero copy mode > when the kernel supports it. However, sometimes kernel driver doesn't > support it well and copy mode is more stable and preferred. rename "no_zerocopy" to "force_copy" looks better? This aligned with the comment on the macro definition in kernel #define XDP_COPY(1 << 1) /* Force copy-mode */ And also make the below code more smooth. if (internals->force_copy) cfg.bind_flags |= XDP_COPY;
RE: [PATCH v7] net/i40e: add outer VLAN processing
Hi Kevin,
> -Original Message-
> From: Liu, KevinX
> Sent: Saturday, June 11, 2022 12:30 AM
> To: dev@dpdk.org
> Cc: Zhang, Yuying ; Xing, Beilei
> ; Yang, SteveX ; Zhang,
> RobinX ; Liu, KevinX
> Subject: [PATCH v7] net/i40e: add outer VLAN processing
>
> From: Robin Zhang
>
> Outer VLAN processing is supported after firmware v8.4, kernel driver also
Since this patch can only be enabled with firmware v8.6, should you sync with
dpdk here?
> change the default behavior to support this feature. To align with kernel
> driver, add support for outer VLAN processing in DPDK.
>
> But it is forbidden for firmware to change the Inner/Outer VLAN
> configuration while there are MAC/VLAN filters in the switch table.
> Therefore, we need to clear the MAC table before setting config, and then
> restore the MAC table after setting.
>
> This will not impact on an old firmware.
>
> Signed-off-by: Robin Zhang
> Signed-off-by: Kevin Liu
> ---
> drivers/net/i40e/i40e_ethdev.c | 94 --
> drivers/net/i40e/i40e_ethdev.h | 3 ++
> 2 files changed, 92 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index 755786dc10..4cae163cb9 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -2575,6 +2575,7 @@ i40e_dev_close(struct rte_eth_dev *dev)
> struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data-
> >dev_private);
> struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
> struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
> + struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
> struct i40e_filter_control_settings settings;
> struct rte_flow *p_flow;
> uint32_t reg;
> @@ -2587,6 +2588,18 @@ i40e_dev_close(struct rte_eth_dev *dev)
> if (rte_eal_process_type() != RTE_PROC_PRIMARY)
> return 0;
>
> + /*
> + * It is a workaround, if the double VLAN is disabled when
> + * the program exits, an abnormal error will occur on the
> + * NIC. Need to enable double VLAN when dev is closed.
> + */
What is the root cause of this error, I suggest finding a true fix instead of
adding
additonal process here.
> + if (pf->fw8_3gt) {
> + if (!(rxmode->offloads &
> RTE_ETH_RX_OFFLOAD_VLAN_EXTEND)) {
> + rxmode->offloads |=
> RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;
> + i40e_vlan_offload_set(dev,
> RTE_ETH_VLAN_EXTEND_MASK);
> + }
> + }
> +
> ret = rte_eth_switch_domain_free(pf->switch_domain_id);
> if (ret)
> PMD_INIT_LOG(WARNING, "failed to free switch
> domain: %d", ret); @@ -3909,6 +3922,7 @@ i40e_vlan_tpid_set(struct
> rte_eth_dev *dev,
> struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data-
> >dev_private);
> int qinq = dev->data->dev_conf.rxmode.offloads &
> RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;
> + u16 sw_flags = 0, valid_flags = 0;
> int ret = 0;
>
> if ((vlan_type != RTE_ETH_VLAN_TYPE_INNER && @@ -3927,15
> +3941,32 @@ i40e_vlan_tpid_set(struct rte_eth_dev *dev,
> /* 802.1ad frames ability is added in NVM API 1.7*/
> if (hw->flags & I40E_HW_FLAG_802_1AD_CAPABLE) {
> if (qinq) {
> + if (pf->fw8_3gt) {
> + sw_flags =
> I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN;
> + valid_flags =
> I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN;
> + }
> if (vlan_type == RTE_ETH_VLAN_TYPE_OUTER)
> hw->first_tag = rte_cpu_to_le_16(tpid);
> else if (vlan_type == RTE_ETH_VLAN_TYPE_INNER)
> hw->second_tag = rte_cpu_to_le_16(tpid);
> } else {
> - if (vlan_type == RTE_ETH_VLAN_TYPE_OUTER)
> - hw->second_tag = rte_cpu_to_le_16(tpid);
> + /*
> + * If tpid is equal to 0x88A8, indicates that the
> + * disable double VLAN operation is in progress.
> + * Need set switch configuration back to default.
> + */
I don't suppose we need to set qinq tpid in vlan case. Please explain this
situation in details.
> + if (pf->fw8_3gt && tpid == RTE_ETHER_TYPE_QINQ) {
> + sw_flags = 0;
> + valid_flags =
> I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN;
> + if (vlan_type == RTE_ETH_VLAN_TYPE_OUTER)
> + hw->first_tag =
> rte_cpu_to_le_16(tpid);
> + } else {
> + if (vlan_type == RTE_ETH_VLAN_TYPE_OUTER)
> + hw->second_tag =
> rte_cpu_to_le_16(tpid);
> + }
> }
> - ret = i40e_aq_set_switch
RE: [PATCH v7] net/i40e: add outer VLAN processing
Hi, Yuying
> -Original Message-
> From: Zhang, Yuying
> Sent: 2022年6月14日 10:44
> To: Liu, KevinX ; dev@dpdk.org
> Cc: Xing, Beilei ; Yang, SteveX
> ; Zhang, RobinX
> Subject: RE: [PATCH v7] net/i40e: add outer VLAN processing
>
> Hi Kevin,
>
> > -Original Message-
> > From: Liu, KevinX
> > Sent: Saturday, June 11, 2022 12:30 AM
> > To: dev@dpdk.org
> > Cc: Zhang, Yuying ; Xing, Beilei
> > ; Yang, SteveX ; Zhang,
> > RobinX ; Liu, KevinX
> > Subject: [PATCH v7] net/i40e: add outer VLAN processing
> >
> > From: Robin Zhang
> >
> > Outer VLAN processing is supported after firmware v8.4, kernel driver
> > also
>
> Since this patch can only be enabled with firmware v8.6, should you sync with
> dpdk here?
OK, I'll revise it here.
>
> > change the default behavior to support this feature. To align with
> > kernel driver, add support for outer VLAN processing in DPDK.
> >
> > But it is forbidden for firmware to change the Inner/Outer VLAN
> > configuration while there are MAC/VLAN filters in the switch table.
> > Therefore, we need to clear the MAC table before setting config, and
> > then restore the MAC table after setting.
> >
> > This will not impact on an old firmware.
> >
> > Signed-off-by: Robin Zhang
> > Signed-off-by: Kevin Liu
> > ---
> > drivers/net/i40e/i40e_ethdev.c | 94
> > --
> > drivers/net/i40e/i40e_ethdev.h | 3 ++
> > 2 files changed, 92 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/net/i40e/i40e_ethdev.c
> > b/drivers/net/i40e/i40e_ethdev.c index 755786dc10..4cae163cb9 100644
> > --- a/drivers/net/i40e/i40e_ethdev.c
> > +++ b/drivers/net/i40e/i40e_ethdev.c
> > @@ -2575,6 +2575,7 @@ i40e_dev_close(struct rte_eth_dev *dev)
> > struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data-
> > >dev_private);
> > struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
> > struct rte_intr_handle *intr_handle = pci_dev->intr_handle;
> > + struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
> > struct i40e_filter_control_settings settings;
> > struct rte_flow *p_flow;
> > uint32_t reg;
> > @@ -2587,6 +2588,18 @@ i40e_dev_close(struct rte_eth_dev *dev)
> > if (rte_eal_process_type() != RTE_PROC_PRIMARY)
> > return 0;
> >
> > + /*
> > +* It is a workaround, if the double VLAN is disabled when
> > +* the program exits, an abnormal error will occur on the
> > +* NIC. Need to enable double VLAN when dev is closed.
> > +*/
>
> What is the root cause of this error, I suggest finding a true fix instead of
> adding additonal process here.
About this error, dpdk has reported a known issue. Because it doesn't know the
root cause of the problem, it adds a workaround here to temporarily avoid some
problems.
>
> > + if (pf->fw8_3gt) {
> > + if (!(rxmode->offloads &
> > RTE_ETH_RX_OFFLOAD_VLAN_EXTEND)) {
> > + rxmode->offloads |=
> > RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;
> > + i40e_vlan_offload_set(dev,
> > RTE_ETH_VLAN_EXTEND_MASK);
> > + }
> > + }
> > +
> > ret = rte_eth_switch_domain_free(pf->switch_domain_id);
> > if (ret)
> > PMD_INIT_LOG(WARNING, "failed to free switch
> > domain: %d", ret); @@ -3909,6 +3922,7 @@ i40e_vlan_tpid_set(struct
> > rte_eth_dev *dev,
> > struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data-
> > >dev_private);
> > int qinq = dev->data->dev_conf.rxmode.offloads &
> >RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;
> > + u16 sw_flags = 0, valid_flags = 0;
> > int ret = 0;
> >
> > if ((vlan_type != RTE_ETH_VLAN_TYPE_INNER && @@ -3927,15
> > +3941,32 @@ i40e_vlan_tpid_set(struct rte_eth_dev *dev,
> > /* 802.1ad frames ability is added in NVM API 1.7*/
> > if (hw->flags & I40E_HW_FLAG_802_1AD_CAPABLE) {
> > if (qinq) {
> > + if (pf->fw8_3gt) {
> > + sw_flags =
> > I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN;
> > + valid_flags =
> > I40E_AQ_SET_SWITCH_CFG_OUTER_VLAN;
> > + }
> > if (vlan_type == RTE_ETH_VLAN_TYPE_OUTER)
> > hw->first_tag = rte_cpu_to_le_16(tpid);
> > else if (vlan_type == RTE_ETH_VLAN_TYPE_INNER)
> > hw->second_tag = rte_cpu_to_le_16(tpid);
> > } else {
> > - if (vlan_type == RTE_ETH_VLAN_TYPE_OUTER)
> > - hw->second_tag = rte_cpu_to_le_16(tpid);
> > + /*
> > +* If tpid is equal to 0x88A8, indicates that the
> > +* disable double VLAN operation is in progress.
> > +* Need set switch configuration back to default.
> > +*/
>
> I don't suppose we need to set qinq tpid in vlan case. Please explain this
> situation in details.
I'll think about how to explain this place. Thank you.
>
> > +
[RFC] net/ice: support represented port flow action
From: Zhichao Zeng
Add support for action REPRESENTED_PORT, which send traffic
to the VF represented by the given ethdev.
Signed-off-by: Zhichao Zeng
---
doc/guides/nics/features/ice.ini| 1 +
drivers/net/ice/ice_switch_filter.c | 43 +
2 files changed, 44 insertions(+)
diff --git a/doc/guides/nics/features/ice.ini b/doc/guides/nics/features/ice.ini
index 7861790a51..12fd802885 100644
--- a/doc/guides/nics/features/ice.ini
+++ b/doc/guides/nics/features/ice.ini
@@ -82,3 +82,4 @@ passthru = Y
queue= Y
rss = Y
vf = Y
+represented_port = Y
diff --git a/drivers/net/ice/ice_switch_filter.c
b/drivers/net/ice/ice_switch_filter.c
index 36c9bffb73..56bc392ac7 100644
--- a/drivers/net/ice/ice_switch_filter.c
+++ b/drivers/net/ice/ice_switch_filter.c
@@ -1618,9 +1618,14 @@ ice_switch_parse_dcf_action(struct ice_dcf_adapter *ad,
struct rte_flow_error *error,
struct ice_adv_rule_info *rule_info)
{
+ const struct rte_flow_action_ethdev *act_represented_port;
+ const struct rte_eth_dev *representor_dev;
const struct rte_flow_action_vf *act_vf;
const struct rte_flow_action *action;
+ const struct ice_pf *pf;
enum rte_flow_action_type action_type;
+ uint16_t representor_port_id, representor_id;
+ uint16_t backer_port_id, pf_port_id;
for (action = actions; action->type !=
RTE_FLOW_ACTION_TYPE_END; action++) {
@@ -1646,6 +1651,43 @@ ice_switch_parse_dcf_action(struct ice_dcf_adapter *ad,
rule_info->sw_act.vsi_handle = act_vf->id;
break;
+ case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
+ /**
+* The following two cases will return an invalid
parameter error code:
+* 1.The given port_id is not in the valid range
+* 2.The VF represented by the representor and the
current adapter do
+* not belong to the same PF
+*/
+ rule_info->sw_act.fltr_act = ICE_FWD_TO_VSI;
+ act_represented_port = action->conf;
+ representor_dev =
&rte_eth_devices[act_represented_port->port_id];
+ pf = &ad->parent.pf;
+ pf_port_id = pf->dev_data->port_id;
+
+ if (!representor_dev->data) {
+ rte_flow_error_set(error,
+ EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
+ actions,
+ "Invalid ethdev_port_id");
+ return -rte_errno;
+ }
+
+ backer_port_id = representor_dev->data->backer_port_id;
+ representor_id = representor_dev->data->representor_id;
+ representor_port_id = representor_dev->data->port_id;
+
+ if (backer_port_id != pf_port_id &&
+ (representor_id || pf_port_id !=
representor_port_id)) {
+ rte_flow_error_set(error,
+ EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
+ actions,
+ "Invalid ethdev_port_id");
+ return -rte_errno;
+ }
+
+ rule_info->sw_act.vsi_handle = representor_id;
+ break;
+
case RTE_FLOW_ACTION_TYPE_DROP:
rule_info->sw_act.fltr_act = ICE_DROP_PACKET;
break;
@@ -1789,6 +1831,7 @@ ice_switch_check_action(const struct rte_flow_action
*actions,
case RTE_FLOW_ACTION_TYPE_RSS:
case RTE_FLOW_ACTION_TYPE_QUEUE:
case RTE_FLOW_ACTION_TYPE_DROP:
+ case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
actions_num++;
break;
case RTE_FLOW_ACTION_TYPE_VOID:
--
2.25.1
