Re: [dpdk-dev] [PATCH v2] ci: add vm jobs for aarch64 builds with tests

[Ruifeng Wang]

> -Original Message-
> From: dev  On Behalf Of Juraj Linke?
> Sent: Friday, August 28, 2020 7:46 PM
> To: tho...@monjalon.net; david.march...@redhat.com;
> acon...@redhat.com; maicolgabr...@hotmail.com
> Cc: dev@dpdk.org; Juraj Linkeš 
> Subject: [dpdk-dev] [PATCH v2] ci: add vm jobs for aarch64 builds with tests
> 
> Tests requiring hugepages do not work outside of VM environment because
> of security limitations. Add aarch64 builds which run tests to run in a VM to
> avoid these limitations. Leave non-hugepage environments since the tests
> may produce different results in hugepage and non-hugepage environments.
> 
> Signed-off-by: Juraj Linkeš 
> ---
>  .travis.yml | 12 
>  1 file changed, 12 insertions(+)
> 
> diff --git a/.travis.yml b/.travis.yml
> index d6eeab371..5e12db23b 100644
> --- a/.travis.yml
> +++ b/.travis.yml
> @@ -90,6 +90,12 @@ jobs:
>- env: DEF_LIB="shared" RUN_TESTS=1
>  arch: arm64
>  compiler: gcc
> +  - env: DEF_LIB="shared" RUN_TESTS=1
> +dist: focal
> +arch: arm64-graviton2
> +virt: vm
> +group: edge
> +compiler: gcc
>- env: DEF_LIB="shared" BUILD_DOCS=1
>  arch: arm64
>  compiler: gcc
> @@ -105,3 +111,9 @@ jobs:
>- env: DEF_LIB="shared" RUN_TESTS=1
>  arch: arm64
>  compiler: clang
> +  - env: DEF_LIB="shared" RUN_TESTS=1
> +dist: focal
> +arch: arm64-graviton2
> +virt: vm
> +group: edge
> +compiler: clang
> --
> 2.20.1

Reviewed-by: Ruifeng Wang 

Re: [dpdk-dev] [PATCH] net/ice: fix flow validation for unsupported patterns

[Sun, GuinanX]

Hi qi

> -Original Message-
> From: Zhang, Qi Z
> Sent: Monday, August 31, 2020 12:23 PM
> To: Sun, GuinanX ; dev@dpdk.org
> Cc: Yang, Qiming ; sta...@dpdk.org
> Subject: RE: [PATCH] net/ice: fix flow validation for unsupported patterns
> 
> 
> 
> > -Original Message-
> > From: Sun, GuinanX 
> > Sent: Friday, August 28, 2020 10:33 AM
> > To: dev@dpdk.org
> > Cc: Zhang, Qi Z ; Yang, Qiming
> > ; Sun, GuinanX ;
> > sta...@dpdk.org
> > Subject: [PATCH] net/ice: fix flow validation for unsupported patterns
> >
> > When loading the OS default package and the pipeline mode is enabled
> > by the "pipeline-mode-support=1" operation. In this case, the wrong
> > parser is selected for processing and it will cause the unsupported
> > patterns(pppoes/pfcp/l2tpv3/esp/ah) to be validated successfully.
> > This patch corrects the parser selection issue.
> >
> > Fixes: 47d460d63233 ("net/ice: rework switch filter")
> > Cc: sta...@dpdk.org
> >
> > Signed-off-by: Guinan Sun 
> > ---
> >  drivers/net/ice/ice_switch_filter.c | 6 --
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/net/ice/ice_switch_filter.c
> > b/drivers/net/ice/ice_switch_filter.c
> > index c4b00b6a2..884fbaae2 100644
> > --- a/drivers/net/ice/ice_switch_filter.c
> > +++ b/drivers/net/ice/ice_switch_filter.c
> > @@ -1806,7 +1806,8 @@ ice_switch_init(struct ice_adapter *ad)
> > else
> > return -EINVAL;
> >
> > -   if (ad->devargs.pipe_mode_support)
> > +   if (ad->devargs.pipe_mode_support &&
> > +   ad->active_pkg_type != ICE_PKG_TYPE_OS_DEFAULT)
> > ret = ice_register_parser(perm_parser, ad);
> 
> This is not correct, package type should not related with pipe line mode.

Under the premise of pipe-mode support, the choice of parser for different 
package types will be added.
Patch v2 will fix it.

> 
> 
> > else
> > ret = ice_register_parser(dist_parser, ad); @@ -1824,7
> +1825,8 @@
> > ice_switch_uninit(struct ice_adapter *ad)
> > else
> > dist_parser = &ice_switch_dist_parser_os;
> >
> > -   if (ad->devargs.pipe_mode_support)
> > +   if (ad->devargs.pipe_mode_support &&
> > +   ad->active_pkg_type != ICE_PKG_TYPE_OS_DEFAULT)
> > ice_unregister_parser(perm_parser, ad);
> > else
> > ice_unregister_parser(dist_parser, ad);
> > --
> > 2.17.1

[dpdk-dev] [Bug 532] af_xdp: kernel panic when freeing mbufs on lcore other than the receiving lcore

[bugzilla]

https://bugs.dpdk.org/show_bug.cgi?id=532

Bug ID: 532
   Summary: af_xdp: kernel panic when freeing mbufs on lcore other
than the receiving lcore
   Product: DPDK
   Version: 20.08
  Hardware: x86
OS: Linux
Status: UNCONFIRMED
  Severity: major
  Priority: Normal
 Component: ethdev
  Assignee: dev@dpdk.org
  Reporter: martin.wei...@allegro-packets.com
  Target Milestone: ---

Created attachment 119
  --> https://bugs.dpdk.org/attachment.cgi?id=119&action=edit
patch for distributor example application to reproduce the issue

We are having an issue with our DPDK application when using the af_xdp driver
and USB ethernet devices.
As soon as a higher packet rate is to be processed, the Linux kernel (5.7.6)
will panic in the xsk_generic_rcv function (please see attached the kernel
output pasted below).

I have attached a patch that modifies the distributor example in a way that
will work with af_xdp devices (only use a single tx queue) and instead of
processing the packets will just free them in the worker lcore. When putting
about a gig of traffic on the interfaces the kernel will immediately panic. We
start the modified distributor application like this:

./build/app/distributor_app -c 0x1f --vdev net_af_xdp0,iface=eth5 --vdev
net_af_xdp1,iface=eth6 -- -p 0x03



kernel panic output:


[  256.427389] #PF: supervisor write access in kernel mode
[  256.49] #PF: error_code(0x0002) - not-present page
[  256.490002] PGD 265628067 P4D 265628067 PUD 0 
[  256.490008] Oops: 0002 [#1] SMP NOPTI
[  256.490012] CPU: 1 PID: 1458 Comm: lcore-slave-1 Tainted: G   OE
5.7.0-1-amd64 #1 Debian 5.7.6-1
[  256.490013] Hardware name: Supermicro SYS-E50-9AP-N5-AG050/A2SAP-H, BIOS 1.4
04/17/2020
[  256.490022] RIP: 0010:memcpy_erms+0x6/0x10
[  256.490025] Code: cc cc cc cc eb 1e 0f 1f 00 48 89 f8 48 89 d1 48 c1 e9 03
83 e2 07 f3 48 a5 89 d1 f3 a4 c3 66 0f 1f 44 00 00 48 89 f8 48 89 d1  a4 c3
0f 1f 80 00 00 00 00 48 89 f8 48 83 fa 20 72 7e 40 38 fe
[  256.490026] RSP: :a06c000d4c98 EFLAGS: 00010202
[  256.490028] RAX: 0640 RBX: a06c000d4d60 RCX:
0041
[  256.490029] RDX: 0041 RSI: 8c6b63e0143a RDI:
0640
[  256.490030] RBP: 8c6b657a5000 R08:  R09:
8c6935b19180
[  256.490031] R10: 8000 R11: 8c6b610e R12:

[  256.490033] R13: 8c6b657a535c R14: 0140093fe500 R15:
0041
[  256.490034] FS:  7fbafecfc400() GS:8c6b77c8()
knlGS:
[  256.490036] CS:  0010 DS:  ES:  CR0: 80050033
[  256.490037] CR2: 0640 CR3: 000263aa2000 CR4:
003406e0
[  256.490038] Call Trace:
[  256.490042]  
[  256.490048]  xsk_generic_rcv+0x190/0x2a0
[  256.490057]  xdp_do_generic_redirect+0x1f2/0x2e0
[  258.033361]  do_xdp_generic.part.0+0x313/0x4a0
[  258.033366]  __netif_receive_skb_core+0x1b5/0x1050
[  258.033369]  ? netif_rx_internal+0x41/0x100
[  258.033372]  __netif_receive_skb_one_core+0x3d/0xa0
[  258.033375]  process_backlog+0xa4/0x160
[  258.033377]  net_rx_action+0x148/0x3c0
[  258.033382]  __do_softirq+0xe6/0x2e9
[  258.033387]  ? handle_irq_event_percpu+0x72/0x80
[  258.033390]  irq_exit+0xa6/0xb0
[  258.033392]  do_IRQ+0x58/0xe0
[  258.033395]  common_interrupt+0xf/0xf
[  258.033402]  
[  258.583925] RIP: 0033:0x559c289a008b
[  258.583929] Code: 0f 87 59 02 00 00 85 d2 be 40 00 00 00 0f 84 54 01 00 00
44 8b a3 00 01 00 00 8b 83 84 00 00 00 ba 40 00 00 00 89 c5 44 29 e5 <83> fd 40
0f 47 ea 41 39 c4 74 ad 41 8d 0c 2c 89 8b 00 01 00 00 44
[  258.583930] RSP: 002b:7fbafecf8660 EFLAGS: 0246 ORIG_RAX:
ffda
[  258.583933] RAX: ff35 RBX: 000100214000 RCX:
7fbafecf8588
[  258.583934] RDX: 0040 RSI: 0040 RDI:
000100230f00
[  258.583935] RBP:  R08: 000100230f00 R09:
d808
[  258.583936] R10:  R11: 0001fe3e R12:
ff35
[  258.583937] R13: 7fbafecf8690 R14: 7fbafecf8f00 R15:
559c29969160
[  258.583940] Modules linked in: ipmi_devintf ipmi_msghandler igb_uio(OE) uio
ccm algif_aead cbc des_generic libdes ecb arc4 algif_skcipher cmac sha512_ssse3
sha512_generic md4 algif_hash af_alg snd_hda_codec_hdmi snd_hda_codec_realtek
snd_hda_codec_generic nls_ascii nls_cp437 intel_rapl_msr intel_rapl_common vfat
fat x86_pkg_temp_thermal coretemp kvm_intel kvm irqbypass i915 rtl8192cu
rtl_usb rtl8192c_common ghash_clmulni_intel rtlwifi snd_sof_pci
snd_sof_intel_hda_common mac80211 snd_sof_intel_hda snd_sof_intel_byt
snd_sof_intel_ipc snd_sof snd_sof_xtensa_dsp ledtrig_audio snd_soc_skl
snd_soc_hdac_hda snd_hda_ext_core snd_soc_sst_ipc snd_soc_sst_dsp
snd_soc_acpi_intel_match snd_soc_acpi snd_soc_core cfg80211 snd_compress
snd_hda_intel snd_intel_dspcfg aesni_intel snd_hda_codec snd_hda

[dpdk-dev] [Bug 533] stack corruption in mlx5_xstats_reset when number of stats changes

[bugzilla]

https://bugs.dpdk.org/show_bug.cgi?id=533

Bug ID: 533
   Summary: stack corruption in mlx5_xstats_reset when number of
stats changes
   Product: DPDK
   Version: 20.08
  Hardware: All
OS: All
Status: UNCONFIRMED
  Severity: normal
  Priority: Normal
 Component: ethdev
  Assignee: dev@dpdk.org
  Reporter: ralf.hoffm...@allegro-packets.com
  Target Milestone: ---

Created attachment 120
  --> https://bugs.dpdk.org/attachment.cgi?id=120&action=edit
Patch to fix stack corruption

I stumbled across a crash in the mellanox driver due to stack corruption.
The function mlx5_xstats_reset() uses a dynamically sized array on the stack
based on the last number of statistic values. Then it queries the actual number
of stats. If the returned value is larger than the previous number, it will
overwrite the stack frame including the return addresses usually resulting in a
crash.

In my case the initial value of xstats_ctrl->mlx5_stats_n was zero and the
return value of mlx5_os_get_stats_n() was 24 so it overwrote 96 bytes on the
stack. The problem became visible after the update to 20.08. Apparently some
statistic code has been refactored which now triggers this problem in our code
but the actual problem in the reset function exists for a long time. We are
calling  rte_eth_xstats_reset() before calling rte_eth_xstats_get() to get the
available statistics from the driver.

There are two problems in this function:
1. The array is created not based on the actual number of items, but the
previously known number of items.
2. The function mlx5_os_read_dev_counters() just gets a pointer to the array
without knowing its size making it unsafe to use.

I have attached a patch which works for me by using alloca instead. Since this
is not completely portable, another approach can be using a separate scope
block for the dynamically sized array.

If it matters, the card we used is MCX516A-CDAT

-- 
You are receiving this mail because:
You are the assignee for the bug.

Re: [dpdk-dev] [PATCH] ethdev: add rx offload to drop error packets

[Thomas Monjalon]

31/08/2020 19:00, Stephen Hemminger:
> On Mon, 31 Aug 2020 13:23:33 +0530
> Nipun Gupta  wrote:
> 
> > This change adds a RX offload capability where hardware can drop the
> > packets in case there is an error in the packet such as L3 checksum
> > error or L4 checksum.
> > 
> > Signed-off-by: Nipun Gupta 
> > Signed-off-by: Rohit Raj 
> > ---
> > +#define DEV_RX_OFFLOAD_ERR_PKT_DROP0x0010

Please add RTE_ prefix, even if older macros don't have it.
We could (in a separate effort) alias old ones with RTE_ prefixed names.

> Could/should this be an rte_flow action as well?

I feel rte_flow API is not appropriate here.
Ori, any opinion?

Re: [dpdk-dev] [PATCH] [RFC] cryptodev: move AES-GMAC to aead algorithms

[Zhang, Roy Fan]

> -Original Message-
> From: Kusztal, ArkadiuszX 
> Sent: Wednesday, July 29, 2020 3:22 PM
> To: dev@dpdk.org
> Cc: akhil.go...@nxp.com; Trahe, Fiona ;
> ano...@marvell.com; shal...@marvell.com; Doherty, Declan
> ; Zhang, Roy Fan ;
> Ananyev, Konstantin ; Kusztal, ArkadiuszX
> 
> Subject: [PATCH] [RFC] cryptodev: move AES-GMAC to aead algorithms
> 
> This is proposal to move AES-GMAC algorithm to AEAD set
> of algorithms. It is however not 100% conformant GMAC as instead of aad
> pointer
> data to be authenticated is passed normally and  aead.data.length field
> is used to specify length of data to be authenticated.
> Reason behind this move is that GMAC is variant of GCM so it may
> simplify implementations that are using these algorithms (mainly IPsec).
> AES-GMAC therefore needs to be removed from auth algorithms.
> 
> Signed-off-by: Arek Kusztal 

Acked-by: Fan Zhang 

Re: [dpdk-dev] [PATCH v2] doc: announce move of aes gmac algorithm to aead

[Thomas Monjalon]

31/08/2020 08:34, Kusztal, ArkadiuszX:
> From: Thomas Monjalon  
> > 05/08/2020 17:15, Arek Kusztal:
> > > This patch announces removal of RTE_CRYPTO_AUTH_AES_GMAC from
> > > rte_crypto_auth_algorithm and addition of RTE_CRYPTO_AEAD_AES_GMAC to
> > > rte_crypto_aead_algorithm.
> > > AES-GMAC is variation of AES-GCM algorithm with the difference that it
> > > does not perform encryption. As a matter of fact internally there is
> > > no difference between GMAC and GCM except for the way how data is
> > > passed.
> > > Moving GMAC to AEAD can simplify way of implementing this alogrithm
> > > for example in IPsec (RFC4543).
> > > 
> > > Signed-off-by: Arek Kusztal 
> > > ---
> > > --- a/doc/guides/rel_notes/deprecation.rst
> > > +++ b/doc/guides/rel_notes/deprecation.rst
> > > +* cryptodev: ``RTE_CRYPTO_AUTH_AES_GMAC`` will no longer be included
> > > +in
> > > +  ``enum rte_crypto_auth_algorithm``. It will be included in
> > > +  ``enum rte_crypto_aead_algorithm`` as ``RTE_CRYPTO_AEAD_AES_GMAC``.
> > 
> > I wonder whether this move shows a problem in classification of the crypto
> > algorithms.
> 
> [Arek] - it is not particularly bad that GMAC is auth algorithm, it really 
> depends on lib (openssl PMD internally uses conformant approach I have 
> suggested in other mail).
> But from what I currently see GMAC as AEAD is preferred way, I think this 
> subject may be back in future.

The strange thing is that AEAD is a kind of authentication, isn't it?
I would see it as a subset of auth algos.

> Anyway this proposal didn't meet its audience.
> Because of the lack of ack (3 required), it cannot be accepted.

Indeed. Why others did not approve?
What is the consequence?

Re: [dpdk-dev] 19.11.4 patches review and test

[Luca Boccassi]

On Tue, 2020-08-18 at 19:12 +0100, Luca Boccassi wrote:
> Hi all,
> 
> Here is a list of patches targeted for stable release 19.11.4.
> 
> The planned date for the final release is August 31st.
> 
> Please help with testing and validation of your use cases and report
> any issues/results with reply-all to this mail. For the final release
> the fixes and reported validations will be added to the release notes.
> 
> A release candidate tarball can be found at:
> 
> https://dpdk.org/browse/dpdk-stable/tag/?id=v19.11.4-rc1
> 
> These patches are located at branch 19.11 of dpdk-stable repo:
> https://dpdk.org/browse/dpdk-stable/
> 
> Thanks.
> 
> Luca Boccassi

Microsoft's regression tests are still running, delaying until Thursday
the 3rd. Apologies for any inconvenience.

-- 
Kind regards,
Luca Boccassi

[dpdk-dev] [PATCH] net/iavf: fix mismatch command

[Junyu Jiang]

The "command mismatch" warning shouldn't be triggered by
VIRTCHNL_OP_EVENT opcode, because the VIRTCHNL_OP_EVENT
opcode is used by PF notifies status change events to VF.
This patch fixed the issue.

Fixes: 837c2ed86e4c ("net/iavf: return error if opcode is mismatched")
Cc: sta...@dpdk.org

Signed-off-by: Junyu Jiang 
---
 drivers/net/iavf/iavf_vchnl.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/net/iavf/iavf_vchnl.c b/drivers/net/iavf/iavf_vchnl.c
index 33acea54a..331018f14 100644
--- a/drivers/net/iavf/iavf_vchnl.c
+++ b/drivers/net/iavf/iavf_vchnl.c
@@ -53,8 +53,11 @@ iavf_read_msg_from_pf(struct iavf_adapter *adapter, uint16_t 
buf_len,
opcode, vf->cmd_retval);
 
if (opcode != vf->pend_cmd) {
-   PMD_DRV_LOG(WARNING, "command mismatch, expect %u, get %u",
-   vf->pend_cmd, opcode);
+   if (opcode != VIRTCHNL_OP_EVENT) {
+   PMD_DRV_LOG(WARNING,
+   "command mismatch, expect %u, get %u",
+   vf->pend_cmd, opcode);
+   }
return IAVF_ERR_OPCODE_MISMATCH;
}
 
-- 
2.17.1

Re: [dpdk-dev] [PATCH] gro: add UDP GRO and VXLAN UDP GRO support

[yang_y_yi]

Jiayu, BTW, after I check it again, I think udp header length check is 
necessary, it is actually a sanity check io order to ensure it is indeed a udp 
packet, gro_tcp4.c did same thing.

At 2020-09-01 14:10:41, "yang_y_yi"  wrote:
>At 2020-09-01 12:27:29, "Hu, Jiayu"  wrote:
>>Hi Yi,
>>
>>This patch supports UDP and VxLAN/UDP, but both are in one patch.
>>It's too large, and please split it into small patches.
>
>Jiayu, thank you so much for your great review , I'll send v2 to split it into 
>two patches and fix your comments. Detailed replies for comments embedded, 
>please check them.
>
>>
>>Thanks,
>>Jiayu
>>
>>> -Original Message-
>>> From: yang_y...@163.com 
>>> Sent: Wednesday, July 1, 2020 2:48 PM
>>> To: dev@dpdk.org
>>> Cc: Hu, Jiayu ; tho...@monjalon.net;
>>> yangy...@inspur.com; yang_y...@163.com
>>> Subject: [PATCH] gro: add UDP GRO and VXLAN UDP GRO support
>>> 
>>> From: Yi Yang 
>>> 
>>> UDP GRO and VXLAN UDP GRO can help improve VM-to-VM
>>> UDP performance when VM is enabled UFO or GSO, GRO
>>> must be supported if GSO, UFO or VXLAN UFO is enabled
>>> , otherwise, performance gain will be hurt.
>>> 
>>> With this enabled in DPDK, OVS DPDK can leverage it
>>> to improve VM-to-VM UDP performance, this will make
>>> sure IP fragments will be reassembled once it is
>>> received from physical NIC.
>>> 
>>> Signed-off-by: Yi Yang 
>>> ---
>>>  lib/librte_gro/Makefile |   2 +
>>>  lib/librte_gro/gro_udp4.c   | 443 
>>>  lib/librte_gro/gro_udp4.h   | 296 +
>>>  lib/librte_gro/gro_vxlan_udp4.c | 556
>>> 
>>>  lib/librte_gro/gro_vxlan_udp4.h | 152 +++
>>>  lib/librte_gro/meson.build  |   2 +-
>>>  lib/librte_gro/rte_gro.c| 192 +++---
>>>  lib/librte_gro/rte_gro.h|   8 +-
>>>  8 files changed, 1617 insertions(+), 34 deletions(-)
>>>  create mode 100644 lib/librte_gro/gro_udp4.c
>>>  create mode 100644 lib/librte_gro/gro_udp4.h
>>>  create mode 100644 lib/librte_gro/gro_vxlan_udp4.c
>>>  create mode 100644 lib/librte_gro/gro_vxlan_udp4.h
>>> +
>>> +
>>> +/*
>>> + * update the packet length for the flushed packet.
>>> + */
>>> +static inline void
>>> +update_header(struct gro_udp4_item *item)
>>> +{
>>> +   struct rte_ipv4_hdr *ipv4_hdr;
>>> +   struct rte_mbuf *pkt = item->firstseg;
>>> +   uint16_t frag_offset;
>>> +
>>> +   ipv4_hdr = (struct rte_ipv4_hdr *)(rte_pktmbuf_mtod(pkt, char *) +
>>> +   pkt->l2_len);
>>> +   ipv4_hdr->total_length = rte_cpu_to_be_16(pkt->pkt_len -
>>> +   pkt->l2_len);
>>> +
>>> +   /* Clear MF bit if it is last fragment */
>>> +   if (item->is_last_frag) {
>>> +   frag_offset = rte_be_to_cpu_16(ipv4_hdr->fragment_offset);
>>> +   ipv4_hdr->fragment_offset =
>>> +   rte_cpu_to_be_16(frag_offset &
>>> ~RTE_IPV4_HDR_MF_FLAG);
>>> +   }
>>
>>Need to clear MF bit for non-last fragments, and we also need to clear offset 
>>value.
>
>For non-last fragment, MF (More Fragment) bit is necessary, why do you think 
>we need to clear MF bit for it? Only last fragment should clear MF bit. offset 
>value must be set correctly because it is a IP fragment.
>
>>
>>> +}
>>> +
>>> +int32_t
>>> +gro_udp4_reassemble(struct rte_mbuf *pkt,
>>> +   struct gro_udp4_tbl *tbl,
>>> +   uint64_t start_time)
>>> +{
>>> +   struct rte_ether_hdr *eth_hdr;
>>> +   struct rte_ipv4_hdr *ipv4_hdr;
>>> +   uint16_t udp_dl, ip_dl;
>>> +   uint16_t ip_id, hdr_len;
>>> +   uint16_t frag_offset = 0;
>>> +   uint8_t is_last_frag;
>>> +
>>> +   struct udp4_flow_key key;
>>> +   uint32_t cur_idx, prev_idx, item_idx;
>>> +   uint32_t i, max_flow_num, remaining_flow_num;
>>> +   int cmp;
>>> +   uint8_t find;
>>> +
>>> +   /*
>>> +* Don't process the packet whose UDP header length is not equal
>>> +* to 20.
>>> +*/
>>> +   if (unlikely(pkt->l4_len != UDP_HDRLEN))
>>> +   return -1;
>>
>>UDP header is fixed 8-byte. No need to check here.
>
>Agree, will remove it in v2.
>
>>
>>> +
>>> +   eth_hdr = rte_pktmbuf_mtod(pkt, struct rte_ether_hdr *);
>>> +   ipv4_hdr = (struct rte_ipv4_hdr *)((char *)eth_hdr + pkt->l2_len);
>>> +   hdr_len = pkt->l2_len + pkt->l3_len + pkt->l4_len;
>>> +
>>> +   /*
>>> +* Don't process non-fragment packet.
>>> +*/
>>> +   if (!is_ipv4_fragment(ipv4_hdr))
>>> +   return -1;
>>> +
>>> +   /*
>>> +* Don't process the packet whose payload length is less than or
>>> +* equal to 0.
>>> +*/
>>> +   udp_dl = pkt->pkt_len - hdr_len;
>>> +   if (udp_dl <= 0)
>>> +   return -1;
>>
>>Udp_dl is unit16_t which will not be negative.
>
>Good catch, I should use int16_t here, will do it in  v2.
>
>>
>>> +
>>> +   ip_dl = rte_be_to_cpu_16(ipv4_hdr->total_length) - pkt->l3_len;
>>> +   ip_id = rte_be_to_cpu_16(ipv4_hdr->packet_id);
>>> +   frag_offset = rte_be_to_cpu_16(ipv4_hdr->fragment_offset);
>>> +   is_last_frag = ((frag

Re: [dpdk-dev] [dpdk-stable] [PATCH v3] net/i40e: fix link status

[Sun, GuinanX]

Hi Ferruh

> -Original Message-
> From: Ferruh Yigit [mailto:ferruh.yi...@intel.com]
> Sent: Monday, August 31, 2020 9:24 PM
> To: Sun, GuinanX ; dev@dpdk.org
> Cc: Xing, Beilei ; Guo, Jia ;
> sta...@dpdk.org
> Subject: Re: [dpdk-stable] [PATCH v3] net/i40e: fix link status
> 
> On 8/6/2020 9:16 AM, Guinan Sun wrote:
> > If the PF driver supports the new speed reporting capabilities then
> > use link_event_adv instead of link_event to get the speed.
> >
> > Fixes: 2a73125b7041 ("i40evf: fix link info update")
> > Cc: sta...@dpdk.org
> >
> > Signed-off-by: Guinan Sun 
> > ---
> > v3:
> > * request the capability for i40evf
> > v2:
> > * modify commit log
> > * add code comments
> > * delete useless code
> > ---
> >  drivers/net/i40e/base/virtchnl.h  | 16 ++-
> > drivers/net/i40e/i40e_ethdev_vf.c | 45 ---
> >  2 files changed, 57 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/net/i40e/base/virtchnl.h
> > b/drivers/net/i40e/base/virtchnl.h
> > index 4f498ca45..9c64fd469 100644
> > --- a/drivers/net/i40e/base/virtchnl.h
> > +++ b/drivers/net/i40e/base/virtchnl.h
> > @@ -240,7 +240,8 @@ VIRTCHNL_CHECK_STRUCT_LEN(16,
> virtchnl_vsi_resource);
> >  #define VIRTCHNL_VF_OFFLOAD_ENCAP  0X0010
> >  #define VIRTCHNL_VF_OFFLOAD_ENCAP_CSUM 0X0020
> >  #define VIRTCHNL_VF_OFFLOAD_RX_ENCAP_CSUM  0X0040
> > -
> > +/* Define below the capability flags that are not offloads */
> > +#define VIRTCHNL_VF_CAP_ADV_LINK_SPEED 0x0080
> >  #define VF_BASE_MODE_OFFLOADS (VIRTCHNL_VF_OFFLOAD_L2 | \
> >VIRTCHNL_VF_OFFLOAD_VLAN | \
> >VIRTCHNL_VF_OFFLOAD_RSS_PF) @@ -536,10
> +537,23 @@ enum
> > virtchnl_event_codes {  struct virtchnl_pf_event {
> > enum virtchnl_event_codes event;
> > union {
> > +   /* If the PF driver does not support the new speed reporting
> > +* capabilities then use link_event else use link_event_adv to
> > +* get the speed and link information. The ability to understand
> > +* new speeds is indicated by setting the capability flag
> > +* VIRTCHNL_VF_CAP_ADV_LINK_SPEED in vf_cap_flags
> parameter
> > +* in virtchnl_vf_resource struct and can be used to determine
> > +* which link event struct to use below.
> > +*/
> > struct {
> > enum virtchnl_link_speed link_speed;
> > bool link_status;
> > } link_event;
> > +   struct {
> > +   /* link_speed provided in Mbps */
> > +   u32 link_speed;
> > +   u8 link_status;
> > +   } link_event_adv;
> > } event_data;
> >
> > int severity;
> > diff --git a/drivers/net/i40e/i40e_ethdev_vf.c
> > b/drivers/net/i40e/i40e_ethdev_vf.c
> > index 69cab8e73..ccf5d8c57 100644
> > --- a/drivers/net/i40e/i40e_ethdev_vf.c
> > +++ b/drivers/net/i40e/i40e_ethdev_vf.c
> > @@ -469,7 +469,8 @@ i40evf_get_vf_resource(struct rte_eth_dev *dev)
> >VIRTCHNL_VF_OFFLOAD_RSS_AQ |
> >VIRTCHNL_VF_OFFLOAD_RSS_REG |
> >VIRTCHNL_VF_OFFLOAD_VLAN |
> > -  VIRTCHNL_VF_OFFLOAD_RX_POLLING;
> > +  VIRTCHNL_VF_OFFLOAD_RX_POLLING |
> > +  VIRTCHNL_VF_CAP_ADV_LINK_SPEED;
> > args.in_args = (uint8_t *)∩︀
> > args.in_args_size = sizeof(caps);
> > } else {
> > @@ -1386,8 +1387,46 @@ i40evf_handle_pf_event(struct rte_eth_dev *dev,
> uint8_t *msg,
> > break;
> > case VIRTCHNL_EVENT_LINK_CHANGE:
> > PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE
> event");
> > -   vf->link_up = pf_msg->event_data.link_event.link_status;
> > -   vf->link_speed = pf_msg->event_data.link_event.link_speed;
> > +
> > +   if (vf->vf_res->vf_cap_flags &
> VIRTCHNL_VF_CAP_ADV_LINK_SPEED) {
> > +   vf->link_up =
> > +   pf_msg-
> >event_data.link_event_adv.link_status;
> > +
> > +   switch (pf_msg-
> >event_data.link_event_adv.link_speed) {
> > +   case ETH_SPEED_NUM_100M:
> > +   vf->link_speed = I40E_LINK_SPEED_100MB;
> > +   break;
> > +   case ETH_SPEED_NUM_1G:
> > +   vf->link_speed = I40E_LINK_SPEED_1GB;
> > +   break;
> > +   case ETH_SPEED_NUM_2_5G:
> > +   vf->link_speed = I40E_LINK_SPEED_2_5GB;
> > +   break;
> > +   case ETH_SPEED_NUM_5G:
> > +   vf->link_speed = I40E_LINK_SPEED_5GB;
> > +   break;
> > +   case ETH_SPEED_NUM_10G:
> > +   vf->link_speed = I40E_LINK_SPEED_10GB;
> > +   break;
> > +

Re: [dpdk-dev] [PATCH 2/2] config: allow overriding some build defaults

[Bruce Richardson]

On Tue, Sep 01, 2020 at 06:07:56AM +, Hemant Agrawal wrote:
> HI Bruce,
>   Will you please also add similar command examples in docs so that it 
> becomes easy for the developers to use meson?
> 
> Regards,
> Hemant
> 

I'll add a note in somewhere, but this is probably not something that we
want to be advertising too much. We are trying to move away from build-time
config so we want the defaults to be sane and try and avoid developers
asking the end-user to compile up DPDK with magic flags. That said, it
should be possible, and documented. :-)

/Bruce

> -Original Message-
> From: dev  On Behalf Of Ma, LihongX
> Sent: Tuesday, September 1, 2020 10:48 AM
> To: Richardson, Bruce ; dev@dpdk.org
> Cc: bl...@debian.org; Richardson, Bruce 
> Subject: Re: [dpdk-dev] [PATCH 2/2] config: allow overriding some build 
> defaults
> 
> Tested-by: lihongx Ma Before apply this patchset, set 
> config like DRTE_LIBRTE_I40E_QUEUE_NUM_PER_VM=8 will failed, After apply this 
> patchset, the the meson build can work find.
> Cmd like below:
> meson -Denable_kmods=True -Dlibdir=lib --default-library=static 
> -Dexamples=vmdq_dcb -Dc_args='-DRTE_LIBRTE_I40E_QUEUE_NUM_PER_VM=8' 
> config-test1 ninja -C config-test1
> 
> Regards,
> Ma,lihong
> 
> > -Original Message-
> > From: dev  On Behalf Of Bruce Richardson
> > Sent: Tuesday, August 25, 2020 7:45 PM
> > To: dev@dpdk.org
> > Cc: bl...@debian.org; Richardson, Bruce 
> > Subject: [dpdk-dev] [PATCH 2/2] config: allow overriding some build 
> > defaults
> > 
> > In case a developer uses CFLAGS to set different default values for 
> > the defines in the rte_config.h file, use #ifndef / #endif guards 
> > around the setting of those values. For those lines just "defining" a 
> > macro without assigning it a value to be used by code, drop the value 
> > argument (where
> > possible) to make it clearer that that is what is happening, since 
> > those don't need the #ifdef guard.
> > 
> > Signed-off-by: Bruce Richardson 
> > ---
> >  config/rte_config.h | 110 
> > +++-
> >  1 file changed, 99 insertions(+), 11 deletions(-)
> > 
> > diff --git a/config/rte_config.h b/config/rte_config.h index
> 

Re: [dpdk-dev] [PATCH 1/3] test/crypto: fix stat test

[Dybkowski, AdamX]

> -Original Message-
> From: dev  On Behalf Of Ruifeng Wang
> Sent: Monday, 31 August, 2020 10:52
> To: Doherty, Declan ; Trahe, Fiona
> ; Griffin, John ; Des O Dea
> ; Sergio Gonzalez Monroy
> 
> Cc: dev@dpdk.org; akhil.go...@nxp.com; honnappa.nagaraha...@arm.com;
> n...@arm.com; Ruifeng Wang ; sta...@dpdk.org
> Subject: [dpdk-dev] [PATCH 1/3] test/crypto: fix stat test
> 
> ut_setup / ut_teardown are invoked for each test case by test framework.
> The call inside test_stats is unnecessary and even incorrect.
> This caused double free of objects such as crypto operation structure.
> Trapped the issue when RTE_LIBRTE_MEMPOOL_DEBUG was enabled.
> Fix issue by removing ut_setup / ut_teardown from test case
> implementation.
> 
> Fixes: 202d375c60bc ("app/test: add cryptodev unit and performance tests")
> Cc: declan.dohe...@intel.com
> Cc: sta...@dpdk.org
> 
> Signed-off-by: Ruifeng Wang 

Tested-by: Adam Dybkowski 

[dpdk-dev] [PATCH v2] net: calculate checksums for packets with IPv4 options

[Michael Pfeiffer]

Currently, rte_ipv4_cksum() and rte_ipv4_udptcp_cksum() assume all IPv4
headers have sizeof(struct rte_ipv4_hdr) bytes. This is not true for
those (rare) packets with IPv4 options. Thus, both IPv4 and TCP/UDP
checksums are calculated wrong.

This patch fixes the issue by using the actual IPv4 header length from
the packet's IHL field.

Signed-off-by: Michael Pfeiffer 
---
v2:
* Use actual header length for sanity check as well.
* Introduce ip_hdr_len variable to increase readability.

 lib/librte_net/rte_ip.h | 21 +
 1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/lib/librte_net/rte_ip.h b/lib/librte_net/rte_ip.h
index fcd1eb342..bb55ebb6f 100644
--- a/lib/librte_net/rte_ip.h
+++ b/lib/librte_net/rte_ip.h
@@ -269,7 +269,7 @@ static inline uint16_t
 rte_ipv4_cksum(const struct rte_ipv4_hdr *ipv4_hdr)
 {
uint16_t cksum;
-   cksum = rte_raw_cksum(ipv4_hdr, sizeof(struct rte_ipv4_hdr));
+   cksum = rte_raw_cksum(ipv4_hdr, (ipv4_hdr->version_ihl & 0xf) * 4);
return (uint16_t)~cksum;
 }
 
@@ -302,6 +302,9 @@ rte_ipv4_phdr_cksum(const struct rte_ipv4_hdr *ipv4_hdr, 
uint64_t ol_flags)
uint16_t len;  /* L4 length. */
} psd_hdr;
 
+   uint32_t l3_len;
+   uint8_t ip_hdr_len;
+
psd_hdr.src_addr = ipv4_hdr->src_addr;
psd_hdr.dst_addr = ipv4_hdr->dst_addr;
psd_hdr.zero = 0;
@@ -309,9 +312,9 @@ rte_ipv4_phdr_cksum(const struct rte_ipv4_hdr *ipv4_hdr, 
uint64_t ol_flags)
if (ol_flags & PKT_TX_TCP_SEG) {
psd_hdr.len = 0;
} else {
-   psd_hdr.len = rte_cpu_to_be_16(
-   (uint16_t)(rte_be_to_cpu_16(ipv4_hdr->total_length)
-   - sizeof(struct rte_ipv4_hdr)));
+   l3_len = rte_be_to_cpu_16(ipv4_hdr->total_length);
+   ip_hdr_len = (ipv4_hdr->version_ihl & 0xf) * 4;
+   psd_hdr.len = rte_cpu_to_be_16((uint16_t)(l3_len - ip_hdr_len));
}
return rte_raw_cksum(&psd_hdr, sizeof(psd_hdr));
 }
@@ -319,8 +322,8 @@ rte_ipv4_phdr_cksum(const struct rte_ipv4_hdr *ipv4_hdr, 
uint64_t ol_flags)
 /**
  * Process the IPv4 UDP or TCP checksum.
  *
- * The IPv4 header should not contains options. The IP and layer 4
- * checksum must be set to 0 in the packet by the caller.
+ * The IP and layer 4 checksum must be set to 0 in the packet by
+ * the caller.
  *
  * @param ipv4_hdr
  *   The pointer to the contiguous IPv4 header.
@@ -334,12 +337,14 @@ rte_ipv4_udptcp_cksum(const struct rte_ipv4_hdr 
*ipv4_hdr, const void *l4_hdr)
 {
uint32_t cksum;
uint32_t l3_len, l4_len;
+   uint8_t ip_hdr_len;
 
+   ip_hdr_len = (ipv4_hdr->version_ihl & 0xf) * 4;
l3_len = rte_be_to_cpu_16(ipv4_hdr->total_length);
-   if (l3_len < sizeof(struct rte_ipv4_hdr))
+   if (l3_len < ip_hdr_len)
return 0;
 
-   l4_len = l3_len - sizeof(struct rte_ipv4_hdr);
+   l4_len = l3_len - ip_hdr_len;
 
cksum = rte_raw_cksum(l4_hdr, l4_len);
cksum += rte_ipv4_phdr_cksum(ipv4_hdr, 0);
-- 
2.28.0

[dpdk-dev] [PATCH v2 1/2] gro: add UDP GRO support

[yang_y_yi]

From: Yi Yang 

UDP GRO can help improve VM-to-VM UDP performance when
VM is enabled UFO or GSO, GRO must be supported if GSO
or UFO is enabled, otherwise, performance gain will be
hurt.

With this enabled in DPDK, OVS DPDK can leverage it
to improve VM-to-VM UDP performance, this will make
sure IP fragments will be reassembled once it is
received from physical NIC. It is very helpful in OVS
DPDK VLAN TSO case.

Signed-off-by: Yi Yang 
---
 lib/librte_gro/Makefile|   1 +
 lib/librte_gro/gro_udp4.c  | 442 +
 lib/librte_gro/gro_udp4.h  | 296 ++
 lib/librte_gro/meson.build |   2 +-
 lib/librte_gro/rte_gro.c   | 129 +
 lib/librte_gro/rte_gro.h   |   5 +-
 6 files changed, 841 insertions(+), 34 deletions(-)
 create mode 100644 lib/librte_gro/gro_udp4.c
 create mode 100644 lib/librte_gro/gro_udp4.h

diff --git a/lib/librte_gro/Makefile b/lib/librte_gro/Makefile
index e848687..41ec29e 100644
--- a/lib/librte_gro/Makefile
+++ b/lib/librte_gro/Makefile
@@ -15,6 +15,7 @@ EXPORT_MAP := rte_gro_version.map
 # source files
 SRCS-$(CONFIG_RTE_LIBRTE_GRO) += rte_gro.c
 SRCS-$(CONFIG_RTE_LIBRTE_GRO) += gro_tcp4.c
+SRCS-$(CONFIG_RTE_LIBRTE_GRO) += gro_udp4.c
 SRCS-$(CONFIG_RTE_LIBRTE_GRO) += gro_vxlan_tcp4.c
 
 # install this header file
diff --git a/lib/librte_gro/gro_udp4.c b/lib/librte_gro/gro_udp4.c
new file mode 100644
index 000..e5cf66a
--- /dev/null
+++ b/lib/librte_gro/gro_udp4.c
@@ -0,0 +1,442 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2020 Inspur Corporation
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include "gro_udp4.h"
+
+void *
+gro_udp4_tbl_create(uint16_t socket_id,
+   uint16_t max_flow_num,
+   uint16_t max_item_per_flow)
+{
+   struct gro_udp4_tbl *tbl;
+   size_t size;
+   uint32_t entries_num, i;
+
+   entries_num = max_flow_num * max_item_per_flow;
+   entries_num = RTE_MIN(entries_num, GRO_UDP4_TBL_MAX_ITEM_NUM);
+
+   if (entries_num == 0)
+   return NULL;
+
+   tbl = rte_zmalloc_socket(__func__,
+   sizeof(struct gro_udp4_tbl),
+   RTE_CACHE_LINE_SIZE,
+   socket_id);
+   if (tbl == NULL)
+   return NULL;
+
+   size = sizeof(struct gro_udp4_item) * entries_num;
+   tbl->items = rte_zmalloc_socket(__func__,
+   size,
+   RTE_CACHE_LINE_SIZE,
+   socket_id);
+   if (tbl->items == NULL) {
+   rte_free(tbl);
+   return NULL;
+   }
+   tbl->max_item_num = entries_num;
+
+   size = sizeof(struct gro_udp4_flow) * entries_num;
+   tbl->flows = rte_zmalloc_socket(__func__,
+   size,
+   RTE_CACHE_LINE_SIZE,
+   socket_id);
+   if (tbl->flows == NULL) {
+   rte_free(tbl->items);
+   rte_free(tbl);
+   return NULL;
+   }
+   /* INVALID_ARRAY_INDEX indicates an empty flow */
+   for (i = 0; i < entries_num; i++)
+   tbl->flows[i].start_index = INVALID_ARRAY_INDEX;
+   tbl->max_flow_num = entries_num;
+
+   return tbl;
+}
+
+void
+gro_udp4_tbl_destroy(void *tbl)
+{
+   struct gro_udp4_tbl *udp_tbl = tbl;
+
+   if (udp_tbl) {
+   rte_free(udp_tbl->items);
+   rte_free(udp_tbl->flows);
+   }
+   rte_free(udp_tbl);
+}
+
+static inline uint32_t
+find_an_empty_item(struct gro_udp4_tbl *tbl)
+{
+   uint32_t i;
+   uint32_t max_item_num = tbl->max_item_num;
+
+   for (i = 0; i < max_item_num; i++)
+   if (tbl->items[i].firstseg == NULL)
+   return i;
+   return INVALID_ARRAY_INDEX;
+}
+
+static inline uint32_t
+find_an_empty_flow(struct gro_udp4_tbl *tbl)
+{
+   uint32_t i;
+   uint32_t max_flow_num = tbl->max_flow_num;
+
+   for (i = 0; i < max_flow_num; i++)
+   if (tbl->flows[i].start_index == INVALID_ARRAY_INDEX)
+   return i;
+   return INVALID_ARRAY_INDEX;
+}
+
+static inline uint32_t
+insert_new_item(struct gro_udp4_tbl *tbl,
+   struct rte_mbuf *pkt,
+   uint64_t start_time,
+   uint32_t prev_idx,
+   uint16_t frag_offset,
+   uint8_t is_last_frag,
+   uint16_t ip_id)
+{
+   uint32_t item_idx;
+
+   item_idx = find_an_empty_item(tbl);
+   if (item_idx == INVALID_ARRAY_INDEX)
+   return INVALID_ARRAY_INDEX;
+
+   tbl->items[item_idx].firstseg = pkt;
+   tbl->items[item_idx].lastseg = rte_pktmbuf_lastseg(pkt);
+   tbl->items[item_idx].start_time = start_time;
+   tbl->items[item_idx].next_pkt_idx = INVALID_ARRAY_INDEX;
+   tbl->items[item_idx].frag_offset = frag_offset;
+   tbl->items[item_idx].is_last_frag = is_last_frag;
+   tbl->items[item_idx].ip_id = ip_id

[dpdk-dev] [PATCH v2 0/2] gro: add UDP GRO and VXLAN UDP GRO support

[yang_y_yi]

From: Yi Yang 

In case that UFO or GSO is enabled, GRO is very necessary,
especially for UDP, it is more so. Many NICs can't support
VXLAN UDP UFO/USO and VLAN UFO/USO, so UDP performance
improvement depends on GSO and GRO to a great extent.

This patch series added VLAN UDP GRO and VXLAN UDP GRO
support.

Yi Yang (2):
  gro: add UDP GRO support
  gro: add VXLAN UDP GRO support

 lib/librte_gro/Makefile |   2 +
 lib/librte_gro/gro_udp4.c   | 442 
 lib/librte_gro/gro_udp4.h   | 296 +
 lib/librte_gro/gro_vxlan_udp4.c | 556 
 lib/librte_gro/gro_vxlan_udp4.h | 152 +++
 lib/librte_gro/meson.build  |   2 +-
 lib/librte_gro/rte_gro.c| 192 +++---
 lib/librte_gro/rte_gro.h|   8 +-
 8 files changed, 1616 insertions(+), 34 deletions(-)
 create mode 100644 lib/librte_gro/gro_udp4.c
 create mode 100644 lib/librte_gro/gro_udp4.h
 create mode 100644 lib/librte_gro/gro_vxlan_udp4.c
 create mode 100644 lib/librte_gro/gro_vxlan_udp4.h

-- 
1.8.3.1

[dpdk-dev] [PATCH v2 2/2] gro: add VXLAN UDP GRO support

[yang_y_yi]

From: Yi Yang 

VXLAN UDP GRO can help improve VM-to-VM UDP performance
when VM is enabled UFO or GSO, GRO must be supported if
GSO or UFO is enabled, otherwise, performance gain will
be hurt.

With this enabled in DPDK, OVS DPDK can leverage it to
improve VM-to-VM UDP performance, this will make sure
IP fragments will be reassembled once it is received
from physical NIC. It is very helpful in OVS DPDK VXLAN
TSO case.

Signed-off-by: Yi Yang 
---
 lib/librte_gro/Makefile |   1 +
 lib/librte_gro/gro_vxlan_udp4.c | 556 
 lib/librte_gro/gro_vxlan_udp4.h | 152 +++
 lib/librte_gro/meson.build  |   2 +-
 lib/librte_gro/rte_gro.c|  75 +-
 lib/librte_gro/rte_gro.h|   3 +
 6 files changed, 782 insertions(+), 7 deletions(-)
 create mode 100644 lib/librte_gro/gro_vxlan_udp4.c
 create mode 100644 lib/librte_gro/gro_vxlan_udp4.h

diff --git a/lib/librte_gro/Makefile b/lib/librte_gro/Makefile
index 41ec29e..30dd8c7 100644
--- a/lib/librte_gro/Makefile
+++ b/lib/librte_gro/Makefile
@@ -17,6 +17,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_GRO) += rte_gro.c
 SRCS-$(CONFIG_RTE_LIBRTE_GRO) += gro_tcp4.c
 SRCS-$(CONFIG_RTE_LIBRTE_GRO) += gro_udp4.c
 SRCS-$(CONFIG_RTE_LIBRTE_GRO) += gro_vxlan_tcp4.c
+SRCS-$(CONFIG_RTE_LIBRTE_GRO) += gro_vxlan_udp4.c
 
 # install this header file
 SYMLINK-$(CONFIG_RTE_LIBRTE_GRO)-include += rte_gro.h
diff --git a/lib/librte_gro/gro_vxlan_udp4.c b/lib/librte_gro/gro_vxlan_udp4.c
new file mode 100644
index 000..a66eaf0
--- /dev/null
+++ b/lib/librte_gro/gro_vxlan_udp4.c
@@ -0,0 +1,556 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2020 Inspur Corporation
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "gro_vxlan_udp4.h"
+
+void *
+gro_vxlan_udp4_tbl_create(uint16_t socket_id,
+   uint16_t max_flow_num,
+   uint16_t max_item_per_flow)
+{
+   struct gro_vxlan_udp4_tbl *tbl;
+   size_t size;
+   uint32_t entries_num, i;
+
+   entries_num = max_flow_num * max_item_per_flow;
+   entries_num = RTE_MIN(entries_num, GRO_VXLAN_UDP4_TBL_MAX_ITEM_NUM);
+
+   if (entries_num == 0)
+   return NULL;
+
+   tbl = rte_zmalloc_socket(__func__,
+   sizeof(struct gro_vxlan_udp4_tbl),
+   RTE_CACHE_LINE_SIZE,
+   socket_id);
+   if (tbl == NULL)
+   return NULL;
+
+   size = sizeof(struct gro_vxlan_udp4_item) * entries_num;
+   tbl->items = rte_zmalloc_socket(__func__,
+   size,
+   RTE_CACHE_LINE_SIZE,
+   socket_id);
+   if (tbl->items == NULL) {
+   rte_free(tbl);
+   return NULL;
+   }
+   tbl->max_item_num = entries_num;
+
+   size = sizeof(struct gro_vxlan_udp4_flow) * entries_num;
+   tbl->flows = rte_zmalloc_socket(__func__,
+   size,
+   RTE_CACHE_LINE_SIZE,
+   socket_id);
+   if (tbl->flows == NULL) {
+   rte_free(tbl->items);
+   rte_free(tbl);
+   return NULL;
+   }
+
+   for (i = 0; i < entries_num; i++)
+   tbl->flows[i].start_index = INVALID_ARRAY_INDEX;
+   tbl->max_flow_num = entries_num;
+
+   return tbl;
+}
+
+void
+gro_vxlan_udp4_tbl_destroy(void *tbl)
+{
+   struct gro_vxlan_udp4_tbl *vxlan_tbl = tbl;
+
+   if (vxlan_tbl) {
+   rte_free(vxlan_tbl->items);
+   rte_free(vxlan_tbl->flows);
+   }
+   rte_free(vxlan_tbl);
+}
+
+static inline uint32_t
+find_an_empty_item(struct gro_vxlan_udp4_tbl *tbl)
+{
+   uint32_t max_item_num = tbl->max_item_num, i;
+
+   for (i = 0; i < max_item_num; i++)
+   if (tbl->items[i].inner_item.firstseg == NULL)
+   return i;
+   return INVALID_ARRAY_INDEX;
+}
+
+static inline uint32_t
+find_an_empty_flow(struct gro_vxlan_udp4_tbl *tbl)
+{
+   uint32_t max_flow_num = tbl->max_flow_num, i;
+
+   for (i = 0; i < max_flow_num; i++)
+   if (tbl->flows[i].start_index == INVALID_ARRAY_INDEX)
+   return i;
+   return INVALID_ARRAY_INDEX;
+}
+
+static inline uint32_t
+insert_new_item(struct gro_vxlan_udp4_tbl *tbl,
+   struct rte_mbuf *pkt,
+   uint64_t start_time,
+   uint32_t prev_idx,
+   uint16_t frag_offset,
+   uint8_t is_last_frag,
+   uint16_t outer_ip_id,
+   uint16_t ip_id,
+   uint8_t outer_is_atomic)
+{
+   uint32_t item_idx;
+
+   item_idx = find_an_empty_item(tbl);
+   if (unlikely(item_idx == INVALID_ARRAY_INDEX))
+   return INVALID_ARRAY_INDEX;
+
+   tbl->items[item_idx].inner_item.firstseg = pkt;
+   tbl->items[item_idx].inner_item.lastseg = rte_pktmbuf_lastseg(pkt);
+   tbl->items[item_idx].inner_item.start_time = start_ti

Re: [dpdk-dev] [PATCH] ethdev: add rx offload to drop error packets

[Nipun Gupta]

> -Original Message-
> From: Thomas Monjalon 
> Sent: Tuesday, September 1, 2020 1:39 PM
> To: Nipun Gupta ; Stephen Hemminger
> ; or...@mellanox.com
> Cc: dev@dpdk.org; ferruh.yi...@intel.com; arybche...@solarflare.com;
> Hemant Agrawal ; Rohit Raj ;
> olivier.m...@6wind.com
> Subject: Re: [dpdk-dev] [PATCH] ethdev: add rx offload to drop error packets
> 
> 31/08/2020 19:00, Stephen Hemminger:
> > On Mon, 31 Aug 2020 13:23:33 +0530
> > Nipun Gupta  wrote:
> >
> > > This change adds a RX offload capability where hardware can drop the
> > > packets in case there is an error in the packet such as L3 checksum
> > > error or L4 checksum.
> > >
> > > Signed-off-by: Nipun Gupta 
> > > Signed-off-by: Rohit Raj 
> > > ---
> > > +#define DEV_RX_OFFLOAD_ERR_PKT_DROP  0x0010
> 
> Please add RTE_ prefix, even if older macros don't have it.
> We could (in a separate effort) alias old ones with RTE_ prefixed names.

Agree, will update and send the change along with testpmd and dpaa2 driver 
change.

> 
> > Could/should this be an rte_flow action as well?
> 
> I feel rte_flow API is not appropriate here.
> Ori, any opinion?
> 

Re: [dpdk-dev] [dpdk-stable] [PATCH] net/tap: free mempool when closing

[Thomas Monjalon]

28/08/2020 14:51, wangyunjian:
> From: Thomas Monjalon [mailto:tho...@monjalon.net]
> > 06/08/2020 14:47, wangyunjian:
> > > From: Thomas Monjalon [mailto:tho...@monjalon.net]
> > > > 29/07/2020 13:35, wangyunjian:
> > > > > From: Yunjian Wang 
> > > > >
> > > > > When setup tx queues, we will create a mempool for the 'gso_ctx'.
> > > > > The mempool is not freed when closing tap device. If free the tap
> > > > > device and create it with different name, it will create a new
> > > > > mempool. This maybe cause an OOM.
> > > >
> > > > While at it, please look at implementing RTE_ETH_DEV_CLOSE_REMOVE
> > > > behaviour in tap. Thanks
> > > >
> > >
> > > I read the codes about tap device. Currently, the tap pmd doesn't use
> > > RTE_ETH_DEV_CLOSE_REMOVE flag.
> > 
> > I know. That's why I suggest to switch to RTE_ETH_DEV_CLOSE_REMOVE.
> > Please see this deprecation notice:
> > http://git.dpdk.org/dpdk/commit/?id=7efbaa7b4e423
> 
> OK, I have sent a patch to add this feature for tap device.
> 
> https://patchwork.dpdk.org/patch/76137/

Thanks a lot

Re: [dpdk-dev] [PATCH] net/tap: release port upon close

[Thomas Monjalon]

Please next time, use --cc-cmd devtools/get-maintainer.sh
so you will send it to Keith (Cc'ed) for review.


28/08/2020 14:37, wangyunjian:
> From: Yunjian Wang 
> 
> Set RTE_ETH_DEV_CLOSE_REMOVE upon probe so all the private
> resources for the port can be freed by rte_eth_dev_close().
> 
> Signed-off-by: Yunjian Wang 
> ---
>  drivers/net/tap/rte_eth_tap.c | 42 ++-
>  1 file changed, 26 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/net/tap/rte_eth_tap.c b/drivers/net/tap/rte_eth_tap.c
> index 339f24bf8..e059f7f2f 100644
> --- a/drivers/net/tap/rte_eth_tap.c
> +++ b/drivers/net/tap/rte_eth_tap.c
> @@ -72,6 +72,10 @@
>  
>  static int tap_devices_count;
>  
> +static const char *tuntap_types[ETH_TUNTAP_TYPE_MAX] = {
> + "UNKNOWN", "TUN", "TAP"
> +};
> +
>  static const char *valid_arguments[] = {
>   ETH_TAP_IFACE_ARG,
>   ETH_TAP_REMOTE_ARG,
> @@ -1040,6 +1044,9 @@ tap_dev_close(struct rte_eth_dev *dev)
>   struct pmd_process_private *process_private = dev->process_private;
>   struct rx_queue *rxq;
>  
> + if (process_private == NULL)
> + return;
> +
>   tap_link_set_down(dev);
>   if (internals->nlsk_fd != -1) {
>   tap_flow_flush(dev, NULL);
> @@ -1078,6 +1085,23 @@ tap_dev_close(struct rte_eth_dev *dev)
>* Since TUN device has no more opened file descriptors
>* it will be removed from kernel
>*/
> +
> + /* mac_addrs must not be freed alone because part of dev_private */
> + dev->data->mac_addrs = NULL;
> +
> + internals = dev->data->dev_private;
> + TAP_LOG(DEBUG, "Closing %s Ethernet device on numa %u",
> + tuntap_types[internals->type], rte_socket_id());
> +
> + if (internals->ioctl_sock != -1) {
> + close(internals->ioctl_sock);
> + internals->ioctl_sock = -1;
> + }
> + rte_free(dev->process_private);
> + dev->process_private = NULL;
> + if (tap_devices_count == 1)
> + rte_mp_action_unregister(TAP_MP_KEY);
> + tap_devices_count--;
>  }
>  
>  static void
> @@ -1800,10 +1824,6 @@ static const struct eth_dev_ops ops = {
>   .filter_ctrl= tap_dev_filter_ctrl,
>  };
>  
> -static const char *tuntap_types[ETH_TUNTAP_TYPE_MAX] = {
> - "UNKNOWN", "TUN", "TAP"
> -};
> -
>  static int
>  eth_dev_tap_create(struct rte_vdev_device *vdev, const char *tap_name,
>  char *remote_iface, struct rte_ether_addr *mac_addr,
> @@ -1854,7 +1874,7 @@ eth_dev_tap_create(struct rte_vdev_device *vdev, const 
> char *tap_name,
>   /* Setup some default values */
>   data = dev->data;
>   data->dev_private = pmd;
> - data->dev_flags = RTE_ETH_DEV_INTR_LSC;
> + data->dev_flags = RTE_ETH_DEV_INTR_LSC | RTE_ETH_DEV_CLOSE_REMOVE;
>   data->numa_node = numa_node;
>  
>   data->dev_link = pmd_link;
> @@ -2446,12 +2466,11 @@ static int
>  rte_pmd_tap_remove(struct rte_vdev_device *dev)
>  {
>   struct rte_eth_dev *eth_dev = NULL;
> - struct pmd_internals *internals;
>  
>   /* find the ethdev entry */
>   eth_dev = rte_eth_dev_allocated(rte_vdev_device_name(dev));
>   if (!eth_dev)
> - return -ENODEV;
> + return 0;
>  
>   /* mac_addrs must not be freed alone because part of dev_private */
>   eth_dev->data->mac_addrs = NULL;
> @@ -2461,15 +2480,6 @@ rte_pmd_tap_remove(struct rte_vdev_device *dev)
>  
>   tap_dev_close(eth_dev);
>  
> - internals = eth_dev->data->dev_private;
> - TAP_LOG(DEBUG, "Closing %s Ethernet device on numa %u",
> - tuntap_types[internals->type], rte_socket_id());
> -
> - close(internals->ioctl_sock);
> - rte_free(eth_dev->process_private);
> - if (tap_devices_count == 1)
> - rte_mp_action_unregister(TAP_MP_KEY);
> - tap_devices_count--;
>   rte_eth_dev_release_port(eth_dev);
>  
>   return 0;
> 

Re: [dpdk-dev] [PATCH v2] doc: announce move of aes gmac algorithm to aead

[Kusztal, ArkadiuszX]

> -Original Message-
> From: Thomas Monjalon 
> Sent: wtorek, 1 września 2020 10:19
> To: Kusztal, ArkadiuszX 
> Cc: dev@dpdk.org; akhil.go...@nxp.com; ano...@marvell.com; Doherty,
> Declan ; Trahe, Fiona ;
> asoma...@amd.com; rnagadhee...@marvell.com; hemant.agra...@nxp.com;
> De Lara Guarch, Pablo ; Zhang, Roy Fan
> 
> Subject: Re: [dpdk-dev] [PATCH v2] doc: announce move of aes gmac algorithm
> to aead
> 
> 31/08/2020 08:34, Kusztal, ArkadiuszX:
> > From: Thomas Monjalon 
> > > 05/08/2020 17:15, Arek Kusztal:
> > > > This patch announces removal of RTE_CRYPTO_AUTH_AES_GMAC from
> > > > rte_crypto_auth_algorithm and addition of
> RTE_CRYPTO_AEAD_AES_GMAC
> > > > to rte_crypto_aead_algorithm.
> > > > AES-GMAC is variation of AES-GCM algorithm with the difference
> > > > that it does not perform encryption. As a matter of fact
> > > > internally there is no difference between GMAC and GCM except for
> > > > the way how data is passed.
> > > > Moving GMAC to AEAD can simplify way of implementing this
> > > > alogrithm for example in IPsec (RFC4543).
> > > >
> > > > Signed-off-by: Arek Kusztal 
> > > > ---
> > > > --- a/doc/guides/rel_notes/deprecation.rst
> > > > +++ b/doc/guides/rel_notes/deprecation.rst
> > > > +* cryptodev: ``RTE_CRYPTO_AUTH_AES_GMAC`` will no longer be
> > > > +included in
> > > > +  ``enum rte_crypto_auth_algorithm``. It will be included in
> > > > +  ``enum rte_crypto_aead_algorithm`` as
> ``RTE_CRYPTO_AEAD_AES_GMAC``.
> > >
> > > I wonder whether this move shows a problem in classification of the
> > > crypto algorithms.
> >
> > [Arek] - it is not particularly bad that GMAC is auth algorithm, it really 
> > depends
> on lib (openssl PMD internally uses conformant approach I have suggested in
> other mail).
> > But from what I currently see GMAC as AEAD is preferred way, I think this
> subject may be back in future.
> 
> The strange thing is that AEAD is a kind of authentication, isn't it?
> I would see it as a subset of auth algos.

[Arek] - AEAD is indeed kind of authentication but only combined with 
encryption hence it is distinct category.
GMAC though is this peculiar case where there is no encryption even if 
algorithm is perfectly capable of it.
So GMAC potentially can be both.
> 
> > Anyway this proposal didn't meet its audience.
> > Because of the lack of ack (3 required), it cannot be accepted.
> 
> Indeed. Why others did not approve?
> What is the consequence?

[Arek] - rfc4543 is the one I see most of a confusion comes from (not all 
crypto protocols standardizes GMAC).
It specifies ENCR_NULL_AUTH_GMAC as "companion to AES GCM ESP" (1) and 
"combined mode algorithm" (3) -> so implementation may be facilitated
when GMAC and GCM would be in the same category as both share same features -> 
both "combined-algorithm" not "combined" ESP-GCM and integrity ESP-GMAC.
On the other hand  aforementioned rfc does not explicitly specify transport 
mode (AH) GMAC as "combined" but it seems that people probably care less as AH 
comes with its own set of problems (like natural dislike of NAT),
so probably using AEAD for it would not be a main issue.

> 

Re: [dpdk-dev] [EXT] Re: Ipsec-secgw packet processing

[Iremonger, Bernard]

Hi Satya,

Inline ipsec is only supported by the ixgbe NIC, it is not supported by the 
i40e or e1000 NIC's.

Regards,

Bernard.

> -Original Message-
> From: dev  On Behalf Of Pathak, Pravin
> Sent: Monday, August 31, 2020 1:47 PM
> To: Anoob Joseph ; satyavalli rama
> 
> Cc: dev@dpdk.org; us...@dpdk.org
> Subject: Re: [dpdk-dev] [EXT] Re: Ipsec-secgw packet processing
> 
> HI Satya -
> 
> Do you mean packets are not at all seen at the output OR packets are seen
> but data is not encrypted with just ESP headers added?
> This is what I see with Cypto NULL device and I think is expected behavior of
> NULL device.
> 
> Pravin
> 
> -Original Message-
> From: users  On Behalf Of Anoob Joseph
> Sent: Monday, August 31, 2020 1:17 AM
> To: satyavalli rama 
> Cc: dev@dpdk.org; us...@dpdk.org
> Subject: Re: [dpdk-users] [EXT] Re: [dpdk-dev] Ipsec-secgw packet
> processing
> 
> Hi Satya,
> 
> What you are attempting is lookaside crypto offload. So in that case the
> mbuf->ol_flags fields won’t be used. Also, I’m not sure what all algos are
> available in ‘crypto_null’. In lookaside crypto offload model, packets are
> received in ipsec-secgw and lookup happens in ipsec-secgw. The packets
> would be then submitted to cryptodev for crypto processing. The cryptodev
> would be able to process the packet only if the algos specified are supported
> by it. IPsec processing also would be done in the application (ie, ipsec-
> secgw). Once all this done, it is submitted to ethdev for Tx. You can check 
> the
> code and you will be able to figure out what I have described above.
> 
> Please do check ipsec-secgw documentation, if you haven’t done it already.
> 
> Thanks,
> Anoob
> 
> From: satyavalli rama 
> Sent: Wednesday, August 26, 2020 4:54 PM
> To: Anoob Joseph 
> Cc: dev@dpdk.org; us...@dpdk.org
> Subject: [EXT] Re: [dpdk-dev] Ipsec-secgw packet processing
> 
> External Email
> 
> Hi Anoob,
> Do you need any more info.. Kindly help us.. We are totally stuck..
> Thanks
> 
> On Wed, 19 Aug, 2020, 4:38 pm satyavalli rama,
> mailto:satyavalli.r...@gmail.com>> wrote:
> Hi Anoob
> 
> We are using the following hardware details,
> HOST: x722 (i40e) intel.
> VM: e1000 (82540) intel.
> 
> We have launched Virtual machine on host , and executing ipsec-secgw
> application on VM.
> 
> Please find below the CLI and configuration for TRANSPORT MODE.
> 
> CLI:
> 
> ./build/ipsec-secgw -l 0 -n 4 --socket-mem 1024,0 --vdev "crypto_null" -- -p
> 0x3 -P -u 0x1 --config="(0,0,0),(1,0,0)" -f ep0.cfg
> 
> #TRANSPORT:
> 
> #SP IPv4 rules
> sp ipv4 out esp protect 10 pri 1 dst
> 192.168.122.0/24 3A__192.168.122.0_24&d=DwMFaQ&c=nKjWec2b6R0mOyPaz7xtfQ&r=jPfB8
> rwwviRSxyLWs2n6B-
> WYLn1v9SyTMrT5EQqh2TU&m=UljpWEF8dI3bZcYKgM0AqP1ViNQsN-
> w4rZ1ZvTPc9Fw&s=UR36mFZdcNaE_w6k-
> jBS_XvmgSgAQzga2yAHh2jrIl4&e=> sport 0:65535 dport 0:65535
> 
> #SA rules
> sa out 10 cipher_algo aes-128-cbc cipher_key
> a1:a1:a1:a1:a1:a1:a1:a1:a1:a1:a1:\
> a1:a1:a1:a1:a1 auth_algo sha1-hmac auth_key
> a1:a1:a1:a1:a1:a1:a1:a1:a1:a1:a1:\
> a1:a1:a1:a1:a1:a1:a1:a1:a1 mode transport
> 
> #Routing rules
> rt ipv4 dst
> 192.168.122.0/24 3A__192.168.122.0_24&d=DwMFaQ&c=nKjWec2b6R0mOyPaz7xtfQ&r=jPfB8
> rwwviRSxyLWs2n6B-
> WYLn1v9SyTMrT5EQqh2TU&m=UljpWEF8dI3bZcYKgM0AqP1ViNQsN-
> w4rZ1ZvTPc9Fw&s=UR36mFZdcNaE_w6k-
> jBS_XvmgSgAQzga2yAHh2jrIl4&e=> port 1
> 
> 
> Please find below the CLI and configuration for TUNNEL MODE.
> 
> CLI:
> 
> ./build/ipsec-secgw -l 0 -n 4 --socket-mem 1024,0 --vdev "crypto_null" -- -p
> 0x3 -P -u 0x1 --config="(0,0,0),(1,0,0)" -f ep0.cfg
> 
> #TUNNEL End Point-0:
> 
> #SP IPv4 rules
> sp ipv4 out esp protect 5 pri 1 dst
> 192.168.122.0/24 3A__192.168.122.0_24&d=DwMFaQ&c=nKjWec2b6R0mOyPaz7xtfQ&r=jPfB8
> rwwviRSxyLWs2n6B-
> WYLn1v9SyTMrT5EQqh2TU&m=UljpWEF8dI3bZcYKgM0AqP1ViNQsN-
> w4rZ1ZvTPc9Fw&s=UR36mFZdcNaE_w6k-
> jBS_XvmgSgAQzga2yAHh2jrIl4&e=> sport 0:65535 dport 0:65535
> 
> #SA rules
> sa out 5 cipher_algo aes-128-cbc cipher_key 0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0 \
> auth_algo sha1-hmac auth_key 0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0:0 \ mode
> ipv4-tunnel src 192.168.122.96 dst 192.168.122.213
> 
> #Routing rules
> rt ipv4 dst
> 192.168.122.0/24 3A__192.168.122.0_24&d=DwMFaQ&c=nKjWec2b6R0mOyPaz7xtfQ&r=jPfB8
> rwwviRSxyLWs2n6B-
> WYLn1v9SyTMrT5EQqh2TU&m=UljpWEF8dI3bZcYKgM0AqP1ViNQsN-
> w4rZ1ZvTPc9Fw&s=UR36mFZdcNaE_w6k-
> jBS_XvmgSgAQzga2yAHh2jrIl4&e=> port 1
> 
> On Tue, 18 Aug, 2020, 4:29 pm Anoob Joseph,
> mailto:ano...@marvell.com>> wrote:
> Hi Satya,
> 
> Are you attempting to enable inline protocol (IPsec) functionality? If yes,
> which PMD (& h/w) are you using for the same?
> 
> Thanks,
> Anoob
> 
> > -Original Message-
> > From: dev mailto:dev-boun...@dpdk.org>> On
> > Behalf Of satyavalli rama
> >

Re: [dpdk-dev] [PATCH 2/2] net/ark: remove RTE_LIBRTE_ARK_PAD_TX configuration macro

[Ferruh Yigit]

On 8/27/2020 5:11 PM, Ed Czeck wrote:
> Replace behavior with RTE_LIBRTE_ARK_MIN_TX_PKTLEN
> with a default value of 0.
> Update documentation as needed.

Can you please use versions in the patches, it makes easier to follow them?
Like '[PATCH v4 2/2]', -v# option to "git format-patch" or "git send-email" does
it automatically for you.

Also a changelog history that documents what changes in each version helps, a
good place to put it is just below the '---' after sign off, this way although
it stays in the patch, it is removed automatically by git while merging the 
patch.

> 
> Signed-off-by: Ed Czeck 
> ---
>  doc/guides/nics/ark.rst | 16 
>  drivers/net/ark/ark_ethdev_tx.c | 43 ++---
>  drivers/net/ark/ark_logs.h  |  8 --
>  3 files changed, 35 insertions(+), 32 deletions(-)
> 
> diff --git a/doc/guides/nics/ark.rst b/doc/guides/nics/ark.rst
> index c3ffcbbc2..c7ed4095f 100644
> --- a/doc/guides/nics/ark.rst
> +++ b/doc/guides/nics/ark.rst
> @@ -126,11 +126,10 @@ Configuration Information
>  
>The following configuration options are available for the ARK PMD:
>  
> -   * **CONFIG_RTE_LIBRTE_ARK_PMD** (default y): Enables or disables inclusion
> - of the ARK PMD driver in the DPDK compilation.
> -

Hi Ed,

Can you leave out this piece in this patch? Yes it will go away eventually, but
it is not related logically to this change. Let's leave removing it to the patch
that removes Makefile which will be removing all relevant pieces as a whole.

> -   * **CONFIG_RTE_LIBRTE_ARK_PAD_TX** (default y):  When enabled TX
> - packets are padded to 60 bytes to support downstream MACS.
> +   * **RTE_LIBRTE_ARK_MIN_TX_PKTLEN** (default 0): Sets the minimum
> + packet length for tx packets to the FPGA.  Packets less than this
> + length are padded to meet the requirement. This allows padding to
> + be offloaded or remain in host software.
>  
>  
>  Building DPDK
> @@ -144,6 +143,13 @@ By default the ARK PMD library will be built into the 
> DPDK library.
>  For configuring and using UIO and VFIO frameworks, please also refer 
> :ref:`the
>  documentation that comes with DPDK suite `.
>  
> +To build with a non-zero minimum tx packet length, set the above macro in 
> your
> +CFLAGS environment prior to the meson build step. I.e.,
> +
> +export CFLAGS="-DRTE_LIBRTE_ARK_MIN_TX_PKTLEN=60"
> +meson build
> +
> +
>  Supported ARK RTL PCIe Instances
>  
>  
> diff --git a/drivers/net/ark/ark_ethdev_tx.c b/drivers/net/ark/ark_ethdev_tx.c
> index 72624deb3..52ce2ed41 100644
> --- a/drivers/net/ark/ark_ethdev_tx.c
> +++ b/drivers/net/ark/ark_ethdev_tx.c
> @@ -14,6 +14,11 @@
>  #define ARK_TX_META_OFFSET (RTE_PKTMBUF_HEADROOM - ARK_TX_META_SIZE)
>  #define ARK_TX_MAX_NOCHAIN (RTE_MBUF_DEFAULT_DATAROOM)
>  
> +#ifndef RTE_LIBRTE_ARK_MIN_TX_PKTLEN
> +#define ARK_MIN_TX_PKTLEN 0
> +#else
> +#define ARK_MIN_TX_PKTLEN RTE_LIBRTE_ARK_MIN_TX_PKTLEN
> +#endif
>  
>  /* * 
> */
>  struct ark_tx_queue {
> @@ -104,28 +109,28 @@ eth_ark_xmit_pkts(void *vtxq, struct rte_mbuf 
> **tx_pkts, uint16_t nb_pkts)
>++nb) {
>   mbuf = tx_pkts[nb];
>  
> - if (ARK_TX_PAD_TO_60) {
> - if (unlikely(rte_pktmbuf_pkt_len(mbuf) < 60)) {
> - /* this packet even if it is small can be split,
> -  * be sure to add to the end mbuf
> +#if ARK_MIN_TX_PKTLEN != 0


Previous "if (...)" approach was better, compiler was checking the code
independent from 'RTE_LIBRTE_ARK_MIN_TX_PKTLEN' defined or not, and compiler was
optimizing out the code if it is not defined.
With the '#if' macro, we are losing the compiler check.

If there is no explicit reason, can you keep the old behavior here?

Re: [dpdk-dev] [PATCH v2] net/hinic: fix secondary process's using coredump.

[Ferruh Yigit]

On 8/8/2020 8:45 AM, liqingqing wrote:
> fix coredump when secondary process using the hinic port.
> the reason is that during the stage of
> secondary process port initialization,
> it lack the initialization of "eth_dev->dev_ops".
> 
> Signed-off-by: liqingqing 

Hi,

Overall patch looks good but can you please add your name and surname to the
sign off, to make it following syntax:
Signed-off-by: Name Surname 

Also what do you think about following patch title:
"net/hinic: fix crash in secondary process"


> ---
> v2:  solve the coding style issue.
> ---
>  drivers/net/hinic/hinic_pmd_ethdev.c | 21 -
>  1 file changed, 12 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/net/hinic/hinic_pmd_ethdev.c 
> b/drivers/net/hinic/hinic_pmd_ethdev.c
> index 67e6afcf7..26c6098d3 100644
> --- a/drivers/net/hinic/hinic_pmd_ethdev.c
> +++ b/drivers/net/hinic/hinic_pmd_ethdev.c
> @@ -3060,15 +3060,6 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)
>   int rc;
> 
>   pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
> -
> - /* EAL is SECONDARY and eth_dev is already created */
> - if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
> - PMD_DRV_LOG(INFO, "Initialize %s in secondary process",
> - eth_dev->data->name);
> -
> - return 0;
> - }
> -
>   nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
>   memset(nic_dev, 0, sizeof(*nic_dev));
> 
> @@ -3206,6 +3197,18 @@ static int hinic_dev_init(struct rte_eth_dev *eth_dev)
>   eth_dev->rx_pkt_burst = hinic_recv_pkts;
>   eth_dev->tx_pkt_burst = hinic_xmit_pkts;
> 
> + /* EAL is SECONDARY and eth_dev is already created */
> + if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
> + PMD_DRV_LOG(INFO, "Initialize %s in secondary process", 
> eth_dev->data->name);
> +
> + struct hinic_nic_dev *nic_dev = 
> HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
> + if (HINIC_IS_VF(nic_dev->hwdev))
> + eth_dev->dev_ops = &hinic_pmd_vf_ops;
> + else
> + eth_dev->dev_ops = &hinic_pmd_ops;
> + return 0;
> + }
> +
>   return hinic_func_init(eth_dev);
>  }
> 

[dpdk-dev] [PATCH v1 03/42] net/txgbe: add device init and uninit

[Jiawen Wu]

Add basic init and uninit function, registers and some macro definitions 
prepare for hardware infrastructure.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/meson.build|3 +-
 drivers/net/txgbe/base/txgbe.h|2 +
 drivers/net/txgbe/base/txgbe_eeprom.c |   39 +
 drivers/net/txgbe/base/txgbe_eeprom.h |   11 +
 drivers/net/txgbe/base/txgbe_hw.c |   32 +
 drivers/net/txgbe/base/txgbe_hw.h |   16 +
 drivers/net/txgbe/base/txgbe_osdep.h  |  184 +++
 drivers/net/txgbe/base/txgbe_regs.h   | 1895 +
 drivers/net/txgbe/base/txgbe_type.h   |  115 ++
 drivers/net/txgbe/meson.build |2 +
 drivers/net/txgbe/txgbe_ethdev.c  |  256 +++-
 drivers/net/txgbe/txgbe_ethdev.h  |   23 +
 drivers/net/txgbe/txgbe_pf.c  |   34 +
 drivers/net/txgbe/txgbe_rxtx.c|   45 +
 drivers/net/txgbe/txgbe_rxtx.h|   24 +
 15 files changed, 2678 insertions(+), 3 deletions(-)
 create mode 100644 drivers/net/txgbe/base/txgbe_eeprom.c
 create mode 100644 drivers/net/txgbe/base/txgbe_eeprom.h
 create mode 100644 drivers/net/txgbe/base/txgbe_hw.c
 create mode 100644 drivers/net/txgbe/base/txgbe_hw.h
 create mode 100644 drivers/net/txgbe/base/txgbe_osdep.h
 create mode 100644 drivers/net/txgbe/base/txgbe_regs.h
 create mode 100644 drivers/net/txgbe/txgbe_pf.c
 create mode 100644 drivers/net/txgbe/txgbe_rxtx.c
 create mode 100644 drivers/net/txgbe/txgbe_rxtx.h

diff --git a/drivers/net/txgbe/base/meson.build 
b/drivers/net/txgbe/base/meson.build
index 8cc8395d1..72f1e73c9 100644
--- a/drivers/net/txgbe/base/meson.build
+++ b/drivers/net/txgbe/base/meson.build
@@ -2,7 +2,8 @@
 # Copyright(c) 2015-2020
 
 sources = [
-
+   'txgbe_eeprom.c',
+   'txgbe_hw.c',
 ]
 
 error_cflags = ['-Wno-unused-value',
diff --git a/drivers/net/txgbe/base/txgbe.h b/drivers/net/txgbe/base/txgbe.h
index 9aee9738a..32867f5aa 100644
--- a/drivers/net/txgbe/base/txgbe.h
+++ b/drivers/net/txgbe/base/txgbe.h
@@ -6,5 +6,7 @@
 #define _TXGBE_H_
 
 #include "txgbe_type.h"
+#include "txgbe_eeprom.h"
+#include "txgbe_hw.h"
 
 #endif /* _TXGBE_H_ */
diff --git a/drivers/net/txgbe/base/txgbe_eeprom.c 
b/drivers/net/txgbe/base/txgbe_eeprom.c
new file mode 100644
index 0..287233dda
--- /dev/null
+++ b/drivers/net/txgbe/base/txgbe_eeprom.c
@@ -0,0 +1,39 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2015-2020
+ */
+
+#include "txgbe_hw.h"
+
+#include "txgbe_eeprom.h"
+
+/**
+ *  txgbe_init_eeprom_params - Initialize EEPROM params
+ *  @hw: pointer to hardware structure
+ *
+ *  Initializes the EEPROM parameters txgbe_rom_info within the
+ *  txgbe_hw struct in order to set up EEPROM access.
+ **/
+s32 txgbe_init_eeprom_params(struct txgbe_hw *hw)
+{
+   RTE_SET_USED(hw);
+
+   return 0;
+}
+
+/**
+ *  txgbe_validate_eeprom_checksum - Validate EEPROM checksum
+ *  @hw: pointer to hardware structure
+ *  @checksum_val: calculated checksum
+ *
+ *  Performs checksum calculation and validates the EEPROM checksum.  If the
+ *  caller does not need checksum_val, the value can be NULL.
+ **/
+s32 txgbe_validate_eeprom_checksum(struct txgbe_hw *hw,
+  u16 *checksum_val)
+{
+   RTE_SET_USED(hw);
+   RTE_SET_USED(checksum_val);
+
+   return 0;
+}
+
diff --git a/drivers/net/txgbe/base/txgbe_eeprom.h 
b/drivers/net/txgbe/base/txgbe_eeprom.h
new file mode 100644
index 0..e845492f3
--- /dev/null
+++ b/drivers/net/txgbe/base/txgbe_eeprom.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2015-2020
+ */
+
+#ifndef _TXGBE_EEPROM_H_
+#define _TXGBE_EEPROM_H_
+
+s32 txgbe_init_eeprom_params(struct txgbe_hw *hw);
+s32 txgbe_validate_eeprom_checksum(struct txgbe_hw *hw, u16 *checksum_val);
+
+#endif /* _TXGBE_EEPROM_H_ */
diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
new file mode 100644
index 0..17ccd0b65
--- /dev/null
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2015-2020
+ */
+
+#include "txgbe_type.h"
+#include "txgbe_eeprom.h"
+#include "txgbe_hw.h"
+
+s32 txgbe_set_rar(struct txgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
+ u32 enable_addr)
+{
+   RTE_SET_USED(hw);
+   RTE_SET_USED(index);
+   RTE_SET_USED(addr);
+   RTE_SET_USED(vmdq);
+   RTE_SET_USED(enable_addr);
+
+   return 0;
+}
+
+s32 txgbe_init_shared_code(struct txgbe_hw *hw)
+{
+   RTE_SET_USED(hw);
+   return 0;
+}
+
+s32 txgbe_init_hw(struct txgbe_hw *hw)
+{
+   RTE_SET_USED(hw);
+   return 0;
+}
+
diff --git a/drivers/net/txgbe/base/txgbe_hw.h 
b/drivers/net/txgbe/base/txgbe_hw.h
new file mode 100644
index 0..cd738245f
--- /dev/null
+++ b/drivers/net/txgbe/base/txgbe_hw.h
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2015-2020
+ */
+
+#ifndef _TXGBE_HW_H_
+#define _TXGBE_HW_H_
+
+#include "txgbe_type.h"
+
+s

[dpdk-dev] [PATCH v1 01/42] net/txgbe: add build and doc infrastructure

[Jiawen Wu]

Adding bare minimum PMD library and doc build infrastructure and claim the 
maintainership for txgbe PMD.

Signed-off-by: Jiawen Wu 
---
 MAINTAINERS |  7 +++
 config/common_base  | 10 +++
 doc/guides/nics/features/txgbe.ini  | 52 
 doc/guides/nics/txgbe.rst   | 67 +
 drivers/net/meson.build |  1 +
 drivers/net/txgbe/meson.build   |  9 +++
 drivers/net/txgbe/rte_pmd_txgbe_version.map |  3 +
 drivers/net/txgbe/txgbe_ethdev.c|  4 ++
 drivers/net/txgbe/txgbe_ethdev.h|  4 ++
 mk/rte.app.mk   |  1 +
 10 files changed, 158 insertions(+)
 create mode 100644 doc/guides/nics/features/txgbe.ini
 create mode 100644 doc/guides/nics/txgbe.rst
 create mode 100644 drivers/net/txgbe/meson.build
 create mode 100644 drivers/net/txgbe/rte_pmd_txgbe_version.map
 create mode 100644 drivers/net/txgbe/txgbe_ethdev.c
 create mode 100644 drivers/net/txgbe/txgbe_ethdev.h

diff --git a/MAINTAINERS b/MAINTAINERS
index ed163f5d5..155ae17c4 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -882,6 +882,13 @@ F: drivers/net/vmxnet3/
 F: doc/guides/nics/vmxnet3.rst
 F: doc/guides/nics/features/vmxnet3.ini
 
+Wangxun txgbe
+M: Jiawen Wu 
+M: Jian Wang 
+F: drivers/net/txgbe/
+F: doc/guides/nics/txgbe.rst
+F: doc/guides/nics/features/txgbe.ini
+
 Vhost-user
 M: Maxime Coquelin 
 M: Chenbo Xia 
diff --git a/config/common_base b/config/common_base
index fbf0ee70c..037aea6a7 100644
--- a/config/common_base
+++ b/config/common_base
@@ -389,6 +389,16 @@ CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD=n
 CONFIG_RTE_IBVERBS_LINK_DLOPEN=n
 CONFIG_RTE_IBVERBS_LINK_STATIC=n
 
+#
+# Compile burst-oriented TXGBE PMD driver
+#
+CONFIG_RTE_LIBRTE_TXGBE_PMD=y
+CONFIG_RTE_LIBRTE_TXGBE_DEBUG_RX=n
+CONFIG_RTE_LIBRTE_TXGBE_DEBUG_TX=n
+CONFIG_RTE_LIBRTE_TXGBE_DEBUG_TX_FREE=n
+CONFIG_RTE_LIBRTE_TXGBE_PF_DISABLE_STRIP_CRC=n
+CONFIG_RTE_LIBRTE_TXGBE_BYPASS=n
+
 #
 # Compile burst-oriented Netronome NFP PMD driver
 #
diff --git a/doc/guides/nics/features/txgbe.ini 
b/doc/guides/nics/features/txgbe.ini
new file mode 100644
index 0..4de458669
--- /dev/null
+++ b/doc/guides/nics/features/txgbe.ini
@@ -0,0 +1,52 @@
+;
+; Supported features of the 'txgbe' network poll mode driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Speed capabilities   = Y
+Link status  = Y
+Link status event= Y
+Rx interrupt = Y
+Queue start/stop = Y
+MTU update   = Y
+Jumbo frame  = Y
+Scattered Rx = Y
+LRO  = Y
+TSO  = Y
+Promiscuous mode = Y
+Allmulticast mode= Y
+Unicast MAC filter   = Y
+Multicast MAC filter = Y
+RSS hash = Y
+RSS key update   = Y
+RSS reta update  = Y
+DCB  = Y
+VLAN filter  = Y
+Flow control = Y
+Flow API = Y
+Rate limitation  = Y
+Traffic mirroring= Y
+Inline crypto= Y
+CRC offload  = P
+VLAN offload = P
+QinQ offload = P
+L3 checksum offload  = P
+L4 checksum offload  = P
+MACsec offload   = P
+Inner L3 checksum= P
+Inner L4 checksum= P
+Packet type parsing  = Y
+Timesync = Y
+Rx descriptor status = Y
+Tx descriptor status = Y
+Basic stats  = Y
+Extended stats   = Y
+Stats per queue  = Y
+FW version   = Y
+EEPROM dump  = Y
+Module EEPROM dump   = Y
+Multiprocess aware   = Y
+BSD nic_uio  = Y
+Linux UIO= Y
+Linux VFIO   = Y
diff --git a/doc/guides/nics/txgbe.rst b/doc/guides/nics/txgbe.rst
new file mode 100644
index 0..133e17bc0
--- /dev/null
+++ b/doc/guides/nics/txgbe.rst
@@ -0,0 +1,67 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright(c) 2015-2020.
+
+TXGBE Poll Mode Driver
+==
+
+The TXGBE PMD (librte_pmd_txgbe) provides poll mode driver support
+for Wangxun 10 Gigabit Ethernet NICs.
+
+Features
+
+
+- Multiple queues for TX and RX
+- Receiver Side Scaling (RSS)
+- MAC/VLAN filtering
+- Packet type information
+- Checksum offload
+- VLAN/QinQ stripping and inserting
+- TSO offload
+- Promiscuous mode
+- Multicast mode
+- Port hardware statistics
+- Jumbo frames
+- Link state information
+- Link flow control
+- Interrupt mode for RX
+- Scattered and gather for TX and RX
+- DCB
+- IEEE 1588
+- FW version
+- LRO
+- Generic flow API
+
+Prerequisites
+-
+
+- Learning about Wangxun 10 Gigabit Ethernet NICs using
+  ``_.
+
+- Follow the DPDK :ref:`Getting Started Guide for Linux ` to setup 
the basic DPDK environment.
+
+Pre-Installation Configuration
+--
+
+Config File Options
+~~~
+
+The following options can be modified in the ``config`` file.
+
+- ``CONFIG_RTE_LIBRTE_TXGBE_PMD`` (default ``y``)
+
+  Toggle compilation of the ``

[dpdk-dev] [PATCH v1 04/42] net/txgbe: add error types and dummy function

[Jiawen Wu]

Add error types and dummy function.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_dummy.h  | 739 ++
 drivers/net/txgbe/base/txgbe_status.h | 122 +
 drivers/net/txgbe/base/txgbe_type.h   | 263 -
 3 files changed, 1123 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/txgbe/base/txgbe_dummy.h
 create mode 100644 drivers/net/txgbe/base/txgbe_status.h

diff --git a/drivers/net/txgbe/base/txgbe_dummy.h 
b/drivers/net/txgbe/base/txgbe_dummy.h
new file mode 100644
index 0..2039fa596
--- /dev/null
+++ b/drivers/net/txgbe/base/txgbe_dummy.h
@@ -0,0 +1,739 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2015-2020
+ */
+
+#ifndef _TXGBE_TYPE_DUMMY_H_
+#define _TXGBE_TYPE_DUMMY_H_
+
+#ifdef TUP
+#elif defined(__GNUC__)
+#define TUP(x) x##_unused __attribute__((unused))
+#elif defined(__LCLINT__)
+#define TUP(x) x /*@unused@*/
+#else
+#define TUP(x) x
+#endif /*TUP*/
+#define TUP0 TUP(p0)
+#define TUP1 TUP(p1)
+#define TUP2 TUP(p2)
+#define TUP3 TUP(p3)
+#define TUP4 TUP(p4)
+#define TUP5 TUP(p5)
+#define TUP6 TUP(p6)
+#define TUP7 TUP(p7)
+#define TUP8 TUP(p8)
+#define TUP9 TUP(p9)
+
+/* struct txgbe_bus_operations */
+static inline s32 txgbe_bus_get_bus_info_dummy(struct txgbe_hw *TUP0)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline void txgbe_bus_set_lan_id_dummy(struct txgbe_hw *TUP0)
+{
+   return;
+}
+/* struct txgbe_rom_operations */
+static inline s32 txgbe_rom_init_params_dummy(struct txgbe_hw *TUP0)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_rom_read16_dummy(struct txgbe_hw *TUP0, u32 TUP1, u16 
*TUP2)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_rom_readw_buffer_dummy(struct txgbe_hw *TUP0, u32 
TUP1, u32 TUP2, void *TUP3)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_rom_readw_sw_dummy(struct txgbe_hw *TUP0, u32 TUP1, 
u16 *TUP2)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_rom_read32_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 
*TUP2)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_rom_read_buffer_dummy(struct txgbe_hw *TUP0, u32 TUP1, 
u32 TUP2, void *TUP3)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_rom_write16_dummy(struct txgbe_hw *TUP0, u32 TUP1, u16 
TUP2)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_rom_writew_buffer_dummy(struct txgbe_hw *TUP0, u32 
TUP1, u32 TUP2, void *TUP3)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_rom_writew_sw_dummy(struct txgbe_hw *TUP0, u32 TUP1, 
u16 TUP2)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_rom_write32_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 
TUP2)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_rom_write_buffer_dummy(struct txgbe_hw *TUP0, u32 
TUP1, u32 TUP2, void *TUP3)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_rom_validate_checksum_dummy(struct txgbe_hw *TUP0, u16 
*TUP1)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_rom_update_checksum_dummy(struct txgbe_hw *TUP0)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_rom_calc_checksum_dummy(struct txgbe_hw *TUP0)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+
+/* struct txgbe_mac_operations */
+static inline s32 txgbe_mac_init_hw_dummy(struct txgbe_hw *TUP0)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_mac_reset_hw_dummy(struct txgbe_hw *TUP0)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_mac_start_hw_dummy(struct txgbe_hw *TUP0)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_mac_stop_hw_dummy(struct txgbe_hw *TUP0)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_mac_clear_hw_cntrs_dummy(struct txgbe_hw *TUP0)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline void txgbe_mac_enable_relaxed_ordering_dummy(struct txgbe_hw 
*TUP0)
+{
+   return;
+}
+static inline u64 txgbe_mac_get_supported_physical_layer_dummy(struct txgbe_hw 
*TUP0)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_mac_get_mac_addr_dummy(struct txgbe_hw *TUP0, u8 *TUP1)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_mac_get_san_mac_addr_dummy(struct txgbe_hw *TUP0, u8 
*TUP1)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_mac_set_san_mac_addr_dummy(struct txgbe_hw *TUP0, u8 
*TUP1)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_mac_get_device_caps_dummy(struct txgbe_hw *TUP0, u16 
*TUP1)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_mac_get_wwn_prefix_dummy(struct txgbe_hw *TUP0, u16 
*TUP1, u16 *TUP2)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_mac_get_fcoe_boot_status_dummy(struct txgbe_hw *TUP0, 
u16 *TUP1)
+{
+   return TXGBE_ERR_OPS_DUMMY;
+}
+static inline s32 txgbe_mac_read_analog_reg8_dummy(struct txgbe_hw *TUP0, u32 
TUP1, u8 *TUP2)
+{
+   return TXG

[dpdk-dev] [PATCH v1 02/42] net/txgbe: add ethdev probe and remove

[Jiawen Wu]

add basic PCIe ethdev probe and remove.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/meson.build   |  21 +++
 drivers/net/txgbe/base/txgbe.h   |  10 ++
 drivers/net/txgbe/base/txgbe_devids.h|  40 ++
 drivers/net/txgbe/base/txgbe_type.h  |  14 ++
 drivers/net/txgbe/meson.build|   5 +
 drivers/net/txgbe/txgbe_ethdev.c | 161 +++
 drivers/net/txgbe/txgbe_ethdev.h |  37 ++
 drivers/net/txgbe/txgbe_logs.h   | 123 +
 drivers/net/txgbe/txgbe_vf_representor.c |  27 
 9 files changed, 438 insertions(+)
 create mode 100644 drivers/net/txgbe/base/meson.build
 create mode 100644 drivers/net/txgbe/base/txgbe.h
 create mode 100644 drivers/net/txgbe/base/txgbe_devids.h
 create mode 100644 drivers/net/txgbe/base/txgbe_type.h
 create mode 100644 drivers/net/txgbe/txgbe_logs.h
 create mode 100644 drivers/net/txgbe/txgbe_vf_representor.c

diff --git a/drivers/net/txgbe/base/meson.build 
b/drivers/net/txgbe/base/meson.build
new file mode 100644
index 0..8cc8395d1
--- /dev/null
+++ b/drivers/net/txgbe/base/meson.build
@@ -0,0 +1,21 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(c) 2015-2020
+
+sources = [
+
+]
+
+error_cflags = ['-Wno-unused-value',
+   '-Wno-unused-parameter',
+   '-Wno-unused-but-set-variable']
+c_args = cflags
+foreach flag: error_cflags
+   if cc.has_argument(flag)
+   c_args += flag
+   endif
+endforeach
+
+base_lib = static_library('txgbe_base', sources,
+   dependencies: static_rte_eal,
+   c_args: c_args)
+base_objs = base_lib.extract_all_objects()
diff --git a/drivers/net/txgbe/base/txgbe.h b/drivers/net/txgbe/base/txgbe.h
new file mode 100644
index 0..9aee9738a
--- /dev/null
+++ b/drivers/net/txgbe/base/txgbe.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2015-2020
+ */
+
+#ifndef _TXGBE_H_
+#define _TXGBE_H_
+
+#include "txgbe_type.h"
+
+#endif /* _TXGBE_H_ */
diff --git a/drivers/net/txgbe/base/txgbe_devids.h 
b/drivers/net/txgbe/base/txgbe_devids.h
new file mode 100644
index 0..744f2f3b5
--- /dev/null
+++ b/drivers/net/txgbe/base/txgbe_devids.h
@@ -0,0 +1,40 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2015-2020
+ */
+
+#ifndef _TXGBE_DEVIDS_H_
+#define _TXGBE_DEVIDS_H_
+
+/*
+ * Vendor ID
+ */
+#ifndef PCI_VENDOR_ID_WANGXUN
+#define PCI_VENDOR_ID_WANGXUN   0x8088
+#endif
+
+/*
+ * Device IDs
+ */
+#define TXGBE_DEV_ID_RAPTOR_VF  0x1000
+#define TXGBE_DEV_ID_RAPTOR_SFP 0x1001 /* fiber */
+#define TXGBE_DEV_ID_RAPTOR_KR_KX_KX4   0x1002 /* backplane */
+#define TXGBE_DEV_ID_RAPTOR_XAUI0x1003 /* copper */
+#define TXGBE_DEV_ID_RAPTOR_SGMII   0x1004 /* copper */
+#define TXGBE_DEV_ID_RAPTOR_QSFP0x1011 /* fiber */
+#define TXGBE_DEV_ID_RAPTOR_VF_HV   0x2000
+#define TXGBE_DEV_ID_RAPTOR_T3_LOM  0x2001
+
+#define TXGBE_DEV_ID_WX1820_SFP 0x2001
+
+/*
+ * Subdevice IDs
+ */
+#define TXGBE_SUBDEV_ID_RAPTOR 0x
+#define TXGBE_SUBDEV_ID_MPW0x0001
+
+#define TXGBE_ETHERTYPE_FLOW_CTRL   0x8808
+#define TXGBE_ETHERTYPE_IEEE_VLAN   0x8100  /* 802.1q protocol */
+
+#define TXGBE_VXLAN_PORT 4789
+
+#endif /* _TXGBE_DEVIDS_H_ */
diff --git a/drivers/net/txgbe/base/txgbe_type.h 
b/drivers/net/txgbe/base/txgbe_type.h
new file mode 100644
index 0..8ed324a1b
--- /dev/null
+++ b/drivers/net/txgbe/base/txgbe_type.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2015-2020
+ */
+
+#ifndef _TXGBE_TYPE_H_
+#define _TXGBE_TYPE_H_
+
+#include "txgbe_devids.h"
+
+struct txgbe_hw {
+   void *back;
+};
+
+#endif /* _TXGBE_TYPE_H_ */
diff --git a/drivers/net/txgbe/meson.build b/drivers/net/txgbe/meson.build
index 605fcba78..f45b04b1c 100644
--- a/drivers/net/txgbe/meson.build
+++ b/drivers/net/txgbe/meson.build
@@ -3,7 +3,12 @@
 
 cflags += ['-DRTE_LIBRTE_TXGBE_BYPASS']
 
+subdir('base')
+objs = [base_objs]
+
 sources = files(
'txgbe_ethdev.c',
+   'txgbe_vf_representor.c',
 )
 
+includes += include_directories('base')
diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index cb758762d..86d2b9064 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -2,3 +2,164 @@
  * Copyright(c) 2015-2020
  */
 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "txgbe_logs.h"
+#include "base/txgbe.h"
+#include "txgbe_ethdev.h"
+
+/*
+ * The set of PCI devices this driver supports
+ */
+static const struct rte_pci_id pci_id_txgbe_map[] = {

[dpdk-dev] [PATCH v1 06/42] net/txgbe: add EEPROM functions

[Jiawen Wu]

Add EEPROM functions.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/meson.build|   1 +
 drivers/net/txgbe/base/txgbe.h|   1 +
 drivers/net/txgbe/base/txgbe_eeprom.c | 553 +-
 drivers/net/txgbe/base/txgbe_eeprom.h |  36 ++
 drivers/net/txgbe/base/txgbe_hw.c |  17 +-
 drivers/net/txgbe/base/txgbe_mng.c| 399 +++
 drivers/net/txgbe/base/txgbe_mng.h| 175 
 drivers/net/txgbe/base/txgbe_type.h   |   5 +
 drivers/net/txgbe/txgbe_ethdev.c  |   4 +-
 9 files changed, 1183 insertions(+), 8 deletions(-)
 create mode 100644 drivers/net/txgbe/base/txgbe_mng.c
 create mode 100644 drivers/net/txgbe/base/txgbe_mng.h

diff --git a/drivers/net/txgbe/base/meson.build 
b/drivers/net/txgbe/base/meson.build
index 1cce9b679..94cdfcfc1 100644
--- a/drivers/net/txgbe/base/meson.build
+++ b/drivers/net/txgbe/base/meson.build
@@ -4,6 +4,7 @@
 sources = [
'txgbe_eeprom.c',
'txgbe_hw.c',
+   'txgbe_mng.c',
'txgbe_vf.c',
 ]
 
diff --git a/drivers/net/txgbe/base/txgbe.h b/drivers/net/txgbe/base/txgbe.h
index 32867f5aa..329764be0 100644
--- a/drivers/net/txgbe/base/txgbe.h
+++ b/drivers/net/txgbe/base/txgbe.h
@@ -6,6 +6,7 @@
 #define _TXGBE_H_
 
 #include "txgbe_type.h"
+#include "txgbe_mng.h"
 #include "txgbe_eeprom.h"
 #include "txgbe_hw.h"
 
diff --git a/drivers/net/txgbe/base/txgbe_eeprom.c 
b/drivers/net/txgbe/base/txgbe_eeprom.c
index 287233dda..d4eeadd8e 100644
--- a/drivers/net/txgbe/base/txgbe_eeprom.c
+++ b/drivers/net/txgbe/base/txgbe_eeprom.c
@@ -3,7 +3,7 @@
  */
 
 #include "txgbe_hw.h"
-
+#include "txgbe_mng.h"
 #include "txgbe_eeprom.h"
 
 /**
@@ -15,11 +15,485 @@
  **/
 s32 txgbe_init_eeprom_params(struct txgbe_hw *hw)
 {
-   RTE_SET_USED(hw);
+   struct txgbe_rom_info *eeprom = &hw->rom;
+   u32 eec;
+   u16 eeprom_size;
+   int err = 0;
+
+   DEBUGFUNC("txgbe_init_eeprom_params");
+
+   if (eeprom->type != txgbe_eeprom_unknown) {
+   return 0;
+   }
+
+   eeprom->type = txgbe_eeprom_none;
+   /* Set default semaphore delay to 10ms which is a well
+* tested value */
+   eeprom->semaphore_delay = 10; /*ms*/
+   /* Clear EEPROM page size, it will be initialized as needed */
+   eeprom->word_page_size = 0;
+
+   /*
+* Check for EEPROM present first.
+* If not present leave as none
+*/
+   eec = rd32(hw, TXGBE_SPISTAT);
+   if (!(eec & TXGBE_SPISTAT_BPFLASH)) {
+   eeprom->type = txgbe_eeprom_flash;
+
+   /*
+* SPI EEPROM is assumed here.  This code would need to
+* change if a future EEPROM is not SPI.
+*/
+   eeprom_size = 4096;
+   eeprom->word_size = eeprom_size >> 1;
+   }
+
+   eeprom->address_bits = 16;
+
+   err = eeprom->read32(hw, TXGBE_SW_REGION_PTR << 1, &eeprom->sw_addr);
+   if (err) {
+   DEBUGOUT("EEPROM read failed.\n");
+   return err;
+   }
+
+   DEBUGOUT("eeprom params: type = %d, size = %d, address bits: "
+ "%d %d\n", eeprom->type, eeprom->word_size,
+ eeprom->address_bits, eeprom->sw_addr);
 
return 0;
 }
 
+/**
+ *  txgbe_get_eeprom_semaphore - Get hardware semaphore
+ *  @hw: pointer to hardware structure
+ *
+ *  Sets the hardware semaphores so EEPROM access can occur for bit-bang method
+ **/
+s32 txgbe_get_eeprom_semaphore(struct txgbe_hw *hw)
+{
+   s32 status = TXGBE_ERR_EEPROM;
+   u32 timeout = 2000;
+   u32 i;
+   u32 swsm;
+
+   DEBUGFUNC("txgbe_get_eeprom_semaphore");
+
+
+   /* Get SMBI software semaphore between device drivers first */
+   for (i = 0; i < timeout; i++) {
+   /*
+* If the SMBI bit is 0 when we read it, then the bit will be
+* set and we have the semaphore
+*/
+   swsm = rd32(hw, TXGBE_SWSEM);
+   if (!(swsm & TXGBE_SWSEM_PF)) {
+   status = 0;
+   break;
+   }
+   usec_delay(50);
+   }
+
+   if (i == timeout) {
+   DEBUGOUT("Driver can't access the eeprom - SMBI Semaphore "
+"not granted.\n");
+   /*
+* this release is particularly important because our attempts
+* above to get the semaphore may have succeeded, and if there
+* was a timeout, we should unconditionally clear the semaphore
+* bits to free the driver to make progress
+*/
+   txgbe_release_eeprom_semaphore(hw);
+
+   usec_delay(50);
+   /*
+* one last try
+* If the SMBI bit is 0 when we read it, then the bit will be
+* set and we have the semaphore
+*/
+   swsm = rd32(hw, TXGBE_SWSEM);
+

[dpdk-dev] [PATCH v1 07/42] net/txgbe: add HW init function

[Jiawen Wu]

Add hardware init function in mac layer.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_hw.c   | 103 ++--
 drivers/net/txgbe/base/txgbe_hw.h   |   4 ++
 drivers/net/txgbe/base/txgbe_type.h |   1 +
 drivers/net/txgbe/txgbe_ethdev.c|   2 +-
 4 files changed, 102 insertions(+), 8 deletions(-)

diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index 358872d30..c644de864 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -7,6 +7,68 @@
 #include "txgbe_eeprom.h"
 #include "txgbe_hw.h"
 
+/**
+ *  txgbe_start_hw - Prepare hardware for Tx/Rx
+ *  @hw: pointer to hardware structure
+ *
+ *  Starts the hardware by filling the bus info structure and media type, 
clears
+ *  all on chip counters, initializes receive address registers, multicast
+ *  table, VLAN filter table, calls routine to set up link and flow control
+ *  settings, and leaves transmit and receive units disabled and uninitialized
+ **/
+s32 txgbe_start_hw(struct txgbe_hw *hw)
+{
+   RTE_SET_USED(hw);
+
+   return 0;
+}
+
+/**
+ *  txgbe_start_hw_gen2 - Init sequence for common device family
+ *  @hw: pointer to hw structure
+ *
+ * Performs the init sequence common to the second generation
+ * of 10 GbE devices.
+ **/
+s32 txgbe_start_hw_gen2(struct txgbe_hw *hw)
+{
+   RTE_SET_USED(hw);
+
+   return 0;
+}
+
+/**
+ *  txgbe_init_hw - Generic hardware initialization
+ *  @hw: pointer to hardware structure
+ *
+ *  Initialize the hardware by resetting the hardware, filling the bus info
+ *  structure and media type, clears all on chip counters, initializes receive
+ *  address registers, multicast table, VLAN filter table, calls routine to set
+ *  up link and flow control settings, and leaves transmit and receive units
+ *  disabled and uninitialized
+ **/
+s32 txgbe_init_hw(struct txgbe_hw *hw)
+{
+   s32 status;
+
+   DEBUGFUNC("txgbe_init_hw");
+
+   /* Reset the hardware */
+   status = hw->mac.reset_hw(hw);
+   if (status == 0 || status == TXGBE_ERR_SFP_NOT_PRESENT) {
+   /* Start the HW */
+   status = hw->mac.start_hw(hw);
+   }
+
+   /* Initialize the LED link active for LED blink support */
+   hw->mac.init_led_link_act(hw);
+
+   if (status != 0)
+   DEBUGOUT("Failed to initialize HW, STATUS = %d\n", status);
+
+   return status;
+}
+
 s32 txgbe_set_rar(struct txgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
  u32 enable_addr)
 {
@@ -98,13 +160,6 @@ s32 txgbe_set_mac_type(struct txgbe_hw *hw)
return err;
 }
 
-s32 txgbe_init_hw(struct txgbe_hw *hw)
-{
-   RTE_SET_USED(hw);
-   return 0;
-}
-
-
 /**
  *  txgbe_init_ops_pf - Inits func ptrs and MAC type
  *  @hw: pointer to hardware structure
@@ -114,6 +169,7 @@ s32 txgbe_init_hw(struct txgbe_hw *hw)
  **/
 s32 txgbe_init_ops_pf(struct txgbe_hw *hw)
 {
+   struct txgbe_mac_info *mac = &hw->mac;
struct txgbe_rom_info *rom = &hw->rom;
 
/* EEPROM */
@@ -130,6 +186,39 @@ s32 txgbe_init_ops_pf(struct txgbe_hw *hw)
rom->update_checksum = txgbe_update_eeprom_checksum;
rom->calc_checksum = txgbe_calc_eeprom_checksum;
 
+   /* MAC */
+   mac->init_hw = txgbe_init_hw;
+   mac->start_hw = txgbe_start_hw_raptor;
+
return 0;
 }
 
+/**
+ *  txgbe_start_hw_raptor - Prepare hardware for Tx/Rx
+ *  @hw: pointer to hardware structure
+ *
+ *  Starts the hardware using the generic start_hw function
+ *  and the generation start_hw function.
+ *  Then performs revision-specific operations, if any.
+ **/
+s32 txgbe_start_hw_raptor(struct txgbe_hw *hw)
+{
+   s32 err = 0;
+
+   DEBUGFUNC("txgbe_start_hw_raptor");
+
+   err = txgbe_start_hw(hw);
+   if (err != 0)
+   goto out;
+
+   err = txgbe_start_hw_gen2(hw);
+   if (err != 0)
+   goto out;
+
+   /* We need to run link autotry after the driver loads */
+   hw->mac.autotry_restart = true;
+
+out:
+   return err;
+}
+
diff --git a/drivers/net/txgbe/base/txgbe_hw.h 
b/drivers/net/txgbe/base/txgbe_hw.h
index adcc5fc48..55b1b60de 100644
--- a/drivers/net/txgbe/base/txgbe_hw.h
+++ b/drivers/net/txgbe/base/txgbe_hw.h
@@ -8,6 +8,10 @@
 #include "txgbe_type.h"
 
 s32 txgbe_init_hw(struct txgbe_hw *hw);
+s32 txgbe_start_hw(struct txgbe_hw *hw);
+s32 txgbe_stop_hw(struct txgbe_hw *hw);
+s32 txgbe_start_hw_gen2(struct txgbe_hw *hw);
+s32 txgbe_start_hw_raptor(struct txgbe_hw *hw);
 
 s32 txgbe_set_rar(struct txgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
  u32 enable_addr);
diff --git a/drivers/net/txgbe/base/txgbe_type.h 
b/drivers/net/txgbe/base/txgbe_type.h
index 8b7cfd8ff..92068b6f7 100644
--- a/drivers/net/txgbe/base/txgbe_type.h
+++ b/drivers/net/txgbe/base/txgbe_type.h
@@ -318,6 +318,7 @@ struct txgbe_mac_info {
u8 san_addr[ETH_ADDR_LEN];
 
u32 num_rar_entries;
+   bool a

[dpdk-dev] [PATCH v1 09/42] net/txgbe: add PHY init

[Jiawen Wu]

Add phy init functions, get phy type and identify.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/meson.build  |   1 +
 drivers/net/txgbe/base/txgbe.h  |   1 +
 drivers/net/txgbe/base/txgbe_hw.c   |  57 +
 drivers/net/txgbe/base/txgbe_hw.h   |   2 +
 drivers/net/txgbe/base/txgbe_phy.c  | 253 +
 drivers/net/txgbe/base/txgbe_phy.h  | 336 
 drivers/net/txgbe/base/txgbe_type.h |   7 +
 7 files changed, 657 insertions(+)
 create mode 100644 drivers/net/txgbe/base/txgbe_phy.c
 create mode 100644 drivers/net/txgbe/base/txgbe_phy.h

diff --git a/drivers/net/txgbe/base/meson.build 
b/drivers/net/txgbe/base/meson.build
index 94cdfcfc1..069879a7c 100644
--- a/drivers/net/txgbe/base/meson.build
+++ b/drivers/net/txgbe/base/meson.build
@@ -5,6 +5,7 @@ sources = [
'txgbe_eeprom.c',
'txgbe_hw.c',
'txgbe_mng.c',
+   'txgbe_phy.c',
'txgbe_vf.c',
 ]
 
diff --git a/drivers/net/txgbe/base/txgbe.h b/drivers/net/txgbe/base/txgbe.h
index 329764be0..764caa439 100644
--- a/drivers/net/txgbe/base/txgbe.h
+++ b/drivers/net/txgbe/base/txgbe.h
@@ -8,6 +8,7 @@
 #include "txgbe_type.h"
 #include "txgbe_mng.h"
 #include "txgbe_eeprom.h"
+#include "txgbe_phy.h"
 #include "txgbe_hw.h"
 
 #endif /* _TXGBE_H_ */
diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index 9a77adc72..8090d68f9 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -3,6 +3,7 @@
  */
 
 #include "txgbe_type.h"
+#include "txgbe_phy.h"
 #include "txgbe_vf.h"
 #include "txgbe_eeprom.h"
 #include "txgbe_mng.h"
@@ -138,6 +139,8 @@ s32 txgbe_set_rar(struct txgbe_hw *hw, u32 index, u8 *addr, 
u32 vmdq,
wr32(hw, TXGBE_ETHADDRIDX, index);
wr32(hw, TXGBE_ETHADDRL, rar_low);
wr32(hw, TXGBE_ETHADDRH, rar_high);
+
+   return 0;
 }
 
 /**
@@ -273,6 +276,55 @@ s32 txgbe_set_mac_type(struct txgbe_hw *hw)
return err;
 }
 
+void txgbe_init_mac_link_ops(struct txgbe_hw *hw)
+{
+   struct txgbe_mac_info *mac = &hw->mac;
+
+   DEBUGFUNC("txgbe_init_mac_link_ops");
+
+   /*
+* enable the laser control functions for SFP+ fiber
+* and MNG not enabled
+*/
+   RTE_SET_USED(mac);
+}
+
+/**
+ *  txgbe_init_phy_raptor - PHY/SFP specific init
+ *  @hw: pointer to hardware structure
+ *
+ *  Initialize any function pointers that were not able to be
+ *  set during init_shared_code because the PHY/SFP type was
+ *  not known.  Perform the SFP init if necessary.
+ *
+ **/
+s32 txgbe_init_phy_raptor(struct txgbe_hw *hw)
+{
+   struct txgbe_phy_info *phy = &hw->phy;
+   s32 err = 0;
+
+   DEBUGFUNC("txgbe_init_phy_raptor");
+
+   if (hw->device_id == TXGBE_DEV_ID_RAPTOR_QSFP) {
+   /* Store flag indicating I2C bus access control unit. */
+   hw->phy.qsfp_shared_i2c_bus = TRUE;
+
+   /* Initialize access to QSFP+ I2C bus */
+   txgbe_flush(hw);
+   }
+
+   /* Identify the PHY or SFP module */
+   err = phy->identify(hw);
+   if (err == TXGBE_ERR_SFP_NOT_SUPPORTED)
+   goto init_phy_ops_out;
+
+   /* Setup function pointers based on detected SFP module and speeds */
+   txgbe_init_mac_link_ops(hw);
+
+init_phy_ops_out:
+   return err;
+}
+
 /**
  *  txgbe_init_ops_pf - Inits func ptrs and MAC type
  *  @hw: pointer to hardware structure
@@ -283,8 +335,13 @@ s32 txgbe_set_mac_type(struct txgbe_hw *hw)
 s32 txgbe_init_ops_pf(struct txgbe_hw *hw)
 {
struct txgbe_mac_info *mac = &hw->mac;
+   struct txgbe_phy_info *phy = &hw->phy;
struct txgbe_rom_info *rom = &hw->rom;
 
+   /* PHY */
+   phy->identify = txgbe_identify_phy;
+   phy->init = txgbe_init_phy_raptor;
+
/* MAC */
mac->init_hw = txgbe_init_hw;
mac->start_hw = txgbe_start_hw_raptor;
diff --git a/drivers/net/txgbe/base/txgbe_hw.h 
b/drivers/net/txgbe/base/txgbe_hw.h
index a2816c40a..a70b0340a 100644
--- a/drivers/net/txgbe/base/txgbe_hw.h
+++ b/drivers/net/txgbe/base/txgbe_hw.h
@@ -21,6 +21,8 @@ void txgbe_clear_tx_pending(struct txgbe_hw *hw);
 s32 txgbe_init_shared_code(struct txgbe_hw *hw);
 s32 txgbe_set_mac_type(struct txgbe_hw *hw);
 s32 txgbe_init_ops_pf(struct txgbe_hw *hw);
+void txgbe_init_mac_link_ops(struct txgbe_hw *hw);
 s32 txgbe_reset_hw(struct txgbe_hw *hw);
 s32 txgbe_start_hw_raptor(struct txgbe_hw *hw);
+s32 txgbe_init_phy_raptor(struct txgbe_hw *hw);
 #endif /* _TXGBE_HW_H_ */
diff --git a/drivers/net/txgbe/base/txgbe_phy.c 
b/drivers/net/txgbe/base/txgbe_phy.c
new file mode 100644
index 0..f2f79475c
--- /dev/null
+++ b/drivers/net/txgbe/base/txgbe_phy.c
@@ -0,0 +1,253 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2015-2020
+ */
+
+#include "txgbe_hw.h"
+#include "txgbe_eeprom.h"
+#include "txgbe_mng.h"
+#include "txgbe_phy.h"
+
+/**
+ * txgbe_identify_extphy - Identify a single address for a PHY
+ * @hw: p

[dpdk-dev] [PATCH v1 08/42] net/txgbe: add HW reset operation

[Jiawen Wu]

Add hardware reset operation.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_hw.c   | 298 +++-
 drivers/net/txgbe/base/txgbe_hw.h   |   5 +
 drivers/net/txgbe/base/txgbe_type.h |  12 ++
 3 files changed, 304 insertions(+), 11 deletions(-)

diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index c644de864..9a77adc72 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -5,6 +5,7 @@
 #include "txgbe_type.h"
 #include "txgbe_vf.h"
 #include "txgbe_eeprom.h"
+#include "txgbe_mng.h"
 #include "txgbe_hw.h"
 
 /**
@@ -69,18 +70,131 @@ s32 txgbe_init_hw(struct txgbe_hw *hw)
return status;
 }
 
+/**
+ *  txgbe_validate_mac_addr - Validate MAC address
+ *  @mac_addr: pointer to MAC address.
+ *
+ *  Tests a MAC address to ensure it is a valid Individual Address.
+ **/
+s32 txgbe_validate_mac_addr(u8 *mac_addr)
+{
+   s32 status = 0;
+
+   DEBUGFUNC("txgbe_validate_mac_addr");
+
+   /* Make sure it is not a multicast address */
+   if (TXGBE_IS_MULTICAST(mac_addr)) {
+   status = TXGBE_ERR_INVALID_MAC_ADDR;
+   /* Not a broadcast address */
+   } else if (TXGBE_IS_BROADCAST(mac_addr)) {
+   status = TXGBE_ERR_INVALID_MAC_ADDR;
+   /* Reject the zero address */
+   } else if (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 &&
+  mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0) {
+   status = TXGBE_ERR_INVALID_MAC_ADDR;
+   }
+   return status;
+}
+
 s32 txgbe_set_rar(struct txgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
  u32 enable_addr)
 {
-   RTE_SET_USED(hw);
-   RTE_SET_USED(index);
-   RTE_SET_USED(addr);
-   RTE_SET_USED(vmdq);
-   RTE_SET_USED(enable_addr);
+   u32 rar_low, rar_high;
+   u32 rar_entries = hw->mac.num_rar_entries;
 
-   return 0;
+   DEBUGFUNC("txgbe_set_rar");
+
+   /* Make sure we are using a valid rar index range */
+   if (index >= rar_entries) {
+   DEBUGOUT("RAR index %d is out of range.\n", index);
+   return TXGBE_ERR_INVALID_ARGUMENT;
+   }
+
+   /* setup VMDq pool selection before this RAR gets enabled */
+   hw->mac.set_vmdq(hw, index, vmdq);
+
+   /*
+* HW expects these in little endian so we reverse the byte
+* order from network order (big endian) to little endian
+*/
+   rar_low = TXGBE_ETHADDRL_AD0(addr[5]) |
+ TXGBE_ETHADDRL_AD1(addr[4]) |
+ TXGBE_ETHADDRL_AD2(addr[3]) |
+ TXGBE_ETHADDRL_AD3(addr[2]);
+   /*
+* Some parts put the VMDq setting in the extra RAH bits,
+* so save everything except the lower 16 bits that hold part
+* of the address and the address valid bit.
+*/
+   rar_high = rd32(hw, TXGBE_ETHADDRH);
+   rar_high &= ~TXGBE_ETHADDRH_AD_MASK;
+   rar_high |= (TXGBE_ETHADDRH_AD4(addr[1]) |
+TXGBE_ETHADDRH_AD5(addr[0]));
+
+   rar_high &= ~TXGBE_ETHADDRH_VLD;
+   if (enable_addr != 0)
+   rar_high |= TXGBE_ETHADDRH_VLD;
+
+   wr32(hw, TXGBE_ETHADDRIDX, index);
+   wr32(hw, TXGBE_ETHADDRL, rar_low);
+   wr32(hw, TXGBE_ETHADDRH, rar_high);
+}
+
+/**
+ * txgbe_clear_tx_pending - Clear pending TX work from the PCIe fifo
+ * @hw: pointer to the hardware structure
+ *
+ * The MACs can experience issues if TX work is still pending
+ * when a reset occurs.  This function prevents this by flushing the PCIe
+ * buffers on the system.
+ **/
+void txgbe_clear_tx_pending(struct txgbe_hw *hw)
+{
+   u32 hlreg0, i, poll;
+
+   /*
+* If double reset is not requested then all transactions should
+* already be clear and as such there is no work to do
+*/
+   if (!(hw->mac.flags & TXGBE_FLAGS_DOUBLE_RESET_REQUIRED))
+   return;
+
+   hlreg0 = rd32(hw, TXGBE_PSRCTL);
+   wr32(hw, TXGBE_PSRCTL, hlreg0 | TXGBE_PSRCTL_LBENA);
+
+   /* Wait for a last completion before clearing buffers */
+   txgbe_flush(hw);
+   msec_delay(3);
+
+   /*
+* Before proceeding, make sure that the PCIe block does not have
+* transactions pending.
+*/
+   poll = (800 * 11) / 10;
+   for (i = 0; i < poll; i++) {
+   usec_delay(100);
+   }
+
+   /* Flush all writes and allow 20usec for all transactions to clear */
+   txgbe_flush(hw);
+   usec_delay(20);
+
+   /* restore previous register values */
+   wr32(hw, TXGBE_PSRCTL, hlreg0);
 }
 
+/**
+ *  txgbe_init_shared_code - Initialize the shared code
+ *  @hw: pointer to hardware structure
+ *
+ *  This will assign function pointers and assign the MAC type and PHY code.
+ *  Does not touch the hardware. This function must be called prior to any
+ *  other function in the shared code. The txgbe_hw structure should be
+ *  memset to

[dpdk-dev] [PATCH v1 10/42] net/txgbe: add module identify

[Jiawen Wu]

Add sfp anf qsfp module identify, i2c start and stop.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_eeprom.h |   1 +
 drivers/net/txgbe/base/txgbe_hw.c |   4 +
 drivers/net/txgbe/base/txgbe_phy.c| 590 +-
 drivers/net/txgbe/base/txgbe_phy.h|  12 +
 drivers/net/txgbe/base/txgbe_type.h   |   1 +
 5 files changed, 605 insertions(+), 3 deletions(-)

diff --git a/drivers/net/txgbe/base/txgbe_eeprom.h 
b/drivers/net/txgbe/base/txgbe_eeprom.h
index 5858e185c..29973e624 100644
--- a/drivers/net/txgbe/base/txgbe_eeprom.h
+++ b/drivers/net/txgbe/base/txgbe_eeprom.h
@@ -23,6 +23,7 @@
 #define TXGBE_EEPROM_VERSION_H  0x1E
 #define TXGBE_ISCSI_BOOT_CONFIG 0x07
 
+#define TXGBE_DEVICE_CAPS_ALLOW_ANY_SFP0x1
 
 s32 txgbe_init_eeprom_params(struct txgbe_hw *hw);
 s32 txgbe_calc_eeprom_checksum(struct txgbe_hw *hw);
diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index 8090d68f9..64fc14478 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -341,6 +341,10 @@ s32 txgbe_init_ops_pf(struct txgbe_hw *hw)
/* PHY */
phy->identify = txgbe_identify_phy;
phy->init = txgbe_init_phy_raptor;
+   phy->read_i2c_byte = txgbe_read_i2c_byte;
+   phy->write_i2c_byte = txgbe_write_i2c_byte;
+   phy->read_i2c_eeprom = txgbe_read_i2c_eeprom;
+   phy->write_i2c_eeprom = txgbe_write_i2c_eeprom;
 
/* MAC */
mac->init_hw = txgbe_init_hw;
diff --git a/drivers/net/txgbe/base/txgbe_phy.c 
b/drivers/net/txgbe/base/txgbe_phy.c
index f2f79475c..540bc9ce9 100644
--- a/drivers/net/txgbe/base/txgbe_phy.c
+++ b/drivers/net/txgbe/base/txgbe_phy.c
@@ -7,6 +7,9 @@
 #include "txgbe_mng.h"
 #include "txgbe_phy.h"
 
+STATIC void txgbe_i2c_start(struct txgbe_hw *hw);
+STATIC void txgbe_i2c_stop(struct txgbe_hw *hw);
+
 /**
  * txgbe_identify_extphy - Identify a single address for a PHY
  * @hw: pointer to hardware structure
@@ -235,8 +238,204 @@ s32 txgbe_identify_module(struct txgbe_hw *hw)
  **/
 s32 txgbe_identify_sfp_module(struct txgbe_hw *hw)
 {
-   RTE_SET_USED(hw);
-   return 0;
+   s32 err = TXGBE_ERR_PHY_ADDR_INVALID;
+   u32 vendor_oui = 0;
+   enum txgbe_sfp_type stored_sfp_type = hw->phy.sfp_type;
+   u8 identifier = 0;
+   u8 comp_codes_1g = 0;
+   u8 comp_codes_10g = 0;
+   u8 oui_bytes[3] = {0, 0, 0};
+   u8 cable_tech = 0;
+   u8 cable_spec = 0;
+   u16 enforce_sfp = 0;
+
+   DEBUGFUNC("txgbe_identify_sfp_module");
+
+   if (hw->phy.media_type != txgbe_media_type_fiber) {
+   hw->phy.sfp_type = txgbe_sfp_type_not_present;
+   return TXGBE_ERR_SFP_NOT_PRESENT;
+   }
+
+   err = hw->phy.read_i2c_eeprom(hw, TXGBE_SFF_IDENTIFIER,
+&identifier);
+   if (err != 0) {
+ERR_I2C:
+   hw->phy.sfp_type = txgbe_sfp_type_not_present;
+   if (hw->phy.type != txgbe_phy_nl) {
+   hw->phy.id = 0;
+   hw->phy.type = txgbe_phy_unknown;
+   }
+   return TXGBE_ERR_SFP_NOT_PRESENT;
+   }
+
+   if (identifier != TXGBE_SFF_IDENTIFIER_SFP) {
+   hw->phy.type = txgbe_phy_sfp_unsupported;
+   return TXGBE_ERR_SFP_NOT_SUPPORTED;
+   }
+
+   err = hw->phy.read_i2c_eeprom(hw, TXGBE_SFF_1GBE_COMP_CODES,
+&comp_codes_1g);
+   if (err != 0)
+   goto ERR_I2C;
+
+   err = hw->phy.read_i2c_eeprom(hw, TXGBE_SFF_10GBE_COMP_CODES,
+&comp_codes_10g);
+   if (err != 0)
+   goto ERR_I2C;
+
+   err = hw->phy.read_i2c_eeprom(hw, TXGBE_SFF_CABLE_TECHNOLOGY,
+&cable_tech);
+   if (err != 0)
+   goto ERR_I2C;
+
+/* ID Module
+ * =
+ * 0   SFP_DA_CU
+ * 1   SFP_SR
+ * 2   SFP_LR
+ * 3   SFP_DA_CORE0 - chip-specific
+ * 4   SFP_DA_CORE1 - chip-specific
+ * 5   SFP_SR/LR_CORE0 - chip-specific
+ * 6   SFP_SR/LR_CORE1 - chip-specific
+ * 7   SFP_act_lmt_DA_CORE0 - chip-specific
+ * 8   SFP_act_lmt_DA_CORE1 - chip-specific
+ * 9   SFP_1g_cu_CORE0 - chip-specific
+ * 10  SFP_1g_cu_CORE1 - chip-specific
+ * 11  SFP_1g_sx_CORE0 - chip-specific
+ * 12  SFP_1g_sx_CORE1 - chip-specific
+ */
+   if (cable_tech & TXGBE_SFF_CABLE_DA_PASSIVE) {
+   if (hw->bus.lan_id == 0)
+   hw->phy.sfp_type = txgbe_sfp_type_da_cu_core0;
+   else
+   hw->phy.sfp_type = txgbe_sfp_type_da_cu_core1;
+   } else if (cable_tech & TXGBE_SFF_CABLE_DA_ACTIVE) {
+   err = hw->phy.read_i2c_eeprom(hw,
+   TXGBE_SFF_CABLE_SPEC_COMP, &cable_spec);
+

[dpdk-dev] [PATCH v1 05/42] net/txgbe: add mac type and HW ops dummy

[Jiawen Wu]

Add base driver shared code from dummy function.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/meson.build  |  1 +
 drivers/net/txgbe/base/txgbe_hw.c   | 90 -
 drivers/net/txgbe/base/txgbe_hw.h   |  3 +-
 drivers/net/txgbe/base/txgbe_type.h |  3 +
 drivers/net/txgbe/base/txgbe_vf.c   | 14 +
 drivers/net/txgbe/base/txgbe_vf.h   | 12 
 6 files changed, 121 insertions(+), 2 deletions(-)
 create mode 100644 drivers/net/txgbe/base/txgbe_vf.c
 create mode 100644 drivers/net/txgbe/base/txgbe_vf.h

diff --git a/drivers/net/txgbe/base/meson.build 
b/drivers/net/txgbe/base/meson.build
index 72f1e73c9..1cce9b679 100644
--- a/drivers/net/txgbe/base/meson.build
+++ b/drivers/net/txgbe/base/meson.build
@@ -4,6 +4,7 @@
 sources = [
'txgbe_eeprom.c',
'txgbe_hw.c',
+   'txgbe_vf.c',
 ]
 
 error_cflags = ['-Wno-unused-value',
diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index 17ccd0b65..5ff3983d9 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -3,6 +3,7 @@
  */
 
 #include "txgbe_type.h"
+#include "txgbe_vf.h"
 #include "txgbe_eeprom.h"
 #include "txgbe_hw.h"
 
@@ -19,12 +20,99 @@ s32 txgbe_set_rar(struct txgbe_hw *hw, u32 index, u8 *addr, 
u32 vmdq,
 }
 
 s32 txgbe_init_shared_code(struct txgbe_hw *hw)
+{
+   s32 status;
+
+   DEBUGFUNC("txgbe_init_shared_code");
+
+   /*
+* Set the mac type
+*/
+   txgbe_set_mac_type(hw);
+
+   txgbe_init_ops_dummy(hw);
+   switch (hw->mac.type) {
+   case txgbe_mac_raptor:
+   status = txgbe_init_ops_pf(hw);
+   break;
+   case txgbe_mac_raptor_vf:
+   status = txgbe_init_ops_vf(hw);
+   break;
+   default:
+   status = TXGBE_ERR_DEVICE_NOT_SUPPORTED;
+   break;
+   }
+   hw->mac.max_link_up_time = TXGBE_LINK_UP_TIME;
+
+   hw->bus.set_lan_id(hw);
+
+   return status;
+
+}
+
+/**
+ *  txgbe_set_mac_type - Sets MAC type
+ *  @hw: pointer to the HW structure
+ *
+ *  This function sets the mac type of the adapter based on the
+ *  vendor ID and device ID stored in the hw structure.
+ **/
+s32 txgbe_set_mac_type(struct txgbe_hw *hw)
+{
+   s32 err = 0;
+
+   DEBUGFUNC("txgbe_set_mac_type\n");
+
+   if (hw->vendor_id != PCI_VENDOR_ID_WANGXUN) {
+   DEBUGOUT("Unsupported vendor id: %x", hw->vendor_id);
+   return TXGBE_ERR_DEVICE_NOT_SUPPORTED;
+   }
+
+   switch (hw->device_id) {
+   case TXGBE_DEV_ID_RAPTOR_KR_KX_KX4:
+   hw->mac.type = txgbe_mac_raptor;
+   break;
+   case TXGBE_DEV_ID_RAPTOR_XAUI:
+   case TXGBE_DEV_ID_RAPTOR_SGMII:
+   hw->mac.type = txgbe_mac_raptor;
+   break;
+   case TXGBE_DEV_ID_RAPTOR_SFP:
+   case TXGBE_DEV_ID_WX1820_SFP:
+   hw->mac.type = txgbe_mac_raptor;
+   break;
+   case TXGBE_DEV_ID_RAPTOR_QSFP:
+   hw->mac.type = txgbe_mac_raptor;
+   break;
+   case TXGBE_DEV_ID_RAPTOR_VF:
+   case TXGBE_DEV_ID_RAPTOR_VF_HV:
+   hw->mac.type = txgbe_mac_raptor_vf;
+   break;
+   default:
+   err = TXGBE_ERR_DEVICE_NOT_SUPPORTED;
+   DEBUGOUT("Unsupported device id: %x", hw->device_id);
+   break;
+   }
+
+   DEBUGOUT("txgbe_set_mac_type found mac: %d, returns: %d\n",
+ hw->mac.type, err);
+   return err;
+}
+
+s32 txgbe_init_hw(struct txgbe_hw *hw)
 {
RTE_SET_USED(hw);
return 0;
 }
 
-s32 txgbe_init_hw(struct txgbe_hw *hw)
+
+/**
+ *  txgbe_init_ops_pf - Inits func ptrs and MAC type
+ *  @hw: pointer to hardware structure
+ *
+ *  Initialize the function pointers and assign the MAC type.
+ *  Does not touch the hardware.
+ **/
+s32 txgbe_init_ops_pf(struct txgbe_hw *hw)
 {
RTE_SET_USED(hw);
return 0;
diff --git a/drivers/net/txgbe/base/txgbe_hw.h 
b/drivers/net/txgbe/base/txgbe_hw.h
index cd738245f..adcc5fc48 100644
--- a/drivers/net/txgbe/base/txgbe_hw.h
+++ b/drivers/net/txgbe/base/txgbe_hw.h
@@ -12,5 +12,6 @@ s32 txgbe_init_hw(struct txgbe_hw *hw);
 s32 txgbe_set_rar(struct txgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
  u32 enable_addr);
 s32 txgbe_init_shared_code(struct txgbe_hw *hw);
-
+s32 txgbe_set_mac_type(struct txgbe_hw *hw);
+s32 txgbe_init_ops_pf(struct txgbe_hw *hw);
 #endif /* _TXGBE_HW_H_ */
diff --git a/drivers/net/txgbe/base/txgbe_type.h 
b/drivers/net/txgbe/base/txgbe_type.h
index 1264a83d9..5524e5de0 100644
--- a/drivers/net/txgbe/base/txgbe_type.h
+++ b/drivers/net/txgbe/base/txgbe_type.h
@@ -5,6 +5,8 @@
 #ifndef _TXGBE_TYPE_H_
 #define _TXGBE_TYPE_H_
 
+#define TXGBE_LINK_UP_TIME 90 /* 9.0 Seconds */
+
 #define TXGBE_ALIGN128 /* as intel did */
 
 #include "txgbe_status.h"
@@ -316,6 +318,7 @@ struct txgbe_mac_info {
   

[dpdk-dev] [PATCH v1 12/42] net/txgbe: add device start and stop

[Jiawen Wu]

Add device start and stop operations.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_eeprom.h |   1 +
 drivers/net/txgbe/base/txgbe_hw.c | 197 -
 drivers/net/txgbe/base/txgbe_hw.h |   3 +
 drivers/net/txgbe/base/txgbe_type.h   |   8 +-
 drivers/net/txgbe/txgbe_ethdev.c  | 302 +-
 drivers/net/txgbe/txgbe_ethdev.h  |   6 +
 drivers/net/txgbe/txgbe_rxtx.c|  35 ++-
 7 files changed, 541 insertions(+), 11 deletions(-)

diff --git a/drivers/net/txgbe/base/txgbe_eeprom.h 
b/drivers/net/txgbe/base/txgbe_eeprom.h
index 29973e624..47b6a2f2b 100644
--- a/drivers/net/txgbe/base/txgbe_eeprom.h
+++ b/drivers/net/txgbe/base/txgbe_eeprom.h
@@ -24,6 +24,7 @@
 #define TXGBE_ISCSI_BOOT_CONFIG 0x07
 
 #define TXGBE_DEVICE_CAPS_ALLOW_ANY_SFP0x1
+#define TXGBE_DEVICE_CAPS_NO_CROSSTALK_WR  (1 << 7)
 
 s32 txgbe_init_eeprom_params(struct txgbe_hw *hw);
 s32 txgbe_calc_eeprom_checksum(struct txgbe_hw *hw);
diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index 21745905d..215900895 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -20,7 +20,32 @@
  **/
 s32 txgbe_start_hw(struct txgbe_hw *hw)
 {
-   RTE_SET_USED(hw);
+   u16 device_caps;
+
+   DEBUGFUNC("txgbe_start_hw");
+
+   /* Set the media type */
+   hw->phy.media_type = hw->phy.get_media_type(hw);
+
+   /* Clear statistics registers */
+   hw->mac.clear_hw_cntrs(hw);
+
+   /* Cache bit indicating need for crosstalk fix */
+   switch (hw->mac.type) {
+   case txgbe_mac_raptor:
+   hw->mac.get_device_caps(hw, &device_caps);
+   if (device_caps & TXGBE_DEVICE_CAPS_NO_CROSSTALK_WR)
+   hw->need_crosstalk_fix = false;
+   else
+   hw->need_crosstalk_fix = true;
+   break;
+   default:
+   hw->need_crosstalk_fix = false;
+   break;
+   }
+
+   /* Clear adapter stopped flag */
+   hw->adapter_stopped = false;
 
return 0;
 }
@@ -34,7 +59,17 @@ s32 txgbe_start_hw(struct txgbe_hw *hw)
  **/
 s32 txgbe_start_hw_gen2(struct txgbe_hw *hw)
 {
-   RTE_SET_USED(hw);
+   u32 i;
+
+   /* Clear the rate limiters */
+   for (i = 0; i < hw->mac.max_tx_queues; i++) {
+   wr32(hw, TXGBE_ARBPOOLIDX, i);
+   wr32(hw, TXGBE_ARBTXRATE, 0);
+   }
+   txgbe_flush(hw);
+
+   /* We need to run link autotry after the driver loads */
+   hw->mac.autotry_restart = true;
 
return 0;
 }
@@ -71,6 +106,56 @@ s32 txgbe_init_hw(struct txgbe_hw *hw)
return status;
 }
 
+/**
+ *  txgbe_stop_hw - Generic stop Tx/Rx units
+ *  @hw: pointer to hardware structure
+ *
+ *  Sets the adapter_stopped flag within txgbe_hw struct. Clears interrupts,
+ *  disables transmit and receive units. The adapter_stopped flag is used by
+ *  the shared code and drivers to determine if the adapter is in a stopped
+ *  state and should not touch the hardware.
+ **/
+s32 txgbe_stop_hw(struct txgbe_hw *hw)
+{
+   u32 reg_val;
+   u16 i;
+
+   DEBUGFUNC("txgbe_stop_hw");
+
+   /*
+* Set the adapter_stopped flag so other driver functions stop touching
+* the hardware
+*/
+   hw->adapter_stopped = true;
+
+   /* Clear interrupt mask to stop interrupts from being generated */
+   wr32(hw, TXGBE_IENMISC, 0);
+   wr32(hw, TXGBE_IMS(0), TXGBE_IMS_MASK);
+   wr32(hw, TXGBE_IMS(1), TXGBE_IMS_MASK);
+
+   /* Clear any pending interrupts, flush previous writes */
+   wr32(hw, TXGBE_ICRMISC, TXGBE_ICRMISC_MASK);
+   wr32(hw, TXGBE_ICR(0), TXGBE_ICR_MASK);
+   wr32(hw, TXGBE_ICR(1), TXGBE_ICR_MASK);
+
+   /* Disable the transmit unit.  Each queue must be disabled. */
+   for (i = 0; i < hw->mac.max_tx_queues; i++)
+   wr32(hw, TXGBE_TXCFG(i), TXGBE_TXCFG_FLUSH);
+
+   /* Disable the receive unit by stopping each queue */
+   for (i = 0; i < hw->mac.max_rx_queues; i++) {
+   reg_val = rd32(hw, TXGBE_RXCFG(i));
+   reg_val &= ~TXGBE_RXCFG_ENA;
+   wr32(hw, TXGBE_RXCFG(i), reg_val);
+   }
+
+   /* flush all queues disables */
+   txgbe_flush(hw);
+   msec_delay(2);
+
+   return 0;
+}
+
 /**
  *  txgbe_validate_mac_addr - Validate MAC address
  *  @mac_addr: pointer to MAC address.
@@ -143,6 +228,24 @@ s32 txgbe_set_rar(struct txgbe_hw *hw, u32 index, u8 
*addr, u32 vmdq,
return 0;
 }
 
+
+/**
+ *  txgbe_get_device_caps - Get additional device capabilities
+ *  @hw: pointer to hardware structure
+ *  @device_caps: the EEPROM word with the extra device capabilities
+ *
+ *  This function will read the EEPROM location for the device capabilities,
+ *  and return the word through device_caps.
+ **/
+s32 txgbe_get_device_caps(struct txgbe_hw *hw, u16 *device_caps)
+{
+   

[dpdk-dev] [PATCH v1 13/42] net/txgbe: add interrupt operation

[Jiawen Wu]

Add device interrupt handler and setup misx interrupt.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_type.h |   8 +
 drivers/net/txgbe/txgbe_ethdev.c| 457 +++-
 drivers/net/txgbe/txgbe_ethdev.h|  32 ++
 drivers/net/txgbe/txgbe_pf.c|   6 +
 4 files changed, 501 insertions(+), 2 deletions(-)

diff --git a/drivers/net/txgbe/base/txgbe_type.h 
b/drivers/net/txgbe/base/txgbe_type.h
index 7eff5c05b..5bde3c642 100644
--- a/drivers/net/txgbe/base/txgbe_type.h
+++ b/drivers/net/txgbe/base/txgbe_type.h
@@ -390,6 +390,14 @@ struct txgbe_mbx_info {
s32  (*check_for_rst)(struct txgbe_hw *, u16);
 };
 
+enum txgbe_isb_idx {
+   TXGBE_ISB_HEADER,
+   TXGBE_ISB_MISC,
+   TXGBE_ISB_VEC0,
+   TXGBE_ISB_VEC1,
+   TXGBE_ISB_MAX
+};
+
 struct txgbe_hw {
void IOMEM *hw_addr;
void *back;
diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index f29bd2112..88967dede 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -40,6 +40,17 @@ static int txgbe_dev_link_update(struct rte_eth_dev *dev,
int wait_to_complete);
 static int txgbe_dev_stats_reset(struct rte_eth_dev *dev);
 
+static void txgbe_dev_link_status_print(struct rte_eth_dev *dev);
+static int txgbe_dev_lsc_interrupt_setup(struct rte_eth_dev *dev, uint8_t on);
+static int txgbe_dev_macsec_interrupt_setup(struct rte_eth_dev *dev);
+static int txgbe_dev_rxq_interrupt_setup(struct rte_eth_dev *dev);
+static int txgbe_dev_interrupt_get_status(struct rte_eth_dev *dev);
+static int txgbe_dev_interrupt_action(struct rte_eth_dev *dev,
+ struct rte_intr_handle *handle);
+static void txgbe_dev_interrupt_handler(void *param);
+static void txgbe_dev_interrupt_delayed_handler(void *param);
+static void txgbe_configure_msix(struct rte_eth_dev *dev);
+
 /*
  * The set of PCI devices this driver supports
  */
@@ -77,13 +88,24 @@ txgbe_pf_reset_hw(struct txgbe_hw *hw)
 static inline void
 txgbe_enable_intr(struct rte_eth_dev *dev)
 {
-   RTE_SET_USED(dev);
+   struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
+   struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+
+   wr32(hw, TXGBE_IENMISC, intr->mask_misc);
+   wr32(hw, TXGBE_IMC(0), TXGBE_IMC_MASK);
+   wr32(hw, TXGBE_IMC(1), TXGBE_IMC_MASK);
+   txgbe_flush(hw);
 }
 
 static void
 txgbe_disable_intr(struct txgbe_hw *hw)
 {
-   RTE_SET_USED(hw);
+   PMD_INIT_FUNC_TRACE();
+
+   wr32(hw, TXGBE_IENMISC, ~BIT_MASK32);
+   wr32(hw, TXGBE_IMS(0), TXGBE_IMC_MASK);
+   wr32(hw, TXGBE_IMS(1), TXGBE_IMC_MASK);
+   txgbe_flush(hw);
 }
 
 static int
@@ -255,6 +277,9 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void 
*init_params __rte_unused)
 eth_dev->data->port_id, pci_dev->id.vendor_id,
 pci_dev->id.device_id);
 
+   rte_intr_callback_register(intr_handle,
+  txgbe_dev_interrupt_handler, eth_dev);
+
/* enable uio/vfio intr/eventfd mapping */
rte_intr_enable(intr_handle);
 
@@ -362,6 +387,20 @@ static struct rte_pci_driver rte_txgbe_pmd = {
 };
 
 
+
+static void
+txgbe_dev_phy_intr_setup(struct rte_eth_dev *dev)
+{
+   struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+   struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
+   uint32_t gpie;
+
+   gpie = rd32(hw, TXGBE_GPIOINTEN);
+   gpie |= TXGBE_GPIOBIT_6;
+   wr32(hw, TXGBE_GPIOINTEN, gpie);
+   intr->mask_misc |= TXGBE_ICRMISC_GPIO;
+}
+
 /*
  * Configure device link speed and setup link.
  * It returns 0 on success.
@@ -414,6 +453,8 @@ txgbe_dev_start(struct rte_eth_dev *dev)
hw->mac.start_hw(hw);
hw->mac.get_link_status = true;
 
+   txgbe_dev_phy_intr_setup(dev);
+
/* check and configure queue intr-vector mapping */
if ((rte_intr_cap_multiple(intr_handle) ||
 !RTE_ETH_DEV_SRIOV(dev).active) &&
@@ -434,6 +475,9 @@ txgbe_dev_start(struct rte_eth_dev *dev)
}
}
 
+   /* confiugre msix for sleep until rx interrupt */
+   txgbe_configure_msix(dev);
+
/* initialize transmission unit */
txgbe_dev_tx_init(dev);
 
@@ -511,6 +555,27 @@ txgbe_dev_start(struct rte_eth_dev *dev)
 
 skip_link_setup:
 
+   if (rte_intr_allow_others(intr_handle)) {
+   /* check if lsc interrupt is enabled */
+   if (dev->data->dev_conf.intr_conf.lsc != 0)
+   txgbe_dev_lsc_interrupt_setup(dev, TRUE);
+   else
+   txgbe_dev_lsc_interrupt_setup(dev, FALSE);
+   txgbe_dev_macsec_interrupt_setup(dev);
+   txgbe_set_ivar_map(hw, -1, 1, TXGBE_MISC_VEC_ID);
+   } else {
+   rte_intr_callback_unregister(intr_handle,
+txgbe_dev_interrupt_handler, dev);
+   if (dev->data->dev_

[dpdk-dev] [PATCH v1 11/42] net/txgbe: add PHY reset

[Jiawen Wu]

Add phy reset function, support read and write phy registers.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_hw.c  |   5 +
 drivers/net/txgbe/base/txgbe_phy.c | 226 +
 drivers/net/txgbe/base/txgbe_phy.h |  10 ++
 3 files changed, 241 insertions(+)

diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index 64fc14478..21745905d 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -341,10 +341,15 @@ s32 txgbe_init_ops_pf(struct txgbe_hw *hw)
/* PHY */
phy->identify = txgbe_identify_phy;
phy->init = txgbe_init_phy_raptor;
+   phy->read_reg = txgbe_read_phy_reg;
+   phy->write_reg = txgbe_write_phy_reg;
+   phy->read_reg_mdi = txgbe_read_phy_reg_mdi;
+   phy->write_reg_mdi = txgbe_write_phy_reg_mdi;
phy->read_i2c_byte = txgbe_read_i2c_byte;
phy->write_i2c_byte = txgbe_write_i2c_byte;
phy->read_i2c_eeprom = txgbe_read_i2c_eeprom;
phy->write_i2c_eeprom = txgbe_write_i2c_eeprom;
+   phy->reset = txgbe_reset_phy;
 
/* MAC */
mac->init_hw = txgbe_init_hw;
diff --git a/drivers/net/txgbe/base/txgbe_phy.c 
b/drivers/net/txgbe/base/txgbe_phy.c
index 540bc9ce9..5e42dfa23 100644
--- a/drivers/net/txgbe/base/txgbe_phy.c
+++ b/drivers/net/txgbe/base/txgbe_phy.c
@@ -112,6 +112,30 @@ s32 txgbe_identify_phy(struct txgbe_hw *hw)
return err;
 }
 
+/**
+ * txgbe_check_reset_blocked - check status of MNG FW veto bit
+ * @hw: pointer to the hardware structure
+ *
+ * This function checks the STAT.MNGVETO bit to see if there are
+ * any constraints on link from manageability.  For MAC's that don't
+ * have this bit just return faluse since the link can not be blocked
+ * via this method.
+ **/
+s32 txgbe_check_reset_blocked(struct txgbe_hw *hw)
+{
+   u32 mmngc;
+
+   DEBUGFUNC("txgbe_check_reset_blocked");
+
+   mmngc = rd32(hw, TXGBE_STAT);
+   if (mmngc & TXGBE_STAT_MNGVETO) {
+   DEBUGOUT("MNG_VETO bit detected.\n");
+   return true;
+   }
+
+   return false;
+}
+
 /**
  *  txgbe_validate_phy_addr - Determines phy address is valid
  *  @hw: pointer to hardware structure
@@ -200,6 +224,208 @@ enum txgbe_phy_type txgbe_get_phy_type_from_id(u32 phy_id)
return phy_type;
 }
 
+static s32
+txgbe_reset_extphy(struct txgbe_hw *hw)
+{
+   u16 ctrl = 0;
+   int err, i;
+
+   err = hw->phy.read_reg(hw, TXGBE_MD_PORT_CTRL,
+   TXGBE_MD_DEV_GENERAL, &ctrl);
+   if (err != 0)
+   return err;
+   ctrl |= TXGBE_MD_PORT_CTRL_RESET;
+   err = hw->phy.write_reg(hw, TXGBE_MD_PORT_CTRL,
+   TXGBE_MD_DEV_GENERAL, ctrl);
+   if (err != 0)
+   return err;
+
+   /*
+* Poll for reset bit to self-clear indicating reset is complete.
+* Some PHYs could take up to 3 seconds to complete and need about
+* 1.7 usec delay after the reset is complete.
+*/
+   for (i = 0; i < 30; i++) {
+   msec_delay(100);
+   err = hw->phy.read_reg(hw, TXGBE_MD_PORT_CTRL,
+   TXGBE_MD_DEV_GENERAL, &ctrl);
+   if (err != 0)
+   return err;
+
+   if (!(ctrl & TXGBE_MD_PORT_CTRL_RESET)) {
+   usec_delay(2);
+   break;
+   }
+   }
+
+   if (ctrl & TXGBE_MD_PORT_CTRL_RESET) {
+   err = TXGBE_ERR_RESET_FAILED;
+   DEBUGOUT("PHY reset polling failed to complete.\n");
+   }
+
+   return err;
+}
+
+/**
+ *  txgbe_reset_phy - Performs a PHY reset
+ *  @hw: pointer to hardware structure
+ **/
+s32 txgbe_reset_phy(struct txgbe_hw *hw)
+{
+   s32 err = 0;
+
+   DEBUGFUNC("txgbe_reset_phy");
+
+   if (hw->phy.type == txgbe_phy_unknown)
+   err = txgbe_identify_phy(hw);
+
+   if (err != 0 || hw->phy.type == txgbe_phy_none)
+   return err;
+
+   /* Don't reset PHY if it's shut down due to overtemp. */
+   if (TXGBE_ERR_OVERTEMP == hw->phy.check_overtemp(hw))
+   return err;
+
+   /* Blocked by MNG FW so bail */
+   if (txgbe_check_reset_blocked(hw))
+   return err;
+
+   switch (hw->phy.type) {
+   case txgbe_phy_cu_mtd:
+   err = txgbe_reset_extphy(hw);
+   break;
+   default:
+   break;
+   }
+
+   return err;
+}
+
+/**
+ *  txgbe_read_phy_mdi - Reads a value from a specified PHY register without
+ *  the SWFW lock
+ *  @hw: pointer to hardware structure
+ *  @reg_addr: 32 bit address of PHY register to read
+ *  @device_type: 5 bit device type
+ *  @phy_data: Pointer to read data from PHY register
+ **/
+s32 txgbe_read_phy_reg_mdi(struct txgbe_hw *hw, u32 reg_addr, u32 device_type,
+  u16 *phy_data)
+{
+   u32 command, data;
+
+   /* Setup and write the addre

[dpdk-dev] [PATCH v1 14/42] net/txgbe: add link status change

[Jiawen Wu]

Add ethdev link interrupt handler, MAC setup link and check link status and get 
capabilities.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_eeprom.h |   3 +
 drivers/net/txgbe/base/txgbe_hw.c | 508 +-
 drivers/net/txgbe/base/txgbe_hw.h |  15 +
 drivers/net/txgbe/base/txgbe_phy.c| 312 
 drivers/net/txgbe/base/txgbe_phy.h|  12 +
 drivers/net/txgbe/base/txgbe_type.h   |  18 +
 drivers/net/txgbe/txgbe_ethdev.c  | 164 -
 drivers/net/txgbe/txgbe_ethdev.h  |   5 +
 8 files changed, 1026 insertions(+), 11 deletions(-)

diff --git a/drivers/net/txgbe/base/txgbe_eeprom.h 
b/drivers/net/txgbe/base/txgbe_eeprom.h
index 47b6a2f2b..21de7e9b5 100644
--- a/drivers/net/txgbe/base/txgbe_eeprom.h
+++ b/drivers/net/txgbe/base/txgbe_eeprom.h
@@ -25,6 +25,9 @@
 
 #define TXGBE_DEVICE_CAPS_ALLOW_ANY_SFP0x1
 #define TXGBE_DEVICE_CAPS_NO_CROSSTALK_WR  (1 << 7)
+#define TXGBE_FW_LESM_PARAMETERS_PTR   0x2
+#define TXGBE_FW_LESM_STATE_1  0x1
+#define TXGBE_FW_LESM_STATE_ENABLED0x8000 /* LESM Enable bit */
 
 s32 txgbe_init_eeprom_params(struct txgbe_hw *hw);
 s32 txgbe_calc_eeprom_checksum(struct txgbe_hw *hw);
diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index 215900895..26593c5f6 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -9,6 +9,11 @@
 #include "txgbe_mng.h"
 #include "txgbe_hw.h"
 
+
+STATIC s32 txgbe_setup_copper_link_raptor(struct txgbe_hw *hw,
+u32 speed,
+bool autoneg_wait_to_complete);
+
 /**
  *  txgbe_start_hw - Prepare hardware for Tx/Rx
  *  @hw: pointer to hardware structure
@@ -229,6 +234,118 @@ s32 txgbe_set_rar(struct txgbe_hw *hw, u32 index, u8 
*addr, u32 vmdq,
 }
 
 
+/**
+ *  txgbe_need_crosstalk_fix - Determine if we need to do cross talk fix
+ *  @hw: pointer to hardware structure
+ *
+ *  Contains the logic to identify if we need to verify link for the
+ *  crosstalk fix
+ **/
+static bool txgbe_need_crosstalk_fix(struct txgbe_hw *hw)
+{
+
+   /* Does FW say we need the fix */
+   if (!hw->need_crosstalk_fix)
+   return false;
+
+   /* Only consider SFP+ PHYs i.e. media type fiber */
+   switch (hw->phy.media_type) {
+   case txgbe_media_type_fiber:
+   case txgbe_media_type_fiber_qsfp:
+   break;
+   default:
+   return false;
+   }
+
+   return true;
+}
+
+/**
+ *  txgbe_check_mac_link - Determine link and speed status
+ *  @hw: pointer to hardware structure
+ *  @speed: pointer to link speed
+ *  @link_up: true when link is up
+ *  @link_up_wait_to_complete: bool used to wait for link up or not
+ *
+ *  Reads the links register to determine if link is up and the current speed
+ **/
+s32 txgbe_check_mac_link(struct txgbe_hw *hw, u32 *speed,
+bool *link_up, bool link_up_wait_to_complete)
+{
+   u32 links_reg, links_orig;
+   u32 i;
+
+   DEBUGFUNC("txgbe_check_mac_link");
+
+   /* If Crosstalk fix enabled do the sanity check of making sure
+* the SFP+ cage is full.
+*/
+   if (txgbe_need_crosstalk_fix(hw)) {
+   u32 sfp_cage_full;
+
+   switch (hw->mac.type) {
+   case txgbe_mac_raptor:
+   sfp_cage_full = !rd32m(hw, TXGBE_GPIODATA,
+   TXGBE_GPIOBIT_2);
+   break;
+   default:
+   /* sanity check - No SFP+ devices here */
+   sfp_cage_full = false;
+   break;
+   }
+
+   if (!sfp_cage_full) {
+   *link_up = false;
+   *speed = TXGBE_LINK_SPEED_UNKNOWN;
+   return 0;
+   }
+   }
+
+   /* clear the old state */
+   links_orig = rd32(hw, TXGBE_PORTSTAT);
+
+   links_reg = rd32(hw, TXGBE_PORTSTAT);
+
+   if (links_orig != links_reg) {
+   DEBUGOUT("LINKS changed from %08X to %08X\n",
+ links_orig, links_reg);
+   }
+
+   if (link_up_wait_to_complete) {
+   for (i = 0; i < hw->mac.max_link_up_time; i++) {
+   if (links_reg & TXGBE_PORTSTAT_UP) {
+   *link_up = true;
+   break;
+   } else {
+   *link_up = false;
+   }
+   msec_delay(100);
+   links_reg = rd32(hw, TXGBE_PORTSTAT);
+   }
+   } else {
+   if (links_reg & TXGBE_PORTSTAT_UP)
+   *link_up = true;
+   else
+   *link_up = false;
+   }
+
+   switch (links_reg & TXGBE_PORTSTAT_BW_MASK) {
+   case

[dpdk-dev] [PATCH v1 16/42] net/txgbe: add autoc read and write

[Jiawen Wu]

Add autoc read and write for kr/kx/kx4/sfi link.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_hw.c   |   2 +
 drivers/net/txgbe/base/txgbe_phy.c  | 848 
 drivers/net/txgbe/base/txgbe_phy.h  |   2 +
 drivers/net/txgbe/base/txgbe_type.h |  21 +
 4 files changed, 873 insertions(+)

diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index b494a57e8..37f55c1fc 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -807,6 +807,8 @@ s32 txgbe_init_ops_pf(struct txgbe_hw *hw)
mac->reset_hw = txgbe_reset_hw;
 
mac->get_device_caps = txgbe_get_device_caps;
+   mac->autoc_read = txgbe_autoc_read;
+   mac->autoc_write = txgbe_autoc_write;
 
/* Link */
mac->get_link_capabilities = txgbe_get_link_capabilities_raptor;
diff --git a/drivers/net/txgbe/base/txgbe_phy.c 
b/drivers/net/txgbe/base/txgbe_phy.c
index 59d28506e..7981fb2f8 100644
--- a/drivers/net/txgbe/base/txgbe_phy.c
+++ b/drivers/net/txgbe/base/txgbe_phy.c
@@ -1373,3 +1373,851 @@ STATIC void txgbe_i2c_stop(struct txgbe_hw *hw)
wr32(hw, TXGBE_I2CENA, 0);
 }
 
+static s32
+txgbe_set_sgmii_an37_ability(struct txgbe_hw *hw)
+{
+   u32 value;
+
+   wr32_epcs(hw, VR_XS_OR_PCS_MMD_DIGI_CTL1, 0x3002);
+   wr32_epcs(hw, SR_MII_MMD_AN_CTL, 0x0105);
+   wr32_epcs(hw, SR_MII_MMD_DIGI_CTL, 0x0200);
+   value = rd32_epcs(hw, SR_MII_MMD_CTL);
+   value = (value & ~0x1200) | (0x1 << 12) | (0x1 << 9);
+   wr32_epcs(hw, SR_MII_MMD_CTL, value);
+   return 0;
+}
+
+static s32
+txgbe_set_link_to_kr(struct txgbe_hw *hw, bool autoneg)
+{
+   u32 i;
+   s32 err = 0;
+
+   /* 1. Wait xpcs power-up good */
+   for (i = 0; i < 100; i++) {
+   if ((rd32_epcs(hw, VR_XS_OR_PCS_MMD_DIGI_STATUS) &
+   VR_XS_OR_PCS_MMD_DIGI_STATUS_PSEQ_MASK) ==
+   VR_XS_OR_PCS_MMD_DIGI_STATUS_PSEQ_POWER_GOOD)
+   break;
+   msleep(10);
+   }
+   if (i == 100) {
+   err = TXGBE_ERR_XPCS_POWER_UP_FAILED;
+   goto out;
+   }
+
+   if (!autoneg) {
+   /* 2. Disable xpcs AN-73 */
+   wr32_epcs(hw, SR_AN_CTRL, 0x0);
+   /* Disable PHY MPLLA for eth mode change(after ECO) */
+   wr32_ephy(hw, 0x4, 0x243A);
+   txgbe_flush(hw);
+   msleep(1);
+   /* Set the eth change_mode bit first in mis_rst register
+* for corresponding LAN port */
+   wr32(hw, TXGBE_RST, TXGBE_RST_ETH(hw->bus.lan_id));
+
+   /* 3. Set VR_XS_PMA_Gen5_12G_MPLLA_CTRL3 Register
+* Bit[10:0](MPLLA_BANDWIDTH) = 11'd123 (default: 11'd16)
+*/
+   wr32_epcs(hw, TXGBE_PHY_MPLLA_CTL3,
+   TXGBE_PHY_MPLLA_CTL3_MULTIPLIER_BW_10GBASER_KR);
+
+   /* 4. Set VR_XS_PMA_Gen5_12G_MISC_CTRL0 Register
+* Bit[12:8](RX_VREF_CTRL) = 5'hF (default: 5'h11)
+*/
+   wr32_epcs(hw, TXGBE_PHY_MISC_CTL0, 0xCF00);
+
+   /* 5. Set VR_XS_PMA_Gen5_12G_RX_EQ_CTRL0 Register
+* Bit[15:8](VGA1/2_GAIN_0) = 8'h77
+* Bit[7:5](CTLE_POLE_0) = 3'h2
+* Bit[4:0](CTLE_BOOST_0) = 4'hA
+*/
+   wr32_epcs(hw, TXGBE_PHY_RX_EQ_CTL0, 0x774A);
+
+   /* 6. Set VR_MII_Gen5_12G_RX_GENCTRL3 Register
+* Bit[2:0](LOS_TRSHLD_0) = 3'h4 (default: 3)
+*/
+   wr32_epcs(hw, TXGBE_PHY_RX_GEN_CTL3, 0x0004);
+
+   /* 7. Initialize the mode by setting VR XS or PCS MMD Digital
+* Control1 Register Bit[15](VR_RST) */
+   wr32_epcs(hw, VR_XS_OR_PCS_MMD_DIGI_CTL1, 0xA000);
+
+   /* Wait phy initialization done */
+   for (i = 0; i < 100; i++) {
+   if ((rd32_epcs(hw,
+   VR_XS_OR_PCS_MMD_DIGI_CTL1) &
+   VR_XS_OR_PCS_MMD_DIGI_CTL1_VR_RST) == 0)
+   break;
+   msleep(100);
+   }
+   if (i == 100) {
+   err = TXGBE_ERR_PHY_INIT_NOT_DONE;
+   goto out;
+   }
+   } else {
+wr32_epcs(hw, VR_AN_KR_MODE_CL, 0x1);
+   }
+out:
+   return err;
+}
+
+static s32
+txgbe_set_link_to_kx4(struct txgbe_hw *hw, bool autoneg)
+{
+   u32 i;
+   s32 err = 0;
+   u32 value;
+
+   /* Check link status, if already set, skip setting it again */
+   if (hw->link_status == TXGBE_LINK_STATUS_KX4) {
+   goto out;
+   }
+
+   /* 1. Wait xpcs power-up good */
+   for (i = 0; i < 100; i++) {
+   if ((rd32_epcs(hw, VR_XS_OR_PCS_MMD_DIGI_STATUS) &
+   VR_XS_OR_PCS_MMD_DIGI_STATUS_PSEQ_MASK

[dpdk-dev] [PATCH v1 15/42] net/txgbe: add multi-speed link setup

[Jiawen Wu]

Add multispeed fiber setup link and laser control.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_hw.c | 400 +-
 drivers/net/txgbe/base/txgbe_hw.h |  11 +
 2 files changed, 410 insertions(+), 1 deletion(-)

diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index 26593c5f6..b494a57e8 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -406,6 +406,152 @@ void txgbe_clear_tx_pending(struct txgbe_hw *hw)
wr32(hw, TXGBE_PSRCTL, hlreg0);
 }
 
+
+/**
+ *  txgbe_setup_mac_link_multispeed_fiber - Set MAC link speed
+ *  @hw: pointer to hardware structure
+ *  @speed: new link speed
+ *  @autoneg_wait_to_complete: true when waiting for completion is needed
+ *
+ *  Set the link speed in the MAC and/or PHY register and restarts link.
+ **/
+s32 txgbe_setup_mac_link_multispeed_fiber(struct txgbe_hw *hw,
+ u32 speed,
+ bool autoneg_wait_to_complete)
+{
+   u32 link_speed = TXGBE_LINK_SPEED_UNKNOWN;
+   u32 highest_link_speed = TXGBE_LINK_SPEED_UNKNOWN;
+   s32 status = 0;
+   u32 speedcnt = 0;
+   u32 i = 0;
+   bool autoneg, link_up = false;
+
+   DEBUGFUNC("txgbe_setup_mac_link_multispeed_fiber");
+
+   /* Mask off requested but non-supported speeds */
+   status = hw->mac.get_link_capabilities(hw, &link_speed, &autoneg);
+   if (status != 0)
+   return status;
+
+   speed &= link_speed;
+
+   /* Try each speed one by one, highest priority first.  We do this in
+* software because 10Gb fiber doesn't support speed autonegotiation.
+*/
+   if (speed & TXGBE_LINK_SPEED_10GB_FULL) {
+   speedcnt++;
+   highest_link_speed = TXGBE_LINK_SPEED_10GB_FULL;
+
+   /* Set the module link speed */
+   switch (hw->phy.media_type) {
+   case txgbe_media_type_fiber:
+   hw->mac.set_rate_select_speed(hw,
+   TXGBE_LINK_SPEED_10GB_FULL);
+   break;
+   case txgbe_media_type_fiber_qsfp:
+   /* QSFP module automatically detects MAC link speed */
+   break;
+   default:
+   DEBUGOUT("Unexpected media type.\n");
+   break;
+   }
+
+   /* Allow module to change analog characteristics (1G->10G) */
+   msec_delay(40);
+
+   status = hw->mac.setup_mac_link(hw,
+   TXGBE_LINK_SPEED_10GB_FULL,
+   autoneg_wait_to_complete);
+   if (status != 0)
+   return status;
+
+   /* Flap the Tx laser if it has not already been done */
+   hw->mac.flap_tx_laser(hw);
+
+   /* Wait for the controller to acquire link.  Per IEEE 802.3ap,
+* Section 73.10.2, we may have to wait up to 500ms if KR is
+* attempted.  uses the same timing for 10g SFI.
+*/
+   for (i = 0; i < 5; i++) {
+   /* Wait for the link partner to also set speed */
+   msec_delay(100);
+
+   /* If we have link, just jump out */
+   status = hw->mac.check_link(hw, &link_speed,
+   &link_up, false);
+   if (status != 0)
+   return status;
+
+   if (link_up)
+   goto out;
+   }
+   }
+
+   if (speed & TXGBE_LINK_SPEED_1GB_FULL) {
+   speedcnt++;
+   if (highest_link_speed == TXGBE_LINK_SPEED_UNKNOWN)
+   highest_link_speed = TXGBE_LINK_SPEED_1GB_FULL;
+
+   /* Set the module link speed */
+   switch (hw->phy.media_type) {
+   case txgbe_media_type_fiber:
+   hw->mac.set_rate_select_speed(hw,
+   TXGBE_LINK_SPEED_1GB_FULL);
+   break;
+   case txgbe_media_type_fiber_qsfp:
+   /* QSFP module automatically detects link speed */
+   break;
+   default:
+   DEBUGOUT("Unexpected media type.\n");
+   break;
+   }
+
+   /* Allow module to change analog characteristics (10G->1G) */
+   msec_delay(40);
+
+   status = hw->mac.setup_mac_link(hw,
+   TXGBE_LINK_SPEED_1GB_FULL,
+   autoneg_wait_to_complete);
+   if (status != 0)
+   return status;
+
+   /* Flap the Tx laser if it has not already been done */
+   hw->mac.flap_tx_laser(hw);
+
+  

[dpdk-dev] [PATCH v1 19/42] net/txgbe: add RX and TX start

[Jiawen Wu]

Add receive and transmit units start for specified queue.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_hw.h |   1 +
 drivers/net/txgbe/txgbe_ethdev.c  |   2 +
 drivers/net/txgbe/txgbe_ethdev.h  |   4 +
 drivers/net/txgbe/txgbe_rxtx.c| 175 +-
 drivers/net/txgbe/txgbe_rxtx.h|  62 +++
 5 files changed, 243 insertions(+), 1 deletion(-)

diff --git a/drivers/net/txgbe/base/txgbe_hw.h 
b/drivers/net/txgbe/base/txgbe_hw.h
index f57c26bee..a597383b8 100644
--- a/drivers/net/txgbe/base/txgbe_hw.h
+++ b/drivers/net/txgbe/base/txgbe_hw.h
@@ -56,5 +56,6 @@ void txgbe_init_mac_link_ops(struct txgbe_hw *hw);
 s32 txgbe_reset_hw(struct txgbe_hw *hw);
 s32 txgbe_start_hw_raptor(struct txgbe_hw *hw);
 s32 txgbe_init_phy_raptor(struct txgbe_hw *hw);
+s32 txgbe_enable_rx_dma_raptor(struct txgbe_hw *hw, u32 regval);
 bool txgbe_verify_lesm_fw_enabled_raptor(struct txgbe_hw *hw);
 #endif /* _TXGBE_HW_H_ */
diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index abc457109..4fab88c5c 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -1319,6 +1319,8 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {
.link_update= txgbe_dev_link_update,
.stats_get  = txgbe_dev_stats_get,
.stats_reset= txgbe_dev_stats_reset,
+   .rx_queue_start = txgbe_dev_rx_queue_start,
+   .tx_queue_start = txgbe_dev_tx_queue_start,
.dev_led_on = txgbe_dev_led_on,
.dev_led_off= txgbe_dev_led_off,
 };
diff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h
index 6739b580c..2dc0327cb 100644
--- a/drivers/net/txgbe/txgbe_ethdev.h
+++ b/drivers/net/txgbe/txgbe_ethdev.h
@@ -90,6 +90,10 @@ void txgbe_dev_tx_init(struct rte_eth_dev *dev);
 
 int txgbe_dev_rxtx_start(struct rte_eth_dev *dev);
 
+int txgbe_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
+
+int txgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
+
 uint16_t txgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts);
 
diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index d3782f44d..ad5d1d22f 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -14,6 +14,7 @@
 #include 
 
 #include 
+#include 
 
 #include "txgbe_logs.h"
 #include "base/txgbe.h"
@@ -134,6 +135,38 @@ txgbe_dev_free_queues(struct rte_eth_dev *dev)
RTE_SET_USED(dev);
 }
 
+static int __rte_cold
+txgbe_alloc_rx_queue_mbufs(struct txgbe_rx_queue *rxq)
+{
+   struct txgbe_rx_entry *rxe = rxq->sw_ring;
+   uint64_t dma_addr;
+   unsigned int i;
+
+   /* Initialize software ring entries */
+   for (i = 0; i < rxq->nb_rx_desc; i++) {
+   volatile struct txgbe_rx_desc *rxd;
+   struct rte_mbuf *mbuf = rte_mbuf_raw_alloc(rxq->mb_pool);
+
+   if (mbuf == NULL) {
+   PMD_INIT_LOG(ERR, "RX mbuf alloc failed queue_id=%u",
+(unsigned) rxq->queue_id);
+   return -ENOMEM;
+   }
+
+   mbuf->data_off = RTE_PKTMBUF_HEADROOM;
+   mbuf->port = rxq->port_id;
+
+   dma_addr =
+   rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
+   rxd = &rxq->rx_ring[i];
+   TXGBE_RXD_HDRADDR(rxd, 0);
+   TXGBE_RXD_PKTADDR(rxd, dma_addr);
+   rxe[i].mbuf = mbuf;
+   }
+
+   return 0;
+}
+
 void __rte_cold
 txgbe_set_rx_function(struct rte_eth_dev *dev)
 {
@@ -382,13 +415,153 @@ txgbe_dev_tx_init(struct rte_eth_dev *dev)
}
 }
 
+/*
+ * Set up link loopback mode Tx->Rx.
+ */
+static inline void __rte_cold
+txgbe_setup_loopback_link_raptor(struct txgbe_hw *hw)
+{
+   PMD_INIT_FUNC_TRACE();
+
+   wr32m(hw, TXGBE_MACRXCFG, TXGBE_MACRXCFG_LB, TXGBE_MACRXCFG_LB);
+
+   msec_delay(50);
+}
+
 /*
  * Start Transmit and Receive Units.
  */
 int __rte_cold
 txgbe_dev_rxtx_start(struct rte_eth_dev *dev)
 {
-   RTE_SET_USED(dev);
+   struct txgbe_hw *hw;
+   struct txgbe_tx_queue *txq;
+   struct txgbe_rx_queue *rxq;
+   uint32_t dmatxctl;
+   uint32_t rxctrl;
+   uint16_t i;
+   int ret = 0;
+
+   PMD_INIT_FUNC_TRACE();
+   hw = TXGBE_DEV_HW(dev);
+
+   for (i = 0; i < dev->data->nb_tx_queues; i++) {
+   txq = dev->data->tx_queues[i];
+   /* Setup Transmit Threshold Registers */
+   wr32m(hw, TXGBE_TXCFG(txq->reg_idx),
+ TXGBE_TXCFG_HTHRESH_MASK |
+ TXGBE_TXCFG_WTHRESH_MASK,
+ TXGBE_TXCFG_HTHRESH(txq->hthresh) |
+ TXGBE_TXCFG_WTHRESH(txq->wthresh));
+   }
+
+   dmatxctl = rd32(hw, TXGBE_DMATXCTRL);
+  

[dpdk-dev] [PATCH v1 18/42] net/txgbe: add rx and tx init

[Jiawen Wu]

Add receive and transmit initialize unit.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_type.h |   3 +
 drivers/net/txgbe/txgbe_ethdev.c|   3 +
 drivers/net/txgbe/txgbe_ethdev.h|  28 +++
 drivers/net/txgbe/txgbe_rxtx.c  | 330 +++-
 drivers/net/txgbe/txgbe_rxtx.h  |  23 ++
 5 files changed, 381 insertions(+), 6 deletions(-)

diff --git a/drivers/net/txgbe/base/txgbe_type.h 
b/drivers/net/txgbe/base/txgbe_type.h
index 5fd51fece..6229d8acc 100644
--- a/drivers/net/txgbe/base/txgbe_type.h
+++ b/drivers/net/txgbe/base/txgbe_type.h
@@ -8,6 +8,9 @@
 #define TXGBE_LINK_UP_TIME 90 /* 9.0 Seconds */
 #define TXGBE_AUTO_NEG_TIME45 /* 4.5 Seconds */
 
+#define TXGBE_FRAME_SIZE_MAX   (9728) /* Maximum frame size, +FCS */
+#define TXGBE_FRAME_SIZE_DFT   (1518) /* Default frame size, +FCS */
+
 #define TXGBE_ALIGN128 /* as intel did */
 
 #include "txgbe_status.h"
diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 1803ace01..abc457109 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -124,6 +124,9 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void 
*init_params __rte_unused)
PMD_INIT_FUNC_TRACE();
 
eth_dev->dev_ops = &txgbe_eth_dev_ops;
+   eth_dev->rx_pkt_burst = &txgbe_recv_pkts;
+   eth_dev->tx_pkt_burst = &txgbe_xmit_pkts;
+   eth_dev->tx_pkt_prepare = &txgbe_prep_pkts;
 
/*
 * For secondary processes, we don't initialise any further as primary
diff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h
index ff2b36f02..6739b580c 100644
--- a/drivers/net/txgbe/txgbe_ethdev.h
+++ b/drivers/net/txgbe/txgbe_ethdev.h
@@ -19,6 +19,12 @@
 #define TXGBE_FLAG_MACSEC   (uint32_t)(1 << 3)
 #define TXGBE_FLAG_NEED_LINK_CONFIG (uint32_t)(1 << 4)
 
+/*
+ * Defines that were not part of txgbe_type.h as they are not used by the
+ * FreeBSD driver.
+ */
+#define TXGBE_VLAN_TAG_SIZE 4
+
 #define TXGBE_QUEUE_ITR_INTERVAL_DEFAULT   500 /* 500us */
 
 #define TXGBE_MISC_VEC_ID   RTE_INTR_VEC_ZERO_OFFSET
@@ -46,6 +52,7 @@ struct txgbe_adapter {
struct txgbe_hw_stats   stats;
struct txgbe_interrupt  intr;
struct txgbe_vf_info*vfdata;
+   bool rx_bulk_alloc_allowed;
 };
 
 struct txgbe_vf_representor {
@@ -82,6 +89,27 @@ int txgbe_dev_rx_init(struct rte_eth_dev *dev);
 void txgbe_dev_tx_init(struct rte_eth_dev *dev);
 
 int txgbe_dev_rxtx_start(struct rte_eth_dev *dev);
+
+uint16_t txgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
+   uint16_t nb_pkts);
+
+uint16_t txgbe_recv_pkts_bulk_alloc(void *rx_queue, struct rte_mbuf **rx_pkts,
+   uint16_t nb_pkts);
+
+uint16_t txgbe_recv_pkts_lro_single_alloc(void *rx_queue,
+   struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
+uint16_t txgbe_recv_pkts_lro_bulk_alloc(void *rx_queue,
+   struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
+
+uint16_t txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
+   uint16_t nb_pkts);
+
+uint16_t txgbe_xmit_pkts_simple(void *tx_queue, struct rte_mbuf **tx_pkts,
+   uint16_t nb_pkts);
+
+uint16_t txgbe_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
+   uint16_t nb_pkts);
+
 void txgbe_set_ivar_map(struct txgbe_hw *hw, int8_t direction,
   uint8_t queue, uint8_t msix_vector);
 
diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index cb067d4f4..d3782f44d 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -20,6 +20,87 @@
 #include "txgbe_ethdev.h"
 #include "txgbe_rxtx.h"
 
+uint16_t
+txgbe_xmit_pkts_simple(void *tx_queue, struct rte_mbuf **tx_pkts,
+  uint16_t nb_pkts)
+{
+   RTE_SET_USED(tx_queue);
+   RTE_SET_USED(tx_pkts);
+   RTE_SET_USED(nb_pkts);
+
+   return 0;
+}
+
+uint16_t
+txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
+   uint16_t nb_pkts)
+{
+   RTE_SET_USED(tx_queue);
+   RTE_SET_USED(tx_pkts);
+   RTE_SET_USED(nb_pkts);
+
+   return 0;
+}
+
+uint16_t
+txgbe_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
+{
+   RTE_SET_USED(tx_queue);
+   RTE_SET_USED(tx_pkts);
+   RTE_SET_USED(nb_pkts);
+
+   return 0;
+}
+
+/* split requests into chunks of size RTE_PMD_TXGBE_RX_MAX_BURST */
+uint16_t
+txgbe_recv_pkts_bulk_alloc(void *rx_queue, struct rte_mbuf **rx_pkts,
+  uint16_t nb_pkts)
+{
+   RTE_SET_USED(rx_queue);
+   RTE_SET_USED(rx_pkts);
+   RTE_SET_USED(nb_pkts);
+
+   return 0;
+}
+
+uint16_t
+txgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
+   uint16_t nb_pkts)
+{
+   RTE_SET_USED(rx_queue);
+   RTE_SET_USED(rx_pkts);
+   RTE_SET_USED(nb_pkts);
+
+   return 0;

[dpdk-dev] [PATCH v1 17/42] net/txgbe: support device LED on and off

[Jiawen Wu]

Support device LED on and off.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_hw.c | 46 +++
 drivers/net/txgbe/base/txgbe_hw.h |  3 ++
 drivers/net/txgbe/txgbe_ethdev.c  | 23 
 3 files changed, 72 insertions(+)

diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index 37f55c1fc..13f79741a 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -161,6 +161,52 @@ s32 txgbe_stop_hw(struct txgbe_hw *hw)
return 0;
 }
 
+/**
+ *  txgbe_led_on - Turns on the software controllable LEDs.
+ *  @hw: pointer to hardware structure
+ *  @index: led number to turn on
+ **/
+s32 txgbe_led_on(struct txgbe_hw *hw, u32 index)
+{
+   u32 led_reg = rd32(hw, TXGBE_LEDCTL);
+
+   DEBUGFUNC("txgbe_led_on");
+
+   if (index > 4)
+   return TXGBE_ERR_PARAM;
+
+   /* To turn on the LED, set mode to ON. */
+   led_reg |= TXGBE_LEDCTL_SEL(index);
+   led_reg |= TXGBE_LEDCTL_OD(index);
+   wr32(hw, TXGBE_LEDCTL, led_reg);
+   txgbe_flush(hw);
+
+   return 0;
+}
+
+/**
+ *  txgbe_led_off - Turns off the software controllable LEDs.
+ *  @hw: pointer to hardware structure
+ *  @index: led number to turn off
+ **/
+s32 txgbe_led_off(struct txgbe_hw *hw, u32 index)
+{
+   u32 led_reg = rd32(hw, TXGBE_LEDCTL);
+
+   DEBUGFUNC("txgbe_led_off");
+
+   if (index > 4)
+   return TXGBE_ERR_PARAM;
+
+   /* To turn off the LED, set mode to OFF. */
+   led_reg &= ~(TXGBE_LEDCTL_SEL(index));
+   led_reg &= ~(TXGBE_LEDCTL_OD(index));
+   wr32(hw, TXGBE_LEDCTL, led_reg);
+   txgbe_flush(hw);
+
+   return 0;
+}
+
 /**
  *  txgbe_validate_mac_addr - Validate MAC address
  *  @mac_addr: pointer to MAC address.
diff --git a/drivers/net/txgbe/base/txgbe_hw.h 
b/drivers/net/txgbe/base/txgbe_hw.h
index d361f6590..f57c26bee 100644
--- a/drivers/net/txgbe/base/txgbe_hw.h
+++ b/drivers/net/txgbe/base/txgbe_hw.h
@@ -13,6 +13,9 @@ s32 txgbe_stop_hw(struct txgbe_hw *hw);
 s32 txgbe_start_hw_gen2(struct txgbe_hw *hw);
 s32 txgbe_start_hw_raptor(struct txgbe_hw *hw);
 
+s32 txgbe_led_on(struct txgbe_hw *hw, u32 index);
+s32 txgbe_led_off(struct txgbe_hw *hw, u32 index);
+
 s32 txgbe_set_rar(struct txgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
  u32 enable_addr);
 
diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 16008ea4e..1803ace01 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -590,6 +590,8 @@ txgbe_dev_start(struct rte_eth_dev *dev)
 */
txgbe_dev_link_update(dev, 0);
 
+   wr32m(hw, TXGBE_LEDCTL, 0x, TXGBE_LEDCTL_OD_MASK);
+
return 0;
 
 error:
@@ -654,6 +656,8 @@ txgbe_dev_stop(struct rte_eth_dev *dev)
intr_handle->intr_vec = NULL;
}
 
+   wr32m(hw, TXGBE_LEDCTL, 0x, TXGBE_LEDCTL_SEL_MASK);
+
hw->adapter_stopped = true;
 }
 
@@ -1196,6 +1200,23 @@ txgbe_dev_interrupt_handler(void *param)
txgbe_dev_interrupt_action(dev, dev->intr_handle);
 }
 
+static int
+txgbe_dev_led_on(struct rte_eth_dev *dev)
+{
+   struct txgbe_hw *hw;
+
+   hw = TXGBE_DEV_HW(dev);
+   return txgbe_led_on(hw, 4) == 0 ? 0 : -ENOTSUP;
+}
+
+static int
+txgbe_dev_led_off(struct rte_eth_dev *dev)
+{
+   struct txgbe_hw *hw;
+
+   hw = TXGBE_DEV_HW(dev);
+   return txgbe_led_off(hw, 4) == 0 ? 0 : -ENOTSUP;
+}
 /**
  * set the IVAR registers, mapping interrupt causes to vectors
  * @param hw
@@ -1295,6 +1316,8 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {
.link_update= txgbe_dev_link_update,
.stats_get  = txgbe_dev_stats_get,
.stats_reset= txgbe_dev_stats_reset,
+   .dev_led_on = txgbe_dev_led_on,
+   .dev_led_off= txgbe_dev_led_off,
 };
 
 RTE_PMD_REGISTER_PCI(net_txgbe, rte_txgbe_pmd);
-- 
2.18.4

[dpdk-dev] [PATCH v1 21/42] net/txgbe: add RX and TX queues setup

[Jiawen Wu]

Add receive and transmit queues setup.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/txgbe_ethdev.c |   2 +
 drivers/net/txgbe/txgbe_ethdev.h |   9 +
 drivers/net/txgbe/txgbe_rxtx.c   | 365 +++
 drivers/net/txgbe/txgbe_rxtx.h   |  44 
 4 files changed, 420 insertions(+)

diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 80470c6e7..d2a355524 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -1326,7 +1326,9 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {
.rx_queue_stop  = txgbe_dev_rx_queue_stop,
.tx_queue_start = txgbe_dev_tx_queue_start,
.tx_queue_stop  = txgbe_dev_tx_queue_stop,
+   .rx_queue_setup = txgbe_dev_rx_queue_setup,
.rx_queue_release   = txgbe_dev_rx_queue_release,
+   .tx_queue_setup = txgbe_dev_tx_queue_setup,
.tx_queue_release   = txgbe_dev_tx_queue_release,
.dev_led_on = txgbe_dev_led_on,
.dev_led_off= txgbe_dev_led_off,
diff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h
index f5ee1cae6..d38021538 100644
--- a/drivers/net/txgbe/txgbe_ethdev.h
+++ b/drivers/net/txgbe/txgbe_ethdev.h
@@ -90,6 +90,15 @@ void txgbe_dev_rx_queue_release(void *rxq);
 
 void txgbe_dev_tx_queue_release(void *txq);
 
+int  txgbe_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,
+   uint16_t nb_rx_desc, unsigned int socket_id,
+   const struct rte_eth_rxconf *rx_conf,
+   struct rte_mempool *mb_pool);
+
+int  txgbe_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,
+   uint16_t nb_tx_desc, unsigned int socket_id,
+   const struct rte_eth_txconf *tx_conf);
+
 int txgbe_dev_rx_init(struct rte_eth_dev *dev);
 
 void txgbe_dev_tx_init(struct rte_eth_dev *dev);
diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index 58824045b..2288332ce 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -15,6 +15,8 @@
 
 #include 
 #include 
+#include 
+#include 
 #include 
 #include 
 
@@ -34,6 +36,10 @@ txgbe_xmit_pkts_simple(void *tx_queue, struct rte_mbuf 
**tx_pkts,
return 0;
 }
 
+#ifndef DEFAULT_TX_FREE_THRESH
+#define DEFAULT_TX_FREE_THRESH 32
+#endif
+
 uint16_t
 txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
@@ -104,6 +110,29 @@ txgbe_recv_pkts_lro_bulk_alloc(void *rx_queue, struct 
rte_mbuf **rx_pkts,
return txgbe_recv_pkts_lro(rx_queue, rx_pkts, nb_pkts, true);
 }
 
+static void __rte_cold
+txgbe_tx_queue_release_mbufs(struct txgbe_tx_queue *txq)
+{
+   unsigned i;
+
+   if (txq->sw_ring != NULL) {
+   for (i = 0; i < txq->nb_tx_desc; i++) {
+   if (txq->sw_ring[i].mbuf != NULL) {
+   rte_pktmbuf_free_seg(txq->sw_ring[i].mbuf);
+   txq->sw_ring[i].mbuf = NULL;
+   }
+   }
+   }
+}
+
+static void __rte_cold
+txgbe_tx_free_swring(struct txgbe_tx_queue *txq)
+{
+   if (txq != NULL &&
+   txq->sw_ring != NULL)
+   rte_free(txq->sw_ring);
+}
+
 static void __rte_cold
 txgbe_tx_queue_release(struct txgbe_tx_queue *txq)
 {
@@ -120,6 +149,11 @@ txgbe_dev_tx_queue_release(void *txq)
txgbe_tx_queue_release(txq);
 }
 
+static const struct txgbe_txq_ops def_txq_ops = {
+   .release_mbufs = txgbe_tx_queue_release_mbufs,
+   .free_swring = txgbe_tx_free_swring,
+};
+
 /* Takes an ethdev and a queue and sets up the tx function to be used based on
  * the queue parameters. Used in tx_queue_setup by primary process and then
  * in dev_init by secondary process when attaching to an existing ethdev.
@@ -147,6 +181,136 @@ txgbe_set_tx_function(struct rte_eth_dev *dev, struct 
txgbe_tx_queue *txq)
}
 }
 
+int __rte_cold
+txgbe_dev_tx_queue_setup(struct rte_eth_dev *dev,
+uint16_t queue_idx,
+uint16_t nb_desc,
+unsigned int socket_id,
+const struct rte_eth_txconf *tx_conf)
+{
+   const struct rte_memzone *tz;
+   struct txgbe_tx_queue *txq;
+   struct txgbe_hw *hw;
+   uint16_t tx_free_thresh;
+   uint64_t offloads;
+
+   PMD_INIT_FUNC_TRACE();
+   hw = TXGBE_DEV_HW(dev);
+
+   offloads = tx_conf->offloads | dev->data->dev_conf.txmode.offloads;
+
+   /*
+* Validate number of transmit descriptors.
+* It must not exceed hardware maximum, and must be multiple
+* of TXGBE_ALIGN.
+*/
+   if (nb_desc % TXGBE_TXD_ALIGN != 0 ||
+   (nb_desc > TXGBE_RING_DESC_MAX) ||
+   (nb_desc < TXGBE_RING_DESC_MIN)) {
+   return -EINVAL;
+   }
+
+   /*
+* The

[dpdk-dev] [PATCH v1 22/42] net/txgbe: add packet type

[Jiawen Wu]

Add packet type marco definition and convert ptype to ptid.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/meson.build|   1 +
 drivers/net/txgbe/txgbe_ethdev.h |   1 +
 drivers/net/txgbe/txgbe_ptypes.c | 676 +++
 drivers/net/txgbe/txgbe_ptypes.h | 351 
 drivers/net/txgbe/txgbe_rxtx.h   |   2 -
 5 files changed, 1029 insertions(+), 2 deletions(-)
 create mode 100644 drivers/net/txgbe/txgbe_ptypes.c
 create mode 100644 drivers/net/txgbe/txgbe_ptypes.h

diff --git a/drivers/net/txgbe/meson.build b/drivers/net/txgbe/meson.build
index 88b05ad83..beb2052b0 100644
--- a/drivers/net/txgbe/meson.build
+++ b/drivers/net/txgbe/meson.build
@@ -8,6 +8,7 @@ objs = [base_objs]
 
 sources = files(
'txgbe_ethdev.c',
+   'txgbe_ptypes.c',
'txgbe_pf.c',
'txgbe_rxtx.c',
'txgbe_vf_representor.c',
diff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h
index d38021538..be6876823 100644
--- a/drivers/net/txgbe/txgbe_ethdev.h
+++ b/drivers/net/txgbe/txgbe_ethdev.h
@@ -8,6 +8,7 @@
 #include 
 
 #include "base/txgbe.h"
+#include "txgbe_ptypes.h"
 #include 
 #include 
 #include 
diff --git a/drivers/net/txgbe/txgbe_ptypes.c b/drivers/net/txgbe/txgbe_ptypes.c
new file mode 100644
index 0..e76b4001d
--- /dev/null
+++ b/drivers/net/txgbe/txgbe_ptypes.c
@@ -0,0 +1,676 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2015-2020
+ */
+
+#include 
+#include 
+
+#include "base/txgbe_type.h"
+#include "txgbe_ptypes.h"
+
+/* The txgbe_ptype_lookup is used to convert from the 8-bit ptid in the
+ * hardware to a bit-field that can be used by SW to more easily determine the
+ * packet type.
+ *
+ * Macros are used to shorten the table lines and make this table human
+ * readable.
+ *
+ * We store the PTYPE in the top byte of the bit field - this is just so that
+ * we can check that the table doesn't have a row missing, as the index into
+ * the table should be the PTYPE.
+ *
+ * Typical work flow:
+ *
+ * IF NOT txgbe_ptype_lookup[ptid].known
+ * THEN
+ *  Packet is unknown
+ * ELSE IF txgbe_ptype_lookup[ptid].mac == TXGBE_DEC_PTYPE_MAC_IP
+ *  Use the rest of the fields to look at the tunnels, inner protocols, etc
+ * ELSE
+ *  Use the enum txgbe_l2_ptypes to decode the packet type
+ * ENDIF
+ */
+#define TPTE(ptid, l2, l3, l4, tun, el2, el3, el4) \
+  [ptid] = (RTE_PTYPE_L2_##l2 | \
+   RTE_PTYPE_L3_##l3 | \
+   RTE_PTYPE_L4_##l4 | \
+   RTE_PTYPE_TUNNEL_##tun | \
+   RTE_PTYPE_INNER_L2_##el2 | \
+   RTE_PTYPE_INNER_L3_##el3 | \
+   RTE_PTYPE_INNER_L4_##el4)
+
+#define RTE_PTYPE_L2_NONE   0
+#define RTE_PTYPE_L3_NONE   0
+#define RTE_PTYPE_L4_NONE   0
+#define RTE_PTYPE_TUNNEL_NONE   0
+#define RTE_PTYPE_INNER_L2_NONE 0
+#define RTE_PTYPE_INNER_L3_NONE 0
+#define RTE_PTYPE_INNER_L4_NONE 0
+
+static u32 txgbe_ptype_lookup[TXGBE_PTID_MAX] __rte_cache_aligned = {
+  /* L2:0-3 L3:4-7 L4:8-11 TUN:12-15 EL2:16-19 EL3:20-23 EL2:24-27 */
+  /* L2: ETH */
+  TPTE(0x11, ETHER,  NONE, NONE, NONE, NONE, NONE, NONE),
+  TPTE(0x12, ETHER_TIMESYNC, NONE, NONE, NONE, NONE, NONE, NONE),
+  TPTE(0x13, ETHER_FIP,  NONE, NONE, NONE, NONE, NONE, NONE),
+  TPTE(0x14, ETHER_LLDP, NONE, NONE, NONE, NONE, NONE, NONE),
+  TPTE(0x15, ETHER_CNM,  NONE, NONE, NONE, NONE, NONE, NONE),
+  TPTE(0x16, ETHER_EAPOL,NONE, NONE, NONE, NONE, NONE, NONE),
+  TPTE(0x17, ETHER_ARP,  NONE, NONE, NONE, NONE, NONE, NONE),
+  /* L2: Ethertype Filter */
+  TPTE(0x18, ETHER_FILTER,   NONE, NONE, NONE, NONE, NONE, NONE),
+  TPTE(0x19, ETHER_FILTER,   NONE, NONE, NONE, NONE, NONE, NONE),
+  TPTE(0x1A, ETHER_FILTER,   NONE, NONE, NONE, NONE, NONE, NONE),
+  TPTE(0x1B, ETHER_FILTER,   NONE, NONE, NONE, NONE, NONE, NONE),
+  TPTE(0x1C, ETHER_FILTER,   NONE, NONE, NONE, NONE, NONE, NONE),
+  TPTE(0x1D, ETHER_FILTER,   NONE, NONE, NONE, NONE, NONE, NONE),
+  TPTE(0x1E, ETHER_FILTER,   NONE, NONE, NONE, NONE, NONE, NONE),
+  TPTE(0x1F, ETHER_FILTER,   NONE, NONE, NONE, NONE, NONE, NONE),
+  /* L3: IP */
+  TPTE(0x21, ETHER, IPV4, FRAG,NONE, NONE, NONE, NONE),
+  TPTE(0x22, ETHER, IPV4, NONFRAG, NONE, NONE, NONE, NONE),
+  TPTE(0x23, ETHER, IPV4, UDP, NONE, NONE, NONE, NONE),
+  TPTE(0x24, ETHER, IPV4, TCP, NONE, NONE, NONE, NONE),
+  TPTE(0x25, ETHER, IPV4, SCTP,NONE, NONE, NONE, NONE),
+  TPTE(0x29, ETHER, IPV6, FRAG,NONE, NONE, NONE, NONE),
+  TPTE(0x2A, ETHER, IPV6, NONFRAG, NONE, NONE, NONE, NONE),
+  TPTE(0x2B, ETHER, IPV6, UDP, NONE, NONE, NONE, NONE),
+  TPTE(0x2C, ETHER, IPV6, TCP, NONE, NONE, NONE, NONE),
+  TPTE(0x2D, ETHER, IPV6, SCTP,NONE, NONE, NONE, NONE),
+  /* L2: FCoE */
+  TPTE(0x30, ETHER_FCOE, NONE, NONE, NONE, NONE, NONE, NONE),
+  TPTE(0x31, ETHER_FCOE, NONE, NONE, NONE, NONE, NONE, NONE),
+  TPTE(0x32, ETHER_FCOE, NONE, NONE, NONE, NONE

[dpdk-dev] [PATCH v1 23/42] net/txgbe: fill simple transmit function

[Jiawen Wu]

Fill simple transmit function and define transmit descriptor.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/txgbe_rxtx.c | 226 -
 drivers/net/txgbe/txgbe_rxtx.h |  82 
 2 files changed, 304 insertions(+), 4 deletions(-)

diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index 2288332ce..3db9d314f 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -25,15 +25,233 @@
 #include "txgbe_ethdev.h"
 #include "txgbe_rxtx.h"
 
+/*
+ *
+ *  TX functions
+ *
+ **/
+
+/*
+ * Check for descriptors with their DD bit set and free mbufs.
+ * Return the total number of buffers freed.
+ */
+static __rte_always_inline int
+txgbe_tx_free_bufs(struct txgbe_tx_queue *txq)
+{
+   struct txgbe_tx_entry *txep;
+   uint32_t status;
+   int i, nb_free = 0;
+   struct rte_mbuf *m, *free[RTE_TXGBE_TX_MAX_FREE_BUF_SZ];
+
+   /* check DD bit on threshold descriptor */
+   status = txq->tx_ring[txq->tx_next_dd].dw3;
+   if (!(status & rte_cpu_to_le_32(TXGBE_TXD_DD))) {
+   if (txq->nb_tx_free >> 1 < txq->tx_free_thresh)
+   txgbe_set32_masked(txq->tdc_reg_addr,
+   TXGBE_TXCFG_FLUSH, TXGBE_TXCFG_FLUSH);
+   return 0;
+   }
+
+   /*
+* first buffer to free from S/W ring is at index
+* tx_next_dd - (tx_free_thresh-1)
+*/
+   txep = &(txq->sw_ring[txq->tx_next_dd - (txq->tx_free_thresh - 1)]);
+   for (i = 0; i < txq->tx_free_thresh; ++i, ++txep) {
+   /* free buffers one at a time */
+   m = rte_pktmbuf_prefree_seg(txep->mbuf);
+   txep->mbuf = NULL;
+
+   if (unlikely(m == NULL))
+   continue;
+
+   if (nb_free >= RTE_TXGBE_TX_MAX_FREE_BUF_SZ ||
+   (nb_free > 0 && m->pool != free[0]->pool)) {
+   rte_mempool_put_bulk(free[0]->pool,
+(void **)free, nb_free);
+   nb_free = 0;
+   }
+
+   free[nb_free++] = m;
+   }
+
+   if (nb_free > 0)
+   rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
+
+   /* buffers were freed, update counters */
+   txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_free_thresh);
+   txq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_free_thresh);
+   if (txq->tx_next_dd >= txq->nb_tx_desc)
+   txq->tx_next_dd = (uint16_t)(txq->tx_free_thresh - 1);
+
+   return txq->tx_free_thresh;
+}
+
+/* Populate 4 descriptors with data from 4 mbufs */
+static inline void
+tx4(volatile struct txgbe_tx_desc *txdp, struct rte_mbuf **pkts)
+{
+   uint64_t buf_dma_addr;
+   uint32_t pkt_len;
+   int i;
+
+   for (i = 0; i < 4; ++i, ++txdp, ++pkts) {
+   buf_dma_addr = rte_mbuf_data_iova(*pkts);
+   pkt_len = (*pkts)->data_len;
+
+   /* write data to descriptor */
+   txdp->qw0 = rte_cpu_to_le_64(buf_dma_addr);
+   txdp->dw2 = cpu_to_le32(TXGBE_TXD_FLAGS |
+   TXGBE_TXD_DATLEN(pkt_len));
+   txdp->dw3 = cpu_to_le32(TXGBE_TXD_PAYLEN(pkt_len));
+
+   rte_prefetch0(&(*pkts)->pool);
+   }
+}
+
+/* Populate 1 descriptor with data from 1 mbuf */
+static inline void
+tx1(volatile struct txgbe_tx_desc *txdp, struct rte_mbuf **pkts)
+{
+   uint64_t buf_dma_addr;
+   uint32_t pkt_len;
+
+   buf_dma_addr = rte_mbuf_data_iova(*pkts);
+   pkt_len = (*pkts)->data_len;
+
+   /* write data to descriptor */
+   txdp->qw0 = cpu_to_le64(buf_dma_addr);
+   txdp->dw2 = cpu_to_le32(TXGBE_TXD_FLAGS |
+   TXGBE_TXD_DATLEN(pkt_len));
+   txdp->dw3 = cpu_to_le32(TXGBE_TXD_PAYLEN(pkt_len));
+
+   rte_prefetch0(&(*pkts)->pool);
+}
+
+/*
+ * Fill H/W descriptor ring with mbuf data.
+ * Copy mbuf pointers to the S/W ring.
+ */
+static inline void
+txgbe_tx_fill_hw_ring(struct txgbe_tx_queue *txq, struct rte_mbuf **pkts,
+ uint16_t nb_pkts)
+{
+   volatile struct txgbe_tx_desc *txdp = &(txq->tx_ring[txq->tx_tail]);
+   struct txgbe_tx_entry *txep = &(txq->sw_ring[txq->tx_tail]);
+   const int N_PER_LOOP = 4;
+   const int N_PER_LOOP_MASK = N_PER_LOOP-1;
+   int mainpart, leftover;
+   int i, j;
+
+   /*
+* Process most of the packets in chunks of N pkts.  Any
+* leftover packets will get processed one at a time.
+*/
+   mainpart = (nb_pkts & ((uint32_t) ~N_PER_LOOP_MASK));
+   leftover = (nb_pkts & ((uint32_t)  N_PER_LOOP_MASK));
+   for (i = 0; i < mainpart; i += N_PER_LOOP) {
+   /* Copy N mbuf pointers to the S/W ring */

[dpdk-dev] [PATCH v1 20/42] net/txgbe: add RX and TX stop

[Jiawen Wu]

Add receive and transmit units stop for specified queue, release mbufs and free 
queues.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_type.h |   3 +
 drivers/net/txgbe/txgbe_ethdev.c|   7 +
 drivers/net/txgbe/txgbe_ethdev.h|  15 ++
 drivers/net/txgbe/txgbe_rxtx.c  | 305 +++-
 drivers/net/txgbe/txgbe_rxtx.h  |  25 +++
 5 files changed, 354 insertions(+), 1 deletion(-)

diff --git a/drivers/net/txgbe/base/txgbe_type.h 
b/drivers/net/txgbe/base/txgbe_type.h
index 6229d8acc..c05e8e8b1 100644
--- a/drivers/net/txgbe/base/txgbe_type.h
+++ b/drivers/net/txgbe/base/txgbe_type.h
@@ -467,6 +467,9 @@ struct txgbe_hw {
TXGBE_SW_RESET,
TXGBE_GLOBAL_RESET
} reset_type;
+
+   u32 q_rx_regs[128 * 4];
+   u32 q_tx_regs[128 * 4];
 };
 
 #include "txgbe_regs.h"
diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 4fab88c5c..80470c6e7 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -599,6 +599,7 @@ txgbe_dev_start(struct rte_eth_dev *dev)
 
 error:
PMD_INIT_LOG(ERR, "failure in txgbe_dev_start(): %d", err);
+   txgbe_dev_clear_queues(dev);
return -EIO;
 }
 
@@ -638,6 +639,8 @@ txgbe_dev_stop(struct rte_eth_dev *dev)
hw->mac.disable_tx_laser(hw);
}
 
+   txgbe_dev_clear_queues(dev);
+
/* Clear stored conf */
dev->data->scattered_rx = 0;
dev->data->lro = 0;
@@ -1320,7 +1323,11 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {
.stats_get  = txgbe_dev_stats_get,
.stats_reset= txgbe_dev_stats_reset,
.rx_queue_start = txgbe_dev_rx_queue_start,
+   .rx_queue_stop  = txgbe_dev_rx_queue_stop,
.tx_queue_start = txgbe_dev_tx_queue_start,
+   .tx_queue_stop  = txgbe_dev_tx_queue_stop,
+   .rx_queue_release   = txgbe_dev_rx_queue_release,
+   .tx_queue_release   = txgbe_dev_tx_queue_release,
.dev_led_on = txgbe_dev_led_on,
.dev_led_off= txgbe_dev_led_off,
 };
diff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h
index 2dc0327cb..f5ee1cae6 100644
--- a/drivers/net/txgbe/txgbe_ethdev.h
+++ b/drivers/net/txgbe/txgbe_ethdev.h
@@ -82,18 +82,33 @@ int txgbe_vf_representor_uninit(struct rte_eth_dev *ethdev);
 /*
  * RX/TX function prototypes
  */
+void txgbe_dev_clear_queues(struct rte_eth_dev *dev);
+
 void txgbe_dev_free_queues(struct rte_eth_dev *dev);
 
+void txgbe_dev_rx_queue_release(void *rxq);
+
+void txgbe_dev_tx_queue_release(void *txq);
+
 int txgbe_dev_rx_init(struct rte_eth_dev *dev);
 
 void txgbe_dev_tx_init(struct rte_eth_dev *dev);
 
 int txgbe_dev_rxtx_start(struct rte_eth_dev *dev);
 
+void txgbe_dev_save_rx_queue(struct txgbe_hw *hw, uint16_t rx_queue_id);
+void txgbe_dev_store_rx_queue(struct txgbe_hw *hw, uint16_t rx_queue_id);
+void txgbe_dev_save_tx_queue(struct txgbe_hw *hw, uint16_t tx_queue_id);
+void txgbe_dev_store_tx_queue(struct txgbe_hw *hw, uint16_t tx_queue_id);
+
 int txgbe_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
 
+int txgbe_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
+
 int txgbe_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
 
+int txgbe_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);
+
 uint16_t txgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
uint16_t nb_pkts);
 
diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index ad5d1d22f..58824045b 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -15,6 +15,8 @@
 
 #include 
 #include 
+#include 
+#include 
 
 #include "txgbe_logs.h"
 #include "base/txgbe.h"
@@ -102,6 +104,22 @@ txgbe_recv_pkts_lro_bulk_alloc(void *rx_queue, struct 
rte_mbuf **rx_pkts,
return txgbe_recv_pkts_lro(rx_queue, rx_pkts, nb_pkts, true);
 }
 
+static void __rte_cold
+txgbe_tx_queue_release(struct txgbe_tx_queue *txq)
+{
+   if (txq != NULL && txq->ops != NULL) {
+   txq->ops->release_mbufs(txq);
+   txq->ops->free_swring(txq);
+   rte_free(txq);
+   }
+}
+
+void __rte_cold
+txgbe_dev_tx_queue_release(void *txq)
+{
+   txgbe_tx_queue_release(txq);
+}
+
 /* Takes an ethdev and a queue and sets up the tx function to be used based on
  * the queue parameters. Used in tx_queue_setup by primary process and then
  * in dev_init by secondary process when attaching to an existing ethdev.
@@ -129,10 +147,169 @@ txgbe_set_tx_function(struct rte_eth_dev *dev, struct 
txgbe_tx_queue *txq)
}
 }
 
+/**
+ * txgbe_free_sc_cluster - free the not-yet-completed scattered cluster
+ *
+ * The "next" pointer of the last segment of (not-yet-completed) RSC clusters
+ * in the sw_rsc_ring is not set to NULL but rath

[dpdk-dev] [PATCH v1 25/42] net/txgbe: fill receive functions

[Jiawen Wu]

Fill receive functions and define receive descriptor.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_type.h |   2 +
 drivers/net/txgbe/txgbe_ethdev.c|  13 +
 drivers/net/txgbe/txgbe_ethdev.h|   2 +
 drivers/net/txgbe/txgbe_ptypes.c|   2 -
 drivers/net/txgbe/txgbe_rxtx.c  | 872 +++-
 drivers/net/txgbe/txgbe_rxtx.h  | 102 
 6 files changed, 978 insertions(+), 15 deletions(-)

diff --git a/drivers/net/txgbe/base/txgbe_type.h 
b/drivers/net/txgbe/base/txgbe_type.h
index c05e8e8b1..1c16257da 100644
--- a/drivers/net/txgbe/base/txgbe_type.h
+++ b/drivers/net/txgbe/base/txgbe_type.h
@@ -37,6 +37,8 @@
 #define TXGBE_PHYSICAL_LAYER_10BASE_T  0x08000
 #define TXGBE_PHYSICAL_LAYER_2500BASE_KX   0x1
 
+#define TXGBE_ATR_HASH_MASK0x7fff
+
 enum txgbe_eeprom_type {
txgbe_eeprom_unknown = 0,
txgbe_eeprom_spi,
diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index d2a355524..08b31f66e 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -809,6 +809,18 @@ txgbe_dev_stats_reset(struct rte_eth_dev *dev)
return 0;
 }
 
+const uint32_t *
+txgbe_dev_supported_ptypes_get(struct rte_eth_dev *dev)
+{
+   if (dev->rx_pkt_burst == txgbe_recv_pkts ||
+   dev->rx_pkt_burst == txgbe_recv_pkts_lro_single_alloc ||
+   dev->rx_pkt_burst == txgbe_recv_pkts_lro_bulk_alloc ||
+   dev->rx_pkt_burst == txgbe_recv_pkts_bulk_alloc)
+   return txgbe_get_supported_ptypes();
+
+   return NULL;
+}
+
 void
 txgbe_dev_setup_link_alarm_handler(void *param)
 {
@@ -1322,6 +1334,7 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {
.link_update= txgbe_dev_link_update,
.stats_get  = txgbe_dev_stats_get,
.stats_reset= txgbe_dev_stats_reset,
+   .dev_supported_ptypes_get   = txgbe_dev_supported_ptypes_get,
.rx_queue_start = txgbe_dev_rx_queue_start,
.rx_queue_stop  = txgbe_dev_rx_queue_stop,
.tx_queue_start = txgbe_dev_tx_queue_start,
diff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h
index be6876823..dceb88d2f 100644
--- a/drivers/net/txgbe/txgbe_ethdev.h
+++ b/drivers/net/txgbe/txgbe_ethdev.h
@@ -160,5 +160,7 @@ void txgbe_pf_mbx_process(struct rte_eth_dev *eth_dev);
 #define TXGBE_LINK_DOWN_CHECK_TIMEOUT 4000 /* ms */
 #define TXGBE_LINK_UP_CHECK_TIMEOUT   1000 /* ms */
 #define TXGBE_VMDQ_NUM_UC_MAC 4096 /* Maximum nb. of UC MAC addr. */
+
+const uint32_t *txgbe_dev_supported_ptypes_get(struct rte_eth_dev *dev);
 void txgbe_dev_setup_link_alarm_handler(void *param);
 #endif /* _TXGBE_ETHDEV_H_ */
diff --git a/drivers/net/txgbe/txgbe_ptypes.c b/drivers/net/txgbe/txgbe_ptypes.c
index e76b4001d..9b841bff8 100644
--- a/drivers/net/txgbe/txgbe_ptypes.c
+++ b/drivers/net/txgbe/txgbe_ptypes.c
@@ -189,8 +189,6 @@ u32 *txgbe_get_supported_ptypes(void)
static u32 ptypes[] = {
/* For non-vec functions,
 * refers to txgbe_rxd_pkt_info_to_pkt_type();
-* for vec functions,
-* refers to _recv_raw_pkts_vec().
 */
RTE_PTYPE_L2_ETHER,
RTE_PTYPE_L3_IPV4,
diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index 39055b4d1..0c35d3c9e 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -13,12 +13,35 @@
 #include 
 #include 
 
+#include 
+#include 
+#include 
+#include 
+#include 
 #include 
 #include 
+#include 
+#include 
+#include 
 #include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
 
 #include "txgbe_logs.h"
 #include "base/txgbe.h"
@@ -38,6 +61,19 @@ static const u64 TXGBE_TX_OFFLOAD_MASK = (
PKT_TX_TUNNEL_MASK |
PKT_TX_OUTER_IP_CKSUM);
 
+#if 1
+#define RTE_PMD_USE_PREFETCH
+#endif
+
+#ifdef RTE_PMD_USE_PREFETCH
+/*
+ * Prefetch a cache line into all cache levels.
+ */
+#define rte_txgbe_prefetch(p)   rte_prefetch0(p)
+#else
+#define rte_txgbe_prefetch(p)   do {} while (0)
+#endif
+
 /*
  *
  *  TX functions
@@ -933,39 +969,849 @@ txgbe_prep_pkts(void *tx_queue, struct rte_mbuf 
**tx_pkts, uint16_t nb_pkts)
return 0;
 }
 
+/*
+ *
+ *  RX functions
+ *
+ **/
+/* @note: fix txgbe_dev_supported_ptypes_get() if any change here. */
+static inline uint32_t
+txgbe_rxd_pkt_info_to_pkt_type(uint32_t pkt_info, uint16_t ptid_mask)
+{
+   uint16_t ptid = TXGBE_RXD_PTID(pkt_info);
+
+   ptid &= ptid_mask;

[dpdk-dev] [PATCH v1 24/42] net/txgbe: fill transmit function with hardware offload

[Jiawen Wu]

Fill transmit function with hardware offload.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/txgbe_rxtx.c | 662 -
 drivers/net/txgbe/txgbe_rxtx.h |  45 +++
 2 files changed, 703 insertions(+), 4 deletions(-)

diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index 3db9d314f..39055b4d1 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -25,6 +25,19 @@
 #include "txgbe_ethdev.h"
 #include "txgbe_rxtx.h"
 
+/* Bit Mask to indicate what bits required for building TX context */
+static const u64 TXGBE_TX_OFFLOAD_MASK = (
+   PKT_TX_OUTER_IPV6 |
+   PKT_TX_OUTER_IPV4 |
+   PKT_TX_IPV6 |
+   PKT_TX_IPV4 |
+   PKT_TX_VLAN_PKT |
+   PKT_TX_IP_CKSUM |
+   PKT_TX_L4_MASK |
+   PKT_TX_TCP_SEG |
+   PKT_TX_TUNNEL_MASK |
+   PKT_TX_OUTER_IP_CKSUM);
+
 /*
  *
  *  TX functions
@@ -254,19 +267,660 @@ txgbe_xmit_pkts_simple(void *tx_queue, struct rte_mbuf 
**tx_pkts,
return nb_tx;
 }
 
+static inline void
+txgbe_set_xmit_ctx(struct txgbe_tx_queue *txq,
+   volatile struct txgbe_tx_ctx_desc *ctx_txd,
+   uint64_t ol_flags, union txgbe_tx_offload tx_offload,
+   __rte_unused uint64_t *mdata)
+{
+   union txgbe_tx_offload tx_offload_mask;
+   uint32_t type_tucmd_mlhl;
+   uint32_t mss_l4len_idx;
+   uint32_t ctx_idx;
+   uint32_t vlan_macip_lens;
+   uint32_t tunnel_seed;
+
+   ctx_idx = txq->ctx_curr;
+   tx_offload_mask.data[0] = 0;
+   tx_offload_mask.data[1] = 0;
+
+   /* Specify which HW CTX to upload. */
+   mss_l4len_idx = TXGBE_TXD_IDX(ctx_idx);
+   type_tucmd_mlhl = TXGBE_TXD_CTXT;
+
+   tx_offload_mask.ptid |= ~0;
+   type_tucmd_mlhl |= TXGBE_TXD_PTID(tx_offload.ptid);
+
+   /* check if TCP segmentation required for this packet */
+   if (ol_flags & PKT_TX_TCP_SEG) {
+   tx_offload_mask.l2_len |= ~0;
+   tx_offload_mask.l3_len |= ~0;
+   tx_offload_mask.l4_len |= ~0;
+   tx_offload_mask.tso_segsz |= ~0;
+   mss_l4len_idx |= TXGBE_TXD_MSS(tx_offload.tso_segsz);
+   mss_l4len_idx |= TXGBE_TXD_L4LEN(tx_offload.l4_len);
+   } else { /* no TSO, check if hardware checksum is needed */
+   if (ol_flags & PKT_TX_IP_CKSUM) {
+   tx_offload_mask.l2_len |= ~0;
+   tx_offload_mask.l3_len |= ~0;
+   }
+
+   switch (ol_flags & PKT_TX_L4_MASK) {
+   case PKT_TX_UDP_CKSUM:
+   mss_l4len_idx |=
+   TXGBE_TXD_L4LEN(sizeof(struct rte_udp_hdr));
+   tx_offload_mask.l2_len |= ~0;
+   tx_offload_mask.l3_len |= ~0;
+   break;
+   case PKT_TX_TCP_CKSUM:
+   mss_l4len_idx |=
+   TXGBE_TXD_L4LEN(sizeof(struct rte_tcp_hdr));
+   tx_offload_mask.l2_len |= ~0;
+   tx_offload_mask.l3_len |= ~0;
+   break;
+   case PKT_TX_SCTP_CKSUM:
+   mss_l4len_idx |=
+   TXGBE_TXD_L4LEN(sizeof(struct rte_sctp_hdr));
+   tx_offload_mask.l2_len |= ~0;
+   tx_offload_mask.l3_len |= ~0;
+   break;
+   default:
+   break;
+   }
+   }
+
+   vlan_macip_lens = TXGBE_TXD_IPLEN(tx_offload.l3_len >> 1);
+
+   if (ol_flags & PKT_TX_TUNNEL_MASK) {
+   tx_offload_mask.outer_tun_len |= ~0;
+   tx_offload_mask.outer_l2_len |= ~0;
+   tx_offload_mask.outer_l3_len |= ~0;
+   tx_offload_mask.l2_len |= ~0;
+   tunnel_seed = TXGBE_TXD_ETUNLEN(tx_offload.outer_tun_len >> 1);
+   tunnel_seed |= TXGBE_TXD_EIPLEN(tx_offload.outer_l3_len >> 2);
+
+   switch (ol_flags & PKT_TX_TUNNEL_MASK) {
+   case PKT_TX_TUNNEL_IPIP:
+   /* for non UDP / GRE tunneling, set to 0b */
+   break;
+   case PKT_TX_TUNNEL_VXLAN:
+   case PKT_TX_TUNNEL_GENEVE:
+   tunnel_seed |= TXGBE_TXD_ETYPE_UDP;
+   break;
+   case PKT_TX_TUNNEL_GRE:
+   tunnel_seed |= TXGBE_TXD_ETYPE_GRE;
+   break;
+   default:
+   PMD_TX_LOG(ERR, "Tunnel type not supported");
+   return;
+   }
+   vlan_macip_lens |= TXGBE_TXD_MACLEN(tx_offload.outer_l2_len);
+   } else {
+   tunnel_seed = 0;
+   vlan_macip_lens |= TXGBE_TXD_MACLEN(tx_offload.l2

[dpdk-dev] [PATCH v1 27/42] net/txgbe: add device stats get

[Jiawen Wu]

Add device stats get from reading hardware registers.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_type.h | 153 -
 drivers/net/txgbe/txgbe_ethdev.c| 245 +++-
 drivers/net/txgbe/txgbe_ethdev.h|  16 ++
 3 files changed, 411 insertions(+), 3 deletions(-)

diff --git a/drivers/net/txgbe/base/txgbe_type.h 
b/drivers/net/txgbe/base/txgbe_type.h
index 1c16257da..f9a18d581 100644
--- a/drivers/net/txgbe/base/txgbe_type.h
+++ b/drivers/net/txgbe/base/txgbe_type.h
@@ -10,6 +10,8 @@
 
 #define TXGBE_FRAME_SIZE_MAX   (9728) /* Maximum frame size, +FCS */
 #define TXGBE_FRAME_SIZE_DFT   (1518) /* Default frame size, +FCS */
+#define TXGBE_MAX_UP   8
+#define TXGBE_MAX_QP   (128)
 
 #define TXGBE_ALIGN128 /* as intel did */
 
@@ -186,8 +188,149 @@ struct txgbe_bus_info {
u8 lan_id;
u16 instance_id;
 };
+/* Statistics counters collected by the MAC */
+/* PB[] RxTx */
+struct txgbe_pb_stats {
+   u64 tx_pb_xon_packets;
+   u64 rx_pb_xon_packets;
+   u64 tx_pb_xoff_packets;
+   u64 rx_pb_xoff_packets;
+   u64 rx_pb_dropped;
+   u64 rx_pb_mbuf_alloc_errors;
+   u64 tx_pb_xon2off_packets;
+};
+
+/* QP[] RxTx */
+struct txgbe_qp_stats {
+   u64 rx_qp_packets;
+   u64 tx_qp_packets;
+   u64 rx_qp_bytes;
+   u64 tx_qp_bytes;
+   u64 rx_qp_mc_packets;
+};
+
 struct txgbe_hw_stats {
-   u64 counter;
+   /* MNG RxTx */
+   u64 mng_bmc2host_packets;
+   u64 mng_host2bmc_packets;
+   /* Basix RxTx */
+   u64 rx_packets;
+   u64 tx_packets;
+   u64 rx_bytes;
+   u64 tx_bytes;
+   u64 rx_total_bytes;
+   u64 rx_total_packets;
+   u64 tx_total_packets;
+   u64 rx_total_missed_packets;
+   u64 rx_broadcast_packets;
+   u64 tx_broadcast_packets;
+   u64 rx_multicast_packets;
+   u64 tx_multicast_packets;
+   u64 rx_management_packets;
+   u64 tx_management_packets;
+   u64 rx_management_dropped;
+   u64 rx_drop_packets;
+
+   /* Basic Error */
+   u64 rx_crc_errors;
+   u64 rx_illegal_byte_errors;
+   u64 rx_error_bytes;
+   u64 rx_mac_short_packet_dropped;
+   u64 rx_length_errors;
+   u64 rx_undersize_errors;
+   u64 rx_fragment_errors;
+   u64 rx_oversize_errors;
+   u64 rx_jabber_errors;
+   u64 rx_l3_l4_xsum_error;
+   u64 mac_local_errors;
+   u64 mac_remote_errors;
+
+   /* Flow Director */
+   u64 flow_director_added_filters;
+   u64 flow_director_removed_filters;
+   u64 flow_director_filter_add_errors;
+   u64 flow_director_filter_remove_errors;
+   u64 flow_director_matched_filters;
+   u64 flow_director_missed_filters;
+
+   /* FCoE */
+   u64 rx_fcoe_crc_errors;
+   u64 rx_fcoe_mbuf_allocation_errors;
+   u64 rx_fcoe_dropped;
+   u64 rx_fcoe_packets;
+   u64 tx_fcoe_packets;
+   u64 rx_fcoe_bytes;
+   u64 tx_fcoe_bytes;
+   u64 rx_fcoe_no_ddp;
+   u64 rx_fcoe_no_ddp_ext_buff;
+
+   /* MACSEC */
+   u64 tx_macsec_pkts_untagged;
+   u64 tx_macsec_pkts_encrypted;
+   u64 tx_macsec_pkts_protected;
+   u64 tx_macsec_octets_encrypted;
+   u64 tx_macsec_octets_protected;
+   u64 rx_macsec_pkts_untagged;
+   u64 rx_macsec_pkts_badtag;
+   u64 rx_macsec_pkts_nosci;
+   u64 rx_macsec_pkts_unknownsci;
+   u64 rx_macsec_octets_decrypted;
+   u64 rx_macsec_octets_validated;
+   u64 rx_macsec_sc_pkts_unchecked;
+   u64 rx_macsec_sc_pkts_delayed;
+   u64 rx_macsec_sc_pkts_late;
+   u64 rx_macsec_sa_pkts_ok;
+   u64 rx_macsec_sa_pkts_invalid;
+   u64 rx_macsec_sa_pkts_notvalid;
+   u64 rx_macsec_sa_pkts_unusedsa;
+   u64 rx_macsec_sa_pkts_notusingsa;
+
+   /* MAC RxTx */
+   u64 rx_size_64_packets;
+   u64 rx_size_65_to_127_packets;
+   u64 rx_size_128_to_255_packets;
+   u64 rx_size_256_to_511_packets;
+   u64 rx_size_512_to_1023_packets;
+   u64 rx_size_1024_to_max_packets;
+   u64 tx_size_64_packets;
+   u64 tx_size_65_to_127_packets;
+   u64 tx_size_128_to_255_packets;
+   u64 tx_size_256_to_511_packets;
+   u64 tx_size_512_to_1023_packets;
+   u64 tx_size_1024_to_max_packets;
+
+   /* Flow Control */
+   u64 tx_xon_packets;
+   u64 rx_xon_packets;
+   u64 tx_xoff_packets;
+   u64 rx_xoff_packets;
+
+   /* PB[] RxTx */
+   struct {
+   u64 rx_up_packets;
+   u64 tx_up_packets;
+   u64 rx_up_bytes;
+   u64 tx_up_bytes;
+   u64 rx_up_drop_packets;
+
+   u64 tx_up_xon_packets;
+   u64 rx_up_xon_packets;
+   u64 tx_up_xoff_packets;
+   u64 rx_up_xoff_packets;
+   u64 rx_up_dropped;
+   u64 rx_up_mbuf_alloc_errors;
+   u64 tx_up_xon2off_packets;
+   } up[TXGBE_MAX_UP];
+

[dpdk-dev] [PATCH v1 28/42] net/txgbe: add device xstats get

[Jiawen Wu]

Add device xstats get from reading hardware registers.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/txgbe_ethdev.c | 383 +++
 drivers/net/txgbe/txgbe_ethdev.h |   6 +
 2 files changed, 389 insertions(+)

diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 63f811d93..51554844e 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -64,6 +64,144 @@ static const struct rte_pci_id pci_id_txgbe_map[] = {
 
 static const struct eth_dev_ops txgbe_eth_dev_ops;
 
+#define HW_XSTAT(m) {#m, offsetof(struct txgbe_hw_stats, m)}
+#define HW_XSTAT_NAME(m, n) {n, offsetof(struct txgbe_hw_stats, m)}
+static const struct rte_txgbe_xstats_name_off rte_txgbe_stats_strings[] = {
+   /* MNG RxTx */
+   HW_XSTAT(mng_bmc2host_packets),
+   HW_XSTAT(mng_host2bmc_packets),
+   /* Basic RxTx */
+   HW_XSTAT(rx_packets),
+   HW_XSTAT(tx_packets),
+   HW_XSTAT(rx_bytes),
+   HW_XSTAT(tx_bytes),
+   HW_XSTAT(rx_total_bytes),
+   HW_XSTAT(rx_total_packets),
+   HW_XSTAT(tx_total_packets),
+   HW_XSTAT(rx_total_missed_packets),
+   HW_XSTAT(rx_broadcast_packets),
+   HW_XSTAT(rx_multicast_packets),
+   HW_XSTAT(rx_management_packets),
+   HW_XSTAT(tx_management_packets),
+   HW_XSTAT(rx_management_dropped),
+
+   /* Basic Error */
+   HW_XSTAT(rx_crc_errors),
+   HW_XSTAT(rx_illegal_byte_errors),
+   HW_XSTAT(rx_error_bytes),
+   HW_XSTAT(rx_mac_short_packet_dropped),
+   HW_XSTAT(rx_length_errors),
+   HW_XSTAT(rx_undersize_errors),
+   HW_XSTAT(rx_fragment_errors),
+   HW_XSTAT(rx_oversize_errors),
+   HW_XSTAT(rx_jabber_errors),
+   HW_XSTAT(rx_l3_l4_xsum_error),
+   HW_XSTAT(mac_local_errors),
+   HW_XSTAT(mac_remote_errors),
+
+   /* Flow Director */
+   HW_XSTAT(flow_director_added_filters),
+   HW_XSTAT(flow_director_removed_filters),
+   HW_XSTAT(flow_director_filter_add_errors),
+   HW_XSTAT(flow_director_filter_remove_errors),
+   HW_XSTAT(flow_director_matched_filters),
+   HW_XSTAT(flow_director_missed_filters),
+
+   /* FCoE */
+   HW_XSTAT(rx_fcoe_crc_errors),
+   HW_XSTAT(rx_fcoe_mbuf_allocation_errors),
+   HW_XSTAT(rx_fcoe_dropped),
+   HW_XSTAT(rx_fcoe_packets),
+   HW_XSTAT(tx_fcoe_packets),
+   HW_XSTAT(rx_fcoe_bytes),
+   HW_XSTAT(tx_fcoe_bytes),
+   HW_XSTAT(rx_fcoe_no_ddp),
+   HW_XSTAT(rx_fcoe_no_ddp_ext_buff),
+
+   /* MACSEC */
+   HW_XSTAT(tx_macsec_pkts_untagged),
+   HW_XSTAT(tx_macsec_pkts_encrypted),
+   HW_XSTAT(tx_macsec_pkts_protected),
+   HW_XSTAT(tx_macsec_octets_encrypted),
+   HW_XSTAT(tx_macsec_octets_protected),
+   HW_XSTAT(rx_macsec_pkts_untagged),
+   HW_XSTAT(rx_macsec_pkts_badtag),
+   HW_XSTAT(rx_macsec_pkts_nosci),
+   HW_XSTAT(rx_macsec_pkts_unknownsci),
+   HW_XSTAT(rx_macsec_octets_decrypted),
+   HW_XSTAT(rx_macsec_octets_validated),
+   HW_XSTAT(rx_macsec_sc_pkts_unchecked),
+   HW_XSTAT(rx_macsec_sc_pkts_delayed),
+   HW_XSTAT(rx_macsec_sc_pkts_late),
+   HW_XSTAT(rx_macsec_sa_pkts_ok),
+   HW_XSTAT(rx_macsec_sa_pkts_invalid),
+   HW_XSTAT(rx_macsec_sa_pkts_notvalid),
+   HW_XSTAT(rx_macsec_sa_pkts_unusedsa),
+   HW_XSTAT(rx_macsec_sa_pkts_notusingsa),
+
+   /* MAC RxTx */
+   HW_XSTAT(rx_size_64_packets),
+   HW_XSTAT(rx_size_65_to_127_packets),
+   HW_XSTAT(rx_size_128_to_255_packets),
+   HW_XSTAT(rx_size_256_to_511_packets),
+   HW_XSTAT(rx_size_512_to_1023_packets),
+   HW_XSTAT(rx_size_1024_to_max_packets),
+   HW_XSTAT(tx_size_64_packets),
+   HW_XSTAT(tx_size_65_to_127_packets),
+   HW_XSTAT(tx_size_128_to_255_packets),
+   HW_XSTAT(tx_size_256_to_511_packets),
+   HW_XSTAT(tx_size_512_to_1023_packets),
+   HW_XSTAT(tx_size_1024_to_max_packets),
+
+   /* Flow Control */
+   HW_XSTAT(tx_xon_packets),
+   HW_XSTAT(rx_xon_packets),
+   HW_XSTAT(tx_xoff_packets),
+   HW_XSTAT(rx_xoff_packets),
+
+   HW_XSTAT_NAME(tx_xon_packets, "tx_flow_control_xon_packets"),
+   HW_XSTAT_NAME(rx_xon_packets, "rx_flow_control_xon_packets"),
+   HW_XSTAT_NAME(tx_xoff_packets, "tx_flow_control_xoff_packets"),
+   HW_XSTAT_NAME(rx_xoff_packets, "rx_flow_control_xoff_packets"),
+};
+
+#define TXGBE_NB_HW_STATS (sizeof(rte_txgbe_stats_strings) / \
+  sizeof(rte_txgbe_stats_strings[0]))
+
+/* Per-priority statistics */
+#define UP_XSTAT(m) {#m, offsetof(struct txgbe_hw_stats, up[0].m)}
+static const struct rte_txgbe_xstats_name_off rte_txgbe_up_strings[] = {
+   UP_XSTAT(rx_up_packets),
+   UP_XSTAT(tx_up_packets),
+   UP_XSTAT(rx_up_bytes),
+   UP_XSTAT(tx_up_bytes),
+   UP_XSTAT(rx_up_drop_packets),
+
+   UP_XSTAT(tx_up_xon_packets),
+   UP_XSTAT(rx_up_xon_packets),
+   UP_XSTAT(tx_up_xoff_packets

[dpdk-dev] [PATCH v1 29/42] net/txgbe: add queue stats mapping and enable RX DMA unit

[Jiawen Wu]

Add queue stats mapping set, complete receive and transmit unit with DMA and 
sec path.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_hw.c   | 389 +++-
 drivers/net/txgbe/base/txgbe_hw.h   |   9 +
 drivers/net/txgbe/base/txgbe_type.h |   1 +
 drivers/net/txgbe/txgbe_ethdev.c|  52 
 4 files changed, 450 insertions(+), 1 deletion(-)

diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index 13f79741a..05f323a07 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -9,6 +9,8 @@
 #include "txgbe_mng.h"
 #include "txgbe_hw.h"
 
+#define TXGBE_RAPTOR_MAX_TX_QUEUES 128
+#define TXGBE_RAPTOR_MAX_RX_QUEUES 128
 
 STATIC s32 txgbe_setup_copper_link_raptor(struct txgbe_hw *hw,
 u32 speed,
@@ -111,6 +113,149 @@ s32 txgbe_init_hw(struct txgbe_hw *hw)
return status;
 }
 
+/**
+ *  txgbe_clear_hw_cntrs - Generic clear hardware counters
+ *  @hw: pointer to hardware structure
+ *
+ *  Clears all hardware statistics counters by reading them from the hardware
+ *  Statistics counters are clear on read.
+ **/
+s32 txgbe_clear_hw_cntrs(struct txgbe_hw *hw)
+{
+   u16 i = 0;
+
+   DEBUGFUNC("txgbe_clear_hw_cntrs");
+
+   /* QP Stats */
+   /* don't write clear queue stats */
+   for (i = 0; i < TXGBE_MAX_QP; i++) {
+   hw->qp_last[i].rx_qp_packets = 0;
+   hw->qp_last[i].tx_qp_packets = 0;
+   hw->qp_last[i].rx_qp_bytes = 0;
+   hw->qp_last[i].tx_qp_bytes = 0;
+   hw->qp_last[i].rx_qp_mc_packets = 0;
+   }
+
+   /* PB Stats */
+   for (i = 0; i < TXGBE_MAX_UP; i++) {
+   rd32(hw, TXGBE_PBRXUPXON(i));
+   rd32(hw, TXGBE_PBRXUPXOFF(i));
+   rd32(hw, TXGBE_PBTXUPXON(i));
+   rd32(hw, TXGBE_PBTXUPXOFF(i));
+   rd32(hw, TXGBE_PBTXUPOFF(i));
+
+   rd32(hw, TXGBE_PBRXMISS(i));
+   }
+   rd32(hw, TXGBE_PBRXLNKXON);
+   rd32(hw, TXGBE_PBRXLNKXOFF);
+   rd32(hw, TXGBE_PBTXLNKXON);
+   rd32(hw, TXGBE_PBTXLNKXOFF);
+
+   /* DMA Stats */
+   rd32(hw, TXGBE_DMARXPKT);
+   rd32(hw, TXGBE_DMATXPKT);
+
+   rd64(hw, TXGBE_DMARXOCTL);
+   rd64(hw, TXGBE_DMATXOCTL);
+
+   /* MAC Stats */
+   rd64(hw, TXGBE_MACRXERRCRCL);
+   rd64(hw, TXGBE_MACRXMPKTL);
+   rd64(hw, TXGBE_MACTXMPKTL);
+
+   rd64(hw, TXGBE_MACRXPKTL);
+   rd64(hw, TXGBE_MACTXPKTL);
+   rd64(hw, TXGBE_MACRXGBOCTL);
+
+   rd64(hw, TXGBE_MACRXOCTL);
+   rd32(hw, TXGBE_MACTXOCTL);
+
+   rd64(hw, TXGBE_MACRX1to64L);
+   rd64(hw, TXGBE_MACRX65to127L);
+   rd64(hw, TXGBE_MACRX128to255L);
+   rd64(hw, TXGBE_MACRX256to511L);
+   rd64(hw, TXGBE_MACRX512to1023L);
+   rd64(hw, TXGBE_MACRX1024toMAXL);
+   rd64(hw, TXGBE_MACTX1to64L);
+   rd64(hw, TXGBE_MACTX65to127L);
+   rd64(hw, TXGBE_MACTX128to255L);
+   rd64(hw, TXGBE_MACTX256to511L);
+   rd64(hw, TXGBE_MACTX512to1023L);
+   rd64(hw, TXGBE_MACTX1024toMAXL);
+
+   rd64(hw, TXGBE_MACRXERRLENL);
+   rd32(hw, TXGBE_MACRXOVERSIZE);
+   rd32(hw, TXGBE_MACRXJABBER);
+
+   /* FCoE Stats */
+   rd32(hw, TXGBE_FCOECRC);
+   rd32(hw, TXGBE_FCOELAST);
+   rd32(hw, TXGBE_FCOERPDC);
+   rd32(hw, TXGBE_FCOEPRC);
+   rd32(hw, TXGBE_FCOEPTC);
+   rd32(hw, TXGBE_FCOEDWRC);
+   rd32(hw, TXGBE_FCOEDWTC);
+
+   /* Flow Director Stats */
+   rd32(hw, TXGBE_FDIRMATCH);
+   rd32(hw, TXGBE_FDIRMISS);
+   rd32(hw, TXGBE_FDIRUSED);
+   rd32(hw, TXGBE_FDIRUSED);
+   rd32(hw, TXGBE_FDIRFAIL);
+   rd32(hw, TXGBE_FDIRFAIL);
+
+   /* MACsec Stats */
+   rd32(hw, TXGBE_LSECTX_UTPKT);
+   rd32(hw, TXGBE_LSECTX_ENCPKT);
+   rd32(hw, TXGBE_LSECTX_PROTPKT);
+   rd32(hw, TXGBE_LSECTX_ENCOCT);
+   rd32(hw, TXGBE_LSECTX_PROTOCT);
+   rd32(hw, TXGBE_LSECRX_UTPKT);
+   rd32(hw, TXGBE_LSECRX_BTPKT);
+   rd32(hw, TXGBE_LSECRX_NOSCIPKT);
+   rd32(hw, TXGBE_LSECRX_UNSCIPKT);
+   rd32(hw, TXGBE_LSECRX_DECOCT);
+   rd32(hw, TXGBE_LSECRX_VLDOCT);
+   rd32(hw, TXGBE_LSECRX_UNCHKPKT);
+   rd32(hw, TXGBE_LSECRX_DLYPKT);
+   rd32(hw, TXGBE_LSECRX_LATEPKT);
+   for (i = 0; i < 2; i++) {
+   rd32(hw, TXGBE_LSECRX_OKPKT(i));
+   rd32(hw, TXGBE_LSECRX_INVPKT(i));
+   rd32(hw, TXGBE_LSECRX_BADPKT(i));
+   }
+   rd32(hw, TXGBE_LSECRX_INVSAPKT);
+   rd32(hw, TXGBE_LSECRX_BADSAPKT);
+
+   return 0;
+}
+
+/**
+ *  txgbe_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port 
devices
+ *  @hw: pointer to the HW structure
+ *
+ *  Determines the LAN function id by reading memory-mapped registers and swaps
+ *  the port value if requested, and set MAC instance for devices that share
+ *  CS4227.
+ **/
+void txgbe_set_lan_id_multi_port(struct txgbe_hw *hw)
+{
+   str

[dpdk-dev] [PATCH v1 26/42] net/txgbe: fill TX prepare funtion

[Jiawen Wu]

Fill transmit prepare function.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/txgbe_rxtx.c | 52 +++---
 drivers/net/txgbe/txgbe_rxtx.h |  2 ++
 2 files changed, 50 insertions(+), 4 deletions(-)

diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c
index 0c35d3c9e..ef3d63b01 100644
--- a/drivers/net/txgbe/txgbe_rxtx.c
+++ b/drivers/net/txgbe/txgbe_rxtx.c
@@ -61,6 +61,9 @@ static const u64 TXGBE_TX_OFFLOAD_MASK = (
PKT_TX_TUNNEL_MASK |
PKT_TX_OUTER_IP_CKSUM);
 
+#define TXGBE_TX_OFFLOAD_NOTSUP_MASK \
+   (PKT_TX_OFFLOAD_MASK ^ TXGBE_TX_OFFLOAD_MASK)
+
 #if 1
 #define RTE_PMD_USE_PREFETCH
 #endif
@@ -959,14 +962,55 @@ txgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
return nb_tx;
 }
 
+/*
+ *
+ *  TX prep functions
+ *
+ **/
 uint16_t
 txgbe_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
 {
-   RTE_SET_USED(tx_queue);
-   RTE_SET_USED(tx_pkts);
-   RTE_SET_USED(nb_pkts);
+   int i, ret;
+   uint64_t ol_flags;
+   struct rte_mbuf *m;
+   struct txgbe_tx_queue *txq = (struct txgbe_tx_queue *)tx_queue;
 
-   return 0;
+   for (i = 0; i < nb_pkts; i++) {
+   m = tx_pkts[i];
+   ol_flags = m->ol_flags;
+
+   /**
+* Check if packet meets requirements for number of segments
+*
+* NOTE: for txgbe it's always (40 - WTHRESH) for both TSO and
+*   non-TSO
+*/
+
+   if (m->nb_segs > TXGBE_TX_MAX_SEG - txq->wthresh) {
+   rte_errno = -EINVAL;
+   return i;
+   }
+
+   if (ol_flags & TXGBE_TX_OFFLOAD_NOTSUP_MASK) {
+   rte_errno = -ENOTSUP;
+   return i;
+   }
+
+#ifdef RTE_LIBRTE_ETHDEV_DEBUG
+   ret = rte_validate_tx_offload(m);
+   if (ret != 0) {
+   rte_errno = ret;
+   return i;
+   }
+#endif
+   ret = rte_net_intel_cksum_prepare(m);
+   if (ret != 0) {
+   rte_errno = ret;
+   return i;
+   }
+   }
+
+   return i;
 }
 
 /*
diff --git a/drivers/net/txgbe/txgbe_rxtx.h b/drivers/net/txgbe/txgbe_rxtx.h
index f9abb5ab8..296e34475 100644
--- a/drivers/net/txgbe/txgbe_rxtx.h
+++ b/drivers/net/txgbe/txgbe_rxtx.h
@@ -248,6 +248,8 @@ struct txgbe_tx_desc {
 #define RTE_TXGBE_REGISTER_POLL_WAIT_10_MS  10
 #define RTE_TXGBE_WAIT_100_US   100
 
+#define TXGBE_TX_MAX_SEG40
+
 /**
  * Structure associated with each descriptor of the RX ring of a RX queue.
  */
-- 
2.18.4

[dpdk-dev] [PATCH v1 32/42] net/txgbe: add FW version get operation

[Jiawen Wu]

Add firmware version get operation.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/txgbe_ethdev.c | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 4922a9ca0..f5a986309 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -1493,6 +1493,27 @@ txgbe_dev_xstats_reset(struct rte_eth_dev *dev)
return 0;
 }
 
+static int
+txgbe_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
+{
+   struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+   u16 eeprom_verh, eeprom_verl;
+   u32 etrack_id;
+   int ret;
+
+   hw->rom.readw_sw(hw, TXGBE_EEPROM_VERSION_H, &eeprom_verh);
+   hw->rom.readw_sw(hw, TXGBE_EEPROM_VERSION_L, &eeprom_verl);
+
+   etrack_id = (eeprom_verh << 16) | eeprom_verl;
+   ret = snprintf(fw_version, fw_size, "0x%08x", etrack_id);
+
+   ret += 1; /* add the size of '\0' */
+   if (fw_size < (u32)ret)
+   return ret;
+   else
+   return 0;
+}
+
 static int
 txgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
 {
@@ -2144,6 +2165,7 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {
.xstats_get_names   = txgbe_dev_xstats_get_names,
.xstats_get_names_by_id = txgbe_dev_xstats_get_names_by_id,
.queue_stats_mapping_set= txgbe_dev_queue_stats_mapping_set,
+   .fw_version_get = txgbe_fw_version_get,
.dev_infos_get  = txgbe_dev_info_get,
.dev_supported_ptypes_get   = txgbe_dev_supported_ptypes_get,
.rx_queue_start = txgbe_dev_rx_queue_start,
-- 
2.18.4

[dpdk-dev] [PATCH v1 33/42] net/txgbe: add EEPROM info get operation

[Jiawen Wu]

Add EEPROM information get related operations.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_eeprom.h |   8 ++
 drivers/net/txgbe/base/txgbe_hw.c | 137 +++
 drivers/net/txgbe/base/txgbe_hw.h |   5 +
 drivers/net/txgbe/base/txgbe_phy.c|  16 +++
 drivers/net/txgbe/base/txgbe_phy.h|   3 +
 drivers/net/txgbe/txgbe_ethdev.c  | 154 ++
 6 files changed, 323 insertions(+)

diff --git a/drivers/net/txgbe/base/txgbe_eeprom.h 
b/drivers/net/txgbe/base/txgbe_eeprom.h
index 44f555bbc..34bcb3feb 100644
--- a/drivers/net/txgbe/base/txgbe_eeprom.h
+++ b/drivers/net/txgbe/base/txgbe_eeprom.h
@@ -30,6 +30,14 @@
 #define TXGBE_FW_LESM_PARAMETERS_PTR   0x2
 #define TXGBE_FW_LESM_STATE_1  0x1
 #define TXGBE_FW_LESM_STATE_ENABLED0x8000 /* LESM Enable bit */
+#define TXGBE_ALT_SAN_MAC_ADDR_BLK_PTR 0x27 /* Alt. SAN MAC block */
+#define TXGBE_ALT_SAN_MAC_ADDR_CAPS_OFFSET 0x0 /* Alt SAN MAC capability */
+#define TXGBE_ALT_SAN_MAC_ADDR_PORT0_OFFSET0x1 /* Alt SAN MAC 0 offset */
+#define TXGBE_ALT_SAN_MAC_ADDR_PORT1_OFFSET0x4 /* Alt SAN MAC 1 offset */
+#define TXGBE_ALT_SAN_MAC_ADDR_WWNN_OFFSET 0x7 /* Alt WWNN prefix offset */
+#define TXGBE_ALT_SAN_MAC_ADDR_WWPN_OFFSET 0x8 /* Alt WWPN prefix offset */
+#define TXGBE_ALT_SAN_MAC_ADDR_CAPS_SANMAC 0x0 /* Alt SAN MAC exists */
+#define TXGBE_ALT_SAN_MAC_ADDR_CAPS_ALTWWN 0x1 /* Alt WWN base exists */
 
 s32 txgbe_init_eeprom_params(struct txgbe_hw *hw);
 s32 txgbe_calc_eeprom_checksum(struct txgbe_hw *hw);
diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index 088fa0aab..80ecec34d 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -717,6 +717,77 @@ s32 txgbe_update_mc_addr_list(struct txgbe_hw *hw, u8 
*mc_addr_list,
return 0;
 }
 
+/**
+ *  txgbe_acquire_swfw_sync - Acquire SWFW semaphore
+ *  @hw: pointer to hardware structure
+ *  @mask: Mask to specify which semaphore to acquire
+ *
+ *  Acquires the SWFW semaphore through the MNGSEM register for the specified
+ *  function (CSR, PHY0, PHY1, EEPROM, Flash)
+ **/
+s32 txgbe_acquire_swfw_sync(struct txgbe_hw *hw, u32 mask)
+{
+   u32 mngsem = 0;
+   u32 swmask = TXGBE_MNGSEM_SW(mask);
+   u32 fwmask = TXGBE_MNGSEM_FW(mask);
+   u32 timeout = 200;
+   u32 i;
+
+   DEBUGFUNC("txgbe_acquire_swfw_sync");
+
+   for (i = 0; i < timeout; i++) {
+   /*
+* SW NVM semaphore bit is used for access to all
+* SW_FW_SYNC bits (not just NVM)
+*/
+   if (txgbe_get_eeprom_semaphore(hw))
+   return TXGBE_ERR_SWFW_SYNC;
+
+   mngsem = rd32(hw, TXGBE_MNGSEM);
+   if (!(mngsem & (fwmask | swmask))) {
+   mngsem |= swmask;
+   wr32(hw, TXGBE_MNGSEM, mngsem);
+   txgbe_release_eeprom_semaphore(hw);
+   return 0;
+   } else {
+   /* Resource is currently in use by FW or SW */
+   txgbe_release_eeprom_semaphore(hw);
+   msec_delay(5);
+   }
+   }
+
+   /* If time expired clear the bits holding the lock and retry */
+   if (mngsem & (fwmask | swmask))
+   txgbe_release_swfw_sync(hw, mngsem & (fwmask | swmask));
+
+   msec_delay(5);
+   return TXGBE_ERR_SWFW_SYNC;
+}
+
+/**
+ *  txgbe_release_swfw_sync - Release SWFW semaphore
+ *  @hw: pointer to hardware structure
+ *  @mask: Mask to specify which semaphore to release
+ *
+ *  Releases the SWFW semaphore through the MNGSEM register for the specified
+ *  function (CSR, PHY0, PHY1, EEPROM, Flash)
+ **/
+void txgbe_release_swfw_sync(struct txgbe_hw *hw, u32 mask)
+{
+   u32 mngsem;
+   u32 swmask = mask;
+
+   DEBUGFUNC("txgbe_release_swfw_sync");
+
+   txgbe_get_eeprom_semaphore(hw);
+
+   mngsem = rd32(hw, TXGBE_MNGSEM);
+   mngsem &= ~swmask;
+   wr32(hw, TXGBE_MNGSEM, mngsem);
+
+   txgbe_release_eeprom_semaphore(hw);
+}
+
 /**
  *  txgbe_disable_sec_rx_path - Stops the receive data path
  *  @hw: pointer to hardware structure
@@ -1070,6 +1141,62 @@ s32 txgbe_check_mac_link(struct txgbe_hw *hw, u32 *speed,
return 0;
 }
 
+/**
+ *  txgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from
+ *  the EEPROM
+ *  @hw: pointer to hardware structure
+ *  @wwnn_prefix: the alternative WWNN prefix
+ *  @wwpn_prefix: the alternative WWPN prefix
+ *
+ *  This function will read the EEPROM from the alternative SAN MAC address
+ *  block to check the support for the alternative WWNN/WWPN prefix support.
+ **/
+s32 txgbe_get_wwn_prefix(struct txgbe_hw *hw, u16 *wwnn_prefix,
+u16 *wwpn_prefix)
+{
+   u16 offset, caps;
+   u16 alt_san_mac_blk_offset;
+
+   DEBUGFUNC("txgbe_

[dpdk-dev] [PATCH v1 31/42] net/txgbe: add MAC address operations

[Jiawen Wu]

Add MAC address related operations.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_eeprom.h |   2 +
 drivers/net/txgbe/base/txgbe_hw.c | 434 ++
 drivers/net/txgbe/base/txgbe_hw.h |  11 +
 drivers/net/txgbe/base/txgbe_type.h   |  14 +-
 drivers/net/txgbe/txgbe_ethdev.c  |  61 
 drivers/net/txgbe/txgbe_ethdev.h  |   3 +
 6 files changed, 524 insertions(+), 1 deletion(-)

diff --git a/drivers/net/txgbe/base/txgbe_eeprom.h 
b/drivers/net/txgbe/base/txgbe_eeprom.h
index 21de7e9b5..44f555bbc 100644
--- a/drivers/net/txgbe/base/txgbe_eeprom.h
+++ b/drivers/net/txgbe/base/txgbe_eeprom.h
@@ -23,6 +23,8 @@
 #define TXGBE_EEPROM_VERSION_H  0x1E
 #define TXGBE_ISCSI_BOOT_CONFIG 0x07
 
+#define TXGBE_SAN_MAC_ADDR_PORT0_OFFSET0x0
+#define TXGBE_SAN_MAC_ADDR_PORT1_OFFSET0x3
 #define TXGBE_DEVICE_CAPS_ALLOW_ANY_SFP0x1
 #define TXGBE_DEVICE_CAPS_NO_CROSSTALK_WR  (1 << 7)
 #define TXGBE_FW_LESM_PARAMETERS_PTR   0x2
diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index 05f323a07..088fa0aab 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -11,11 +11,17 @@
 
 #define TXGBE_RAPTOR_MAX_TX_QUEUES 128
 #define TXGBE_RAPTOR_MAX_RX_QUEUES 128
+#define TXGBE_RAPTOR_RAR_ENTRIES   128
+#define TXGBE_RAPTOR_MC_TBL_SIZE   128
 
 STATIC s32 txgbe_setup_copper_link_raptor(struct txgbe_hw *hw,
 u32 speed,
 bool autoneg_wait_to_complete);
 
+STATIC s32 txgbe_mta_vector(struct txgbe_hw *hw, u8 *mc_addr);
+STATIC s32 txgbe_get_san_mac_addr_offset(struct txgbe_hw *hw,
+u16 *san_mac_offset);
+
 /**
  *  txgbe_start_hw - Prepare hardware for Tx/Rx
  *  @hw: pointer to hardware structure
@@ -230,6 +236,36 @@ s32 txgbe_clear_hw_cntrs(struct txgbe_hw *hw)
return 0;
 }
 
+/**
+ *  txgbe_get_mac_addr - Generic get MAC address
+ *  @hw: pointer to hardware structure
+ *  @mac_addr: Adapter MAC address
+ *
+ *  Reads the adapter's MAC address from first Receive Address Register (RAR0)
+ *  A reset of the adapter must be performed prior to calling this function
+ *  in order for the MAC address to have been loaded from the EEPROM into RAR0
+ **/
+s32 txgbe_get_mac_addr(struct txgbe_hw *hw, u8 *mac_addr)
+{
+   u32 rar_high;
+   u32 rar_low;
+   u16 i;
+
+   DEBUGFUNC("txgbe_get_mac_addr");
+
+   wr32(hw, TXGBE_ETHADDRIDX, 0);
+   rar_high = rd32(hw, TXGBE_ETHADDRH);
+   rar_low = rd32(hw, TXGBE_ETHADDRL);
+
+   for (i = 0; i < 2; i++)
+   mac_addr[i] = (u8)(rar_high >> (1 - i) * 8);
+
+   for (i = 0; i < 4; i++)
+   mac_addr[i + 2] = (u8)(rar_low >> (3 - i) * 8);
+
+   return 0;
+}
+
 /**
  *  txgbe_set_lan_id_multi_port_pcie - Set LAN id for PCIe multiple port 
devices
  *  @hw: pointer to the HW structure
@@ -381,6 +417,16 @@ s32 txgbe_validate_mac_addr(u8 *mac_addr)
return status;
 }
 
+/**
+ *  txgbe_set_rar - Set Rx address register
+ *  @hw: pointer to hardware structure
+ *  @index: Receive address register to write
+ *  @addr: Address to put into receive address register
+ *  @vmdq: VMDq "set" or "pool" index
+ *  @enable_addr: set flag that address is active
+ *
+ *  Puts an ethernet address into a receive address register.
+ **/
 s32 txgbe_set_rar(struct txgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
  u32 enable_addr)
 {
@@ -427,6 +473,250 @@ s32 txgbe_set_rar(struct txgbe_hw *hw, u32 index, u8 
*addr, u32 vmdq,
return 0;
 }
 
+/**
+ *  txgbe_clear_rar - Remove Rx address register
+ *  @hw: pointer to hardware structure
+ *  @index: Receive address register to write
+ *
+ *  Clears an ethernet address from a receive address register.
+ **/
+s32 txgbe_clear_rar(struct txgbe_hw *hw, u32 index)
+{
+   u32 rar_high;
+   u32 rar_entries = hw->mac.num_rar_entries;
+
+   DEBUGFUNC("txgbe_clear_rar");
+
+   /* Make sure we are using a valid rar index range */
+   if (index >= rar_entries) {
+   DEBUGOUT("RAR index %d is out of range.\n", index);
+   return TXGBE_ERR_INVALID_ARGUMENT;
+   }
+
+   /*
+* Some parts put the VMDq setting in the extra RAH bits,
+* so save everything except the lower 16 bits that hold part
+* of the address and the address valid bit.
+*/
+   wr32(hw, TXGBE_ETHADDRIDX, index);
+   rar_high = rd32(hw, TXGBE_ETHADDRH);
+   rar_high &= ~(TXGBE_ETHADDRH_AD_MASK | TXGBE_ETHADDRH_VLD);
+
+   wr32(hw, TXGBE_ETHADDRL, 0);
+   wr32(hw, TXGBE_ETHADDRH, rar_high);
+
+   /* clear VMDq pool/queue selection for this RAR */
+   hw->mac.clear_vmdq(hw, index, BIT_MASK32);
+
+   return 0;
+}
+
+/**
+ *  txgbe_init_rx_addrs - Initializes receive address filters.
+ *  @hw: pointer to hardware struct

[dpdk-dev] [PATCH v1 34/42] net/txgbe: add remaining RX and TX queue operations

[Jiawen Wu]

Add remaining receive and transmit queue operaions.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/txgbe_ethdev.c | 123 +++
 drivers/net/txgbe/txgbe_ethdev.h |  16 ++
 drivers/net/txgbe/txgbe_rxtx.c   | 259 +++
 drivers/net/txgbe/txgbe_rxtx.h   |   1 +
 4 files changed, 399 insertions(+)

diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index ba2849a82..54c97f81c 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -622,6 +622,46 @@ static struct rte_pci_driver rte_txgbe_pmd = {
 
 
 
+static int
+txgbe_check_mq_mode(struct rte_eth_dev *dev)
+{
+   RTE_SET_USED(dev);
+
+   return 0;
+}
+
+static int
+txgbe_dev_configure(struct rte_eth_dev *dev)
+{
+   struct txgbe_interrupt *intr = TXGBE_DEV_INTR(dev);
+   struct txgbe_adapter *adapter = TXGBE_DEV_ADAPTER(dev);
+   int ret;
+
+   PMD_INIT_FUNC_TRACE();
+
+   if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
+   dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
+
+   /* multiple queue mode checking */
+   ret  = txgbe_check_mq_mode(dev);
+   if (ret != 0) {
+   PMD_DRV_LOG(ERR, "txgbe_check_mq_mode fails with %d.",
+   ret);
+   return ret;
+   }
+
+   /* set flag to update link status after init */
+   intr->flags |= TXGBE_FLAG_NEED_LINK_UPDATE;
+
+   /*
+* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
+* allocation Rx preconditions we will reset it.
+*/
+   adapter->rx_bulk_alloc_allowed = true;
+
+   return 0;
+}
+
 static void
 txgbe_dev_phy_intr_setup(struct rte_eth_dev *dev)
 {
@@ -2062,6 +2102,47 @@ txgbe_set_default_mac_addr(struct rte_eth_dev *dev, 
struct rte_ether_addr *addr)
return 0;
 }
 
+static int
+txgbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
+{
+   struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
+   struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
+   uint32_t mask;
+   struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+
+   if (queue_id < 32) {
+   mask = rd32(hw, TXGBE_IMS(0));
+   mask &= (1 << queue_id);
+   wr32(hw, TXGBE_IMS(0), mask);
+   } else if (queue_id < 64) {
+   mask = rd32(hw, TXGBE_IMS(1));
+   mask &= (1 << (queue_id - 32));
+   wr32(hw, TXGBE_IMS(1), mask);
+   }
+   rte_intr_enable(intr_handle);
+
+   return 0;
+}
+
+static int
+txgbe_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
+{
+   uint32_t mask;
+   struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+
+   if (queue_id < 32) {
+   mask = rd32(hw, TXGBE_IMS(0));
+   mask &= ~(1 << queue_id);
+   wr32(hw, TXGBE_IMS(0), mask);
+   } else if (queue_id < 64) {
+   mask = rd32(hw, TXGBE_IMS(1));
+   mask &= ~(1 << (queue_id - 32));
+   wr32(hw, TXGBE_IMS(1), mask);
+   }
+
+   return 0;
+}
+
 /**
  * set the IVAR registers, mapping interrupt causes to vectors
  * @param hw
@@ -2151,6 +2232,37 @@ txgbe_configure_msix(struct rte_eth_dev *dev)
| TXGBE_ITR_WRDSA);
 }
 
+int
+txgbe_set_queue_rate_limit(struct rte_eth_dev *dev,
+  uint16_t queue_idx, uint16_t tx_rate)
+{
+   struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+   uint32_t bcnrc_val;
+
+   if (queue_idx >= hw->mac.max_tx_queues)
+   return -EINVAL;
+
+   if (tx_rate != 0) {
+   bcnrc_val = TXGBE_ARBTXRATE_MAX(tx_rate);
+   bcnrc_val |= TXGBE_ARBTXRATE_MIN(tx_rate / 2);
+   } else {
+   bcnrc_val = 0;
+   }
+
+   /*
+* Set global transmit compensation time to the MMW_SIZE in ARBTXMMW
+* register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
+*/
+   wr32(hw, TXGBE_ARBTXMMW, 0x14);
+
+   /* Set ARBTXRATE of queue X */
+   wr32(hw, TXGBE_ARBPOOLIDX, queue_idx);
+   wr32(hw, TXGBE_ARBTXRATE, bcnrc_val);
+   txgbe_flush(hw);
+
+   return 0;
+}
+
 static u8 *
 txgbe_dev_addr_list_itr(__rte_unused struct txgbe_hw *hw,
u8 **mc_addr_ptr, u32 *vmdq)
@@ -2299,6 +2411,7 @@ txgbe_get_module_eeprom(struct rte_eth_dev *dev,
 }
 
 static const struct eth_dev_ops txgbe_eth_dev_ops = {
+   .dev_configure  = txgbe_dev_configure,
.dev_start  = txgbe_dev_start,
.dev_stop   = txgbe_dev_stop,
.dev_set_link_up= txgbe_dev_set_link_up,
@@ -2322,7 +2435,13 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {
.tx_queue_start = txgbe_dev_tx_queue_start,
.tx_queue_stop  = txgbe_dev_tx_queue_stop,
.rx_queue_setup = txgbe_dev_rx_queue_setup,
+   .rx_queu

[dpdk-dev] [PATCH v1 30/42] net/txgbe: add device info get

[Jiawen Wu]

Add device information get operation.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/txgbe_ethdev.c | 78 +
 drivers/net/txgbe/txgbe_ethdev.h | 25 
 drivers/net/txgbe/txgbe_rxtx.c   | 99 
 drivers/net/txgbe/txgbe_rxtx.h   |  4 ++
 4 files changed, 206 insertions(+)

diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index c43d5b56f..682519726 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -62,6 +62,20 @@ static const struct rte_pci_id pci_id_txgbe_map[] = {
{ .vendor_id = 0, /* sentinel */ },
 };
 
+static const struct rte_eth_desc_lim rx_desc_lim = {
+   .nb_max = TXGBE_RING_DESC_MAX,
+   .nb_min = TXGBE_RING_DESC_MIN,
+   .nb_align = TXGBE_RXD_ALIGN,
+};
+
+static const struct rte_eth_desc_lim tx_desc_lim = {
+   .nb_max = TXGBE_RING_DESC_MAX,
+   .nb_min = TXGBE_RING_DESC_MIN,
+   .nb_align = TXGBE_TXD_ALIGN,
+   .nb_seg_max = TXGBE_TX_MAX_SEG,
+   .nb_mtu_seg_max = TXGBE_TX_MAX_SEG,
+};
+
 static const struct eth_dev_ops txgbe_eth_dev_ops;
 
 #define HW_XSTAT(m) {#m, offsetof(struct txgbe_hw_stats, m)}
@@ -1479,6 +1493,69 @@ txgbe_dev_xstats_reset(struct rte_eth_dev *dev)
return 0;
 }
 
+static int
+txgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
+{
+   struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
+   struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+
+   dev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues;
+   dev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues;
+   dev_info->min_rx_bufsize = 1024;
+   dev_info->max_rx_pktlen = 15872;
+   dev_info->max_mac_addrs = hw->mac.num_rar_entries;
+   dev_info->max_hash_mac_addrs = TXGBE_VMDQ_NUM_UC_MAC;
+   dev_info->max_vfs = pci_dev->max_vfs;
+   dev_info->max_vmdq_pools = ETH_64_POOLS;
+   dev_info->vmdq_queue_num = dev_info->max_rx_queues;
+   dev_info->rx_queue_offload_capa = txgbe_get_rx_queue_offloads(dev);
+   dev_info->rx_offload_capa = (txgbe_get_rx_port_offloads(dev) |
+dev_info->rx_queue_offload_capa);
+   dev_info->tx_queue_offload_capa = txgbe_get_tx_queue_offloads(dev);
+   dev_info->tx_offload_capa = txgbe_get_tx_port_offloads(dev);
+
+   dev_info->default_rxconf = (struct rte_eth_rxconf) {
+   .rx_thresh = {
+   .pthresh = TXGBE_DEFAULT_RX_PTHRESH,
+   .hthresh = TXGBE_DEFAULT_RX_HTHRESH,
+   .wthresh = TXGBE_DEFAULT_RX_WTHRESH,
+   },
+   .rx_free_thresh = TXGBE_DEFAULT_RX_FREE_THRESH,
+   .rx_drop_en = 0,
+   .offloads = 0,
+   };
+
+   dev_info->default_txconf = (struct rte_eth_txconf) {
+   .tx_thresh = {
+   .pthresh = TXGBE_DEFAULT_TX_PTHRESH,
+   .hthresh = TXGBE_DEFAULT_TX_HTHRESH,
+   .wthresh = TXGBE_DEFAULT_TX_WTHRESH,
+   },
+   .tx_free_thresh = TXGBE_DEFAULT_TX_FREE_THRESH,
+   .offloads = 0,
+   };
+
+   dev_info->rx_desc_lim = rx_desc_lim;
+   dev_info->tx_desc_lim = tx_desc_lim;
+
+   dev_info->hash_key_size = TXGBE_HKEY_MAX_INDEX * sizeof(uint32_t);
+   dev_info->reta_size = ETH_RSS_RETA_SIZE_128;
+   dev_info->flow_type_rss_offloads = TXGBE_RSS_OFFLOAD_ALL;
+
+   dev_info->speed_capa = ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G;
+   dev_info->speed_capa |= ETH_LINK_SPEED_100M;
+
+   /* Driver-preferred Rx/Tx parameters */
+   dev_info->default_rxportconf.burst_size = 32;
+   dev_info->default_txportconf.burst_size = 32;
+   dev_info->default_rxportconf.nb_queues = 1;
+   dev_info->default_txportconf.nb_queues = 1;
+   dev_info->default_rxportconf.ring_size = 256;
+   dev_info->default_txportconf.ring_size = 256;
+
+   return 0;
+}
+
 const uint32_t *
 txgbe_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 {
@@ -2010,6 +2087,7 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {
.xstats_get_names   = txgbe_dev_xstats_get_names,
.xstats_get_names_by_id = txgbe_dev_xstats_get_names_by_id,
.queue_stats_mapping_set= txgbe_dev_queue_stats_mapping_set,
+   .dev_infos_get  = txgbe_dev_info_get,
.dev_supported_ptypes_get   = txgbe_dev_supported_ptypes_get,
.rx_queue_start = txgbe_dev_rx_queue_start,
.rx_queue_stop  = txgbe_dev_rx_queue_stop,
diff --git a/drivers/net/txgbe/txgbe_ethdev.h b/drivers/net/txgbe/txgbe_ethdev.h
index 4ee11..61f4aa772 100644
--- a/drivers/net/txgbe/txgbe_ethdev.h
+++ b/drivers/net/txgbe/txgbe_ethdev.h
@@ -25,9 +25,21 @@
  * FreeBSD driver.
  */
 #define TXGBE_VLAN_TAG_SIZE 4
+#define TXGBE_HKEY_MAX_INDEX 10
 
 #define TXGBE_QUEUE_ITR_INTERVAL_DEFAULT   500 /* 500us */
 
+#de

[dpdk-dev] [PATCH v1 36/42] net/txgbe: add flow control support

[Jiawen Wu]

Add flow control support.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_hw.c   | 426 
 drivers/net/txgbe/base/txgbe_hw.h   |   6 +
 drivers/net/txgbe/base/txgbe_type.h |  24 ++
 drivers/net/txgbe/txgbe_ethdev.c| 118 +++-
 drivers/net/txgbe/txgbe_ethdev.h|   8 +
 5 files changed, 581 insertions(+), 1 deletion(-)

diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index 80ecec34d..34e7c3d1e 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -22,6 +22,212 @@ STATIC s32 txgbe_mta_vector(struct txgbe_hw *hw, u8 
*mc_addr);
 STATIC s32 txgbe_get_san_mac_addr_offset(struct txgbe_hw *hw,
 u16 *san_mac_offset);
 
+/**
+ * txgbe_device_supports_autoneg_fc - Check if device supports autonegotiation
+ * of flow control
+ * @hw: pointer to hardware structure
+ *
+ * This function returns true if the device supports flow control
+ * autonegotiation, and false if it does not.
+ *
+ **/
+bool txgbe_device_supports_autoneg_fc(struct txgbe_hw *hw)
+{
+   bool supported = false;
+   u32 speed;
+   bool link_up;
+
+   DEBUGFUNC("txgbe_device_supports_autoneg_fc");
+
+   switch (hw->phy.media_type) {
+   case txgbe_media_type_fiber_qsfp:
+   case txgbe_media_type_fiber:
+   hw->mac.check_link(hw, &speed, &link_up, false);
+   /* if link is down, assume supported */
+   if (link_up)
+   supported = speed == TXGBE_LINK_SPEED_1GB_FULL ?
+   true : false;
+   else
+   supported = true;
+
+   break;
+   case txgbe_media_type_backplane:
+   supported = true;
+   break;
+   case txgbe_media_type_copper:
+   /* only some copper devices support flow control autoneg */
+   switch (hw->device_id) {
+   case TXGBE_DEV_ID_RAPTOR_XAUI:
+   case TXGBE_DEV_ID_RAPTOR_SGMII:
+   supported = true;
+   break;
+   default:
+   supported = false;
+   }
+   default:
+   break;
+   }
+
+   if (!supported)
+   DEBUGOUT("Device %x does not support flow control autoneg",
+ hw->device_id);
+   return supported;
+}
+
+/**
+ *  txgbe_setup_fc - Set up flow control
+ *  @hw: pointer to hardware structure
+ *
+ *  Called at init time to set up flow control.
+ **/
+s32 txgbe_setup_fc(struct txgbe_hw *hw)
+{
+   s32 err = 0;
+   u32 reg = 0;
+   u16 reg_cu = 0;
+   u32 value = 0;
+   u64 reg_bp = 0;
+   bool locked = false;
+
+   DEBUGFUNC("txgbe_setup_fc");
+
+   /* Validate the requested mode */
+   if (hw->fc.strict_ieee && hw->fc.requested_mode == txgbe_fc_rx_pause) {
+   DEBUGOUT("txgbe_fc_rx_pause not valid in strict IEEE mode\n");
+   err = TXGBE_ERR_INVALID_LINK_SETTINGS;
+   goto out;
+   }
+
+   /*
+* 10gig parts do not have a word in the EEPROM to determine the
+* default flow control setting, so we explicitly set it to full.
+*/
+   if (hw->fc.requested_mode == txgbe_fc_default)
+   hw->fc.requested_mode = txgbe_fc_full;
+
+   /*
+* Set up the 1G and 10G flow control advertisement registers so the
+* HW will be able to do fc autoneg once the cable is plugged in.  If
+* we link at 10G, the 1G advertisement is harmless and vice versa.
+*/
+   switch (hw->phy.media_type) {
+   case txgbe_media_type_backplane:
+   /* some MAC's need RMW protection on AUTOC */
+   err = hw->mac.prot_autoc_read(hw, &locked, ®_bp);
+   if (err != 0)
+   goto out;
+
+   /* fall through - only backplane uses autoc */
+   case txgbe_media_type_fiber_qsfp:
+   case txgbe_media_type_fiber:
+   case txgbe_media_type_copper:
+   hw->phy.read_reg(hw, TXGBE_MD_AUTO_NEG_ADVT,
+TXGBE_MD_DEV_AUTO_NEG, ®_cu);
+   break;
+   default:
+   break;
+   }
+
+   /*
+* The possible values of fc.requested_mode are:
+* 0: Flow control is completely disabled
+* 1: Rx flow control is enabled (we can receive pause frames,
+*but not send pause frames).
+* 2: Tx flow control is enabled (we can send pause frames but
+*we do not support receiving pause frames).
+* 3: Both Rx and Tx flow control (symmetric) are enabled.
+* other: Invalid.
+*/
+   switch (hw->fc.requested_mode) {
+   case txgbe_fc_none:
+   /* Flow control completely disabled by software override. */
+   reg &= ~(SR_MII_MMD_AN_ADV_PAUSE_SYM |
+   SR

[dpdk-dev] [PATCH v1 37/42] net/txgbe: add FC auto negotiation support

[Jiawen Wu]

Add flow control negotitation with link partner.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_hw.c | 201 ++
 drivers/net/txgbe/base/txgbe_hw.h |   4 +-
 2 files changed, 204 insertions(+), 1 deletion(-)

diff --git a/drivers/net/txgbe/base/txgbe_hw.c 
b/drivers/net/txgbe/base/txgbe_hw.c
index 34e7c3d1e..164d3b5b8 100644
--- a/drivers/net/txgbe/base/txgbe_hw.c
+++ b/drivers/net/txgbe/base/txgbe_hw.c
@@ -1061,6 +1061,205 @@ s32 txgbe_fc_enable(struct txgbe_hw *hw)
return err;
 }
 
+/**
+ *  txgbe_negotiate_fc - Negotiate flow control
+ *  @hw: pointer to hardware structure
+ *  @adv_reg: flow control advertised settings
+ *  @lp_reg: link partner's flow control settings
+ *  @adv_sym: symmetric pause bit in advertisement
+ *  @adv_asm: asymmetric pause bit in advertisement
+ *  @lp_sym: symmetric pause bit in link partner advertisement
+ *  @lp_asm: asymmetric pause bit in link partner advertisement
+ *
+ *  Find the intersection between advertised settings and link partner's
+ *  advertised settings
+ **/
+s32 txgbe_negotiate_fc(struct txgbe_hw *hw, u32 adv_reg, u32 lp_reg,
+  u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm)
+{
+   if ((!(adv_reg)) ||  (!(lp_reg))) {
+   DEBUGOUT("Local or link partner's advertised flow control "
+ "settings are NULL. Local: %x, link partner: 
%x\n",
+ adv_reg, lp_reg);
+   return TXGBE_ERR_FC_NOT_NEGOTIATED;
+   }
+
+   if ((adv_reg & adv_sym) && (lp_reg & lp_sym)) {
+   /*
+* Now we need to check if the user selected Rx ONLY
+* of pause frames.  In this case, we had to advertise
+* FULL flow control because we could not advertise RX
+* ONLY. Hence, we must now check to see if we need to
+* turn OFF the TRANSMISSION of PAUSE frames.
+*/
+   if (hw->fc.requested_mode == txgbe_fc_full) {
+   hw->fc.current_mode = txgbe_fc_full;
+   DEBUGOUT("Flow Control = FULL.\n");
+   } else {
+   hw->fc.current_mode = txgbe_fc_rx_pause;
+   DEBUGOUT("Flow Control=RX PAUSE frames only\n");
+   }
+   } else if (!(adv_reg & adv_sym) && (adv_reg & adv_asm) &&
+  (lp_reg & lp_sym) && (lp_reg & lp_asm)) {
+   hw->fc.current_mode = txgbe_fc_tx_pause;
+   DEBUGOUT("Flow Control = TX PAUSE frames only.\n");
+   } else if ((adv_reg & adv_sym) && (adv_reg & adv_asm) &&
+  !(lp_reg & lp_sym) && (lp_reg & lp_asm)) {
+   hw->fc.current_mode = txgbe_fc_rx_pause;
+   DEBUGOUT("Flow Control = RX PAUSE frames only.\n");
+   } else {
+   hw->fc.current_mode = txgbe_fc_none;
+   DEBUGOUT("Flow Control = NONE.\n");
+   }
+   return 0;
+}
+
+/**
+ *  txgbe_fc_autoneg_fiber - Enable flow control on 1 gig fiber
+ *  @hw: pointer to hardware structure
+ *
+ *  Enable flow control according on 1 gig fiber.
+ **/
+STATIC s32 txgbe_fc_autoneg_fiber(struct txgbe_hw *hw)
+{
+   u32 pcs_anadv_reg, pcs_lpab_reg;
+   s32 err = TXGBE_ERR_FC_NOT_NEGOTIATED;
+
+   /*
+* On multispeed fiber at 1g, bail out if
+* - link is up but AN did not complete, or if
+* - link is up and AN completed but timed out
+*/
+
+   pcs_anadv_reg = rd32_epcs(hw, SR_MII_MMD_AN_ADV);
+   pcs_lpab_reg = rd32_epcs(hw, SR_MII_MMD_LP_BABL);
+
+   err =  txgbe_negotiate_fc(hw, pcs_anadv_reg,
+ pcs_lpab_reg,
+ SR_MII_MMD_AN_ADV_PAUSE_SYM,
+ SR_MII_MMD_AN_ADV_PAUSE_ASM,
+ SR_MII_MMD_AN_ADV_PAUSE_SYM,
+ SR_MII_MMD_AN_ADV_PAUSE_ASM);
+
+   return err;
+}
+
+/**
+ *  txgbe_fc_autoneg_backplane - Enable flow control IEEE clause 37
+ *  @hw: pointer to hardware structure
+ *
+ *  Enable flow control according to IEEE clause 37.
+ **/
+STATIC s32 txgbe_fc_autoneg_backplane(struct txgbe_hw *hw)
+{
+   u32 anlp1_reg, autoc_reg;
+   s32 err = TXGBE_ERR_FC_NOT_NEGOTIATED;
+
+   /*
+* Read the 10g AN autoc and LP ability registers and resolve
+* local flow control settings accordingly
+*/
+   autoc_reg = rd32_epcs(hw, SR_AN_MMD_ADV_REG1);
+   anlp1_reg = rd32_epcs(hw, SR_AN_MMD_LP_ABL1);
+
+   err = txgbe_negotiate_fc(hw, autoc_reg,
+   anlp1_reg,
+   SR_AN_MMD_ADV_REG1_PAUSE_SYM,
+   SR_AN_MMD_ADV_REG1_PAUSE_ASM,
+   SR_AN_MMD_ADV_REG1_PAUSE_SYM,
+   SR_AN_MMD_ADV_REG1_PAUSE_ASM);
+
+   return err;
+}
+
+/**
+ *  txgbe_fc_autoneg_copper - Enable flow control IEEE clause 37
+ *  @hw: pointer to hardware structure
+ *

[dpdk-dev] [PATCH v1 39/42] net/txgbe: configure DCB HW resources

[Jiawen Wu]

Add DCB transmit and receive mode configurations.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/meson.build|   1 +
 drivers/net/txgbe/base/txgbe_dcb.c| 180 
 drivers/net/txgbe/base/txgbe_dcb.h|  27 ++
 drivers/net/txgbe/base/txgbe_dcb_hw.c | 283 +++
 drivers/net/txgbe/base/txgbe_dcb_hw.h |  23 ++
 drivers/net/txgbe/base/txgbe_hw.c |   1 +
 drivers/net/txgbe/txgbe_ethdev.c  |   6 +
 drivers/net/txgbe/txgbe_ethdev.h  |  10 +
 drivers/net/txgbe/txgbe_rxtx.c| 383 ++
 9 files changed, 914 insertions(+)
 create mode 100644 drivers/net/txgbe/base/txgbe_dcb_hw.c
 create mode 100644 drivers/net/txgbe/base/txgbe_dcb_hw.h

diff --git a/drivers/net/txgbe/base/meson.build 
b/drivers/net/txgbe/base/meson.build
index 13b418f19..d240a4335 100644
--- a/drivers/net/txgbe/base/meson.build
+++ b/drivers/net/txgbe/base/meson.build
@@ -2,6 +2,7 @@
 # Copyright(c) 2015-2020
 
 sources = [
+   'txgbe_dcb_hw.c',
'txgbe_dcb.c',
'txgbe_eeprom.c',
'txgbe_hw.c',
diff --git a/drivers/net/txgbe/base/txgbe_dcb.c 
b/drivers/net/txgbe/base/txgbe_dcb.c
index 6366da92a..7e9a16cfe 100644
--- a/drivers/net/txgbe/base/txgbe_dcb.c
+++ b/drivers/net/txgbe/base/txgbe_dcb.c
@@ -5,6 +5,7 @@
 #include "txgbe_type.h"
 #include "txgbe_hw.h"
 #include "txgbe_dcb.h"
+#include "txgbe_dcb_hw.h"
 
 /**
  *  txgbe_pfc_enable - Enable flow control
@@ -146,6 +147,177 @@ txgbe_dcb_pfc_enable(struct txgbe_hw *hw, uint8_t tc_num)
return ret_val;
 }
 
+/**
+ * txgbe_dcb_calculate_tc_credits_cee - Calculates traffic class credits
+ * @hw: pointer to hardware structure
+ * @dcb_config: Struct containing DCB settings
+ * @max_frame_size: Maximum frame size
+ * @direction: Configuring either Tx or Rx
+ *
+ * This function calculates the credits allocated to each traffic class.
+ * It should be called only after the rules are checked by
+ * txgbe_dcb_check_config_cee().
+ */
+s32 txgbe_dcb_calculate_tc_credits_cee(struct txgbe_hw *hw,
+  struct txgbe_dcb_config *dcb_config,
+  u32 max_frame_size, u8 direction)
+{
+   struct txgbe_dcb_tc_path *p;
+   u32 min_multiplier  = 0;
+   u16 min_percent = 100;
+   s32 ret_val =   0;
+   /* Initialization values default for Tx settings */
+   u32 min_credit  = 0;
+   u32 credit_refill   = 0;
+   u32 credit_max  = 0;
+   u16 link_percentage = 0;
+   u8  bw_percent  = 0;
+   u8  i;
+
+   UNREFERENCED_PARAMETER(hw);
+
+   if (dcb_config == NULL) {
+   ret_val = TXGBE_ERR_CONFIG;
+   goto out;
+   }
+
+   min_credit = ((max_frame_size / 2) + TXGBE_DCB_CREDIT_QUANTUM - 1) /
+TXGBE_DCB_CREDIT_QUANTUM;
+
+   /* Find smallest link percentage */
+   for (i = 0; i < TXGBE_DCB_TC_MAX; i++) {
+   p = &dcb_config->tc_config[i].path[direction];
+   bw_percent = dcb_config->bw_percentage[p->bwg_id][direction];
+   link_percentage = p->bwg_percent;
+
+   link_percentage = (link_percentage * bw_percent) / 100;
+
+   if (link_percentage && link_percentage < min_percent)
+   min_percent = link_percentage;
+   }
+
+   /*
+* The ratio between traffic classes will control the bandwidth
+* percentages seen on the wire. To calculate this ratio we use
+* a multiplier. It is required that the refill credits must be
+* larger than the max frame size so here we find the smallest
+* multiplier that will allow all bandwidth percentages to be
+* greater than the max frame size.
+*/
+   min_multiplier = (min_credit / min_percent) + 1;
+
+   /* Find out the link percentage for each TC first */
+   for (i = 0; i < TXGBE_DCB_TC_MAX; i++) {
+   p = &dcb_config->tc_config[i].path[direction];
+   bw_percent = dcb_config->bw_percentage[p->bwg_id][direction];
+
+   link_percentage = p->bwg_percent;
+   /* Must be careful of integer division for very small nums */
+   link_percentage = (link_percentage * bw_percent) / 100;
+   if (p->bwg_percent > 0 && link_percentage == 0)
+   link_percentage = 1;
+
+   /* Save link_percentage for reference */
+   p->link_percent = (u8)link_percentage;
+
+   /* Calculate credit refill ratio using multiplier */
+   credit_refill = min(link_percentage * min_multiplier,
+   (u32)TXGBE_DCB_MAX_CREDIT_REFILL);
+
+   /* Refill at least minimum credit */
+   if (credit_refill < min_credit)
+   credit_refill = min_credit;
+
+   p->data_credits_refill = (u16)credit_refill;
+
+   /* Calculate maximum credit

[dpdk-dev] [PATCH v1 35/42] net/txgbe: add VLAN handle support

[Jiawen Wu]

Add VLAN filter, tpid, offload and strip set support.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/txgbe_ethdev.c | 370 +++
 drivers/net/txgbe/txgbe_ethdev.h |  32 +++
 2 files changed, 402 insertions(+)

diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 54c97f81c..5e0b800ef 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -41,6 +41,8 @@ static void txgbe_dev_close(struct rte_eth_dev *dev);
 static int txgbe_dev_link_update(struct rte_eth_dev *dev,
int wait_to_complete);
 static int txgbe_dev_stats_reset(struct rte_eth_dev *dev);
+static void txgbe_vlan_hw_strip_enable(struct rte_eth_dev *dev, uint16_t 
queue);
+static void txgbe_vlan_hw_strip_disable(struct rte_eth_dev *dev, uint16_t 
queue);
 
 static void txgbe_dev_link_status_print(struct rte_eth_dev *dev);
 static int txgbe_dev_lsc_interrupt_setup(struct rte_eth_dev *dev, uint8_t on);
@@ -53,6 +55,24 @@ static void txgbe_dev_interrupt_handler(void *param);
 static void txgbe_dev_interrupt_delayed_handler(void *param);
 static void txgbe_configure_msix(struct rte_eth_dev *dev);
 
+#define TXGBE_SET_HWSTRIP(h, q) do {\
+   uint32_t idx = (q) / (sizeof((h)->bitmap[0]) * NBBY); \
+   uint32_t bit = (q) % (sizeof((h)->bitmap[0]) * NBBY); \
+   (h)->bitmap[idx] |= 1 << bit;\
+   } while (0)
+
+#define TXGBE_CLEAR_HWSTRIP(h, q) do {\
+   uint32_t idx = (q) / (sizeof((h)->bitmap[0]) * NBBY); \
+   uint32_t bit = (q) % (sizeof((h)->bitmap[0]) * NBBY); \
+   (h)->bitmap[idx] &= ~(1 << bit);\
+   } while (0)
+
+#define TXGBE_GET_HWSTRIP(h, q, r) do {\
+   uint32_t idx = (q) / (sizeof((h)->bitmap[0]) * NBBY); \
+   uint32_t bit = (q) % (sizeof((h)->bitmap[0]) * NBBY); \
+   (r) = (h)->bitmap[idx] >> bit & 1;\
+   } while (0)
+
 /*
  * The set of PCI devices this driver supports
  */
@@ -341,6 +361,8 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void 
*init_params __rte_unused)
 {
struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
struct txgbe_hw *hw = TXGBE_DEV_HW(eth_dev);
+   struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(eth_dev);
+   struct txgbe_hwstrip *hwstrip = TXGBE_DEV_HWSTRIP(eth_dev);
struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
const struct rte_memzone *mz;
uint32_t ctrl_ext;
@@ -488,6 +510,12 @@ eth_txgbe_dev_init(struct rte_eth_dev *eth_dev, void 
*init_params __rte_unused)
 */
eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
 
+   /* initialize the vfta */
+   memset(shadow_vfta, 0, sizeof(*shadow_vfta));
+
+   /* initialize the hw strip bitmap*/
+   memset(hwstrip, 0, sizeof(*hwstrip));
+
/* initialize PF if max_vfs not zero */
txgbe_pf_host_init(eth_dev);
 
@@ -620,6 +648,335 @@ static struct rte_pci_driver rte_txgbe_pmd = {
.remove = eth_txgbe_pci_remove,
 };
 
+static int
+txgbe_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
+{
+   struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+   struct txgbe_vfta *shadow_vfta = TXGBE_DEV_VFTA(dev);
+   uint32_t vfta;
+   uint32_t vid_idx;
+   uint32_t vid_bit;
+
+   vid_idx = (uint32_t)((vlan_id >> 5) & 0x7F);
+   vid_bit = (uint32_t)(1 << (vlan_id & 0x1F));
+   vfta = rd32(hw, TXGBE_VLANTBL(vid_idx));
+   if (on)
+   vfta |= vid_bit;
+   else
+   vfta &= ~vid_bit;
+   wr32(hw, TXGBE_VLANTBL(vid_idx), vfta);
+
+   /* update local VFTA copy */
+   shadow_vfta->vfta[vid_idx] = vfta;
+
+   return 0;
+}
+
+static void
+txgbe_vlan_strip_queue_set(struct rte_eth_dev *dev, uint16_t queue, int on)
+{
+   struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+   struct txgbe_rx_queue *rxq;
+   bool restart;
+   uint32_t rxcfg, rxbal, rxbah;
+
+   if (on)
+   txgbe_vlan_hw_strip_enable(dev, queue);
+   else
+   txgbe_vlan_hw_strip_disable(dev, queue);
+
+   rxq = dev->data->rx_queues[queue];
+   rxbal = rd32(hw, TXGBE_RXBAL(rxq->reg_idx));
+   rxbah = rd32(hw, TXGBE_RXBAH(rxq->reg_idx));
+   rxcfg = rd32(hw, TXGBE_RXCFG(rxq->reg_idx));
+   if (rxq->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) {
+   restart = (rxcfg & TXGBE_RXCFG_ENA) &&
+   !(rxcfg & TXGBE_RXCFG_VLAN);
+   rxcfg |= TXGBE_RXCFG_VLAN;
+   } else {
+   restart = (rxcfg & TXGBE_RXCFG_ENA) &&
+   (rxcfg & TXGBE_RXCFG_VLAN);
+   rxcfg &= ~TXGBE_RXCFG_VLAN;
+   }
+   rxcfg &= ~TXGBE_RXCFG_ENA;
+
+   if (restart) {
+   /* set vlan strip for ring */
+   txgbe_dev_rx_queue_stop(dev, queue);
+   wr32(hw, TXGBE_RXBAL(rxq->reg_idx), rxbal);
+   wr32(hw, TXGBE_RXBAH(rxq->reg_idx),

[dpdk-dev] [PATCH v1 38/42] net/txgbe: add DCB packet buffer allocation

[Jiawen Wu]

Add DCB packet buffer allocation and priority flow control support.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/meson.build  |   1 +
 drivers/net/txgbe/base/txgbe.h  |   1 +
 drivers/net/txgbe/base/txgbe_dcb.c  | 180 
 drivers/net/txgbe/base/txgbe_dcb.h  |  86 +
 drivers/net/txgbe/base/txgbe_hw.c   |  63 ++
 drivers/net/txgbe/base/txgbe_hw.h   |   2 +
 drivers/net/txgbe/base/txgbe_type.h |  13 ++
 drivers/net/txgbe/txgbe_ethdev.c|  98 +++
 drivers/net/txgbe/txgbe_ethdev.h|   6 +
 drivers/net/txgbe/txgbe_rxtx.c  |  51 
 10 files changed, 501 insertions(+)
 create mode 100644 drivers/net/txgbe/base/txgbe_dcb.c
 create mode 100644 drivers/net/txgbe/base/txgbe_dcb.h

diff --git a/drivers/net/txgbe/base/meson.build 
b/drivers/net/txgbe/base/meson.build
index 069879a7c..13b418f19 100644
--- a/drivers/net/txgbe/base/meson.build
+++ b/drivers/net/txgbe/base/meson.build
@@ -2,6 +2,7 @@
 # Copyright(c) 2015-2020
 
 sources = [
+   'txgbe_dcb.c',
'txgbe_eeprom.c',
'txgbe_hw.c',
'txgbe_mng.c',
diff --git a/drivers/net/txgbe/base/txgbe.h b/drivers/net/txgbe/base/txgbe.h
index 764caa439..1bb8f3af8 100644
--- a/drivers/net/txgbe/base/txgbe.h
+++ b/drivers/net/txgbe/base/txgbe.h
@@ -10,5 +10,6 @@
 #include "txgbe_eeprom.h"
 #include "txgbe_phy.h"
 #include "txgbe_hw.h"
+#include "txgbe_dcb.h"
 
 #endif /* _TXGBE_H_ */
diff --git a/drivers/net/txgbe/base/txgbe_dcb.c 
b/drivers/net/txgbe/base/txgbe_dcb.c
new file mode 100644
index 0..6366da92a
--- /dev/null
+++ b/drivers/net/txgbe/base/txgbe_dcb.c
@@ -0,0 +1,180 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2015-2020
+ */
+
+#include "txgbe_type.h"
+#include "txgbe_hw.h"
+#include "txgbe_dcb.h"
+
+/**
+ *  txgbe_pfc_enable - Enable flow control
+ *  @hw: pointer to hardware structure
+ *  @tc_num: traffic class number
+ *  Enable flow control according to the current settings.
+ */
+int
+txgbe_dcb_pfc_enable(struct txgbe_hw *hw, uint8_t tc_num)
+{
+   int ret_val = 0;
+   uint32_t mflcn_reg, fccfg_reg;
+   uint32_t pause_time;
+   uint32_t fcrtl, fcrth;
+   uint8_t i;
+   uint8_t nb_rx_en;
+
+   /* Validate the water mark configuration */
+   if (!hw->fc.pause_time) {
+   ret_val = TXGBE_ERR_INVALID_LINK_SETTINGS;
+   goto out;
+   }
+
+   /* Low water mark of zero causes XOFF floods */
+   if (hw->fc.current_mode & txgbe_fc_tx_pause) {
+/* High/Low water can not be 0 */
+   if (!hw->fc.high_water[tc_num] ||
+   !hw->fc.low_water[tc_num]) {
+   PMD_INIT_LOG(ERR, "Invalid water mark configuration");
+   ret_val = TXGBE_ERR_INVALID_LINK_SETTINGS;
+   goto out;
+   }
+
+   if (hw->fc.low_water[tc_num] >= hw->fc.high_water[tc_num]) {
+   PMD_INIT_LOG(ERR, "Invalid water mark configuration");
+   ret_val = TXGBE_ERR_INVALID_LINK_SETTINGS;
+   goto out;
+   }
+   }
+   /* Negotiate the fc mode to use */
+   txgbe_fc_autoneg(hw);
+
+   /* Disable any previous flow control settings */
+   mflcn_reg = rd32(hw, TXGBE_RXFCCFG);
+   mflcn_reg &= ~(TXGBE_RXFCCFG_FC | TXGBE_RXFCCFG_PFC);
+
+   fccfg_reg = rd32(hw, TXGBE_TXFCCFG);
+   fccfg_reg &= ~(TXGBE_TXFCCFG_FC | TXGBE_TXFCCFG_PFC);
+
+   switch (hw->fc.current_mode) {
+   case txgbe_fc_none:
+   /*
+* If the count of enabled RX Priority Flow control > 1,
+* and the TX pause can not be disabled
+*/
+   nb_rx_en = 0;
+   for (i = 0; i < TXGBE_DCB_TC_MAX; i++) {
+   uint32_t reg = rd32(hw, TXGBE_FCWTRHI(i));
+   if (reg & TXGBE_FCWTRHI_XOFF)
+   nb_rx_en++;
+   }
+   if (nb_rx_en > 1)
+   fccfg_reg |= TXGBE_TXFCCFG_PFC;
+   break;
+   case txgbe_fc_rx_pause:
+   /*
+* Rx Flow control is enabled and Tx Flow control is
+* disabled by software override. Since there really
+* isn't a way to advertise that we are capable of RX
+* Pause ONLY, we will advertise that we support both
+* symmetric and asymmetric Rx PAUSE.  Later, we will
+* disable the adapter's ability to send PAUSE frames.
+*/
+   mflcn_reg |= TXGBE_RXFCCFG_PFC;
+   /*
+* If the count of enabled RX Priority Flow control > 1,
+* and the TX pause can not be disabled
+*/
+   nb_rx_en = 0;
+   for (i = 0; i < TXGBE_DCB_TC_MAX; i++) {
+   uint32_t reg = rd32(hw, TXGBE_FCWTRHI(i));
+  

[dpdk-dev] [PATCH v1 41/42] net/txgbe: add MTU set operation

[Jiawen Wu]

Add MTU set operation.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_type.h |  2 ++
 drivers/net/txgbe/txgbe_ethdev.c| 41 +
 2 files changed, 43 insertions(+)

diff --git a/drivers/net/txgbe/base/txgbe_type.h 
b/drivers/net/txgbe/base/txgbe_type.h
index fcc44ece8..8d1a3a986 100644
--- a/drivers/net/txgbe/base/txgbe_type.h
+++ b/drivers/net/txgbe/base/txgbe_type.h
@@ -652,6 +652,8 @@ struct txgbe_hw {
void IOMEM *isb_mem;
u16 nb_rx_queues;
u16 nb_tx_queues;
+
+   u32 mode;
enum txgbe_link_status {
TXGBE_LINK_STATUS_NONE = 0,
TXGBE_LINK_STATUS_KX,
diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index a2a8f2726..8a6b7e483 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -2744,6 +2744,46 @@ txgbe_set_default_mac_addr(struct rte_eth_dev *dev, 
struct rte_ether_addr *addr)
return 0;
 }
 
+static int
+txgbe_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
+{
+   struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+   struct rte_eth_dev_info dev_info;
+   uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
+   struct rte_eth_dev_data *dev_data = dev->data;
+   int ret;
+
+   ret = txgbe_dev_info_get(dev, &dev_info);
+   if (ret != 0)
+   return ret;
+
+   /* check that mtu is within the allowed range */
+   if ((mtu < RTE_ETHER_MIN_MTU) || (frame_size > dev_info.max_rx_pktlen))
+   return -EINVAL;
+
+   /* If device is started, refuse mtu that requires the support of
+* scattered packets when this feature has not been enabled before.
+*/
+   if (dev_data->dev_started && !dev_data->scattered_rx &&
+   (frame_size + 2 * TXGBE_VLAN_TAG_SIZE >
+dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)) {
+   PMD_INIT_LOG(ERR, "Stop port first.");
+   return -EINVAL;
+   }
+
+   /* update max frame size */
+   dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
+
+   if (hw->mode)
+   wr32m(hw, TXGBE_FRMSZ, TXGBE_FRMSZ_MAX_MASK,
+   TXGBE_FRAME_SIZE_MAX);
+   else
+   wr32m(hw, TXGBE_FRMSZ, TXGBE_FRMSZ_MAX_MASK,
+   
TXGBE_FRMSZ_MAX(dev->data->dev_conf.rxmode.max_rx_pkt_len));
+
+   return 0;
+}
+
 static int
 txgbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
 {
@@ -3076,6 +3116,7 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {
.fw_version_get = txgbe_fw_version_get,
.dev_infos_get  = txgbe_dev_info_get,
.dev_supported_ptypes_get   = txgbe_dev_supported_ptypes_get,
+   .mtu_set= txgbe_dev_mtu_set,
.vlan_filter_set= txgbe_vlan_filter_set,
.vlan_tpid_set  = txgbe_vlan_tpid_set,
.vlan_offload_set   = txgbe_vlan_offload_set,
-- 
2.18.4

[dpdk-dev] [PATCH v1 42/42] net/txgbe: add register dump support

[Jiawen Wu]

Add register dump support.

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/base/txgbe_type.h  |   1 +
 drivers/net/txgbe/txgbe_ethdev.c | 113 +++
 drivers/net/txgbe/txgbe_regs_group.h |  54 +
 3 files changed, 168 insertions(+)
 create mode 100644 drivers/net/txgbe/txgbe_regs_group.h

diff --git a/drivers/net/txgbe/base/txgbe_type.h 
b/drivers/net/txgbe/base/txgbe_type.h
index 8d1a3a986..0d3d8d99d 100644
--- a/drivers/net/txgbe/base/txgbe_type.h
+++ b/drivers/net/txgbe/base/txgbe_type.h
@@ -644,6 +644,7 @@ struct txgbe_hw {
u16 vendor_id;
u16 subsystem_device_id;
u16 subsystem_vendor_id;
+   u8 revision_id;
bool adapter_stopped;
bool allow_unsupported_sfp;
bool need_crosstalk_fix;
diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 8a6b7e483..aca595862 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -34,6 +34,72 @@
 #include "base/txgbe.h"
 #include "txgbe_ethdev.h"
 #include "txgbe_rxtx.h"
+#include "txgbe_regs_group.h"
+
+static const struct reg_info txgbe_regs_general[] = {
+   {TXGBE_RST, 1, 1, "TXGBE_RST"},
+   {TXGBE_STAT, 1, 1, "TXGBE_STAT"},
+   {TXGBE_PORTCTL, 1, 1, "TXGBE_PORTCTL"},
+   {TXGBE_SDP, 1, 1, "TXGBE_SDP"},
+   {TXGBE_SDPCTL, 1, 1, "TXGBE_SDPCTL"},
+   {TXGBE_LEDCTL, 1, 1, "TXGBE_LEDCTL"},
+   {0, 0, 0, ""}
+};
+
+static const struct reg_info txgbe_regs_nvm[] = {
+   {0, 0, 0, ""}
+};
+
+static const struct reg_info txgbe_regs_interrupt[] = {
+   {0, 0, 0, ""}
+};
+
+static const struct reg_info txgbe_regs_fctl_others[] = {
+   {0, 0, 0, ""}
+};
+
+static const struct reg_info txgbe_regs_rxdma[] = {
+   {0, 0, 0, ""}
+};
+
+static const struct reg_info txgbe_regs_rx[] = {
+   {0, 0, 0, ""}
+};
+
+static struct reg_info txgbe_regs_tx[] = {
+   {0, 0, 0, ""}
+};
+
+static const struct reg_info txgbe_regs_wakeup[] = {
+   {0, 0, 0, ""}
+};
+
+static const struct reg_info txgbe_regs_dcb[] = {
+   {0, 0, 0, ""}
+};
+
+static const struct reg_info txgbe_regs_mac[] = {
+   {0, 0, 0, ""}
+};
+
+static const struct reg_info txgbe_regs_diagnostic[] = {
+   {0, 0, 0, ""},
+};
+
+/* PF registers */
+static const struct reg_info *txgbe_regs_others[] = {
+   txgbe_regs_general,
+   txgbe_regs_nvm,
+   txgbe_regs_interrupt,
+   txgbe_regs_fctl_others,
+   txgbe_regs_rxdma,
+   txgbe_regs_rx,
+   txgbe_regs_tx,
+   txgbe_regs_wakeup,
+   txgbe_regs_dcb,
+   txgbe_regs_mac,
+   txgbe_regs_diagnostic,
+   NULL};
 
 static int  txgbe_dev_set_link_up(struct rte_eth_dev *dev);
 static int  txgbe_dev_set_link_down(struct rte_eth_dev *dev);
@@ -2971,6 +3037,52 @@ txgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev,
 txgbe_dev_addr_list_itr, TRUE);
 }
 
+static int
+txgbe_get_reg_length(struct rte_eth_dev *dev __rte_unused)
+{
+   int count = 0;
+   int g_ind = 0;
+   const struct reg_info *reg_group;
+   const struct reg_info **reg_set = txgbe_regs_others;
+
+   while ((reg_group = reg_set[g_ind++]))
+   count += txgbe_regs_group_count(reg_group);
+
+   return count;
+}
+
+static int
+txgbe_get_regs(struct rte_eth_dev *dev,
+ struct rte_dev_reg_info *regs)
+{
+   struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+   uint32_t *data = regs->data;
+   int g_ind = 0;
+   int count = 0;
+   const struct reg_info *reg_group;
+   const struct reg_info **reg_set = txgbe_regs_others;
+
+   if (data == NULL) {
+   regs->length = txgbe_get_reg_length(dev);
+   regs->width = sizeof(uint32_t);
+   return 0;
+   }
+
+   /* Support only full register dump */
+   if ((regs->length == 0) ||
+   (regs->length == (uint32_t)txgbe_get_reg_length(dev))) {
+   regs->version = hw->mac.type << 24 |
+   hw->revision_id << 16 |
+   hw->device_id;
+   while ((reg_group = reg_set[g_ind++]))
+   count += txgbe_read_regs_group(dev, &data[count],
+ reg_group);
+   return 0;
+   }
+
+   return -ENOTSUP;
+}
+
 static int
 txgbe_get_eeprom_length(struct rte_eth_dev *dev)
 {
@@ -3147,6 +3259,7 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {
.set_mc_addr_list   = txgbe_dev_set_mc_addr_list,
.rxq_info_get   = txgbe_rxq_info_get,
.txq_info_get   = txgbe_txq_info_get,
+   .get_reg  

[dpdk-dev] [PATCH 0/4] ethdev: change the queue ID type

[Min Hu (Connor)]

This series are minor change the queue ID type from
uint8_t to uint16_t.

Huisong Li (2):
  ethdev: change data type in TC rxq and TC txq
  ethdev: fix compiling errors for per-queue statistics

Min Hu (Connor) (2):
  doc: announce modified field in DCB TC queue mapping
  doc: announce modified field in ethdev API

 app/test-pmd/cmdline.c |  2 +-
 app/test-pmd/config.c  |  4 ++--
 app/test-pmd/testpmd.c |  2 +-
 app/test-pmd/testpmd.h |  5 +++--
 doc/guides/rel_notes/release_20_11.rst |  7 +++
 drivers/net/igc/igc_ethdev.c   |  4 ++--
 drivers/net/ixgbe/ixgbe_ethdev.c   |  4 ++--
 drivers/net/memif/rte_eth_memif.c  |  2 +-
 drivers/net/octeontx2/otx2_ethdev.h|  2 +-
 drivers/net/octeontx2/otx2_stats.c |  2 +-
 drivers/net/virtio/virtio_ethdev.c |  4 ++--
 lib/librte_ethdev/rte_ethdev.c |  6 +++---
 lib/librte_ethdev/rte_ethdev.h | 12 ++--
 lib/librte_ethdev/rte_ethdev_core.h|  2 +-
 14 files changed, 33 insertions(+), 25 deletions(-)

-- 
2.7.4

[dpdk-dev] [PATCH v1 40/42] net/txgbe: add device promiscuous and allmulticast mode

[Jiawen Wu]

Add device promiscuous and allmulticast mode

Signed-off-by: Jiawen Wu 
---
 drivers/net/txgbe/txgbe_ethdev.c | 63 
 1 file changed, 63 insertions(+)

diff --git a/drivers/net/txgbe/txgbe_ethdev.c b/drivers/net/txgbe/txgbe_ethdev.c
index 7a2f16d63..a2a8f2726 100644
--- a/drivers/net/txgbe/txgbe_ethdev.c
+++ b/drivers/net/txgbe/txgbe_ethdev.c
@@ -2188,6 +2188,65 @@ txgbe_dev_link_update(struct rte_eth_dev *dev, int 
wait_to_complete)
return txgbe_dev_link_update_share(dev, wait_to_complete);
 }
 
+static int
+txgbe_dev_promiscuous_enable(struct rte_eth_dev *dev)
+{
+   struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+   uint32_t fctrl;
+
+   fctrl = rd32(hw, TXGBE_PSRCTL);
+   fctrl |= (TXGBE_PSRCTL_UCP | TXGBE_PSRCTL_MCP);
+   wr32(hw, TXGBE_PSRCTL, fctrl);
+
+   return 0;
+}
+
+static int
+txgbe_dev_promiscuous_disable(struct rte_eth_dev *dev)
+{
+   struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+   uint32_t fctrl;
+
+   fctrl = rd32(hw, TXGBE_PSRCTL);
+   fctrl &= (~TXGBE_PSRCTL_UCP);
+   if (dev->data->all_multicast == 1)
+   fctrl |= TXGBE_PSRCTL_MCP;
+   else
+   fctrl &= (~TXGBE_PSRCTL_MCP);
+   wr32(hw, TXGBE_PSRCTL, fctrl);
+
+   return 0;
+}
+
+static int
+txgbe_dev_allmulticast_enable(struct rte_eth_dev *dev)
+{
+   struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+   uint32_t fctrl;
+
+   fctrl = rd32(hw, TXGBE_PSRCTL);
+   fctrl |= TXGBE_PSRCTL_MCP;
+   wr32(hw, TXGBE_PSRCTL, fctrl);
+
+   return 0;
+}
+
+static int
+txgbe_dev_allmulticast_disable(struct rte_eth_dev *dev)
+{
+   struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
+   uint32_t fctrl;
+
+   if (dev->data->promiscuous == 1)
+   return 0; /* must remain in all_multicast mode */
+
+   fctrl = rd32(hw, TXGBE_PSRCTL);
+   fctrl &= (~TXGBE_PSRCTL_MCP);
+   wr32(hw, TXGBE_PSRCTL, fctrl);
+
+   return 0;
+}
+
 /**
  * It clears the interrupt causes and enables the interrupt.
  * It will be called once only during nic initialized.
@@ -3001,6 +3060,10 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {
.dev_set_link_down  = txgbe_dev_set_link_down,
.dev_close  = txgbe_dev_close,
.dev_reset  = txgbe_dev_reset,
+   .promiscuous_enable = txgbe_dev_promiscuous_enable,
+   .promiscuous_disable= txgbe_dev_promiscuous_disable,
+   .allmulticast_enable= txgbe_dev_allmulticast_enable,
+   .allmulticast_disable   = txgbe_dev_allmulticast_disable,
.link_update= txgbe_dev_link_update,
.stats_get  = txgbe_dev_stats_get,
.xstats_get = txgbe_dev_xstats_get,
-- 
2.18.4

[dpdk-dev] [PATCH 3/4] doc: announce modified field in DCB TC queue mapping

[Min Hu (Connor)]

Field type of base and nb_queue will be modified, from uint8_t
to uint16_t  in struct ``rte_eth_dcb_tc_queue_mapping``.As the
data of uint8_t will be truncated when queue number under a TC
is greater than 256.

Signed-off-by: Min Hu (Connor) 
Reviewed-by: Wei Hu (Xavier) 
---
 doc/guides/rel_notes/release_20_11.rst | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/doc/guides/rel_notes/release_20_11.rst 
b/doc/guides/rel_notes/release_20_11.rst
index df227a1..e9c87c3 100644
--- a/doc/guides/rel_notes/release_20_11.rst
+++ b/doc/guides/rel_notes/release_20_11.rst
@@ -100,6 +100,9 @@ ABI Changes
Also, make sure to start the actual text at the margin.
===
 
+* ethdev: Modified field type of base and nb_queue, from uint8_t to uint16_t  
in
+  struct ``rte_eth_dcb_tc_queue_mapping``.As the data of uint8_t will be 
truncated when
+  queue number under a TC is greater than 256.
 
 Known Issues
 
-- 
2.7.4

[dpdk-dev] [PATCH 1/4] ethdev: change data type in TC rxq and TC txq

[Min Hu (Connor)]

From: Huisong Li 

Currently, base and nb_queue in the tc_rxq and tc_txq information
of queue and TC mapping on both TX and RX paths are uint8_t.
However, these datas will be truncated when queue number under a TC
is greater than 256. So it is necessay for base and nb_queue to
change from uint8_t to uint16_t.

Fixes: 01eb53eefeb40e8 ("ethdev: rename folder to library name")
Cc: sta...@dpdk.org

Signed-off-by: Huisong Li 
Signed-off-by: Min Hu (Connor) 
Reviewed-by: Wei Hu (Xavier) 
Reviewed-by: Dongdong Liu 
---
 lib/librte_ethdev/rte_ethdev.h | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index 70295d7..b0114bb 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -1489,13 +1489,13 @@ struct rte_eth_xstat_name {
 struct rte_eth_dcb_tc_queue_mapping {
/** rx queues assigned to tc per Pool */
struct {
-   uint8_t base;
-   uint8_t nb_queue;
+   uint16_t base;
+   uint16_t nb_queue;
} tc_rxq[ETH_MAX_VMDQ_POOL][ETH_DCB_NUM_TCS];
/** rx queues assigned to tc per Pool */
struct {
-   uint8_t base;
-   uint8_t nb_queue;
+   uint16_t base;
+   uint16_t nb_queue;
} tc_txq[ETH_MAX_VMDQ_POOL][ETH_DCB_NUM_TCS];
 };
 
-- 
2.7.4

Re: [dpdk-dev] [PATCH] net: add a new network PMD named txgbe

[jiawenwu]

Hi Ferruh,

Since this patch is too large, it needs to be split into so many small patches, 
which takes a lot of time.
Therefore, I first created a part of patches to contribute. And if there is a 
review problem with these patches, please let me know as soon.
And I will complete the remaining patches in the next 3~4 days.

Thanks.

-Original Message-
From: jiawe...@trustnetic.com  
Sent: Friday, August 21, 2020 10:22 AM
To: 'Ferruh Yigit' ; 'dev@dpdk.org' 
Cc: 'jianw...@trustnetic.com' ; 
'yuhongzh...@trustnetic.com' 
Subject: RE: [PATCH] net: add a new network PMD named txgbe

Hi Ferruh,

Thanks for your suggestion. I'll split the patch into a patchset as soon as 
possible.

-Original Message-
From: Ferruh Yigit  
Sent: Thursday, August 20, 2020 7:49 PM
To: Jiawen Wu ; dev@dpdk.org
Cc: jianw...@trustnetic.com; yuhongzh...@trustnetic.com
Subject: Re: [PATCH] net: add a new network PMD named txgbe

On 8/20/2020 4:02 AM, Jiawen Wu wrote:
> This is a new network PMD named txgbe provides poll mode driver support for 
> Wangxun 10Gb Ethernet NICs.
> 
> Beijing WangXun Technology Co., Ltd. is a high-tech company specializing in 
> the design of high-end integrated circuit chips and providing independent 
> innovation solutions for enterprise network and storage products. Founded in 
> May 2014, the company is headquartered in Beijing YuQuanHuiGu Science and 
> Technology Park, with branches in Hangzhou City. Welcome to reach us on 
> website https://www.net-swift.com.
> 
> This patch is created base on the main branch in main repository. Our goal is 
> to validate and commit txgbe driver into the 20.11 official release, and then 
> continue the development and maintenance in community.
> 
> Waiting for your reviews sincerely.
> 
> Signed-off-by: Jiawen Wu 

Hi Jiawen,

Thanks for the patch.

Without looking into any detail, a very high level comment is, it is very hard 
to review a new PMD (40K+ loc) as a single patch.

Can you please split the patch into multiple patches, which gradually build the 
PMD by adding a feature with each patch, starting from an empty skeleton.

Last as few upstreamed PMDs as example:
ionic:
https://patches.dpdk.org/project/dpdk/list/?series=8206&state=%2A&archive=both

pfe:
https://patches.dpdk.org/project/dpdk/list/?series=6777&state=%2A&archive=both

octeontx2 (one of the good samples I suggest checking):
https://patches.dpdk.org/project/dpdk/list/?series=5302&state=%2A&archive=both


Also you can skip all Makefile build system related changes, since it will be 
removed in this release, no need to spend time for it.

Thanks,
ferruh

[dpdk-dev] [PATCH 4/4] doc: announce modified field in ethdev API

[Min Hu (Connor)]

Field type of stat_idx will be modified, from uint8_t to uint16_t in
"set_queue_stats_mapping", "rte_eth_dev_set_tx_queue_stats_mapping",
"rte_eth_dev_set_rx_queue_stats_mapping" for meeting the needs use 256
or more than 256 queues and display all statistics of rx/tx queue.

Signed-off-by: Min Hu (Connor) 
Reviewed-by: Wei Hu (Xavier) 
---
 doc/guides/rel_notes/release_20_11.rst | 4 
 1 file changed, 4 insertions(+)

diff --git a/doc/guides/rel_notes/release_20_11.rst 
b/doc/guides/rel_notes/release_20_11.rst
index e9c87c3..8e24d46 100644
--- a/doc/guides/rel_notes/release_20_11.rst
+++ b/doc/guides/rel_notes/release_20_11.rst
@@ -84,6 +84,10 @@ API Changes
Also, make sure to start the actual text at the margin.
===
 
+* ethdev: Modified field type of stat_idx, from uint8_t to uint16_t  in
+  ``set_queue_stats_mapping``, ``rte_eth_dev_set_tx_queue_stats_mapping``,
+  ``rte_eth_dev_set_rx_queue_stats_mapping`` for meeting the needs use 256
+  or more than 256 queues and display all statistics of rx/tx queue.
 
 ABI Changes
 ---
-- 
2.7.4

[dpdk-dev] EAL: Failed to hotplug add device

[Dinesh Ramesh]

I am trying to test my application with trex and dpdk l3fwd.
It's like sending the traffic from trex port 0 and it should land on l3fwd
app port 1 and it should reverse the traffic again from port 1 to port 0.
port 0 is ingress and port 1 is egress.
sending the traffic in port 0 from trex, and l3fwd app running on port 1.
To verify the packet is correctly landing on the l3fwd app, I am using
dpdk-pdump. But I am facing the below issue while running the dpdk-pdump

EAL: Failed to hotplug add device
EAL: Error - exiting with code: 1
  Cause: vdev creation failed:create_mp_ring_vdev:770

*l3fwd app logs:*
=
[root@localhost l3fwd]# ./build/l3fwd -c 0x2 -n 1 -- -P -p 0x2
--config="(1,0,1)" --parse-ptype --eth-dest 1,00:0c:29:1a:14:d3
EAL: Detected 4 lcore(s)
EAL: Detected 1 NUMA nodes
EAL: Multi-process socket /var/run/dpdk/rte/mp_socket
EAL: Selected IOVA mode 'PA'
EAL: No available hugepages reported in hugepages-1048576kB
EAL: Probing VFIO support...
EAL: PCI device :03:00.0 on NUMA socket -1
EAL:   Invalid NUMA socket, default to 0
EAL:   probe driver: 15ad:7b0 net_vmxnet3
EAL: PCI device :0b:00.0 on NUMA socket -1
EAL:   Invalid NUMA socket, default to 0
EAL:   probe driver: 15ad:7b0 net_vmxnet3
EAL: PCI device :13:00.0 on NUMA socket -1
EAL:   Invalid NUMA socket, default to 0
EAL:   probe driver: 15ad:7b0 net_vmxnet3
soft parse-ptype is enabled
LPM or EM none selected, default LPM on

Skipping disabled port 0
Initializing port 1 ... Creating queues: nb_rxq=1 nb_txq=1... Port 1
modified RSS hash function based on hardware support,requested:0xa38c
configured:0x104
 Address:00:0C:29:05:6D:E1, Destination:00:0C:29:1A:14:D3, Allocated mbuf
pool on socket 0
LPM: Adding route 198.18.1.0 / 24 (1)
LPM: Adding route 2001:200:0:0:1:: / 48 (1)
txq=1,0,0

Initializing rx queues on lcore 1 ... rxq=1,0,0

Port 1: softly parse packet type info

Checking link statusdone
Port1 Link Up. Speed 1 Mbps -full-duplex
L3FWD: entering main loop on lcore 1
L3FWD:  -- lcoreid=1 portid=1 rxqueueid=0
EAL: failed to parse device "vdev:net_pcap_rx_0"
EAL: Failed to hotplug add device on primary

*dpdk-pdumo logs:*
*=*

[root@localhost dpdk-19.11]# ./build/app/dpdk-pdump -- --pdump
'port=1,queue=*,rx-dev=/tmp/capture.pcap'
EAL: Detected 4 lcore(s)
EAL: Detected 1 NUMA nodes
EAL: Multi-process socket /var/run/dpdk/rte/mp_socket_23775_af66fc548a2ec
EAL: Selected IOVA mode 'PA'
EAL: Probing VFIO support...
EAL: PCI device :03:00.0 on NUMA socket -1
EAL:   Invalid NUMA socket, default to 0
EAL:   probe driver: 15ad:7b0 net_vmxnet3
EAL: PCI device :0b:00.0 on NUMA socket -1
EAL:   Invalid NUMA socket, default to 0
EAL:   probe driver: 15ad:7b0 net_vmxnet3
EAL: PCI device :13:00.0 on NUMA socket -1
EAL:   Invalid NUMA socket, default to 0
EAL:   probe driver: 15ad:7b0 net_vmxnet3
EAL: Failed to hotplug add device
EAL: Error - exiting with code: 1
  Cause: vdev creation failed:create_mp_ring_vdev:770
[root@localhost dpdk-19.11]#

Can you please help me on this and what i am missing here.

Thanks,
DR

[dpdk-dev] [PATCH 2/4] ethdev: fix compiling errors for per-queue statistics

[Min Hu (Connor)]

From: Huisong Li 

Currently, only statistics of rx/tx queues with queue_id less than
RTE_ETHDEV_QUEUE_STAT_CNTRS can be displayed. If there is a certain
application scenario that it needs to use 256 or more than 256 queues
and display all statistics of rx/tx queue. At this moment, we have to
change the macro to be equaled to the queue number.

However, modifying the macro to be greater than 256 will trigger
many errors and warnings from test-pmd, PMD driver and librte_ethdev
during compiling dpdk project. But it is possible and permited that
rx/tx queue number is greater than 256 and all statistics of rx/tx
queue need to be displayed. In addition, the data type of rx/tx queue
number in rte_eth_dev_configure API is 'uint16_t'. So It is unreasonable
to use the 'uint8_t' type for variables that control which per-queue
statistics can be displayed.

Fixes: ed30d9b691b2 ("app/testpmd: add stats per queue")
Fixes: 09c7e63a71f9 ("net/memif: introduce memory interface PMD")
Fixes: abf7275bbaa2 ("ixgbe: move to drivers/net/")
Fixes: e6defdfddc3b ("net/igc: enable statistics")
Fixes: 2265e4b4e84b ("net/octeontx2: add basic stats operation")
Fixes: 6c3169a3dc04 ("virtio: move to drivers/net/")
Cc: sta...@dpdk.org

Signed-off-by: Huisong Li 
Signed-off-by: Min Hu (Connor) 
Reviewed-by: Wei Hu (Xavier) 
Reviewed-by: Dongdong Liu 
---
 app/test-pmd/cmdline.c  | 2 +-
 app/test-pmd/config.c   | 4 ++--
 app/test-pmd/testpmd.c  | 2 +-
 app/test-pmd/testpmd.h  | 5 +++--
 drivers/net/igc/igc_ethdev.c| 4 ++--
 drivers/net/ixgbe/ixgbe_ethdev.c| 4 ++--
 drivers/net/memif/rte_eth_memif.c   | 2 +-
 drivers/net/octeontx2/otx2_ethdev.h | 2 +-
 drivers/net/octeontx2/otx2_stats.c  | 2 +-
 drivers/net/virtio/virtio_ethdev.c  | 4 ++--
 lib/librte_ethdev/rte_ethdev.c  | 6 +++---
 lib/librte_ethdev/rte_ethdev.h  | 4 ++--
 lib/librte_ethdev/rte_ethdev_core.h | 2 +-
 13 files changed, 22 insertions(+), 21 deletions(-)

diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c
index 0a6ed85..40b6b17 100644
--- a/app/test-pmd/cmdline.c
+++ b/app/test-pmd/cmdline.c
@@ -8244,7 +8244,7 @@ struct cmd_set_qmap_result {
cmdline_fixed_string_t what;
portid_t port_id;
uint16_t queue_id;
-   uint8_t map_value;
+   uint16_t map_value;
 };
 
 static void
diff --git a/app/test-pmd/config.c b/app/test-pmd/config.c
index 30bee33..9e7526d 100644
--- a/app/test-pmd/config.c
+++ b/app/test-pmd/config.c
@@ -160,7 +160,7 @@ nic_stats_display(portid_t port_id)
uint64_t mpps_rx, mpps_tx, mbps_rx, mbps_tx;
struct rte_eth_stats stats;
struct rte_port *port = &ports[port_id];
-   uint8_t i;
+   uint16_t i;
 
static const char *nic_stats_border = "";
 
@@ -3623,7 +3623,7 @@ tx_vlan_pvid_set(portid_t port_id, uint16_t vlan_id, int 
on)
 }
 
 void
-set_qmap(portid_t port_id, uint8_t is_rx, uint16_t queue_id, uint8_t map_value)
+set_qmap(portid_t port_id, uint8_t is_rx, uint16_t queue_id, uint16_t 
map_value)
 {
uint16_t i;
uint8_t existing_mapping_found = 0;
diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c
index 7842c3b..d5503bc 100644
--- a/app/test-pmd/testpmd.c
+++ b/app/test-pmd/testpmd.c
@@ -1835,7 +1835,7 @@ fwd_stats_display(void)
 #endif
}
for (i = 0; i < cur_fwd_config.nb_fwd_ports; i++) {
-   uint8_t j;
+   uint16_t j;
 
pt_id = fwd_ports_ids[i];
port = &ports[pt_id];
diff --git a/app/test-pmd/testpmd.h b/app/test-pmd/testpmd.h
index 25a12b1..4ac87b0 100644
--- a/app/test-pmd/testpmd.h
+++ b/app/test-pmd/testpmd.h
@@ -285,7 +285,7 @@ enum dcb_mode_enable
 struct queue_stats_mappings {
portid_t port_id;
uint16_t queue_id;
-   uint8_t stats_counter_id;
+   uint16_t stats_counter_id;
 } __rte_cache_aligned;
 
 extern struct queue_stats_mappings tx_queue_stats_mappings_array[];
@@ -768,7 +768,8 @@ void tx_qinq_set(portid_t port_id, uint16_t vlan_id, 
uint16_t vlan_id_outer);
 void tx_vlan_reset(portid_t port_id);
 void tx_vlan_pvid_set(portid_t port_id, uint16_t vlan_id, int on);
 
-void set_qmap(portid_t port_id, uint8_t is_rx, uint16_t queue_id, uint8_t 
map_value);
+void set_qmap(portid_t port_id, uint8_t is_rx, uint16_t queue_id,
+ uint16_t map_value);
 
 void set_xstats_hide_zero(uint8_t on_off);
 
diff --git a/drivers/net/igc/igc_ethdev.c b/drivers/net/igc/igc_ethdev.c
index 6ab3ee9..7211505 100644
--- a/drivers/net/igc/igc_ethdev.c
+++ b/drivers/net/igc/igc_ethdev.c
@@ -221,7 +221,7 @@ static int eth_igc_xstats_get_names_by_id(struct 
rte_eth_dev *dev,
 static int eth_igc_xstats_reset(struct rte_eth_dev *dev);
 static int
 eth_igc_queue_stats_mapping_set(struct rte_eth_dev *dev,
-   uint16_t queue_id, uint8_t stat_idx, uint8_t is_rx);
+   uint16_t queue_id, uint16_t stat_idx, uint8_t is_rx);
 static int
 eth_igc_rx_queue_intr_disable(struct rte_eth_de

[dpdk-dev] [PATCH 0/4] Add Marvell OCTEON TX2 regex driver

[guyk]

From: Guy Kaneti 

This patchset adds support for OCTEON TX2 regex driver as DPDK regexdev.
The driver implements the API defined in the regexdev lib.

Guy Kaneti (4):
  common/octeontx2: add REE definitions and logging support
  regex/octeontx2: add build infra and device support
  usertools: add octeontx2 REE device binding
  doc: add Marvell OCTEON TX2 regex guide

 MAINTAINERS   |3 +
 config/common_base|6 +
 doc/guides/platform/octeontx2.rst |5 +
 doc/guides/regexdevs/features/octeontx2.ini   |   10 +
 doc/guides/regexdevs/index.rst|1 +
 doc/guides/regexdevs/octeontx2.rst|   49 +
 doc/guides/rel_notes/release_20_11.rst|5 +
 drivers/common/octeontx2/hw/otx2_ree.h|   27 +
 drivers/common/octeontx2/hw/otx2_rvu.h|5 +
 drivers/common/octeontx2/otx2_common.c|1 +
 drivers/common/octeontx2/otx2_common.h|5 +
 drivers/common/octeontx2/otx2_mbox.h  |  103 ++
 .../rte_common_octeontx2_version.map  |1 +
 drivers/regex/meson.build |2 +-
 drivers/regex/octeontx2/meson.build   |   53 +
 drivers/regex/octeontx2/otx2_regexdev.c   | 1001 +
 drivers/regex/octeontx2/otx2_regexdev.h   |  109 ++
 .../regex/octeontx2/otx2_regexdev_compiler.c  |  229 
 .../regex/octeontx2/otx2_regexdev_compiler.h  |   11 +
 .../regex/octeontx2/otx2_regexdev_hw_access.c |  167 +++
 .../regex/octeontx2/otx2_regexdev_hw_access.h |  202 
 drivers/regex/octeontx2/otx2_regexdev_mbox.c  |  401 +++
 drivers/regex/octeontx2/otx2_regexdev_mbox.h  |   38 +
 .../rte_pmd_octeontx2_regex_version.map   |3 +
 meson_options.txt |2 +
 usertools/dpdk-devbind.py |8 +
 26 files changed, 2446 insertions(+), 1 deletion(-)
 create mode 100644 doc/guides/regexdevs/features/octeontx2.ini
 create mode 100644 doc/guides/regexdevs/octeontx2.rst
 create mode 100644 drivers/common/octeontx2/hw/otx2_ree.h
 create mode 100644 drivers/regex/octeontx2/meson.build
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev.c
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev.h
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev_compiler.c
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev_compiler.h
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev_hw_access.c
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev_hw_access.h
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev_mbox.c
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev_mbox.h
 create mode 100644 drivers/regex/octeontx2/rte_pmd_octeontx2_regex_version.map

-- 
2.28.0

[dpdk-dev] [PATCH 1/4] common/octeontx2: add REE definitions and logging support

[guyk]

From: Guy Kaneti 

Add REE mbox msg definitions, RVU and REE HW definitions

Signed-off-by: Guy Kaneti 
---
 drivers/common/octeontx2/hw/otx2_ree.h|  27 +
 drivers/common/octeontx2/hw/otx2_rvu.h|   5 +
 drivers/common/octeontx2/otx2_common.c|   1 +
 drivers/common/octeontx2/otx2_common.h|   5 +
 drivers/common/octeontx2/otx2_mbox.h  | 103 ++
 .../rte_common_octeontx2_version.map  |   1 +
 6 files changed, 142 insertions(+)
 create mode 100644 drivers/common/octeontx2/hw/otx2_ree.h

diff --git a/drivers/common/octeontx2/hw/otx2_ree.h 
b/drivers/common/octeontx2/hw/otx2_ree.h
new file mode 100644
index 0..b7481f125
--- /dev/null
+++ b/drivers/common/octeontx2/hw/otx2_ree.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright (C) 2020 Marvell International Ltd.
+ */
+
+#ifndef __OTX2_REE_HW_H__
+#define __OTX2_REE_HW_H__
+
+/* REE BAR0*/
+#define REE_AF_REEXM_MAX_MATCH (0x80c8)
+
+/* REE BAR02 */
+#define REE_LF_MISC_INT (0x300)
+#define REE_LF_DONE_INT (0x120)
+
+#define REE_AF_QUEX_GMCTL(a)(0x800 | (a) << 3)
+
+#define REE_AF_INT_VEC_RAS  (0x0ull)
+#define REE_AF_INT_VEC_RVU  (0x1ull)
+#define REE_AF_INT_VEC_QUE_DONE (0x2ull)
+#define REE_AF_INT_VEC_AQ   (0x3ull)
+
+/* ENUMS */
+
+#define REE_LF_INT_VEC_QUE_DONE(0x0ull)
+#define REE_LF_INT_VEC_MISC(0x1ull)
+
+#endif /* __OTX2_REE_HW_H__*/
diff --git a/drivers/common/octeontx2/hw/otx2_rvu.h 
b/drivers/common/octeontx2/hw/otx2_rvu.h
index 330bfb37f..072515207 100644
--- a/drivers/common/octeontx2/hw/otx2_rvu.h
+++ b/drivers/common/octeontx2/hw/otx2_rvu.h
@@ -130,6 +130,7 @@
 #define RVU_BLOCK_TYPE_RAD  (0xdull)
 #define RVU_BLOCK_TYPE_DFA  (0xeull)
 #define RVU_BLOCK_TYPE_HNA  (0xfull)
+#define RVU_BLOCK_TYPE_REE  (0xeull)
 
 #define RVU_BLOCK_ADDR_RVUM (0x0ull)
 #define RVU_BLOCK_ADDR_LMT  (0x1ull)
@@ -146,6 +147,8 @@
 #define RVU_BLOCK_ADDR_NDC2 (0xeull)
 #define RVU_BLOCK_ADDR_R_END(0x1full)
 #define RVU_BLOCK_ADDR_R_START  (0x14ull)
+#define RVU_BLOCK_ADDR_REE0 (0x14ull)
+#define RVU_BLOCK_ADDR_REE1 (0x15ull)
 
 #define RVU_VF_INT_VEC_MBOX (0x0ull)
 
@@ -167,6 +170,7 @@
 #define NPA_AF_BAR2_SEL(0x900ull)
 #define CPT_AF_BAR2_SEL(0x900ull)
 #define RVU_AF_BAR2_SEL(0x900ull)
+#define REE_AF_BAR2_SEL(0x900ull)
 
 #define AF_BAR2_ALIASX(a, b) \
(0x910ull | (uint64_t)(a) << 12 | (uint64_t)(b))
@@ -177,6 +181,7 @@
 #define NPA_AF_BAR2_ALIASX(a, b)   AF_BAR2_ALIASX(0, b)
 #define CPT_AF_BAR2_ALIASX(a, b)   AF_BAR2_ALIASX(a, b)
 #define RVU_AF_BAR2_ALIASX(a, b)   AF_BAR2_ALIASX(a, b)
+#define REE_AF_BAR2_ALIASX(a, b)   AF_BAR2_ALIASX(a, b)
 
 /* Structures definitions */
 
diff --git a/drivers/common/octeontx2/otx2_common.c 
b/drivers/common/octeontx2/otx2_common.c
index b292e999a..d23c50242 100644
--- a/drivers/common/octeontx2/otx2_common.c
+++ b/drivers/common/octeontx2/otx2_common.c
@@ -213,3 +213,4 @@ RTE_LOG_REGISTER(otx2_logtype_sso, pmd.event.octeontx2, 
NOTICE);
 RTE_LOG_REGISTER(otx2_logtype_tim, pmd.event.octeontx2.timer, NOTICE);
 RTE_LOG_REGISTER(otx2_logtype_dpi, pmd.raw.octeontx2.dpi, NOTICE);
 RTE_LOG_REGISTER(otx2_logtype_ep, pmd.raw.octeontx2.ep, NOTICE);
+RTE_LOG_REGISTER(otx2_logtype_ree, pmd.regex.octeontx2, NOTICE);
diff --git a/drivers/common/octeontx2/otx2_common.h 
b/drivers/common/octeontx2/otx2_common.h
index 2168cde4d..b6779f710 100644
--- a/drivers/common/octeontx2/otx2_common.h
+++ b/drivers/common/octeontx2/otx2_common.h
@@ -21,6 +21,7 @@
 #include "hw/otx2_sso.h"
 #include "hw/otx2_ssow.h"
 #include "hw/otx2_tim.h"
+#include "hw/otx2_ree.h"
 
 /* Alignment */
 #define OTX2_ALIGN  128
@@ -96,6 +97,7 @@ extern int otx2_logtype_tm;
 extern int otx2_logtype_tim;
 extern int otx2_logtype_dpi;
 extern int otx2_logtype_ep;
+extern int otx2_logtype_ree;
 
 #define otx2_err(fmt, args...) \
RTE_LOG(ERR, PMD, "%s():%u " fmt "\n",  \
@@ -119,6 +121,7 @@ extern int otx2_logtype_ep;
 #define otx2_tim_dbg(fmt, ...) otx2_dbg(tim, fmt, ##__VA_ARGS__)
 #define otx2_dpi_dbg(fmt, ...) otx2_dbg(dpi, fmt, ##__VA_ARGS__)
 #define otx2_sdp_dbg(fmt, ...) otx2_dbg(ep, fmt, ##__VA_ARGS__)
+#define otx2_ree_dbg(fmt, ...) otx2_dbg(ree, fmt, ##__VA_ARGS__)
 
 /* PCI IDs */
 #define PCI_VENDOR_ID_CAVIUM   0x177D
@@ -136,6 +139,8 @@ extern int otx2_logtype_ep;
 #define PCI_DEVID_OCTEONTX2_EP_VF  0xB203 /* OCTEON TX2 EP mode */
 #define PCI_DEVID_OCTEONTX2_RVU_SDP_PF 0xA0f6
 #define PCI_DEVID_OCTEONTX2_RVU_SDP_VF 0xA0f7
+#define PCI_DEVID_OCTEONTX2_RVU

[dpdk-dev] [PATCH 2/4] regex/octeontx2: add build infra and device support

[guyk]

From: Guy Kaneti 

Add meson based build infrastructure along with the
OTX2 regexdev (REE) device functions.

For regex rule compiler support build:
meson configure -Dree_compiler_sdk=

Signed-off-by: Guy Kaneti 
---
 MAINTAINERS   |3 +
 config/common_base|6 +
 drivers/regex/meson.build |2 +-
 drivers/regex/octeontx2/meson.build   |   53 +
 drivers/regex/octeontx2/otx2_regexdev.c   | 1001 +
 drivers/regex/octeontx2/otx2_regexdev.h   |  109 ++
 .../regex/octeontx2/otx2_regexdev_compiler.c  |  229 
 .../regex/octeontx2/otx2_regexdev_compiler.h  |   11 +
 .../regex/octeontx2/otx2_regexdev_hw_access.c |  167 +++
 .../regex/octeontx2/otx2_regexdev_hw_access.h |  202 
 drivers/regex/octeontx2/otx2_regexdev_mbox.c  |  401 +++
 drivers/regex/octeontx2/otx2_regexdev_mbox.h  |   38 +
 .../rte_pmd_octeontx2_regex_version.map   |3 +
 meson_options.txt |2 +
 14 files changed, 2226 insertions(+), 1 deletion(-)
 create mode 100644 drivers/regex/octeontx2/meson.build
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev.c
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev.h
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev_compiler.c
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev_compiler.h
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev_hw_access.c
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev_hw_access.h
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev_mbox.c
 create mode 100644 drivers/regex/octeontx2/otx2_regexdev_mbox.h
 create mode 100644 drivers/regex/octeontx2/rte_pmd_octeontx2_regex_version.map

diff --git a/MAINTAINERS b/MAINTAINERS
index ed163f5d5..ab8a9313c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1137,6 +1137,9 @@ F: drivers/regex/mlx5/
 F: doc/guides/regexdevs/mlx5.rst
 F: doc/guides/regexdevs/features/mlx5.ini
 
+Marvell OCTEON TX2 regex
+M: Guy Kaneti 
+F: drivers/regex/octeontx2/
 
 vDPA Drivers
 
diff --git a/config/common_base b/config/common_base
index fbf0ee70c..2cd687bf6 100644
--- a/config/common_base
+++ b/config/common_base
@@ -842,6 +842,12 @@ CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EP_RAWDEV=y
 #
 CONFIG_RTE_LIBRTE_PMD_NTB_RAWDEV=y
 
+#
+# Compile PMD for Octeontx2 REE regex device
+#
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_REGEX=y
+CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_REGEX_COMPILER=n
+
 #
 # Compile librte_ring
 #
diff --git a/drivers/regex/meson.build b/drivers/regex/meson.build
index 8edeba3a0..79bb5d5df 100644
--- a/drivers/regex/meson.build
+++ b/drivers/regex/meson.build
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright 2020 Mellanox Technologies, Ltd
 
-drivers = ['mlx5']
+drivers = ['mlx5', 'octeontx2']
 std_deps = ['ethdev', 'kvargs'] # 'ethdev' also pulls in mbuf, net, eal etc
 config_flag_fmt = 'RTE_LIBRTE_@0@_PMD'
 driver_name_fmt = 'rte_pmd_@0@'
diff --git a/drivers/regex/octeontx2/meson.build 
b/drivers/regex/octeontx2/meson.build
new file mode 100644
index 0..c212e3d43
--- /dev/null
+++ b/drivers/regex/octeontx2/meson.build
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(C) 2020 Marvell International Ltd.
+#
+
+if not is_linux
+   build = false
+   reason = 'only supported on Linux'
+endif
+
+path = get_option('ree_compiler_sdk')
+lib_dir = path + '/lib'
+inc_dir = path + '/include'
+
+if dpdk_conf.has('RTE_LIBRTE_PMD_OCTEONTX2_REGEX_COMPILER')
+   lib = cc.find_library('librxp_compiler', dirs : [lib_dir], required: 
false)
+   if not lib.found()
+   build = false
+   reason = 'missing dependency, "librxp_compiler"'
+   else
+   ext_deps += lib
+   ext_deps += cc.find_library('libstdc++', required: true)
+   includes += include_directories(inc_dir)
+   cflags += ['-DREE_COMPILER_SDK']
+   endif
+endif
+
+sources = files('otx2_regexdev.c',
+   'otx2_regexdev_hw_access.c',
+   'otx2_regexdev_mbox.c',
+   'otx2_regexdev_compiler.c'
+   )
+
+extra_flags = []
+# This integrated controller runs only on a arm64 machine, remove 32bit 
warnings
+if not dpdk_conf.get('RTE_ARCH_64')
+   extra_flags += ['-Wno-int-to-pointer-cast', '-Wno-pointer-to-int-cast']
+endif
+
+# for clang 32-bit compiles we need libatomic for 64-bit atomic ops
+if cc.get_id() == 'clang' and dpdk_conf.get('RTE_ARCH_64') == false
+   ext_deps += cc.find_library('atomic')
+endif
+
+foreach flag: extra_flags
+   if cc.has_argument(flag)
+   cflags += flag
+   endif
+endforeach
+
+name = 'octeontx2_regex'
+deps += ['bus_pci', 'common_octeontx2', 'regexdev']
+
+includes += include_directories('../../common/octeontx2')
diff --git a/drivers/regex/octeontx2/otx2_regexdev.c 
b/drivers/regex/octeontx2/otx2_regexdev.c
new file mode 100644
index 0..2aebd0138
--- /dev/null

[dpdk-dev] [PATCH 3/4] usertools: add octeontx2 REE device binding

[guyk]

From: Guy Kaneti 

Update the devbind script with new section of regex devices, also
added OCTEONTX2 REE device ID to regex device list

Signed-off-by: Guy Kaneti 
---
 usertools/dpdk-devbind.py | 8 
 1 file changed, 8 insertions(+)

diff --git a/usertools/dpdk-devbind.py b/usertools/dpdk-devbind.py
index 86b6b53c4..51ee990db 100755
--- a/usertools/dpdk-devbind.py
+++ b/usertools/dpdk-devbind.py
@@ -44,6 +44,8 @@
   'SVendor': None, 'SDevice': None}
 octeontx2_dma = {'Class': '08', 'Vendor': '177d', 'Device': 'a081',
   'SVendor': None, 'SDevice': None}
+octeontx2_ree = {'Class': '08', 'Vendor': '177d', 'Device': 'a0f4',
+  'SVendor': None, 'SDevice': None}
 
 intel_ioat_bdw = {'Class': '08', 'Vendor': '8086', 'Device': 
'6f20,6f21,6f22,6f23,6f24,6f25,6f26,6f27,6f2e,6f2f',
   'SVendor': None, 'SDevice': None}
@@ -61,6 +63,7 @@
 mempool_devices = [cavium_fpa, octeontx2_npa]
 compress_devices = [cavium_zip]
 misc_devices = [intel_ioat_bdw, intel_ioat_skx, intel_ioat_icx, intel_ntb_skx, 
octeontx2_dma]
+regex_devices = [octeontx2_ree]
 
 # global dict ethernet devices present. Dictionary indexed by PCI address.
 # Each device within this is itself a dictionary of device properties
@@ -648,6 +651,9 @@ def show_status():
 if status_dev == "misc" or status_dev == "all":
 show_device_status(misc_devices, "Misc (rawdev)")
 
+if status_dev == "regex" or status_dev == "all":
+show_device_status(regex_devices, "Regex")
+
 def parse_args():
 '''Parses the command-line arguments given by the user and takes the
 appropriate action for each'''
@@ -723,6 +729,7 @@ def do_arg_actions():
 get_device_details(mempool_devices)
 get_device_details(compress_devices)
 get_device_details(misc_devices)
+get_device_details(regex_devices)
 show_status()
 
 
@@ -744,6 +751,7 @@ def main():
 get_device_details(mempool_devices)
 get_device_details(compress_devices)
 get_device_details(misc_devices)
+get_device_details(regex_devices)
 do_arg_actions()
 
 if __name__ == "__main__":
-- 
2.28.0

[dpdk-dev] [PATCH 4/4] doc: add Marvell OCTEON TX2 regex guide

[guyk]

From: Guy Kaneti 

Signed-off-by: Guy Kaneti 
---
 doc/guides/platform/octeontx2.rst   |  5 +++
 doc/guides/regexdevs/features/octeontx2.ini | 10 +
 doc/guides/regexdevs/index.rst  |  1 +
 doc/guides/regexdevs/octeontx2.rst  | 49 +
 doc/guides/rel_notes/release_20_11.rst  |  5 +++
 5 files changed, 70 insertions(+)
 create mode 100644 doc/guides/regexdevs/features/octeontx2.ini
 create mode 100644 doc/guides/regexdevs/octeontx2.rst

diff --git a/doc/guides/platform/octeontx2.rst 
b/doc/guides/platform/octeontx2.rst
index 13255eec5..c4d64ab4b 100644
--- a/doc/guides/platform/octeontx2.rst
+++ b/doc/guides/platform/octeontx2.rst
@@ -67,6 +67,8 @@ DPDK subsystem.
+---+-+--+
| 9 | SDP | rte_ethdev   |
+---+-+--+
+   | 10| REE | rte_regexdev |
+   +---+-+--+
 
 PF0 is called the administrative / admin function (AF) and has exclusive
 privileges to provision RVU functional block's LFs to each of the PF/VF.
@@ -156,6 +158,9 @@ This section lists dataplane H/W block(s) available in 
OCTEON TX2 SoC.
 #. **Crypto Device Driver**
See :doc:`../cryptodevs/octeontx2` for CPT crypto device driver information.
 
+#. **Regex Device Driver**
+   See :doc:`../regexdevs/octeontx2` for REE regex device driver information.
+
 Procedure to Setup Platform
 ---
 
diff --git a/doc/guides/regexdevs/features/octeontx2.ini 
b/doc/guides/regexdevs/features/octeontx2.ini
new file mode 100644
index 0..c9b421a16
--- /dev/null
+++ b/doc/guides/regexdevs/features/octeontx2.ini
@@ -0,0 +1,10 @@
+;
+; Supported features of the 'octeontx2' regex driver.
+;
+; Refer to default.ini for the full list of available driver features.
+;
+[Features]
+PCRE back reference = Y
+PCRE word boundary  = Y
+Run time compilation= Y
+Armv8   = Y
diff --git a/doc/guides/regexdevs/index.rst b/doc/guides/regexdevs/index.rst
index 49216a932..b1abc826b 100644
--- a/doc/guides/regexdevs/index.rst
+++ b/doc/guides/regexdevs/index.rst
@@ -13,3 +13,4 @@ which can be used from an application through RegEx API.
 
features_overview
mlx5
+   octeontx2
diff --git a/doc/guides/regexdevs/octeontx2.rst 
b/doc/guides/regexdevs/octeontx2.rst
new file mode 100644
index 0..859780da1
--- /dev/null
+++ b/doc/guides/regexdevs/octeontx2.rst
@@ -0,0 +1,49 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright(c) 2020 Marvell International Ltd.
+
+OCTEON TX2 REE Regexdev Driver
+===
+
+The OCTEON TX2 REE PMD (**librte_pmd_octeontx2_regex**) provides poll mode
+regexdev driver support for the inbuilt regex device found in the **Marvell 
OCTEON TX2**
+SoC family.
+
+More information about OCTEON TX2 SoC can be found at `Marvell Official Website
+`_.
+
+Features
+
+
+Features of the OCTEON TX2 REE PMD are:
+
+- 36 queues
+- Up to 254 matches for each regex operation
+
+Prerequisites and Compilation procedure
+---
+
+   See :doc:`../platform/octeontx2` for setup information.
+
+Device Setup
+
+
+The OCTEON TX2 REE devices will need to be bound to a user-space IO driver
+for use. The script ``dpdk-devbind.py`` script included with DPDK can be
+used to view the state of the devices and to bind them to a suitable
+DPDK-supported kernel driver. When querying the status of the devices,
+they will appear under the category of "REGEX devices", i.e. the command
+``dpdk-devbind.py --status-dev regex`` can be used to see the state of
+those devices alone.
+
+Debugging Options
+-
+
+.. _table_octeontx2_regex_debug_options:
+
+.. table:: OCTEON TX2 regex device debug options
+
+   +---++---+
+   | # | Component  | EAL log command   |
+   +===++===+
+   | 1 | REE| --log-level='pmd\.regex\.octeontx2,8' |
+   +---++---+
diff --git a/doc/guides/rel_notes/release_20_11.rst 
b/doc/guides/rel_notes/release_20_11.rst
index df227a177..05c0a8ba7 100644
--- a/doc/guides/rel_notes/release_20_11.rst
+++ b/doc/guides/rel_notes/release_20_11.rst
@@ -55,6 +55,11 @@ New Features
  Also, make sure to start the actual text at the margin.
  ===
 
+* **Added Marvell OCTEON TX2 regex PMD.**
+
+  Added a new PMD driver for hardware regex offload block for OCTEON TX2 SoC.
+
+  See the :doc:`../regexdevs

Re: [dpdk-dev] 19.11.4 patches review and test

[Christian Ehrhardt]

On Tue, Sep 1, 2020 at 10:30 AM Luca Boccassi  wrote:
>
> On Tue, 2020-08-18 at 19:12 +0100, Luca Boccassi wrote:
> > Hi all,
> >
> > Here is a list of patches targeted for stable release 19.11.4.
> >
> > The planned date for the final release is August 31st.
> >
> > Please help with testing and validation of your use cases and report
> > any issues/results with reply-all to this mail. For the final release
> > the fixes and reported validations will be added to the release notes.
> >
> > A release candidate tarball can be found at:
> >
> > https://dpdk.org/browse/dpdk-stable/tag/?id=v19.11.4-rc1
> >
> > These patches are located at branch 19.11 of dpdk-stable repo:
> > https://dpdk.org/browse/dpdk-stable/
> >
> > Thanks.
> >
> > Luca Boccassi
>
> Microsoft's regression tests are still running, delaying until Thursday
> the 3rd. Apologies for any inconvenience.

Due to report on OVS failing to build I happened to find that 19.11.4
has massively changed linking.
=> https://paste.ubuntu.com/p/znCRR4gpjP/

This was meant to be helpful for sure and I assume is around:
48f7fd27f6 build/pkg-config: prevent overlinking
2d1535d592 build/pkg-config: improve static linking flags
9fb13a12c1 build/pkg-config: output drivers first for static build
59b108d824 build/pkg-config: move pkg-config file creation
aea915e944 devtools: test static linkage with pkg-config

But overlinking has effectively become underlinking now
https://launchpadlibrarian.net/495845224/buildlog_ubuntu-groovy-amd64.openvswitch_2.13.1-0ubuntu2~ppa1_BUILDING.txt.gz

/usr/bin/ld: 
/usr/lib/gcc/x86_64-linux-gnu/10/../../../x86_64-linux-gnu/librte_pmd_ring.a(net_ring_rte_eth_ring.c.o):
in function `rte_eth_from_rings':
(.text+0x91c): undefined reference to `rte_vdev_init'
/usr/bin/ld: 
/usr/lib/gcc/x86_64-linux-gnu/10/../../../x86_64-linux-gnu/librte_pmd_ring.a(net_ring_rte_eth_ring.c.o):
in function `vdrvinitfn_pmd_ring_drv':
(.text.startup+0x28): undefined reference to `rte_vdev_register'
collect2: error: ld returned 1 exit status

Also as you can see in the pastebin above, CFlags and Libs massively
shrunk and likely too much so.

Given that this should be a stable release I'd ask to back out those
changes so that a test build creates the same .pc file as before -
would that make sense?


> --
> Kind regards,
> Luca Boccassi



-- 
Christian Ehrhardt
Staff Engineer, Ubuntu Server
Canonical Ltd

[dpdk-dev] [PATCH v6 2/8] net/dpaa: add VSP support in FMLIB

[Hemant Agrawal]

From: Jun Yang 

This patch adds support for VSP (Virtual Storage Profile)
in fmlib routines.
VSP allow a network interface to be divided into physical
and virtual instance(s).
The concept is very similar to SRIOV.

Signed-off-by: Jun Yang 
Acked-by: Hemant Agrawal 
---
 doc/guides/nics/dpaa.rst|   8 ++
 drivers/net/dpaa/fmlib/fm_vsp.c | 148 
 drivers/net/dpaa/fmlib/fm_vsp_ext.h | 131 
 drivers/net/dpaa/meson.build|   1 +
 4 files changed, 288 insertions(+)
 create mode 100644 drivers/net/dpaa/fmlib/fm_vsp.c
 create mode 100644 drivers/net/dpaa/fmlib/fm_vsp_ext.h

diff --git a/doc/guides/nics/dpaa.rst b/doc/guides/nics/dpaa.rst
index 7e6010471..c4bfcd09a 100644
--- a/doc/guides/nics/dpaa.rst
+++ b/doc/guides/nics/dpaa.rst
@@ -335,6 +335,14 @@ FMLIB
as well. This helps in overcoming the main limitaiton of FMC - i.e. lack
of dynamic configuration.
 
+VSP (Virtual Storage Profile)
+~
+   The storage profiled are means to provide virtualized interface. A ranges of
+   storage profiles cab be associated to Ethernet ports.
+   They are selected during classification. Specify how the frame should be
+   written to memory and which buffer pool to select for packet storange in
+   queues. Start and End margin of buffer can also be configured.
+
 Limitations
 ---
 
diff --git a/drivers/net/dpaa/fmlib/fm_vsp.c b/drivers/net/dpaa/fmlib/fm_vsp.c
new file mode 100644
index 0..78efd93f2
--- /dev/null
+++ b/drivers/net/dpaa/fmlib/fm_vsp.c
@@ -0,0 +1,148 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2019-2020 NXP
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include "fm_ext.h"
+#include "fm_pcd_ext.h"
+#include "fm_port_ext.h"
+#include "fm_vsp_ext.h"
+#include 
+
+uint32_t
+fm_port_vsp_alloc(t_handle h_fm_port,
+ t_fm_port_vspalloc_params *p_params)
+{
+   t_device *p_dev = (t_device *)h_fm_port;
+   ioc_fm_port_vsp_alloc_params_t params;
+
+   _fml_dbg("Calling...\n");
+   memset(¶ms, 0, sizeof(ioc_fm_port_vsp_alloc_params_t));
+   memcpy(¶ms.params, p_params, sizeof(t_fm_port_vspalloc_params));
+
+   if (ioctl(p_dev->fd, FM_PORT_IOC_VSP_ALLOC, ¶ms))
+   RETURN_ERROR(MINOR, E_INVALID_OPERATION, NO_MSG);
+
+   _fml_dbg("Called.\n");
+
+   return E_OK;
+}
+
+t_handle
+fm_vsp_config(t_fm_vsp_params *p_fm_vsp_params)
+{
+   t_device *p_dev = NULL;
+   t_device *p_vsp_dev = NULL;
+   ioc_fm_vsp_params_t param;
+
+   p_dev = p_fm_vsp_params->h_fm;
+
+   _fml_dbg("Performing VSP Configuration...\n");
+
+   memset(¶m, 0, sizeof(ioc_fm_vsp_params_t));
+   memcpy(¶m, p_fm_vsp_params, sizeof(t_fm_vsp_params));
+   param.vsp_params.h_fm = UINT_TO_PTR(p_dev->id);
+   param.id = NULL;
+
+   if (ioctl(p_dev->fd, FM_IOC_VSP_CONFIG, ¶m)) {
+   DPAA_PMD_ERR("%s ioctl error\n", __func__);
+   return NULL;
+   }
+
+   p_vsp_dev = (t_device *)malloc(sizeof(t_device));
+   if (!p_vsp_dev) {
+   DPAA_PMD_ERR("FM VSP Params!\n");
+   return NULL;
+   }
+   memset(p_vsp_dev, 0, sizeof(t_device));
+   p_vsp_dev->h_user_priv = (t_handle)p_dev;
+   p_dev->owners++;
+   p_vsp_dev->id = PTR_TO_UINT(param.id);
+
+   _fml_dbg("VSP Configuration completed\n");
+
+   return (t_handle)p_vsp_dev;
+}
+
+uint32_t
+fm_vsp_init(t_handle h_fm_vsp)
+{
+   t_device *p_dev = NULL;
+   t_device *p_vsp_dev = (t_device *)h_fm_vsp;
+   ioc_fm_obj_t id;
+
+   _fml_dbg("Calling...\n");
+
+   p_dev = (t_device *)p_vsp_dev->h_user_priv;
+   id.obj = UINT_TO_PTR(p_vsp_dev->id);
+
+   if (ioctl(p_dev->fd, FM_IOC_VSP_INIT, &id)) {
+   DPAA_PMD_ERR("%s ioctl error\n", __func__);
+   RETURN_ERROR(MINOR, E_INVALID_OPERATION, NO_MSG);
+   }
+
+   _fml_dbg("Called.\n");
+
+   return E_OK;
+}
+
+uint32_t
+fm_vsp_free(t_handle h_fm_vsp)
+{
+   t_device *p_dev = NULL;
+   t_device *p_vsp_dev = (t_device *)h_fm_vsp;
+   ioc_fm_obj_t id;
+
+   _fml_dbg("Calling...\n");
+
+   p_dev = (t_device *)p_vsp_dev->h_user_priv;
+   id.obj = UINT_TO_PTR(p_vsp_dev->id);
+
+   if (ioctl(p_dev->fd, FM_IOC_VSP_FREE, &id)) {
+   DPAA_PMD_ERR("%s ioctl error\n", __func__);
+   RETURN_ERROR(MINOR, E_INVALID_OPERATION, NO_MSG);
+   }
+
+   p_dev->owners--;
+   free(p_vsp_dev);
+
+   _fml_dbg("Called.\n");
+
+   return E_OK;
+}
+
+uint32_t
+fm_vsp_config_buffer_prefix_content(t_handle h_fm_vsp,
+   t_fm_buffer_prefix_content *p_fm_buffer_prefix_content)
+{
+   t_device *p_dev = NULL;
+   t_device *p_vsp_dev = (t_device *)h_fm_vsp;
+   ioc_fm_buffer_prefix_content_params_t params;
+
+   _fml_dbg("Calling...\n");
+
+   p_dev = (t_device *)p_vsp_

[dpdk-dev] [PATCH v6 3/8] net/dpaa: add support for fmcless mode

[Hemant Agrawal]

From: Sachin Saxena 

This patch uses fmlib to configure the FMAN HW for flow
and distribution configuration, thus avoiding the need
for static FMC tool execution optionally.

Signed-off-by: Sachin Saxena 
Signed-off-by: Hemant Agrawal 
---
 drivers/bus/dpaa/include/fsl_qman.h   |   1 +
 drivers/bus/dpaa/rte_bus_dpaa_version.map |   1 +
 drivers/net/dpaa/dpaa_ethdev.c| 111 ++-
 drivers/net/dpaa/dpaa_ethdev.h|   4 +
 drivers/net/dpaa/dpaa_flow.c  | 901 ++
 drivers/net/dpaa/dpaa_flow.h  |  14 +
 drivers/net/dpaa/meson.build  |   1 +
 7 files changed, 1011 insertions(+), 22 deletions(-)
 create mode 100644 drivers/net/dpaa/dpaa_flow.c
 create mode 100644 drivers/net/dpaa/dpaa_flow.h

diff --git a/drivers/bus/dpaa/include/fsl_qman.h 
b/drivers/bus/dpaa/include/fsl_qman.h
index 8ba37411a..dd7ca783a 100644
--- a/drivers/bus/dpaa/include/fsl_qman.h
+++ b/drivers/bus/dpaa/include/fsl_qman.h
@@ -1896,6 +1896,7 @@ int qman_enqueue_orp(struct qman_fq *fq, const struct 
qm_fd *fd, u32 flags,
  * FQs than requested (though alignment will be as requested). If @partial is
  * zero, the return value will either be 'count' or negative.
  */
+__rte_internal
 int qman_alloc_fqid_range(u32 *result, u32 count, u32 align, int partial);
 static inline int qman_alloc_fqid(u32 *result)
 {
diff --git a/drivers/bus/dpaa/rte_bus_dpaa_version.map 
b/drivers/bus/dpaa/rte_bus_dpaa_version.map
index 77840a564..f47922c6a 100644
--- a/drivers/bus/dpaa/rte_bus_dpaa_version.map
+++ b/drivers/bus/dpaa/rte_bus_dpaa_version.map
@@ -49,6 +49,7 @@ INTERNAL {
netcfg_release;
per_lcore_dpaa_io;
qman_alloc_cgrid_range;
+   qman_alloc_fqid_range;
qman_alloc_pool_range;
qman_clear_irq;
qman_create_cgr;
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index c15e2b546..c5b9ac1a5 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -39,6 +39,7 @@
 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -76,6 +77,7 @@ static uint64_t dev_tx_offloads_nodis =
 
 /* Keep track of whether QMAN and BMAN have been globally initialized */
 static int is_global_init;
+static int fmc_q = 1;  /* Indicates the use of static fmc for distribution */
 static int default_q;  /* use default queue - FMC is not executed*/
 /* At present we only allow up to 4 push mode queues as default - as each of
  * this queue need dedicated portal and we are short of portals.
@@ -1418,16 +1420,15 @@ static int dpaa_rx_queue_init(struct qman_fq *fq, 
struct qman_cgr *cgr_rx,
}
};
 
-   if (fqid) {
+   if (fmc_q || default_q) {
ret = qman_reserve_fqid(fqid);
if (ret) {
-   DPAA_PMD_ERR("reserve rx fqid 0x%x failed with ret: %d",
+   DPAA_PMD_ERR("reserve rx fqid 0x%x failed, ret: %d",
 fqid, ret);
return -EINVAL;
}
-   } else {
-   flags |= QMAN_FQ_FLAG_DYNAMIC_FQID;
}
+
DPAA_PMD_DEBUG("creating rx fq %p, fqid 0x%x", fq, fqid);
ret = qman_create_fq(fqid, flags, fq);
if (ret) {
@@ -1602,7 +1603,7 @@ dpaa_dev_init(struct rte_eth_dev *eth_dev)
struct fman_if_bpool *bp, *tmp_bp;
uint32_t cgrid[DPAA_MAX_NUM_PCD_QUEUES];
uint32_t cgrid_tx[MAX_DPAA_CORES];
-   char eth_buf[RTE_ETHER_ADDR_FMT_SIZE];
+   uint32_t dev_rx_fqids[DPAA_MAX_NUM_PCD_QUEUES];
 
PMD_INIT_FUNC_TRACE();
 
@@ -1619,30 +1620,36 @@ dpaa_dev_init(struct rte_eth_dev *eth_dev)
dpaa_intf->ifid = dev_id;
dpaa_intf->cfg = cfg;
 
+   memset((char *)dev_rx_fqids, 0,
+   sizeof(uint32_t) * DPAA_MAX_NUM_PCD_QUEUES);
+
/* Initialize Rx FQ's */
if (default_q) {
num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;
+   } else if (fmc_q) {
+   num_rx_fqs = 1;
} else {
-   if (getenv("DPAA_NUM_RX_QUEUES"))
-   num_rx_fqs = atoi(getenv("DPAA_NUM_RX_QUEUES"));
-   else
-   num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;
+   /* FMCLESS mode, load balance to multiple cores.*/
+   num_rx_fqs = rte_lcore_count();
}
 
-
/* Each device can not have more than DPAA_MAX_NUM_PCD_QUEUES RX
 * queues.
 */
-   if (num_rx_fqs <= 0 || num_rx_fqs > DPAA_MAX_NUM_PCD_QUEUES) {
+   if (num_rx_fqs < 0 || num_rx_fqs > DPAA_MAX_NUM_PCD_QUEUES) {
DPAA_PMD_ERR("Invalid number of RX queues\n");
return -EINVAL;
}
 
-   dpaa_intf->rx_queues = rte_zmalloc(NULL,
-   sizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE);
-   if (!dpaa_intf->rx_queues) {
-   DPAA_PMD_ERR("Failed to alloc mem for RX queues\n");
-   return -ENOMEM;
+   if

[dpdk-dev] [PATCH v6 4/8] bus/dpaa: add shared MAC support

[Hemant Agrawal]

From: Radu Bulie 

A shared MAC interface is an interface which can be used
by both kernel and userspace based on classification configuration
It is defined in dts with the compatible string "fsl,dpa-ethernet-shared"
which bpool will be seeded by the dpdk partition and configured
as a netdev by the dpaa Linux eth driver.
User space buffers from the bpool will be kmapped by the kernel.

Signed-off-by: Radu Bulie 
Signed-off-by: Jun Yang 
Signed-off-by: Nipun Gupta 
Acked-by: Hemant Agrawal 
---
 drivers/bus/dpaa/base/fman/fman.c | 27 ++-
 drivers/bus/dpaa/include/fman.h   |  2 ++
 drivers/net/dpaa/dpaa_ethdev.c| 31 +--
 drivers/net/dpaa/dpaa_flow.c  | 18 ++
 4 files changed, 55 insertions(+), 23 deletions(-)

diff --git a/drivers/bus/dpaa/base/fman/fman.c 
b/drivers/bus/dpaa/base/fman/fman.c
index 33be9e5d7..3ae29bf06 100644
--- a/drivers/bus/dpaa/base/fman/fman.c
+++ b/drivers/bus/dpaa/base/fman/fman.c
@@ -167,13 +167,21 @@ fman_if_init(const struct device_node *dpa_node)
const char *mname, *fname;
const char *dname = dpa_node->full_name;
size_t lenp;
-   int _errno;
+   int _errno, is_shared = 0;
const char *char_prop;
uint32_t na;
 
if (of_device_is_available(dpa_node) == false)
return 0;
 
+   if (!of_device_is_compatible(dpa_node, "fsl,dpa-ethernet-init") &&
+   !of_device_is_compatible(dpa_node, "fsl,dpa-ethernet-shared")) {
+   return 0;
+   }
+
+   if (of_device_is_compatible(dpa_node, "fsl,dpa-ethernet-shared"))
+   is_shared = 1;
+
rprop = "fsl,qman-frame-queues-rx";
mprop = "fsl,fman-mac";
 
@@ -387,7 +395,7 @@ fman_if_init(const struct device_node *dpa_node)
goto err;
}
 
-   assert(lenp == (4 * sizeof(phandle)));
+   assert(lenp >= (4 * sizeof(phandle)));
 
na = of_n_addr_cells(mac_node);
/* Get rid of endianness (issues). Convert to host byte order */
@@ -408,7 +416,7 @@ fman_if_init(const struct device_node *dpa_node)
goto err;
}
 
-   assert(lenp == (4 * sizeof(phandle)));
+   assert(lenp >= (4 * sizeof(phandle)));
/*TODO: Fix for other cases also */
na = of_n_addr_cells(mac_node);
/* Get rid of endianness (issues). Convert to host byte order */
@@ -508,6 +516,9 @@ fman_if_init(const struct device_node *dpa_node)
pools_phandle++;
}
 
+   if (is_shared)
+   __if->__if.is_shared_mac = 1;
+
/* Parsing of the network interface is complete, add it to the list */
DPAA_BUS_LOG(DEBUG, "Found %s, Tx Channel = %x, FMAN = %x,"
"Port ID = %x",
@@ -524,7 +535,7 @@ fman_if_init(const struct device_node *dpa_node)
 int
 fman_init(void)
 {
-   const struct device_node *dpa_node;
+   const struct device_node *dpa_node, *parent_node;
int _errno;
 
/* If multiple dependencies try to initialise the Fman driver, don't
@@ -539,7 +550,13 @@ fman_init(void)
return fman_ccsr_map_fd;
}
 
-   for_each_compatible_node(dpa_node, NULL, "fsl,dpa-ethernet-init") {
+   parent_node = of_find_compatible_node(NULL, NULL, "fsl,dpaa");
+   if (!parent_node) {
+   DPAA_BUS_LOG(ERR, "Unable to find fsl,dpaa node");
+   return -ENODEV;
+   }
+
+   for_each_child_node(parent_node, dpa_node) {
_errno = fman_if_init(dpa_node);
if (_errno) {
FMAN_ERR(_errno, "if_init(%s)\n", dpa_node->full_name);
diff --git a/drivers/bus/dpaa/include/fman.h b/drivers/bus/dpaa/include/fman.h
index 7a0a7d405..cb7f18ca2 100644
--- a/drivers/bus/dpaa/include/fman.h
+++ b/drivers/bus/dpaa/include/fman.h
@@ -320,6 +320,8 @@ struct fman_if {
struct rte_ether_addr mac_addr;
/* The Qman channel to schedule Tx FQs to */
u16 tx_channel_id;
+
+   uint8_t is_shared_mac;
/* The hard-coded FQIDs for this interface. Note: this doesn't cover
 * the PCD nor the "Rx default" FQIDs, which are configured via FMC
 * and its XML-based configuration.
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index c5b9ac1a5..c2d480397 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -351,7 +351,8 @@ static void dpaa_eth_dev_stop(struct rte_eth_dev *dev)
 
PMD_INIT_FUNC_TRACE();
 
-   fman_if_disable_rx(fif);
+   if (!fif->is_shared_mac)
+   fman_if_disable_rx(fif);
dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
 }
 
@@ -1807,19 +1808,21 @@ dpaa_dev_init(struct rte_eth_dev *eth_dev)
fman_intf->mac_addr.addr_bytes[4],
fman_intf->mac_addr.addr_bytes[5]);
 
-
-   /* Disable RX mode */
-   fman_if_discard_rx_errors(fman_intf);
-   fman_if_disable_rx(fman_intf);
-   /* Di

[dpdk-dev] [PATCH v6 7/8] net/dpaa: add fmc parser support for VSP

[Hemant Agrawal]

From: Jun Yang 

FMC tool genertes and saves the setup in a file.
This patch help Parse the /tmp/fmc.bin generated by fmc to
setup RXQs for each port on fmc mode.
The parser gets the fqids and vspids from fmc.bin

Signed-off-by: Jun Yang 
Acked-by: Hemant Agrawal 
---
 drivers/net/dpaa/dpaa_ethdev.c |  26 +-
 drivers/net/dpaa/dpaa_ethdev.h |  10 +-
 drivers/net/dpaa/dpaa_fmc.c| 475 +
 drivers/net/dpaa/meson.build   |   3 +-
 4 files changed, 507 insertions(+), 7 deletions(-)
 create mode 100644 drivers/net/dpaa/dpaa_fmc.c

diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 8e7eb9824..0ce2f5ae3 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -259,6 +259,16 @@ dpaa_eth_dev_configure(struct rte_eth_dev *dev)
dev->data->scattered_rx = 1;
}
 
+   if (!(default_q || fmc_q)) {
+   if (dpaa_fm_config(dev,
+   eth_conf->rx_adv_conf.rss_conf.rss_hf)) {
+   dpaa_write_fm_config_to_file();
+   DPAA_PMD_ERR("FM port configuration: Failed\n");
+   return -1;
+   }
+   dpaa_write_fm_config_to_file();
+   }
+
/* if the interrupts were configured on this devices*/
if (intr_handle && intr_handle->fd) {
if (dev->data->dev_conf.intr_conf.lsc != 0)
@@ -334,6 +344,9 @@ static int dpaa_eth_dev_start(struct rte_eth_dev *dev)
 
PMD_INIT_FUNC_TRACE();
 
+   if (!(default_q || fmc_q))
+   dpaa_write_fm_config_to_file();
+
/* Change tx callback to the real one */
if (dpaa_intf->cgr_tx)
dev->tx_pkt_burst = dpaa_eth_queue_tx_slow;
@@ -1699,7 +1712,18 @@ dpaa_dev_init(struct rte_eth_dev *eth_dev)
if (default_q) {
num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;
} else if (fmc_q) {
-   num_rx_fqs = 1;
+   num_rx_fqs = dpaa_port_fmc_init(fman_intf, dev_rx_fqids,
+   dev_vspids,
+   DPAA_MAX_NUM_PCD_QUEUES);
+   if (num_rx_fqs < 0) {
+   DPAA_PMD_ERR("%s FMC initializes failed!",
+   dpaa_intf->name);
+   goto free_rx;
+   }
+   if (!num_rx_fqs) {
+   DPAA_PMD_WARN("%s is not configured by FMC.",
+   dpaa_intf->name);
+   }
} else {
/* FMCLESS mode, load balance to multiple cores.*/
num_rx_fqs = rte_lcore_count();
diff --git a/drivers/net/dpaa/dpaa_ethdev.h b/drivers/net/dpaa/dpaa_ethdev.h
index dd182c4d5..1b8e120e8 100644
--- a/drivers/net/dpaa/dpaa_ethdev.h
+++ b/drivers/net/dpaa/dpaa_ethdev.h
@@ -59,10 +59,10 @@
 #endif
 
 /* PCD frame queues */
-#define DPAA_PCD_FQID_START0x400
-#define DPAA_PCD_FQID_MULTIPLIER   0x100
 #define DPAA_DEFAULT_NUM_PCD_QUEUES1
-#define DPAA_MAX_NUM_PCD_QUEUES4
+#define DPAA_VSP_PROFILE_MAX_NUM   8
+#define DPAA_MAX_NUM_PCD_QUEUESDPAA_VSP_PROFILE_MAX_NUM
+/*Same as VSP profile number*/
 
 #define DPAA_IF_TX_PRIORITY3
 #define DPAA_IF_RX_PRIORITY0
@@ -103,10 +103,10 @@
 #define DPAA_FD_CMD_CFQ0x00ff
 /**< Confirmation Frame Queue */
 
-#define DPAA_VSP_PROFILE_MAX_NUM   8
-
 #define DPAA_DEFAULT_RXQ_VSP_ID1
 
+#define FMC_FILE "/tmp/fmc.bin"
+
 /* Each network interface is represented by one of these */
 struct dpaa_if {
int valid;
diff --git a/drivers/net/dpaa/dpaa_fmc.c b/drivers/net/dpaa/dpaa_fmc.c
new file mode 100644
index 0..0ef362274
--- /dev/null
+++ b/drivers/net/dpaa/dpaa_fmc.c
@@ -0,0 +1,475 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2017-2020 NXP
+ */
+
+/* System headers */
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define FMC_OUTPUT_FORMAT_VER 0x106
+
+#define FMC_NAME_LEN 64
+#define FMC_FMAN_NUM  2
+#define FMC_PORTS_PER_FMAN   16
+#define FMC_SCHEMES_NUM  32
+#define FMC_SCHEME_PROTOCOLS_NUM 16
+#define FMC_CC_NODES_NUM512
+#define FMC_REPLICATORS_NUM  16
+#define FMC_PLC_NUM  64
+#define MAX_SP_CODE_SIZE  0x7C0
+#define FMC_MANIP_MAX64
+#define FMC_HMANIP_MAX  512
+#define FMC_INSERT_MAX   56
+#define FM_PCD_MAX_REPS  64
+
+typedef struct fmc_port_t {
+   e_fm_port_type type;
+   unsigned int number;
+   struct fm_pcd_net_env_params_t distinction_units;
+   struct ioc_fm_port_pcd_params_t pcd_param;
+   struct ioc_fm_port_pcd_prs_params_t prs_param;
+   struct ioc_fm_port_pcd_kg_params_t kg_param;
+   struct ioc_fm_port_pcd_cc_params_t cc_param;
+   char name[FMC_NAME_LEN];
+   c

[dpdk-dev] [PATCH v6 5/8] bus/dpaa: add Virtual Storage Profile port init

[Hemant Agrawal]

This patch add support to initialize the VSP ports
in the FMAN library.

Signed-off-by: Hemant Agrawal 
---
 drivers/bus/dpaa/base/fman/fman.c | 57 +++
 drivers/bus/dpaa/include/fman.h   |  3 ++
 2 files changed, 60 insertions(+)

diff --git a/drivers/bus/dpaa/base/fman/fman.c 
b/drivers/bus/dpaa/base/fman/fman.c
index 3ae29bf06..39102bc1f 100644
--- a/drivers/bus/dpaa/base/fman/fman.c
+++ b/drivers/bus/dpaa/base/fman/fman.c
@@ -145,6 +145,61 @@ fman_get_mac_index(uint64_t regs_addr_host, uint8_t 
*mac_idx)
return ret;
 }
 
+static void fman_if_vsp_init(struct __fman_if *__if)
+{
+   const phandle *prop;
+   int cell_index;
+   const struct device_node *dev;
+   size_t lenp;
+   const uint8_t mac_idx[] = {-1, 0, 1, 2, 3, 4, 5, 6, 7, 0, 1};
+
+   if (__if->__if.mac_type == fman_mac_1g) {
+   for_each_compatible_node(dev, NULL,
+   "fsl,fman-port-1g-rx-extended-args") {
+   prop = of_get_property(dev, "cell-index", &lenp);
+   if (prop) {
+   cell_index = of_read_number(
+   &prop[0],
+   lenp / sizeof(phandle));
+   if (cell_index == mac_idx[__if->__if.mac_idx]) {
+   prop = of_get_property(
+   dev,
+   "vsp-window", &lenp);
+   if (prop) {
+   __if->__if.num_profiles =
+   of_read_number(
+   &prop[0], 1);
+   __if->__if.base_profile_id =
+   of_read_number(
+   &prop[1], 1);
+   }
+   }
+   }
+   }
+   } else if (__if->__if.mac_type == fman_mac_10g) {
+   for_each_compatible_node(dev, NULL,
+   "fsl,fman-port-10g-rx-extended-args") {
+   prop = of_get_property(dev, "cell-index", &lenp);
+   if (prop) {
+   cell_index = of_read_number(
+   &prop[0], lenp / sizeof(phandle));
+   if (cell_index == mac_idx[__if->__if.mac_idx]) {
+   prop = of_get_property(
+   dev, "vsp-window", &lenp);
+   if (prop) {
+   __if->__if.num_profiles =
+   of_read_number(
+   &prop[0], 1);
+   __if->__if.base_profile_id =
+   of_read_number(
+   &prop[1], 1);
+   }
+   }
+   }
+   }
+   }
+}
+
 static int
 fman_if_init(const struct device_node *dpa_node)
 {
@@ -519,6 +574,8 @@ fman_if_init(const struct device_node *dpa_node)
if (is_shared)
__if->__if.is_shared_mac = 1;
 
+   fman_if_vsp_init(__if);
+
/* Parsing of the network interface is complete, add it to the list */
DPAA_BUS_LOG(DEBUG, "Found %s, Tx Channel = %x, FMAN = %x,"
"Port ID = %x",
diff --git a/drivers/bus/dpaa/include/fman.h b/drivers/bus/dpaa/include/fman.h
index cb7f18ca2..dcf408372 100644
--- a/drivers/bus/dpaa/include/fman.h
+++ b/drivers/bus/dpaa/include/fman.h
@@ -321,6 +321,9 @@ struct fman_if {
/* The Qman channel to schedule Tx FQs to */
u16 tx_channel_id;
 
+   uint8_t base_profile_id;
+   uint8_t num_profiles;
+
uint8_t is_shared_mac;
/* The hard-coded FQIDs for this interface. Note: this doesn't cover
 * the PCD nor the "Rx default" FQIDs, which are configured via FMC
-- 
2.17.1

[dpdk-dev] [PATCH v6 6/8] net/dpaa: add support for Virtual Storage Profile

[Hemant Agrawal]

From: Jun Yang 

This patch adds support for Virtual Storage profile (VSP) feature.
With VSP support when memory pool is created, the hw buffer pool id
i.e. bpid is not allocated; thhe bpid is identified by dpaa flow
create API.
The memory pool of RX queue is attached to specific BMan pool
according to the VSP ID when RX queue is setup.
for fmlib based hash queue, vsp base ID is assigned to each queue.

Signed-off-by: Jun Yang 
Acked-by: Hemant Agrawal 
---
 drivers/bus/dpaa/include/fsl_qman.h |   1 +
 drivers/net/dpaa/dpaa_ethdev.c  | 133 +-
 drivers/net/dpaa/dpaa_ethdev.h  |   7 ++
 drivers/net/dpaa/dpaa_flow.c| 164 +++-
 drivers/net/dpaa/dpaa_flow.h|   5 +
 5 files changed, 282 insertions(+), 28 deletions(-)

diff --git a/drivers/bus/dpaa/include/fsl_qman.h 
b/drivers/bus/dpaa/include/fsl_qman.h
index dd7ca783a..10212f0fd 100644
--- a/drivers/bus/dpaa/include/fsl_qman.h
+++ b/drivers/bus/dpaa/include/fsl_qman.h
@@ -1229,6 +1229,7 @@ struct qman_fq {
 
int q_fd;
u16 ch_id;
+   int8_t vsp_id;
u8 cgr_groupid;
u8 is_static:4;
u8 qp_initialized:4;
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index c2d480397..8e7eb9824 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -722,6 +722,55 @@ static int dpaa_eth_multicast_disable(struct rte_eth_dev 
*dev)
return 0;
 }
 
+static void dpaa_fman_if_pool_setup(struct rte_eth_dev *dev)
+{
+   struct dpaa_if *dpaa_intf = dev->data->dev_private;
+   struct fman_if_ic_params icp;
+   uint32_t fd_offset;
+   uint32_t bp_size;
+
+   memset(&icp, 0, sizeof(icp));
+   /* set ICEOF for to the default value , which is 0*/
+   icp.iciof = DEFAULT_ICIOF;
+   icp.iceof = DEFAULT_RX_ICEOF;
+   icp.icsz = DEFAULT_ICSZ;
+   fman_if_set_ic_params(dev->process_private, &icp);
+
+   fd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE;
+   fman_if_set_fdoff(dev->process_private, fd_offset);
+
+   /* Buffer pool size should be equal to Dataroom Size*/
+   bp_size = rte_pktmbuf_data_room_size(dpaa_intf->bp_info->mp);
+
+   fman_if_set_bp(dev->process_private,
+  dpaa_intf->bp_info->mp->size,
+  dpaa_intf->bp_info->bpid, bp_size);
+}
+
+static inline int dpaa_eth_rx_queue_bp_check(struct rte_eth_dev *dev,
+int8_t vsp_id, uint32_t bpid)
+{
+   struct dpaa_if *dpaa_intf = dev->data->dev_private;
+   struct fman_if *fif = dev->process_private;
+
+   if (fif->num_profiles) {
+   if (vsp_id < 0)
+   vsp_id = fif->base_profile_id;
+   } else {
+   if (vsp_id < 0)
+   vsp_id = 0;
+   }
+
+   if (dpaa_intf->vsp_bpid[vsp_id] &&
+   bpid != dpaa_intf->vsp_bpid[vsp_id]) {
+   DPAA_PMD_ERR("Various MPs are assigned to RXQs with same VSP");
+
+   return -1;
+   }
+
+   return 0;
+}
+
 static
 int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
uint16_t nb_desc,
@@ -757,6 +806,20 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, 
uint16_t queue_idx,
DPAA_PMD_INFO("Rx queue setup for queue index: %d fq_id (0x%x)",
queue_idx, rxq->fqid);
 
+   if (!fif->num_profiles) {
+   if (dpaa_intf->bp_info && dpaa_intf->bp_info->bp &&
+   dpaa_intf->bp_info->mp != mp) {
+   DPAA_PMD_WARN("Multiple pools on same interface not"
+ " supported");
+   return -EINVAL;
+   }
+   } else {
+   if (dpaa_eth_rx_queue_bp_check(dev, rxq->vsp_id,
+   DPAA_MEMPOOL_TO_POOL_INFO(mp)->bpid)) {
+   return -EINVAL;
+   }
+   }
+
/* Max packet can fit in single buffer */
if (dev->data->dev_conf.rxmode.max_rx_pkt_len <= buffsz) {
;
@@ -779,36 +842,40 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, 
uint16_t queue_idx,
 buffsz - RTE_PKTMBUF_HEADROOM);
}
 
-   if (!dpaa_intf->bp_info || dpaa_intf->bp_info->mp != mp) {
-   struct fman_if_ic_params icp;
-   uint32_t fd_offset;
-   uint32_t bp_size;
+   dpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
 
-   if (!mp->pool_data) {
-   DPAA_PMD_ERR("Not an offloaded buffer pool!");
-   return -1;
+   /* For shared interface, it's done in kernel, skip.*/
+   if (!fif->is_shared_mac)
+   dpaa_fman_if_pool_setup(dev);
+
+   if (fif->num_profiles) {
+   int8_t vsp_id = rxq->vsp_id;
+
+   if (vsp_id >= 0) {
+   ret = dpaa_port_vsp_update(d

[dpdk-dev] [PATCH v6 8/8] net/dpaa: add RSS update func with FMCless

[Hemant Agrawal]

From: Sachin Saxena 

With fmlib (FMCLESS) mode now RSS can be modified on runtime.
This patch add support for RSS update functions

Signed-off-by: Hemant Agrawal 
Signed-off-by: Sachin Saxena 
---
 drivers/net/dpaa/dpaa_ethdev.c | 37 ++
 1 file changed, 37 insertions(+)

diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 0ce2f5ae3..b0f2023e6 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -1303,6 +1303,41 @@ dpaa_dev_set_mac_addr(struct rte_eth_dev *dev,
return ret;
 }
 
+static int
+dpaa_dev_rss_hash_update(struct rte_eth_dev *dev,
+struct rte_eth_rss_conf *rss_conf)
+{
+   struct rte_eth_dev_data *data = dev->data;
+   struct rte_eth_conf *eth_conf = &data->dev_conf;
+
+   PMD_INIT_FUNC_TRACE();
+
+   if (!(default_q || fmc_q)) {
+   if (dpaa_fm_config(dev, rss_conf->rss_hf)) {
+   DPAA_PMD_ERR("FM port configuration: Failed\n");
+   return -1;
+   }
+   eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
+   } else {
+   DPAA_PMD_ERR("Function not supported\n");
+   return -ENOTSUP;
+   }
+   return 0;
+}
+
+static int
+dpaa_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
+  struct rte_eth_rss_conf *rss_conf)
+{
+   struct rte_eth_dev_data *data = dev->data;
+   struct rte_eth_conf *eth_conf = &data->dev_conf;
+
+   /* dpaa does not support rss_key, so length should be 0*/
+   rss_conf->rss_key_len = 0;
+   rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
+   return 0;
+}
+
 static int dpaa_dev_queue_intr_enable(struct rte_eth_dev *dev,
  uint16_t queue_id)
 {
@@ -1418,6 +1453,8 @@ static struct eth_dev_ops dpaa_devops = {
 
.rx_queue_intr_enable = dpaa_dev_queue_intr_enable,
.rx_queue_intr_disable= dpaa_dev_queue_intr_disable,
+   .rss_hash_update  = dpaa_dev_rss_hash_update,
+   .rss_hash_conf_get= dpaa_dev_rss_hash_conf_get,
 };
 
 static bool
-- 
2.17.1

Re: [dpdk-dev] 19.11.4 patches review and test

[Bruce Richardson]

On Tue, Sep 01, 2020 at 02:32:26PM +0200, Christian Ehrhardt wrote:
> On Tue, Sep 1, 2020 at 10:30 AM Luca Boccassi  wrote:
> >
> > On Tue, 2020-08-18 at 19:12 +0100, Luca Boccassi wrote:
> > > Hi all,
> > >
> > > Here is a list of patches targeted for stable release 19.11.4.
> > >
> > > The planned date for the final release is August 31st.
> > >
> > > Please help with testing and validation of your use cases and report
> > > any issues/results with reply-all to this mail. For the final release
> > > the fixes and reported validations will be added to the release notes.
> > >
> > > A release candidate tarball can be found at:
> > >
> > > https://dpdk.org/browse/dpdk-stable/tag/?id=v19.11.4-rc1
> > >
> > > These patches are located at branch 19.11 of dpdk-stable repo:
> > > https://dpdk.org/browse/dpdk-stable/
> > >
> > > Thanks.
> > >
> > > Luca Boccassi
> >
> > Microsoft's regression tests are still running, delaying until Thursday
> > the 3rd. Apologies for any inconvenience.
> 
> Due to report on OVS failing to build I happened to find that 19.11.4
> has massively changed linking.
> => https://paste.ubuntu.com/p/znCRR4gpjP/
> 
> This was meant to be helpful for sure and I assume is around:
> 48f7fd27f6 build/pkg-config: prevent overlinking
> 2d1535d592 build/pkg-config: improve static linking flags
> 9fb13a12c1 build/pkg-config: output drivers first for static build
> 59b108d824 build/pkg-config: move pkg-config file creation
> aea915e944 devtools: test static linkage with pkg-config
> 
> But overlinking has effectively become underlinking now
> https://launchpadlibrarian.net/495845224/buildlog_ubuntu-groovy-amd64.openvswitch_2.13.1-0ubuntu2~ppa1_BUILDING.txt.gz
> 
> /usr/bin/ld: 
> /usr/lib/gcc/x86_64-linux-gnu/10/../../../x86_64-linux-gnu/librte_pmd_ring.a(net_ring_rte_eth_ring.c.o):
> in function `rte_eth_from_rings':
> (.text+0x91c): undefined reference to `rte_vdev_init'
> /usr/bin/ld: 
> /usr/lib/gcc/x86_64-linux-gnu/10/../../../x86_64-linux-gnu/librte_pmd_ring.a(net_ring_rte_eth_ring.c.o):
> in function `vdrvinitfn_pmd_ring_drv':
> (.text.startup+0x28): undefined reference to `rte_vdev_register'
> collect2: error: ld returned 1 exit status
> 
> Also as you can see in the pastebin above, CFlags and Libs massively
> shrunk and likely too much so.
> 
> Given that this should be a stable release I'd ask to back out those
> changes so that a test build creates the same .pc file as before -
> would that make sense?
> 
> 
Adding some OVS folks on CC.

The request for backporting these actually came from the OVS side, since
they were deemed necessary to enable OVS to switch to use DPDK pkg-config
rather than the older approach using a makefile-based build. However, it
appears you guys were already building OVS using the pkg-config file, and
since this causes issues where there were none, backing it out seems a
prudent choice.

Ian, Sunil, any comments here.

Regards
/Bruce

Re: [dpdk-dev] 19.11.4 patches review and test

[Luca Boccassi]

On Tue, 2020-09-01 at 14:32 +0200, Christian Ehrhardt wrote:
> On Tue, Sep 1, 2020 at 10:30 AM Luca Boccassi  wrote:
> > On Tue, 2020-08-18 at 19:12 +0100, Luca Boccassi wrote:
> > > Hi all,
> > > 
> > > Here is a list of patches targeted for stable release 19.11.4.
> > > 
> > > The planned date for the final release is August 31st.
> > > 
> > > Please help with testing and validation of your use cases and report
> > > any issues/results with reply-all to this mail. For the final release
> > > the fixes and reported validations will be added to the release notes.
> > > 
> > > A release candidate tarball can be found at:
> > > 
> > > https://dpdk.org/browse/dpdk-stable/tag/?id=v19.11.4-rc1
> > > 
> > > These patches are located at branch 19.11 of dpdk-stable repo:
> > > https://dpdk.org/browse/dpdk-stable/
> > > 
> > > Thanks.
> > > 
> > > Luca Boccassi
> > 
> > Microsoft's regression tests are still running, delaying until Thursday
> > the 3rd. Apologies for any inconvenience.
> 
> Due to report on OVS failing to build I happened to find that 19.11.4
> has massively changed linking.
> => https://paste.ubuntu.com/p/znCRR4gpjP/
> 
> This was meant to be helpful for sure and I assume is around:
> 48f7fd27f6 build/pkg-config: prevent overlinking
> 2d1535d592 build/pkg-config: improve static linking flags
> 9fb13a12c1 build/pkg-config: output drivers first for static build
> 59b108d824 build/pkg-config: move pkg-config file creation
> aea915e944 devtools: test static linkage with pkg-config
> 
> But overlinking has effectively become underlinking now
> https://launchpadlibrarian.net/495845224/buildlog_ubuntu-groovy-amd64.openvswitch_2.13.1-0ubuntu2~ppa1_BUILDING.txt.gz
> 
> /usr/bin/ld: 
> /usr/lib/gcc/x86_64-linux-gnu/10/../../../x86_64-linux-gnu/librte_pmd_ring.a(net_ring_rte_eth_ring.c.o):
> in function `rte_eth_from_rings':
> (.text+0x91c): undefined reference to `rte_vdev_init'
> /usr/bin/ld: 
> /usr/lib/gcc/x86_64-linux-gnu/10/../../../x86_64-linux-gnu/librte_pmd_ring.a(net_ring_rte_eth_ring.c.o):
> in function `vdrvinitfn_pmd_ring_drv':
> (.text.startup+0x28): undefined reference to `rte_vdev_register'
> collect2: error: ld returned 1 exit status
> 
> Also as you can see in the pastebin above, CFlags and Libs massively
> shrunk and likely too much so.
> 
> Given that this should be a stable release I'd ask to back out those
> changes so that a test build creates the same .pc file as before -
> would that make sense?

Paging Bruce and Ian - IIRC OVS explicitly asked for that series to be
backported and took a dependency on it, so removing it might cause
breakages for them? Ian?

Bruce, have you see the error reported by Christian before?

-- 
Kind regards,
Luca Boccassi

Re: [dpdk-dev] 19.11.4 patches review and test

[Bruce Richardson]

On Tue, Sep 01, 2020 at 01:49:07PM +0100, Luca Boccassi wrote:
> On Tue, 2020-09-01 at 14:32 +0200, Christian Ehrhardt wrote:
> > On Tue, Sep 1, 2020 at 10:30 AM Luca Boccassi  wrote:
> > > On Tue, 2020-08-18 at 19:12 +0100, Luca Boccassi wrote:
> > > > Hi all,
> > > > 
> > > > Here is a list of patches targeted for stable release 19.11.4.
> > > > 
> > > > The planned date for the final release is August 31st.
> > > > 
> > > > Please help with testing and validation of your use cases and report
> > > > any issues/results with reply-all to this mail. For the final release
> > > > the fixes and reported validations will be added to the release notes.
> > > > 
> > > > A release candidate tarball can be found at:
> > > > 
> > > > https://dpdk.org/browse/dpdk-stable/tag/?id=v19.11.4-rc1
> > > > 
> > > > These patches are located at branch 19.11 of dpdk-stable repo:
> > > > https://dpdk.org/browse/dpdk-stable/
> > > > 
> > > > Thanks.
> > > > 
> > > > Luca Boccassi
> > > 
> > > Microsoft's regression tests are still running, delaying until Thursday
> > > the 3rd. Apologies for any inconvenience.
> > 
> > Due to report on OVS failing to build I happened to find that 19.11.4
> > has massively changed linking.
> > => https://paste.ubuntu.com/p/znCRR4gpjP/
> > 
> > This was meant to be helpful for sure and I assume is around:
> > 48f7fd27f6 build/pkg-config: prevent overlinking
> > 2d1535d592 build/pkg-config: improve static linking flags
> > 9fb13a12c1 build/pkg-config: output drivers first for static build
> > 59b108d824 build/pkg-config: move pkg-config file creation
> > aea915e944 devtools: test static linkage with pkg-config
> > 
> > But overlinking has effectively become underlinking now
> > https://launchpadlibrarian.net/495845224/buildlog_ubuntu-groovy-amd64.openvswitch_2.13.1-0ubuntu2~ppa1_BUILDING.txt.gz
> > 
> > /usr/bin/ld: 
> > /usr/lib/gcc/x86_64-linux-gnu/10/../../../x86_64-linux-gnu/librte_pmd_ring.a(net_ring_rte_eth_ring.c.o):
> > in function `rte_eth_from_rings':
> > (.text+0x91c): undefined reference to `rte_vdev_init'
> > /usr/bin/ld: 
> > /usr/lib/gcc/x86_64-linux-gnu/10/../../../x86_64-linux-gnu/librte_pmd_ring.a(net_ring_rte_eth_ring.c.o):
> > in function `vdrvinitfn_pmd_ring_drv':
> > (.text.startup+0x28): undefined reference to `rte_vdev_register'
> > collect2: error: ld returned 1 exit status
> > 
> > Also as you can see in the pastebin above, CFlags and Libs massively
> > shrunk and likely too much so.
> > 
> > Given that this should be a stable release I'd ask to back out those
> > changes so that a test build creates the same .pc file as before -
> > would that make sense?
> 
> Paging Bruce and Ian - IIRC OVS explicitly asked for that series to be
> backported and took a dependency on it, so removing it might cause
> breakages for them? Ian?
> 
> Bruce, have you see the error reported by Christian before?
> 
Nope, but I'll look into it...

Re: [dpdk-dev] [PATCH v6 1/3] ethdev: add level support for RSS offload types

[Ferruh Yigit]

On 8/29/2020 3:52 PM, Andrew Rybchenko wrote:

On 8/21/20 2:03 PM, kirankum...@marvell.com wrote:

From: Kiran Kumar K 

This patch reserves 2 bits as input selection to select Inner and
outer layers for RSS computation. It is combined with existing
ETH_RSS_* to choose Inner or outer layers for L2, L3 and L4.
This functionality already exists in rte_flow through level parameter in
RSS action configuration rte_flow_action_rss.

Signed-off-by: Kiran Kumar K 
---
V7 Changes:
* Split ethdev and testpmd changes into seperate patches.

  lib/librte_ethdev/rte_ethdev.h | 27 +++
  1 file changed, 27 insertions(+)

diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index 70295d7ab..2a3a76d37 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -552,6 +552,33 @@ struct rte_eth_rss_conf {
  #define RTE_ETH_RSS_L3_PRE64 (1ULL << 53)
  #define RTE_ETH_RSS_L3_PRE96 (1ULL << 52)

+/*
+ * We use the following macros to combine with the above layers to choose
+ * inner and outer layers or both for RSS computation.
+ * Note: Default is 0: inner layers, 1: outer layers, 2: both
+ * bit 50 and 51 are reserved for this.
+ */
+
+/**
+ * Level 0, It basically stands for the innermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER(0ULL << 50)


You're trying to refer to struct rte_flow_action_rss level definition
when values are chosen, but I think it is
inaccurate. Primary definition of the level==0 is PMD default,
not inner. Definition says that typically it is the innermost
encapsulation level RSS can be performed on according to PMD
and device capabilities. But it is secondary, primary
definition is "PMD default". Basically unspecified by the
caller (structure memset to 0) results in default behaviour.


+/**
+ * Level 1, It basically stands for the outermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_OUTER(1ULL << 50)
+/**
+ * Level 2, It basically stands for the both inner and outermost
+ * encapsulation level RSS can be performed on according to PMD and
+ * device capabilities.
+ */
+#define ETH_RSS_LEVEL_INNER_OUTER  (2ULL << 50)


Level equal to 2 is the first after the outermost inner level.
Level equal to 3 is the second after the outermost inner level
and so on.

If we really try to follow level definition from
rte_flow_action_rss, the problem is that these defines
are used to define RSS hashing capabilities in
dev_info.flow_type_rss_offloads. Support for level
up to 3 levels, does not mean that we can hash on any,
it could be either outermost or innermost level, but
not the middle level, if 3 levels are present.
Or just innermost recognized: either the first one
if no tunnels recognized, the second if two levels
are recognized, or the third one if three levels are
recognized.


Is the more than two levels practically have a usage?
I can see rte_flow accepts any number as level but if it is not practically a 
concern I think we can go with 'inner' & 'outer' only.

And defer more level concern for now.

Even with only 'inner' & 'outer', capability reporting can be a problem tough.
Like if a PMD can calculate hash for inner and outer for TCP but only for outer 
for UDP, how can PMD report this capability?

Again not sure if this is a practically valid concern.



Sorry, that I'm not proposing any solution right now.
Just need more time to thing about it.
You're welcome to try to cover these requirements.


+#define ETH_RSS_LEVEL_MASK(3ULL << 50)
+
+#define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 50)
+
  /**
   * For input set change of hash filter, if SRC_ONLY and DST_ONLY of
   * the same level are used simultaneously, it is the same case as
--
2.25.1

Re: [dpdk-dev] 19.11.4 patches review and test

[Pai G, Sunil]

Hi,

Yes , OVS was using pkg-config even before these patches were rolled out.
But it always used to pick the DPDK shared libs by default for OVS even on 
using the -Bstatic/-Bshared flags.
These patches from Bruce simplify the process from DPDK side without having the 
user to specify them.
Moreover, with these patches , the problem of shared DPDK libs always being 
picked instead of static was not seen any more with a bit of changes from the 
OVS side as well.
http://patchwork.ozlabs.org/project/openvswitch/patch/20200707141126.71414-1-sunil.pa...@intel.com/
 .
The patches for ovs-master are ready as well and will them out soon.

Thanks and Regards,
Pai G, Sunil
Sunil

> -Original Message-
> From: Bruce Richardson 
> Sent: Tuesday, September 1, 2020 6:18 PM
> To: Christian Ehrhardt 
> Cc: Luca Boccassi ; sta...@dpdk.org; dev ;
> Pai G, Sunil ; Stokes, Ian 
> Subject: Re: [dpdk-dev] 19.11.4 patches review and test
> 
> On Tue, Sep 01, 2020 at 02:32:26PM +0200, Christian Ehrhardt wrote:
> > On Tue, Sep 1, 2020 at 10:30 AM Luca Boccassi  wrote:
> > >
> > > On Tue, 2020-08-18 at 19:12 +0100, Luca Boccassi wrote:
> > > > Hi all,
> > > >
> > > > Here is a list of patches targeted for stable release 19.11.4.
> > > >
> > > > The planned date for the final release is August 31st.
> > > >
> > > > Please help with testing and validation of your use cases and
> > > > report any issues/results with reply-all to this mail. For the
> > > > final release the fixes and reported validations will be added to the 
> > > > release
> notes.
> > > >
> > > > A release candidate tarball can be found at:
> > > >
> > > > https://dpdk.org/browse/dpdk-stable/tag/?id=v19.11.4-rc1
> > > >
> > > > These patches are located at branch 19.11 of dpdk-stable repo:
> > > > https://dpdk.org/browse/dpdk-stable/
> > > >
> > > > Thanks.
> > > >
> > > > Luca Boccassi
> > >
> > > Microsoft's regression tests are still running, delaying until
> > > Thursday the 3rd. Apologies for any inconvenience.
> >
> > Due to report on OVS failing to build I happened to find that 19.11.4
> > has massively changed linking.
> > => https://paste.ubuntu.com/p/znCRR4gpjP/
> >
> > This was meant to be helpful for sure and I assume is around:
> > 48f7fd27f6 build/pkg-config: prevent overlinking
> > 2d1535d592 build/pkg-config: improve static linking flags
> > 9fb13a12c1 build/pkg-config: output drivers first for static build
> > 59b108d824 build/pkg-config: move pkg-config file creation
> > aea915e944 devtools: test static linkage with pkg-config
> >
> > But overlinking has effectively become underlinking now
> > https://launchpadlibrarian.net/495845224/buildlog_ubuntu-groovy-amd64.
> > openvswitch_2.13.1-0ubuntu2~ppa1_BUILDING.txt.gz
> >
> > /usr/bin/ld: /usr/lib/gcc/x86_64-linux-gnu/10/../../../x86_64-linux-
> gnu/librte_pmd_ring.a(net_ring_rte_eth_ring.c.o):
> > in function `rte_eth_from_rings':
> > (.text+0x91c): undefined reference to `rte_vdev_init'
> > /usr/bin/ld: /usr/lib/gcc/x86_64-linux-gnu/10/../../../x86_64-linux-
> gnu/librte_pmd_ring.a(net_ring_rte_eth_ring.c.o):
> > in function `vdrvinitfn_pmd_ring_drv':
> > (.text.startup+0x28): undefined reference to `rte_vdev_register'
> > collect2: error: ld returned 1 exit status
> >
> > Also as you can see in the pastebin above, CFlags and Libs massively
> > shrunk and likely too much so.
> >
> > Given that this should be a stable release I'd ask to back out those
> > changes so that a test build creates the same .pc file as before -
> > would that make sense?
> >
> >
> Adding some OVS folks on CC.
> 
> The request for backporting these actually came from the OVS side, since they
> were deemed necessary to enable OVS to switch to use DPDK pkg-config rather
> than the older approach using a makefile-based build. However, it appears you
> guys were already building OVS using the pkg-config file, and since this 
> causes
> issues where there were none, backing it out seems a prudent choice.
> 
> Ian, Sunil, any comments here.
> 
> Regards
> /Bruce

Re: [dpdk-dev] 19.11.4 patches review and test

[Bruce Richardson]

On Tue, Sep 01, 2020 at 02:01:28PM +0100, Bruce Richardson wrote:
> On Tue, Sep 01, 2020 at 01:49:07PM +0100, Luca Boccassi wrote:
> > On Tue, 2020-09-01 at 14:32 +0200, Christian Ehrhardt wrote:
> > > On Tue, Sep 1, 2020 at 10:30 AM Luca Boccassi  wrote:
> > > > On Tue, 2020-08-18 at 19:12 +0100, Luca Boccassi wrote:
> > > > > Hi all,
> > > > > 
> > > > > Here is a list of patches targeted for stable release 19.11.4.
> > > > > 
> > > > > The planned date for the final release is August 31st.
> > > > > 
> > > > > Please help with testing and validation of your use cases and report
> > > > > any issues/results with reply-all to this mail. For the final release
> > > > > the fixes and reported validations will be added to the release notes.
> > > > > 
> > > > > A release candidate tarball can be found at:
> > > > > 
> > > > > https://dpdk.org/browse/dpdk-stable/tag/?id=v19.11.4-rc1
> > > > > 
> > > > > These patches are located at branch 19.11 of dpdk-stable repo:
> > > > > https://dpdk.org/browse/dpdk-stable/
> > > > > 
> > > > > Thanks.
> > > > > 
> > > > > Luca Boccassi
> > > > 
> > > > Microsoft's regression tests are still running, delaying until Thursday
> > > > the 3rd. Apologies for any inconvenience.
> > > 
> > > Due to report on OVS failing to build I happened to find that 19.11.4
> > > has massively changed linking.
> > > => https://paste.ubuntu.com/p/znCRR4gpjP/
> > > 
> > > This was meant to be helpful for sure and I assume is around:
> > > 48f7fd27f6 build/pkg-config: prevent overlinking
> > > 2d1535d592 build/pkg-config: improve static linking flags
> > > 9fb13a12c1 build/pkg-config: output drivers first for static build
> > > 59b108d824 build/pkg-config: move pkg-config file creation
> > > aea915e944 devtools: test static linkage with pkg-config
> > > 
> > > But overlinking has effectively become underlinking now
> > > https://launchpadlibrarian.net/495845224/buildlog_ubuntu-groovy-amd64.openvswitch_2.13.1-0ubuntu2~ppa1_BUILDING.txt.gz
> > > 
> > > /usr/bin/ld: 
> > > /usr/lib/gcc/x86_64-linux-gnu/10/../../../x86_64-linux-gnu/librte_pmd_ring.a(net_ring_rte_eth_ring.c.o):
> > > in function `rte_eth_from_rings':
> > > (.text+0x91c): undefined reference to `rte_vdev_init'
> > > /usr/bin/ld: 
> > > /usr/lib/gcc/x86_64-linux-gnu/10/../../../x86_64-linux-gnu/librte_pmd_ring.a(net_ring_rte_eth_ring.c.o):
> > > in function `vdrvinitfn_pmd_ring_drv':
> > > (.text.startup+0x28): undefined reference to `rte_vdev_register'
> > > collect2: error: ld returned 1 exit status
> > > 
> > > Also as you can see in the pastebin above, CFlags and Libs massively
> > > shrunk and likely too much so.
> > > 
> > > Given that this should be a stable release I'd ask to back out those
> > > changes so that a test build creates the same .pc file as before -
> > > would that make sense?
> > 
> > Paging Bruce and Ian - IIRC OVS explicitly asked for that series to be
> > backported and took a dependency on it, so removing it might cause
> > breakages for them? Ian?
> > 
> > Bruce, have you see the error reported by Christian before?
> > 
> Nope, but I'll look into it...

I suspect the error is caused by the presence of "-Wl,--no-whole-archive"
immediately after "-Wl,--whole-archive". Now, while the --whole-archive
flag comes from the libdpdk.pc file, I don't know where the
--no-whole-archive comes from to cancel it out. Perhaps someone familiar
with the OVS package build here could suggest a source.

Regards,
/Bruce

Re: [dpdk-dev] [RFC] usertools: Replace dpdk-setup with a python curses based script

[Thomas Monjalon]

18/08/2020 19:09, Stephen Hemminger:
> On Tue, 18 Aug 2020 17:39:19 +0500
> Sarosh Arif  wrote:
> 
> > dpdk-setup has been used for a long time in order to compile and
> > configure dpdk along with running some basic applications. dpdk-setup
> > uses the make build system to compile which is now deprecated. In addition
> > to this it has been discussed on the mailing list a few times that
> > dpdk-setup UI is quite old and it needs improvement along with
> > addition of some other facilities. This had created a need for python
> > curses based script that would provide similar functionality as
> > dpdk-setup but with more options and better UI. The idea is almost similar
> > to kernel's make menuconfig. The reason to select python curses is that it
> > comes as a standard library with python. The script will use the meson build
> > system for compilation.
> > 
> > Here is a link containing suggested UI:
> > https://drive.google.com/file/d/18ngGpO_e-8FYNKjkKqS1IKQSrDDcXSO6/view?usp=sharing
> > 
> > The following options will be present in the Menu and Sub-Menu:
> > 
> > Compile
> > Compile with gcc
> > Compile with icc
> > Compile with clang
> > Compile examples
> > Cross compile
> > arm64_armada_linux_gcc
> > arm64_armv8_linux_gcc
> > arm64_bluefield_linux_gcc
> > arm64_dpaa_linux_gcc
> > arm64_emag_linux_gcc
> > arm64_n1sdp_linux_gcc
> > arm64_octeontx2_linux_gcc
> > arm64_stingray_linux_gcc
> > arm64_thunderx2_linux_gcc
> > Arm64_thunderx_linux_gcc
> > Ppc64le-power8-linux-gcc
> > cross-mingw
> > Hugepages
> > Setup hugepage for non-NUMA
> > Setup hugepages for NUMA
> > Remove hugepage mappings
> > Insert module
> > Setup VFIO permissions
> > VFIO
> > KNI
> > IBG UIO
> > Remove module
> > VFIO
> > KNI
> > IBG UIO
> > Bind and Unbind devices
> > Bind device to IGB UIO
> > Bind device to VFIO
> > Unbind devices from IGB UIO or VFIO driver
> > Display
> > Hugepages info
> > Current device settings
> > Run Applications
> > Test application → prompt user to enter flags and possibly build
> > directory name. Also give a default options for flags
> > Testpmd application → prompt user to enter flags and possibly
> > build directory name. Also give a default options for flags
> > 
> > In addition to this, the user will have the facility to provide any
> > additional flags for compilation if he/she wishes to.
> 
> I would prefer a set of scripts that each do one thing.
> Having a GUI is a lot of overhead to support.

Me too, I prefer simple scripts.
And I prefer even more documenting simple tasks.

We can extract the lines for hugepages settings in a standalone script.
Perhaps doing the same for VFIO setup.
Not sure about the rest.

Re: [dpdk-dev] [PATCH v7 1/3] ethdev: add level support for RSS offload types

[Ferruh Yigit]

On 9/1/2020 4:27 AM, kirankum...@marvell.com wrote:

From: Kiran Kumar K 

This patch reserves 2 bits as input selection to select Inner and
outer encapsulation level for RSS computation. It is combined with existing
ETH_RSS_* to choose Inner or outer layers.
This functionality already exists in rte_flow through level parameter in
RSS action configuration rte_flow_action_rss.

Signed-off-by: Kiran Kumar K 
---
V7 Changes:
* Re-worked to keep it in sync with rte_flow_action_rss and support upto
3 levels.
* Addressed testpmd review comments.

  lib/librte_ethdev/rte_ethdev.h | 27 +++
  1 file changed, 27 insertions(+)

diff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h
index 70295d7ab..13e49bbd7 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -552,6 +552,33 @@ struct rte_eth_rss_conf {
  #define RTE_ETH_RSS_L3_PRE64 (1ULL << 53)
  #define RTE_ETH_RSS_L3_PRE96 (1ULL << 52)

+/*
+ * We use the following macros to combine with the above layers to choose
+ * inner and outer layers or both for RSS computation.
+ * bit 50 and 51 are reserved for this.
+ */
+
+/** level 0, requests the default behavior. Depending on the packet
+ * type, it can mean outermost, innermost, anything in between or even no RSS.
+ * It basically stands for the innermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_0 (0ULL << 50)


I can see from history how this is involved, but the 'ETH_RSS_LEVEL_0' naming is 
not really clear what it is, the naming in v6 is more clear.


What about following one:
0 -> LEVEL_PMD_DEFAULT
1 -> LEVEL_OUTER
2 -> LEVEL_INNER
3 -> LEVEL_INNER_OUTER

This doesn't exactly match to rte_flow one, but closer than v6 one. This ends 
with max level 2. And defines a way to say both inner and outer.



+
+/** level 1,  requests RSS to be performed on the outermost packet
+ * encapsulation level.
+ */
+#define ETH_RSS_LEVEL_1 (1ULL << 50)
+
+/** level 2,  requests RSS to be performed on the
+ * specified inner packet encapsulation level, from outermost to
+ * innermost (lower to higher values).
+ */
+#define ETH_RSS_LEVEL_2(2ULL << 50)


I can see you are trying to copy rte_flow usage, but this doesn't really makes 
sense here. Where the value of the level is defined in this case? If not defined 
how the PMD knows which level to use?



+#define ETH_RSS_LEVEL_MASK (3ULL << 50)
+
+#define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 50)
+
  /**
   * For input set change of hash filter, if SRC_ONLY and DST_ONLY of
   * the same level are used simultaneously, it is the same case as
--
2.25.1

Re: [dpdk-dev] DPDK Experimental Functions

[Thomas Monjalon]

27/08/2020 15:00, Kinsella, Ray:
> Hi All,
> 
> During recent work on the DPDK ABI, where we are looking to develop a nightly 
> ABI regression test. 
> 
> We found a large number of experimental functions currently in DPDK API.
> Currently, there are 537 experimental APIs out of a total of roughly ~1800 
> API, 30%-ish. 
> 
> While there is no correct number, as a percentage of the total, this appears 
> to be very high.
> I would question if all these API are really "new" and warrant the status?
> 
> There are currently 38 libraries and drivers with experimental functions.
> And to be fair there are number of recently added libraries in list, shown 
> below.
> However there are also a number of libraries that have been around a very 
> long time.
> 
> The following libraries and drivers have 10 or more experimental functions:
> 
> 1.rte_eal: 119
> 2.rte_ethdev: 43
> 3.rte_vhost: 42
> 4.rte_graph: 35 (EXPERIMENTAL)
> 5.rte_compressdev: 34
> 6.rte_rib: 28 (EXPERIMENTAL)
> 7.rte_pipeline: 24
> 8.rte_regexdev: 22 (EXPERIMENTAL)
> 9.rte_cryptodev: 18
> 10.   rte_fib: 16 (EXPERIMENTAL)
> 11.   rte_ipsec: 15 (EXPERIMENTAL)
> 12.   rte_telemetry: 12 (EXPERIMENTAL)
> 13.   rte_mbuf: 11
> 14.   rte_rcu: 11 (EXPERIMENTAL)
> 15.   rte_bus_fslmc: 11
> 16.   rte_bpf: 10 (EXPERIMENTAL)
> 
> Do the maintainers of these libraries and drivers, 
> A. Feel that experimental status continues to be warranted against these API?
> B. Have plans in place to move all/some of these functions to stable in the 
> 20.11 timeframe?
> 
> Kudos to Conor Walsh for pulling this data together. 

Do you have a tool to sort experimental functions per age?

Re: [dpdk-dev] [EXT] Re: [PATCH v7 1/3] ethdev: add level support for RSS offload types

[Kiran Kumar Kokkilagadda]

> -Original Message-
> From: Ferruh Yigit 
> Sent: Tuesday, September 1, 2020 7:08 PM
> To: Kiran Kumar Kokkilagadda ; Thomas Monjalon
> ; Andrew Rybchenko 
> Cc: dev@dpdk.org; Jerin Jacob Kollanukkaran ;
> or...@mellanox.com; xuanziya...@huawei.com;
> cloud.wangxiao...@huawei.com; zhouguoy...@huawei.com;
> rosen...@intel.com; beilei.x...@intel.com; jia@intel.com; Rasesh Mody
> ; Shahed Shaikh ; Nithin Kumar
> Dabilpuram ; qiming.y...@intel.com;
> qi.z.zh...@intel.com; keith.wi...@intel.com; hemant.agra...@nxp.com;
> sachin.sax...@nxp.com; wei.zh...@intel.com; johnd...@cisco.com;
> hyon...@cisco.com; ch...@att.com; ma...@mellanox.com;
> shah...@mellanox.com; viachesl...@mellanox.com;
> rahul.lakkire...@chelsio.com; gr...@u256.net; Liron Himi
> ; jingjing...@intel.com; xavier.hu...@huawei.com;
> humi...@huawei.com; yisen.zhu...@huawei.com;
> ajit.khapa...@broadcom.com; somnath.ko...@broadcom.com;
> jasvinder.si...@intel.com; cristian.dumitre...@intel.com
> Subject: [EXT] Re: [dpdk-dev][PATCH v7 1/3] ethdev: add level support for RSS
> offload types
> 
> External Email
> 
> --
> On 9/1/2020 4:27 AM, kirankum...@marvell.com wrote:
> > From: Kiran Kumar K 
> >
> > This patch reserves 2 bits as input selection to select Inner and
> > outer encapsulation level for RSS computation. It is combined with
> > existing
> > ETH_RSS_* to choose Inner or outer layers.
> > This functionality already exists in rte_flow through level parameter
> > in RSS action configuration rte_flow_action_rss.
> >
> > Signed-off-by: Kiran Kumar K 
> > ---
> > V7 Changes:
> > * Re-worked to keep it in sync with rte_flow_action_rss and support
> > upto
> > 3 levels.
> > * Addressed testpmd review comments.
> >
> >   lib/librte_ethdev/rte_ethdev.h | 27 +++
> >   1 file changed, 27 insertions(+)
> >
> > diff --git a/lib/librte_ethdev/rte_ethdev.h
> > b/lib/librte_ethdev/rte_ethdev.h index 70295d7ab..13e49bbd7 100644
> > --- a/lib/librte_ethdev/rte_ethdev.h
> > +++ b/lib/librte_ethdev/rte_ethdev.h
> > @@ -552,6 +552,33 @@ struct rte_eth_rss_conf {
> >   #define RTE_ETH_RSS_L3_PRE64 (1ULL << 53)
> >   #define RTE_ETH_RSS_L3_PRE96 (1ULL << 52)
> >
> > +/*
> > + * We use the following macros to combine with the above layers to
> > +choose
> > + * inner and outer layers or both for RSS computation.
> > + * bit 50 and 51 are reserved for this.
> > + */
> > +
> > +/** level 0, requests the default behavior. Depending on the packet
> > + * type, it can mean outermost, innermost, anything in between or even no
> RSS.
> > + * It basically stands for the innermost encapsulation level RSS
> > + * can be performed on according to PMD and device capabilities.
> > + */
> > +#define ETH_RSS_LEVEL_0 (0ULL << 50)
> 
> I can see from history how this is involved, but the 'ETH_RSS_LEVEL_0' naming 
> is
> not really clear what it is, the naming in v6 is more clear.
> 
> What about following one:
> 0 -> LEVEL_PMD_DEFAULT
> 1 -> LEVEL_OUTER
> 2 -> LEVEL_INNER
> 3 -> LEVEL_INNER_OUTER
> 
> This doesn't exactly match to rte_flow one, but closer than v6 one. This ends
> with max level 2. And defines a way to say both inner and outer.

This one looks good to me. If everyone is ok with the proposed changes, I will 
send V8.

> 
> > +
> > +/** level 1,  requests RSS to be performed on the outermost packet
> > + * encapsulation level.
> > + */
> > +#define ETH_RSS_LEVEL_1 (1ULL << 50)
> > +
> > +/** level 2,  requests RSS to be performed on the
> > + * specified inner packet encapsulation level, from outermost to
> > + * innermost (lower to higher values).
> > + */
> > +#define ETH_RSS_LEVEL_2(2ULL << 50)
> 
> I can see you are trying to copy rte_flow usage, but this doesn't really makes
> sense here. Where the value of the level is defined in this case? If not 
> defined
> how the PMD knows which level to use?
> 
> > +#define ETH_RSS_LEVEL_MASK (3ULL << 50)
> > +
> > +#define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 50)
> > +
> >   /**
> >* For input set change of hash filter, if SRC_ONLY and DST_ONLY of
> >* the same level are used simultaneously, it is the same case as
> > --
> > 2.25.1
> >

Re: [dpdk-dev] [EXT] Re: [PATCH v7 1/3] ethdev: add level support for RSS offload types

[Ferruh Yigit]

On 9/1/2020 3:27 PM, Kiran Kumar Kokkilagadda wrote:




-Original Message-
From: Ferruh Yigit 
Sent: Tuesday, September 1, 2020 7:08 PM
To: Kiran Kumar Kokkilagadda ; Thomas Monjalon
; Andrew Rybchenko 
Cc: dev@dpdk.org; Jerin Jacob Kollanukkaran ;
or...@mellanox.com; xuanziya...@huawei.com;
cloud.wangxiao...@huawei.com; zhouguoy...@huawei.com;
rosen...@intel.com; beilei.x...@intel.com; jia@intel.com; Rasesh Mody
; Shahed Shaikh ; Nithin Kumar
Dabilpuram ; qiming.y...@intel.com;
qi.z.zh...@intel.com; keith.wi...@intel.com; hemant.agra...@nxp.com;
sachin.sax...@nxp.com; wei.zh...@intel.com; johnd...@cisco.com;
hyon...@cisco.com; ch...@att.com; ma...@mellanox.com;
shah...@mellanox.com; viachesl...@mellanox.com;
rahul.lakkire...@chelsio.com; gr...@u256.net; Liron Himi
; jingjing...@intel.com; xavier.hu...@huawei.com;
humi...@huawei.com; yisen.zhu...@huawei.com;
ajit.khapa...@broadcom.com; somnath.ko...@broadcom.com;
jasvinder.si...@intel.com; cristian.dumitre...@intel.com
Subject: [EXT] Re: [dpdk-dev][PATCH v7 1/3] ethdev: add level support for RSS
offload types

External Email

--
On 9/1/2020 4:27 AM, kirankum...@marvell.com wrote:

From: Kiran Kumar K 

This patch reserves 2 bits as input selection to select Inner and
outer encapsulation level for RSS computation. It is combined with
existing
ETH_RSS_* to choose Inner or outer layers.
This functionality already exists in rte_flow through level parameter
in RSS action configuration rte_flow_action_rss.

Signed-off-by: Kiran Kumar K 
---
V7 Changes:
* Re-worked to keep it in sync with rte_flow_action_rss and support
upto
3 levels.
* Addressed testpmd review comments.

   lib/librte_ethdev/rte_ethdev.h | 27 +++
   1 file changed, 27 insertions(+)

diff --git a/lib/librte_ethdev/rte_ethdev.h
b/lib/librte_ethdev/rte_ethdev.h index 70295d7ab..13e49bbd7 100644
--- a/lib/librte_ethdev/rte_ethdev.h
+++ b/lib/librte_ethdev/rte_ethdev.h
@@ -552,6 +552,33 @@ struct rte_eth_rss_conf {
   #define RTE_ETH_RSS_L3_PRE64(1ULL << 53)
   #define RTE_ETH_RSS_L3_PRE96(1ULL << 52)

+/*
+ * We use the following macros to combine with the above layers to
+choose
+ * inner and outer layers or both for RSS computation.
+ * bit 50 and 51 are reserved for this.
+ */
+
+/** level 0, requests the default behavior. Depending on the packet
+ * type, it can mean outermost, innermost, anything in between or even no

RSS.

+ * It basically stands for the innermost encapsulation level RSS
+ * can be performed on according to PMD and device capabilities.
+ */
+#define ETH_RSS_LEVEL_0 (0ULL << 50)


I can see from history how this is involved, but the 'ETH_RSS_LEVEL_0' naming is
not really clear what it is, the naming in v6 is more clear.

What about following one:
0 -> LEVEL_PMD_DEFAULT
1 -> LEVEL_OUTER
2 -> LEVEL_INNER
3 -> LEVEL_INNER_OUTER

This doesn't exactly match to rte_flow one, but closer than v6 one. This ends
with max level 2. And defines a way to say both inner and outer.


This one looks good to me. If everyone is ok with the proposed changes, I will 
send V8.



Let's wait for more comments before v8.




+
+/** level 1,  requests RSS to be performed on the outermost packet
+ * encapsulation level.
+ */
+#define ETH_RSS_LEVEL_1 (1ULL << 50)
+
+/** level 2,  requests RSS to be performed on the
+ * specified inner packet encapsulation level, from outermost to
+ * innermost (lower to higher values).
+ */
+#define ETH_RSS_LEVEL_2(2ULL << 50)


I can see you are trying to copy rte_flow usage, but this doesn't really makes
sense here. Where the value of the level is defined in this case? If not defined
how the PMD knows which level to use?


+#define ETH_RSS_LEVEL_MASK (3ULL << 50)
+
+#define ETH_RSS_LEVEL(rss_hf) ((rss_hf & ETH_RSS_LEVEL_MASK) >> 50)
+
   /**
* For input set change of hash filter, if SRC_ONLY and DST_ONLY of
* the same level are used simultaneously, it is the same case as
--
2.25.1

[dpdk-dev] [PATCH] lib/ipsec: remove experimental tag

[Conor Walsh]

Since librte_ipsec was first introduced in 19.02 and there were no changes
in it's public API since 19.11, it should be considered mature enough to
remove the 'experimental' tag from it.

Signed-off-by: Conor Walsh 
---
 MAINTAINERS| 2 +-
 lib/librte_ipsec/rte_ipsec.h   | 8 
 lib/librte_ipsec/rte_ipsec_group.h | 3 ---
 lib/librte_ipsec/rte_ipsec_sa.h| 5 -
 lib/librte_ipsec/rte_ipsec_sad.h   | 7 ---
 lib/librte_ipsec/rte_ipsec_version.map | 2 +-
 6 files changed, 2 insertions(+), 25 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index ed163f5d5..f66772908 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1286,7 +1286,7 @@ M: Jiayu Hu 
 F: lib/librte_gso/
 F: doc/guides/prog_guide/generic_segmentation_offload_lib.rst
 
-IPsec - EXPERIMENTAL
+IPsec
 M: Konstantin Ananyev 
 T: git://dpdk.org/next/dpdk-next-crypto
 F: lib/librte_ipsec/
diff --git a/lib/librte_ipsec/rte_ipsec.h b/lib/librte_ipsec/rte_ipsec.h
index de05f4e93..dd60d9591 100644
--- a/lib/librte_ipsec/rte_ipsec.h
+++ b/lib/librte_ipsec/rte_ipsec.h
@@ -10,10 +10,6 @@
  *
  * RTE IPsec support.
  *
- * @warning
- * @b EXPERIMENTAL:
- * All functions in this file may be changed or removed without prior notice.
- *
  * librte_ipsec provides a framework for data-path IPsec protocol
  * processing (ESP/AH).
  */
@@ -94,7 +90,6 @@ struct rte_ipsec_session {
  *   - Zero if operation completed successfully.
  *   - -EINVAL if the parameters are invalid.
  */
-__rte_experimental
 int
 rte_ipsec_session_prepare(struct rte_ipsec_session *ss);
 
@@ -119,7 +114,6 @@ rte_ipsec_session_prepare(struct rte_ipsec_session *ss);
  * @return
  *   Number of successfully processed packets, with error code set in 
rte_errno.
  */
-__rte_experimental
 static inline uint16_t
 rte_ipsec_pkt_crypto_prepare(const struct rte_ipsec_session *ss,
struct rte_mbuf *mb[], struct rte_crypto_op *cop[], uint16_t num)
@@ -127,7 +121,6 @@ rte_ipsec_pkt_crypto_prepare(const struct rte_ipsec_session 
*ss,
return ss->pkt_func.prepare.async(ss, mb, cop, num);
 }
 
-__rte_experimental
 static inline uint16_t
 rte_ipsec_pkt_cpu_prepare(const struct rte_ipsec_session *ss,
struct rte_mbuf *mb[], uint16_t num)
@@ -158,7 +151,6 @@ rte_ipsec_pkt_cpu_prepare(const struct rte_ipsec_session 
*ss,
  * @return
  *   Number of successfully processed packets, with error code set in 
rte_errno.
  */
-__rte_experimental
 static inline uint16_t
 rte_ipsec_pkt_process(const struct rte_ipsec_session *ss, struct rte_mbuf 
*mb[],
uint16_t num)
diff --git a/lib/librte_ipsec/rte_ipsec_group.h 
b/lib/librte_ipsec/rte_ipsec_group.h
index 47b33ca5e..ea3bdfad9 100644
--- a/lib/librte_ipsec/rte_ipsec_group.h
+++ b/lib/librte_ipsec/rte_ipsec_group.h
@@ -7,7 +7,6 @@
 
 /**
  * @file rte_ipsec_group.h
- * @b EXPERIMENTAL: this API may change without prior notice
  *
  * RTE IPsec support.
  * It is not recommended to include this file directly,
@@ -42,7 +41,6 @@ struct rte_ipsec_group {
  * @return
  *   The pointer to the related *rte_ipsec_session* structure.
  */
-__rte_experimental
 static inline struct rte_ipsec_session *
 rte_ipsec_ses_from_crypto(const struct rte_crypto_op *cop)
 {
@@ -79,7 +77,6 @@ rte_ipsec_ses_from_crypto(const struct rte_crypto_op *cop)
  * @return
  *   Number of filled elements in *grp* array.
  */
-__rte_experimental
 static inline uint16_t
 rte_ipsec_pkt_crypto_group(const struct rte_crypto_op *cop[],
struct rte_mbuf *mb[], struct rte_ipsec_group grp[], uint16_t num)
diff --git a/lib/librte_ipsec/rte_ipsec_sa.h b/lib/librte_ipsec/rte_ipsec_sa.h
index 1cfde5874..678cdc140 100644
--- a/lib/librte_ipsec/rte_ipsec_sa.h
+++ b/lib/librte_ipsec/rte_ipsec_sa.h
@@ -7,7 +7,6 @@
 
 /**
  * @file rte_ipsec_sa.h
- * @b EXPERIMENTAL: this API may change without prior notice
  *
  * Defines API to manage IPsec Security Association (SA) objects.
  */
@@ -132,7 +131,6 @@ enum {
  * @return
  *   SA type value.
  */
-__rte_experimental
 uint64_t
 rte_ipsec_sa_type(const struct rte_ipsec_sa *sa);
 
@@ -144,7 +142,6 @@ rte_ipsec_sa_type(const struct rte_ipsec_sa *sa);
  *   - Actual size required for SA with given parameters.
  *   - -EINVAL if the parameters are invalid.
  */
-__rte_experimental
 int
 rte_ipsec_sa_size(const struct rte_ipsec_sa_prm *prm);
 
@@ -161,7 +158,6 @@ rte_ipsec_sa_size(const struct rte_ipsec_sa_prm *prm);
  *   - -EINVAL if the parameters are invalid.
  *   - -ENOSPC if the size of the provided buffer is not big enough.
  */
-__rte_experimental
 int
 rte_ipsec_sa_init(struct rte_ipsec_sa *sa, const struct rte_ipsec_sa_prm *prm,
uint32_t size);
@@ -171,7 +167,6 @@ rte_ipsec_sa_init(struct rte_ipsec_sa *sa, const struct 
rte_ipsec_sa_prm *prm,
  * @param sa
  *   Pointer to SA object to de-initialize.
  */
-__rte_experimental
 void
 rte_ipsec_sa_fini(struct rte_ipsec_sa *sa);
 
diff --git a/lib/librte_ipsec/rte_ipsec_sad.h b/lib/librte_ipsec/rte_ipsec_sad.h
index dcc822

[dpdk-dev] [PATCH] lib/bpf: remove experimental tag

[Conor Walsh]

The BPF lib was introduced in 18.05.
There were no changes in it's public API since 19.11.
It should be mature enough to remove it's 'experimental' tag.

Signed-off-by: Conor Walsh 
---
 MAINTAINERS|  2 +-
 lib/librte_bpf/rte_bpf.h   | 10 --
 lib/librte_bpf/rte_bpf_ethdev.h|  5 -
 lib/librte_bpf/rte_bpf_version.map |  2 +-
 4 files changed, 2 insertions(+), 17 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index f66772908..a14347f04 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1492,7 +1492,7 @@ F: app/test/test_telemetry*
 F: usertools/dpdk-telemetry*
 F: doc/guides/howto/telemetry.rst
 
-BPF - EXPERIMENTAL
+BPF
 M: Konstantin Ananyev 
 F: lib/librte_bpf/
 F: examples/bpf/
diff --git a/lib/librte_bpf/rte_bpf.h b/lib/librte_bpf/rte_bpf.h
index e2d419b4e..be17b830e 100644
--- a/lib/librte_bpf/rte_bpf.h
+++ b/lib/librte_bpf/rte_bpf.h
@@ -10,10 +10,6 @@
  *
  * RTE BPF support.
  *
- * @warning
- * @b EXPERIMENTAL:
- * All functions in this file may be changed or removed without prior notice.
- *
  * librte_bpf provides a framework to load and execute eBPF bytecode
  * inside user-space dpdk based applications.
  * It supports basic set of features from eBPF spec
@@ -117,7 +113,6 @@ struct rte_bpf;
  * @param bpf
  *   BPF handle to destroy.
  */
-__rte_experimental
 void
 rte_bpf_destroy(struct rte_bpf *bpf);
 
@@ -133,7 +128,6 @@ rte_bpf_destroy(struct rte_bpf *bpf);
  *   - EINVAL - invalid parameter passed to function
  *   - ENOMEM - can't reserve enough memory
  */
-__rte_experimental
 struct rte_bpf *
 rte_bpf_load(const struct rte_bpf_prm *prm);
 
@@ -157,7 +151,6 @@ rte_bpf_load(const struct rte_bpf_prm *prm);
  *   - EINVAL - invalid parameter passed to function
  *   - ENOMEM - can't reserve enough memory
  */
-__rte_experimental
 struct rte_bpf *
 rte_bpf_elf_load(const struct rte_bpf_prm *prm, const char *fname,
const char *sname);
@@ -171,7 +164,6 @@ rte_bpf_elf_load(const struct rte_bpf_prm *prm, const char 
*fname,
  * @return
  *   BPF execution return value.
  */
-__rte_experimental
 uint64_t
 rte_bpf_exec(const struct rte_bpf *bpf, void *ctx);
 
@@ -189,7 +181,6 @@ rte_bpf_exec(const struct rte_bpf *bpf, void *ctx);
  * @return
  *   number of successfully processed inputs.
  */
-__rte_experimental
 uint32_t
 rte_bpf_exec_burst(const struct rte_bpf *bpf, void *ctx[], uint64_t rc[],
uint32_t num);
@@ -205,7 +196,6 @@ rte_bpf_exec_burst(const struct rte_bpf *bpf, void *ctx[], 
uint64_t rc[],
  *   - -EINVAL if the parameters are invalid.
  *   - Zero if operation completed successfully.
  */
-__rte_experimental
 int
 rte_bpf_get_jit(const struct rte_bpf *bpf, struct rte_bpf_jit *jit);
 
diff --git a/lib/librte_bpf/rte_bpf_ethdev.h b/lib/librte_bpf/rte_bpf_ethdev.h
index 0ce526e39..135062c9e 100644
--- a/lib/librte_bpf/rte_bpf_ethdev.h
+++ b/lib/librte_bpf/rte_bpf_ethdev.h
@@ -7,7 +7,6 @@
 
 /**
  * @file rte_bpf_ethdev.h
- * @b EXPERIMENTAL: this API may change without prior notice
  *
  * API to install BPF filter as RX/TX callbacks for eth devices.
  * Note that right now:
@@ -45,7 +44,6 @@ enum {
  * @param queue
  *   The identifier of the RX queue on the given port
  */
-__rte_experimental
 void
 rte_bpf_eth_rx_unload(uint16_t port, uint16_t queue);
 
@@ -58,7 +56,6 @@ rte_bpf_eth_rx_unload(uint16_t port, uint16_t queue);
  * @param queue
  *   The identifier of the TX queue on the given port
  */
-__rte_experimental
 void
 rte_bpf_eth_tx_unload(uint16_t port, uint16_t queue);
 
@@ -82,7 +79,6 @@ rte_bpf_eth_tx_unload(uint16_t port, uint16_t queue);
  * @return
  *   Zero on successful completion or negative error code otherwise.
  */
-__rte_experimental
 int
 rte_bpf_eth_rx_elf_load(uint16_t port, uint16_t queue,
const struct rte_bpf_prm *prm, const char *fname, const char *sname,
@@ -108,7 +104,6 @@ rte_bpf_eth_rx_elf_load(uint16_t port, uint16_t queue,
  * @return
  *   Zero on successful completion or negative error code otherwise.
  */
-__rte_experimental
 int
 rte_bpf_eth_tx_elf_load(uint16_t port, uint16_t queue,
const struct rte_bpf_prm *prm, const char *fname, const char *sname,
diff --git a/lib/librte_bpf/rte_bpf_version.map 
b/lib/librte_bpf/rte_bpf_version.map
index a203e088e..b75a0034b 100644
--- a/lib/librte_bpf/rte_bpf_version.map
+++ b/lib/librte_bpf/rte_bpf_version.map
@@ -1,4 +1,4 @@
-EXPERIMENTAL {
+DPDK_21 {
global:
 
rte_bpf_destroy;
-- 
2.25.1

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[dpdk-dev] [PATCH] doc: add index file to doxygen dependencies

[Bruce Richardson]

The doxygen index file is not printed as a processed file by doxygen so it
does not appear in the output .d (dependency file) list automatically
generated. Therefore, for correct rebuild tracking, we need to explicitly
include it as a dependency of the doxygen job.

Signed-off-by: Bruce Richardson 
---
 doc/api/meson.build | 1 +
 1 file changed, 1 insertion(+)

diff --git a/doc/api/meson.build b/doc/api/meson.build
index 49d5b9a15..5b92c204f 100644
--- a/doc/api/meson.build
+++ b/doc/api/meson.build
@@ -44,6 +44,7 @@ doxy_conf = configure_file(input: 'doxy-api.conf.in',
 
 doxy_build = custom_target('doxygen',
depends: example,
+   depend_files: 'doxy-api-index.md',
input: doxy_conf,
output: 'api',
depfile: 'api.d',
-- 
2.25.1