date:20190602

Re: [dpdk-dev] [PATCH] net/mlx5: fix order of items in neon scatter func

2019-06-02 Thread Shahaf Shuler

Monday, May 27, 2019 9:50 AM, Dekel Peled:
> Subject: RE: [dpdk-dev] [PATCH] net/mlx5: fix order of items in neon scatter
> func
> 
> PSB, thanks.
> 
> > -Original Message-
> > From: Shahaf Shuler
> > Sent: Sunday, May 26, 2019 9:49 PM
> > To: Dekel Peled ; Yongseok Koh
> > 
> > Cc: dev@dpdk.org; sta...@dpdk.org
> > Subject: RE: [dpdk-dev] [PATCH] net/mlx5: fix order of items in neon
> > scatter func
> >
> > Wednesday, May 15, 2019 1:08 PM, Dekel Peled:
> > > Subject: [dpdk-dev] [PATCH] net/mlx5: fix order of items in neon
> > > scatter func
> > >
> > > Previous patch added handling of metadata for multi-segment packet.
> > > Function txq_scatter_v in file mlx5_rxtx_vec_neon.h was updated
> > > incorrectly, items were inserted into WQE in wrong order.
> > >
> > > This patch fixes the issue, inserting items into WQE correctly.
> > >
> > > Fixes: 7f4019d370f6 ("net/mlx5: fix Tx metadata for multi-segment
> > > packet")
> > > Cc: sta...@dpdk.org
> > >
> > > Signed-off-by: Dekel Peled 
> > > ---
> > >  drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 2 +-
> > >  1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
> > > b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
> > > index 38e915c..b1e0e8f 100644
> > > --- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
> > > +++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h
> > > @@ -171,7 +171,7 @@
> > >   /* Fill ESEG in the header. */
> > >   vst1q_u32((void *)(t_wqe + 1),
> > > ((uint32x4_t){ 0,
> > > -  cs_flags << 16 |
> > > rte_cpu_to_be_16(len),
> > > +  rte_cpu_to_be_16(len) << 16 |
> > > cs_flags,
> >
> > It was probably not introduced by the previous patch, but since you
> > touch this area:
> > Why do you set the mss (len)? This function handles only non-TSO packets.
> 
> mss is set to 0 in txq_burst_v, which sends single segment packets.
> This change is in txq_scatter_v which sends multi-segmented packets.

Thanks for the clarification, 
Applied to next-net-mlx, thanks. 

> 
> >
> > >metadata, 0 }));
> > >   txq->wqe_ci = wqe_ci;
> > >   }
> > > --
> > > 1.8.3.1

Re: [dpdk-dev] [PATCH v2] net/mlx5: fix event handler uninstall

2019-06-02 Thread Shahaf Shuler

Monday, May 27, 2019 7:59 AM, Viacheslav Ovsiienko:
> Subject: [dpdk-dev] [PATCH v2] net/mlx5: fix event handler uninstall
> 
> When device is being closed and tries to unregister interrupt callback, there 
> is
> a chance the handler is still active (called in context of 
> eal_intr_thread_main
> thread). If so the rte_intr_callback_unregister returns -EAGAIN and keeps
> the handler registered, causing crash when underlaying resourse is gone
> away.
> 
> This race condition may happen if event handling in application takes a long
> time. We should check the return code of unregistering routine and try again
> to unregister the handler. The diagnostic messages are shown once a
> second, while trying to unregister.
> 
> Fixes: 028b2a28c3cb ("net/mlx5: update event handler for multiport IB
> devices")
> 
> Signed-off-by: Viacheslav Ovsiienko 
> Acked-by: Yongseok Koh 

Applied to next-net-mlx, thanks.

Re: [dpdk-dev] [PATCH v5 0/3] add actions to modify header fields

2019-06-02 Thread Dekel Peled

Hi, 

Please review/comment on v5 of this series so it can be accepted.
http://patches.dpdk.org/cover/52974/

Regards,
Dekel

> -Original Message-
> From: Dekel Peled 
> Sent: Monday, April 22, 2019 2:23 PM
> To: Adrien Mazarguil ;
> wenzhuo...@intel.com; jingjing...@intel.com;
> bernard.iremon...@intel.com; Yongseok Koh ;
> Shahaf Shuler ; arybche...@solarflare.com
> Cc: dev@dpdk.org; Ori Kam ; Dekel Peled
> 
> Subject: [PATCH v5 0/3] add actions to modify header fields
> 
> Patch [1] implemented set of header modification actions in MLX PMD,
> based on ethdev and testpmd updates included in [2].
> This series implements support of additional header modification actions, in
> ethdev, testpmd, and MLX5 PMD.
> 
> Original work by Xiaoyu Min.
> 
> [1] http://patches.dpdk.org/patch/49310/
> [2] http://mails.dpdk.org/archives/dev/2018-August/109672.html
> 
> ---
> v2: apply code review comments.
> v3: apply additional code review comments.
> - Update documentation of new commands.
> - Use common general struct for all commands.
> v4: apply checkpatch comments.
> v5: apply additional code review comments.
> - Add 8, 16, 32 bit types to union.
> - Update struct name and documentation.
> ---
> 
> Dekel Peled (3):
>   ethdev: add actions to modify TCP header fields
>   app/testpmd: add actions to modify TCP header fields
>   net/mlx5: update modify header using Direct Verbs
> 
>  app/test-pmd/cmdline_flow.c | 100 
>  doc/guides/prog_guide/rte_flow.rst  |  68 
>  doc/guides/testpmd_app_ug/testpmd_funcs.rst |  16 ++
>  drivers/net/mlx5/mlx5_flow.h|  10 +-
>  drivers/net/mlx5/mlx5_flow_dv.c | 239
> 
>  drivers/net/mlx5/mlx5_prm.h |  12 ++
>  lib/librte_ethdev/rte_flow.c|   4 +
>  lib/librte_ethdev/rte_flow.h|  61 +++
>  8 files changed, 509 insertions(+), 1 deletion(-)
> 
> --
> 1.8.3.1

Re: [dpdk-dev] [PATCH] net/softnic: fix pipeline time calculation

2019-06-02 Thread Wang, Xiao W




> -Original Message-
> From: Singh, Jasvinder
> Sent: Friday, May 31, 2019 10:46 PM
> To: Wang, Xiao W 
> Cc: dev@dpdk.org; Dumitrescu, Cristian ;
> sta...@dpdk.org
> Subject: RE: [PATCH] net/softnic: fix pipeline time calculation
> 
> 
> 
> > -Original Message-
> > From: Wang, Xiao W
> > Sent: Wednesday, May 15, 2019 2:59 PM
> > To: Singh, Jasvinder 
> > Cc: dev@dpdk.org; Dumitrescu, Cristian ;
> > Wang, Xiao W ; sta...@dpdk.org
> > Subject: [PATCH] net/softnic: fix pipeline time calculation
> >
> > When a new pipeline is added to a thread, the "time_next_min" value may
> > need update, otherwise this pipeline won't get served timely.
> >
> > Fixes: 70709c78fda6 ("net/softnic: add command to enable/disable pipeline")
> > Cc: sta...@dpdk.org
> >
> > Signed-off-by: Xiao Wang 
> > ---
> >  drivers/net/softnic/rte_eth_softnic_thread.c | 6 ++
> >  1 file changed, 6 insertions(+)
> >
> > diff --git a/drivers/net/softnic/rte_eth_softnic_thread.c
> > b/drivers/net/softnic/rte_eth_softnic_thread.c
> > index 855408e98..2b482117d 100644
> > --- a/drivers/net/softnic/rte_eth_softnic_thread.c
> > +++ b/drivers/net/softnic/rte_eth_softnic_thread.c
> > @@ -337,6 +337,9 @@ softnic_thread_pipeline_enable(struct
> pmd_internals
> > *softnic,
> > tdp->timer_period = (rte_get_tsc_hz() * p->timer_period_ms)
> /
> > 1000;
> > tdp->time_next = rte_get_tsc_cycles() + tdp->timer_period;
> >
> > +   if (tdp->time_next < td->time_next_min)
> > +   td->time_next_min = tdp->time_next;
> > +
> > td->n_pipelines++;
> >
> > /* Pipeline */
> > @@ -522,6 +525,9 @@ thread_msg_handle_pipeline_enable(struct
> > softnic_thread_data *t,
> > (rte_get_tsc_hz() * req->pipeline_enable.timer_period_ms) /
> > 1000;
> > p->time_next = rte_get_tsc_cycles() + p->timer_period;
> >
> > +   if (p->time_next < t->time_next_min)
> > +   t->time_next_min = p->time_next;
> > +
> > t->n_pipelines++;
> >
> > /* Response */
> > --
> > 2.15.1
> 
> 
> Hi Wang,
> 
> Timer values for pipelines and thread level message handlers are already
> adjusted in runtime function rte_pmd_softnic_run_internal(). In runtime
> function, the values of t->time_next_min is updated as well. IMO, above
> changes not needed. Could you help with the case where timer adjustments in
> runtime not working?

Hi Jasvinder,

the values of t->time_next_min is updated only when the pipeline message and 
thread message get handled, but not when the pipeline is added to that thread. 
E.g. when a thread t->time_next_min is ~100ms later, and a new pipeline is 
added to that thread with timer_period_ms parameter set to 10ms, then this 
pipeline's control message will not be served until 100ms later.

BRs,
Xiao

> 
> Thanks,
> Jasvinder
>

[dpdk-dev] [Bug 290] RX packets in Virtio are corrupted in case of split to several mbufs

2019-06-02 Thread bugzilla

https://bugs.dpdk.org/show_bug.cgi?id=290

Bug ID: 290
   Summary: RX packets in Virtio are corrupted in case of split to
several mbufs
   Product: DPDK
   Version: 19.05
  Hardware: All
OS: All
Status: CONFIRMED
  Severity: normal
  Priority: Normal
 Component: vhost/virtio
  Assignee: dev@dpdk.org
  Reporter: ybrus...@cisco.com
CC: gavin...@arm.com, maxime.coque...@redhat.com
  Target Milestone: ---

Hi,

Starting from this commit - bcac5aa207f896c46963b2ac0a06bc09b1e912a5, RX
packets that are split to several mbufs are corrupted.

For example, we are using 2KB mbufs, and sending Jumbo packets (~9k).
After several received packets we got bad packet:

RX pkt #1
dump mbuf at 0x1f5082300, iova=266c82380, buf_len=2112
  pkt_len=9230, ol_flags=0, nb_segs=5, in_port=0
  segment at 0x1f5082300, data=0x1f50823c0, data_len=2048
  Dump data at [0x1f50823c0], len=16
: 16 58 82 41 3C CF E2 D1 D5 84 5A 99 08 00 45 00 | .X.A<.Z...E.
  segment at 0x1f50819c0, data=0x1f5081a74, data_len=2060
  segment at 0x1f5081080, data=0x1f5081134, data_len=2060
  segment at 0x1f5080740, data=0x1f50807f4, data_len=2060
  segment at 0x1f507fe00, data=0x1f507feb4, data_len=1002
RX pkt #2
dump mbuf at 0x1f507f4c0, iova=266c7f540, buf_len=2112
  pkt_len=9230, ol_flags=0, nb_segs=5, in_port=0
  segment at 0x1f507f4c0, data=0x1f507f580, data_len=2048
  Dump data at [0x1f507f580], len=16
: 16 58 82 41 3C CF E2 D1 D5 84 5A 99 08 00 45 00 | .X.A<.Z...E.
  segment at 0x1f507eb80, data=0x1f507ec34, data_len=2060
  segment at 0x1f506fb00, data=0x1f506fbb4, data_len=2060
  segment at 0x1f5095440, data=0x1f50954f4, data_len=2060
  segment at 0x1f5094b00, data=0x1f5094bb4, data_len=1002
RX pkt #3
dump mbuf at 0x1f507c680, iova=266c7c700, buf_len=2112
  pkt_len=9230, ol_flags=0, nb_segs=5, in_port=0
  segment at 0x1f507c680, data=0x1f507c740, data_len=2048
  Dump data at [0x1f507c740], len=16
: 16 58 82 41 3C CF E2 D1 D5 84 5A 99 08 00 45 00 | .X.A<.Z...E.
  segment at 0x1f507bd40, data=0x1f507bdf4, data_len=2060
  segment at 0x1f507b400, data=0x1f507b4b4, data_len=2060
  segment at 0x1f507aac0, data=0x1f507ab74, data_len=2060
  segment at 0x1f507a180, data=0x1f507a234, data_len=1002
RX pkt #4
dump mbuf at 0x1f5079840, iova=266c798c0, buf_len=2112
  pkt_len=9230, ol_flags=0, nb_segs=5, in_port=0
  segment at 0x1f5079840, data=0x1f5079900, data_len=2048
  Dump data at [0x1f5079900], len=16
: 16 58 82 41 3C CF E2 D1 D5 84 5A 99 08 00 45 00 | .X.A<.Z...E.
  segment at 0x1f5078f00, data=0x1f5078fb4, data_len=2060
  segment at 0x1f50785c0, data=0x1f5078674, data_len=2060
  segment at 0x1f5077c80, data=0x1f5077d34, data_len=2060
  segment at 0x1f5077340, data=0x1f50773f4, data_len=1002
RX pkt #5
dump mbuf at 0x1f5076a00, iova=266c76a80, buf_len=2112
  pkt_len=9230, ol_flags=0, nb_segs=5, in_port=0
  segment at 0x1f5076a00, data=0x1f5076ac0, data_len=2048
  Dump data at [0x1f5076ac0], len=16
: 16 58 82 41 3C CF E2 D1 D5 84 5A 99 08 00 45 00 | .X.A<.Z...E.
  segment at 0x1f50760c0, data=0x1f5076174, data_len=2060
  segment at 0x1f5075780, data=0x1f5075834, data_len=2060
  segment at 0x1f5074e40, data=0x1f5074ef4, data_len=2060
  segment at 0x1f5074500, data=0x1f50745b4, data_len=1002
RX pkt #6
dump mbuf at 0x1f5073bc0, iova=266c73c40, buf_len=2112
  pkt_len=9230, ol_flags=0, nb_segs=5, in_port=0
  segment at 0x1f5073bc0, data=0x1f5073c80, data_len=2048
  Dump data at [0x1f5073c80], len=16
: 16 58 82 41 3C CF E2 D1 D5 84 5A 99 08 00 45 00 | .X.A<.Z...E.
  segment at 0x1f5073280, data=0x1f5073334, data_len=2060
  segment at 0x1f5072940, data=0x1f50729f4, data_len=2060
  segment at 0x1f5072000, data=0x1f50720b4, data_len=2060
  segment at 0x1f50716c0, data=0x1f5071774, data_len=1002
RX pkt #7
dump mbuf at 0x1f5070d80, iova=266c70e00, buf_len=2112
  pkt_len=9230, ol_flags=0, nb_segs=5, in_port=0
  segment at 0x1f5070d80, data=0x1f5070e40, data_len=2048
  Dump data at [0x1f5070e40], len=16
: 16 58 82 41 3C CF E2 D1 D5 84 5A 99 08 00 45 00 | .X.A<.Z...E.
  segment at 0x1f5070440, data=0x1f50704f4, data_len=2060
 total packets length is not valid: pkt_len: 9230, sum of data_len: 4108
 #seg is not valid, written in mbuf: 5, actual count: 2


As a workaround, we will use 9KB mbufs for now...

Thanks,
Yaroslav.

-- 
You are receiving this mail because:
You are the assignee for the bug.

[dpdk-dev] [PATCH v1 01/58] net/octeontx2: add build infrastructure

2019-06-02 Thread jerinj

From: Jerin Jacob 

Adding bare minimum PMD library and doc build infrastructure.

Signed-off-by: Jerin Jacob 
Signed-off-by: Kiran Kumar K 
Signed-off-by: Pavan Nikhilesh 
---
 config/common_base|  5 +++
 doc/guides/nics/features/octeontx2.ini|  8 
 doc/guides/nics/features/octeontx2_vec.ini|  8 
 doc/guides/nics/features/octeontx2_vf.ini |  8 
 drivers/net/Makefile  |  1 +
 drivers/net/meson.build   |  2 +-
 drivers/net/octeontx2/Makefile| 38 +++
 drivers/net/octeontx2/meson.build | 24 
 drivers/net/octeontx2/otx2_ethdev.c   |  3 ++
 .../octeontx2/rte_pmd_octeontx2_version.map   |  4 ++
 mk/rte.app.mk |  2 +
 11 files changed, 102 insertions(+), 1 deletion(-)
 create mode 100644 doc/guides/nics/features/octeontx2.ini
 create mode 100644 doc/guides/nics/features/octeontx2_vec.ini
 create mode 100644 doc/guides/nics/features/octeontx2_vf.ini
 create mode 100644 drivers/net/octeontx2/Makefile
 create mode 100644 drivers/net/octeontx2/meson.build
 create mode 100644 drivers/net/octeontx2/otx2_ethdev.c
 create mode 100644 drivers/net/octeontx2/rte_pmd_octeontx2_version.map

diff --git a/config/common_base b/config/common_base
index 4a3de0360..38edad355 100644
--- a/config/common_base
+++ b/config/common_base
@@ -405,6 +405,11 @@ CONFIG_RTE_LIBRTE_LIO_DEBUG_REGS=n
 #
 CONFIG_RTE_LIBRTE_OCTEONTX_PMD=y
 
+#
+# Compile burst-oriented Cavium OCTEONTX2 network PMD driver
+#
+CONFIG_RTE_LIBRTE_OCTEONTX2_PMD=y
+
 #
 # Compile WRS accelerated virtual port (AVP) guest PMD driver
 #
diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
new file mode 100644
index 0..0ec3b6983
--- /dev/null
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -0,0 +1,8 @@
+;
+; Supported features of the 'octeontx2' network poll mode driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Linux VFIO   = Y
+ARMv8= Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
new file mode 100644
index 0..774f136c1
--- /dev/null
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -0,0 +1,8 @@
+;
+; Supported features of the 'octeontx2_vec' network poll mode driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Linux VFIO   = Y
+ARMv8= Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
new file mode 100644
index 0..36642354e
--- /dev/null
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -0,0 +1,8 @@
+;
+; Supported features of the 'octeontx2_vf' network poll mode driver.
+;
+; Refer to default.ini for the full list of available PMD features.
+;
+[Features]
+Linux VFIO   = Y
+ARMv8= Y
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 3a72cf38c..5bb618b21 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -45,6 +45,7 @@ DIRS-$(CONFIG_RTE_LIBRTE_NFP_PMD) += nfp
 DIRS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_NULL) += null
 DIRS-$(CONFIG_RTE_LIBRTE_OCTEONTX_PMD) += octeontx
+DIRS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += octeontx2
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_PCAP) += pcap
 DIRS-$(CONFIG_RTE_LIBRTE_QEDE_PMD) += qede
 DIRS-$(CONFIG_RTE_LIBRTE_PMD_RING) += ring
diff --git a/drivers/net/meson.build b/drivers/net/meson.build
index ed99896c3..086a2f4cd 100644
--- a/drivers/net/meson.build
+++ b/drivers/net/meson.build
@@ -31,7 +31,7 @@ drivers = ['af_packet',
'netvsc',
'nfb',
'nfp',
-   'null', 'octeontx', 'pcap', 'qede', 'ring',
+   'null', 'octeontx', 'octeontx2', 'pcap', 'ring',
'sfc',
'softnic',
'szedata2',
diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
new file mode 100644
index 0..0a606d27b
--- /dev/null
+++ b/drivers/net/octeontx2/Makefile
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: BSD-3-Clause
+# Copyright(C) 2019 Marvell International Ltd.
+#
+
+include $(RTE_SDK)/mk/rte.vars.mk
+
+#
+# library name
+#
+LIB = librte_pmd_octeontx2.a
+
+CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -I$(RTE_SDK)/drivers/common/octeontx2
+CFLAGS += -I$(RTE_SDK)/drivers/mempool/octeontx2
+CFLAGS += -I$(RTE_SDK)/drivers/net/octeontx2
+CFLAGS += -O3
+CFLAGS += -DALLOW_EXPERIMENTAL_API
+CFLAGS += -flax-vector-conversions
+
+ifneq ($(CONFIG_RTE_ARCH_64),y)
+CFLAGS += -Wno-int-to-pointer-cast
+CFLAGS += -Wno-pointer-to-int-cast
+endif
+
+EXPORT_MAP := rte_pmd_octeontx2_version.map
+
+LIBABIVER := 1
+
+#
+# all source are stored in SRCS-y
+#
+SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
+   otx2_ethdev.c
+
+LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_common_octeontx2 -lm
+LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs -lrte_bus_pci

[dpdk-dev] [PATCH v1 00/58] OCTEON TX2 Ethdev driver

2019-06-02 Thread jerinj

From: Jerin Jacob 

This patchset adds support for OCTEON TX2 ethdev driver.

This patch set is depended on "OCTEON TX2 common and mempool driver" series.
http://mails.dpdk.org/archives/dev/2019-June/133329.html

This patches series also available at 
https://github.com/jerinjacobk/dpdk-octeontx2-nix
including the dependency patches for quick download and review.

Harman Kalra (2):
  net/octeontx2: add PTP base support
  net/octeontx2: add remaining PTP operations

Jerin Jacob (17):
  net/octeontx2: add build infrastructure
  net/octeontx2: add ethdev probe and remove
  net/octeontx2: add device init and uninit
  net/octeontx2: add devargs parsing functions
  net/octeontx2: handle device error interrupts
  net/octeontx2: add info get operation
  net/octeontx2: add device configure operation
  net/octeontx2: handle queue specific error interrupts
  net/octeontx2: add context debug utils
  net/octeontx2: add Rx queue setup and release
  net/octeontx2: add Tx queue setup and release
  net/octeontx2: add ptype support
  net/octeontx2: add Rx and Tx descriptor operations
  net/octeontx2: add Rx burst support
  net/octeontx2: add Rx vector version
  net/octeontx2: add Tx burst support
  doc: add Marvell OCTEON TX2 ethdev documentation

Kiran Kumar K (13):
  net/octeontx2: add register dump support
  net/octeontx2: add basic stats operation
  net/octeontx2: add extended stats operations
  net/octeontx2: introducing flow driver
  net/octeontx2: flow utility functions
  net/octeontx2: flow mailbox utility
  net/octeontx2: add flow MCAM utility functions
  net/octeontx2: add flow parsing for outer layers
  net/octeontx2: adding flow parsing for inner layers
  net/octeontx2: add flow actions support
  net/octeontx2: add flow operations
  net/octeontx2: add additional flow operations
  net/octeontx2: add flow init and fini

Krzysztof Kanas (2):
  net/octeontx2: alloc and free TM HW resources
  net/octeontx2: enable Tx through traffic manager

Nithin Dabilpuram (9):
  net/octeontx2: add queue start and stop operations
  net/octeontx2: introduce traffic manager
  net/octeontx2: configure TM HW resources
  net/octeontx2: add queue info and pool supported operations
  net/octeontx2: add Rx multi segment version
  net/octeontx2: add Tx multi segment version
  net/octeontx2: add Tx vector version
  net/octeontx2: add device start operation
  net/octeontx2: add device stop and close operations

Sunil Kumar Kori (1):
  net/octeontx2: add unicast MAC filter

Vamsi Attunuru (9):
  net/octeontx2: add link stats operations
  net/octeontx2: add promiscuous and allmulticast mode
  net/octeontx2: add RSS support
  net/octeontx2: handle port reconfigure
  net/octeontx2: add link status set operations
  net/octeontx2: add module EEPROM dump
  net/octeontx2: add flow control support
  net/octeontx2: add FW version get operation
  net/octeontx2: add MTU set operation

Vivek Sharma (5):
  net/octeontx2: connect flow API to ethdev ops
  net/octeontx2: implement VLAN utility functions
  net/octeontx2: support VLAN offloads
  net/octeontx2: support VLAN filters
  net/octeontx2: support VLAN TPID and PVID for Tx

 MAINTAINERS   |8 +
 config/common_base|5 +
 doc/guides/nics/features/octeontx2.ini|   47 +
 doc/guides/nics/features/octeontx2_vec.ini|   44 +
 doc/guides/nics/features/octeontx2_vf.ini |   39 +
 doc/guides/nics/index.rst |1 +
 doc/guides/nics/octeontx2.rst |  289 +++
 doc/guides/platform/octeontx2.rst |3 +
 doc/guides/rel_notes/release_19_05.rst|1 +
 drivers/net/Makefile  |1 +
 drivers/net/meson.build   |2 +-
 drivers/net/octeontx2/Makefile|   56 +
 drivers/net/octeontx2/meson.build |   41 +
 drivers/net/octeontx2/otx2_ethdev.c   | 1959 +
 drivers/net/octeontx2/otx2_ethdev.h   |  496 +
 drivers/net/octeontx2/otx2_ethdev_debug.c |  500 +
 drivers/net/octeontx2/otx2_ethdev_devargs.c   |  143 ++
 drivers/net/octeontx2/otx2_ethdev_irq.c   |  346 +++
 drivers/net/octeontx2/otx2_ethdev_ops.c   |  454 
 drivers/net/octeontx2/otx2_flow.c |  951 
 drivers/net/octeontx2/otx2_flow.h |  384 
 drivers/net/octeontx2/otx2_flow_ctrl.c|  230 ++
 drivers/net/octeontx2/otx2_flow_parse.c   |  944 
 drivers/net/octeontx2/otx2_flow_utils.c   |  884 
 drivers/net/octeontx2/otx2_link.c |  157 ++
 drivers/net/octeontx2/otx2_lookup.c   |  279 +++
 drivers/net/octeontx2/otx2_mac.c  |  149 ++
 drivers/net/octeontx2/otx2_ptp.c  |  273 +++
 drivers/net/octeontx2/otx2_rss.c  |  378 
 drivers/net/octeontx2/otx2_rx.c   |  410 
 drivers/net/octeontx2/otx2_rx.h   |  333 +++
 drivers/net/octeontx2/otx2_stats.c|  387 ++

[dpdk-dev] [PATCH v1 04/58] net/octeontx2: add devargs parsing functions

2019-06-02 Thread jerinj

From: Jerin Jacob 

add various devargs command line options supported by
this driver.

Signed-off-by: Jerin Jacob 
Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Pavan Nikhilesh 
Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/Makefile  |   3 +-
 drivers/net/octeontx2/meson.build   |   1 +
 drivers/net/octeontx2/otx2_ethdev.c |   7 +
 drivers/net/octeontx2/otx2_ethdev.h |  20 +++
 drivers/net/octeontx2/otx2_ethdev_devargs.c | 143 
 drivers/net/octeontx2/otx2_rx.h |  10 ++
 6 files changed, 183 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/octeontx2/otx2_ethdev_devargs.c
 create mode 100644 drivers/net/octeontx2/otx2_rx.h

diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index 9ca1eea99..dbcfec5b4 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -31,7 +31,8 @@ LIBABIVER := 1
 #
 SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
otx2_mac.c  \
-   otx2_ethdev.c
+   otx2_ethdev.c   \
+   otx2_ethdev_devargs.c
 
 LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_common_octeontx2 -lm
 LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs -lrte_bus_pci 
-lrte_mempool_octeontx2
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index 6cdd036e9..57657de3d 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -5,6 +5,7 @@
 sources = files(
'otx2_mac.c',
'otx2_ethdev.c',
+   'otx2_ethdev_devargs.c'
)
 
 allow_experimental_apis = true
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 08f03b4c3..eeba0c2c6 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -137,6 +137,13 @@ otx2_eth_dev_init(struct rte_eth_dev *eth_dev)
memset(&dev->otx2_eth_dev_data_start, 0, sizeof(*dev) -
offsetof(struct otx2_eth_dev, otx2_eth_dev_data_start));
 
+   /* Parse devargs string */
+   rc = otx2_ethdev_parse_devargs(eth_dev->device->devargs, dev);
+   if (rc) {
+   otx2_err("Failed to parse devargs rc=%d", rc);
+   goto error;
+   }
+
if (!dev->mbox_active) {
/* Initialize the base otx2_dev object
 * only if already present
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index d9f72686a..f91e5fcac 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -9,11 +9,13 @@
 
 #include 
 #include 
+#include 
 
 #include "otx2_common.h"
 #include "otx2_dev.h"
 #include "otx2_irq.h"
 #include "otx2_mempool.h"
+#include "otx2_rx.h"
 
 #define OTX2_ETH_DEV_PMD_VERSION   "1.0"
 
@@ -31,6 +33,8 @@
 /* Used for struct otx2_eth_dev::flags */
 #define OTX2_LINK_CFG_IN_PROGRESS_FBIT_ULL(0)
 
+#define NIX_RSS_RETA_SIZE  64
+
 #define NIX_TX_OFFLOAD_CAPA ( \
DEV_TX_OFFLOAD_MBUF_FAST_FREE   | \
DEV_TX_OFFLOAD_MT_LOCKFREE  | \
@@ -56,6 +60,15 @@
DEV_RX_OFFLOAD_QINQ_STRIP | \
DEV_RX_OFFLOAD_TIMESTAMP)
 
+struct otx2_rss_info {
+   uint16_t rss_size;
+};
+
+struct otx2_npc_flow_info {
+   uint16_t flow_prealloc_size;
+   uint16_t flow_max_priority;
+};
+
 struct otx2_eth_dev {
OTX2_DEV; /* Base class */
MARKER otx2_eth_dev_data_start;
@@ -72,12 +85,15 @@ struct otx2_eth_dev {
uint16_t nix_msixoff;
uintptr_t base;
uintptr_t lmt_addr;
+   uint16_t scalar_ena;
uint16_t rx_offload_flags; /* Selected Rx offload flags(NIX_RX_*_F) */
uint64_t rx_offloads;
uint16_t tx_offload_flags; /* Selected Tx offload flags(NIX_TX_*_F) */
uint64_t tx_offloads;
uint64_t rx_offload_capa;
uint64_t tx_offload_capa;
+   struct otx2_rss_info rss_info;
+   struct otx2_npc_flow_info npc_flow;
 } __rte_cache_aligned;
 
 static inline struct otx2_eth_dev *
@@ -96,4 +112,8 @@ int otx2_cgx_mac_addr_set(struct rte_eth_dev *eth_dev,
 int otx2_nix_mac_addr_get(struct rte_eth_dev *eth_dev, uint8_t *addr);
 int otx2_cgx_mac_max_entries_get(struct otx2_eth_dev *dev);
 
+/* Devargs */
+int otx2_ethdev_parse_devargs(struct rte_devargs *devargs,
+ struct otx2_eth_dev *dev);
+
 #endif /* __OTX2_ETHDEV_H__ */
diff --git a/drivers/net/octeontx2/otx2_ethdev_devargs.c 
b/drivers/net/octeontx2/otx2_ethdev_devargs.c
new file mode 100644
index 0..0b3e7c145
--- /dev/null
+++ b/drivers/net/octeontx2/otx2_ethdev_devargs.c
@@ -0,0 +1,143 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include 
+#include 
+
+#include "otx2_ethdev.h"
+
+static int
+parse_flow_max_priority(const char *key, const char *value, void *extra_args)
+{
+   RTE_SET_USED(key);
+   uint16_t val;
+
+   val = atoi(value);

[dpdk-dev] [PATCH v1 03/58] net/octeontx2: add device init and uninit

2019-06-02 Thread jerinj

From: Jerin Jacob 

Add basic init and uninit function which includes
attaching LF device to probed PCIe device.

Signed-off-by: Jerin Jacob 
Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Vamsi Attunuru 
---
 drivers/net/octeontx2/Makefile  |   1 +
 drivers/net/octeontx2/meson.build   |   1 +
 drivers/net/octeontx2/otx2_ethdev.c | 277 +++-
 drivers/net/octeontx2/otx2_ethdev.h |  72 
 drivers/net/octeontx2/otx2_mac.c|  72 
 5 files changed, 418 insertions(+), 5 deletions(-)
 create mode 100644 drivers/net/octeontx2/otx2_mac.c

diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index 0a606d27b..9ca1eea99 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -30,6 +30,7 @@ LIBABIVER := 1
 # all source are stored in SRCS-y
 #
 SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
+   otx2_mac.c  \
otx2_ethdev.c
 
 LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_common_octeontx2 -lm
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index 0bd32446b..6cdd036e9 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -3,6 +3,7 @@
 #
 
 sources = files(
+   'otx2_mac.c',
'otx2_ethdev.c',
)
 
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 05fa8988e..08f03b4c3 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -8,27 +8,277 @@
 
 #include "otx2_ethdev.h"
 
+static inline void
+otx2_eth_set_rx_function(struct rte_eth_dev *eth_dev)
+{
+   RTE_SET_USED(eth_dev);
+}
+
+static inline void
+otx2_eth_set_tx_function(struct rte_eth_dev *eth_dev)
+{
+   RTE_SET_USED(eth_dev);
+}
+
+static inline uint64_t
+nix_get_rx_offload_capa(struct otx2_eth_dev *dev)
+{
+   uint64_t capa = NIX_RX_OFFLOAD_CAPA;
+
+   if (otx2_dev_is_vf(dev))
+   capa &= ~DEV_RX_OFFLOAD_TIMESTAMP;
+
+   return capa;
+}
+
+static inline uint64_t
+nix_get_tx_offload_capa(struct otx2_eth_dev *dev)
+{
+   RTE_SET_USED(dev);
+
+   return NIX_TX_OFFLOAD_CAPA;
+}
+
+static int
+nix_lf_free(struct otx2_eth_dev *dev)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+   struct nix_lf_free_req *req;
+   struct ndc_sync_op *ndc_req;
+   int rc;
+
+   /* Sync NDC-NIX for LF */
+   ndc_req = otx2_mbox_alloc_msg_ndc_sync_op(mbox);
+   ndc_req->nix_lf_tx_sync = 1;
+   ndc_req->nix_lf_rx_sync = 1;
+   rc = otx2_mbox_process(mbox);
+   if (rc)
+   otx2_err("Error on NDC-NIX-[TX, RX] LF sync, rc %d", rc);
+
+   req = otx2_mbox_alloc_msg_nix_lf_free(mbox);
+   /* Let AF driver free all this nix lf's
+* NPC entries allocated using NPC MBOX.
+*/
+   req->flags = 0;
+
+   return otx2_mbox_process(mbox);
+}
+
+static inline int
+nix_lf_attach(struct otx2_eth_dev *dev)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+   struct rsrc_attach_req *req;
+
+   /* Attach NIX(lf) */
+   req = otx2_mbox_alloc_msg_attach_resources(mbox);
+   req->modify = true;
+   req->nixlf = true;
+
+   return otx2_mbox_process(mbox);
+}
+
+static inline int
+nix_lf_get_msix_offset(struct otx2_eth_dev *dev)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+   struct msix_offset_rsp *msix_rsp;
+   int rc;
+
+   /* Get NPA and NIX MSIX vector offsets */
+   otx2_mbox_alloc_msg_msix_offset(mbox);
+
+   rc = otx2_mbox_process_msg(mbox, (void *)&msix_rsp);
+
+   dev->nix_msixoff = msix_rsp->nix_msixoff;
+
+   return rc;
+}
+
+static inline int
+otx2_eth_dev_lf_detach(struct otx2_mbox *mbox)
+{
+   struct rsrc_detach_req *req;
+
+   req = otx2_mbox_alloc_msg_detach_resources(mbox);
+
+   /* Detach all except npa lf */
+   req->partial = true;
+   req->nixlf = true;
+   req->sso = true;
+   req->ssow = true;
+   req->timlfs = true;
+   req->cptlfs = true;
+
+   return otx2_mbox_process(mbox);
+}
+
 static int
 otx2_eth_dev_init(struct rte_eth_dev *eth_dev)
 {
-   RTE_SET_USED(eth_dev);
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct rte_pci_device *pci_dev;
+   int rc, max_entries;
 
-   return -ENODEV;
+   /* For secondary processes, the primary has done all the work */
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
+   /* Setup callbacks for secondary process */
+   otx2_eth_set_tx_function(eth_dev);
+   otx2_eth_set_rx_function(eth_dev);
+   return 0;
+   }
+
+   pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
+
+   rte_eth_copy_pci_info(eth_dev, pci_dev);
+   eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
+
+   /* Zero out everything after OTX2_DEV to allow proper dev_reset() */
+   memset(&dev->otx2_eth_dev_data_start, 0, sizeof(*dev) -

[dpdk-dev] [PATCH v1 02/58] net/octeontx2: add ethdev probe and remove

2019-06-02 Thread jerinj

From: Jerin Jacob 

add basic PCIe ethdev probe and remove.

Signed-off-by: Jerin Jacob 
Signed-off-by: Nithin Dabilpuram 
---
 drivers/net/octeontx2/otx2_ethdev.c | 93 +
 drivers/net/octeontx2/otx2_ethdev.h | 27 +
 2 files changed, 120 insertions(+)
 create mode 100644 drivers/net/octeontx2/otx2_ethdev.h

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index d26535dee..05fa8988e 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1,3 +1,96 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(C) 2019 Marvell International Ltd.
  */
+
+#include 
+#include 
+#include 
+
+#include "otx2_ethdev.h"
+
+static int
+otx2_eth_dev_init(struct rte_eth_dev *eth_dev)
+{
+   RTE_SET_USED(eth_dev);
+
+   return -ENODEV;
+}
+
+static int
+otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool mbox_close)
+{
+   RTE_SET_USED(eth_dev);
+   RTE_SET_USED(mbox_close);
+
+   return -ENODEV;
+}
+
+static int
+nix_remove(struct rte_pci_device *pci_dev)
+{
+   struct rte_eth_dev *eth_dev;
+   int rc;
+
+   eth_dev = rte_eth_dev_allocated(pci_dev->device.name);
+   if (eth_dev) {
+   /* Cleanup eth dev */
+   rc = otx2_eth_dev_uninit(eth_dev, true);
+   if (rc)
+   return rc;
+
+   rte_eth_dev_pci_release(eth_dev);
+   }
+
+   /* Nothing to be done for secondary processes */
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+   return 0;
+
+   return 0;
+}
+
+static int
+nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
+{
+   int rc;
+
+   RTE_SET_USED(pci_drv);
+
+   rc = rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct otx2_eth_dev),
+  otx2_eth_dev_init);
+
+   /* On error on secondary, recheck if port exists in primary or
+* in mid of detach state.
+*/
+   if (rte_eal_process_type() != RTE_PROC_PRIMARY && rc)
+   if (!rte_eth_dev_allocated(pci_dev->device.name))
+   return 0;
+   return rc;
+}
+
+static const struct rte_pci_id pci_nix_map[] = {
+   {
+   RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_RVU_PF)
+   },
+   {
+   RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_RVU_VF)
+   },
+   {
+   RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+  PCI_DEVID_OCTEONTX2_RVU_AF_VF)
+   },
+   {
+   .vendor_id = 0,
+   },
+};
+
+static struct rte_pci_driver pci_nix = {
+   .id_table = pci_nix_map,
+   .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA |
+   RTE_PCI_DRV_INTR_LSC,
+   .probe = nix_probe,
+   .remove = nix_remove,
+};
+
+RTE_PMD_REGISTER_PCI(net_octeontx2, pci_nix);
+RTE_PMD_REGISTER_PCI_TABLE(net_octeontx2, pci_nix_map);
+RTE_PMD_REGISTER_KMOD_DEP(net_octeontx2, "vfio-pci");
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
new file mode 100644
index 0..fd01a3254
--- /dev/null
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#ifndef __OTX2_ETHDEV_H__
+#define __OTX2_ETHDEV_H__
+
+#include 
+
+#include 
+
+#include "otx2_common.h"
+#include "otx2_dev.h"
+#include "otx2_irq.h"
+#include "otx2_mempool.h"
+
+struct otx2_eth_dev {
+   OTX2_DEV; /* Base class */
+} __rte_cache_aligned;
+
+static inline struct otx2_eth_dev *
+otx2_eth_pmd_priv(struct rte_eth_dev *eth_dev)
+{
+   return eth_dev->data->dev_private;
+}
+
+#endif /* __OTX2_ETHDEV_H__ */
-- 
2.21.0

[dpdk-dev] [PATCH v1 07/58] net/octeontx2: add device configure operation

2019-06-02 Thread jerinj

From: Jerin Jacob 

Add device configure operation. This would call lf_alloc
mailbox to allocate a NIX LF and upon return, AF will
return the attributes for the select LF.

Signed-off-by: Jerin Jacob 
Signed-off-by: Vamsi Attunuru 
Signed-off-by: Nithin Dabilpuram 
---
 drivers/net/octeontx2/otx2_ethdev.c | 151 
 drivers/net/octeontx2/otx2_ethdev.h |  11 ++
 2 files changed, 162 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 6e3c70559..65d72a47f 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -39,6 +39,52 @@ nix_get_tx_offload_capa(struct otx2_eth_dev *dev)
return NIX_TX_OFFLOAD_CAPA;
 }
 
+static int
+nix_lf_alloc(struct otx2_eth_dev *dev, uint32_t nb_rxq, uint32_t nb_txq)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+   struct nix_lf_alloc_req *req;
+   struct nix_lf_alloc_rsp *rsp;
+   int rc;
+
+   req = otx2_mbox_alloc_msg_nix_lf_alloc(mbox);
+   req->rq_cnt = nb_rxq;
+   req->sq_cnt = nb_txq;
+   req->cq_cnt = nb_rxq;
+   /* XQE_SZ should be in Sync with NIX_CQ_ENTRY_SZ */
+   RTE_BUILD_BUG_ON(NIX_CQ_ENTRY_SZ != 128);
+   req->xqe_sz = NIX_XQESZ_W16;
+   req->rss_sz = dev->rss_info.rss_size;
+   req->rss_grps = NIX_RSS_GRPS;
+   req->npa_func = otx2_npa_pf_func_get();
+   req->sso_func = otx2_sso_pf_func_get();
+   req->rx_cfg = BIT_ULL(35 /* DIS_APAD */);
+   if (dev->rx_offloads & (DEV_RX_OFFLOAD_TCP_CKSUM |
+DEV_RX_OFFLOAD_UDP_CKSUM)) {
+   req->rx_cfg |= BIT_ULL(37 /* CSUM_OL4 */);
+   req->rx_cfg |= BIT_ULL(36 /* CSUM_IL4 */);
+   }
+
+   rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
+   if (rc)
+   return rc;
+
+   dev->sqb_size = rsp->sqb_size;
+   dev->tx_chan_base = rsp->tx_chan_base;
+   dev->rx_chan_base = rsp->rx_chan_base;
+   dev->rx_chan_cnt = rsp->rx_chan_cnt;
+   dev->tx_chan_cnt = rsp->tx_chan_cnt;
+   dev->lso_tsov4_idx = rsp->lso_tsov4_idx;
+   dev->lso_tsov6_idx = rsp->lso_tsov6_idx;
+   dev->lf_tx_stats = rsp->lf_tx_stats;
+   dev->lf_rx_stats = rsp->lf_rx_stats;
+   dev->cints = rsp->cints;
+   dev->qints = rsp->qints;
+   dev->npc_flow.channel = dev->rx_chan_base;
+
+   return 0;
+}
+
 static int
 nix_lf_free(struct otx2_eth_dev *dev)
 {
@@ -64,9 +110,114 @@ nix_lf_free(struct otx2_eth_dev *dev)
return otx2_mbox_process(mbox);
 }
 
+static int
+otx2_nix_configure(struct rte_eth_dev *eth_dev)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct rte_eth_dev_data *data = eth_dev->data;
+   struct rte_eth_conf *conf = &data->dev_conf;
+   struct rte_eth_rxmode *rxmode = &conf->rxmode;
+   struct rte_eth_txmode *txmode = &conf->txmode;
+   char ea_fmt[RTE_ETHER_ADDR_FMT_SIZE];
+   struct rte_ether_addr *ea;
+   uint8_t nb_rxq, nb_txq;
+   int rc;
+
+   rc = -EINVAL;
+
+   /* Sanity checks */
+   if (rte_eal_has_hugepages() == 0) {
+   otx2_err("Huge page is not configured");
+   goto fail;
+   }
+
+   if (rte_eal_iova_mode() != RTE_IOVA_VA) {
+   otx2_err("iova mode should be va");
+   goto fail;
+   }
+
+   if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
+   otx2_err("Setting link speed/duplex not supported");
+   goto fail;
+   }
+
+   if (conf->dcb_capability_en == 1) {
+   otx2_err("dcb enable is not supported");
+   goto fail;
+   }
+
+   if (conf->fdir_conf.mode != RTE_FDIR_MODE_NONE) {
+   otx2_err("Flow director is not supported");
+   goto fail;
+   }
+
+   if (rxmode->mq_mode != ETH_MQ_RX_NONE &&
+   rxmode->mq_mode != ETH_MQ_RX_RSS) {
+   otx2_err("Unsupported mq rx mode %d", rxmode->mq_mode);
+   goto fail;
+   }
+
+   if (txmode->mq_mode != ETH_MQ_TX_NONE) {
+   otx2_err("Unsupported mq tx mode %d", txmode->mq_mode);
+   goto fail;
+   }
+
+   /* Free the resources allocated from the previous configure */
+   if (dev->configured == 1)
+   nix_lf_free(dev);
+
+   if (otx2_dev_is_A0(dev) &&
+   (txmode->offloads & DEV_TX_OFFLOAD_SCTP_CKSUM) &&
+   ((txmode->offloads & DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM) ||
+   (txmode->offloads & DEV_TX_OFFLOAD_OUTER_UDP_CKSUM))) {
+   otx2_err("Outer IP and SCTP checksum unsupported");
+   rc = -EINVAL;
+   goto fail;
+   }
+
+   dev->rx_offloads = rxmode->offloads;
+   dev->tx_offloads = txmode->offloads;
+   dev->rss_info.rss_grps = NIX_RSS_GRPS;
+
+   nb_rxq = RTE_MAX(data->nb_rx_queues, 1);
+   nb_txq = RTE_MAX(data->nb_tx_queues, 1);
+
+   /* Alloc a nix lf */
+   rc = nix_lf_alloc(dev, nb_rxq

[dpdk-dev] [PATCH v1 06/58] net/octeontx2: add info get operation

2019-06-02 Thread jerinj

From: Jerin Jacob 

Add device information get operation.

Signed-off-by: Jerin Jacob 
Signed-off-by: Vamsi Attunuru 
Signed-off-by: Harman Kalra 
---
 doc/guides/nics/features/octeontx2.ini |  4 ++
 doc/guides/nics/features/octeontx2_vec.ini |  4 ++
 doc/guides/nics/features/octeontx2_vf.ini  |  3 +
 drivers/net/octeontx2/Makefile |  1 +
 drivers/net/octeontx2/meson.build  |  1 +
 drivers/net/octeontx2/otx2_ethdev.c|  7 +++
 drivers/net/octeontx2/otx2_ethdev.h| 27 +
 drivers/net/octeontx2/otx2_ethdev_ops.c| 64 ++
 8 files changed, 111 insertions(+)
 create mode 100644 drivers/net/octeontx2/otx2_ethdev_ops.c

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 0ec3b6983..1f0148669 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -4,5 +4,9 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
+Speed capabilities   = Y
 Linux VFIO   = Y
 ARMv8= Y
+Lock-free Tx queue   = Y
+SR-IOV   = Y
+Multiprocess aware   = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index 774f136c1..2b0644ee5 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -4,5 +4,9 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
+Speed capabilities   = Y
 Linux VFIO   = Y
 ARMv8= Y
+Lock-free Tx queue   = Y
+SR-IOV   = Y
+Multiprocess aware   = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index 36642354e..80f0d5c95 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -4,5 +4,8 @@
 ; Refer to default.ini for the full list of available PMD features.
 ;
 [Features]
+Speed capabilities   = Y
 Linux VFIO   = Y
 ARMv8= Y
+Lock-free Tx queue   = Y
+Multiprocess aware   = Y
diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index a56143dcd..820202eb2 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -33,6 +33,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
otx2_mac.c  \
otx2_ethdev.c   \
otx2_ethdev_irq.c \
+   otx2_ethdev_ops.c \
otx2_ethdev_devargs.c
 
 LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_common_octeontx2 -lm
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index c49e1cb80..a2dc983e3 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -6,6 +6,7 @@ sources = files(
'otx2_mac.c',
'otx2_ethdev.c',
'otx2_ethdev_irq.c',
+   'otx2_ethdev_ops.c',
'otx2_ethdev_devargs.c'
)
 
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 67a7ebb36..6e3c70559 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -64,6 +64,11 @@ nix_lf_free(struct otx2_eth_dev *dev)
return otx2_mbox_process(mbox);
 }
 
+/* Initialize and register driver with DPDK Application */
+static const struct eth_dev_ops otx2_eth_dev_ops = {
+   .dev_infos_get= otx2_nix_info_get,
+};
+
 static inline int
 nix_lf_attach(struct otx2_eth_dev *dev)
 {
@@ -120,6 +125,8 @@ otx2_eth_dev_init(struct rte_eth_dev *eth_dev)
struct rte_pci_device *pci_dev;
int rc, max_entries;
 
+   eth_dev->dev_ops = &otx2_eth_dev_ops;
+
/* For secondary processes, the primary has done all the work */
if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
/* Setup callbacks for secondary process */
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 670d1ff0b..00baabaac 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -33,7 +33,30 @@
 /* Used for struct otx2_eth_dev::flags */
 #define OTX2_LINK_CFG_IN_PROGRESS_FBIT_ULL(0)
 
+#define VLAN_TAG_SIZE  4
+#define NIX_HW_L2_OVERHEAD 22
+/* ETH_HLEN+2*VLAN_HLEN */
+#define NIX_MAX_HW_MTU 9190
+#define NIX_MAX_HW_FRS (NIX_MAX_HW_MTU + NIX_HW_L2_OVERHEAD)
+#define NIX_MIN_HW_FRS 60
+#define NIX_HASH_KEY_SIZE  48 /* 352 Bits */
 #define NIX_RSS_RETA_SIZE  64
+#defineNIX_RX_MIN_DESC 16
+#define NIX_RX_MIN_DESC_ALIGN  16
+#define NIX_RX_NB_SEG_MAX  6
+
+/* If PTP is enabled additional SEND MEM DESC is required which
+ * takes 2 words, hence max 7 iova address are possible
+ */
+#if defined(RTE_LIBRTE_IEEE1588)
+#define NIX_TX_NB_SEG_MAX  7
+#else
+#define NIX_TX_NB_SEG_MA

[dpdk-dev] [PATCH v1 08/58] net/octeontx2: handle queue specific error interrupts

2019-06-02 Thread jerinj

From: Jerin Jacob 

Handle queue specific error interrupts.

Signed-off-by: Jerin Jacob 
Signed-off-by: Nithin Dabilpuram 
---
 drivers/net/octeontx2/otx2_ethdev.c |  16 +-
 drivers/net/octeontx2/otx2_ethdev.h |   9 ++
 drivers/net/octeontx2/otx2_ethdev_irq.c | 191 
 3 files changed, 215 insertions(+), 1 deletion(-)

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 65d72a47f..045855c2e 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -163,8 +163,10 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
}
 
/* Free the resources allocated from the previous configure */
-   if (dev->configured == 1)
+   if (dev->configured == 1) {
+   oxt2_nix_unregister_queue_irqs(eth_dev);
nix_lf_free(dev);
+   }
 
if (otx2_dev_is_A0(dev) &&
(txmode->offloads & DEV_TX_OFFLOAD_SCTP_CKSUM) &&
@@ -189,6 +191,13 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto fail;
}
 
+   /* Register queue IRQs */
+   rc = oxt2_nix_register_queue_irqs(eth_dev);
+   if (rc) {
+   otx2_err("Failed to register queue interrupts rc=%d", rc);
+   goto free_nix_lf;
+   }
+
/* Update the mac address */
ea = eth_dev->data->mac_addrs;
memcpy(ea, dev->mac_addr, RTE_ETHER_ADDR_LEN);
@@ -210,6 +219,8 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
dev->configured_nb_tx_qs = data->nb_tx_queues;
return 0;
 
+free_nix_lf:
+   rc = nix_lf_free(dev);
 fail:
return rc;
 }
@@ -413,6 +424,9 @@ otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool 
mbox_close)
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
 
+   /* Unregister queue irqs */
+   oxt2_nix_unregister_queue_irqs(eth_dev);
+
rc = nix_lf_free(dev);
if (rc)
otx2_err("Failed to free nix lf, rc=%d", rc);
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 27cad971c..ca0587a63 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -86,6 +86,11 @@
DEV_RX_OFFLOAD_QINQ_STRIP | \
DEV_RX_OFFLOAD_TIMESTAMP)
 
+struct otx2_qint {
+   struct rte_eth_dev *eth_dev;
+   uint8_t qintx;
+};
+
 struct otx2_rss_info {
uint16_t rss_size;
uint8_t rss_grps;
@@ -114,6 +119,7 @@ struct otx2_eth_dev {
uint16_t cints;
uint16_t qints;
uint8_t configured;
+   uint8_t configured_qints;
uint8_t configured_nb_rx_qs;
uint8_t configured_nb_tx_qs;
uint16_t nix_msixoff;
@@ -126,6 +132,7 @@ struct otx2_eth_dev {
uint64_t tx_offloads;
uint64_t rx_offload_capa;
uint64_t tx_offload_capa;
+   struct otx2_qint qints_mem[RTE_MAX_QUEUES_PER_PORT];
struct otx2_rss_info rss_info;
struct otx2_npc_flow_info npc_flow;
 } __rte_cache_aligned;
@@ -142,7 +149,9 @@ void otx2_nix_info_get(struct rte_eth_dev *eth_dev,
 
 /* IRQ */
 int otx2_nix_register_irqs(struct rte_eth_dev *eth_dev);
+int oxt2_nix_register_queue_irqs(struct rte_eth_dev *eth_dev);
 void otx2_nix_unregister_irqs(struct rte_eth_dev *eth_dev);
+void oxt2_nix_unregister_queue_irqs(struct rte_eth_dev *eth_dev);
 
 /* CGX */
 int otx2_cgx_rxtx_start(struct otx2_eth_dev *dev);
diff --git a/drivers/net/octeontx2/otx2_ethdev_irq.c 
b/drivers/net/octeontx2/otx2_ethdev_irq.c
index 33fed93c4..476c7ea78 100644
--- a/drivers/net/octeontx2/otx2_ethdev_irq.c
+++ b/drivers/net/octeontx2/otx2_ethdev_irq.c
@@ -112,6 +112,197 @@ nix_lf_unregister_ras_irq(struct rte_eth_dev *eth_dev)
otx2_unregister_irq(handle, nix_lf_ras_irq, eth_dev, vec);
 }
 
+static inline uint8_t
+nix_lf_q_irq_get_and_clear(struct otx2_eth_dev *dev, uint16_t q,
+  uint32_t off, uint64_t mask)
+{
+   uint64_t reg, wdata;
+   uint8_t qint;
+
+   wdata = (uint64_t)q << 44;
+   reg = otx2_atomic64_add_nosync(wdata, (int64_t *)(dev->base + off));
+
+   if (reg & BIT_ULL(42) /* OP_ERR */) {
+   otx2_err("Failed execute irq get off=0x%x", off);
+   return 0;
+   }
+
+   qint = reg & 0xff;
+   wdata &= mask;
+   otx2_write64(wdata, dev->base + off);
+
+   return qint;
+}
+
+static inline uint8_t
+nix_lf_rq_irq_get_and_clear(struct otx2_eth_dev *dev, uint16_t rq)
+{
+   return nix_lf_q_irq_get_and_clear(dev, rq, NIX_LF_RQ_OP_INT, ~0xff00);
+}
+
+static inline uint8_t
+nix_lf_cq_irq_get_and_clear(struct otx2_eth_dev *dev, uint16_t cq)
+{
+   return nix_lf_q_irq_get_and_clear(dev, cq, NIX_LF_CQ_OP_INT, ~0xff00);
+}
+
+static inline uint8_t
+nix_lf_sq_irq_get_and_clear(struct otx2_eth_dev *dev, uint16_t sq)
+{
+   return nix_lf_q_irq_get_and_clear(dev, sq, NIX_LF_SQ_OP_INT, ~0x1ff00);
+}
+
+static inline void
+nix_lf_sq_debug_reg(struct otx

[dpdk-dev] [PATCH v1 05/58] net/octeontx2: handle device error interrupts

2019-06-02 Thread jerinj

From: Jerin Jacob 

Handle device specific error and ras interrupts.

Signed-off-by: Jerin Jacob 
Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Harman Kalra 
---
 drivers/net/octeontx2/Makefile  |   1 +
 drivers/net/octeontx2/meson.build   |   1 +
 drivers/net/octeontx2/otx2_ethdev.c |  12 +-
 drivers/net/octeontx2/otx2_ethdev.h |   4 +
 drivers/net/octeontx2/otx2_ethdev_irq.c | 140 
 5 files changed, 156 insertions(+), 2 deletions(-)
 create mode 100644 drivers/net/octeontx2/otx2_ethdev_irq.c

diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index dbcfec5b4..a56143dcd 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -32,6 +32,7 @@ LIBABIVER := 1
 SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
otx2_mac.c  \
otx2_ethdev.c   \
+   otx2_ethdev_irq.c \
otx2_ethdev_devargs.c
 
 LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_common_octeontx2 -lm
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index 57657de3d..c49e1cb80 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -5,6 +5,7 @@
 sources = files(
'otx2_mac.c',
'otx2_ethdev.c',
+   'otx2_ethdev_irq.c',
'otx2_ethdev_devargs.c'
)
 
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index eeba0c2c6..67a7ebb36 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -175,12 +175,17 @@ otx2_eth_dev_init(struct rte_eth_dev *eth_dev)
if (rc)
goto otx2_npa_uninit;
 
+   /* Register LF irq handlers */
+   rc = otx2_nix_register_irqs(eth_dev);
+   if (rc)
+   goto mbox_detach;
+
/* Get maximum number of supported MAC entries */
max_entries = otx2_cgx_mac_max_entries_get(dev);
if (max_entries < 0) {
otx2_err("Failed to get max entries for mac addr");
rc = -ENOTSUP;
-   goto mbox_detach;
+   goto unregister_irq;
}
 
/* For VFs, returned max_entries will be 0. But to keep default MAC
@@ -194,7 +199,7 @@ otx2_eth_dev_init(struct rte_eth_dev *eth_dev)
if (eth_dev->data->mac_addrs == NULL) {
otx2_err("Failed to allocate memory for mac addr");
rc = -ENOMEM;
-   goto mbox_detach;
+   goto unregister_irq;
}
 
dev->max_mac_entries = max_entries;
@@ -226,6 +231,8 @@ otx2_eth_dev_init(struct rte_eth_dev *eth_dev)
 
 free_mac_addrs:
rte_free(eth_dev->data->mac_addrs);
+unregister_irq:
+   otx2_nix_unregister_irqs(eth_dev);
 mbox_detach:
otx2_eth_dev_lf_detach(dev->mbox);
 otx2_npa_uninit:
@@ -261,6 +268,7 @@ otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool 
mbox_close)
dev->drv_inited = false;
 
pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
+   otx2_nix_unregister_irqs(eth_dev);
 
rc = otx2_eth_dev_lf_detach(dev->mbox);
if (rc)
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index f91e5fcac..670d1ff0b 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -102,6 +102,10 @@ otx2_eth_pmd_priv(struct rte_eth_dev *eth_dev)
return eth_dev->data->dev_private;
 }
 
+/* IRQ */
+int otx2_nix_register_irqs(struct rte_eth_dev *eth_dev);
+void otx2_nix_unregister_irqs(struct rte_eth_dev *eth_dev);
+
 /* CGX */
 int otx2_cgx_rxtx_start(struct otx2_eth_dev *dev);
 int otx2_cgx_rxtx_stop(struct otx2_eth_dev *dev);
diff --git a/drivers/net/octeontx2/otx2_ethdev_irq.c 
b/drivers/net/octeontx2/otx2_ethdev_irq.c
new file mode 100644
index 0..33fed93c4
--- /dev/null
+++ b/drivers/net/octeontx2/otx2_ethdev_irq.c
@@ -0,0 +1,140 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include 
+
+#include 
+
+#include "otx2_ethdev.h"
+
+static void
+nix_lf_err_irq(void *param)
+{
+   struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   uint64_t intr;
+
+   intr = otx2_read64(dev->base + NIX_LF_ERR_INT);
+   if (intr == 0)
+   return;
+
+   otx2_err("Err_intr=0x%" PRIx64 " pf=%d, vf=%d", intr, dev->pf, dev->vf);
+
+   /* Clear interrupt */
+   otx2_write64(intr, dev->base + NIX_LF_ERR_INT);
+}
+
+static int
+nix_lf_register_err_irq(struct rte_eth_dev *eth_dev)
+{
+   struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
+   struct rte_intr_handle *handle = &pci_dev->intr_handle;
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   int rc, vec;
+
+   vec = dev->nix_msixoff + NIX_LF_INT_VEC_ERR_INT;
+
+   /* Clear err interrupt */
+   otx2_write64(~0ull, dev->base + NIX_LF_ERR_IN

[dpdk-dev] [PATCH v1 09/58] net/octeontx2: add context debug utils

2019-06-02 Thread jerinj

From: Jerin Jacob 

Add RQ,SQ,CQ context and CQE structure dump utils.

Signed-off-by: Jerin Jacob 
Signed-off-by: Vivek Sharma 
---
 drivers/net/octeontx2/Makefile|   1 +
 drivers/net/octeontx2/meson.build |   1 +
 drivers/net/octeontx2/otx2_ethdev.h   |   4 +
 drivers/net/octeontx2/otx2_ethdev_debug.c | 272 ++
 drivers/net/octeontx2/otx2_ethdev_irq.c   |   9 +
 5 files changed, 287 insertions(+)
 create mode 100644 drivers/net/octeontx2/otx2_ethdev_debug.c

diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index 820202eb2..0dfd43f4f 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -34,6 +34,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
otx2_ethdev.c   \
otx2_ethdev_irq.c \
otx2_ethdev_ops.c \
+   otx2_ethdev_debug.c \
otx2_ethdev_devargs.c
 
 LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_common_octeontx2 -lm
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index a2dc983e3..1c010c342 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -7,6 +7,7 @@ sources = files(
'otx2_ethdev.c',
'otx2_ethdev_irq.c',
'otx2_ethdev_ops.c',
+   'otx2_ethdev_debug.c',
'otx2_ethdev_devargs.c'
)
 
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index ca0587a63..ff14a0129 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -153,6 +153,10 @@ int oxt2_nix_register_queue_irqs(struct rte_eth_dev 
*eth_dev);
 void otx2_nix_unregister_irqs(struct rte_eth_dev *eth_dev);
 void oxt2_nix_unregister_queue_irqs(struct rte_eth_dev *eth_dev);
 
+/* Debug */
+int otx2_nix_queues_ctx_dump(struct rte_eth_dev *eth_dev);
+void otx2_nix_cqe_dump(const struct nix_cqe_hdr_s *cq);
+
 /* CGX */
 int otx2_cgx_rxtx_start(struct otx2_eth_dev *dev);
 int otx2_cgx_rxtx_stop(struct otx2_eth_dev *dev);
diff --git a/drivers/net/octeontx2/otx2_ethdev_debug.c 
b/drivers/net/octeontx2/otx2_ethdev_debug.c
new file mode 100644
index 0..39cda7637
--- /dev/null
+++ b/drivers/net/octeontx2/otx2_ethdev_debug.c
@@ -0,0 +1,272 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include "otx2_ethdev.h"
+
+#define nix_dump(fmt, ...) fprintf(stderr, fmt "\n", ##__VA_ARGS__)
+
+static inline void
+nix_lf_sq_dump(struct  nix_sq_ctx_s *ctx)
+{
+   nix_dump("W0: sqe_way_mask \t\t%d\nW0: cq \t\t\t\t%d",
+ctx->sqe_way_mask, ctx->cq);
+   nix_dump("W0: sdp_mcast \t\t\t%d\nW0: substream \t\t\t0x%03x",
+ctx->sdp_mcast, ctx->substream);
+   nix_dump("W0: qint_idx \t\t\t%d\nW0: ena \t\t\t%d\n",
+ctx->qint_idx, ctx->ena);
+
+   nix_dump("W1: sqb_count \t\t\t%d\nW1: default_chan \t\t%d",
+ctx->sqb_count, ctx->default_chan);
+   nix_dump("W1: smq_rr_quantum \t\t%d\nW1: sso_ena \t\t\t%d",
+ctx->smq_rr_quantum, ctx->sso_ena);
+   nix_dump("W1: xoff \t\t\t%d\nW1: cq_ena \t\t\t%d\nW1: smq\t\t\t\t%d\n",
+ctx->xoff, ctx->cq_ena, ctx->smq);
+
+   nix_dump("W2: sqe_stype \t\t\t%d\nW2: sq_int_ena \t\t\t%d",
+ctx->sqe_stype, ctx->sq_int_ena);
+   nix_dump("W2: sq_int  \t\t\t%d\nW2: sqb_aura \t\t\t%d",
+ctx->sq_int, ctx->sqb_aura);
+   nix_dump("W2: smq_rr_count \t\t%d\n",  ctx->smq_rr_count);
+
+   nix_dump("W3: smq_next_sq_vld\t\t%d\nW3: smq_pend\t\t\t%d",
+ctx->smq_next_sq_vld, ctx->smq_pend);
+   nix_dump("W3: smenq_next_sqb_vld  \t%d\nW3: head_offset\t\t\t%d",
+ctx->smenq_next_sqb_vld, ctx->head_offset);
+   nix_dump("W3: smenq_offset\t\t%d\nW3: tail_offset \t\t%d",
+ctx->smenq_offset, ctx->tail_offset);
+   nix_dump("W3: smq_lso_segnum \t\t%d\nW3: smq_next_sq \t\t%d",
+ctx->smq_lso_segnum, ctx->smq_next_sq);
+   nix_dump("W3: mnq_dis \t\t\t%d\nW3: lmt_dis \t\t\t%d",
+ctx->mnq_dis, ctx->lmt_dis);
+   nix_dump("W3: cq_limit\t\t\t%d\nW3: max_sqe_size\t\t%d\n",
+ctx->cq_limit, ctx->max_sqe_size);
+
+   nix_dump("W4: next_sqb \t\t\t0x%" PRIx64 "", ctx->next_sqb);
+   nix_dump("W5: tail_sqb \t\t\t0x%" PRIx64 "", ctx->tail_sqb);
+   nix_dump("W6: smenq_sqb \t\t\t0x%" PRIx64 "", ctx->smenq_sqb);
+   nix_dump("W7: smenq_next_sqb \t\t0x%" PRIx64 "", ctx->smenq_next_sqb);
+   nix_dump("W8: head_sqb \t\t\t0x%" PRIx64 "", ctx->head_sqb);
+
+   nix_dump("W9: vfi_lso_vld \t\t%d\nW9: vfi_lso_vlan1_ins_ena\t%d",
+ctx->vfi_lso_vld, ctx->vfi_lso_vlan1_ins_ena);
+   nix_dump("W9: vfi_lso_vlan0_ins_ena\t%d\nW9: vfi_lso_mps\t\t\t%d",
+ctx->vfi_lso_vlan0_ins_ena, ctx->vfi_lso_mps);
+   nix_dump("W9: vfi_lso_sb \t\t\t%d\nW9:

[dpdk-dev] [PATCH v1 11/58] net/octeontx2: add link stats operations

2019-06-02 Thread jerinj

From: Vamsi Attunuru 

Add link stats related operations and mark respective
items in the documentation.

Signed-off-by: Vamsi Attunuru 
Signed-off-by: Nithin Dabilpuram 
---
 doc/guides/nics/features/octeontx2.ini |   2 +
 doc/guides/nics/features/octeontx2_vec.ini |   2 +
 doc/guides/nics/features/octeontx2_vf.ini  |   2 +
 drivers/net/octeontx2/Makefile |   1 +
 drivers/net/octeontx2/meson.build  |   1 +
 drivers/net/octeontx2/otx2_ethdev.c|   8 ++
 drivers/net/octeontx2/otx2_ethdev.h|   8 ++
 drivers/net/octeontx2/otx2_link.c  | 108 +
 8 files changed, 132 insertions(+)
 create mode 100644 drivers/net/octeontx2/otx2_link.c

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index ce3067596..60009ab6d 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -10,4 +10,6 @@ ARMv8= Y
 Lock-free Tx queue   = Y
 SR-IOV   = Y
 Multiprocess aware   = Y
+Link status  = Y
+Link status event= Y
 Registers dump   = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index b2be52ccb..3a859edd1 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -10,4 +10,6 @@ ARMv8= Y
 Lock-free Tx queue   = Y
 SR-IOV   = Y
 Multiprocess aware   = Y
+Link status  = Y
+Link status event= Y
 Registers dump   = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index 76b0c3c10..e1cbd18b1 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -9,4 +9,6 @@ Linux VFIO   = Y
 ARMv8= Y
 Lock-free Tx queue   = Y
 Multiprocess aware   = Y
+Link status  = Y
+Link status event= Y
 Registers dump   = Y
diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index 0dfd43f4f..aa428fe6a 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -31,6 +31,7 @@ LIBABIVER := 1
 #
 SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
otx2_mac.c  \
+   otx2_link.c \
otx2_ethdev.c   \
otx2_ethdev_irq.c \
otx2_ethdev_ops.c \
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index 1c010c342..117d038ab 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -4,6 +4,7 @@
 
 sources = files(
'otx2_mac.c',
+   'otx2_link.c',
'otx2_ethdev.c',
'otx2_ethdev_irq.c',
'otx2_ethdev_ops.c',
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 48d5a15d6..cb4f6ebb9 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -39,6 +39,10 @@ nix_get_tx_offload_capa(struct otx2_eth_dev *dev)
return NIX_TX_OFFLOAD_CAPA;
 }
 
+static const struct otx2_dev_ops otx2_dev_ops = {
+   .link_status_update = otx2_eth_dev_link_status_update,
+};
+
 static int
 nix_lf_alloc(struct otx2_eth_dev *dev, uint32_t nb_rxq, uint32_t nb_txq)
 {
@@ -229,6 +233,7 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
 static const struct eth_dev_ops otx2_eth_dev_ops = {
.dev_infos_get= otx2_nix_info_get,
.dev_configure= otx2_nix_configure,
+   .link_update  = otx2_nix_link_update,
.get_reg  = otx2_nix_dev_get_reg,
 };
 
@@ -324,6 +329,9 @@ otx2_eth_dev_init(struct rte_eth_dev *eth_dev)
goto error;
}
}
+   /* Device generic callbacks */
+   dev->ops = &otx2_dev_ops;
+   dev->eth_dev = eth_dev;
 
/* Grab the NPA LF if required */
rc = otx2_npa_lf_init(pci_dev, dev);
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index c01fe0211..8a099817d 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -116,6 +116,7 @@ struct otx2_eth_dev {
uint8_t max_mac_entries;
uint8_t lf_tx_stats;
uint8_t lf_rx_stats;
+   uint16_t flags;
uint16_t cints;
uint16_t qints;
uint8_t configured;
@@ -135,6 +136,7 @@ struct otx2_eth_dev {
struct otx2_qint qints_mem[RTE_MAX_QUEUES_PER_PORT];
struct otx2_rss_info rss_info;
struct otx2_npc_flow_info npc_flow;
+   struct rte_eth_dev *eth_dev;
 } __rte_cache_aligned;
 
 static inline struct otx2_eth_dev *
@@ -147,6 +149,12 @@ otx2_eth_pmd_priv(struct rte_eth_dev *eth_dev)
 void otx2_nix_info_get(struct rte_eth_dev *eth_dev,
   struct rte_eth_dev_info *dev_info);
 
+/* Link */
+void otx2_nix_toggle_flag_link_cfg(struct otx2_eth_dev *dev, bool set);
+int otx2_nix_link

[dpdk-dev] [PATCH v1 10/58] net/octeontx2: add register dump support

2019-06-02 Thread jerinj

From: Kiran Kumar K 

Add register dump support and mark Registers dump in features.

Signed-off-by: Kiran Kumar K 
Signed-off-by: Jerin Jacob 
---
 doc/guides/nics/features/octeontx2.ini |   1 +
 doc/guides/nics/features/octeontx2_vec.ini |   1 +
 doc/guides/nics/features/octeontx2_vf.ini  |   1 +
 drivers/net/octeontx2/otx2_ethdev.c|   1 +
 drivers/net/octeontx2/otx2_ethdev.h|   3 +
 drivers/net/octeontx2/otx2_ethdev_debug.c  | 228 +
 drivers/net/octeontx2/otx2_ethdev_irq.c|   6 +
 7 files changed, 241 insertions(+)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 1f0148669..ce3067596 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -10,3 +10,4 @@ ARMv8= Y
 Lock-free Tx queue   = Y
 SR-IOV   = Y
 Multiprocess aware   = Y
+Registers dump   = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index 2b0644ee5..b2be52ccb 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -10,3 +10,4 @@ ARMv8= Y
 Lock-free Tx queue   = Y
 SR-IOV   = Y
 Multiprocess aware   = Y
+Registers dump   = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index 80f0d5c95..76b0c3c10 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -9,3 +9,4 @@ Linux VFIO   = Y
 ARMv8= Y
 Lock-free Tx queue   = Y
 Multiprocess aware   = Y
+Registers dump   = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 045855c2e..48d5a15d6 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -229,6 +229,7 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
 static const struct eth_dev_ops otx2_eth_dev_ops = {
.dev_infos_get= otx2_nix_info_get,
.dev_configure= otx2_nix_configure,
+   .get_reg  = otx2_nix_dev_get_reg,
 };
 
 static inline int
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index ff14a0129..c01fe0211 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -154,6 +154,9 @@ void otx2_nix_unregister_irqs(struct rte_eth_dev *eth_dev);
 void oxt2_nix_unregister_queue_irqs(struct rte_eth_dev *eth_dev);
 
 /* Debug */
+int otx2_nix_reg_dump(struct otx2_eth_dev *dev, uint64_t *data);
+int otx2_nix_dev_get_reg(struct rte_eth_dev *eth_dev,
+struct rte_dev_reg_info *regs);
 int otx2_nix_queues_ctx_dump(struct rte_eth_dev *eth_dev);
 void otx2_nix_cqe_dump(const struct nix_cqe_hdr_s *cq);
 
diff --git a/drivers/net/octeontx2/otx2_ethdev_debug.c 
b/drivers/net/octeontx2/otx2_ethdev_debug.c
index 39cda7637..9f06e5505 100644
--- a/drivers/net/octeontx2/otx2_ethdev_debug.c
+++ b/drivers/net/octeontx2/otx2_ethdev_debug.c
@@ -5,6 +5,234 @@
 #include "otx2_ethdev.h"
 
 #define nix_dump(fmt, ...) fprintf(stderr, fmt "\n", ##__VA_ARGS__)
+#define NIX_REG_INFO(reg) {reg, #reg}
+
+struct nix_lf_reg_info {
+   uint32_t offset;
+   const char *name;
+};
+
+static const struct
+nix_lf_reg_info nix_lf_reg[] = {
+   NIX_REG_INFO(NIX_LF_RX_SECRETX(0)),
+   NIX_REG_INFO(NIX_LF_RX_SECRETX(1)),
+   NIX_REG_INFO(NIX_LF_RX_SECRETX(2)),
+   NIX_REG_INFO(NIX_LF_RX_SECRETX(3)),
+   NIX_REG_INFO(NIX_LF_RX_SECRETX(4)),
+   NIX_REG_INFO(NIX_LF_RX_SECRETX(5)),
+   NIX_REG_INFO(NIX_LF_CFG),
+   NIX_REG_INFO(NIX_LF_GINT),
+   NIX_REG_INFO(NIX_LF_GINT_W1S),
+   NIX_REG_INFO(NIX_LF_GINT_ENA_W1C),
+   NIX_REG_INFO(NIX_LF_GINT_ENA_W1S),
+   NIX_REG_INFO(NIX_LF_ERR_INT),
+   NIX_REG_INFO(NIX_LF_ERR_INT_W1S),
+   NIX_REG_INFO(NIX_LF_ERR_INT_ENA_W1C),
+   NIX_REG_INFO(NIX_LF_ERR_INT_ENA_W1S),
+   NIX_REG_INFO(NIX_LF_RAS),
+   NIX_REG_INFO(NIX_LF_RAS_W1S),
+   NIX_REG_INFO(NIX_LF_RAS_ENA_W1C),
+   NIX_REG_INFO(NIX_LF_RAS_ENA_W1S),
+   NIX_REG_INFO(NIX_LF_SQ_OP_ERR_DBG),
+   NIX_REG_INFO(NIX_LF_MNQ_ERR_DBG),
+   NIX_REG_INFO(NIX_LF_SEND_ERR_DBG),
+};
+
+static int
+nix_lf_get_reg_count(struct otx2_eth_dev *dev)
+{
+   int reg_count = 0;
+
+   reg_count = RTE_DIM(nix_lf_reg);
+   /* NIX_LF_TX_STATX */
+   reg_count += dev->lf_tx_stats;
+   /* NIX_LF_RX_STATX */
+   reg_count += dev->lf_rx_stats;
+   /* NIX_LF_QINTX_CNT*/
+   reg_count += dev->qints;
+   /* NIX_LF_QINTX_INT */
+   reg_count += dev->qints;
+   /* NIX_LF_QINTX_ENA_W1S */
+   reg_count += dev->qints;
+   /* NIX_LF_QINTX_ENA_W1C */
+   reg_count += dev->qints;
+   /* NIX_LF_CINTX_CNT */
+   reg_count += dev->cints;
+   /* NIX_LF_CINTX_WAIT */
+   reg_count += dev->cints;
+   /* NIX

[dpdk-dev] [PATCH v1 13/58] net/octeontx2: add extended stats operations

2019-06-02 Thread jerinj

From: Kiran Kumar K 

Add extended operations and updated the feature list.

Signed-off-by: Kiran Kumar K 
Signed-off-by: Vamsi Attunuru 
---
 doc/guides/nics/features/octeontx2.ini |   1 +
 doc/guides/nics/features/octeontx2_vec.ini |   1 +
 doc/guides/nics/features/octeontx2_vf.ini  |   1 +
 drivers/net/octeontx2/otx2_ethdev.c|   5 +
 drivers/net/octeontx2/otx2_ethdev.h|  13 +
 drivers/net/octeontx2/otx2_stats.c | 270 +
 6 files changed, 291 insertions(+)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 72336ae15..3835b5069 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -14,4 +14,5 @@ Link status  = Y
 Link status event= Y
 Basic stats  = Y
 Stats per queue  = Y
+Extended stats   = Y
 Registers dump   = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index 0f3850188..e18443742 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -13,5 +13,6 @@ Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
 Basic stats  = Y
+Extended stats   = Y
 Stats per queue  = Y
 Registers dump   = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index 8bc72c4fb..89df760b3 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -12,5 +12,6 @@ Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
 Basic stats  = Y
+Extended stats   = Y
 Stats per queue  = Y
 Registers dump   = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 5787029d9..937ba6399 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -238,6 +238,11 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.stats_reset  = otx2_nix_dev_stats_reset,
.get_reg  = otx2_nix_dev_get_reg,
.queue_stats_mapping_set  = otx2_nix_queue_stats_mapping,
+   .xstats_get   = otx2_nix_xstats_get,
+   .xstats_get_names = otx2_nix_xstats_get_names,
+   .xstats_reset = otx2_nix_xstats_reset,
+   .xstats_get_by_id = otx2_nix_xstats_get_by_id,
+   .xstats_get_names_by_id   = otx2_nix_xstats_get_names_by_id,
 };
 
 static inline int
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index c9366a9ed..223dd5a5a 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -184,6 +184,19 @@ void otx2_nix_dev_stats_reset(struct rte_eth_dev *eth_dev);
 int otx2_nix_queue_stats_mapping(struct rte_eth_dev *dev,
 uint16_t queue_id, uint8_t stat_idx,
 uint8_t is_rx);
+int otx2_nix_xstats_get(struct rte_eth_dev *eth_dev,
+   struct rte_eth_xstat *xstats, unsigned int n);
+int otx2_nix_xstats_get_names(struct rte_eth_dev *eth_dev,
+ struct rte_eth_xstat_name *xstats_names,
+ unsigned int limit);
+void otx2_nix_xstats_reset(struct rte_eth_dev *eth_dev);
+
+int otx2_nix_xstats_get_by_id(struct rte_eth_dev *eth_dev,
+ const uint64_t *ids,
+ uint64_t *values, unsigned int n);
+int otx2_nix_xstats_get_names_by_id(struct rte_eth_dev *eth_dev,
+   struct rte_eth_xstat_name *xstats_names,
+   const uint64_t *ids, unsigned int limit);
 
 /* CGX */
 int otx2_cgx_rxtx_start(struct otx2_eth_dev *dev);
diff --git a/drivers/net/octeontx2/otx2_stats.c 
b/drivers/net/octeontx2/otx2_stats.c
index ade0f6ad6..deb83b704 100644
--- a/drivers/net/octeontx2/otx2_stats.c
+++ b/drivers/net/octeontx2/otx2_stats.c
@@ -6,6 +6,45 @@
 
 #include "otx2_ethdev.h"
 
+struct otx2_nix_xstats_name {
+   char name[RTE_ETH_XSTATS_NAME_SIZE];
+   uint32_t offset;
+};
+
+static const struct otx2_nix_xstats_name nix_tx_xstats[] = {
+   {"tx_ucast", NIX_STAT_LF_TX_TX_UCAST},
+   {"tx_bcast", NIX_STAT_LF_TX_TX_BCAST},
+   {"tx_mcast", NIX_STAT_LF_TX_TX_MCAST},
+   {"tx_drop", NIX_STAT_LF_TX_TX_DROP},
+   {"tx_octs", NIX_STAT_LF_TX_TX_OCTS},
+};
+
+static const struct otx2_nix_xstats_name nix_rx_xstats[] = {
+   {"rx_octs", NIX_STAT_LF_RX_RX_OCTS},
+   {"rx_ucast", NIX_STAT_LF_RX_RX_UCAST},
+   {"rx_bcast", NIX_STAT_LF_RX_RX_BCAST},
+   {"rx_mcast", NIX_STAT_LF_RX_RX_MCAST},
+   {"rx_drop", NIX_STAT_LF_RX_RX_DROP},
+   {"rx_drop_octs", NIX_STAT_LF_RX_RX_DROP_OCTS},
+   {"rx_fcs", NIX_STAT_LF_RX_RX_FCS},
+   {"rx_err", NIX_STAT_LF_RX_RX_ERR},
+   {"rx_drp_bcast", NIX_STAT_LF_RX_RX_DRP_BCA

[dpdk-dev] [PATCH v1 12/58] net/octeontx2: add basic stats operation

2019-06-02 Thread jerinj

From: Kiran Kumar K 

Add basic stat operation and updated the feature list.

Signed-off-by: Kiran Kumar K 
Signed-off-by: Vamsi Attunuru 
---
 doc/guides/nics/features/octeontx2.ini |   2 +
 doc/guides/nics/features/octeontx2_vec.ini |   2 +
 doc/guides/nics/features/octeontx2_vf.ini  |   2 +
 drivers/net/octeontx2/Makefile |   1 +
 drivers/net/octeontx2/meson.build  |   1 +
 drivers/net/octeontx2/otx2_ethdev.c|   3 +
 drivers/net/octeontx2/otx2_ethdev.h|  17 +++
 drivers/net/octeontx2/otx2_stats.c | 117 +
 8 files changed, 145 insertions(+)
 create mode 100644 drivers/net/octeontx2/otx2_stats.c

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 60009ab6d..72336ae15 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -12,4 +12,6 @@ SR-IOV   = Y
 Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
+Basic stats  = Y
+Stats per queue  = Y
 Registers dump   = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index 3a859edd1..0f3850188 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -12,4 +12,6 @@ SR-IOV   = Y
 Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
+Basic stats  = Y
+Stats per queue  = Y
 Registers dump   = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index e1cbd18b1..8bc72c4fb 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -11,4 +11,6 @@ Lock-free Tx queue   = Y
 Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
+Basic stats  = Y
+Stats per queue  = Y
 Registers dump   = Y
diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index aa428fe6a..dcd692b7b 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -32,6 +32,7 @@ LIBABIVER := 1
 SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
otx2_mac.c  \
otx2_link.c \
+   otx2_stats.c\
otx2_ethdev.c   \
otx2_ethdev_irq.c \
otx2_ethdev_ops.c \
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index 117d038ab..384237104 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -5,6 +5,7 @@
 sources = files(
'otx2_mac.c',
'otx2_link.c',
+   'otx2_stats.c',
'otx2_ethdev.c',
'otx2_ethdev_irq.c',
'otx2_ethdev_ops.c',
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index cb4f6ebb9..5787029d9 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -234,7 +234,10 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.dev_infos_get= otx2_nix_info_get,
.dev_configure= otx2_nix_configure,
.link_update  = otx2_nix_link_update,
+   .stats_get= otx2_nix_dev_stats_get,
+   .stats_reset  = otx2_nix_dev_stats_reset,
.get_reg  = otx2_nix_dev_get_reg,
+   .queue_stats_mapping_set  = otx2_nix_queue_stats_mapping,
 };
 
 static inline int
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 8a099817d..c9366a9ed 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -57,6 +57,12 @@
 #define NIX_TX_NB_SEG_MAX  9
 #endif
 
+#define CQ_OP_STAT_OP_ERR  63
+#define CQ_OP_STAT_CQ_ERR  46
+
+#define OP_ERR BIT_ULL(CQ_OP_STAT_OP_ERR)
+#define CQ_ERR BIT_ULL(CQ_OP_STAT_CQ_ERR)
+
 #define NIX_RSS_OFFLOAD(ETH_RSS_PORT | ETH_RSS_IP | 
ETH_RSS_UDP |\
 ETH_RSS_TCP | ETH_RSS_SCTP | \
 ETH_RSS_TUNNEL | ETH_RSS_L2_PAYLOAD)
@@ -135,6 +141,8 @@ struct otx2_eth_dev {
uint64_t tx_offload_capa;
struct otx2_qint qints_mem[RTE_MAX_QUEUES_PER_PORT];
struct otx2_rss_info rss_info;
+   uint32_t txmap[RTE_ETHDEV_QUEUE_STAT_CNTRS];
+   uint32_t rxmap[RTE_ETHDEV_QUEUE_STAT_CNTRS];
struct otx2_npc_flow_info npc_flow;
struct rte_eth_dev *eth_dev;
 } __rte_cache_aligned;
@@ -168,6 +176,15 @@ int otx2_nix_dev_get_reg(struct rte_eth_dev *eth_dev,
 int otx2_nix_queues_ctx_dump(struct rte_eth_dev *eth_dev);
 void otx2_nix_cqe_dump(const struct nix_cqe_hdr_s *cq);
 
+/* Stats */
+int otx2_nix_dev_stats_get(struct rte_eth_dev *eth_dev,
+  struct rte_eth_stats *stats);
+void otx2_nix_dev_stats_reset(struct rte_eth_dev *eth_dev);
+
+int otx2_ni

[dpdk-dev] [PATCH v1 14/58] net/octeontx2: add promiscuous and allmulticast mode

2019-06-02 Thread jerinj

From: Vamsi Attunuru 

Add promiscuous and allmulticast mode for PF devices and
update the respective feature list.

Signed-off-by: Vamsi Attunuru 
Signed-off-by: Sunil Kumar Kori 
---
 doc/guides/nics/features/octeontx2.ini |  2 +
 doc/guides/nics/features/octeontx2_vec.ini |  2 +
 drivers/net/octeontx2/otx2_ethdev.c|  4 ++
 drivers/net/octeontx2/otx2_ethdev.h|  6 ++
 drivers/net/octeontx2/otx2_ethdev_ops.c| 82 ++
 5 files changed, 96 insertions(+)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 3835b5069..40da1bb68 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -12,6 +12,8 @@ SR-IOV   = Y
 Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
+Promiscuous mode = Y
+Allmulticast mode= Y
 Basic stats  = Y
 Stats per queue  = Y
 Extended stats   = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index e18443742..1b89be452 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -12,6 +12,8 @@ SR-IOV   = Y
 Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
+Promiscuous mode = Y
+Allmulticast mode= Y
 Basic stats  = Y
 Extended stats   = Y
 Stats per queue  = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 937ba6399..826ce7f4e 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -237,6 +237,10 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.stats_get= otx2_nix_dev_stats_get,
.stats_reset  = otx2_nix_dev_stats_reset,
.get_reg  = otx2_nix_dev_get_reg,
+   .promiscuous_enable   = otx2_nix_promisc_enable,
+   .promiscuous_disable  = otx2_nix_promisc_disable,
+   .allmulticast_enable  = otx2_nix_allmulticast_enable,
+   .allmulticast_disable = otx2_nix_allmulticast_disable,
.queue_stats_mapping_set  = otx2_nix_queue_stats_mapping,
.xstats_get   = otx2_nix_xstats_get,
.xstats_get_names = otx2_nix_xstats_get_names,
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 223dd5a5a..549bc26e4 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -157,6 +157,12 @@ otx2_eth_pmd_priv(struct rte_eth_dev *eth_dev)
 void otx2_nix_info_get(struct rte_eth_dev *eth_dev,
   struct rte_eth_dev_info *dev_info);
 
+void otx2_nix_promisc_config(struct rte_eth_dev *eth_dev, int en);
+void otx2_nix_promisc_enable(struct rte_eth_dev *eth_dev);
+void otx2_nix_promisc_disable(struct rte_eth_dev *eth_dev);
+void otx2_nix_allmulticast_enable(struct rte_eth_dev *eth_dev);
+void otx2_nix_allmulticast_disable(struct rte_eth_dev *eth_dev);
+
 /* Link */
 void otx2_nix_toggle_flag_link_cfg(struct otx2_eth_dev *dev, bool set);
 int otx2_nix_link_update(struct rte_eth_dev *eth_dev, int wait_to_complete);
diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c 
b/drivers/net/octeontx2/otx2_ethdev_ops.c
index 9f86635d4..77cfa2cec 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -4,6 +4,88 @@
 
 #include "otx2_ethdev.h"
 
+static void
+nix_cgx_promisc_config(struct rte_eth_dev *eth_dev, int en)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct otx2_mbox *mbox = dev->mbox;
+
+   if (otx2_dev_is_vf(dev))
+   return;
+
+   if (en)
+   otx2_mbox_alloc_msg_cgx_promisc_enable(mbox);
+   else
+   otx2_mbox_alloc_msg_cgx_promisc_disable(mbox);
+
+   otx2_mbox_process(mbox);
+}
+
+void
+otx2_nix_promisc_config(struct rte_eth_dev *eth_dev, int en)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct otx2_mbox *mbox = dev->mbox;
+   struct nix_rx_mode *req;
+
+   if (otx2_dev_is_vf(dev))
+   return;
+
+   req = otx2_mbox_alloc_msg_nix_set_rx_mode(mbox);
+
+   if (en)
+   req->mode = NIX_RX_MODE_UCAST | NIX_RX_MODE_PROMISC;
+
+   otx2_mbox_process(mbox);
+   eth_dev->data->promiscuous = en;
+}
+
+void
+otx2_nix_promisc_enable(struct rte_eth_dev *eth_dev)
+{
+   otx2_nix_promisc_config(eth_dev, 1);
+   nix_cgx_promisc_config(eth_dev, 1);
+}
+
+void
+otx2_nix_promisc_disable(struct rte_eth_dev *eth_dev)
+{
+   otx2_nix_promisc_config(eth_dev, 0);
+   nix_cgx_promisc_config(eth_dev, 0);
+}
+
+static void
+nix_allmulticast_config(struct rte_eth_dev *eth_dev, int en)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct otx2_mbox *mbox = dev->mbox;
+   struct nix_rx_mode *req;
+
+   if (otx2_dev_is_vf(dev)

[dpdk-dev] [PATCH v1 15/58] net/octeontx2: add unicast MAC filter

2019-06-02 Thread jerinj

From: Sunil Kumar Kori 

Add unicast MAC filter for PF device and
update the respective feature list.

Signed-off-by: Sunil Kumar Kori 
Signed-off-by: Vamsi Attunuru 
---
 doc/guides/nics/features/octeontx2.ini |  1 +
 doc/guides/nics/features/octeontx2_vec.ini |  1 +
 drivers/net/octeontx2/otx2_ethdev.c|  3 +
 drivers/net/octeontx2/otx2_ethdev.h|  6 ++
 drivers/net/octeontx2/otx2_mac.c   | 77 ++
 5 files changed, 88 insertions(+)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 40da1bb68..cb77ab0fc 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -14,6 +14,7 @@ Link status  = Y
 Link status event= Y
 Promiscuous mode = Y
 Allmulticast mode= Y
+Unicast MAC filter   = Y
 Basic stats  = Y
 Stats per queue  = Y
 Extended stats   = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index 1b89be452..a51291158 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -14,6 +14,7 @@ Link status  = Y
 Link status event= Y
 Promiscuous mode = Y
 Allmulticast mode= Y
+Unicast MAC filter   = Y
 Basic stats  = Y
 Extended stats   = Y
 Stats per queue  = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 826ce7f4e..a72c901f4 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -237,6 +237,9 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.stats_get= otx2_nix_dev_stats_get,
.stats_reset  = otx2_nix_dev_stats_reset,
.get_reg  = otx2_nix_dev_get_reg,
+   .mac_addr_add = otx2_nix_mac_addr_add,
+   .mac_addr_remove  = otx2_nix_mac_addr_del,
+   .mac_addr_set = otx2_nix_mac_addr_set,
.promiscuous_enable   = otx2_nix_promisc_enable,
.promiscuous_disable  = otx2_nix_promisc_disable,
.allmulticast_enable  = otx2_nix_allmulticast_enable,
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 549bc26e4..8d0147afb 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -211,7 +211,13 @@ int otx2_cgx_mac_addr_set(struct rte_eth_dev *eth_dev,
  struct rte_ether_addr *addr);
 
 /* Mac address handling */
+int otx2_nix_mac_addr_set(struct rte_eth_dev *eth_dev,
+ struct rte_ether_addr *addr);
 int otx2_nix_mac_addr_get(struct rte_eth_dev *eth_dev, uint8_t *addr);
+int otx2_nix_mac_addr_add(struct rte_eth_dev *eth_dev,
+ struct rte_ether_addr *addr,
+ uint32_t index, uint32_t pool);
+void otx2_nix_mac_addr_del(struct rte_eth_dev *eth_dev, uint32_t index);
 int otx2_cgx_mac_max_entries_get(struct otx2_eth_dev *dev);
 
 /* Devargs */
diff --git a/drivers/net/octeontx2/otx2_mac.c b/drivers/net/octeontx2/otx2_mac.c
index 89b0ca6b0..b4bcc61f8 100644
--- a/drivers/net/octeontx2/otx2_mac.c
+++ b/drivers/net/octeontx2/otx2_mac.c
@@ -49,6 +49,83 @@ otx2_cgx_mac_max_entries_get(struct otx2_eth_dev *dev)
return rsp->max_dmac_filters;
 }
 
+int
+otx2_nix_mac_addr_add(struct rte_eth_dev *eth_dev, struct rte_ether_addr *addr,
+ uint32_t index __rte_unused, uint32_t pool __rte_unused)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct otx2_mbox *mbox = dev->mbox;
+   struct cgx_mac_addr_add_req *req;
+   struct cgx_mac_addr_add_rsp *rsp;
+   int rc;
+
+   if (otx2_dev_is_vf(dev))
+   return -ENOTSUP;
+
+   if (otx2_dev_active_vfs(dev))
+   return -ENOTSUP;
+
+   req = otx2_mbox_alloc_msg_cgx_mac_addr_add(mbox);
+   otx2_mbox_memcpy(req->mac_addr, addr->addr_bytes, RTE_ETHER_ADDR_LEN);
+
+   rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
+   if (rc) {
+   otx2_err("Failed to add mac address, rc=%d", rc);
+   goto done;
+   }
+
+   /* Enable promiscuous mode at NIX level */
+   otx2_nix_promisc_config(eth_dev, 1);
+
+done:
+   return rc;
+}
+
+void
+otx2_nix_mac_addr_del(struct rte_eth_dev *eth_dev, uint32_t index)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct otx2_mbox *mbox = dev->mbox;
+   struct cgx_mac_addr_del_req *req;
+   int rc;
+
+   if (otx2_dev_is_vf(dev))
+   return;
+
+   req = otx2_mbox_alloc_msg_cgx_mac_addr_del(mbox);
+   req->index = index;
+
+   rc = otx2_mbox_process(mbox);
+   if (rc)
+   otx2_err("Failed to delete mac address, rc=%d", rc);
+}
+
+int
+otx2_nix_mac_addr_set(struct rte_eth_dev *eth_dev, struct rte_ether_addr *addr)
+{
+   struct otx2_eth_dev *dev

[dpdk-dev] [PATCH v1 16/58] net/octeontx2: add RSS support

2019-06-02 Thread jerinj

From: Vamsi Attunuru 

Add RSS support and expose RSS related functions
to implement RSS action for rte_flow driver.

Signed-off-by: Vamsi Attunuru 
Signed-off-by: Kiran Kumar K 
---
 doc/guides/nics/features/octeontx2.ini |   4 +
 doc/guides/nics/features/octeontx2_vec.ini |   4 +
 doc/guides/nics/features/octeontx2_vf.ini  |   4 +
 drivers/net/octeontx2/Makefile |   1 +
 drivers/net/octeontx2/meson.build  |   1 +
 drivers/net/octeontx2/otx2_ethdev.c|  11 +
 drivers/net/octeontx2/otx2_ethdev.h|  35 ++
 drivers/net/octeontx2/otx2_rss.c   | 378 +
 8 files changed, 438 insertions(+)
 create mode 100644 drivers/net/octeontx2/otx2_rss.c

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index cb77ab0fc..48ac58b3a 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -15,6 +15,10 @@ Link status event= Y
 Promiscuous mode = Y
 Allmulticast mode= Y
 Unicast MAC filter   = Y
+RSS hash = Y
+RSS key update   = Y
+RSS reta update  = Y
+Inner RSS= Y
 Basic stats  = Y
 Stats per queue  = Y
 Extended stats   = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index a51291158..6fc647af4 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -15,6 +15,10 @@ Link status event= Y
 Promiscuous mode = Y
 Allmulticast mode= Y
 Unicast MAC filter   = Y
+RSS hash = Y
+RSS key update   = Y
+RSS reta update  = Y
+Inner RSS= Y
 Basic stats  = Y
 Extended stats   = Y
 Stats per queue  = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index 89df760b3..af3c70269 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -11,6 +11,10 @@ Lock-free Tx queue   = Y
 Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
+RSS hash = Y
+RSS key update   = Y
+RSS reta update  = Y
+Inner RSS= Y
 Basic stats  = Y
 Extended stats   = Y
 Stats per queue  = Y
diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index dcd692b7b..67352ec81 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -30,6 +30,7 @@ LIBABIVER := 1
 # all source are stored in SRCS-y
 #
 SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
+   otx2_rss.c  \
otx2_mac.c  \
otx2_link.c \
otx2_stats.c\
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index 384237104..b7e56e2ca 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -3,6 +3,7 @@
 #
 
 sources = files(
+   'otx2_rss.c',
'otx2_mac.c',
'otx2_link.c',
'otx2_stats.c',
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index a72c901f4..5289c79e8 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -195,6 +195,13 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto fail;
}
 
+   /* Configure RSS */
+   rc = otx2_nix_rss_config(eth_dev);
+   if (rc) {
+   otx2_err("Failed to configure rss rc=%d", rc);
+   goto free_nix_lf;
+   }
+
/* Register queue IRQs */
rc = oxt2_nix_register_queue_irqs(eth_dev);
if (rc) {
@@ -245,6 +252,10 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.allmulticast_enable  = otx2_nix_allmulticast_enable,
.allmulticast_disable = otx2_nix_allmulticast_disable,
.queue_stats_mapping_set  = otx2_nix_queue_stats_mapping,
+   .reta_update  = otx2_nix_dev_reta_update,
+   .reta_query   = otx2_nix_dev_reta_query,
+   .rss_hash_update  = otx2_nix_rss_hash_update,
+   .rss_hash_conf_get= otx2_nix_rss_hash_conf_get,
.xstats_get   = otx2_nix_xstats_get,
.xstats_get_names = otx2_nix_xstats_get_names,
.xstats_reset = otx2_nix_xstats_reset,
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 8d0147afb..67b164740 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -39,6 +39,9 @@
 #define NIX_MAX_HW_MTU 9190
 #define NIX_MAX_HW_FRS (NIX_MAX_HW_MTU + NIX_HW_L2_OVERHEAD)
 #define NIX_MIN_HW_FRS 60
+#define NIX_MIN_SQB512
+#define NIX_SQB_LIST_SPACE 2
+#define NIX_RSS_RETA_SIZE_MAX  256
 /* Group 0 will be used for RSS, 1 -7 will be used for rte_flow RSS action*/
 #define NIX_R

[dpdk-dev] [PATCH v1 17/58] net/octeontx2: add Rx queue setup and release

2019-06-02 Thread jerinj

From: Jerin Jacob 

Add Rx queue setup and release.

Signed-off-by: Jerin Jacob 
Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Vamsi Attunuru 
---
 drivers/net/octeontx2/otx2_ethdev.c | 310 
 drivers/net/octeontx2/otx2_ethdev.h |  51 +
 2 files changed, 361 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 5289c79e8..dbbc2263d 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -2,9 +2,15 @@
  * Copyright(C) 2019 Marvell International Ltd.
  */
 
+#include 
+#include 
+
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 #include "otx2_ethdev.h"
 
@@ -114,6 +120,308 @@ nix_lf_free(struct otx2_eth_dev *dev)
return otx2_mbox_process(mbox);
 }
 
+static inline void
+nix_rx_queue_reset(struct otx2_eth_rxq *rxq)
+{
+   rxq->head = 0;
+   rxq->available = 0;
+}
+
+static inline uint32_t
+nix_qsize_to_val(enum nix_q_size_e qsize)
+{
+   return (16UL << (qsize * 2));
+}
+
+static inline enum nix_q_size_e
+nix_qsize_clampup_get(struct otx2_eth_dev *dev, uint32_t val)
+{
+   int i;
+
+   if (otx2_ethdev_fixup_is_min_4k_q(dev))
+   i = nix_q_size_4K;
+   else
+   i = nix_q_size_16;
+
+   for (; i < nix_q_size_max; i++)
+   if (val <= nix_qsize_to_val(i))
+   break;
+
+   if (i >= nix_q_size_max)
+   i = nix_q_size_max - 1;
+
+   return i;
+}
+
+static int
+nix_cq_rq_init(struct rte_eth_dev *eth_dev, struct otx2_eth_dev *dev,
+  uint16_t qid, struct otx2_eth_rxq *rxq, struct rte_mempool *mp)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+   const struct rte_memzone *rz;
+   uint32_t ring_size, cq_size;
+   struct nix_aq_enq_req *aq;
+   uint16_t first_skip;
+   int rc;
+
+   cq_size = rxq->qlen;
+   ring_size = cq_size * NIX_CQ_ENTRY_SZ;
+   rz = rte_eth_dma_zone_reserve(eth_dev, "cq", qid, ring_size,
+ NIX_CQ_ALIGN, dev->node);
+   if (rz == NULL) {
+   otx2_err("Failed to allocate mem for cq hw ring");
+   rc = -ENOMEM;
+   goto fail;
+   }
+   memset(rz->addr, 0, rz->len);
+   rxq->desc = (uintptr_t)rz->addr;
+   rxq->qmask = cq_size - 1;
+
+   aq = otx2_mbox_alloc_msg_nix_aq_enq(mbox);
+   aq->qidx = qid;
+   aq->ctype = NIX_AQ_CTYPE_CQ;
+   aq->op = NIX_AQ_INSTOP_INIT;
+
+   aq->cq.ena = 1;
+   aq->cq.caching = 1;
+   aq->cq.qsize = rxq->qsize;
+   aq->cq.base = rz->iova;
+   aq->cq.avg_level = 0xff;
+   aq->cq.cq_err_int_ena = BIT(NIX_CQERRINT_CQE_FAULT);
+   aq->cq.cq_err_int_ena |= BIT(NIX_CQERRINT_DOOR_ERR);
+
+   /* Many to one reduction */
+   aq->cq.qint_idx = qid % dev->qints;
+
+   if (otx2_ethdev_fixup_is_limit_cq_full(dev)) {
+   uint16_t min_rx_drop;
+   const float rx_cq_skid = 1024 * 256;
+
+   min_rx_drop = ceil(rx_cq_skid / (float)cq_size);
+   aq->cq.drop = min_rx_drop;
+   aq->cq.drop_ena = 1;
+   }
+
+   rc = otx2_mbox_process(mbox);
+   if (rc) {
+   otx2_err("Failed to init cq context");
+   goto fail;
+   }
+
+   aq = otx2_mbox_alloc_msg_nix_aq_enq(mbox);
+   aq->qidx = qid;
+   aq->ctype = NIX_AQ_CTYPE_RQ;
+   aq->op = NIX_AQ_INSTOP_INIT;
+
+   aq->rq.sso_ena = 0;
+   aq->rq.cq = qid; /* RQ to CQ 1:1 mapped */
+   aq->rq.spb_ena = 0;
+   aq->rq.lpb_aura = npa_lf_aura_handle_to_aura(mp->pool_id);
+   first_skip = (sizeof(struct rte_mbuf));
+   first_skip += RTE_PKTMBUF_HEADROOM;
+   first_skip += rte_pktmbuf_priv_size(mp);
+   rxq->data_off = first_skip;
+
+   first_skip /= 8; /* Expressed in number of dwords */
+   aq->rq.first_skip = first_skip;
+   aq->rq.later_skip = (sizeof(struct rte_mbuf) / 8);
+   aq->rq.flow_tagw = 32; /* 32-bits */
+   aq->rq.lpb_sizem1 = rte_pktmbuf_data_room_size(mp);
+   aq->rq.lpb_sizem1 += rte_pktmbuf_priv_size(mp);
+   aq->rq.lpb_sizem1 += sizeof(struct rte_mbuf);
+   aq->rq.lpb_sizem1 /= 8;
+   aq->rq.lpb_sizem1 -= 1; /* Expressed in size minus one */
+   aq->rq.ena = 1;
+   aq->rq.pb_caching = 0x2; /* First cache aligned block to LLC */
+   aq->rq.xqe_imm_size = 0; /* No pkt data copy to CQE */
+   aq->rq.rq_int_ena = 0;
+   /* Many to one reduction */
+   aq->rq.qint_idx = qid % dev->qints;
+
+   if (otx2_ethdev_fixup_is_limit_cq_full(dev))
+   aq->rq.xqe_drop_ena = 1;
+
+   rc = otx2_mbox_process(mbox);
+   if (rc) {
+   otx2_err("Failed to init rq context");
+   goto fail;
+   }
+
+   return 0;
+fail:
+   return rc;
+}
+
+static int
+nix_cq_rq_uninit(struct rte_eth_dev *eth_dev, struct otx2_eth_rxq *rxq)
+{
+   struct otx2_eth_dev *dev =

[dpdk-dev] [PATCH v1 18/58] net/octeontx2: add Tx queue setup and release

2019-06-02 Thread jerinj

From: Jerin Jacob 

Add Tx queue setup and release.

Signed-off-by: Jerin Jacob 
Signed-off-by: Nithin Dabilpuram 
---
 drivers/net/octeontx2/otx2_ethdev.c | 384 +++-
 drivers/net/octeontx2/otx2_ethdev.h |  24 ++
 drivers/net/octeontx2/otx2_tx.h |  28 ++
 3 files changed, 435 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/octeontx2/otx2_tx.h

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index dbbc2263d..b501ba865 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -422,6 +422,372 @@ otx2_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, 
uint16_t rq,
return rc;
 }
 
+static inline uint8_t
+nix_sq_max_sqe_sz(struct otx2_eth_txq *txq)
+{
+   /*
+* Maximum three segments can be supported with W8, Choose
+* NIX_MAXSQESZ_W16 for multi segment offload.
+*/
+   if (txq->offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
+   return NIX_MAXSQESZ_W16;
+   else
+   return NIX_MAXSQESZ_W8;
+}
+
+static int
+nix_sq_init(struct otx2_eth_txq *txq)
+{
+   struct otx2_eth_dev *dev = txq->dev;
+   struct otx2_mbox *mbox = dev->mbox;
+   struct nix_aq_enq_req *sq;
+
+   if (txq->sqb_pool->pool_id == 0)
+   return -EINVAL;
+
+   sq = otx2_mbox_alloc_msg_nix_aq_enq(mbox);
+   sq->qidx = txq->sq;
+   sq->ctype = NIX_AQ_CTYPE_SQ;
+   sq->op = NIX_AQ_INSTOP_INIT;
+   sq->sq.max_sqe_size = nix_sq_max_sqe_sz(txq);
+
+   sq->sq.default_chan = dev->tx_chan_base;
+   sq->sq.sqe_stype = NIX_STYPE_STF;
+   sq->sq.ena = 1;
+   if (sq->sq.max_sqe_size == NIX_MAXSQESZ_W8)
+   sq->sq.sqe_stype = NIX_STYPE_STP;
+   sq->sq.sqb_aura =
+   npa_lf_aura_handle_to_aura(txq->sqb_pool->pool_id);
+   sq->sq.sq_int_ena = BIT(NIX_SQINT_LMT_ERR);
+   sq->sq.sq_int_ena |= BIT(NIX_SQINT_SQB_ALLOC_FAIL);
+   sq->sq.sq_int_ena |= BIT(NIX_SQINT_SEND_ERR);
+   sq->sq.sq_int_ena |= BIT(NIX_SQINT_MNQ_ERR);
+
+   /* Many to one reduction */
+   sq->sq.qint_idx = txq->sq % dev->qints;
+
+   return otx2_mbox_process(mbox);
+}
+
+static int
+nix_sq_uninit(struct otx2_eth_txq *txq)
+{
+   struct otx2_eth_dev *dev = txq->dev;
+   struct otx2_mbox *mbox = dev->mbox;
+   struct ndc_sync_op *ndc_req;
+   struct nix_aq_enq_rsp *rsp;
+   struct nix_aq_enq_req *aq;
+   uint16_t sqes_per_sqb;
+   void *sqb_buf;
+   int rc, count;
+
+   otx2_nix_dbg("Cleaning up sq %u", txq->sq);
+
+   aq = otx2_mbox_alloc_msg_nix_aq_enq(mbox);
+   aq->qidx = txq->sq;
+   aq->ctype = NIX_AQ_CTYPE_SQ;
+   aq->op = NIX_AQ_INSTOP_READ;
+
+   rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
+   if (rc)
+   return rc;
+
+   /* Check if sq is already cleaned up */
+   if (!rsp->sq.ena)
+   return 0;
+
+   /* Disable sq */
+   aq = otx2_mbox_alloc_msg_nix_aq_enq(mbox);
+   aq->qidx = txq->sq;
+   aq->ctype = NIX_AQ_CTYPE_SQ;
+   aq->op = NIX_AQ_INSTOP_WRITE;
+
+   aq->sq_mask.ena = ~aq->sq_mask.ena;
+   aq->sq.ena = 0;
+
+   rc = otx2_mbox_process(mbox);
+   if (rc)
+   return rc;
+
+   /* Read SQ and free sqb's */
+   aq = otx2_mbox_alloc_msg_nix_aq_enq(mbox);
+   aq->qidx = txq->sq;
+   aq->ctype = NIX_AQ_CTYPE_SQ;
+   aq->op = NIX_AQ_INSTOP_READ;
+
+   rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
+   if (rc)
+   return rc;
+
+   if (aq->sq.smq_pend)
+   rte_panic("otx2: sq has pending sqe's");
+
+   count = aq->sq.sqb_count;
+   sqes_per_sqb = 1 << txq->sqes_per_sqb_log2;
+   /* Free SQB's that are used */
+   sqb_buf = (void *)rsp->sq.head_sqb;
+   while (count) {
+   void *next_sqb;
+
+   next_sqb = *(void **)((uintptr_t)sqb_buf + ((sqes_per_sqb - 1) *
+ nix_sq_max_sqe_sz(txq)));
+   npa_lf_aura_op_free(txq->sqb_pool->pool_id, 1,
+   (uint64_t)sqb_buf);
+   sqb_buf = next_sqb;
+   count--;
+   }
+
+   /* Free next to use sqb */
+   if (rsp->sq.next_sqb)
+   npa_lf_aura_op_free(txq->sqb_pool->pool_id, 1,
+   rsp->sq.next_sqb);
+
+   /* Sync NDC-NIX-TX for LF */
+   ndc_req = otx2_mbox_alloc_msg_ndc_sync_op(mbox);
+   ndc_req->nix_lf_tx_sync = 1;
+   rc = otx2_mbox_process(mbox);
+   if (rc)
+   otx2_err("Error on NDC-NIX-TX LF sync, rc %d", rc);
+
+   return rc;
+}
+
+static int
+nix_alloc_sqb_pool(int port, struct otx2_eth_txq *txq, uint16_t nb_desc)
+{
+   struct otx2_eth_dev *dev = txq->dev;
+   uint16_t sqes_per_sqb, nb_sqb_bufs;
+   char name[RTE_MEMPOOL_NAMESIZE];
+   struct rte_mempool_objsz sz;
+   struct npa_aura_s *aura;
+   uint32_t tmp

[dpdk-dev] [PATCH v1 19/58] net/octeontx2: handle port reconfigure

2019-06-02 Thread jerinj

From: Vamsi Attunuru 

setup tx & rx queues with the previous configuration during
port reconfig, it handles cases like port reconfigure without
reconfiguring tx & rx queues.

Signed-off-by: Vamsi Attunuru 
Signed-off-by: Nithin Dabilpuram 
---
 drivers/net/octeontx2/otx2_ethdev.c | 180 
 drivers/net/octeontx2/otx2_ethdev.h |   2 +
 2 files changed, 182 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index b501ba865..6e14e12f0 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -787,6 +787,172 @@ otx2_nix_tx_queue_setup(struct rte_eth_dev *eth_dev, 
uint16_t sq,
return rc;
 }
 
+static int
+nix_store_queue_cfg_and_then_release(struct rte_eth_dev *eth_dev)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct otx2_eth_qconf *tx_qconf = NULL;
+   struct otx2_eth_qconf *rx_qconf = NULL;
+   struct otx2_eth_txq **txq;
+   struct otx2_eth_rxq **rxq;
+   int i, nb_rxq, nb_txq;
+
+   nb_rxq = RTE_MIN(dev->configured_nb_rx_qs, eth_dev->data->nb_rx_queues);
+   nb_txq = RTE_MIN(dev->configured_nb_tx_qs, eth_dev->data->nb_tx_queues);
+
+   tx_qconf = malloc(nb_txq * sizeof(*tx_qconf));
+   if (tx_qconf == NULL) {
+   otx2_err("Failed to allocate memory for tx_qconf");
+   goto fail;
+   }
+
+   rx_qconf = malloc(nb_rxq * sizeof(*rx_qconf));
+   if (rx_qconf == NULL) {
+   otx2_err("Failed to allocate memory for rx_qconf");
+   goto fail;
+   }
+
+   txq = (struct otx2_eth_txq **)eth_dev->data->tx_queues;
+   for (i = 0; i < nb_txq; i++) {
+   if (txq[i] == NULL) {
+   otx2_err("txq[%d] is already released", i);
+   goto fail;
+   }
+   memcpy(&tx_qconf[i], &txq[i]->qconf, sizeof(*tx_qconf));
+   otx2_nix_tx_queue_release(txq[i]);
+   eth_dev->data->tx_queues[i] = NULL;
+   }
+
+   rxq = (struct otx2_eth_rxq **)eth_dev->data->rx_queues;
+   for (i = 0; i < nb_rxq; i++) {
+   if (rxq[i] == NULL) {
+   otx2_err("rxq[%d] is already released", i);
+   goto fail;
+   }
+   memcpy(&rx_qconf[i], &rxq[i]->qconf, sizeof(*rx_qconf));
+   otx2_nix_rx_queue_release(rxq[i]);
+   eth_dev->data->rx_queues[i] = NULL;
+   }
+
+   dev->tx_qconf = tx_qconf;
+   dev->rx_qconf = rx_qconf;
+   return 0;
+
+fail:
+   if (tx_qconf)
+   free(tx_qconf);
+   if (rx_qconf)
+   free(rx_qconf);
+
+   return -ENOMEM;
+}
+
+static int
+nix_restore_queue_cfg(struct rte_eth_dev *eth_dev)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct otx2_eth_qconf *tx_qconf = dev->tx_qconf;
+   struct otx2_eth_qconf *rx_qconf = dev->rx_qconf;
+   struct otx2_eth_txq **txq;
+   struct otx2_eth_rxq **rxq;
+   int rc, i, nb_rxq, nb_txq;
+
+   nb_rxq = RTE_MIN(dev->configured_nb_rx_qs, eth_dev->data->nb_rx_queues);
+   nb_txq = RTE_MIN(dev->configured_nb_tx_qs, eth_dev->data->nb_tx_queues);
+
+   rc = -ENOMEM;
+   /* Setup tx & rx queues with previous configuration so
+* that the queues can be functional in cases like ports
+* are started without re configuring queues.
+*
+* Usual re config sequence is like below:
+* port_configure() {
+*  if(reconfigure) {
+*  queue_release()
+*  queue_setup()
+*  }
+*  queue_configure() {
+*  queue_release()
+*  queue_setup()
+*  }
+* }
+* port_start()
+*
+* In some application's control path, queue_configure() would
+* NOT be invoked for TXQs/RXQs in port_configure().
+* In such cases, queues can be functional after start as the
+* queues are already setup in port_configure().
+*/
+   for (i = 0; i < nb_txq; i++) {
+   rc = otx2_nix_tx_queue_setup(eth_dev, i, tx_qconf[i].nb_desc,
+tx_qconf[i].socket_id,
+&tx_qconf[i].conf.tx);
+   if (rc) {
+   otx2_err("Failed to setup tx queue rc=%d", rc);
+   txq = (struct otx2_eth_txq **)eth_dev->data->tx_queues;
+   for (i -= 1; i >= 0; i--)
+   otx2_nix_tx_queue_release(txq[i]);
+   goto fail;
+   }
+   }
+
+   free(tx_qconf); tx_qconf = NULL;
+
+   for (i = 0; i < nb_rxq; i++) {
+   rc = otx2_nix_rx_queue_setup(eth_dev, i, rx_qconf[i].nb_desc,
+rx_qconf[i].socket_id,
+

[dpdk-dev] [PATCH v1 21/58] net/octeontx2: introduce traffic manager

2019-06-02 Thread jerinj

From: Nithin Dabilpuram 

Introduce traffic manager infra and default hierarchy
creation.

Upon ethdev configure, a default hierarchy is
created with one-to-one mapped tm nodes. This topology
will be overridden when user explicitly creates and commits
a new hierarchy using rte_tm interface.

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Krzysztof Kanas 
---
 drivers/net/octeontx2/Makefile  |   1 +
 drivers/net/octeontx2/meson.build   |   1 +
 drivers/net/octeontx2/otx2_ethdev.c |  16 ++
 drivers/net/octeontx2/otx2_ethdev.h |  14 ++
 drivers/net/octeontx2/otx2_tm.c | 252 
 drivers/net/octeontx2/otx2_tm.h |  67 
 6 files changed, 351 insertions(+)
 create mode 100644 drivers/net/octeontx2/otx2_tm.c
 create mode 100644 drivers/net/octeontx2/otx2_tm.h

diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index 67352ec81..cf2ba0e0e 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -30,6 +30,7 @@ LIBABIVER := 1
 # all source are stored in SRCS-y
 #
 SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
+   otx2_tm.c   \
otx2_rss.c  \
otx2_mac.c  \
otx2_link.c \
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index b7e56e2ca..14e8e78f8 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -3,6 +3,7 @@
 #
 
 sources = files(
+   'otx2_tm.c',
'otx2_rss.c',
'otx2_mac.c',
'otx2_link.c',
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 04a953441..2808058a8 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1033,6 +1033,7 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
rc = nix_store_queue_cfg_and_then_release(eth_dev);
if (rc)
goto fail;
+   otx2_nix_tm_fini(eth_dev);
nix_lf_free(dev);
}
 
@@ -1066,6 +1067,13 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto free_nix_lf;
}
 
+   /* Init the default TM scheduler hierarchy */
+   rc = otx2_nix_tm_init_default(eth_dev);
+   if (rc) {
+   otx2_err("Failed to init traffic manager rc=%d", rc);
+   goto free_nix_lf;
+   }
+
/* Register queue IRQs */
rc = oxt2_nix_register_queue_irqs(eth_dev);
if (rc) {
@@ -1368,6 +1376,9 @@ otx2_eth_dev_init(struct rte_eth_dev *eth_dev)
/* Also sync same MAC address to CGX table */
otx2_cgx_mac_addr_set(eth_dev, ð_dev->data->mac_addrs[0]);
 
+   /* Initialize the tm data structures */
+   otx2_nix_tm_conf_init(eth_dev);
+
dev->tx_offload_capa = nix_get_tx_offload_capa(dev);
dev->rx_offload_capa = nix_get_rx_offload_capa(dev);
 
@@ -1423,6 +1434,11 @@ otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool 
mbox_close)
}
eth_dev->data->nb_rx_queues = 0;
 
+   /* Free tm resources */
+   rc = otx2_nix_tm_fini(eth_dev);
+   if (rc)
+   otx2_err("Failed to cleanup tm, rc=%d", rc);
+
/* Unregister queue irqs */
oxt2_nix_unregister_queue_irqs(eth_dev);
 
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 7b8c7e1e5..b2b7d4186 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -19,6 +19,7 @@
 #include "otx2_irq.h"
 #include "otx2_mempool.h"
 #include "otx2_rx.h"
+#include "otx2_tm.h"
 #include "otx2_tx.h"
 
 #define OTX2_ETH_DEV_PMD_VERSION   "1.0"
@@ -181,6 +182,19 @@ struct otx2_eth_dev {
uint64_t rx_offload_capa;
uint64_t tx_offload_capa;
struct otx2_qint qints_mem[RTE_MAX_QUEUES_PER_PORT];
+   uint16_t txschq[NIX_TXSCH_LVL_CNT];
+   uint16_t txschq_contig[NIX_TXSCH_LVL_CNT];
+   uint16_t txschq_index[NIX_TXSCH_LVL_CNT];
+   uint16_t txschq_contig_index[NIX_TXSCH_LVL_CNT];
+   /* Dis-contiguous queues */
+   uint16_t txschq_list[NIX_TXSCH_LVL_CNT][MAX_TXSCHQ_PER_FUNC];
+   /* Contiguous queues */
+   uint16_t txschq_contig_list[NIX_TXSCH_LVL_CNT][MAX_TXSCHQ_PER_FUNC];
+   uint16_t otx2_tm_root_lvl;
+   uint16_t tm_flags;
+   uint16_t tm_leaf_cnt;
+   struct otx2_nix_tm_node_list node_list;
+   struct otx2_nix_tm_shaper_profile_list shaper_profile_list;
struct otx2_rss_info rss_info;
uint32_t txmap[RTE_ETHDEV_QUEUE_STAT_CNTRS];
uint32_t rxmap[RTE_ETHDEV_QUEUE_STAT_CNTRS];
diff --git a/drivers/net/octeontx2/otx2_tm.c b/drivers/net/octeontx2/otx2_tm.c
new file mode 100644
index 0..bc0474242
--- /dev/null
+++ b/drivers/net/octeontx2/otx2_tm.c
@@ -0,0 +1,252 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include 
+
+#include "otx2_ethdev.h"
+#include "otx2_tm.h"
+
+/

[dpdk-dev] [PATCH v1 23/58] net/octeontx2: configure TM HW resources

2019-06-02 Thread jerinj

From: Nithin Dabilpuram 

This patch sets up and configure hierarchy in hw
nodes. Since all the registers are with RVU AF,
register configuration is also done using mbox
communication.

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Krzysztof Kanas 
---
 drivers/net/octeontx2/otx2_tm.c | 504 
 drivers/net/octeontx2/otx2_tm.h |  82 ++
 2 files changed, 586 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_tm.c b/drivers/net/octeontx2/otx2_tm.c
index 91f31df05..463f90acd 100644
--- a/drivers/net/octeontx2/otx2_tm.c
+++ b/drivers/net/octeontx2/otx2_tm.c
@@ -20,6 +20,41 @@ enum otx2_tm_node_level {
OTX2_TM_LVL_MAX,
 };
 
+static inline
+uint64_t shaper2regval(struct shaper_params *shaper)
+{
+   return (shaper->burst_exponent << 37) | (shaper->burst_mantissa << 29) |
+   (shaper->div_exp << 13) | (shaper->exponent << 9) |
+   (shaper->mantissa << 1);
+}
+
+static int
+nix_get_link(struct otx2_eth_dev *dev)
+{
+   int link = 13 /* SDP */;
+   uint16_t lmac_chan;
+   uint16_t map;
+
+   lmac_chan = dev->tx_chan_base;
+
+   /* CGX lmac link */
+   if (lmac_chan >= 0x800) {
+   map = lmac_chan & 0x7FF;
+   link = 4 * ((map >> 8) & 0xF) + ((map >> 4) & 0xF);
+   } else if (lmac_chan < 0x700) {
+   /* LBK channel */
+   link = 12;
+   }
+
+   return link;
+}
+
+static uint8_t
+nix_get_relchan(struct otx2_eth_dev *dev)
+{
+   return dev->tx_chan_base & 0xff;
+}
+
 static bool
 nix_tm_have_tl1_access(struct otx2_eth_dev *dev)
 {
@@ -28,6 +63,24 @@ nix_tm_have_tl1_access(struct otx2_eth_dev *dev)
!is_lbk && !dev->maxvf;
 }
 
+static int
+find_prio_anchor(struct otx2_eth_dev *dev, uint32_t node_id)
+{
+   struct otx2_nix_tm_node *child_node;
+
+   TAILQ_FOREACH(child_node, &dev->node_list, node) {
+   if (!child_node->parent)
+   continue;
+   if (!(child_node->parent->id == node_id))
+   continue;
+   if (child_node->priority == child_node->parent->rr_prio)
+   continue;
+   return child_node->hw_id - child_node->priority;
+   }
+   return 0;
+}
+
+
 static struct otx2_nix_tm_shaper_profile *
 nix_tm_shaper_profile_search(struct otx2_eth_dev *dev, uint32_t shaper_id)
 {
@@ -40,6 +93,451 @@ nix_tm_shaper_profile_search(struct otx2_eth_dev *dev, 
uint32_t shaper_id)
return NULL;
 }
 
+static inline uint64_t
+shaper_rate_to_nix(uint64_t cclk_hz, uint64_t cclk_ticks,
+  uint64_t value, uint64_t *exponent_p,
+  uint64_t *mantissa_p, uint64_t *div_exp_p)
+{
+   uint64_t div_exp, exponent, mantissa;
+
+   /* Boundary checks */
+   if (value < MIN_SHAPER_RATE(cclk_hz, cclk_ticks) ||
+   value > MAX_SHAPER_RATE(cclk_hz, cclk_ticks))
+   return 0;
+
+   if (value <= SHAPER_RATE(cclk_hz, cclk_ticks, 0, 0, 0)) {
+   /* Calculate rate div_exp and mantissa using
+* the following formula:
+*
+* value = (cclk_hz * (256 + mantissa)
+*  / ((cclk_ticks << div_exp) * 256)
+*/
+   div_exp = 0;
+   exponent = 0;
+   mantissa = MAX_RATE_MANTISSA;
+
+   while (value < (cclk_hz / (cclk_ticks << div_exp)))
+   div_exp += 1;
+
+   while (value <
+  ((cclk_hz * (256 + mantissa)) /
+   ((cclk_ticks << div_exp) * 256)))
+   mantissa -= 1;
+   } else {
+   /* Calculate rate exponent and mantissa using
+* the following formula:
+*
+* value = (cclk_hz * ((256 + mantissa) << exponent)
+*  / (cclk_ticks * 256)
+*
+*/
+   div_exp = 0;
+   exponent = MAX_RATE_EXPONENT;
+   mantissa = MAX_RATE_MANTISSA;
+
+   while (value < (cclk_hz * (1 << exponent)) / cclk_ticks)
+   exponent -= 1;
+
+   while (value < (cclk_hz * ((256 + mantissa) << exponent)) /
+  (cclk_ticks * 256))
+   mantissa -= 1;
+   }
+
+   if (div_exp > MAX_RATE_DIV_EXP ||
+   exponent > MAX_RATE_EXPONENT || mantissa > MAX_RATE_MANTISSA)
+   return 0;
+
+   if (div_exp_p)
+   *div_exp_p = div_exp;
+   if (exponent_p)
+   *exponent_p = exponent;
+   if (mantissa_p)
+   *mantissa_p = mantissa;
+
+   /* Calculate real rate value */
+   return SHAPER_RATE(cclk_hz, cclk_ticks, exponent, mantissa, div_exp);
+}
+
+static inline uint64_t
+lx_shaper_rate_to_nix(uint64_t cclk_hz, uint32_t hw_lvl,
+ uint64_t value, uint64_t *exponent,
+

[dpdk-dev] [PATCH v1 20/58] net/octeontx2: add queue start and stop operations

2019-06-02 Thread jerinj

From: Nithin Dabilpuram 

Add queue start and stop operations. Tx queue needs
to update the flow control value, Which will be
added in sub subsequent patch.

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Vamsi Attunuru 
---
 doc/guides/nics/features/octeontx2.ini |  1 +
 doc/guides/nics/features/octeontx2_vec.ini |  1 +
 doc/guides/nics/features/octeontx2_vf.ini  |  1 +
 drivers/net/octeontx2/otx2_ethdev.c| 92 ++
 drivers/net/octeontx2/otx2_ethdev.h|  2 +
 5 files changed, 97 insertions(+)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 48ac58b3a..31816a183 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -12,6 +12,7 @@ SR-IOV   = Y
 Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
+Queue start/stop = Y
 Promiscuous mode = Y
 Allmulticast mode= Y
 Unicast MAC filter   = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index 6fc647af4..d79428652 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -12,6 +12,7 @@ SR-IOV   = Y
 Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
+Queue start/stop = Y
 Promiscuous mode = Y
 Allmulticast mode= Y
 Unicast MAC filter   = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index af3c70269..d4deb52af 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -11,6 +11,7 @@ Lock-free Tx queue   = Y
 Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
+Queue start/stop = Y
 RSS hash = Y
 RSS key update   = Y
 RSS reta update  = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 6e14e12f0..04a953441 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -252,6 +252,26 @@ nix_cq_rq_init(struct rte_eth_dev *eth_dev, struct 
otx2_eth_dev *dev,
return rc;
 }
 
+static int
+nix_rq_enb_dis(struct rte_eth_dev *eth_dev,
+  struct otx2_eth_rxq *rxq, const bool enb)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct otx2_mbox *mbox = dev->mbox;
+   struct nix_aq_enq_req *aq;
+
+   /* Pkts will be dropped silently if RQ is disabled */
+   aq = otx2_mbox_alloc_msg_nix_aq_enq(mbox);
+   aq->qidx = rxq->rq;
+   aq->ctype = NIX_AQ_CTYPE_RQ;
+   aq->op = NIX_AQ_INSTOP_WRITE;
+
+   aq->rq.ena = enb;
+   aq->rq_mask.ena = ~(aq->rq_mask.ena);
+
+   return otx2_mbox_process(mbox);
+}
+
 static int
 nix_cq_rq_uninit(struct rte_eth_dev *eth_dev, struct otx2_eth_rxq *rxq)
 {
@@ -1090,6 +1110,74 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
return rc;
 }
 
+int
+otx2_nix_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t qidx)
+{
+   struct rte_eth_dev_data *data = eth_dev->data;
+
+   if (data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
+   return 0;
+
+   data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
+   return 0;
+}
+
+int
+otx2_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qidx)
+{
+   struct rte_eth_dev_data *data = eth_dev->data;
+
+   if (data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
+   return 0;
+
+   data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
+   return 0;
+}
+
+static int
+otx2_nix_rx_queue_start(struct rte_eth_dev *eth_dev, uint16_t qidx)
+{
+   struct otx2_eth_rxq *rxq = eth_dev->data->rx_queues[qidx];
+   struct rte_eth_dev_data *data = eth_dev->data;
+   int rc;
+
+   if (data->rx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
+   return 0;
+
+   rc = nix_rq_enb_dis(rxq->eth_dev, rxq, true);
+   if (rc) {
+   otx2_err("Failed to enable rxq=%u, rc=%d", qidx, rc);
+   goto done;
+   }
+
+   data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
+
+done:
+   return rc;
+}
+
+static int
+otx2_nix_rx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qidx)
+{
+   struct otx2_eth_rxq *rxq = eth_dev->data->rx_queues[qidx];
+   struct rte_eth_dev_data *data = eth_dev->data;
+   int rc;
+
+   if (data->rx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
+   return 0;
+
+   rc = nix_rq_enb_dis(rxq->eth_dev, rxq, false);
+   if (rc) {
+   otx2_err("Failed to disable rxq=%u, rc=%d", qidx, rc);
+   goto done;
+   }
+
+   data->rx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
+
+done:
+   return rc;
+}
+
 /* Initialize and register driver with DPDK Application */
 static const struct eth_dev_ops otx2_eth_dev_ops = {
.dev_infos_get=

[dpdk-dev] [PATCH v1 22/58] net/octeontx2: alloc and free TM HW resources

2019-06-02 Thread jerinj

From: Krzysztof Kanas 

Allocate and free shaper/scheduler hardware resources for
nodes of hirearchy levels in sw.

Signed-off-by: Krzysztof Kanas 
Signed-off-by: Nithin Dabilpuram 
---
 drivers/net/octeontx2/otx2_tm.c | 350 
 1 file changed, 350 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_tm.c b/drivers/net/octeontx2/otx2_tm.c
index bc0474242..91f31df05 100644
--- a/drivers/net/octeontx2/otx2_tm.c
+++ b/drivers/net/octeontx2/otx2_tm.c
@@ -54,6 +54,69 @@ nix_tm_node_search(struct otx2_eth_dev *dev,
return NULL;
 }
 
+static uint32_t
+check_rr(struct otx2_eth_dev *dev, uint32_t priority, uint32_t parent_id)
+{
+   struct otx2_nix_tm_node *tm_node;
+   uint32_t rr_num = 0;
+
+   TAILQ_FOREACH(tm_node, &dev->node_list, node) {
+   if (!tm_node->parent)
+   continue;
+
+   if (!(tm_node->parent->id == parent_id))
+   continue;
+
+   if (tm_node->priority == priority)
+   rr_num++;
+   }
+   return rr_num;
+}
+
+static int
+nix_tm_update_parent_info(struct otx2_eth_dev *dev)
+{
+   struct otx2_nix_tm_node *tm_node_child;
+   struct otx2_nix_tm_node *tm_node;
+   struct otx2_nix_tm_node *parent;
+   uint32_t rr_num = 0;
+   uint32_t priority;
+
+   TAILQ_FOREACH(tm_node, &dev->node_list, node) {
+   if (!tm_node->parent)
+   continue;
+   /* Count group of children of same priority i.e are RR */
+   parent = tm_node->parent;
+   priority = tm_node->priority;
+   rr_num = check_rr(dev, priority, parent->id);
+
+   /* Assuming that multiple RR groups are
+* not configured based on capability.
+*/
+   if (rr_num > 1) {
+   parent->rr_prio = priority;
+   parent->rr_num = rr_num;
+   }
+
+   /* Find out static priority children that are not in RR */
+   TAILQ_FOREACH(tm_node_child, &dev->node_list, node) {
+   if (!tm_node_child->parent)
+   continue;
+   if (parent->id != tm_node_child->parent->id)
+   continue;
+   if (parent->max_prio == UINT32_MAX &&
+   tm_node_child->priority != parent->rr_prio)
+   parent->max_prio = 0;
+
+   if (parent->max_prio < tm_node_child->priority &&
+   parent->rr_prio != tm_node_child->priority)
+   parent->max_prio = tm_node_child->priority;
+   }
+   }
+
+   return 0;
+}
+
 static int
 nix_tm_node_add_to_list(struct otx2_eth_dev *dev, uint32_t node_id,
uint32_t parent_node_id, uint32_t priority,
@@ -115,6 +178,274 @@ nix_tm_clear_shaper_profiles(struct otx2_eth_dev *dev)
return 0;
 }
 
+static int
+nix_tm_free_resources(struct otx2_eth_dev *dev, uint32_t flags_mask,
+ uint32_t flags, bool hw_only)
+{
+   struct otx2_nix_tm_shaper_profile *shaper_profile;
+   struct otx2_nix_tm_node *tm_node, *next_node;
+   struct otx2_mbox *mbox = dev->mbox;
+   struct nix_txsch_free_req *req;
+   uint32_t shaper_profile_id;
+   bool skip_node = false;
+   int rc = 0;
+
+   next_node = TAILQ_FIRST(&dev->node_list);
+   while (next_node) {
+   tm_node = next_node;
+   next_node = TAILQ_NEXT(tm_node, node);
+
+   /* Check for only requested nodes */
+   if ((tm_node->flags & flags_mask) != flags)
+   continue;
+
+   if (nix_tm_have_tl1_access(dev) &&
+   tm_node->hw_lvl_id ==  NIX_TXSCH_LVL_TL1)
+   skip_node = true;
+
+   otx2_tm_dbg("Free hwres for node %u, hwlvl %u, hw_id %u (%p)",
+   tm_node->id,  tm_node->hw_lvl_id,
+   tm_node->hw_id, tm_node);
+   /* Free specific HW resource if requested */
+   if (!skip_node && flags_mask &&
+   tm_node->flags & NIX_TM_NODE_HWRES) {
+   req = otx2_mbox_alloc_msg_nix_txsch_free(mbox);
+   req->flags = 0;
+   req->schq_lvl = tm_node->hw_lvl_id;
+   req->schq = tm_node->hw_id;
+   rc = otx2_mbox_process(mbox);
+   if (rc)
+   break;
+   } else {
+   skip_node = false;
+   }
+   tm_node->flags &= ~NIX_TM_NODE_HWRES;
+
+   /* Leave software elements if needed */
+   if (hw_only)
+   continue;
+
+   shaper_profile_id = tm_node->params.shaper_profile_id;
+

[dpdk-dev] [PATCH v1 26/58] net/octeontx2: add link status set operations

2019-06-02 Thread jerinj

From: Vamsi Attunuru 

Add support for setting the link up and down.

Signed-off-by: Vamsi Attunuru 
Signed-off-by: Nithin Dabilpuram 
---
 drivers/net/octeontx2/otx2_ethdev.c |  2 ++
 drivers/net/octeontx2/otx2_ethdev.h |  2 ++
 drivers/net/octeontx2/otx2_link.c   | 49 +
 3 files changed, 53 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 9fbade075..9ceeb6ffa 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1268,6 +1268,8 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.tx_queue_stop= otx2_nix_tx_queue_stop,
.rx_queue_start   = otx2_nix_rx_queue_start,
.rx_queue_stop= otx2_nix_rx_queue_stop,
+   .dev_set_link_up  = otx2_nix_dev_set_link_up,
+   .dev_set_link_down= otx2_nix_dev_set_link_down,
.dev_supported_ptypes_get = otx2_nix_supported_ptypes_get,
.stats_get= otx2_nix_dev_stats_get,
.stats_reset  = otx2_nix_dev_stats_reset,
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 83d6b2dc2..7bd3e83e4 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -269,6 +269,8 @@ void otx2_nix_toggle_flag_link_cfg(struct otx2_eth_dev 
*dev, bool set);
 int otx2_nix_link_update(struct rte_eth_dev *eth_dev, int wait_to_complete);
 void otx2_eth_dev_link_status_update(struct otx2_dev *dev,
 struct cgx_link_user_info *link);
+int otx2_nix_dev_set_link_up(struct rte_eth_dev *eth_dev);
+int otx2_nix_dev_set_link_down(struct rte_eth_dev *eth_dev);
 
 /* IRQ */
 int otx2_nix_register_irqs(struct rte_eth_dev *eth_dev);
diff --git a/drivers/net/octeontx2/otx2_link.c 
b/drivers/net/octeontx2/otx2_link.c
index 228a0cd8e..8fcbdc9b7 100644
--- a/drivers/net/octeontx2/otx2_link.c
+++ b/drivers/net/octeontx2/otx2_link.c
@@ -106,3 +106,52 @@ otx2_nix_link_update(struct rte_eth_dev *eth_dev, int 
wait_to_complete)
 
return rte_eth_linkstatus_set(eth_dev, &link);
 }
+
+static int
+nix_dev_set_link_state(struct rte_eth_dev *eth_dev, uint8_t enable)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct otx2_mbox *mbox = dev->mbox;
+   struct cgx_set_link_state_msg *req;
+
+   req = otx2_mbox_alloc_msg_cgx_set_link_state(mbox);
+   req->enable = enable;
+   return otx2_mbox_process(mbox);
+}
+
+int
+otx2_nix_dev_set_link_up(struct rte_eth_dev *eth_dev)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   int rc, i;
+
+   if (otx2_dev_is_vf(dev))
+   return -ENOTSUP;
+
+   rc = nix_dev_set_link_state(eth_dev, 1);
+   if (rc)
+   goto done;
+
+   /* Start tx queues  */
+   for (i = 0; i < eth_dev->data->nb_tx_queues; i++)
+   otx2_nix_tx_queue_start(eth_dev, i);
+
+done:
+   return rc;
+}
+
+int
+otx2_nix_dev_set_link_down(struct rte_eth_dev *eth_dev)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   int i;
+
+   if (otx2_dev_is_vf(dev))
+   return -ENOTSUP;
+
+   /* Stop tx queues  */
+   for (i = 0; i < eth_dev->data->nb_tx_queues; i++)
+   otx2_nix_tx_queue_stop(eth_dev, i);
+
+   return nix_dev_set_link_state(eth_dev, 0);
+}
-- 
2.21.0

[dpdk-dev] [PATCH v1 25/58] net/octeontx2: add ptype support

2019-06-02 Thread jerinj

From: Jerin Jacob 

The fields from CQE needs to be converted to
ptype and rx ol flags in mbuf. This patch adds
create lookup memory for those items to be
used in Fastpath.

Signed-off-by: Jerin Jacob 
Signed-off-by: Kiran Kumar K 
Signed-off-by: Harman Kalra 
---
 doc/guides/nics/features/octeontx2.ini|   1 +
 doc/guides/nics/features/octeontx2_vec.ini|   1 +
 doc/guides/nics/features/octeontx2_vf.ini |   1 +
 drivers/net/octeontx2/Makefile|   1 +
 drivers/net/octeontx2/meson.build |   1 +
 drivers/net/octeontx2/otx2_ethdev.c   |   2 +
 drivers/net/octeontx2/otx2_ethdev.h   |   6 +
 drivers/net/octeontx2/otx2_lookup.c   | 279 ++
 drivers/net/octeontx2/otx2_rx.h   |   7 +
 .../octeontx2/rte_pmd_octeontx2_version.map   |   3 +
 10 files changed, 302 insertions(+)
 create mode 100644 drivers/net/octeontx2/otx2_lookup.c

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 31816a183..221fc84d8 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -20,6 +20,7 @@ RSS hash = Y
 RSS key update   = Y
 RSS reta update  = Y
 Inner RSS= Y
+Packet type parsing  = Y
 Basic stats  = Y
 Stats per queue  = Y
 Extended stats   = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index d79428652..e11327c7a 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -20,6 +20,7 @@ RSS hash = Y
 RSS key update   = Y
 RSS reta update  = Y
 Inner RSS= Y
+Packet type parsing  = Y
 Basic stats  = Y
 Extended stats   = Y
 Stats per queue  = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index d4deb52af..b2115cea4 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -16,6 +16,7 @@ RSS hash = Y
 RSS key update   = Y
 RSS reta update  = Y
 Inner RSS= Y
+Packet type parsing  = Y
 Basic stats  = Y
 Extended stats   = Y
 Stats per queue  = Y
diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index cf2ba0e0e..00f61c354 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -35,6 +35,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
otx2_mac.c  \
otx2_link.c \
otx2_stats.c\
+   otx2_lookup.c   \
otx2_ethdev.c   \
otx2_ethdev_irq.c \
otx2_ethdev_ops.c \
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index 14e8e78f8..eb5206ea1 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -8,6 +8,7 @@ sources = files(
'otx2_mac.c',
'otx2_link.c',
'otx2_stats.c',
+   'otx2_lookup.c',
'otx2_ethdev.c',
'otx2_ethdev_irq.c',
'otx2_ethdev_ops.c',
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index a269e1be6..9fbade075 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -441,6 +441,7 @@ otx2_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, 
uint16_t rq,
rxq->pool = mp;
rxq->qlen = nix_qsize_to_val(qsize);
rxq->qsize = qsize;
+   rxq->lookup_mem = otx2_nix_fastpath_lookup_mem_get();
 
/* Alloc completion queue */
rc = nix_cq_rq_init(eth_dev, dev, rq, rxq, mp);
@@ -1267,6 +1268,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.tx_queue_stop= otx2_nix_tx_queue_stop,
.rx_queue_start   = otx2_nix_rx_queue_start,
.rx_queue_stop= otx2_nix_rx_queue_stop,
+   .dev_supported_ptypes_get = otx2_nix_supported_ptypes_get,
.stats_get= otx2_nix_dev_stats_get,
.stats_reset  = otx2_nix_dev_stats_reset,
.get_reg  = otx2_nix_dev_get_reg,
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index b2b7d4186..83d6b2dc2 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -335,6 +335,12 @@ int otx2_cgx_rxtx_stop(struct otx2_eth_dev *dev);
 int otx2_cgx_mac_addr_set(struct rte_eth_dev *eth_dev,
  struct rte_ether_addr *addr);
 
+/* Lookup configuration */
+void *otx2_nix_fastpath_lookup_mem_get(void);
+
+/* PTYPES */
+const uint32_t *otx2_nix_supported_ptypes_get(struct rte_eth_dev *dev);
+
 /* Mac address handling */
 int otx2_nix_mac_addr_set(struct rte_eth_dev *eth_dev,
  struct rte_ether_addr *addr);
diff --git a/drivers/net/octeontx2/otx2_lookup.c 
b/drivers/net/octeont

[dpdk-dev] [PATCH v1 24/58] net/octeontx2: enable Tx through traffic manager

2019-06-02 Thread jerinj

From: Krzysztof Kanas 

This patch enables pkt transmit through traffic manager
hierarchy by clearing software XOFF on the nodes and linking
tx queues to corresponding leaf nodes.
It also adds support to start and stop tx queue using
traffic manager.

Signed-off-by: Krzysztof Kanas 
Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Vamsi Attunuru 
---
 drivers/net/octeontx2/otx2_ethdev.c |  72 ++-
 drivers/net/octeontx2/otx2_tm.c | 295 +++-
 drivers/net/octeontx2/otx2_tm.h |   4 +
 3 files changed, 366 insertions(+), 5 deletions(-)

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 2808058a8..a269e1be6 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -120,6 +120,32 @@ nix_lf_free(struct otx2_eth_dev *dev)
return otx2_mbox_process(mbox);
 }
 
+int
+otx2_cgx_rxtx_start(struct otx2_eth_dev *dev)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+
+   if (otx2_dev_is_vf(dev))
+   return 0;
+
+   otx2_mbox_alloc_msg_cgx_start_rxtx(mbox);
+
+   return otx2_mbox_process(mbox);
+}
+
+int
+otx2_cgx_rxtx_stop(struct otx2_eth_dev *dev)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+
+   if (otx2_dev_is_vf(dev))
+   return 0;
+
+   otx2_mbox_alloc_msg_cgx_stop_rxtx(mbox);
+
+   return otx2_mbox_process(mbox);
+}
+
 static inline void
 nix_rx_queue_reset(struct otx2_eth_rxq *rxq)
 {
@@ -461,16 +487,27 @@ nix_sq_init(struct otx2_eth_txq *txq)
struct otx2_eth_dev *dev = txq->dev;
struct otx2_mbox *mbox = dev->mbox;
struct nix_aq_enq_req *sq;
+   uint32_t rr_quantum;
+   uint16_t smq;
+   int rc;
 
if (txq->sqb_pool->pool_id == 0)
return -EINVAL;
 
+   rc = otx2_nix_tm_get_leaf_data(dev, txq->sq, &rr_quantum, &smq);
+   if (rc) {
+   otx2_err("Failed to get sq->smq(leaf node), rc=%d", rc);
+   return rc;
+   }
+
sq = otx2_mbox_alloc_msg_nix_aq_enq(mbox);
sq->qidx = txq->sq;
sq->ctype = NIX_AQ_CTYPE_SQ;
sq->op = NIX_AQ_INSTOP_INIT;
sq->sq.max_sqe_size = nix_sq_max_sqe_sz(txq);
 
+   sq->sq.smq = smq;
+   sq->sq.smq_rr_quantum = rr_quantum;
sq->sq.default_chan = dev->tx_chan_base;
sq->sq.sqe_stype = NIX_STYPE_STF;
sq->sq.ena = 1;
@@ -697,6 +734,9 @@ otx2_nix_tx_queue_release(void *_txq)
 
otx2_nix_dbg("Releasing txq %u", txq->sq);
 
+   /* Flush and disable tm */
+   otx2_nix_tm_sw_xoff(txq, false);
+
/* Free sqb's and disable sq */
nix_sq_uninit(txq);
 
@@ -1122,24 +1162,52 @@ int
 otx2_nix_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t qidx)
 {
struct rte_eth_dev_data *data = eth_dev->data;
+   struct otx2_eth_txq *txq;
+   int rc = -EINVAL;
+
+   txq = eth_dev->data->tx_queues[qidx];
 
if (data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED)
return 0;
 
+   rc = otx2_nix_sq_sqb_aura_fc(txq, true);
+   if (rc) {
+   otx2_err("Failed to enable sqb aura fc, txq=%u, rc=%d",
+qidx, rc);
+   goto done;
+   }
+
data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED;
-   return 0;
+
+done:
+   return rc;
 }
 
 int
 otx2_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qidx)
 {
struct rte_eth_dev_data *data = eth_dev->data;
+   struct otx2_eth_txq *txq;
+   int rc;
+
+   txq = eth_dev->data->tx_queues[qidx];
 
if (data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED)
return 0;
 
+   txq->fc_cache_pkts = 0;
+
+   rc = otx2_nix_sq_sqb_aura_fc(txq, false);
+   if (rc) {
+   otx2_err("Failed to disable sqb aura fc, txq=%u, rc=%d",
+qidx, rc);
+   goto done;
+   }
+
data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED;
-   return 0;
+
+done:
+   return rc;
 }
 
 static int
diff --git a/drivers/net/octeontx2/otx2_tm.c b/drivers/net/octeontx2/otx2_tm.c
index 463f90acd..4439389b8 100644
--- a/drivers/net/octeontx2/otx2_tm.c
+++ b/drivers/net/octeontx2/otx2_tm.c
@@ -676,6 +676,223 @@ nix_tm_clear_shaper_profiles(struct otx2_eth_dev *dev)
return 0;
 }
 
+static int
+nix_smq_xoff(struct otx2_eth_dev *dev, uint16_t smq, bool enable)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+   struct nix_txschq_config *req;
+
+   req = otx2_mbox_alloc_msg_nix_txschq_cfg(mbox);
+   req->lvl = NIX_TXSCH_LVL_SMQ;
+   req->num_regs = 1;
+
+   req->reg[0] = NIX_AF_SMQX_CFG(smq);
+   /* Unmodified fields */
+   req->regval[0] = (NIX_MAX_HW_FRS << 8) | NIX_MIN_HW_FRS;
+
+   if (enable)
+   req->regval[0] |= BIT_ULL(50) | BIT_ULL(49);
+   else
+   req->regval[0] |= 0;
+
+   return otx2_mbox_process(mbox);
+}
+
+int
+otx2_nix_sq_sqb_aura_fc(void *__tx

[dpdk-dev] [PATCH v1 28/58] net/octeontx2: add Rx and Tx descriptor operations

2019-06-02 Thread jerinj

From: Jerin Jacob 

Add Rx and Tx queue descriptor related operations.

Signed-off-by: Jerin Jacob 
Signed-off-by: Kiran Kumar K 
---
 doc/guides/nics/features/octeontx2.ini |  2 +
 doc/guides/nics/features/octeontx2_vec.ini |  2 +
 doc/guides/nics/features/octeontx2_vf.ini  |  2 +
 drivers/net/octeontx2/otx2_ethdev.c|  4 ++
 drivers/net/octeontx2/otx2_ethdev.h|  4 ++
 drivers/net/octeontx2/otx2_ethdev_ops.c| 83 ++
 6 files changed, 97 insertions(+)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 221fc84d8..79b49bf66 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -12,6 +12,7 @@ SR-IOV   = Y
 Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
+Free Tx mbuf on demand = Y
 Queue start/stop = Y
 Promiscuous mode = Y
 Allmulticast mode= Y
@@ -21,6 +22,7 @@ RSS key update   = Y
 RSS reta update  = Y
 Inner RSS= Y
 Packet type parsing  = Y
+Rx descriptor status = Y
 Basic stats  = Y
 Stats per queue  = Y
 Extended stats   = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index e11327c7a..fc0390dac 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -12,6 +12,7 @@ SR-IOV   = Y
 Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
+Free Tx mbuf on demand = Y
 Queue start/stop = Y
 Promiscuous mode = Y
 Allmulticast mode= Y
@@ -21,6 +22,7 @@ RSS key update   = Y
 RSS reta update  = Y
 Inner RSS= Y
 Packet type parsing  = Y
+Rx descriptor status = Y
 Basic stats  = Y
 Extended stats   = Y
 Stats per queue  = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index b2115cea4..6c63e12d0 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -11,12 +11,14 @@ Lock-free Tx queue   = Y
 Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
+Free Tx mbuf on demand = Y
 Queue start/stop = Y
 RSS hash = Y
 RSS key update   = Y
 RSS reta update  = Y
 Inner RSS= Y
 Packet type parsing  = Y
+Rx descriptor status = Y
 Basic stats  = Y
 Extended stats   = Y
 Stats per queue  = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index e9af48c8d..41adc6858 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1293,6 +1293,10 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.xstats_get_names_by_id   = otx2_nix_xstats_get_names_by_id,
.rxq_info_get = otx2_nix_rxq_info_get,
.txq_info_get = otx2_nix_txq_info_get,
+   .rx_queue_count   = otx2_nix_rx_queue_count,
+   .rx_descriptor_done   = otx2_nix_rx_descriptor_done,
+   .rx_descriptor_status = otx2_nix_rx_descriptor_status,
+   .tx_done_cleanup  = otx2_nix_tx_done_cleanup,
.pool_ops_supported   = otx2_nix_pool_ops_supported,
 };
 
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 594021285..c849231d0 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -259,6 +259,10 @@ void otx2_nix_rxq_info_get(struct rte_eth_dev *eth_dev, 
uint16_t queue_id,
   struct rte_eth_rxq_info *qinfo);
 void otx2_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id,
   struct rte_eth_txq_info *qinfo);
+uint32_t otx2_nix_rx_queue_count(struct rte_eth_dev *eth_dev, uint16_t qidx);
+int otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt);
+int otx2_nix_rx_descriptor_done(void *rxq, uint16_t offset);
+int otx2_nix_rx_descriptor_status(void *rx_queue, uint16_t offset);
 
 void otx2_nix_promisc_config(struct rte_eth_dev *eth_dev, int en);
 void otx2_nix_promisc_enable(struct rte_eth_dev *eth_dev);
diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c 
b/drivers/net/octeontx2/otx2_ethdev_ops.c
index 95a5eb6ed..627f20cf5 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -126,6 +126,89 @@ otx2_nix_txq_info_get(struct rte_eth_dev *eth_dev, 
uint16_t queue_id,
qinfo->conf.tx_deferred_start = 0;
 }
 
+static void
+nix_rx_head_tail_get(struct otx2_eth_dev *dev,
+uint32_t *head, uint32_t *tail, uint16_t queue_idx)
+{
+   uint64_t reg, val;
+
+   if (head == NULL || tail == NULL)
+   return;
+
+   reg = (((uint64_t)queue_idx) << 32);
+   val = otx2_atomic64_add_nosync(reg, (int64_t *)
+  (dev->base + NIX_LF_CQ_OP_STATUS));
+   if (val & (OP_ERR | CQ_ERR))

[dpdk-dev] [PATCH v1 29/58] net/octeontx2: add module EEPROM dump

2019-06-02 Thread jerinj

From: Vamsi Attunuru 

add module EEPROM dump operation.

Signed-off-by: Vamsi Attunuru 
---
 doc/guides/nics/features/octeontx2.ini |  1 +
 doc/guides/nics/features/octeontx2_vec.ini |  1 +
 doc/guides/nics/features/octeontx2_vf.ini  |  1 +
 drivers/net/octeontx2/otx2_ethdev.c|  2 +
 drivers/net/octeontx2/otx2_ethdev.h|  4 ++
 drivers/net/octeontx2/otx2_ethdev_ops.c| 51 ++
 6 files changed, 60 insertions(+)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 79b49bf66..18daccc49 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -26,4 +26,5 @@ Rx descriptor status = Y
 Basic stats  = Y
 Stats per queue  = Y
 Extended stats   = Y
+Module EEPROM dump   = Y
 Registers dump   = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index fc0390dac..ccf4dac42 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -26,4 +26,5 @@ Rx descriptor status = Y
 Basic stats  = Y
 Extended stats   = Y
 Stats per queue  = Y
+Module EEPROM dump   = Y
 Registers dump   = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index 6c63e12d0..812d5d649 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -22,4 +22,5 @@ Rx descriptor status = Y
 Basic stats  = Y
 Extended stats   = Y
 Stats per queue  = Y
+Module EEPROM dump   = Y
 Registers dump   = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 41adc6858..0df487983 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1298,6 +1298,8 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.rx_descriptor_status = otx2_nix_rx_descriptor_status,
.tx_done_cleanup  = otx2_nix_tx_done_cleanup,
.pool_ops_supported   = otx2_nix_pool_ops_supported,
+   .get_module_info  = otx2_nix_get_module_info,
+   .get_module_eeprom= otx2_nix_get_module_eeprom,
 };
 
 static inline int
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index c849231d0..8fbd4532e 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -254,6 +254,10 @@ otx2_eth_pmd_priv(struct rte_eth_dev *eth_dev)
 /* Ops */
 void otx2_nix_info_get(struct rte_eth_dev *eth_dev,
   struct rte_eth_dev_info *dev_info);
+int otx2_nix_get_module_info(struct rte_eth_dev *eth_dev,
+struct rte_eth_dev_module_info *modinfo);
+int otx2_nix_get_module_eeprom(struct rte_eth_dev *eth_dev,
+  struct rte_dev_eeprom_info *info);
 int otx2_nix_pool_ops_supported(struct rte_eth_dev *eth_dev, const char *pool);
 void otx2_nix_rxq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id,
   struct rte_eth_rxq_info *qinfo);
diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c 
b/drivers/net/octeontx2/otx2_ethdev_ops.c
index 627f20cf5..51c156786 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -220,6 +220,57 @@ otx2_nix_pool_ops_supported(struct rte_eth_dev *eth_dev, 
const char *pool)
return -ENOTSUP;
 }
 
+static struct cgx_fw_data *
+nix_get_fwdata(struct otx2_eth_dev *dev)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+   struct cgx_fw_data *rsp = NULL;
+
+   otx2_mbox_alloc_msg_cgx_get_aux_link_info(mbox);
+
+   otx2_mbox_process_msg(mbox, (void *)&rsp);
+
+   return rsp;
+}
+
+int
+otx2_nix_get_module_info(struct rte_eth_dev *eth_dev,
+struct rte_eth_dev_module_info *modinfo)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct cgx_fw_data *rsp;
+
+   rsp = nix_get_fwdata(dev);
+   if (rsp == NULL)
+   return -EIO;
+
+   modinfo->type = rsp->fwdata.sfp_eeprom.sff_id;
+   modinfo->eeprom_len = SFP_EEPROM_SIZE;
+
+   return 0;
+}
+
+int
+otx2_nix_get_module_eeprom(struct rte_eth_dev *eth_dev,
+  struct rte_dev_eeprom_info *info)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct cgx_fw_data *rsp;
+
+   if (!info->data || !info->length ||
+   (info->offset + info->length > SFP_EEPROM_SIZE))
+   return -EINVAL;
+
+   rsp = nix_get_fwdata(dev);
+   if (rsp == NULL)
+   return -EIO;
+
+   otx2_mbox_memcpy(info->data, rsp->fwdata.sfp_eeprom.buf + info->offset,
+info->length);
+
+   return 0;
+}
+
 void
 otx2_nix_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info 
*devinfo)
 {
-- 
2.21.0

[dpdk-dev] [PATCH v1 27/58] net/octeontx2: add queue info and pool supported operations

2019-06-02 Thread jerinj

From: Nithin Dabilpuram 

Add Rx and Tx queue info get and pool ops supported
operations.

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_ethdev.c |  3 ++
 drivers/net/octeontx2/otx2_ethdev.h |  5 +++
 drivers/net/octeontx2/otx2_ethdev_ops.c | 51 +
 3 files changed, 59 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 9ceeb6ffa..e9af48c8d 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1291,6 +1291,9 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.xstats_reset = otx2_nix_xstats_reset,
.xstats_get_by_id = otx2_nix_xstats_get_by_id,
.xstats_get_names_by_id   = otx2_nix_xstats_get_names_by_id,
+   .rxq_info_get = otx2_nix_rxq_info_get,
+   .txq_info_get = otx2_nix_txq_info_get,
+   .pool_ops_supported   = otx2_nix_pool_ops_supported,
 };
 
 static inline int
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 7bd3e83e4..594021285 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -254,6 +254,11 @@ otx2_eth_pmd_priv(struct rte_eth_dev *eth_dev)
 /* Ops */
 void otx2_nix_info_get(struct rte_eth_dev *eth_dev,
   struct rte_eth_dev_info *dev_info);
+int otx2_nix_pool_ops_supported(struct rte_eth_dev *eth_dev, const char *pool);
+void otx2_nix_rxq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id,
+  struct rte_eth_rxq_info *qinfo);
+void otx2_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id,
+  struct rte_eth_txq_info *qinfo);
 
 void otx2_nix_promisc_config(struct rte_eth_dev *eth_dev, int en);
 void otx2_nix_promisc_enable(struct rte_eth_dev *eth_dev);
diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c 
b/drivers/net/octeontx2/otx2_ethdev_ops.c
index 77cfa2cec..95a5eb6ed 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -2,6 +2,8 @@
  * Copyright(C) 2019 Marvell International Ltd.
  */
 
+#include 
+
 #include "otx2_ethdev.h"
 
 static void
@@ -86,6 +88,55 @@ otx2_nix_allmulticast_disable(struct rte_eth_dev *eth_dev)
nix_allmulticast_config(eth_dev, 0);
 }
 
+void
+otx2_nix_rxq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id,
+ struct rte_eth_rxq_info *qinfo)
+{
+   struct otx2_eth_rxq *rxq;
+
+   rxq = eth_dev->data->rx_queues[queue_id];
+
+   qinfo->mp = rxq->pool;
+   qinfo->scattered_rx = eth_dev->data->scattered_rx;
+   qinfo->nb_desc = rxq->qconf.nb_desc;
+
+   qinfo->conf.rx_free_thresh = 0;
+   qinfo->conf.rx_drop_en = 0;
+   qinfo->conf.rx_deferred_start = 0;
+   qinfo->conf.offloads = rxq->offloads;
+}
+
+void
+otx2_nix_txq_info_get(struct rte_eth_dev *eth_dev, uint16_t queue_id,
+ struct rte_eth_txq_info *qinfo)
+{
+   struct otx2_eth_txq *txq;
+
+   txq = eth_dev->data->tx_queues[queue_id];
+
+   qinfo->nb_desc = txq->qconf.nb_desc;
+
+   qinfo->conf.tx_thresh.pthresh = 0;
+   qinfo->conf.tx_thresh.hthresh = 0;
+   qinfo->conf.tx_thresh.wthresh = 0;
+
+   qinfo->conf.tx_free_thresh = 0;
+   qinfo->conf.tx_rs_thresh = 0;
+   qinfo->conf.offloads = txq->offloads;
+   qinfo->conf.tx_deferred_start = 0;
+}
+
+int
+otx2_nix_pool_ops_supported(struct rte_eth_dev *eth_dev, const char *pool)
+{
+   RTE_SET_USED(eth_dev);
+
+   if (!strcmp(pool, rte_mbuf_platform_mempool_ops()))
+   return 0;
+
+   return -ENOTSUP;
+}
+
 void
 otx2_nix_info_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info 
*devinfo)
 {
-- 
2.21.0

[dpdk-dev] [PATCH v1 31/58] net/octeontx2: add PTP base support

2019-06-02 Thread jerinj

From: Harman Kalra 

Add PTP enable and disable operations.

Signed-off-by: Harman Kalra 
Signed-off-by: Zyta Szpak 
---
 drivers/net/octeontx2/Makefile  |   1 +
 drivers/net/octeontx2/meson.build   |   1 +
 drivers/net/octeontx2/otx2_ethdev.c |  22 -
 drivers/net/octeontx2/otx2_ethdev.h |  17 
 drivers/net/octeontx2/otx2_ptp.c| 135 
 drivers/net/octeontx2/otx2_rx.h |  11 +++
 6 files changed, 184 insertions(+), 3 deletions(-)
 create mode 100644 drivers/net/octeontx2/otx2_ptp.c

diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index 1d3788466..b1c8e4e52 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -33,6 +33,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
otx2_tm.c   \
otx2_rss.c  \
otx2_mac.c  \
+   otx2_ptp.c  \
otx2_link.c \
otx2_stats.c\
otx2_lookup.c   \
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index e4fcac763..57d6c0a58 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -6,6 +6,7 @@ sources = files(
'otx2_tm.c',
'otx2_rss.c',
'otx2_mac.c',
+   'otx2_ptp.c',
'otx2_link.c',
'otx2_stats.c',
'otx2_lookup.c',
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 97e0e3465..683aecd4e 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -336,9 +336,7 @@ nix_cq_rq_uninit(struct rte_eth_dev *eth_dev, struct 
otx2_eth_rxq *rxq)
 static inline int
 nix_get_data_off(struct otx2_eth_dev *dev)
 {
-   RTE_SET_USED(dev);
-
-   return 0;
+   return otx2_ethdev_is_ptp_en(dev) ? NIX_TIMESYNC_RX_OFFSET : 0;
 }
 
 uint64_t
@@ -450,6 +448,7 @@ otx2_nix_rx_queue_setup(struct rte_eth_dev *eth_dev, 
uint16_t rq,
rxq->qlen = nix_qsize_to_val(qsize);
rxq->qsize = qsize;
rxq->lookup_mem = otx2_nix_fastpath_lookup_mem_get();
+   rxq->tstamp = &dev->tstamp;
 
/* Alloc completion queue */
rc = nix_cq_rq_init(eth_dev, dev, rq, rxq, mp);
@@ -716,6 +715,7 @@ otx2_nix_form_default_desc(struct otx2_eth_txq *txq)
send_mem->dsz = 0x0;
send_mem->wmem = 0x1;
send_mem->alg = NIX_SENDMEMALG_SETTSTMP;
+   send_mem->addr = txq->dev->tstamp.tx_tstamp_iova;
}
sg = (union nix_send_sg_s *)&txq->cmd[4];
} else {
@@ -1137,6 +1137,16 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto free_nix_lf;
}
 
+   /* Enable PTP if it was requested by the app or if it is already
+* enabled in PF owning this VF
+*/
+   memset(&dev->tstamp, 0, sizeof(struct otx2_timesync_info));
+   if ((dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP) ||
+   otx2_ethdev_is_ptp_en(dev))
+   otx2_nix_timesync_enable(eth_dev);
+   else
+   otx2_nix_timesync_disable(eth_dev);
+
/*
 * Restore queue config when reconfigure followed by
 * reconfigure and no queue configure invoked from application case.
@@ -1317,6 +1327,8 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.get_module_eeprom= otx2_nix_get_module_eeprom,
.flow_ctrl_get= otx2_nix_flow_ctrl_get,
.flow_ctrl_set= otx2_nix_flow_ctrl_set,
+   .timesync_enable  = otx2_nix_timesync_enable,
+   .timesync_disable = otx2_nix_timesync_disable,
 };
 
 static inline int
@@ -1521,6 +1533,10 @@ otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool 
mbox_close)
/* Disable nix bpid config */
otx2_nix_rxchan_bpid_cfg(eth_dev, false);
 
+   /* Disable PTP if already enabled */
+   if (otx2_ethdev_is_ptp_en(dev))
+   otx2_nix_timesync_disable(eth_dev);
+
/* Free up SQs */
for (i = 0; i < eth_dev->data->nb_tx_queues; i++) {
otx2_nix_tx_queue_release(eth_dev->data->tx_queues[i]);
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index fad151b54..809a9656f 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -13,6 +13,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "otx2_common.h"
 #include "otx2_dev.h"
@@ -109,6 +110,12 @@
 #define NIX_DEFAULT_RSS_CTX_GROUP  0
 #define NIX_DEFAULT_RSS_MCAM_IDX  -1
 
+#define otx2_ethdev_is_ptp_en(dev) ((dev)->ptp_en)
+
+#define NIX_TIMESYNC_TX_CMD_LEN8
+/* Additional timesync values. */
+#define OTX2_CYCLECOUNTER_MASK   0xULL
+
 enum nix_q_size_e {
nix_q_size_16,  /* 16 entries */
nix_q_size_64,  /* 64 entries */
@@ -214,6 +221,12 @@ struct otx2_eth_dev {
struc

[dpdk-dev] [PATCH v1 32/58] net/octeontx2: add remaining PTP operations

2019-06-02 Thread jerinj

From: Harman Kalra 

Add remaining PTP configuration/slowpath operations.
Timesync feature is available only for PF devices.

Signed-off-by: Harman Kalra 
Signed-off-by: Zyta Szpak 
---
 doc/guides/nics/features/octeontx2.ini |   2 +
 drivers/net/octeontx2/otx2_ethdev.c|   6 ++
 drivers/net/octeontx2/otx2_ethdev.h|  11 +++
 drivers/net/octeontx2/otx2_ptp.c   | 130 +
 4 files changed, 149 insertions(+)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index ba7fdc868..0f416ee4b 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -23,6 +23,8 @@ RSS reta update  = Y
 Inner RSS= Y
 Flow control = Y
 Packet type parsing  = Y
+Timesync = Y
+Timestamp offload= Y
 Rx descriptor status = Y
 Basic stats  = Y
 Stats per queue  = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 683aecd4e..9cd3ce407 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -47,6 +47,7 @@ nix_get_tx_offload_capa(struct otx2_eth_dev *dev)
 
 static const struct otx2_dev_ops otx2_dev_ops = {
.link_status_update = otx2_eth_dev_link_status_update,
+   .ptp_info_update = otx2_eth_dev_ptp_info_update
 };
 
 static int
@@ -1329,6 +1330,11 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.flow_ctrl_set= otx2_nix_flow_ctrl_set,
.timesync_enable  = otx2_nix_timesync_enable,
.timesync_disable = otx2_nix_timesync_disable,
+   .timesync_read_rx_timestamp = otx2_nix_timesync_read_rx_timestamp,
+   .timesync_read_tx_timestamp = otx2_nix_timesync_read_tx_timestamp,
+   .timesync_adjust_time = otx2_nix_timesync_adjust_time,
+   .timesync_read_time   = otx2_nix_timesync_read_time,
+   .timesync_write_time  = otx2_nix_timesync_write_time,
 };
 
 static inline int
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 809a9656f..ba6d1736e 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -412,5 +412,16 @@ void otx2_nix_form_default_desc(struct otx2_eth_txq *txq);
 /* Timesync - PTP routines */
 int otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev);
 int otx2_nix_timesync_disable(struct rte_eth_dev *eth_dev);
+int otx2_nix_timesync_read_rx_timestamp(struct rte_eth_dev *eth_dev,
+   struct timespec *timestamp,
+   uint32_t flags);
+int otx2_nix_timesync_read_tx_timestamp(struct rte_eth_dev *eth_dev,
+   struct timespec *timestamp);
+int otx2_nix_timesync_adjust_time(struct rte_eth_dev *eth_dev, int64_t delta);
+int otx2_nix_timesync_write_time(struct rte_eth_dev *eth_dev,
+const struct timespec *ts);
+int otx2_nix_timesync_read_time(struct rte_eth_dev *eth_dev,
+   struct timespec *ts);
+int otx2_eth_dev_ptp_info_update(struct otx2_dev *dev, bool ptp_en);
 
 #endif /* __OTX2_ETHDEV_H__ */
diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c
index 105067949..5291da241 100644
--- a/drivers/net/octeontx2/otx2_ptp.c
+++ b/drivers/net/octeontx2/otx2_ptp.c
@@ -57,6 +57,23 @@ nix_ptp_config(struct rte_eth_dev *eth_dev, int en)
return otx2_mbox_process(mbox);
 }
 
+int
+otx2_eth_dev_ptp_info_update(struct otx2_dev *dev, bool ptp_en)
+{
+   struct otx2_eth_dev *otx2_dev = (struct otx2_eth_dev *)dev;
+   struct rte_eth_dev *eth_dev = otx2_dev->eth_dev;
+   int i;
+
+   otx2_dev->ptp_en = ptp_en;
+   for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
+   struct otx2_eth_rxq *rxq = eth_dev->data->rx_queues[i];
+   rxq->mbuf_initializer =
+   otx2_nix_rxq_mbuf_setup(otx2_dev,
+   eth_dev->data->port_id);
+   }
+   return 0;
+}
+
 int
 otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
 {
@@ -133,3 +150,116 @@ otx2_nix_timesync_disable(struct rte_eth_dev *eth_dev)
}
return rc;
 }
+
+int
+otx2_nix_timesync_read_rx_timestamp(struct rte_eth_dev *eth_dev,
+   struct timespec *timestamp,
+   uint32_t __rte_unused flags)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct otx2_timesync_info *tstamp = &dev->tstamp;
+   uint64_t ns;
+
+   if (!tstamp->rx_ready)
+   return -EINVAL;
+
+   ns = rte_timecounter_update(&dev->rx_tstamp_tc, tstamp->rx_tstamp);
+   *timestamp = rte_ns_to_timespec(ns);
+   tstamp->rx_ready = 0;
+
+   otx2_nix_dbg("rx timestamp: %llu sec: %lu nsec %lu",
+(unsigned long long)tstamp->rx_tstamp, timestamp->tv_sec,
+

[dpdk-dev] [PATCH v1 30/58] net/octeontx2: add flow control support

2019-06-02 Thread jerinj

From: Vamsi Attunuru 

Add flow control operations and exposed
otx2_nix_update_flow_ctrl_mode() to enable on the
configured mode in dev_start().

Signed-off-by: Vamsi Attunuru 
Signed-off-by: Nithin Dabilpuram 
---
 doc/guides/nics/features/octeontx2.ini |   1 +
 doc/guides/nics/features/octeontx2_vec.ini |   1 +
 drivers/net/octeontx2/Makefile |   1 +
 drivers/net/octeontx2/meson.build  |   1 +
 drivers/net/octeontx2/otx2_ethdev.c|  20 ++
 drivers/net/octeontx2/otx2_ethdev.h|  23 +++
 drivers/net/octeontx2/otx2_flow_ctrl.c | 230 +
 7 files changed, 277 insertions(+)
 create mode 100644 drivers/net/octeontx2/otx2_flow_ctrl.c

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 18daccc49..ba7fdc868 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -21,6 +21,7 @@ RSS hash = Y
 RSS key update   = Y
 RSS reta update  = Y
 Inner RSS= Y
+Flow control = Y
 Packet type parsing  = Y
 Rx descriptor status = Y
 Basic stats  = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index ccf4dac42..b909918ce 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -21,6 +21,7 @@ RSS hash = Y
 RSS key update   = Y
 RSS reta update  = Y
 Inner RSS= Y
+Flow control = Y
 Packet type parsing  = Y
 Rx descriptor status = Y
 Basic stats  = Y
diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index 00f61c354..1d3788466 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -37,6 +37,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
otx2_stats.c\
otx2_lookup.c   \
otx2_ethdev.c   \
+   otx2_flow_ctrl.c \
otx2_ethdev_irq.c \
otx2_ethdev_ops.c \
otx2_ethdev_debug.c \
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index eb5206ea1..e4fcac763 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -10,6 +10,7 @@ sources = files(
'otx2_stats.c',
'otx2_lookup.c',
'otx2_ethdev.c',
+   'otx2_flow_ctrl.c',
'otx2_ethdev_irq.c',
'otx2_ethdev_ops.c',
'otx2_ethdev_debug.c',
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 0df487983..97e0e3465 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -216,6 +216,14 @@ nix_cq_rq_init(struct rte_eth_dev *eth_dev, struct 
otx2_eth_dev *dev,
aq->cq.cq_err_int_ena = BIT(NIX_CQERRINT_CQE_FAULT);
aq->cq.cq_err_int_ena |= BIT(NIX_CQERRINT_DOOR_ERR);
 
+   /* TX pause frames enable flowctrl on RX side */
+   if (dev->fc_info.tx_pause) {
+   /* Single bpid is allocated for all rx channels for now */
+   aq->cq.bpid = dev->fc_info.bpid[0];
+   aq->cq.bp = NIX_CQ_BP_LEVEL;
+   aq->cq.bp_ena = 1;
+   }
+
/* Many to one reduction */
aq->cq.qint_idx = qid % dev->qints;
 
@@ -1069,6 +1077,7 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
 
/* Free the resources allocated from the previous configure */
if (dev->configured == 1) {
+   otx2_nix_rxchan_bpid_cfg(eth_dev, false);
oxt2_nix_unregister_queue_irqs(eth_dev);
nix_set_nop_rxtx_function(eth_dev);
rc = nix_store_queue_cfg_and_then_release(eth_dev);
@@ -1122,6 +1131,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto free_nix_lf;
}
 
+   rc = otx2_nix_rxchan_bpid_cfg(eth_dev, true);
+   if (rc) {
+   otx2_err("Failed to configure nix rx chan bpid cfg rc=%d", rc);
+   goto free_nix_lf;
+   }
+
/*
 * Restore queue config when reconfigure followed by
 * reconfigure and no queue configure invoked from application case.
@@ -1300,6 +1315,8 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.pool_ops_supported   = otx2_nix_pool_ops_supported,
.get_module_info  = otx2_nix_get_module_info,
.get_module_eeprom= otx2_nix_get_module_eeprom,
+   .flow_ctrl_get= otx2_nix_flow_ctrl_get,
+   .flow_ctrl_set= otx2_nix_flow_ctrl_set,
 };
 
 static inline int
@@ -1501,6 +1518,9 @@ otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool 
mbox_close)
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
 
+   /* Disable nix bpid config */
+   otx2_nix_rxchan_bpid_cfg(eth_dev, false);
+
/* Free up SQs */
for (i = 0; i < eth_dev->data->nb_tx_queues; i++) {
otx2_nix_

[dpdk-dev] [PATCH v1 33/58] net/octeontx2: introducing flow driver

2019-06-02 Thread jerinj

From: Kiran Kumar K 

Introducing flow infra for octeontx2.
This will be used to maintain rte_flow rules.

Create, destroy, validate,query, flush, isolate flow operations
will be supported.

Signed-off-by: Kiran Kumar K 
Signed-off-by: Vivek Sharma 
---
 drivers/net/octeontx2/otx2_ethdev.h |   7 +-
 drivers/net/octeontx2/otx2_flow.h   | 384 
 2 files changed, 385 insertions(+), 6 deletions(-)
 create mode 100644 drivers/net/octeontx2/otx2_flow.h

diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index ba6d1736e..1edc7da29 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -17,6 +17,7 @@
 
 #include "otx2_common.h"
 #include "otx2_dev.h"
+#include "otx2_flow.h"
 #include "otx2_irq.h"
 #include "otx2_mempool.h"
 #include "otx2_rx.h"
@@ -154,12 +155,6 @@ struct otx2_eth_qconf {
uint16_t nb_desc;
 };
 
-struct otx2_npc_flow_info {
-   uint16_t channel; /*rx channel */
-   uint16_t flow_prealloc_size;
-   uint16_t flow_max_priority;
-};
-
 struct otx2_fc_info {
enum rte_eth_fc_mode mode;  /**< Link flow control mode */
uint8_t rx_pause;
diff --git a/drivers/net/octeontx2/otx2_flow.h 
b/drivers/net/octeontx2/otx2_flow.h
new file mode 100644
index 0..07d9e9fd6
--- /dev/null
+++ b/drivers/net/octeontx2/otx2_flow.h
@@ -0,0 +1,384 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#ifndef __OTX2_FLOW_H__
+#define __OTX2_FLOW_H__
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "otx2_common.h"
+#include "otx2_ethdev.h"
+#include "otx2_mbox.h"
+
+struct otx2_eth_dev;
+
+int otx2_flow_init(struct otx2_eth_dev *hw);
+int otx2_flow_fini(struct otx2_eth_dev *hw);
+extern const struct rte_flow_ops otx2_flow_ops;
+
+enum {
+   OTX2_INTF_RX = 0,
+   OTX2_INTF_TX = 1,
+   OTX2_INTF_MAX = 2,
+};
+
+#define NPC_COUNTER_NONE   (-1)
+/* 32 bytes from LDATA_CFG & 32 bytes from FLAGS_CFG */
+#define NPC_MAX_EXTRACT_DATA_LEN   (64)
+#define NPC_LDATA_LFLAG_LEN(16)
+#define NPC_MCAM_TOT_ENTRIES   (4096)
+#define NPC_MAX_KEY_NIBBLES(31)
+/* Bit offsets */
+#define NPC_LAYER_KEYX_SZ  (12)
+#define NPC_PARSE_KEX_S_LA_OFFSET  (28)
+#define NPC_PARSE_KEX_S_LID_OFFSET(lid)\
+   lid) - NPC_LID_LA) * NPC_LAYER_KEYX_SZ)  \
+   + NPC_PARSE_KEX_S_LA_OFFSET)
+
+
+/* supported flow actions flags */
+#define OTX2_FLOW_ACT_MARK(1 << 0)
+#define OTX2_FLOW_ACT_FLAG(1 << 1)
+#define OTX2_FLOW_ACT_DROP(1 << 2)
+#define OTX2_FLOW_ACT_QUEUE   (1 << 3)
+#define OTX2_FLOW_ACT_RSS (1 << 4)
+#define OTX2_FLOW_ACT_DUP (1 << 5)
+#define OTX2_FLOW_ACT_SEC (1 << 6)
+#define OTX2_FLOW_ACT_COUNT   (1 << 7)
+
+/* terminating actions */
+#define OTX2_FLOW_ACT_TERM(OTX2_FLOW_ACT_DROP  | \
+  OTX2_FLOW_ACT_QUEUE | \
+  OTX2_FLOW_ACT_RSS   | \
+  OTX2_FLOW_ACT_DUP   | \
+  OTX2_FLOW_ACT_SEC)
+
+/* This mark value indicates flag action */
+#define OTX2_FLOW_FLAG_VAL(0x)
+
+#define NIX_RX_ACT_MATCH_OFFSET(40)
+#define NIX_RX_ACT_MATCH_MASK  (0x)
+
+#define NIX_RSS_ACT_GRP_OFFSET (20)
+#define NIX_RSS_ACT_ALG_OFFSET (56)
+#define NIX_RSS_ACT_GRP_MASK   (0xF)
+#define NIX_RSS_ACT_ALG_MASK   (0x1F)
+
+/* PMD-specific definition of the opaque struct rte_flow */
+#define OTX2_MAX_MCAM_WIDTH_DWORDS 7
+
+enum npc_mcam_intf {
+   NPC_MCAM_RX,
+   NPC_MCAM_TX
+};
+
+struct npc_xtract_info {
+   /* Length in bytes of pkt data extracted. len = 0
+* indicates that extraction is disabled.
+*/
+   uint8_t len;
+   uint8_t hdr_off; /* Byte offset of proto hdr: extract_src */
+   uint8_t key_off; /* Byte offset in MCAM key where data is placed */
+   uint8_t enable; /* Extraction enabled or disabled */
+};
+
+/* Information for a given {LAYER, LTYPE} */
+struct npc_lid_lt_xtract_info {
+   /* Info derived from parser configuration */
+   uint16_t npc_proto;  /* Network protocol identified */
+   uint8_t  valid_flags_mask;   /* Flags applicable */
+   uint8_t  is_terminating:1;   /* No more parsing */
+   struct npc_xtract_info xtract[NPC_MAX_LD];
+};
+
+union npc_kex_ldata_flags_cfg {
+   struct {
+   #if defined(__BIG_ENDIAN_BITFIELD)
+   uint64_t rvsd_62_1  : 61;
+   uint64_t lid: 3;
+   #else
+   uint64_t lid: 3;
+   uint64_t rvsd_62_1  : 61;
+   #endif
+   } s;
+
+   uint64_t i;
+};
+
+typedef struct npc_lid_lt_xtract_info
+   otx2_dxcfg_t[NPC_MAX_INTF][NPC_MAX_LID][NPC_MAX_LT];
+typedef struct npc_lid_lt_xtract_info
+   otx2_fxcfg_t[NPC_MAX_INTF][NPC_MAX_LD][NPC_MA

[dpdk-dev] [PATCH v1 36/58] net/octeontx2: add flow MCAM utility functions

2019-06-02 Thread jerinj

From: Kiran Kumar K 

Adding MCAM utility functions to alloc and write the entries.
These will be used to arrange the flow rules based on priority.

Signed-off-by: Kiran Kumar K 
Signed-off-by: Vivek Sharma 
---
 drivers/net/octeontx2/otx2_flow.h   |   6 +-
 drivers/net/octeontx2/otx2_flow_utils.c | 258 +++-
 2 files changed, 258 insertions(+), 6 deletions(-)

diff --git a/drivers/net/octeontx2/otx2_flow.h 
b/drivers/net/octeontx2/otx2_flow.h
index 04c5e487f..07d9e9fd6 100644
--- a/drivers/net/octeontx2/otx2_flow.h
+++ b/drivers/net/octeontx2/otx2_flow.h
@@ -380,9 +380,5 @@ int otx2_flow_parse_actions(struct rte_eth_dev *dev,
const struct rte_flow_action actions[],
struct rte_flow_error *error,
struct rte_flow *flow);
-int
-flow_validate_and_shift_prio_ent(struct otx2_mbox *mbox, struct rte_flow *flow,
-struct otx2_npc_flow_info *flow_info,
-struct npc_mcam_alloc_entry_rsp *rsp,
-int req_prio);
+
 #endif /* __OTX2_FLOW_H__ */
diff --git a/drivers/net/octeontx2/otx2_flow_utils.c 
b/drivers/net/octeontx2/otx2_flow_utils.c
index 288f5776e..1dd57cc0f 100644
--- a/drivers/net/octeontx2/otx2_flow_utils.c
+++ b/drivers/net/octeontx2/otx2_flow_utils.c
@@ -5,6 +5,22 @@
 #include "otx2_ethdev.h"
 #include "otx2_flow.h"
 
+static int
+flow_mcam_alloc_counter(struct otx2_mbox *mbox, uint16_t *ctr)
+{
+   struct npc_mcam_alloc_counter_req *req;
+   struct npc_mcam_alloc_counter_rsp *rsp;
+   int rc;
+
+   req = otx2_mbox_alloc_msg_npc_mcam_alloc_counter(mbox);
+   req->count = 1;
+   otx2_mbox_msg_send(mbox, 0);
+   rc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp);
+
+   *ctr = rsp->cntr_list[0];
+   return rc;
+}
+
 int
 otx2_flow_mcam_free_counter(struct otx2_mbox *mbox, uint16_t ctr_id)
 {
@@ -567,7 +583,7 @@ flow_shift_ent(struct otx2_mbox *mbox, struct rte_flow 
*flow,
  * since NPC_MCAM_LOWER_PRIO & NPC_MCAM_HIGHER_PRIO don't ensure zone accuracy.
  * If not properly aligned, shift entries to do so
  */
-int
+static int
 flow_validate_and_shift_prio_ent(struct otx2_mbox *mbox, struct rte_flow *flow,
 struct otx2_npc_flow_info *flow_info,
 struct npc_mcam_alloc_entry_rsp *rsp,
@@ -626,3 +642,243 @@ flow_validate_and_shift_prio_ent(struct otx2_mbox *mbox, 
struct rte_flow *flow,
 
return rc;
 }
+
+static int
+flow_find_ref_entry(struct otx2_npc_flow_info *flow_info, int *prio,
+   int prio_lvl)
+{
+   struct otx2_mcam_ents_info *info = flow_info->flow_entry_info;
+   int step = 1;
+
+   while (step < flow_info->flow_max_priority) {
+   if (((prio_lvl + step) < flow_info->flow_max_priority) &&
+   info[prio_lvl + step].live_ent) {
+   *prio = NPC_MCAM_HIGHER_PRIO;
+   return info[prio_lvl + step].min_id;
+   }
+
+   if (((prio_lvl - step) >= 0) &&
+   info[prio_lvl - step].live_ent) {
+   otx2_npc_dbg("Prio_lvl %u live %u", prio_lvl - step,
+info[prio_lvl - step].live_ent);
+   *prio = NPC_MCAM_LOWER_PRIO;
+   return info[prio_lvl - step].max_id;
+   }
+   step++;
+   }
+   *prio = NPC_MCAM_ANY_PRIO;
+   return 0;
+}
+
+static int
+flow_fill_entry_cache(struct otx2_mbox *mbox, struct rte_flow *flow,
+ struct otx2_npc_flow_info *flow_info, uint32_t *free_ent)
+{
+   struct rte_bitmap *free_bmp, *free_bmp_rev, *live_bmp, *live_bmp_rev;
+   struct npc_mcam_alloc_entry_rsp rsp_local;
+   struct npc_mcam_alloc_entry_rsp *rsp_cmd;
+   struct npc_mcam_alloc_entry_req *req;
+   struct npc_mcam_alloc_entry_rsp *rsp;
+   struct otx2_mcam_ents_info *info;
+   uint16_t ref_ent, idx;
+   int rc, prio;
+
+   info = &flow_info->flow_entry_info[flow->priority];
+   free_bmp = flow_info->free_entries[flow->priority];
+   free_bmp_rev = flow_info->free_entries_rev[flow->priority];
+   live_bmp = flow_info->live_entries[flow->priority];
+   live_bmp_rev = flow_info->live_entries_rev[flow->priority];
+
+   ref_ent = flow_find_ref_entry(flow_info, &prio, flow->priority);
+
+   req = otx2_mbox_alloc_msg_npc_mcam_alloc_entry(mbox);
+   req->contig = 1;
+   req->count = flow_info->flow_prealloc_size;
+   req->priority = prio;
+   req->ref_entry = ref_ent;
+
+   otx2_npc_dbg("Fill cache ref entry %u prio %u", ref_ent, prio);
+
+   otx2_mbox_msg_send(mbox, 0);
+   rc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp_cmd);
+   if (rc)
+   return rc;
+
+   rsp = &rsp_local;
+   memcpy(rsp, rsp_cmd, sizeof(*rsp));
+
+   otx2_npc_dbg("Alloc entry %u coun

[dpdk-dev] [PATCH v1 34/58] net/octeontx2: flow utility functions

2019-06-02 Thread jerinj

From: Kiran Kumar K 

First pass rte_flow utility functions for octeontx2.
These will be used to communicate with AF driver.

Signed-off-by: Kiran Kumar K 
Signed-off-by: Vivek Sharma 
---
 drivers/net/octeontx2/Makefile  |   1 +
 drivers/net/octeontx2/meson.build   |   1 +
 drivers/net/octeontx2/otx2_flow_utils.c | 369 
 3 files changed, 371 insertions(+)
 create mode 100644 drivers/net/octeontx2/otx2_flow_utils.c

diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index b1c8e4e52..7773643af 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -39,6 +39,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
otx2_lookup.c   \
otx2_ethdev.c   \
otx2_flow_ctrl.c \
+   otx2_flow_utils.c \
otx2_ethdev_irq.c \
otx2_ethdev_ops.c \
otx2_ethdev_debug.c \
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index 57d6c0a58..cd168c32f 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -12,6 +12,7 @@ sources = files(
'otx2_lookup.c',
'otx2_ethdev.c',
'otx2_flow_ctrl.c',
+   'otx2_flow_utils.c',
'otx2_ethdev_irq.c',
'otx2_ethdev_ops.c',
'otx2_ethdev_debug.c',
diff --git a/drivers/net/octeontx2/otx2_flow_utils.c 
b/drivers/net/octeontx2/otx2_flow_utils.c
new file mode 100644
index 0..bf20d7319
--- /dev/null
+++ b/drivers/net/octeontx2/otx2_flow_utils.c
@@ -0,0 +1,369 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include "otx2_ethdev.h"
+#include "otx2_flow.h"
+
+int
+otx2_flow_mcam_free_counter(struct otx2_mbox *mbox, uint16_t ctr_id)
+{
+   struct npc_mcam_oper_counter_req *req;
+   int rc;
+
+   req = otx2_mbox_alloc_msg_npc_mcam_free_counter(mbox);
+   req->cntr = ctr_id;
+   otx2_mbox_msg_send(mbox, 0);
+   rc = otx2_mbox_get_rsp(mbox, 0, NULL);
+
+   return rc;
+}
+
+int
+otx2_flow_mcam_read_counter(struct otx2_mbox *mbox, uint32_t ctr_id,
+   uint64_t *count)
+{
+   struct npc_mcam_oper_counter_req *req;
+   struct npc_mcam_oper_counter_rsp *rsp;
+   int rc;
+
+   req = otx2_mbox_alloc_msg_npc_mcam_counter_stats(mbox);
+   req->cntr = ctr_id;
+   otx2_mbox_msg_send(mbox, 0);
+   rc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp);
+
+   *count = rsp->stat;
+   return rc;
+}
+
+int
+otx2_flow_mcam_clear_counter(struct otx2_mbox *mbox, uint32_t ctr_id)
+{
+   struct npc_mcam_oper_counter_req *req;
+   int rc;
+
+   req = otx2_mbox_alloc_msg_npc_mcam_clear_counter(mbox);
+   req->cntr = ctr_id;
+   otx2_mbox_msg_send(mbox, 0);
+   rc = otx2_mbox_get_rsp(mbox, 0, NULL);
+
+   return rc;
+}
+
+int
+otx2_flow_mcam_free_entry(struct otx2_mbox *mbox, uint32_t entry)
+{
+   struct npc_mcam_free_entry_req *req;
+   int rc;
+
+   req = otx2_mbox_alloc_msg_npc_mcam_free_entry(mbox);
+   req->entry = entry;
+   otx2_mbox_msg_send(mbox, 0);
+   rc = otx2_mbox_get_rsp(mbox, 0, NULL);
+
+   return rc;
+}
+
+int
+otx2_flow_mcam_free_all_entries(struct otx2_mbox *mbox)
+{
+   struct npc_mcam_free_entry_req *req;
+   int rc;
+
+   req = otx2_mbox_alloc_msg_npc_mcam_free_entry(mbox);
+   req->all = 1;
+   otx2_mbox_msg_send(mbox, 0);
+   rc = otx2_mbox_get_rsp(mbox, 0, NULL);
+
+   return rc;
+}
+
+static void
+flow_prep_mcam_ldata(uint8_t *ptr, const uint8_t *data, int len)
+{
+   int idx;
+
+   for (idx = 0; idx < len; idx++)
+   ptr[idx] = data[len - 1 - idx];
+}
+
+static size_t
+flow_check_copysz(size_t size, size_t len)
+{
+   if (len <= size)
+   return len;
+
+   rte_panic("String op-overflow");
+}
+
+static inline int
+flow_mem_is_zero(const void *mem, int len)
+{
+   const char *m = mem;
+   int i;
+
+   for (i = 0; i < len; i++) {
+   if (m[i] != 0)
+   return 0;
+   }
+   return 1;
+}
+
+void
+otx2_flow_get_hw_supp_mask(struct otx2_parse_state *pst,
+  struct otx2_flow_item_info *info, int lid, int lt)
+{
+   struct npc_xtract_info *xinfo;
+   char *hw_mask = info->hw_mask;
+   int i, j;
+   int intf;
+
+   intf = pst->flow->nix_intf;
+   xinfo = pst->npc->prx_dxcfg[intf][lid][lt].xtract;
+   memset(hw_mask, 0, info->len);
+
+   for (i = 0; i < NPC_MAX_LD; i++) {
+   int max_off = xinfo[i].hdr_off + xinfo[i].len;
+
+   if (xinfo[i].enable == 0)
+   continue;
+
+   if (max_off > info->len)
+   max_off = info->len;
+
+   for (j = xinfo[i].hdr_off; j < max_off; j++)
+   hw_mask[j] = 0xff;
+   }
+}
+
+int
+otx2_flow_update_parse_st

[dpdk-dev] [PATCH v1 37/58] net/octeontx2: add flow parsing for outer layers

2019-06-02 Thread jerinj

From: Kiran Kumar K 

Adding functionality to parse outer layers from ld to lh.
These will be used parse outer layers L2, L3, L4 and tunnel types.

Signed-off-by: Kiran Kumar K 
Signed-off-by: Vivek Sharma 
---
 drivers/net/octeontx2/Makefile  |   1 +
 drivers/net/octeontx2/meson.build   |   1 +
 drivers/net/octeontx2/otx2_flow_parse.c | 463 
 3 files changed, 465 insertions(+)
 create mode 100644 drivers/net/octeontx2/otx2_flow_parse.c

diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index 7773643af..f38901b89 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -39,6 +39,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
otx2_lookup.c   \
otx2_ethdev.c   \
otx2_flow_ctrl.c \
+   otx2_flow_parse.c \
otx2_flow_utils.c \
otx2_ethdev_irq.c \
otx2_ethdev_ops.c \
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index cd168c32f..cbab77f7b 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -12,6 +12,7 @@ sources = files(
'otx2_lookup.c',
'otx2_ethdev.c',
'otx2_flow_ctrl.c',
+   'otx2_flow_parse.c',
'otx2_flow_utils.c',
'otx2_ethdev_irq.c',
'otx2_ethdev_ops.c',
diff --git a/drivers/net/octeontx2/otx2_flow_parse.c 
b/drivers/net/octeontx2/otx2_flow_parse.c
new file mode 100644
index 0..2d0fa439a
--- /dev/null
+++ b/drivers/net/octeontx2/otx2_flow_parse.c
@@ -0,0 +1,463 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include "otx2_ethdev.h"
+#include "otx2_flow.h"
+
+const struct rte_flow_item *
+otx2_flow_skip_void_and_any_items(const struct rte_flow_item *pattern)
+{
+   while ((pattern->type == RTE_FLOW_ITEM_TYPE_VOID) ||
+  (pattern->type == RTE_FLOW_ITEM_TYPE_ANY))
+   pattern++;
+
+   return pattern;
+}
+
+int
+otx2_flow_parse_lh(struct otx2_parse_state *pst __rte_unused)
+{
+   return 0;
+}
+
+/*
+ * Tunnel+ESP, Tunnel+ICMP4/6, Tunnel+TCP, Tunnel+UDP,
+ * Tunnel+SCTP
+ */
+int
+otx2_flow_parse_lg(struct otx2_parse_state *pst)
+{
+   struct otx2_flow_item_info info;
+   char hw_mask[64];
+   int lid, lt;
+   int rc;
+
+   if (!pst->tunnel)
+   return 0;
+
+   info.hw_mask = &hw_mask;
+   info.spec = NULL;
+   info.mask = NULL;
+   lid = NPC_LID_LG;
+
+   switch (pst->pattern->type) {
+   case RTE_FLOW_ITEM_TYPE_UDP:
+   lt = NPC_LT_LG_TU_UDP;
+   info.def_mask = &rte_flow_item_udp_mask;
+   info.len = sizeof(struct rte_flow_item_udp);
+   break;
+   case RTE_FLOW_ITEM_TYPE_TCP:
+   lt = NPC_LT_LG_TU_TCP;
+   info.def_mask = &rte_flow_item_tcp_mask;
+   info.len = sizeof(struct rte_flow_item_tcp);
+   break;
+   case RTE_FLOW_ITEM_TYPE_SCTP:
+   lt = NPC_LT_LG_TU_SCTP;
+   info.def_mask = &rte_flow_item_sctp_mask;
+   info.len = sizeof(struct rte_flow_item_sctp);
+   break;
+   case RTE_FLOW_ITEM_TYPE_ESP:
+   lt = NPC_LT_LG_TU_ESP;
+   info.def_mask = &rte_flow_item_esp_mask;
+   info.len = sizeof(struct rte_flow_item_esp);
+   break;
+   default:
+   return 0;
+   }
+
+   otx2_flow_get_hw_supp_mask(pst, &info, lid, lt);
+   rc = otx2_flow_parse_item_basic(pst->pattern, &info, pst->error);
+   if (rc != 0)
+   return rc;
+
+   return otx2_flow_update_parse_state(pst, &info, lid, lt, 0);
+}
+
+/* Tunnel+IPv4, Tunnel+IPv6 */
+int
+otx2_flow_parse_lf(struct otx2_parse_state *pst)
+{
+   struct otx2_flow_item_info info;
+   char hw_mask[64];
+   int lid, lt;
+   int rc;
+
+   if (!pst->tunnel)
+   return 0;
+
+   info.hw_mask = &hw_mask;
+   info.spec = NULL;
+   info.mask = NULL;
+   lid = NPC_LID_LF;
+
+   if (pst->pattern->type == RTE_FLOW_ITEM_TYPE_IPV4) {
+   lt = NPC_LT_LF_TU_IP;
+   info.def_mask = &rte_flow_item_ipv4_mask;
+   info.len = sizeof(struct rte_flow_item_ipv4);
+   } else if (pst->pattern->type == RTE_FLOW_ITEM_TYPE_IPV6) {
+   lt = NPC_LT_LF_TU_IP6;
+   info.def_mask = &rte_flow_item_ipv6_mask;
+   info.len = sizeof(struct rte_flow_item_ipv6);
+   } else {
+   /* There is no tunneled IP header */
+   return 0;
+   }
+
+   otx2_flow_get_hw_supp_mask(pst, &info, lid, lt);
+   rc = otx2_flow_parse_item_basic(pst->pattern, &info, pst->error);
+   if (rc != 0)
+   return rc;
+
+   return otx2_flow_update_parse_state(pst, &info, lid, lt, 0);
+}
+
+/* Tunnel+Ether */
+int
+otx2_flow_parse_le(st

[dpdk-dev] [PATCH v1 35/58] net/octeontx2: flow mailbox utility

2019-06-02 Thread jerinj

From: Kiran Kumar K 

Adding mailbox utility functions for rte_flow. These will be used
to alloc, reserve and write the entries to the device on request.

Signed-off-by: Kiran Kumar K 
Signed-off-by: Vivek Sharma 
---
 drivers/net/octeontx2/otx2_flow.h   |   6 +-
 drivers/net/octeontx2/otx2_flow_utils.c | 259 
 2 files changed, 264 insertions(+), 1 deletion(-)

diff --git a/drivers/net/octeontx2/otx2_flow.h 
b/drivers/net/octeontx2/otx2_flow.h
index 07d9e9fd6..04c5e487f 100644
--- a/drivers/net/octeontx2/otx2_flow.h
+++ b/drivers/net/octeontx2/otx2_flow.h
@@ -380,5 +380,9 @@ int otx2_flow_parse_actions(struct rte_eth_dev *dev,
const struct rte_flow_action actions[],
struct rte_flow_error *error,
struct rte_flow *flow);
-
+int
+flow_validate_and_shift_prio_ent(struct otx2_mbox *mbox, struct rte_flow *flow,
+struct otx2_npc_flow_info *flow_info,
+struct npc_mcam_alloc_entry_rsp *rsp,
+int req_prio);
 #endif /* __OTX2_FLOW_H__ */
diff --git a/drivers/net/octeontx2/otx2_flow_utils.c 
b/drivers/net/octeontx2/otx2_flow_utils.c
index bf20d7319..288f5776e 100644
--- a/drivers/net/octeontx2/otx2_flow_utils.c
+++ b/drivers/net/octeontx2/otx2_flow_utils.c
@@ -367,3 +367,262 @@ otx2_flow_keyx_compress(uint64_t *data, uint32_t 
nibble_mask)
data[1] = cdata[1];
 }
 
+static int
+flow_first_set_bit(uint64_t slab)
+{
+   int num = 0;
+
+   if ((slab & 0x) == 0) {
+   num += 32;
+   slab >>= 32;
+   }
+   if ((slab & 0x) == 0) {
+   num += 16;
+   slab >>= 16;
+   }
+   if ((slab & 0xff) == 0) {
+   num += 8;
+   slab >>= 8;
+   }
+   if ((slab & 0xf) == 0) {
+   num += 4;
+   slab >>= 4;
+   }
+   if ((slab & 0x3) == 0) {
+   num += 2;
+   slab >>= 2;
+   }
+   if ((slab & 0x1) == 0)
+   num += 1;
+
+   return num;
+}
+
+static int
+flow_shift_lv_ent(struct otx2_mbox *mbox, struct rte_flow *flow,
+ struct otx2_npc_flow_info *flow_info,
+ uint32_t old_ent, uint32_t new_ent)
+{
+   struct npc_mcam_shift_entry_req *req;
+   struct npc_mcam_shift_entry_rsp *rsp;
+   struct otx2_flow_list *list;
+   struct rte_flow *flow_iter;
+   int rc = 0;
+
+   otx2_npc_dbg("Old ent:%u new ent:%u priority:%u", old_ent, new_ent,
+flow->priority);
+
+   list = &flow_info->flow_list[flow->priority];
+
+   /* Old entry is disabled & it's contents are moved to new_entry,
+* new entry is enabled finally.
+*/
+   req = otx2_mbox_alloc_msg_npc_mcam_shift_entry(mbox);
+   req->curr_entry[0] = old_ent;
+   req->new_entry[0] = new_ent;
+   req->shift_count = 1;
+
+   otx2_mbox_msg_send(mbox, 0);
+   rc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp);
+   if (rc)
+   return rc;
+
+   /* Remove old node from list */
+   TAILQ_FOREACH(flow_iter, list, next) {
+   if (flow_iter->mcam_id == old_ent)
+   TAILQ_REMOVE(list, flow_iter, next);
+   }
+
+   /* Insert node with new mcam id at right place */
+   TAILQ_FOREACH(flow_iter, list, next) {
+   if (flow_iter->mcam_id > new_ent)
+   TAILQ_INSERT_BEFORE(flow_iter, flow, next);
+   }
+   return rc;
+}
+
+/* Exchange all required entries with a given priority level */
+static int
+flow_shift_ent(struct otx2_mbox *mbox, struct rte_flow *flow,
+  struct otx2_npc_flow_info *flow_info,
+  struct npc_mcam_alloc_entry_rsp *rsp, int dir, int prio_lvl)
+{
+   struct rte_bitmap *fr_bmp, *fr_bmp_rev, *lv_bmp, *lv_bmp_rev, *bmp;
+   uint32_t e_fr = 0, e_lv = 0, e, e_id = 0, mcam_entries;
+   uint64_t fr_bit_pos = 0, lv_bit_pos = 0, bit_pos = 0;
+   /* Bit position within the slab */
+   uint32_t sl_fr_bit_off = 0, sl_lv_bit_off = 0;
+   /* Overall bit position of the start of slab */
+   /* free & live entry index */
+   int rc_fr = 0, rc_lv = 0, rc = 0, idx = 0;
+   struct otx2_mcam_ents_info *ent_info;
+   /* free & live bitmap slab */
+   uint64_t sl_fr = 0, sl_lv = 0, *sl;
+
+   fr_bmp = flow_info->free_entries[prio_lvl];
+   fr_bmp_rev = flow_info->free_entries_rev[prio_lvl];
+   lv_bmp = flow_info->live_entries[prio_lvl];
+   lv_bmp_rev = flow_info->live_entries_rev[prio_lvl];
+   ent_info = &flow_info->flow_entry_info[prio_lvl];
+   mcam_entries = flow_info->mcam_entries;
+
+
+   /* New entries allocated are always contiguous, but older entries
+* already in free/live bitmap can be non-contiguous: so return
+* shifted entries should be in non-contiguous format.
+*/
+

[dpdk-dev] [PATCH v1 42/58] net/octeontx2: add flow init and fini

2019-06-02 Thread jerinj

From: Kiran Kumar K 

Adding the flow init and fini functionality.
These API will be called from dev init and
will initialize and de-initialize the flow related memory.

Signed-off-by: Kiran Kumar K 
Signed-off-by: Vivek Sharma 
---
 drivers/net/octeontx2/otx2_flow.c | 315 ++
 1 file changed, 315 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_flow.c 
b/drivers/net/octeontx2/otx2_flow.c
index 33fdafeb7..1fbe6b86e 100644
--- a/drivers/net/octeontx2/otx2_flow.c
+++ b/drivers/net/octeontx2/otx2_flow.c
@@ -625,3 +625,318 @@ const struct rte_flow_ops otx2_flow_ops = {
.query = otx2_flow_query,
.isolate = otx2_flow_isolate,
 };
+
+static int
+flow_supp_key_len(uint32_t supp_mask)
+{
+   int nib_count = 0;
+   while (supp_mask) {
+   nib_count++;
+   supp_mask &= (supp_mask - 1);
+   }
+   return nib_count * 4;
+}
+
+/* Refer HRM register:
+ * NPC_AF_INTF(0..1)_LID(0..7)_LT(0..15)_LD(0..1)_CFG
+ * and
+ * NPC_AF_INTF(0..1)_LDATA(0..1)_FLAGS(0..15)_CFG
+ **/
+#define BYTESM1_SHIFT  16
+#define HDR_OFF_SHIFT  8
+static void
+flow_update_kex_info(struct npc_xtract_info *xtract_info,
+uint64_t val)
+{
+   xtract_info->len = ((val >> BYTESM1_SHIFT) & 0xf) + 1;
+   xtract_info->hdr_off = (val >> HDR_OFF_SHIFT) & 0xff;
+   xtract_info->key_off = val & 0x3f;
+   xtract_info->enable = ((val >> 7) & 0x1);
+}
+
+static void
+flow_process_mkex_cfg(struct otx2_npc_flow_info *npc,
+ struct npc_get_kex_cfg_rsp *kex_rsp)
+{
+   volatile uint64_t (*q)[NPC_MAX_INTF][NPC_MAX_LID][NPC_MAX_LT]
+   [NPC_MAX_LD];
+   struct npc_xtract_info *x_info = NULL;
+   int lid, lt, ld, fl, ix;
+   otx2_dxcfg_t *p;
+   uint64_t keyw;
+   uint64_t val;
+
+   npc->keyx_supp_nmask[NPC_MCAM_RX] =
+   kex_rsp->rx_keyx_cfg & 0x7fffULL;
+   npc->keyx_supp_nmask[NPC_MCAM_TX] =
+   kex_rsp->tx_keyx_cfg & 0x7fffULL;
+   npc->keyx_len[NPC_MCAM_RX] =
+   flow_supp_key_len(npc->keyx_supp_nmask[NPC_MCAM_RX]);
+   npc->keyx_len[NPC_MCAM_TX] =
+   flow_supp_key_len(npc->keyx_supp_nmask[NPC_MCAM_TX]);
+
+   keyw = (kex_rsp->rx_keyx_cfg >> 32) & 0x7ULL;
+   npc->keyw[NPC_MCAM_RX] = keyw;
+   keyw = (kex_rsp->tx_keyx_cfg >> 32) & 0x7ULL;
+   npc->keyw[NPC_MCAM_TX] = keyw;
+
+   /* Update KEX_LD_FLAG */
+   for (ix = 0; ix < NPC_MAX_INTF; ix++) {
+   for (ld = 0; ld < NPC_MAX_LD; ld++) {
+   for (fl = 0; fl < NPC_MAX_LFL; fl++) {
+   x_info =
+   &npc->prx_fxcfg[ix][ld][fl].xtract[0];
+   val = kex_rsp->intf_ld_flags[ix][ld][fl];
+   flow_update_kex_info(x_info, val);
+   }
+   }
+   }
+
+   /* Update LID, LT and LDATA cfg */
+   p = &npc->prx_dxcfg;
+   q = (volatile uint64_t (*)[][NPC_MAX_LID][NPC_MAX_LT][NPC_MAX_LD])
+   (&kex_rsp->intf_lid_lt_ld);
+   for (ix = 0; ix < NPC_MAX_INTF; ix++) {
+   for (lid = 0; lid < NPC_MAX_LID; lid++) {
+   for (lt = 0; lt < NPC_MAX_LT; lt++) {
+   for (ld = 0; ld < NPC_MAX_LD; ld++) {
+   x_info = &(*p)[ix][lid][lt].xtract[ld];
+   val = (*q)[ix][lid][lt][ld];
+   flow_update_kex_info(x_info, val);
+   }
+   }
+   }
+   }
+   /* Update LDATA Flags cfg */
+   npc->prx_lfcfg[0].i = kex_rsp->kex_ld_flags[0];
+   npc->prx_lfcfg[1].i = kex_rsp->kex_ld_flags[1];
+}
+
+static struct otx2_idev_kex_cfg *
+flow_intra_dev_kex_cfg(void)
+{
+   static const char name[] = "octeontx2_intra_device_kex_conf";
+   struct otx2_idev_kex_cfg *idev;
+   const struct rte_memzone *mz;
+
+   mz = rte_memzone_lookup(name);
+   if (mz)
+   return mz->addr;
+
+   /* Request for the first time */
+   mz = rte_memzone_reserve_aligned(name, sizeof(struct otx2_idev_kex_cfg),
+SOCKET_ID_ANY, 0, OTX2_ALIGN);
+   if (mz) {
+   idev = mz->addr;
+   rte_atomic16_set(&idev->kex_refcnt, 0);
+   return idev;
+   }
+   return NULL;
+}
+
+static int
+flow_fetch_kex_cfg(struct otx2_eth_dev *dev)
+{
+   struct otx2_npc_flow_info *npc = &dev->npc_flow;
+   struct npc_get_kex_cfg_rsp *kex_rsp;
+   struct otx2_mbox *mbox = dev->mbox;
+   struct otx2_idev_kex_cfg *idev;
+   int rc = 0;
+
+   idev = flow_intra_dev_kex_cfg();
+   if (!idev)
+   return -ENOMEM;
+
+   /* Is kex_cfg read by any another driver? */
+   if (rte_atomic16_add_return(&idev->kex_refcnt, 1) == 1) {
+

[dpdk-dev] [PATCH v1 40/58] net/octeontx2: add flow operations

2019-06-02 Thread jerinj

From: Kiran Kumar K 

Adding the initial flow ops like flow_create and flow_validate.
These will be used to alloc and write flow rule to the device
and validate the flow rule.

Signed-off-by: Kiran Kumar K 
Signed-off-by: Vivek Sharma 
---
 drivers/net/octeontx2/Makefile|   1 +
 drivers/net/octeontx2/meson.build |   1 +
 drivers/net/octeontx2/otx2_flow.c | 430 ++
 3 files changed, 432 insertions(+)
 create mode 100644 drivers/net/octeontx2/otx2_flow.c

diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index f38901b89..d651c8c50 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -34,6 +34,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
otx2_rss.c  \
otx2_mac.c  \
otx2_ptp.c  \
+   otx2_flow.c \
otx2_link.c \
otx2_stats.c\
otx2_lookup.c   \
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index cbab77f7b..a2c494bb4 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -7,6 +7,7 @@ sources = files(
'otx2_rss.c',
'otx2_mac.c',
'otx2_ptp.c',
+   'otx2_flow.c',
'otx2_link.c',
'otx2_stats.c',
'otx2_lookup.c',
diff --git a/drivers/net/octeontx2/otx2_flow.c 
b/drivers/net/octeontx2/otx2_flow.c
new file mode 100644
index 0..d1e1c4411
--- /dev/null
+++ b/drivers/net/octeontx2/otx2_flow.c
@@ -0,0 +1,430 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include "otx2_ethdev.h"
+#include "otx2_flow.h"
+
+static int
+flow_program_npc(struct otx2_parse_state *pst, struct otx2_mbox *mbox,
+struct otx2_npc_flow_info *flow_info)
+{
+   /* This is non-LDATA part in search key */
+   uint64_t key_data[2] = {0ULL, 0ULL};
+   uint64_t key_mask[2] = {0ULL, 0ULL};
+   int intf = pst->flow->nix_intf;
+   uint64_t lt, flags;
+   int off, idx;
+   uint64_t val;
+   int key_len;
+   uint8_t lid;
+
+   for (lid = 0; lid < NPC_MAX_LID; lid++) {
+   /* Offset in key */
+   off = NPC_PARSE_KEX_S_LID_OFFSET(lid);
+   lt = pst->lt[lid] & 0xf;
+   flags = pst->flags[lid] & 0xff;
+   /* NPC_LAYER_KEX_S */
+   val = (lt << 8) | flags;
+   key_data[off / UINT64_BIT] |= (val << (off & 0x3f));
+   val = (flags == 0 ? 0 : 0xffULL);
+   if (lt)
+   val |= 0xf00ULL;
+   key_mask[off / UINT64_BIT] |= (val << (off & 0x3f));
+   };
+
+   otx2_npc_dbg("Npc prog key data0: 0x%" PRIx64 ", data1: 0x%" PRIx64,
+key_data[0], key_data[1]);
+   /*
+* Channel, errlev, errcode, l2_l3_bc_mc
+* AF must set the channel. For time being, it can be
+* hard-coded
+* Rest of the fields are zero for now.
+*/
+
+   /*
+* Compress key_data and key_mask, skipping any disabled
+* nibbles.
+*/
+   otx2_flow_keyx_compress(key_data, pst->npc->keyx_supp_nmask[intf]);
+   otx2_flow_keyx_compress(key_mask, pst->npc->keyx_supp_nmask[intf]);
+
+   /* Copy this into mcam string */
+   key_len = (pst->npc->keyx_len[intf] + 7) / 8;
+   otx2_npc_dbg("Key_len  = %d", key_len);
+   memcpy(pst->flow->mcam_data, key_data, key_len);
+   memcpy(pst->flow->mcam_mask, key_mask, key_len);
+
+   otx2_npc_dbg("Final flow data");
+   for (idx = 0; idx < OTX2_MAX_MCAM_WIDTH_DWORDS; idx++) {
+   otx2_npc_dbg("data[%d]: 0x%" PRIx64 ", mask[%d]: 0x%" PRIx64,
+idx, pst->flow->mcam_data[idx],
+idx, pst->flow->mcam_mask[idx]);
+   }
+
+   /*
+* Now we have mcam data and mask formatted as
+* [Key_len/4 nibbles][0 or 1 nibble hole][data]
+* hole is present if key_len is odd number of nibbles.
+* mcam data must be split into 64 bits + 48 bits segments
+* for each back W0, W1.
+*/
+
+   return otx2_flow_mcam_alloc_and_write(pst->flow, mbox, pst, flow_info);
+}
+
+static int
+flow_parse_attr(struct rte_eth_dev *eth_dev,
+   const struct rte_flow_attr *attr,
+   struct rte_flow_error *error,
+   struct rte_flow *flow)
+{
+   struct otx2_eth_dev *dev = eth_dev->data->dev_private;
+   const char *errmsg = NULL;
+
+   if (attr == NULL)
+   errmsg = "Attribute can't be empty";
+   else if (attr->group)
+   errmsg = "Groups are not supported";
+   else if (attr->priority >= dev->npc_flow.flow_max_priority)
+   errmsg = "Priority should be with in specified range";
+   else if ((!attr->egress && !attr->ingress) ||
+(attr->egress && attr->ingress))
+

[dpdk-dev] [PATCH v1 43/58] net/octeontx2: connect flow API to ethdev ops

2019-06-02 Thread jerinj

From: Vivek Sharma 

Connect rte_flow driver ops to ethdev via .filter_ctrl op.

Signed-off-by: Vivek Sharma 
Signed-off-by: Kiran Kumar K 
---
 doc/guides/nics/features/octeontx2.ini |  1 +
 doc/guides/nics/features/octeontx2_vec.ini |  1 +
 doc/guides/nics/features/octeontx2_vf.ini  |  1 +
 drivers/net/octeontx2/otx2_ethdev.c| 10 ++
 drivers/net/octeontx2/otx2_ethdev.h|  3 +++
 drivers/net/octeontx2/otx2_ethdev_ops.c| 21 +
 6 files changed, 37 insertions(+)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 0f416ee4b..4917057f6 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -22,6 +22,7 @@ RSS key update   = Y
 RSS reta update  = Y
 Inner RSS= Y
 Flow control = Y
+Flow API = Y
 Packet type parsing  = Y
 Timesync = Y
 Timestamp offload= Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index b909918ce..9049e8e99 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -22,6 +22,7 @@ RSS key update   = Y
 RSS reta update  = Y
 Inner RSS= Y
 Flow control = Y
+Flow API = Y
 Packet type parsing  = Y
 Rx descriptor status = Y
 Basic stats  = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index 812d5d649..735b7447a 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -17,6 +17,7 @@ RSS hash = Y
 RSS key update   = Y
 RSS reta update  = Y
 Inner RSS= Y
+Flow API = Y
 Packet type parsing  = Y
 Rx descriptor status = Y
 Basic stats  = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 9cd3ce407..bda5b4aa4 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1079,6 +1079,7 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
/* Free the resources allocated from the previous configure */
if (dev->configured == 1) {
otx2_nix_rxchan_bpid_cfg(eth_dev, false);
+   otx2_flow_fini(dev);
oxt2_nix_unregister_queue_irqs(eth_dev);
nix_set_nop_rxtx_function(eth_dev);
rc = nix_store_queue_cfg_and_then_release(eth_dev);
@@ -1324,6 +1325,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.rx_descriptor_status = otx2_nix_rx_descriptor_status,
.tx_done_cleanup  = otx2_nix_tx_done_cleanup,
.pool_ops_supported   = otx2_nix_pool_ops_supported,
+   .filter_ctrl  = otx2_nix_dev_filter_ctrl,
.get_module_info  = otx2_nix_get_module_info,
.get_module_eeprom= otx2_nix_get_module_eeprom,
.flow_ctrl_get= otx2_nix_flow_ctrl_get,
@@ -1503,6 +1505,11 @@ otx2_eth_dev_init(struct rte_eth_dev *eth_dev)
dev->hwcap |= OTX2_FIXUP_F_LIMIT_CQ_FULL;
}
 
+   /* Initialize rte-flow */
+   rc = otx2_flow_init(dev);
+   if (rc)
+   goto free_mac_addrs;
+
otx2_nix_dbg("Port=%d pf=%d vf=%d ver=%s msix_off=%d hwcap=0x%" PRIx64
 " rxoffload_capa=0x%" PRIx64 " txoffload_capa=0x%" PRIx64,
 eth_dev->data->port_id, dev->pf, dev->vf,
@@ -1539,6 +1546,9 @@ otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool 
mbox_close)
/* Disable nix bpid config */
otx2_nix_rxchan_bpid_cfg(eth_dev, false);
 
+   /* Disable other rte_flow entries */
+   otx2_flow_fini(dev);
+
/* Disable PTP if already enabled */
if (otx2_ethdev_is_ptp_en(dev))
otx2_nix_timesync_disable(eth_dev);
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 1edc7da29..e9123641c 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -274,6 +274,9 @@ otx2_eth_pmd_priv(struct rte_eth_dev *eth_dev)
 /* Ops */
 void otx2_nix_info_get(struct rte_eth_dev *eth_dev,
   struct rte_eth_dev_info *dev_info);
+int otx2_nix_dev_filter_ctrl(struct rte_eth_dev *eth_dev,
+enum rte_filter_type filter_type,
+enum rte_filter_op filter_op, void *arg);
 int otx2_nix_get_module_info(struct rte_eth_dev *eth_dev,
 struct rte_eth_dev_module_info *modinfo);
 int otx2_nix_get_module_eeprom(struct rte_eth_dev *eth_dev,
diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c 
b/drivers/net/octeontx2/otx2_ethdev_ops.c
index 51c156786..1da9222b7 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -220,6 +220,27 @@ otx2_nix_pool_ops_supported(struct rte_eth_dev *eth_d

[dpdk-dev] [PATCH v1 38/58] net/octeontx2: adding flow parsing for inner layers

2019-06-02 Thread jerinj

From: Kiran Kumar K 

Adding functionality to parse inner layers from la to lc.
These will be used to parse inner layers L2, L3, L4 types.

Signed-off-by: Kiran Kumar K 
---
 drivers/net/octeontx2/otx2_flow_parse.c | 202 
 1 file changed, 202 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_flow_parse.c 
b/drivers/net/octeontx2/otx2_flow_parse.c
index 2d0fa439a..1351dff4c 100644
--- a/drivers/net/octeontx2/otx2_flow_parse.c
+++ b/drivers/net/octeontx2/otx2_flow_parse.c
@@ -461,3 +461,205 @@ otx2_flow_parse_ld(struct otx2_parse_state *pst)
 
return otx2_flow_update_parse_state(pst, &info, lid, lt, lflags);
 }
+
+static inline void
+flow_check_lc_ip_tunnel(struct otx2_parse_state *pst)
+{
+   const struct rte_flow_item *pattern = pst->pattern + 1;
+
+   pattern = otx2_flow_skip_void_and_any_items(pattern);
+   if (pattern->type == RTE_FLOW_ITEM_TYPE_MPLS ||
+   pattern->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
+   pattern->type == RTE_FLOW_ITEM_TYPE_IPV6)
+   pst->tunnel = 1;
+}
+
+/* Outer IPv4, Outer IPv6, MPLS, ARP */
+int
+otx2_flow_parse_lc(struct otx2_parse_state *pst)
+{
+   uint8_t hw_mask[NPC_MAX_EXTRACT_DATA_LEN];
+   struct otx2_flow_item_info info;
+   int lid, lt;
+   int rc;
+
+   if (pst->pattern->type == RTE_FLOW_ITEM_TYPE_MPLS)
+   return otx2_flow_parse_lc_ld_mpls(pst, NPC_LID_LC);
+
+   info.hw_mask = &hw_mask;
+   info.spec = NULL;
+   info.mask = NULL;
+   lid = NPC_LID_LC;
+
+   switch (pst->pattern->type) {
+   case RTE_FLOW_ITEM_TYPE_IPV4:
+   lt = NPC_LT_LC_IP;
+   info.def_mask = &rte_flow_item_ipv4_mask;
+   info.len = sizeof(struct rte_flow_item_ipv4);
+   break;
+   case RTE_FLOW_ITEM_TYPE_IPV6:
+   lid = NPC_LID_LC;
+   lt = NPC_LT_LC_IP6;
+   info.def_mask = &rte_flow_item_ipv6_mask;
+   info.len = sizeof(struct rte_flow_item_ipv6);
+   break;
+   case RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4:
+   lt = NPC_LT_LC_ARP;
+   info.def_mask = &rte_flow_item_arp_eth_ipv4_mask;
+   info.len = sizeof(struct rte_flow_item_arp_eth_ipv4);
+   break;
+   default:
+   /* No match at this layer */
+   return 0;
+   }
+
+   /* Identify if IP tunnels MPLS or IPv4/v6 */
+   flow_check_lc_ip_tunnel(pst);
+
+   otx2_flow_get_hw_supp_mask(pst, &info, lid, lt);
+   rc = otx2_flow_parse_item_basic(pst->pattern, &info, pst->error);
+   if (rc != 0)
+   return rc;
+
+   return otx2_flow_update_parse_state(pst, &info, lid, lt, 0);
+}
+
+/* VLAN, ETAG */
+int
+otx2_flow_parse_lb(struct otx2_parse_state *pst)
+{
+   const struct rte_flow_item *pattern = pst->pattern;
+   const struct rte_flow_item *last_pattern;
+   char hw_mask[NPC_MAX_EXTRACT_DATA_LEN];
+   struct otx2_flow_item_info info;
+   int lid, lt, lflags;
+   int nr_vlans = 0;
+   int rc;
+
+   info.spec = NULL;
+   info.mask = NULL;
+
+   lid = NPC_LID_LB;
+   lflags = 0;
+   last_pattern = pattern;
+
+   if (pst->pattern->type == RTE_FLOW_ITEM_TYPE_VLAN) {
+   /* RTE vlan is either 802.1q or 802.1ad,
+* this maps to either CTAG/STAG. We need to decide
+* based on number of VLANS present. Matching is
+* supported on first tag only.
+*/
+   info.def_mask = &rte_flow_item_vlan_mask;
+   info.hw_mask = NULL;
+   info.len = sizeof(struct rte_flow_item_vlan);
+
+   pattern = pst->pattern;
+   while (pattern->type == RTE_FLOW_ITEM_TYPE_VLAN) {
+   nr_vlans++;
+
+   /* Basic validation of 2nd/3rd vlan item */
+   if (nr_vlans > 1) {
+   otx2_npc_dbg("Vlans  = %d", nr_vlans);
+   rc = otx2_flow_parse_item_basic(pattern, &info,
+   pst->error);
+   if (rc != 0)
+   return rc;
+   }
+   last_pattern = pattern;
+   pattern++;
+   pattern = otx2_flow_skip_void_and_any_items(pattern);
+   }
+
+   switch (nr_vlans) {
+   case 1:
+   lt = NPC_LT_LB_CTAG;
+   break;
+   case 2:
+   lt = NPC_LT_LB_STAG;
+   lflags = NPC_F_STAG_CTAG;
+   break;
+   case 3:
+   lt = NPC_LT_LB_STAG;
+   lflags = NPC_F_STAG_STAG_CTAG;
+   break;
+   default:
+   rte_flow_error_set(pst->error

[dpdk-dev] [PATCH v1 39/58] net/octeontx2: add flow actions support

2019-06-02 Thread jerinj

From: Kiran Kumar K 

Adding support to parse flow actions like drop, count, mark, rss, queue.
On egress side, only drop and count actions were supported.

Signed-off-by: Kiran Kumar K 
Signed-off-by: Vivek Sharma 
---
 drivers/net/octeontx2/otx2_flow_parse.c | 276 
 drivers/net/octeontx2/otx2_rx.h |   1 +
 2 files changed, 277 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_flow_parse.c 
b/drivers/net/octeontx2/otx2_flow_parse.c
index 1351dff4c..cf13813d8 100644
--- a/drivers/net/octeontx2/otx2_flow_parse.c
+++ b/drivers/net/octeontx2/otx2_flow_parse.c
@@ -663,3 +663,279 @@ otx2_flow_parse_la(struct otx2_parse_state *pst)
/* Update pst if not validate only? clash check? */
return otx2_flow_update_parse_state(pst, &info, lid, lt, 0);
 }
+
+static int
+parse_rss_action(struct rte_eth_dev *dev,
+const struct rte_flow_attr *attr,
+const struct rte_flow_action *act,
+struct rte_flow_error *error)
+{
+   struct otx2_eth_dev *hw = dev->data->dev_private;
+   struct otx2_rss_info *rss_info = &hw->rss_info;
+   const struct rte_flow_action_rss *rss;
+   uint32_t i;
+
+   rss = (const struct rte_flow_action_rss *)act->conf;
+
+   /* Not supported */
+   if (attr->egress) {
+   return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
+ attr, "No support of RSS in egress");
+   }
+
+   if (dev->data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS)
+   return rte_flow_error_set(error, ENOTSUP,
+ RTE_FLOW_ERROR_TYPE_ACTION,
+ act, "multi-queue mode is disabled");
+
+   /* Parse RSS related parameters from configuration */
+   if (!rss || !rss->queue_num)
+   return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ACTION,
+ act, "no valid queues");
+
+   if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT)
+   return rte_flow_error_set(error, ENOTSUP,
+ RTE_FLOW_ERROR_TYPE_ACTION, act,
+ "non-default RSS hash functions"
+ " are not supported");
+
+   if (rss->key_len && rss->key_len > RTE_DIM(rss_info->key))
+   return rte_flow_error_set(error, ENOTSUP,
+ RTE_FLOW_ERROR_TYPE_ACTION, act,
+ "RSS hash key too large");
+
+   if (rss->queue_num > rss_info->rss_size)
+   return rte_flow_error_set
+   (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION, act,
+"too many queues for RSS context");
+
+   for (i = 0; i < rss->queue_num; i++) {
+   if (rss->queue[i] >= dev->data->nb_rx_queues)
+   return rte_flow_error_set(error, EINVAL,
+ RTE_FLOW_ERROR_TYPE_ACTION,
+ act,
+ "queue id > max number"
+ " of queues");
+   }
+
+   return 0;
+}
+
+int
+otx2_flow_parse_actions(struct rte_eth_dev *dev,
+   const struct rte_flow_attr *attr,
+   const struct rte_flow_action actions[],
+   struct rte_flow_error *error,
+   struct rte_flow *flow)
+{
+   struct otx2_eth_dev *hw = dev->data->dev_private;
+   struct otx2_npc_flow_info *npc = &hw->npc_flow;
+   const struct rte_flow_action_count *act_count;
+   const struct rte_flow_action_mark *act_mark;
+   const struct rte_flow_action_queue *act_q;
+   const char *errmsg = NULL;
+   int sel_act, req_act = 0;
+   uint16_t pf_func;
+   int errcode = 0;
+   int mark = 0;
+   int rq = 0;
+
+   /* Initialize actions */
+   flow->ctr_id = NPC_COUNTER_NONE;
+
+   for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
+   otx2_npc_dbg("Action type = %d", actions->type);
+
+   switch (actions->type) {
+   case RTE_FLOW_ACTION_TYPE_VOID:
+   break;
+   case RTE_FLOW_ACTION_TYPE_MARK:
+   act_mark =
+   (const struct rte_flow_action_mark *)actions->conf;
+
+   /* We have only 16 bits. Use highest val for flag */
+   if (act_mark->id > (OTX2_FLOW_FLAG_VAL - 2)) {
+   errmsg = "mark value must be < 0xfffe";
+   errcode = ENOTSUP;
+   goto err_exit;
+   }
+

[dpdk-dev] [PATCH v1 41/58] net/octeontx2: add additional flow operations

2019-06-02 Thread jerinj

From: Kiran Kumar K 

Adding the initial flow ops like flow_create and flow_validate.
These will be used to alloc and write flow rule to device and validate
the flow rule.

Signed-off-by: Kiran Kumar K 
Signed-off-by: Vivek Sharma 
---
 drivers/net/octeontx2/otx2_flow.c | 197 ++
 drivers/net/octeontx2/otx2_rx.h   |   3 +
 2 files changed, 200 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_flow.c 
b/drivers/net/octeontx2/otx2_flow.c
index d1e1c4411..33fdafeb7 100644
--- a/drivers/net/octeontx2/otx2_flow.c
+++ b/drivers/net/octeontx2/otx2_flow.c
@@ -5,6 +5,39 @@
 #include "otx2_ethdev.h"
 #include "otx2_flow.h"
 
+static int
+flow_free_all_resources(struct otx2_eth_dev *hw)
+{
+   struct otx2_npc_flow_info *npc = &hw->npc_flow;
+   struct otx2_mbox *mbox = hw->mbox;
+   struct otx2_mcam_ents_info *info;
+   struct rte_bitmap *bmap;
+   struct rte_flow *flow;
+   int rc, idx;
+
+   /* Free all MCAM entries allocated */
+   rc = otx2_flow_mcam_free_all_entries(mbox);
+
+   /* Free any MCAM counters and delete flow list */
+   for (idx = 0; idx < npc->flow_max_priority; idx++) {
+   while ((flow = TAILQ_FIRST(&npc->flow_list[idx])) != NULL) {
+   if (flow->ctr_id != NPC_COUNTER_NONE)
+   rc |= otx2_flow_mcam_free_counter(mbox,
+flow->ctr_id);
+
+   TAILQ_REMOVE(&npc->flow_list[idx], flow, next);
+   rte_free(flow);
+   bmap = npc->live_entries[flow->priority];
+   rte_bitmap_clear(bmap, flow->mcam_id);
+   }
+   info = &npc->flow_entry_info[idx];
+   info->free_ent = 0;
+   info->live_ent = 0;
+   }
+   return rc;
+}
+
+
 static int
 flow_program_npc(struct otx2_parse_state *pst, struct otx2_mbox *mbox,
 struct otx2_npc_flow_info *flow_info)
@@ -216,6 +249,27 @@ flow_program_rss_action(struct rte_eth_dev *eth_dev,
return 0;
 }
 
+static int
+flow_free_rss_action(struct rte_eth_dev *eth_dev,
+struct rte_flow *flow)
+{
+   struct otx2_eth_dev *dev = eth_dev->data->dev_private;
+   struct otx2_npc_flow_info *npc = &dev->npc_flow;
+   uint32_t rss_grp;
+
+   if (flow->npc_action & NIX_RX_ACTIONOP_RSS) {
+   rss_grp = (flow->npc_action >> NIX_RSS_ACT_GRP_OFFSET) &
+   NIX_RSS_ACT_GRP_MASK;
+   if (rss_grp == 0 || rss_grp >= npc->rss_grps)
+   return -EINVAL;
+
+   rte_bitmap_clear(npc->rss_grp_entries, rss_grp);
+   }
+
+   return 0;
+}
+
+
 static int
 flow_parse_meta_items(__rte_unused struct otx2_parse_state *pst)
 {
@@ -424,7 +478,150 @@ otx2_flow_create(struct rte_eth_dev *dev,
return NULL;
 }
 
+static int
+otx2_flow_destroy(struct rte_eth_dev *dev,
+ struct rte_flow *flow,
+ struct rte_flow_error *error)
+{
+   struct otx2_eth_dev *hw = dev->data->dev_private;
+   struct otx2_npc_flow_info *npc = &hw->npc_flow;
+   struct otx2_mbox *mbox = hw->mbox;
+   struct rte_bitmap *bmap;
+   uint16_t match_id;
+   int rc;
+
+   match_id = (flow->npc_action >> NIX_RX_ACT_MATCH_OFFSET) &
+   NIX_RX_ACT_MATCH_MASK;
+
+   if (match_id && match_id < OTX2_FLOW_ACTION_FLAG_DEFAULT) {
+   if (rte_atomic32_read(&npc->mark_actions) == 0)
+   return -EINVAL;
+
+   /* Clear mark offload flag if there are no more mark actions */
+   if (rte_atomic32_sub_return(&npc->mark_actions, 1) == 0)
+   hw->rx_offload_flags &= ~NIX_RX_OFFLOAD_MARK_UPDATE_F;
+   }
+
+   rc = flow_free_rss_action(dev, flow);
+   if (rc != 0) {
+   rte_flow_error_set(error, EIO,
+  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
+  NULL,
+  "Failed to free rss action");
+   }
+
+   rc = otx2_flow_mcam_free_entry(mbox, flow->mcam_id);
+   if (rc != 0) {
+   rte_flow_error_set(error, EIO,
+  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
+  NULL,
+  "Failed to destroy filter");
+   }
+
+   TAILQ_REMOVE(&npc->flow_list[flow->priority], flow, next);
+
+   bmap = npc->live_entries[flow->priority];
+   rte_bitmap_clear(bmap, flow->mcam_id);
+
+   rte_free(flow);
+   return 0;
+}
+
+static int
+otx2_flow_flush(struct rte_eth_dev *dev,
+   struct rte_flow_error *error)
+{
+   struct otx2_eth_dev *hw = dev->data->dev_private;
+   int rc;
+
+   rc = flow_free_all_resources(hw);
+   if (rc) {
+   otx2_err("Error when deleting NPC MCAM entries "
+   ",

[dpdk-dev] [PATCH v1 44/58] net/octeontx2: implement VLAN utility functions

2019-06-02 Thread jerinj

From: Vivek Sharma 

Implement accessory functions needed for VLAN functionality.
Introduce VLAN related structures as well.

Maximum Vtag insertion size is controlled by SMQ configuration.
This patch also configure SMQ for supporting upto double vtag insertion.

Signed-off-by: Vivek Sharma 
---
 drivers/net/octeontx2/Makefile  |   1 +
 drivers/net/octeontx2/meson.build   |   1 +
 drivers/net/octeontx2/otx2_ethdev.c |  10 ++
 drivers/net/octeontx2/otx2_ethdev.h |  48 +++
 drivers/net/octeontx2/otx2_tm.c |   5 +-
 drivers/net/octeontx2/otx2_vlan.c   | 190 
 6 files changed, 253 insertions(+), 2 deletions(-)
 create mode 100644 drivers/net/octeontx2/otx2_vlan.c

diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index d651c8c50..b1cc6d83b 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -36,6 +36,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
otx2_ptp.c  \
otx2_flow.c \
otx2_link.c \
+   otx2_vlan.c \
otx2_stats.c\
otx2_lookup.c   \
otx2_ethdev.c   \
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index a2c494bb4..d5f272c8b 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -9,6 +9,7 @@ sources = files(
'otx2_ptp.c',
'otx2_flow.c',
'otx2_link.c',
+   'otx2_vlan.c',
'otx2_stats.c',
'otx2_lookup.c',
'otx2_ethdev.c',
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index bda5b4aa4..cfc22a2da 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1079,6 +1079,7 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
/* Free the resources allocated from the previous configure */
if (dev->configured == 1) {
otx2_nix_rxchan_bpid_cfg(eth_dev, false);
+   otx2_nix_vlan_fini(eth_dev);
otx2_flow_fini(dev);
oxt2_nix_unregister_queue_irqs(eth_dev);
nix_set_nop_rxtx_function(eth_dev);
@@ -1126,6 +1127,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto free_nix_lf;
}
 
+   rc = otx2_nix_vlan_offload_init(eth_dev);
+   if (rc) {
+   otx2_err("Failed to init vlan offload rc=%d", rc);
+   goto free_nix_lf;
+   }
+
/* Register queue IRQs */
rc = oxt2_nix_register_queue_irqs(eth_dev);
if (rc) {
@@ -1546,6 +1553,9 @@ otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool 
mbox_close)
/* Disable nix bpid config */
otx2_nix_rxchan_bpid_cfg(eth_dev, false);
 
+   /* Disable vlan offloads */
+   otx2_nix_vlan_fini(eth_dev);
+
/* Disable other rte_flow entries */
otx2_flow_fini(dev);
 
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index e9123641c..b54018ae0 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -40,6 +40,7 @@
 /* Used for struct otx2_eth_dev::flags */
 #define OTX2_LINK_CFG_IN_PROGRESS_FBIT_ULL(0)
 
+#define NIX_MAX_VTAG_INS   2
 #define VLAN_TAG_SIZE  4
 #define NIX_HW_L2_OVERHEAD 22
 /* ETH_HLEN+2*VLAN_HLEN */
@@ -163,6 +164,47 @@ struct otx2_fc_info {
uint16_t bpid[NIX_MAX_CHAN];
 };
 
+struct vlan_mkex_info {
+   struct npc_xtract_info la_xtract;
+   struct npc_xtract_info lb_xtract;
+   uint64_t lb_lt_offset;
+};
+
+struct vlan_entry {
+   uint32_t mcam_idx;
+   uint16_t vlan_id;
+   TAILQ_ENTRY(vlan_entry) next;
+};
+
+TAILQ_HEAD(otx2_vlan_filter_tbl, vlan_entry);
+
+struct otx2_vlan_info {
+   struct otx2_vlan_filter_tbl fltr_tbl;
+   /* MKEX layer info */
+   struct mcam_entry def_tx_mcam_ent;
+   struct mcam_entry def_rx_mcam_ent;
+   struct vlan_mkex_info mkex;
+   /* Default mcam entry that matches vlan packets */
+   uint32_t def_rx_mcam_idx;
+   uint32_t def_tx_mcam_idx;
+   /* MCAM entry that matches double vlan packets */
+   uint32_t qinq_mcam_idx;
+   /* Indices of tx_vtag def registers */
+   uint32_t outer_vlan_idx;
+   uint32_t inner_vlan_idx;
+   uint16_t outer_vlan_tpid;
+   uint16_t inner_vlan_tpid;
+   uint16_t pvid;
+   /* QinQ entry allocated before default one */
+   uint8_t qinq_before_def;
+   uint8_t pvid_insert_on;
+   /* Rx vtag action type */
+   uint8_t vtag_type_idx;
+   uint8_t filter_on;
+   uint8_t strip_on;
+   uint8_t qinq_on;
+};
+
 struct otx2_eth_dev {
OTX2_DEV; /* Base class */
MARKER otx2_eth_dev_data_start;
@@ -222,6 +264,7 @@ struct otx2_eth_dev {
struct rte_timecounter  systime_tc;
struct rte_timecounter  rx_tstamp_tc;
struct rte_timecount

[dpdk-dev] [PATCH v1 48/58] net/octeontx2: add FW version get operation

2019-06-02 Thread jerinj

From: Vamsi Attunuru 

Add firmware version get operation.

Signed-off-by: Vamsi Attunuru 
---
 doc/guides/nics/features/octeontx2.ini |  1 +
 doc/guides/nics/features/octeontx2_vec.ini |  1 +
 doc/guides/nics/features/octeontx2_vf.ini  |  1 +
 drivers/net/octeontx2/otx2_ethdev.c|  1 +
 drivers/net/octeontx2/otx2_ethdev.h|  3 +++
 drivers/net/octeontx2/otx2_ethdev_ops.c| 22 ++
 drivers/net/octeontx2/otx2_flow.c  |  7 +++
 7 files changed, 36 insertions(+)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 3567e3f63..6117e1edf 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -33,5 +33,6 @@ Rx descriptor status = Y
 Basic stats  = Y
 Stats per queue  = Y
 Extended stats   = Y
+FW version   = Y
 Module EEPROM dump   = Y
 Registers dump   = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index 7edc80348..66c327cfc 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -31,5 +31,6 @@ Rx descriptor status = Y
 Basic stats  = Y
 Extended stats   = Y
 Stats per queue  = Y
+FW version   = Y
 Module EEPROM dump   = Y
 Registers dump   = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index fcc1ddc03..3aa0491e1 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -26,5 +26,6 @@ Rx descriptor status = Y
 Basic stats  = Y
 Extended stats   = Y
 Stats per queue  = Y
+FW version   = Y
 Module EEPROM dump   = Y
 Registers dump   = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index c5dcdc21c..b449bb032 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1335,6 +1335,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.filter_ctrl  = otx2_nix_dev_filter_ctrl,
.get_module_info  = otx2_nix_get_module_info,
.get_module_eeprom= otx2_nix_get_module_eeprom,
+   .fw_version_get   = otx2_nix_fw_version_get,
.flow_ctrl_get= otx2_nix_flow_ctrl_get,
.flow_ctrl_set= otx2_nix_flow_ctrl_set,
.timesync_enable  = otx2_nix_timesync_enable,
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 3f11802eb..7bb42be8d 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -216,6 +216,7 @@ struct otx2_eth_dev {
uint8_t lso_tsov4_idx;
uint8_t lso_tsov6_idx;
uint8_t mac_addr[RTE_ETHER_ADDR_LEN];
+   uint8_t mkex_pfl_name[MKEX_NAME_LEN];
uint8_t max_mac_entries;
uint8_t lf_tx_stats;
uint8_t lf_rx_stats;
@@ -320,6 +321,8 @@ void otx2_nix_info_get(struct rte_eth_dev *eth_dev,
 int otx2_nix_dev_filter_ctrl(struct rte_eth_dev *eth_dev,
 enum rte_filter_type filter_type,
 enum rte_filter_op filter_op, void *arg);
+int otx2_nix_fw_version_get(struct rte_eth_dev *eth_dev, char *fw_version,
+   size_t fw_size);
 int otx2_nix_get_module_info(struct rte_eth_dev *eth_dev,
 struct rte_eth_dev_module_info *modinfo);
 int otx2_nix_get_module_eeprom(struct rte_eth_dev *eth_dev,
diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c 
b/drivers/net/octeontx2/otx2_ethdev_ops.c
index 1da9222b7..d2cb5ba1c 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -209,6 +209,28 @@ otx2_nix_tx_done_cleanup(void *txq, uint32_t free_cnt)
return 0;
 }
 
+int
+otx2_nix_fw_version_get(struct rte_eth_dev *eth_dev, char *fw_version,
+   size_t fw_size)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   int rc = (int)fw_size;
+
+   if (fw_size > sizeof(dev->mkex_pfl_name))
+   rc = sizeof(dev->mkex_pfl_name);
+
+   rc = strlcpy(fw_version, (char *)dev->mkex_pfl_name, rc);
+
+   rc += 1; /* Add the size of '\0' */
+   if (fw_size < (uint32_t)rc)
+   goto done;
+   else
+   return 0;
+
+done:
+   return rc;
+}
+
 int
 otx2_nix_pool_ops_supported(struct rte_eth_dev *eth_dev, const char *pool)
 {
diff --git a/drivers/net/octeontx2/otx2_flow.c 
b/drivers/net/octeontx2/otx2_flow.c
index 1fbe6b86e..270433cd6 100644
--- a/drivers/net/octeontx2/otx2_flow.c
+++ b/drivers/net/octeontx2/otx2_flow.c
@@ -740,6 +740,7 @@ flow_fetch_kex_cfg(struct otx2_eth_dev *dev)
struct otx2_npc_flow_info *npc = &dev->npc_flow;
struct npc_get_kex_cfg_rsp *kex_rsp;
struct otx2_mbox *mbox = dev->mbox;
+   char mkex_pfl_name[MKEX_NAME_LEN];

[dpdk-dev] [PATCH v1 45/58] net/octeontx2: support VLAN offloads

2019-06-02 Thread jerinj

From: Vivek Sharma 

Support configuring VLAN offloads for an ethernet device.

Signed-off-by: Vivek Sharma 
---
 doc/guides/nics/features/octeontx2.ini |   2 +
 doc/guides/nics/features/octeontx2_vec.ini |   2 +
 doc/guides/nics/features/octeontx2_vf.ini  |   2 +
 drivers/net/octeontx2/otx2_ethdev.c|   1 +
 drivers/net/octeontx2/otx2_ethdev.h|   1 +
 drivers/net/octeontx2/otx2_rx.h|   1 +
 drivers/net/octeontx2/otx2_vlan.c  | 424 -
 7 files changed, 425 insertions(+), 8 deletions(-)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 4917057f6..f811c38e3 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -23,6 +23,8 @@ RSS reta update  = Y
 Inner RSS= Y
 Flow control = Y
 Flow API = Y
+VLAN offload = Y
+QinQ offload = Y
 Packet type parsing  = Y
 Timesync = Y
 Timestamp offload= Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index 9049e8e99..77c3a5637 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -23,6 +23,8 @@ RSS reta update  = Y
 Inner RSS= Y
 Flow control = Y
 Flow API = Y
+VLAN offload = Y
+QinQ offload = Y
 Packet type parsing  = Y
 Rx descriptor status = Y
 Basic stats  = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index 735b7447a..4571a1e78 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -18,6 +18,8 @@ RSS key update   = Y
 RSS reta update  = Y
 Inner RSS= Y
 Flow API = Y
+VLAN offload = Y
+QinQ offload = Y
 Packet type parsing  = Y
 Rx descriptor status = Y
 Basic stats  = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index cfc22a2da..362e46941 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1344,6 +1344,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.timesync_adjust_time = otx2_nix_timesync_adjust_time,
.timesync_read_time   = otx2_nix_timesync_read_time,
.timesync_write_time  = otx2_nix_timesync_write_time,
+   .vlan_offload_set = otx2_nix_vlan_offload_set,
 };
 
 static inline int
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index b54018ae0..816371c37 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -468,6 +468,7 @@ int otx2_eth_dev_ptp_info_update(struct otx2_dev *dev, bool 
ptp_en);
 /* VLAN */
 int otx2_nix_vlan_offload_init(struct rte_eth_dev *eth_dev);
 int otx2_nix_vlan_fini(struct rte_eth_dev *eth_dev);
+int otx2_nix_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask);
 
 
 #endif /* __OTX2_ETHDEV_H__ */
diff --git a/drivers/net/octeontx2/otx2_rx.h b/drivers/net/octeontx2/otx2_rx.h
index 687cf2b40..763dc402e 100644
--- a/drivers/net/octeontx2/otx2_rx.h
+++ b/drivers/net/octeontx2/otx2_rx.h
@@ -16,6 +16,7 @@
 sizeof(uint16_t))
 
 #define NIX_RX_OFFLOAD_PTYPE_F BIT(1)
+#define NIX_RX_OFFLOAD_VLAN_STRIP_FBIT(3)
 #define NIX_RX_OFFLOAD_TSTAMP_FBIT(5)
 #define NIX_RX_OFFLOAD_MARK_UPDATE_F   BIT(4)
 
diff --git a/drivers/net/octeontx2/otx2_vlan.c 
b/drivers/net/octeontx2/otx2_vlan.c
index b3136d2cf..d9880d069 100644
--- a/drivers/net/octeontx2/otx2_vlan.c
+++ b/drivers/net/octeontx2/otx2_vlan.c
@@ -39,8 +39,50 @@ __rte_unused nix_vlan_mcam_enb_dis(struct otx2_eth_dev *dev,
return rc;
 }
 
+static void
+nix_set_rx_vlan_action(struct rte_eth_dev *eth_dev,
+   struct mcam_entry *entry, bool qinq, bool drop)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   int pcifunc = otx2_pfvf_func(dev->pf, dev->vf);
+   uint64_t action = 0, vtag_action = 0;
+
+   action = NIX_RX_ACTIONOP_UCAST;
+
+   if (eth_dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
+   action = NIX_RX_ACTIONOP_RSS;
+   action |= (uint64_t)(dev->rss_info.alg_idx) << 56;
+   }
+
+   action |= (uint64_t)pcifunc << 4;
+   entry->action = action;
+
+   if (drop) {
+   entry->action &= ~((uint64_t)0xF);
+   entry->action |= NIX_RX_ACTIONOP_DROP;
+   return;
+   }
+
+   if (!qinq) {
+   /* VTAG0 fields denote CTAG in single vlan case */
+   vtag_action |= (NIX_RX_VTAGACTION_VTAG_VALID << 15);
+   vtag_action |= (NPC_LID_LB << 8);
+   vtag_action |= NIX_RX_VTAGACTION_VTAG0_RELPTR;
+   } else {
+   /* VTAG0 & VTAG1 fields denote CTAG & STAG respectively */
+

[dpdk-dev] [PATCH v1 47/58] net/octeontx2: support VLAN TPID and PVID for Tx

2019-06-02 Thread jerinj

From: Vivek Sharma 

Implement support for setting VLAN TPID and PVID for Tx
packets.

Signed-off-by: Vivek Sharma 
---
 drivers/net/octeontx2/otx2_ethdev.c |   2 +
 drivers/net/octeontx2/otx2_ethdev.h |   5 +
 drivers/net/octeontx2/otx2_vlan.c   | 191 
 3 files changed, 198 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 175e80e44..c5dcdc21c 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1347,6 +1347,8 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.vlan_offload_set = otx2_nix_vlan_offload_set,
.vlan_filter_set  = otx2_nix_vlan_filter_set,
.vlan_strip_queue_set = otx2_nix_vlan_strip_queue_set,
+   .vlan_tpid_set= otx2_nix_vlan_tpid_set,
+   .vlan_pvid_set= otx2_nix_vlan_pvid_set,
 };
 
 static inline int
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index a3babe51a..3f11802eb 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -473,5 +473,10 @@ int otx2_nix_vlan_filter_set(struct rte_eth_dev *eth_dev, 
uint16_t vlan_id,
 int on);
 void otx2_nix_vlan_strip_queue_set(struct rte_eth_dev *dev,
   uint16_t queue, int on);
+int
+otx2_nix_vlan_tpid_set(struct rte_eth_dev *eth_dev,
+  enum rte_vlan_type type, uint16_t tpid);
+int
+otx2_nix_vlan_pvid_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on);
 
 #endif /* __OTX2_ETHDEV_H__ */
diff --git a/drivers/net/octeontx2/otx2_vlan.c 
b/drivers/net/octeontx2/otx2_vlan.c
index 3e60da099..3c0d40553 100644
--- a/drivers/net/octeontx2/otx2_vlan.c
+++ b/drivers/net/octeontx2/otx2_vlan.c
@@ -81,6 +81,37 @@ nix_set_rx_vlan_action(struct rte_eth_dev *eth_dev,
entry->vtag_action = vtag_action;
 }
 
+static void
+nix_set_tx_vlan_action(struct mcam_entry *entry, enum rte_vlan_type type,
+  int vtag_index)
+{
+   union {
+   uint64_t reg;
+   struct nix_tx_vtag_action_s act;
+   } vtag_action;
+
+   uint64_t action;
+
+   action = NIX_TX_ACTIONOP_UCAST_DEFAULT;
+
+   if (type == ETH_VLAN_TYPE_OUTER) {
+   vtag_action.act.vtag0_def = vtag_index;
+   vtag_action.act.vtag0_lid = NPC_LID_LA;
+   vtag_action.act.vtag0_op = NIX_TX_VTAGOP_INSERT;
+   vtag_action.act.vtag0_relptr = sizeof(struct nix_inst_hdr_s) +
+   2 * RTE_ETHER_ADDR_LEN + NIX_RX_VTAGACTION_VTAG0_RELPTR;
+   } else {
+   vtag_action.act.vtag1_def = vtag_index;
+   vtag_action.act.vtag1_lid = NPC_LID_LA;
+   vtag_action.act.vtag1_op = NIX_TX_VTAGOP_INSERT;
+   vtag_action.act.vtag1_relptr = sizeof(struct nix_inst_hdr_s) +
+   2 * RTE_ETHER_ADDR_LEN + NIX_RX_VTAGACTION_VTAG1_RELPTR;
+   }
+
+   entry->action = action;
+   entry->vtag_action = vtag_action.reg;
+}
+
 static int
 nix_vlan_mcam_free(struct otx2_eth_dev *dev, uint32_t entry)
 {
@@ -322,6 +353,46 @@ nix_vlan_handle_default_rx_entry(struct rte_eth_dev 
*eth_dev, bool strip,
return 0;
 }
 
+/* Installs/Removes default tx entry */
+static int
+nix_vlan_handle_default_tx_entry(struct rte_eth_dev *eth_dev,
+enum rte_vlan_type type, int vtag_index,
+int enable)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct otx2_vlan_info *vlan = &dev->vlan_info;
+   struct mcam_entry entry;
+   uint16_t pf_func;
+   int rc;
+
+   if (!vlan->def_tx_mcam_idx && enable) {
+   memset(&entry, 0, sizeof(struct mcam_entry));
+
+   /* Only pf_func is matched, swap it's bytes */
+   pf_func = (dev->pf_func & 0xff) << 8;
+   pf_func |= (dev->pf_func >> 8) & 0xff;
+
+   /* PF Func extracted to KW1[63:48] */
+   entry.kw[1] = (uint64_t)pf_func << 48;
+   entry.kw_mask[1] = (BIT_ULL(16) - 1) << 48;
+
+   nix_set_tx_vlan_action(&entry, type, vtag_index);
+   vlan->def_tx_mcam_ent = entry;
+
+   return nix_vlan_mcam_alloc_and_write(eth_dev, &entry,
+NIX_INTF_TX, 0);
+   }
+
+   if (vlan->def_tx_mcam_idx && !enable) {
+   rc = nix_vlan_mcam_free(dev, vlan->def_tx_mcam_idx);
+   if (rc)
+   return rc;
+   vlan->def_rx_mcam_idx = 0;
+   }
+
+   return 0;
+}
+
 /* Configure vlan stripping on or off */
 static int
 nix_vlan_hw_strip(struct rte_eth_dev *eth_dev, const uint8_t enable)
@@ -591,6 +662,126 @@ otx2_nix_vlan_offload_set(struct rte_eth_dev *eth_dev, 
int mask)
return rc;
 }
 
+int
+otx2_nix_vlan_tpid_set(struct rte_eth_dev *eth_de

[dpdk-dev] [PATCH v1 51/58] net/octeontx2: add Rx vector version

2019-06-02 Thread jerinj

From: Jerin Jacob 

Add vector version of packet Receive function.

Signed-off-by: Jerin Jacob 
Signed-off-by: Nithin Dabilpuram 
---
 drivers/net/octeontx2/otx2_rx.c | 259 +++-
 1 file changed, 258 insertions(+), 1 deletion(-)

diff --git a/drivers/net/octeontx2/otx2_rx.c b/drivers/net/octeontx2/otx2_rx.c
index 0f0919338..4ba881ffb 100644
--- a/drivers/net/octeontx2/otx2_rx.c
+++ b/drivers/net/octeontx2/otx2_rx.c
@@ -83,6 +83,239 @@ nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
return nb_pkts;
 }
 
+#if defined(RTE_ARCH_ARM64)
+
+static __rte_always_inline uint64_t
+nix_vlan_update(const uint64_t w2, uint64_t ol_flags, uint8x16_t *f)
+{
+   if (w2 & BIT_ULL(21) /* vtag0_gone */) {
+   ol_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
+   *f = vsetq_lane_u16((uint16_t)(w2 >> 32), *f, 5);
+   }
+
+   return ol_flags;
+}
+
+static __rte_always_inline uint64_t
+nix_qinq_update(const uint64_t w2, uint64_t ol_flags, struct rte_mbuf *mbuf)
+{
+   if (w2 & BIT_ULL(23) /* vtag1_gone */) {
+   ol_flags |= PKT_RX_QINQ | PKT_RX_QINQ_STRIPPED;
+   mbuf->vlan_tci_outer = (uint16_t)(w2 >> 48);
+   }
+
+   return ol_flags;
+}
+
+static __rte_always_inline uint16_t
+nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
+uint16_t pkts, const uint16_t flags)
+{
+   struct otx2_eth_rxq *rxq = rx_queue; uint16_t packets = 0;
+   uint64x2_t cq0_w8, cq1_w8, cq2_w8, cq3_w8, mbuf01, mbuf23;
+   const uint64_t mbuf_initializer = rxq->mbuf_initializer;
+   const uint64x2_t data_off = vdupq_n_u64(rxq->data_off);
+   uint64_t ol_flags0, ol_flags1, ol_flags2, ol_flags3;
+   uint64x2_t rearm0 = vdupq_n_u64(mbuf_initializer);
+   uint64x2_t rearm1 = vdupq_n_u64(mbuf_initializer);
+   uint64x2_t rearm2 = vdupq_n_u64(mbuf_initializer);
+   uint64x2_t rearm3 = vdupq_n_u64(mbuf_initializer);
+   struct rte_mbuf *mbuf0, *mbuf1, *mbuf2, *mbuf3;
+   const uint16_t *lookup_mem = rxq->lookup_mem;
+   const uint32_t qmask = rxq->qmask;
+   const uint64_t wdata = rxq->wdata;
+   const uintptr_t desc = rxq->desc;
+   uint8x16_t f0, f1, f2, f3;
+   uint32_t head = rxq->head;
+
+   pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
+   /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */
+   pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
+
+   while (packets < pkts) {
+   /* Get the CQ pointers, since the ring size is multiple of
+* 4, We can avoid checking the wrap around of head
+* value after the each access unlike scalar version.
+*/
+   const uintptr_t cq0 = desc + CQE_SZ(head);
+
+   /* Prefetch N desc ahead */
+   rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(8)));
+   rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(9)));
+   rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(10)));
+   rte_prefetch_non_temporal((void *)(cq0 + CQE_SZ(11)));
+
+   /* Get NIX_RX_SG_S for size and buffer pointer */
+   cq0_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(0) + 64));
+   cq1_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(1) + 64));
+   cq2_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(2) + 64));
+   cq3_w8 = vld1q_u64((uint64_t *)(cq0 + CQE_SZ(3) + 64));
+
+   /* Extract mbuf from NIX_RX_SG_S */
+   mbuf01 = vzip2q_u64(cq0_w8, cq1_w8);
+   mbuf23 = vzip2q_u64(cq2_w8, cq3_w8);
+   mbuf01 = vqsubq_u64(mbuf01, data_off);
+   mbuf23 = vqsubq_u64(mbuf23, data_off);
+
+   /* Move mbufs to scalar registers for future use */
+   mbuf0 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 0);
+   mbuf1 = (struct rte_mbuf *)vgetq_lane_u64(mbuf01, 1);
+   mbuf2 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 0);
+   mbuf3 = (struct rte_mbuf *)vgetq_lane_u64(mbuf23, 1);
+
+   /* Mask to get packet len from NIX_RX_SG_S */
+   const uint8x16_t shuf_msk = {
+   0xFF, 0xFF,   /* pkt_type set as unknown */
+   0xFF, 0xFF,   /* pkt_type set as unknown */
+   0, 1, /* octet 1~0, low 16 bits pkt_len */
+   0xFF, 0xFF,   /* skip high 16 bits pkt_len, zero out */
+   0, 1, /* octet 1~0, 16 bits data_len */
+   0xFF, 0xFF,
+   0xFF, 0xFF, 0xFF, 0xFF
+   };
+
+   /* Form the rx_descriptor_fields1 with pkt_len and data_len */
+   f0 = vqtbl1q_u8(cq0_w8, shuf_msk);
+   f1 = vqtbl1q_u8(cq1_w8, shuf_msk);
+   f2 = vqtbl1q_u8(cq2_w8, shuf_msk);
+   f3 = vqtbl1q_u8(cq3_w8, shuf_msk);
+
+   /* Load CQE word0 a

[dpdk-dev] [PATCH v1 49/58] net/octeontx2: add Rx burst support

2019-06-02 Thread jerinj

From: Jerin Jacob 

Add Rx burst support.

Signed-off-by: Jerin Jacob 
Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Pavan Nikhilesh 
Signed-off-by: Harman Kalra 
---
 drivers/net/octeontx2/Makefile  |   1 +
 drivers/net/octeontx2/meson.build   |   2 +-
 drivers/net/octeontx2/otx2_ethdev.c |   6 -
 drivers/net/octeontx2/otx2_ethdev.h |   2 +
 drivers/net/octeontx2/otx2_rx.c | 128 ++
 drivers/net/octeontx2/otx2_rx.h | 249 +++-
 6 files changed, 380 insertions(+), 8 deletions(-)
 create mode 100644 drivers/net/octeontx2/otx2_rx.c

diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index b1cc6d83b..76847b2c2 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -30,6 +30,7 @@ LIBABIVER := 1
 # all source are stored in SRCS-y
 #
 SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
+   otx2_rx.c   \
otx2_tm.c   \
otx2_rss.c  \
otx2_mac.c  \
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index d5f272c8b..1361f1707 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -2,7 +2,7 @@
 # Copyright(C) 2019 Marvell International Ltd.
 #
 
-sources = files(
+sources = files('otx2_rx.c',
'otx2_tm.c',
'otx2_rss.c',
'otx2_mac.c',
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index b449bb032..9b55e757e 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -14,12 +14,6 @@
 
 #include "otx2_ethdev.h"
 
-static inline void
-otx2_eth_set_rx_function(struct rte_eth_dev *eth_dev)
-{
-   RTE_SET_USED(eth_dev);
-}
-
 static inline void
 otx2_eth_set_tx_function(struct rte_eth_dev *eth_dev)
 {
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 7bb42be8d..3ba47f6ab 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -259,6 +259,7 @@ struct otx2_eth_dev {
struct otx2_eth_qconf *tx_qconf;
struct otx2_eth_qconf *rx_qconf;
struct rte_eth_dev *eth_dev;
+   eth_rx_burst_t rx_pkt_burst_no_offload;
/* PTP counters */
bool ptp_en;
struct otx2_timesync_info tstamp;
@@ -451,6 +452,7 @@ int otx2_ethdev_parse_devargs(struct rte_devargs *devargs,
  struct otx2_eth_dev *dev);
 
 /* Rx and Tx routines */
+void otx2_eth_set_rx_function(struct rte_eth_dev *eth_dev);
 void otx2_nix_form_default_desc(struct otx2_eth_txq *txq);
 
 /* Timesync - PTP routines */
diff --git a/drivers/net/octeontx2/otx2_rx.c b/drivers/net/octeontx2/otx2_rx.c
new file mode 100644
index 0..b4a3e9d55
--- /dev/null
+++ b/drivers/net/octeontx2/otx2_rx.c
@@ -0,0 +1,128 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#include 
+
+#include "otx2_ethdev.h"
+#include "otx2_rx.h"
+
+#define NIX_DESCS_PER_LOOP 4
+#define CQE_CAST(x)((struct nix_cqe_hdr_s *)(x))
+#define CQE_SZ(x)  ((x) * NIX_CQ_ENTRY_SZ)
+
+static inline uint16_t
+nix_rx_nb_pkts(struct otx2_eth_rxq *rxq, const uint64_t wdata,
+  const uint16_t pkts, const uint32_t qmask)
+{
+   uint32_t available = rxq->available;
+
+   /* Update the available count if cached value is not enough */
+   if (unlikely(available < pkts)) {
+   uint64_t reg, head, tail;
+
+   /* Use LDADDA version to avoid reorder */
+   reg = otx2_atomic64_add_sync(wdata, rxq->cq_status);
+   /* CQ_OP_STATUS operation error */
+   if (reg & BIT_ULL(CQ_OP_STAT_OP_ERR) ||
+   reg & BIT_ULL(CQ_OP_STAT_CQ_ERR))
+   return 0;
+
+   tail = reg & 0xF;
+   head = (reg >> 20) & 0xF;
+   if (tail < head)
+   available = tail - head + qmask + 1;
+   else
+   available = tail - head;
+
+   rxq->available = available;
+   }
+
+   return RTE_MIN(pkts, available);
+}
+
+static __rte_always_inline uint16_t
+nix_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
+ uint16_t pkts, const uint16_t flags)
+{
+   struct otx2_eth_rxq *rxq = rx_queue;
+   const uint64_t mbuf_init = rxq->mbuf_initializer;
+   const void *lookup_mem = rxq->lookup_mem;
+   const uint64_t data_off = rxq->data_off;
+   const uintptr_t desc = rxq->desc;
+   const uint64_t wdata = rxq->wdata;
+   const uint32_t qmask = rxq->qmask;
+   uint16_t packets = 0, nb_pkts;
+   uint32_t head = rxq->head;
+   struct nix_cqe_hdr_s *cq;
+   struct rte_mbuf *mbuf;
+
+   nb_pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask);
+
+   while (packets < nb_pkts) {
+   /* Prefetch N desc ahead */
+   rte_prefetch_no

[dpdk-dev] [PATCH v1 46/58] net/octeontx2: support VLAN filters

2019-06-02 Thread jerinj

From: Vivek Sharma 

Support setting up VLAN filters so as to allow tagged
packet's reception after VLAN HW Filter offload is enabled.

Signed-off-by: Vivek Sharma 
---
 doc/guides/nics/features/octeontx2.ini |   1 +
 doc/guides/nics/features/octeontx2_vec.ini |   1 +
 doc/guides/nics/features/octeontx2_vf.ini  |   1 +
 drivers/net/octeontx2/otx2_ethdev.c|   2 +
 drivers/net/octeontx2/otx2_ethdev.h|   5 +-
 drivers/net/octeontx2/otx2_vlan.c  | 147 -
 6 files changed, 154 insertions(+), 3 deletions(-)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index f811c38e3..3567e3f63 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -21,6 +21,7 @@ RSS hash = Y
 RSS key update   = Y
 RSS reta update  = Y
 Inner RSS= Y
+VLAN filter  = Y
 Flow control = Y
 Flow API = Y
 VLAN offload = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index 77c3a5637..7edc80348 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -21,6 +21,7 @@ RSS hash = Y
 RSS key update   = Y
 RSS reta update  = Y
 Inner RSS= Y
+VLAN filter  = Y
 Flow control = Y
 Flow API = Y
 VLAN offload = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index 4571a1e78..fcc1ddc03 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -17,6 +17,7 @@ RSS hash = Y
 RSS key update   = Y
 RSS reta update  = Y
 Inner RSS= Y
+VLAN filter  = Y
 Flow API = Y
 VLAN offload = Y
 QinQ offload = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 362e46941..175e80e44 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1345,6 +1345,8 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.timesync_read_time   = otx2_nix_timesync_read_time,
.timesync_write_time  = otx2_nix_timesync_write_time,
.vlan_offload_set = otx2_nix_vlan_offload_set,
+   .vlan_filter_set  = otx2_nix_vlan_filter_set,
+   .vlan_strip_queue_set = otx2_nix_vlan_strip_queue_set,
 };
 
 static inline int
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 816371c37..a3babe51a 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -469,6 +469,9 @@ int otx2_eth_dev_ptp_info_update(struct otx2_dev *dev, bool 
ptp_en);
 int otx2_nix_vlan_offload_init(struct rte_eth_dev *eth_dev);
 int otx2_nix_vlan_fini(struct rte_eth_dev *eth_dev);
 int otx2_nix_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask);
-
+int otx2_nix_vlan_filter_set(struct rte_eth_dev *eth_dev, uint16_t vlan_id,
+int on);
+void otx2_nix_vlan_strip_queue_set(struct rte_eth_dev *dev,
+  uint16_t queue, int on);
 
 #endif /* __OTX2_ETHDEV_H__ */
diff --git a/drivers/net/octeontx2/otx2_vlan.c 
b/drivers/net/octeontx2/otx2_vlan.c
index d9880d069..3e60da099 100644
--- a/drivers/net/octeontx2/otx2_vlan.c
+++ b/drivers/net/octeontx2/otx2_vlan.c
@@ -21,8 +21,8 @@ enum vtag_cfg_dir {
 };
 
 static int
-__rte_unused nix_vlan_mcam_enb_dis(struct otx2_eth_dev *dev,
-  uint32_t entry, const int enable)
+nix_vlan_mcam_enb_dis(struct otx2_eth_dev *dev,
+ uint32_t entry, const int enable)
 {
struct npc_mcam_ena_dis_entry_req *req;
struct otx2_mbox *mbox = dev->mbox;
@@ -366,6 +366,8 @@ nix_vlan_hw_filter(struct rte_eth_dev *eth_dev, const 
uint8_t enable,
   uint16_t vlan_id)
 {
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct otx2_vlan_info *vlan = &dev->vlan_info;
+   struct vlan_entry *entry;
int rc = -EINVAL;
 
if (!vlan_id && enable) {
@@ -379,6 +381,24 @@ nix_vlan_hw_filter(struct rte_eth_dev *eth_dev, const 
uint8_t enable,
return 0;
}
 
+   /* Enable/disable existing vlan filter entries */
+   TAILQ_FOREACH(entry, &vlan->fltr_tbl, next) {
+   if (vlan_id) {
+   if (entry->vlan_id == vlan_id) {
+   rc = nix_vlan_mcam_enb_dis(dev,
+  entry->mcam_idx,
+  enable);
+   if (rc)
+   return rc;
+   }
+   } else {
+   rc = nix_vlan_mcam_enb_dis(dev, entry->mcam_idx,
+

[dpdk-dev] [PATCH v1 53/58] net/octeontx2: add Tx multi segment version

2019-06-02 Thread jerinj

From: Nithin Dabilpuram 

Add multi segment version of packet Transmit function.

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Pavan Nikhilesh 
---
 drivers/net/octeontx2/otx2_ethdev.h |  4 ++
 drivers/net/octeontx2/otx2_tx.c | 58 +
 drivers/net/octeontx2/otx2_tx.h | 81 +
 3 files changed, 143 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index bcc351b76..dff4de250 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -71,6 +71,10 @@
 #define NIX_TX_NB_SEG_MAX  9
 #endif
 
+#define NIX_TX_MSEG_SG_DWORDS  \
+   ((RTE_ALIGN_MUL_CEIL(NIX_TX_NB_SEG_MAX, 3) / 3) \
++ NIX_TX_NB_SEG_MAX)
+
 /* Apply BP when CQ is 75% full */
 #define NIX_CQ_BP_LEVEL (25 * 256 / 100)
 
diff --git a/drivers/net/octeontx2/otx2_tx.c b/drivers/net/octeontx2/otx2_tx.c
index 16d69b74f..0ac5ea652 100644
--- a/drivers/net/octeontx2/otx2_tx.c
+++ b/drivers/net/octeontx2/otx2_tx.c
@@ -49,6 +49,37 @@ nix_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
return pkts;
 }
 
+static __rte_always_inline uint16_t
+nix_xmit_pkts_mseg(void *tx_queue, struct rte_mbuf **tx_pkts,
+  uint16_t pkts, uint64_t *cmd, const uint16_t flags)
+{
+   struct otx2_eth_txq *txq = tx_queue; uint64_t i;
+   const rte_iova_t io_addr = txq->io_addr;
+   void *lmt_addr = txq->lmt_addr;
+   uint16_t segdw;
+
+   NIX_XMIT_FC_OR_RETURN(txq, pkts);
+
+   otx2_lmt_mov(cmd, &txq->cmd[0], otx2_nix_tx_ext_subs(flags));
+
+   /* Lets commit any changes in the packet */
+   rte_cio_wmb();
+
+   for (i = 0; i < pkts; i++) {
+   otx2_nix_xmit_prepare(tx_pkts[i], cmd, flags);
+   segdw = otx2_nix_prepare_mseg(tx_pkts[i], cmd, flags);
+   otx2_nix_xmit_prepare_tstamp(cmd, &txq->cmd[0],
+tx_pkts[i]->ol_flags, segdw,
+flags);
+   otx2_nix_xmit_mseg_one(cmd, lmt_addr, io_addr, segdw);
+   }
+
+   /* Reduce the cached count */
+   txq->fc_cache_pkts -= pkts;
+
+   return pkts;
+}
+
 #define T(name, f4, f3, f2, f1, f0, sz, flags) \
 static uint16_t __rte_noinline __hot   \
 otx2_nix_xmit_pkts_ ## name(void *tx_queue,\
@@ -62,6 +93,20 @@ otx2_nix_xmit_pkts_ ## name(void *tx_queue,  
\
 NIX_TX_FASTPATH_MODES
 #undef T
 
+#define T(name, f4, f3, f2, f1, f0, sz, flags) \
+static uint16_t __rte_noinline __hot   \
+otx2_nix_xmit_pkts_mseg_ ## name(void *tx_queue,   \
+   struct rte_mbuf **tx_pkts, uint16_t pkts)   \
+{  \
+   uint64_t cmd[(sz) + NIX_TX_MSEG_SG_DWORDS - 2]; \
+   \
+   return nix_xmit_pkts_mseg(tx_queue, tx_pkts, pkts, cmd, \
+ (flags) | NIX_TX_MULTI_SEG_F);\
+}
+
+NIX_TX_FASTPATH_MODES
+#undef T
+
 static inline void
 pick_tx_func(struct rte_eth_dev *eth_dev,
 const eth_tx_burst_t tx_burst[2][2][2][2][2])
@@ -80,15 +125,28 @@ pick_tx_func(struct rte_eth_dev *eth_dev,
 void
 otx2_eth_set_tx_function(struct rte_eth_dev *eth_dev)
 {
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+
const eth_tx_burst_t nix_eth_tx_burst[2][2][2][2][2] = {
 #define T(name, f4, f3, f2, f1, f0, sz, flags) \
[f4][f3][f2][f1][f0] =  otx2_nix_xmit_pkts_ ## name,
 
+NIX_TX_FASTPATH_MODES
+#undef T
+   };
+
+   const eth_tx_burst_t nix_eth_tx_burst_mseg[2][2][2][2][2] = {
+#define T(name, f4, f3, f2, f1, f0, sz, flags) \
+   [f4][f3][f2][f1][f0] =  otx2_nix_xmit_pkts_mseg_ ## name,
+
 NIX_TX_FASTPATH_MODES
 #undef T
};
 
pick_tx_func(eth_dev, nix_eth_tx_burst);
 
+   if (dev->tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS)
+   pick_tx_func(eth_dev, nix_eth_tx_burst_mseg);
+
rte_mb();
 }
diff --git a/drivers/net/octeontx2/otx2_tx.h b/drivers/net/octeontx2/otx2_tx.h
index db4c1f70f..b75a220ea 100644
--- a/drivers/net/octeontx2/otx2_tx.h
+++ b/drivers/net/octeontx2/otx2_tx.h
@@ -212,6 +212,87 @@ otx2_nix_xmit_one(uint64_t *cmd, void *lmt_addr,
} while (lmt_status == 0);
 }
 
+static __rte_always_inline uint16_t
+otx2_nix_prepare_mseg(struct rte_mbuf *m, uint64_t *cmd, const uint16_t flags)
+{
+   struct nix_send_hdr_s *send_hdr;
+   union nix_send_sg_s *sg;
+   struct rte_mbuf *m_next;
+   uint64_t *slist, sg_u;
+   uint64_t nb_segs;
+   uint64_t segdw;
+   uint8_t off, i;
+
+   send_hdr = (struct nix_send_hdr_s *)cm

[dpdk-dev] [PATCH v1 50/58] net/octeontx2: add Rx multi segment version

2019-06-02 Thread jerinj

From: Nithin Dabilpuram 

Add multi segment version of packet Receive function.

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Pavan Nikhilesh 
---
 doc/guides/nics/features/octeontx2.ini |  2 +
 doc/guides/nics/features/octeontx2_vec.ini |  1 +
 doc/guides/nics/features/octeontx2_vf.ini  |  2 +
 drivers/net/octeontx2/otx2_rx.c| 25 ++
 drivers/net/octeontx2/otx2_rx.h| 55 +-
 5 files changed, 84 insertions(+), 1 deletion(-)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 6117e1edf..18bcf81cf 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -24,6 +24,8 @@ Inner RSS= Y
 VLAN filter  = Y
 Flow control = Y
 Flow API = Y
+Jumbo frame  = Y
+Scattered Rx = Y
 VLAN offload = Y
 QinQ offload = Y
 Packet type parsing  = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index 66c327cfc..97a24671e 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -24,6 +24,7 @@ Inner RSS= Y
 VLAN filter  = Y
 Flow control = Y
 Flow API = Y
+Jumbo frame  = Y
 VLAN offload = Y
 QinQ offload = Y
 Packet type parsing  = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index 3aa0491e1..916a6d7b0 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -19,6 +19,8 @@ RSS reta update  = Y
 Inner RSS= Y
 VLAN filter  = Y
 Flow API = Y
+Jumbo frame  = Y
+Scattered Rx = Y
 VLAN offload = Y
 QinQ offload = Y
 Packet type parsing  = Y
diff --git a/drivers/net/octeontx2/otx2_rx.c b/drivers/net/octeontx2/otx2_rx.c
index b4a3e9d55..0f0919338 100644
--- a/drivers/net/octeontx2/otx2_rx.c
+++ b/drivers/net/octeontx2/otx2_rx.c
@@ -91,6 +91,14 @@ otx2_nix_recv_pkts_ ## name(void *rx_queue,  
   \
 { \
return nix_recv_pkts(rx_queue, rx_pkts, pkts, (flags));\
 } \
+  \
+static uint16_t __rte_noinline __hot  \
+otx2_nix_recv_pkts_mseg_ ## name(void *rx_queue,  \
+   struct rte_mbuf **rx_pkts, uint16_t pkts)  \
+{ \
+   return nix_recv_pkts(rx_queue, rx_pkts, pkts,  \
+(flags) | NIX_RX_MULTI_SEG_F);\
+} \
 
 NIX_RX_FASTPATH_MODES
 #undef R
@@ -114,15 +122,32 @@ pick_rx_func(struct rte_eth_dev *eth_dev,
 void
 otx2_eth_set_rx_function(struct rte_eth_dev *eth_dev)
 {
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+
const eth_rx_burst_t nix_eth_rx_burst[2][2][2][2][2][2] = {
 #define R(name, f5, f4, f3, f2, f1, f0, flags) \
[f5][f4][f3][f2][f1][f0] =  otx2_nix_recv_pkts_ ## name,
 
+NIX_RX_FASTPATH_MODES
+#undef R
+   };
+
+   const eth_rx_burst_t nix_eth_rx_burst_mseg[2][2][2][2][2][2] = {
+#define R(name, f5, f4, f3, f2, f1, f0, flags) \
+   [f5][f4][f3][f2][f1][f0] =  otx2_nix_recv_pkts_mseg_ ## name,
+
 NIX_RX_FASTPATH_MODES
 #undef R
};
 
pick_rx_func(eth_dev, nix_eth_rx_burst);
 
+   if (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)
+   pick_rx_func(eth_dev, nix_eth_rx_burst_mseg);
+
+   /* Copy multi seg version with no offload for tear down sequence */
+   if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+   dev->rx_pkt_burst_no_offload =
+   nix_eth_rx_burst_mseg[0][0][0][0][0][0];
rte_mb();
 }
diff --git a/drivers/net/octeontx2/otx2_rx.h b/drivers/net/octeontx2/otx2_rx.h
index fc0e87d14..1d1150786 100644
--- a/drivers/net/octeontx2/otx2_rx.h
+++ b/drivers/net/octeontx2/otx2_rx.h
@@ -23,6 +23,11 @@
 #define NIX_RX_OFFLOAD_MARK_UPDATE_F   BIT(4)
 #define NIX_RX_OFFLOAD_TSTAMP_FBIT(5)
 
+/* Flags to control cqe_to_mbuf conversion function.
+ * Defining it from backwards to denote its been
+ * not used as offload flags to pick function
+ */
+#define NIX_RX_MULTI_SEG_FBIT(15)
 #define NIX_TIMESYNC_RX_OFFSET 8
 
 struct otx2_timesync_info {
@@ -133,6 +138,51 @@ nix_update_match_id(const uint16_t match_id, uint64_t 
ol_flags,
return ol_flags;
 }
 
+static __rte_always_inline void
+nix_cqe_xtra

[dpdk-dev] [PATCH v1 55/58] net/octeontx2: add device start operation

2019-06-02 Thread jerinj

From: Nithin Dabilpuram 

Add device start operation and update the correct
function pointers for Rx and Tx burst functions.

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Vamsi Attunuru 
Signed-off-by: Jerin Jacob 
---
 drivers/net/octeontx2/otx2_ethdev.c | 180 
 drivers/net/octeontx2/otx2_flow.c   |   4 +-
 drivers/net/octeontx2/otx2_flow_parse.c |   7 +-
 drivers/net/octeontx2/otx2_ptp.c|   8 ++
 drivers/net/octeontx2/otx2_vlan.c   |   1 +
 5 files changed, 197 insertions(+), 3 deletions(-)

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index fdcab89b8..bdf291996 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -135,6 +135,55 @@ otx2_cgx_rxtx_stop(struct otx2_eth_dev *dev)
return otx2_mbox_process(mbox);
 }
 
+static int
+npc_rx_enable(struct otx2_eth_dev *dev)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+
+   otx2_mbox_alloc_msg_nix_lf_start_rx(mbox);
+
+   return otx2_mbox_process(mbox);
+}
+
+static int
+npc_rx_disable(struct otx2_eth_dev *dev)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+
+   otx2_mbox_alloc_msg_nix_lf_stop_rx(mbox);
+
+   return otx2_mbox_process(mbox);
+}
+
+static int
+nix_cgx_start_link_event(struct otx2_eth_dev *dev)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+
+   if (otx2_dev_is_vf(dev))
+   return 0;
+
+   otx2_mbox_alloc_msg_cgx_start_linkevents(mbox);
+
+   return otx2_mbox_process(mbox);
+}
+
+static int
+cgx_intlbk_enable(struct otx2_eth_dev *dev, bool en)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+
+   if (otx2_dev_is_vf(dev))
+   return 0;
+
+   if (en)
+   otx2_mbox_alloc_msg_cgx_intlbk_enable(mbox);
+   else
+   otx2_mbox_alloc_msg_cgx_intlbk_disable(mbox);
+
+   return otx2_mbox_process(mbox);
+}
+
 static inline void
 nix_rx_queue_reset(struct otx2_eth_rxq *rxq)
 {
@@ -478,6 +527,74 @@ nix_sq_max_sqe_sz(struct otx2_eth_txq *txq)
return NIX_MAXSQESZ_W8;
 }
 
+static uint16_t
+nix_rx_offload_flags(struct rte_eth_dev *eth_dev)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct rte_eth_dev_data *data = eth_dev->data;
+   struct rte_eth_conf *conf = &data->dev_conf;
+   struct rte_eth_rxmode *rxmode = &conf->rxmode;
+   uint16_t flags = 0;
+
+   if (rxmode->mq_mode == ETH_MQ_RX_RSS)
+   flags |= NIX_RX_OFFLOAD_RSS_F;
+
+   if (dev->rx_offloads & (DEV_RX_OFFLOAD_TCP_CKSUM |
+DEV_RX_OFFLOAD_UDP_CKSUM))
+   flags |= NIX_RX_OFFLOAD_CHECKSUM_F;
+
+   if (dev->rx_offloads & (DEV_RX_OFFLOAD_IPV4_CKSUM |
+   DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM))
+   flags |= NIX_RX_OFFLOAD_CHECKSUM_F;
+
+   if (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)
+   flags |= NIX_RX_MULTI_SEG_F;
+
+   if (dev->rx_offloads & (DEV_RX_OFFLOAD_VLAN_STRIP |
+   DEV_RX_OFFLOAD_QINQ_STRIP))
+   flags |= NIX_RX_OFFLOAD_VLAN_STRIP_F;
+
+   if ((dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP))
+   flags |= NIX_RX_OFFLOAD_TSTAMP_F;
+
+   return flags;
+}
+
+static uint16_t
+nix_tx_offload_flags(struct rte_eth_dev *eth_dev)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   uint64_t conf = dev->tx_offloads;
+   uint16_t flags = 0;
+
+   /* Fastpath is dependent on these enums */
+   RTE_BUILD_BUG_ON(PKT_TX_TCP_CKSUM != (1ULL << 52));
+   RTE_BUILD_BUG_ON(PKT_TX_SCTP_CKSUM != (2ULL << 52));
+   RTE_BUILD_BUG_ON(PKT_TX_UDP_CKSUM != (3ULL << 52));
+
+   if (conf & DEV_TX_OFFLOAD_VLAN_INSERT ||
+   conf & DEV_TX_OFFLOAD_QINQ_INSERT)
+   flags |= NIX_TX_OFFLOAD_VLAN_QINQ_F;
+
+   if (conf & DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM ||
+   conf & DEV_TX_OFFLOAD_OUTER_UDP_CKSUM)
+   flags |= NIX_TX_OFFLOAD_OL3_OL4_CSUM_F;
+
+   if (conf & DEV_TX_OFFLOAD_IPV4_CKSUM ||
+   conf & DEV_TX_OFFLOAD_TCP_CKSUM ||
+   conf & DEV_TX_OFFLOAD_UDP_CKSUM ||
+   conf & DEV_TX_OFFLOAD_SCTP_CKSUM)
+   flags |= NIX_TX_OFFLOAD_L3_L4_CSUM_F;
+
+   if (!(conf & DEV_TX_OFFLOAD_MBUF_FAST_FREE))
+   flags |= NIX_TX_OFFLOAD_MBUF_NOFF_F;
+
+   if (conf & DEV_TX_OFFLOAD_MULTI_SEGS)
+   flags |= NIX_TX_MULTI_SEG_F;
+
+   return flags;
+}
+
 static int
 nix_sq_init(struct otx2_eth_txq *txq)
 {
@@ -1089,6 +1206,8 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
 
dev->rx_offloads = rxmode->offloads;
dev->tx_offloads = txmode->offloads;
+   dev->rx_offload_flags |= nix_rx_offload_flags(eth_dev);
+   dev->tx_offload_flags |= nix_tx_offload_flags(eth_dev);
dev->rss_info.rss_grps = NIX_RSS_GRPS;
 
nb_rxq = RTE_MAX(data->nb_rx_queues, 1);
@@ -1128,6 +1247,13 @@ otx2_nix_configure(struct rte_

[dpdk-dev] [PATCH v1 54/58] net/octeontx2: add Tx vector version

2019-06-02 Thread jerinj

From: Nithin Dabilpuram 

Add vector version of packet transmit function.

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Pavan Nikhilesh 
---
 drivers/net/octeontx2/otx2_tx.c | 883 +++-
 1 file changed, 882 insertions(+), 1 deletion(-)

diff --git a/drivers/net/octeontx2/otx2_tx.c b/drivers/net/octeontx2/otx2_tx.c
index 0ac5ea652..6bce55112 100644
--- a/drivers/net/octeontx2/otx2_tx.c
+++ b/drivers/net/octeontx2/otx2_tx.c
@@ -80,6 +80,859 @@ nix_xmit_pkts_mseg(void *tx_queue, struct rte_mbuf 
**tx_pkts,
return pkts;
 }
 
+#if defined(RTE_ARCH_ARM64)
+
+#define NIX_DESCS_PER_LOOP 4
+static __rte_always_inline uint16_t
+nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts,
+uint16_t pkts, const uint16_t flags)
+{
+   uint64x2_t dataoff_iova0, dataoff_iova1, dataoff_iova2, dataoff_iova3;
+   uint64x2_t len_olflags0, len_olflags1, len_olflags2, len_olflags3;
+   uint64_t *mbuf0, *mbuf1, *mbuf2, *mbuf3;
+   uint64x2_t senddesc01_w0, senddesc23_w0;
+   uint64x2_t senddesc01_w1, senddesc23_w1;
+   uint64x2_t sgdesc01_w0, sgdesc23_w0;
+   uint64x2_t sgdesc01_w1, sgdesc23_w1;
+   struct otx2_eth_txq *txq = tx_queue;
+   uint64_t *lmt_addr = txq->lmt_addr;
+   rte_iova_t io_addr = txq->io_addr;
+   uint64x2_t ltypes01, ltypes23;
+   uint64x2_t xtmp128, ytmp128;
+   uint64x2_t xmask01, xmask23;
+   uint64x2_t mbuf01, mbuf23;
+   uint64x2_t cmd00, cmd01;
+   uint64x2_t cmd10, cmd11;
+   uint64x2_t cmd20, cmd21;
+   uint64x2_t cmd30, cmd31;
+   uint64_t lmt_status, i;
+
+   pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP);
+
+   NIX_XMIT_FC_OR_RETURN(txq, pkts);
+
+   /* Reduce the cached count */
+   txq->fc_cache_pkts -= pkts;
+
+   /* Lets commit any changes in the packet */
+   rte_cio_wmb();
+
+   senddesc01_w0 = vld1q_dup_u64(&txq->cmd[0]);
+   senddesc23_w0 = senddesc01_w0;
+   senddesc01_w1 = vdupq_n_u64(0);
+   senddesc23_w1 = senddesc01_w1;
+   sgdesc01_w0 = vld1q_dup_u64(&txq->cmd[2]);
+   sgdesc23_w0 = sgdesc01_w0;
+
+   for (i = 0; i < pkts; i += NIX_DESCS_PER_LOOP) {
+   mbuf01 = vld1q_u64((uint64_t *)tx_pkts);
+   mbuf23 = vld1q_u64((uint64_t *)(tx_pkts + 2));
+
+   /* Clear lower 32bit of SEND_HDR_W0 and SEND_SG_W0 */
+   senddesc01_w0 = vbicq_u64(senddesc01_w0,
+ vdupq_n_u64(0x));
+   sgdesc01_w0 = vbicq_u64(sgdesc01_w0,
+   vdupq_n_u64(0x));
+
+   senddesc23_w0 = senddesc01_w0;
+   sgdesc23_w0 = sgdesc01_w0;
+
+   tx_pkts = tx_pkts + NIX_DESCS_PER_LOOP;
+
+   /* Move mbufs to iova */
+   mbuf0 = (uint64_t *)vgetq_lane_u64(mbuf01, 0);
+   mbuf1 = (uint64_t *)vgetq_lane_u64(mbuf01, 1);
+   mbuf2 = (uint64_t *)vgetq_lane_u64(mbuf23, 0);
+   mbuf3 = (uint64_t *)vgetq_lane_u64(mbuf23, 1);
+
+   mbuf0 = (uint64_t *)((uintptr_t)mbuf0 +
+offsetof(struct rte_mbuf, buf_iova));
+   mbuf1 = (uint64_t *)((uintptr_t)mbuf1 +
+offsetof(struct rte_mbuf, buf_iova));
+   mbuf2 = (uint64_t *)((uintptr_t)mbuf2 +
+offsetof(struct rte_mbuf, buf_iova));
+   mbuf3 = (uint64_t *)((uintptr_t)mbuf3 +
+offsetof(struct rte_mbuf, buf_iova));
+   /*
+* Get mbuf's, olflags, iova, pktlen, dataoff
+* dataoff_iovaX.D[0] = iova,
+* dataoff_iovaX.D[1](15:0) = mbuf->dataoff
+* len_olflagsX.D[0] = ol_flags,
+* len_olflagsX.D[1](63:32) = mbuf->pkt_len
+*/
+   dataoff_iova0  = vld1q_u64(mbuf0);
+   len_olflags0 = vld1q_u64(mbuf0 + 2);
+   dataoff_iova1  = vld1q_u64(mbuf1);
+   len_olflags1 = vld1q_u64(mbuf1 + 2);
+   dataoff_iova2  = vld1q_u64(mbuf2);
+   len_olflags2 = vld1q_u64(mbuf2 + 2);
+   dataoff_iova3  = vld1q_u64(mbuf3);
+   len_olflags3 = vld1q_u64(mbuf3 + 2);
+
+   if (flags & NIX_TX_OFFLOAD_MBUF_NOFF_F) {
+   struct rte_mbuf *mbuf;
+   /* Set don't free bit if reference count > 1 */
+   xmask01 = vdupq_n_u64(0);
+   xmask23 = xmask01;
+
+   mbuf = (struct rte_mbuf *)((uintptr_t)mbuf0 -
+   offsetof(struct rte_mbuf, buf_iova));
+
+   if (rte_pktmbuf_prefree_seg(mbuf) == NULL)
+   vsetq_lane_u64(0x8, xmask01, 0);
+   else
+   __mempool_check_cookies(mbuf->pool,
+

[dpdk-dev] [PATCH v1 52/58] net/octeontx2: add Tx burst support

2019-06-02 Thread jerinj

From: Jerin Jacob 

Add Tx burst support.

Signed-off-by: Jerin Jacob 
Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Pavan Nikhilesh 
Signed-off-by: Harman Kalra 
---
 doc/guides/nics/features/octeontx2.ini |   5 +
 doc/guides/nics/features/octeontx2_vec.ini |   5 +
 doc/guides/nics/features/octeontx2_vf.ini  |   5 +
 drivers/net/octeontx2/Makefile |   1 +
 drivers/net/octeontx2/meson.build  |   1 +
 drivers/net/octeontx2/otx2_ethdev.c|   6 -
 drivers/net/octeontx2/otx2_ethdev.h|   1 +
 drivers/net/octeontx2/otx2_tx.c|  94 
 drivers/net/octeontx2/otx2_tx.h| 261 +
 9 files changed, 373 insertions(+), 6 deletions(-)
 create mode 100644 drivers/net/octeontx2/otx2_tx.c

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 18bcf81cf..396979451 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -12,6 +12,7 @@ SR-IOV   = Y
 Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
+Fast mbuf free   = Y
 Free Tx mbuf on demand = Y
 Queue start/stop = Y
 Promiscuous mode = Y
@@ -28,6 +29,10 @@ Jumbo frame  = Y
 Scattered Rx = Y
 VLAN offload = Y
 QinQ offload = Y
+L3 checksum offload  = Y
+L4 checksum offload  = Y
+Inner L3 checksum= Y
+Inner L4 checksum= Y
 Packet type parsing  = Y
 Timesync = Y
 Timestamp offload= Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index 97a24671e..1435fd91e 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -12,6 +12,7 @@ SR-IOV   = Y
 Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
+Fast mbuf free   = Y
 Free Tx mbuf on demand = Y
 Queue start/stop = Y
 Promiscuous mode = Y
@@ -27,6 +28,10 @@ Flow API = Y
 Jumbo frame  = Y
 VLAN offload = Y
 QinQ offload = Y
+L3 checksum offload  = Y
+L4 checksum offload  = Y
+Inner L3 checksum= Y
+Inner L4 checksum= Y
 Packet type parsing  = Y
 Rx descriptor status = Y
 Basic stats  = Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index 916a6d7b0..0d5137316 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -11,6 +11,7 @@ Lock-free Tx queue   = Y
 Multiprocess aware   = Y
 Link status  = Y
 Link status event= Y
+Fast mbuf free   = Y
 Free Tx mbuf on demand = Y
 Queue start/stop = Y
 RSS hash = Y
@@ -23,6 +24,10 @@ Jumbo frame  = Y
 Scattered Rx = Y
 VLAN offload = Y
 QinQ offload = Y
+L3 checksum offload  = Y
+L4 checksum offload  = Y
+Inner L3 checksum= Y
+Inner L4 checksum= Y
 Packet type parsing  = Y
 Rx descriptor status = Y
 Basic stats  = Y
diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index 76847b2c2..102bf49d7 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -31,6 +31,7 @@ LIBABIVER := 1
 #
 SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
otx2_rx.c   \
+   otx2_tx.c   \
otx2_tm.c   \
otx2_rss.c  \
otx2_mac.c  \
diff --git a/drivers/net/octeontx2/meson.build 
b/drivers/net/octeontx2/meson.build
index 1361f1707..f9b796b5c 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -3,6 +3,7 @@
 #
 
 sources = files('otx2_rx.c',
+   'otx2_tx.c',
'otx2_tm.c',
'otx2_rss.c',
'otx2_mac.c',
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 9b55e757e..fdcab89b8 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -14,12 +14,6 @@
 
 #include "otx2_ethdev.h"
 
-static inline void
-otx2_eth_set_tx_function(struct rte_eth_dev *eth_dev)
-{
-   RTE_SET_USED(eth_dev);
-}
-
 static inline uint64_t
 nix_get_rx_offload_capa(struct otx2_eth_dev *dev)
 {
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index 3ba47f6ab..bcc351b76 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -453,6 +453,7 @@ int otx2_ethdev_parse_devargs(struct rte_devargs *devargs,
 
 /* Rx and Tx routines */
 void otx2_eth_set_rx_function(struct rte_eth_dev *eth_dev);
+void otx2_eth_set_tx_function(struct rte_eth_dev *eth_dev);
 void otx2_nix_form_default_desc(struct otx2_eth_txq *txq);
 
 /* Timesync - PTP routines */
diff --git a/drivers/net/octeontx2/otx2_tx.c b/drivers/net/octeontx2/otx2_tx.c
new file mode 100644
index 0..16d69b74f
--- /dev/null
+++ b/drivers/net/octeontx2/otx2_tx.c
@@ -0,0 +1,94 @@
+/* SPDX-License-Id

[dpdk-dev] [PATCH v1 56/58] net/octeontx2: add device stop and close operations

2019-06-02 Thread jerinj

From: Nithin Dabilpuram 

Add device stop, close and reset operations.

Signed-off-by: Nithin Dabilpuram 
Signed-off-by: Vamsi Attunuru 
---
 drivers/net/octeontx2/otx2_ethdev.c | 70 +
 1 file changed, 70 insertions(+)

diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index bdf291996..6c67cecd5 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -184,6 +184,19 @@ cgx_intlbk_enable(struct otx2_eth_dev *dev, bool en)
return otx2_mbox_process(mbox);
 }
 
+static int
+nix_cgx_stop_link_event(struct otx2_eth_dev *dev)
+{
+   struct otx2_mbox *mbox = dev->mbox;
+
+   if (otx2_dev_is_vf(dev))
+   return 0;
+
+   otx2_mbox_alloc_msg_cgx_stop_linkevents(mbox);
+
+   return otx2_mbox_process(mbox);
+}
+
 static inline void
 nix_rx_queue_reset(struct otx2_eth_rxq *rxq)
 {
@@ -1403,6 +1416,37 @@ otx2_nix_rx_queue_stop(struct rte_eth_dev *eth_dev, 
uint16_t qidx)
return rc;
 }
 
+static void
+otx2_nix_dev_stop(struct rte_eth_dev *eth_dev)
+{
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct rte_mbuf *rx_pkts[32];
+   struct otx2_eth_rxq *rxq;
+   int count, i, j, rc;
+
+   nix_cgx_stop_link_event(dev);
+   npc_rx_disable(dev);
+
+   /* Stop rx queues and free up pkts pending */
+   for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
+   rc = otx2_nix_rx_queue_stop(eth_dev, i);
+   if (rc)
+   continue;
+
+   rxq = eth_dev->data->rx_queues[i];
+   count = dev->rx_pkt_burst_no_offload(rxq, rx_pkts, 32);
+   while (count) {
+   for (j = 0; j < count; j++)
+   rte_pktmbuf_free(rx_pkts[j]);
+   count = dev->rx_pkt_burst_no_offload(rxq, rx_pkts, 32);
+   }
+   }
+
+   /* Stop tx queues  */
+   for (i = 0; i < eth_dev->data->nb_tx_queues; i++)
+   otx2_nix_tx_queue_stop(eth_dev, i);
+}
+
 static int
 otx2_nix_dev_start(struct rte_eth_dev *eth_dev)
 {
@@ -1455,6 +1499,8 @@ otx2_nix_dev_start(struct rte_eth_dev *eth_dev)
return rc;
 }
 
+static int otx2_nix_dev_reset(struct rte_eth_dev *eth_dev);
+static void otx2_nix_dev_close(struct rte_eth_dev *eth_dev);
 
 /* Initialize and register driver with DPDK Application */
 static const struct eth_dev_ops otx2_eth_dev_ops = {
@@ -1466,6 +1512,8 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.rx_queue_setup   = otx2_nix_rx_queue_setup,
.rx_queue_release = otx2_nix_rx_queue_release,
.dev_start= otx2_nix_dev_start,
+   .dev_stop = otx2_nix_dev_stop,
+   .dev_close= otx2_nix_dev_close,
.tx_queue_start   = otx2_nix_tx_queue_start,
.tx_queue_stop= otx2_nix_tx_queue_stop,
.rx_queue_start   = otx2_nix_rx_queue_start,
@@ -1473,6 +1521,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.dev_set_link_up  = otx2_nix_dev_set_link_up,
.dev_set_link_down= otx2_nix_dev_set_link_down,
.dev_supported_ptypes_get = otx2_nix_supported_ptypes_get,
+   .dev_reset= otx2_nix_dev_reset,
.stats_get= otx2_nix_dev_stats_get,
.stats_reset  = otx2_nix_dev_stats_reset,
.get_reg  = otx2_nix_dev_get_reg,
@@ -1727,6 +1776,7 @@ otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool 
mbox_close)
/* Disable nix bpid config */
otx2_nix_rxchan_bpid_cfg(eth_dev, false);
 
+   npc_rx_disable(dev);
/* Disable vlan offloads */
otx2_nix_vlan_fini(eth_dev);
 
@@ -1737,6 +1787,8 @@ otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool 
mbox_close)
if (otx2_ethdev_is_ptp_en(dev))
otx2_nix_timesync_disable(eth_dev);
 
+   nix_cgx_stop_link_event(dev);
+
/* Free up SQs */
for (i = 0; i < eth_dev->data->nb_tx_queues; i++) {
otx2_nix_tx_queue_release(eth_dev->data->tx_queues[i]);
@@ -1792,6 +1844,24 @@ otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool 
mbox_close)
return 0;
 }
 
+static void
+otx2_nix_dev_close(struct rte_eth_dev *eth_dev)
+{
+   otx2_eth_dev_uninit(eth_dev, true);
+}
+
+static int
+otx2_nix_dev_reset(struct rte_eth_dev *eth_dev)
+{
+   int rc;
+
+   rc = otx2_eth_dev_uninit(eth_dev, false);
+   if (rc)
+   return rc;
+
+   return otx2_eth_dev_init(eth_dev);
+}
+
 static int
 nix_remove(struct rte_pci_device *pci_dev)
 {
-- 
2.21.0

[dpdk-dev] [PATCH v1 58/58] doc: add Marvell OCTEON TX2 ethdev documentation

2019-06-02 Thread jerinj

From: Jerin Jacob 

Add Marvell OCTEON TX2 ethdev documentation.

This patch also updates the MAINTAINERS file and
shared library versions in release_19_08.rst.

Cc: John McNamara 
Cc: Thomas Monjalon 

Signed-off-by: Jerin Jacob 
Signed-off-by: Vamsi Attunuru 
Signed-off-by: Kiran Kumar K 
Signed-off-by: Nithin Dabilpuram 
---
 MAINTAINERS|   8 +
 doc/guides/nics/features/octeontx2.ini |   1 +
 doc/guides/nics/features/octeontx2_vec.ini |   1 +
 doc/guides/nics/features/octeontx2_vf.ini  |   1 +
 doc/guides/nics/index.rst  |   1 +
 doc/guides/nics/octeontx2.rst  | 289 +
 doc/guides/platform/octeontx2.rst  |   3 +
 doc/guides/rel_notes/release_19_05.rst |   1 +
 8 files changed, 305 insertions(+)
 create mode 100644 doc/guides/nics/octeontx2.rst

diff --git a/MAINTAINERS b/MAINTAINERS
index 74ac6d41f..fe509c1f9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -668,6 +668,14 @@ F: drivers/net/mvneta/
 F: doc/guides/nics/mvneta.rst
 F: doc/guides/nics/features/mvneta.ini
 
+Marvell OCTEON TX2
+M: Jerin Jacob 
+M: Nithin Dabilpuram 
+M: Kiran Kumar K 
+F: drivers/net/octeontx2/
+F: doc/guides/nics/features/octeontx2*.rst
+F: doc/guides/nics/octeontx2.rst
+
 Mellanox mlx4
 M: Matan Azrad 
 M: Shahaf Shuler 
diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index e96c588fa..ef1a638e9 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -44,3 +44,4 @@ Extended stats   = Y
 FW version   = Y
 Module EEPROM dump   = Y
 Registers dump   = Y
+Usage doc= Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index 7ad097df4..8f95727f7 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -41,3 +41,4 @@ Stats per queue  = Y
 FW version   = Y
 Module EEPROM dump   = Y
 Registers dump   = Y
+Usage doc= Y
diff --git a/doc/guides/nics/features/octeontx2_vf.ini 
b/doc/guides/nics/features/octeontx2_vf.ini
index 0d5137316..e78385bb2 100644
--- a/doc/guides/nics/features/octeontx2_vf.ini
+++ b/doc/guides/nics/features/octeontx2_vf.ini
@@ -36,3 +36,4 @@ Stats per queue  = Y
 FW version   = Y
 Module EEPROM dump   = Y
 Registers dump   = Y
+Usage doc= Y
diff --git a/doc/guides/nics/index.rst b/doc/guides/nics/index.rst
index 2221c35f2..6fa075594 100644
--- a/doc/guides/nics/index.rst
+++ b/doc/guides/nics/index.rst
@@ -44,6 +44,7 @@ Network Interface Controller Drivers
 nfb
 nfp
 octeontx
+octeontx2
 qede
 sfc_efx
 softnic
diff --git a/doc/guides/nics/octeontx2.rst b/doc/guides/nics/octeontx2.rst
new file mode 100644
index 0..2f14a4a1c
--- /dev/null
+++ b/doc/guides/nics/octeontx2.rst
@@ -0,0 +1,289 @@
+..  SPDX-License-Identifier: BSD-3-Clause
+Copyright(C) 2019 Marvell International Ltd.
+
+OCTEON TX2 Poll Mode driver
+===
+
+The OCTEON TX2 ETHDEV PMD (**librte_pmd_octeontx2**) provides poll mode ethdev
+driver support for the inbuilt network device found in **Marvell OCTEON TX2**
+SoC family as well as for their virtual functions (VF) in SR-IOV context.
+
+More information can be found at `Marvell Official Website
+`_.
+
+Features
+
+
+Features of the OCTEON TX2 Ethdev PMD are:
+
+- Packet type information
+- Promiscuous mode
+- Port hardware statistics
+- Jumbo frames
+- SR-IOV VF
+- Lock-free Tx queue
+- Multiple queues for TX and RX
+- Receiver Side Scaling (RSS)
+- MAC/VLAN filtering
+- Generic flow API
+- Inner and Outer Checksum offload
+- VLAN/QinQ stripping and insertion
+- Port hardware statistics
+- Link state information
+- Link flow control
+- MTU update
+- Scatter-Gather IO support
+- Vector Poll mode driver
+- Debug utilities - Context dump and error interrupt support
+- IEEE1588 timestamping
+- HW offloaded `ethdev Rx queue` to `eventdev event queue` packet injection
+
+Prerequisites
+-
+
+See :doc:`../platform/octeontx2` for setup information.
+
+Compile time Config Options
+---
+
+The following options may be modified in the ``config`` file.
+
+- ``CONFIG_RTE_LIBRTE_OCTEONTX2_PMD`` (default ``y``)
+
+  Toggle compilation of the ``librte_pmd_octeontx2`` driver.
+
+Driver compilation and testing
+--
+
+Refer to the document :ref:`compiling and testing a PMD for a NIC 
`
+for details.
+
+To compile the OCTEON TX2 PMD for Linux arm64 gcc,
+use arm64-octeontx2-linux-gcc as target.
+
+#. Running testpmd:
+
+   Follow instructions available in the document
+   :ref:`compiling and testing a PMD for a NIC `
+   to run testpmd.
+
+   Example output:
+
+   .. code-block:: console
+
+  ./build/app/testpmd -c 0x300 -w 0002:02:00.0 -- --portmask=0x1

[dpdk-dev] [PATCH v1 57/58] net/octeontx2: add MTU set operation

2019-06-02 Thread jerinj

From: Vamsi Attunuru 

Add MTU set operation and MTU update feature.

Signed-off-by: Vamsi Attunuru 
Signed-off-by: Sunil Kumar Kori 
---
 doc/guides/nics/features/octeontx2.ini |  1 +
 doc/guides/nics/features/octeontx2_vec.ini |  1 +
 drivers/net/octeontx2/otx2_ethdev.c|  7 ++
 drivers/net/octeontx2/otx2_ethdev.h|  4 ++
 drivers/net/octeontx2/otx2_ethdev_ops.c| 80 ++
 5 files changed, 93 insertions(+)

diff --git a/doc/guides/nics/features/octeontx2.ini 
b/doc/guides/nics/features/octeontx2.ini
index 396979451..e96c588fa 100644
--- a/doc/guides/nics/features/octeontx2.ini
+++ b/doc/guides/nics/features/octeontx2.ini
@@ -15,6 +15,7 @@ Link status event= Y
 Fast mbuf free   = Y
 Free Tx mbuf on demand = Y
 Queue start/stop = Y
+MTU update   = Y
 Promiscuous mode = Y
 Allmulticast mode= Y
 Unicast MAC filter   = Y
diff --git a/doc/guides/nics/features/octeontx2_vec.ini 
b/doc/guides/nics/features/octeontx2_vec.ini
index 1435fd91e..7ad097df4 100644
--- a/doc/guides/nics/features/octeontx2_vec.ini
+++ b/doc/guides/nics/features/octeontx2_vec.ini
@@ -15,6 +15,7 @@ Link status event= Y
 Fast mbuf free   = Y
 Free Tx mbuf on demand = Y
 Queue start/stop = Y
+MTU update   = Y
 Promiscuous mode = Y
 Allmulticast mode= Y
 Unicast MAC filter   = Y
diff --git a/drivers/net/octeontx2/otx2_ethdev.c 
b/drivers/net/octeontx2/otx2_ethdev.c
index 6c67cecd5..ddd924ce8 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1453,6 +1453,12 @@ otx2_nix_dev_start(struct rte_eth_dev *eth_dev)
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
int rc, i;
 
+   if (eth_dev->data->nb_rx_queues != 0) {
+   rc = otx2_nix_recalc_mtu(eth_dev);
+   if (rc)
+   return rc;
+   }
+
/* Start rx queues */
for (i = 0; i < eth_dev->data->nb_rx_queues; i++) {
rc = otx2_nix_rx_queue_start(eth_dev, i);
@@ -1525,6 +1531,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
.stats_get= otx2_nix_dev_stats_get,
.stats_reset  = otx2_nix_dev_stats_reset,
.get_reg  = otx2_nix_dev_get_reg,
+   .mtu_set  = otx2_nix_mtu_set,
.mac_addr_add = otx2_nix_mac_addr_add,
.mac_addr_remove  = otx2_nix_mac_addr_del,
.mac_addr_set = otx2_nix_mac_addr_set,
diff --git a/drivers/net/octeontx2/otx2_ethdev.h 
b/drivers/net/octeontx2/otx2_ethdev.h
index dff4de250..862a1ccbb 100644
--- a/drivers/net/octeontx2/otx2_ethdev.h
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -351,6 +351,10 @@ int otx2_nix_tx_queue_start(struct rte_eth_dev *eth_dev, 
uint16_t qidx);
 int otx2_nix_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t qidx);
 uint64_t otx2_nix_rxq_mbuf_setup(struct otx2_eth_dev *dev, uint16_t port_id);
 
+/* MTU */
+int otx2_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu);
+int otx2_nix_recalc_mtu(struct rte_eth_dev *eth_dev);
+
 /* Link */
 void otx2_nix_toggle_flag_link_cfg(struct otx2_eth_dev *dev, bool set);
 int otx2_nix_link_update(struct rte_eth_dev *eth_dev, int wait_to_complete);
diff --git a/drivers/net/octeontx2/otx2_ethdev_ops.c 
b/drivers/net/octeontx2/otx2_ethdev_ops.c
index d2cb5ba1c..e8959e179 100644
--- a/drivers/net/octeontx2/otx2_ethdev_ops.c
+++ b/drivers/net/octeontx2/otx2_ethdev_ops.c
@@ -6,6 +6,86 @@
 
 #include "otx2_ethdev.h"
 
+int
+otx2_nix_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
+{
+   uint32_t buffsz, frame_size = mtu + NIX_HW_L2_OVERHEAD;
+   struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
+   struct rte_eth_dev_data *data = eth_dev->data;
+   struct otx2_mbox *mbox = dev->mbox;
+   struct nix_frs_cfg *req;
+   int rc;
+
+   /* Check if MTU is within the allowed range */
+   if (frame_size < NIX_MIN_HW_FRS || frame_size > NIX_MAX_HW_FRS)
+   return -EINVAL;
+
+   buffsz = data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
+
+   /* Refuse MTU that requires the support of scattered packets
+* when this feature has not been enabled before.
+*/
+   if (data->dev_started && frame_size > buffsz &&
+   !(dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER))
+   return -EINVAL;
+
+   /* Check  *   >= max_frame */
+   if ((dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER) &&
+   (frame_size > buffsz * NIX_RX_NB_SEG_MAX))
+   return -EINVAL;
+
+   req = otx2_mbox_alloc_msg_nix_set_hw_frs(mbox);
+   req->update_smq = true;
+   req->maxlen = frame_size;
+
+   rc = otx2_mbox_process(mbox);
+   if (rc)
+   return rc;
+
+   if (frame_size > RTE_ETHER_MAX_LEN)
+   dev->rx_offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
+   else
+   dev->rx_offloads &= ~DEV_RX_OFFLOAD_JUMBO_FRAME;
+
+   /* Upda

[dpdk-dev] [PATCH] eal: remove non-thread panic calls from init sequence

2019-06-02 Thread Arnon Warshavsky

This patch changes some void functions to return a value,
so that the init sequence may tear down orderly
instead of calling panic.
The calls for launching core messaging threads were left in tact
in all 3 eal implementations.
This should be addressed in a different patchset.
There are still cases where the PMDs or message threads
may call panic with no context for the user.
For these I will submit a patch suggesting a callback registration,
allowing the user to register a context to be called
in case of a panic that takes place outside the init sequence.

Signed-off-by: Arnon Warshavsky 
---
 lib/librte_eal/freebsd/eal/eal.c | 57 ++---
 lib/librte_eal/linux/eal/eal.c   | 89 
 2 files changed, 104 insertions(+), 42 deletions(-)

diff --git a/lib/librte_eal/freebsd/eal/eal.c b/lib/librte_eal/freebsd/eal/eal.c
index c6ac902..13fe4e6 100644
--- a/lib/librte_eal/freebsd/eal/eal.c
+++ b/lib/librte_eal/freebsd/eal/eal.c
@@ -215,7 +215,7 @@ enum rte_iova_mode
  * We also don't lock the whole file, so that in future we can use read-locks
  * on other parts, e.g. memzones, to detect if there are running secondary
  * processes. */
-static void
+static int
 rte_eal_config_create(void)
 {
void *rte_mem_cfg_addr;
@@ -228,56 +228,73 @@ enum rte_iova_mode
 
if (mem_cfg_fd < 0){
mem_cfg_fd = open(pathname, O_RDWR | O_CREAT, 0600);
-   if (mem_cfg_fd < 0)
-   rte_panic("Cannot open '%s' for rte_mem_config\n", 
pathname);
+   if (mem_cfg_fd < 0) {
+   RTE_LOG(ERR, EAL, "Cannot open '%s' for 
rte_mem_config\n",
+   pathname);
+   return -1;
+   }
}
 
retval = ftruncate(mem_cfg_fd, sizeof(*rte_config.mem_config));
if (retval < 0){
close(mem_cfg_fd);
-   rte_panic("Cannot resize '%s' for rte_mem_config\n", pathname);
+   RTE_LOG(ERR, EAL, "Cannot resize '%s' for rte_mem_config\n",
+   pathname);
+   return -1;
}
 
retval = fcntl(mem_cfg_fd, F_SETLK, &wr_lock);
if (retval < 0){
close(mem_cfg_fd);
-   rte_exit(EXIT_FAILURE, "Cannot create lock on '%s'. Is another 
primary "
+   RTE_LOG(ERR, EAL, "Cannot create lock on '%s'. Is another 
primary ",
"process running?\n", pathname);
+   return -1;
}
 
rte_mem_cfg_addr = mmap(NULL, sizeof(*rte_config.mem_config),
PROT_READ | PROT_WRITE, MAP_SHARED, mem_cfg_fd, 
0);
 
if (rte_mem_cfg_addr == MAP_FAILED){
-   rte_panic("Cannot mmap memory for rte_config\n");
+   RTE_LOG(ERR, EAL, "Cannot mmap memory for rte_config\n");
+   return -1;
}
memcpy(rte_mem_cfg_addr, &early_mem_config, sizeof(early_mem_config));
rte_config.mem_config = rte_mem_cfg_addr;
+
+   return 0;
 }
 
 /* attach to an existing shared memory config */
-static void
+static int
 rte_eal_config_attach(void)
 {
void *rte_mem_cfg_addr;
const char *pathname = eal_runtime_config_path();
 
if (internal_config.no_shconf)
-   return;
+   return 0;
 
if (mem_cfg_fd < 0){
mem_cfg_fd = open(pathname, O_RDWR);
-   if (mem_cfg_fd < 0)
-   rte_panic("Cannot open '%s' for rte_mem_config\n", 
pathname);
+   if (mem_cfg_fd < 0) {
+   RTE_LOG(ERR, EAL, "Cannot open '%s' for 
rte_mem_config\n",
+   pathname);
+   return -1;
+   }
}
 
rte_mem_cfg_addr = mmap(NULL, sizeof(*rte_config.mem_config),
PROT_READ | PROT_WRITE, MAP_SHARED, mem_cfg_fd, 
0);
close(mem_cfg_fd);
-   if (rte_mem_cfg_addr == MAP_FAILED)
-   rte_panic("Cannot mmap memory for rte_config\n");
+   if (mem_config == MAP_FAILED) {
+   RTE_LOG(ERR, EAL, "Cannot mmap memory for rte_config! error %i 
(%s)\n",
+   errno, strerror(errno));
+   return -1;
+   }
 
rte_config.mem_config = rte_mem_cfg_addr;
+
+   return 0;
 }
 
 /* Detect if we are a primary or a secondary process */
@@ -313,16 +330,26 @@ enum rte_proc_type_t
 
switch (rte_config.process_type){
case RTE_PROC_PRIMARY:
-   rte_eal_config_create();
+   if (rte_eal_config_create() < 0) {
+   RTE_LOG(ERR, EAL, "Failed to create config\n");
+   return -1;
+   }
break;
case RTE_PROC_SECONDARY:
-   rte_eal_config_attach();
+   if (rte_eal_config_attach() < 0) {
+   RTE_LOG(ERR, EAL, "F

[dpdk-dev] [PATCH 00/11] add support for BCM57508 controller

2019-06-02 Thread Lance Richardson

NOTE: This patch series has dependencies on the "bnxt patchset"
series that is currently under review.

This patch series adds  support to the bnxt PMD for the
BCM57508 Ethernet controller (a.k.a the "Thor" controller).

Patches 1-5 include cleanups and bug fixes for the existing driver.

Patch 6 adds support for "extended" HWRM requests. Extended
HWRM requests are larger in size and use indirection to a
buffer in host memory.

Patch 7 refactors doorbell handling in preparation for 
the doorbell protocol used for Thor.
Patch 8 refactors descriptor ring allocation in preparation
for thor, which requires an additional "notification queue"
ring to be associated with transmit/receive completion rings.

Patch 9 contains the core of the changes needed to support the
thor controller.

Patch 10 adds thor-specific completion coalescing configuration.

Patch 11 adds thor-specific support for RSS.

Lance Richardson (11):
  net/bnxt: endianness conversions in cp ring macros
  net/bnxt: fix ring type macro name usage
  net/bnxt: fix width in stats ctx endian conversion
  net/bnxt: use consistent values for vnic RSS rule
  net/bnxt: reset function earlier in initialization
  net/bnxt: support extended hwrm request sizes
  net/bnxt: refactor doorbell handling
  net/bnxt: refactor ring allocation code
  net/bnxt: add support for thor controller
  net/bnxt: enable completion coalescing for thor
  net/bnxt: enable RSS for thor-based controllers

 drivers/net/bnxt/bnxt.h  |  99 +++-
 drivers/net/bnxt/bnxt_cpr.h  |  44 +-
 drivers/net/bnxt/bnxt_ethdev.c   | 396 ++--
 drivers/net/bnxt/bnxt_hwrm.c | 683 +++
 drivers/net/bnxt/bnxt_hwrm.h |  16 +-
 drivers/net/bnxt/bnxt_irq.c  |   4 +-
 drivers/net/bnxt/bnxt_ring.c | 350 ++
 drivers/net/bnxt/bnxt_ring.h |  33 ++
 drivers/net/bnxt/bnxt_rxq.c  |  16 +-
 drivers/net/bnxt/bnxt_rxq.h  |   1 +
 drivers/net/bnxt/bnxt_rxr.c  |  37 +-
 drivers/net/bnxt/bnxt_rxr.h  |   4 +-
 drivers/net/bnxt/bnxt_rxtx_vec_sse.c |   8 +-
 drivers/net/bnxt/bnxt_txq.c  |   2 +-
 drivers/net/bnxt/bnxt_txq.h  |   1 +
 drivers/net/bnxt/bnxt_txr.c  |  29 +-
 drivers/net/bnxt/bnxt_txr.h  |   2 +-
 drivers/net/bnxt/bnxt_vnic.c |  15 +-
 drivers/net/bnxt/bnxt_vnic.h |   1 +
 19 files changed, 1474 insertions(+), 267 deletions(-)

-- 
2.17.1

[dpdk-dev] [PATCH 04/11] net/bnxt: use consistent values for vnic RSS rule

2019-06-02 Thread Lance Richardson

Use consistent values for vnic->rss_rule. No functional change,
these all equate to uint16_t 0x.

Signed-off-by: Lance Richardson 
Reviewed-by: Ajit Kumar Khaparde 
---
 drivers/net/bnxt/bnxt_hwrm.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index e88719d06..7cad3cb4c 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -1429,7 +1429,7 @@ int bnxt_hwrm_vnic_cfg(struct bnxt *bp, struct 
bnxt_vnic_info *vnic)
ctx_enable_flag |= HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE;
if (vnic->cos_rule != 0x)
ctx_enable_flag |= HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE;
-   if (vnic->rss_rule != 0x) {
+   if (vnic->rss_rule != (uint16_t)HWRM_NA_SIGNATURE) {
ctx_enable_flag |= HWRM_VNIC_CFG_INPUT_ENABLES_MRU;
ctx_enable_flag |= HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE;
}
@@ -1544,7 +1544,7 @@ int bnxt_hwrm_vnic_ctx_free(struct bnxt *bp, struct 
bnxt_vnic_info *vnic)
struct hwrm_vnic_rss_cos_lb_ctx_free_output *resp =
bp->hwrm_cmd_resp_addr;
 
-   if (vnic->rss_rule == 0x) {
+   if (vnic->rss_rule == (uint16_t)HWRM_NA_SIGNATURE) {
PMD_DRV_LOG(DEBUG, "VNIC RSS Rule %x\n", vnic->rss_rule);
return rc;
}
@@ -1557,7 +1557,7 @@ int bnxt_hwrm_vnic_ctx_free(struct bnxt *bp, struct 
bnxt_vnic_info *vnic)
HWRM_CHECK_RESULT();
HWRM_UNLOCK();
 
-   vnic->rss_rule = INVALID_HW_RING_ID;
+   vnic->rss_rule = (uint16_t)HWRM_NA_SIGNATURE;
 
return rc;
 }
-- 
2.17.1

[dpdk-dev] [PATCH 01/11] net/bnxt: endianness conversions in cp ring macros

2019-06-02 Thread Lance Richardson

Descriptor fields in CP ring are in little-endian form, convert
to CPU endian before performing arithmetic operations.

Also use more general comparison when checking for ring
index wrap.

Fixes: f2a768d4d186 ("net/bnxt: add completion ring")
Cc: sta...@dpdk.org
Signed-off-by: Lance Richardson 
Reviewed-by: Ajit Kumar Khaparde 
---
 drivers/net/bnxt/bnxt_cpr.h | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/net/bnxt/bnxt_cpr.h b/drivers/net/bnxt/bnxt_cpr.h
index c7af56983..ee5ca820e 100644
--- a/drivers/net/bnxt/bnxt_cpr.h
+++ b/drivers/net/bnxt/bnxt_cpr.h
@@ -10,11 +10,12 @@
 #include 
 
 #define CMP_VALID(cmp, raw_cons, ring) \
-   (!!(((struct cmpl_base *)(cmp))->info3_v & CMPL_BASE_V) ==  \
-!((raw_cons) & ((ring)->ring_size)))
+   (!!(rte_le_to_cpu_32(((struct cmpl_base *)(cmp))->info3_v) &\
+   CMPL_BASE_V) == !((raw_cons) & ((ring)->ring_size)))
 
 #define CMPL_VALID(cmp, v) \
-   (!!(((struct cmpl_base *)(cmp))->info3_v & CMPL_BASE_V) == !(v))
+   (!!(rte_le_to_cpu_32(((struct cmpl_base *)(cmp))->info3_v) &\
+   CMPL_BASE_V) == !(v))
 
 #define CMP_TYPE(cmp)  \
(((struct cmpl_base *)cmp)->type & CMPL_BASE_TYPE_MASK)
@@ -31,7 +32,7 @@
 
 #define NEXT_CMPL(cpr, idx, v, inc)do { \
(idx) += (inc); \
-   if (unlikely((idx) == (cpr)->cp_ring_struct->ring_size)) { \
+   if (unlikely((idx) >= (cpr)->cp_ring_struct->ring_size)) { \
(v) = !(v); \
(idx) = 0; \
} \
-- 
2.17.1

[dpdk-dev] [PATCH 02/11] net/bnxt: fix ring type macro name usage

2019-06-02 Thread Lance Richardson

Use consistent macro names for ring type values. (There is no
functional change, the "alloc" and "free" values are identical.)

Fixes: 6371b91fb66d ("net/bnxt: add ring alloc/free")
Cc: sta...@dpdk.org
Signed-off-by: Lance Richardson 
Reviewed-by: Ajit Kumar Khaparde 
---
 drivers/net/bnxt/bnxt_hwrm.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index 0c6af1622..8db18ea61 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -1136,17 +1136,17 @@ int bnxt_hwrm_ring_alloc(struct bnxt *bp,
if (rc == 0 && resp->error_code)
rc = rte_le_to_cpu_16(resp->error_code);
switch (ring_type) {
-   case HWRM_RING_FREE_INPUT_RING_TYPE_L2_CMPL:
+   case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
PMD_DRV_LOG(ERR,
"hwrm_ring_alloc cp failed. rc:%d\n", rc);
HWRM_UNLOCK();
return rc;
-   case HWRM_RING_FREE_INPUT_RING_TYPE_RX:
+   case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
PMD_DRV_LOG(ERR,
"hwrm_ring_alloc rx failed. rc:%d\n", rc);
HWRM_UNLOCK();
return rc;
-   case HWRM_RING_FREE_INPUT_RING_TYPE_TX:
+   case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
PMD_DRV_LOG(ERR,
"hwrm_ring_alloc tx failed. rc:%d\n", rc);
HWRM_UNLOCK();
-- 
2.17.1

[dpdk-dev] [PATCH 05/11] net/bnxt: reset function earlier in initialization

2019-06-02 Thread Lance Richardson

Move function reset to beginnng of initialization sequence.

Signed-off-by: Lance Richardson 
Reviewed-by: Ajit Kumar Khaparde 
---
 drivers/net/bnxt/bnxt_ethdev.c | 14 --
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index 30dff72a6..070262468 100644
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -3484,6 +3484,14 @@ bnxt_dev_init(struct rte_eth_dev *eth_dev)
rc = bnxt_hwrm_ver_get(bp);
if (rc)
goto error_free;
+
+   rc = bnxt_hwrm_func_reset(bp);
+   if (rc) {
+   PMD_DRV_LOG(ERR, "hwrm chip reset failure rc: %x\n", rc);
+   rc = -EIO;
+   goto error_free;
+   }
+
rc = bnxt_hwrm_queue_qportcfg(bp);
if (rc) {
PMD_DRV_LOG(ERR, "hwrm queue qportcfg failed\n");
@@ -3584,12 +3592,6 @@ bnxt_dev_init(struct rte_eth_dev *eth_dev)
pci_dev->mem_resource[0].phys_addr,
pci_dev->mem_resource[0].addr);
 
-   rc = bnxt_hwrm_func_reset(bp);
-   if (rc) {
-   PMD_DRV_LOG(ERR, "hwrm chip reset failure rc: %x\n", rc);
-   rc = -EIO;
-   goto error_free;
-   }
 
if (BNXT_PF(bp)) {
//if (bp->pf.active_vfs) {
-- 
2.17.1

[dpdk-dev] [PATCH 07/11] net/bnxt: refactor doorbell handling

2019-06-02 Thread Lance Richardson

Reduce code duplication and prepare for newer controllers that
use different doorbell protocols by refactoring doorbell handling
code.

Signed-off-by: Lance Richardson 
Reviewed-by: Ajit Kumar Khaparde 
---
 drivers/net/bnxt/bnxt_cpr.h  |  27 --
 drivers/net/bnxt/bnxt_irq.c  |   4 +-
 drivers/net/bnxt/bnxt_ring.c | 132 +++
 drivers/net/bnxt/bnxt_ring.h |  11 +++
 drivers/net/bnxt/bnxt_rxr.c  |  10 +-
 drivers/net/bnxt/bnxt_rxr.h  |   4 +-
 drivers/net/bnxt/bnxt_rxtx_vec_sse.c |   8 +-
 drivers/net/bnxt/bnxt_txr.c  |   4 +-
 drivers/net/bnxt/bnxt_txr.h  |   2 +-
 9 files changed, 118 insertions(+), 84 deletions(-)

diff --git a/drivers/net/bnxt/bnxt_cpr.h b/drivers/net/bnxt/bnxt_cpr.h
index ee5ca820e..77a22d241 100644
--- a/drivers/net/bnxt/bnxt_cpr.h
+++ b/drivers/net/bnxt/bnxt_cpr.h
@@ -9,6 +9,8 @@
 
 #include 
 
+struct bnxt_db_info;
+
 #define CMP_VALID(cmp, raw_cons, ring) \
(!!(rte_le_to_cpu_32(((struct cmpl_base *)(cmp))->info3_v) &\
CMPL_BASE_V) == !((raw_cons) & ((ring)->ring_size)))
@@ -40,37 +42,44 @@
 #define B_CP_DB_REARM(cpr, raw_cons)   \
rte_write32((DB_CP_REARM_FLAGS |\
RING_CMP(((cpr)->cp_ring_struct), raw_cons)),   \
-   ((cpr)->cp_doorbell))
+   ((cpr)->cp_db.doorbell))
+
+#define B_CP_DB_ARM(cpr)   rte_write32((DB_KEY_CP),\
+   ((cpr)->cp_db.doorbell))
 
-#define B_CP_DB_ARM(cpr)   rte_write32((DB_KEY_CP), ((cpr)->cp_doorbell))
-#define B_CP_DB_DISARM(cpr)(*(uint32_t *)((cpr)->cp_doorbell) = \
+#define B_CP_DB_DISARM(cpr)(*(uint32_t *)((cpr)->cp_db.doorbell) = \
 DB_KEY_CP | DB_IRQ_DIS)
 
 #define B_CP_DB_IDX_ARM(cpr, cons) \
-   (*(uint32_t *)((cpr)->cp_doorbell) = (DB_CP_REARM_FLAGS | \
+   (*(uint32_t *)((cpr)->cp_db.doorbell) = (DB_CP_REARM_FLAGS | \
(cons)))
 
 #define B_CP_DB_IDX_DISARM(cpr, cons)  do {\
rte_smp_wmb();  \
-   (*(uint32_t *)((cpr)->cp_doorbell) = (DB_CP_FLAGS | \
+   (*(uint32_t *)((cpr)->cp_db.doorbell) = (DB_CP_FLAGS |  \
(cons));\
 } while (0)
 #define B_CP_DIS_DB(cpr, raw_cons) \
rte_write32((DB_CP_FLAGS |  \
RING_CMP(((cpr)->cp_ring_struct), raw_cons)),   \
-   ((cpr)->cp_doorbell))
+   ((cpr)->cp_db.doorbell))
+
 #define B_CP_DB(cpr, raw_cons, ring_mask)  \
rte_write32((DB_CP_FLAGS |  \
RING_CMPL((ring_mask), raw_cons)),  \
-   ((cpr)->cp_doorbell))
+   ((cpr)->cp_db.doorbell))
+
+struct bnxt_db_info {
+   void*doorbell;
+   uint32_tdb_key32;
+};
 
 struct bnxt_ring;
 struct bnxt_cp_ring_info {
uint32_tcp_raw_cons;
-   void*cp_doorbell;
 
struct cmpl_base*cp_desc_ring;
-
+   struct bnxt_db_info cp_db;
rte_iova_t  cp_desc_mapping;
 
struct ctx_hw_stats *hw_stats;
diff --git a/drivers/net/bnxt/bnxt_irq.c b/drivers/net/bnxt/bnxt_irq.c
index 7ef7023eb..9f3c166a6 100644
--- a/drivers/net/bnxt/bnxt_irq.c
+++ b/drivers/net/bnxt/bnxt_irq.c
@@ -71,7 +71,7 @@ void bnxt_disable_int(struct bnxt *bp)
struct bnxt_cp_ring_info *cpr = bp->def_cp_ring;
 
/* Only the default completion ring */
-   if (cpr != NULL && cpr->cp_doorbell != NULL)
+   if (cpr != NULL && cpr->cp_db.doorbell != NULL)
B_CP_DB_DISARM(cpr);
 }
 
@@ -80,7 +80,7 @@ void bnxt_enable_int(struct bnxt *bp)
struct bnxt_cp_ring_info *cpr = bp->def_cp_ring;
 
/* Only the default completion ring */
-   if (cpr != NULL && cpr->cp_doorbell != NULL)
+   if (cpr != NULL && cpr->cp_db.doorbell != NULL)
B_CP_DB_ARM(cpr);
 }
 
diff --git a/drivers/net/bnxt/bnxt_ring.c b/drivers/net/bnxt/bnxt_ring.c
index 51fe35f3e..15d418977 100644
--- a/drivers/net/bnxt/bnxt_ring.c
+++ b/drivers/net/bnxt/bnxt_ring.c
@@ -276,31 +276,48 @@ static void bnxt_init_dflt_coal(struct bnxt_coal *coal)
coal->cmpl_aggr_dma_tmr_during_int = BNXT_CMPL_AGGR_DMA_TMR_DURING_INT;
 }
 
+static void bnxt_set_db(struct bnxt *bp,
+   struct bnxt_db_info *db,
+   uint32_t ring_type,
+   uint32_t map_idx)
+{
+   db->doorbell = (char *)bp->doorbell_base + map_idx * 0x80;
+   switch (ring

[dpdk-dev] [PATCH 06/11] net/bnxt: support extended hwrm request sizes

2019-06-02 Thread Lance Richardson

Enable support for extended request sizes.

Signed-off-by: Lance Richardson 
Reviewed-by: Ajit Kumar Khaparde 
---
 drivers/net/bnxt/bnxt.h  |  1 +
 drivers/net/bnxt/bnxt_hwrm.c | 31 ++-
 2 files changed, 23 insertions(+), 9 deletions(-)

diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h
index caacc7258..9bb8d825d 100644
--- a/drivers/net/bnxt/bnxt.h
+++ b/drivers/net/bnxt/bnxt.h
@@ -320,6 +320,7 @@ struct bnxt {
rte_spinlock_t  hwrm_lock;
uint16_tmax_req_len;
uint16_tmax_resp_len;
+   uint16_thwrm_max_ext_req_len;
 
struct bnxt_link_info   link_info;
struct bnxt_cos_queue_info  cos_queue[BNXT_COS_QUEUE_COUNT];
diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index 7cad3cb4c..45d37f176 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -85,10 +85,11 @@ static int bnxt_hwrm_send_message(struct bnxt *bp, void 
*msg,
uint16_t mb_trigger_offset = use_kong_mb ?
GRCPF_REG_KONG_COMM_TRIGGER : GRCPF_REG_CHIMP_COMM_TRIGGER;
 
-   if (bp->flags & BNXT_FLAG_SHORT_CMD) {
+   if (bp->flags & BNXT_FLAG_SHORT_CMD ||
+   msg_len > bp->max_req_len) {
void *short_cmd_req = bp->hwrm_short_cmd_req_addr;
 
-   memset(short_cmd_req, 0, bp->max_req_len);
+   memset(short_cmd_req, 0, bp->hwrm_max_ext_req_len);
memcpy(short_cmd_req, req, msg_len);
 
short_input.req_type = rte_cpu_to_le_16(req->req_type);
@@ -128,8 +129,7 @@ static int bnxt_hwrm_send_message(struct bnxt *bp, void 
*msg,
for (i = 0; i < HWRM_CMD_TIMEOUT; i++) {
/* Sanity check on the resp->resp_len */
rte_rmb();
-   if (resp->resp_len && resp->resp_len <=
-   bp->max_resp_len) {
+   if (resp->resp_len && resp->resp_len <= bp->max_resp_len) {
/* Last byte of resp contains the valid key */
valid = (uint8_t *)resp + resp->resp_len - 1;
if (*valid == HWRM_RESP_VALID_KEY)
@@ -832,7 +832,11 @@ int bnxt_hwrm_ver_get(struct bnxt *bp)
rc = -EINVAL;
}
bp->max_req_len = rte_le_to_cpu_16(resp->max_req_win_len);
-   max_resp_len = resp->max_resp_len;
+   bp->hwrm_max_ext_req_len = rte_le_to_cpu_16(resp->max_ext_req_len);
+   if (bp->hwrm_max_ext_req_len < HWRM_MAX_REQ_LEN)
+   bp->hwrm_max_ext_req_len = HWRM_MAX_REQ_LEN;
+
+   max_resp_len = rte_le_to_cpu_16(resp->max_resp_len);
dev_caps_cfg = rte_le_to_cpu_32(resp->dev_caps_cfg);
 
if (bp->max_resp_len != max_resp_len) {
@@ -864,11 +868,22 @@ int bnxt_hwrm_ver_get(struct bnxt *bp)
(dev_caps_cfg &
 HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_REQUIRED)) {
PMD_DRV_LOG(DEBUG, "Short command supported\n");
+   bp->flags |= BNXT_FLAG_SHORT_CMD;
+   }
+
+   if (((dev_caps_cfg &
+ HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_SUPPORTED) &&
+(dev_caps_cfg &
+ HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_REQUIRED)) ||
+   bp->hwrm_max_ext_req_len > HWRM_MAX_REQ_LEN) {
+   sprintf(type, "bnxt_hwrm_short_%04x:%02x:%02x:%02x",
+   bp->pdev->addr.domain, bp->pdev->addr.bus,
+   bp->pdev->addr.devid, bp->pdev->addr.function);
 
rte_free(bp->hwrm_short_cmd_req_addr);
 
-   bp->hwrm_short_cmd_req_addr = rte_malloc(type,
-   bp->max_req_len, 0);
+   bp->hwrm_short_cmd_req_addr =
+   rte_malloc(type, bp->hwrm_max_ext_req_len, 0);
if (bp->hwrm_short_cmd_req_addr == NULL) {
rc = -ENOMEM;
goto error;
@@ -883,8 +898,6 @@ int bnxt_hwrm_ver_get(struct bnxt *bp)
rc = -ENOMEM;
goto error;
}
-
-   bp->flags |= BNXT_FLAG_SHORT_CMD;
}
if (dev_caps_cfg &
HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_KONG_MB_CHNL_SUPPORTED) {
-- 
2.17.1

[dpdk-dev] [PATCH 03/11] net/bnxt: fix width in stats ctx endian conversion

2019-06-02 Thread Lance Richardson

Use 32-bit conversion width when converting to 32-bit
values.

Fixes: 6371b91fb66d ("net/bnxt: add ring alloc/free")
Cc: sta...@dpdk.org

Signed-off-by: Lance Richardson 
Reviewed-by: Ajit Kumar Khaparde 
---
 drivers/net/bnxt/bnxt_hwrm.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index 8db18ea61..e88719d06 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -1109,7 +1109,7 @@ int bnxt_hwrm_ring_alloc(struct bnxt *bp,
case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
req.ring_type = ring_type;
req.cmpl_ring_id = rte_cpu_to_le_16(cmpl_ring_id);
-   req.stat_ctx_id = rte_cpu_to_le_16(stats_ctx_id);
+   req.stat_ctx_id = rte_cpu_to_le_32(stats_ctx_id);
if (stats_ctx_id != INVALID_STATS_CTX_ID)
enables |=
HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID;
@@ -1259,7 +1259,7 @@ int bnxt_hwrm_stat_clear(struct bnxt *bp, struct 
bnxt_cp_ring_info *cpr)
 
HWRM_PREP(req, STAT_CTX_CLR_STATS, BNXT_USE_CHIMP_MB);
 
-   req.stat_ctx_id = rte_cpu_to_le_16(cpr->hw_stats_ctx_id);
+   req.stat_ctx_id = rte_cpu_to_le_32(cpr->hw_stats_ctx_id);
 
rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);
 
@@ -1287,7 +1287,7 @@ int bnxt_hwrm_stat_ctx_alloc(struct bnxt *bp, struct 
bnxt_cp_ring_info *cpr,
 
HWRM_CHECK_RESULT();
 
-   cpr->hw_stats_ctx_id = rte_le_to_cpu_16(resp->stat_ctx_id);
+   cpr->hw_stats_ctx_id = rte_le_to_cpu_32(resp->stat_ctx_id);
 
HWRM_UNLOCK();
 
@@ -1303,7 +1303,7 @@ int bnxt_hwrm_stat_ctx_free(struct bnxt *bp, struct 
bnxt_cp_ring_info *cpr,
 
HWRM_PREP(req, STAT_CTX_FREE, BNXT_USE_CHIMP_MB);
 
-   req.stat_ctx_id = rte_cpu_to_le_16(cpr->hw_stats_ctx_id);
+   req.stat_ctx_id = rte_cpu_to_le_32(cpr->hw_stats_ctx_id);
 
rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);
 
-- 
2.17.1

[dpdk-dev] [PATCH 09/11] net/bnxt: add support for thor controller

2019-06-02 Thread Lance Richardson

This commit adds support to the bnxt PMD for devices
based on the BCM57508 "thor" Ethernet controller.

Signed-off-by: Ajit Kumar Khaparde 
Signed-off-by: Kalesh AP 
Signed-off-by: Lance Richardson 
---
 drivers/net/bnxt/bnxt.h|  98 +++-
 drivers/net/bnxt/bnxt_cpr.h|  12 +-
 drivers/net/bnxt/bnxt_ethdev.c | 323 +++---
 drivers/net/bnxt/bnxt_hwrm.c   | 404 ++---
 drivers/net/bnxt/bnxt_hwrm.h   |  10 +
 drivers/net/bnxt/bnxt_ring.c   | 183 ---
 drivers/net/bnxt/bnxt_ring.h   |  26 ++-
 drivers/net/bnxt/bnxt_rxq.c|  16 +-
 drivers/net/bnxt/bnxt_rxq.h|   1 +
 drivers/net/bnxt/bnxt_rxr.c|  27 +++
 drivers/net/bnxt/bnxt_txq.c|   2 +-
 drivers/net/bnxt/bnxt_txq.h|   1 +
 drivers/net/bnxt/bnxt_txr.c|  25 ++
 13 files changed, 1028 insertions(+), 100 deletions(-)

diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h
index 9bb8d825d..641790fef 100644
--- a/drivers/net/bnxt/bnxt.h
+++ b/drivers/net/bnxt/bnxt.h
@@ -239,6 +239,93 @@ struct bnxt_coal {
uint16_tcmpl_aggr_dma_tmr_during_int;
 };
 
+/* 64-bit doorbell */
+#define DBR_XID_SFT32
+#define DBR_PATH_L2(0x1ULL << 56)
+#define DBR_TYPE_SQ(0x0ULL << 60)
+#define DBR_TYPE_SRQ   (0x2ULL << 60)
+#define DBR_TYPE_CQ(0x4ULL << 60)
+#define DBR_TYPE_NQ(0xaULL << 60)
+
+#define BNXT_RSS_TBL_SIZE_THOR 512
+#define BNXT_RSS_ENTRIES_PER_CTX_THOR  64
+#define BNXT_MAX_RSS_CTXTS_THOR \
+   (BNXT_RSS_TBL_SIZE_THOR / BNXT_RSS_ENTRIES_PER_CTX_THOR)
+
+#define BNXT_MAX_TC8
+#define BNXT_MAX_QUEUE 8
+#define BNXT_MAX_TC_Q  (BNXT_MAX_TC + 1)
+#define BNXT_MAX_Q (bp->max_q + 1)
+#define BNXT_PAGE_SHFT 12
+#define BNXT_PAGE_SIZE (1 << BNXT_PAGE_SHFT)
+#define MAX_CTX_PAGES  (BNXT_PAGE_SIZE / 8)
+
+#define PTU_PTE_VALID 0x1UL
+#define PTU_PTE_LAST  0x2UL
+#define PTU_PTE_NEXT_TO_LAST  0x4UL
+
+struct bnxt_ring_mem_info {
+   int nr_pages;
+   int page_size;
+   uint32_tflags;
+#define BNXT_RMEM_VALID_PTE_FLAG   1
+#define BNXT_RMEM_RING_PTE_FLAG2
+
+   void**pg_arr;
+   rte_iova_t  *dma_arr;
+   const struct rte_memzone*mz;
+
+   uint64_t*pg_tbl;
+   rte_iova_t  pg_tbl_map;
+   const struct rte_memzone*pg_tbl_mz;
+
+   int vmem_size;
+   void**vmem;
+};
+
+struct bnxt_ctx_pg_info {
+   uint32_tentries;
+   void*ctx_pg_arr[MAX_CTX_PAGES];
+   rte_iova_t  ctx_dma_arr[MAX_CTX_PAGES];
+   struct bnxt_ring_mem_info ring_mem;
+};
+
+struct bnxt_ctx_mem_info {
+   uint32_tqp_max_entries;
+   uint16_tqp_min_qp1_entries;
+   uint16_tqp_max_l2_entries;
+   uint16_tqp_entry_size;
+   uint16_tsrq_max_l2_entries;
+   uint32_tsrq_max_entries;
+   uint16_tsrq_entry_size;
+   uint16_tcq_max_l2_entries;
+   uint32_tcq_max_entries;
+   uint16_tcq_entry_size;
+   uint16_tvnic_max_vnic_entries;
+   uint16_tvnic_max_ring_table_entries;
+   uint16_tvnic_entry_size;
+   uint32_tstat_max_entries;
+   uint16_tstat_entry_size;
+   uint16_ttqm_entry_size;
+   uint32_ttqm_min_entries_per_ring;
+   uint32_ttqm_max_entries_per_ring;
+   uint32_tmrav_max_entries;
+   uint16_tmrav_entry_size;
+   uint16_ttim_entry_size;
+   uint32_ttim_max_entries;
+   uint8_t tqm_entries_multiple;
+
+   uint32_tflags;
+#define BNXT_CTX_FLAG_INITED0x01
+
+   struct bnxt_ctx_pg_info qp_mem;
+   struct bnxt_ctx_pg_info srq_mem;
+   struct bnxt_ctx_pg_info cq_mem;
+   struct bnxt_ctx_pg_info vnic_mem;
+   struct bnxt_ctx_pg_info stat_mem;
+   struct bnxt_ctx_pg_info *tqm_mem[BNXT_MAX_TC_Q];
+};
+
 #define BNXT_HWRM_SHORT_REQ_LENsizeof(struct hwrm_short_input)
 struct bnxt {
void*bar0;
@@ -262,6 +349,7 @@ struct bnxt {
 #define BNXT_FLAG_KONG_MB_EN   (1 << 10)
 #define BNXT_FLAG_TRUSTED_VF_EN(1 << 11)
 #define BNXT_FLAG_DFLT_VNIC_SET(1 << 12)
+#define BNXT_FLAG_THOR_CHIP(1 << 13)
 #define BNXT_FLAG_NEW_RM   (1 << 30)
 #define BNXT_FLAG_INIT_DONE(1U << 31)
 #define BNXT_PF(bp)(!((bp)->flags & BNXT_FLAG_VF))
@@ -272,6 +360,9 @@ struct bnxt {
 #define BNXT_USE_CHIMP_MB  0 //For non-CFA commands, everything uses Chimp.
 #define BNXT_USE_KONG(bp)

[dpdk-dev] [PATCH 08/11] net/bnxt: refactor ring allocation code

2019-06-02 Thread Lance Richardson

Reduce code duplication and prepare for supporting hardware with
different ring allocation requirements by refactoring ring
allocation code.

Signed-off-by: Lance Richardson 
Reviewed-by: Ajit Kumar Khaparde 
---
 drivers/net/bnxt/bnxt_ring.c | 167 ++-
 1 file changed, 85 insertions(+), 82 deletions(-)

diff --git a/drivers/net/bnxt/bnxt_ring.c b/drivers/net/bnxt/bnxt_ring.c
index 15d418977..8473e4abe 100644
--- a/drivers/net/bnxt/bnxt_ring.c
+++ b/drivers/net/bnxt/bnxt_ring.c
@@ -295,29 +295,94 @@ static void bnxt_set_db(struct bnxt *bp,
}
 }
 
-int bnxt_alloc_hwrm_rx_ring(struct bnxt *bp, int queue_index)
+static int bnxt_alloc_cmpl_ring(struct bnxt *bp, int queue_index,
+   struct bnxt_cp_ring_info *cpr)
+{
+   struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
+   uint8_t ring_type;
+   int rc = 0;
+
+   ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
+
+   rc = bnxt_hwrm_ring_alloc(bp, cp_ring, ring_type, queue_index,
+ HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE);
+   if (rc)
+   return rc;
+
+   cpr->cp_cons = 0;
+   bnxt_set_db(bp, &cpr->cp_db, ring_type, queue_index);
+   bnxt_db_cq(cpr);
+
+   return 0;
+}
+
+static int bnxt_alloc_rx_ring(struct bnxt *bp, int queue_index)
 {
struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
struct bnxt_ring *ring = rxr->rx_ring_struct;
+   uint8_t ring_type;
+   int rc = 0;
+
+   ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
+
+   rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type,
+ queue_index, cpr->hw_stats_ctx_id,
+ cp_ring->fw_ring_id);
+   if (rc)
+   return rc;
+
+   rxr->rx_prod = 0;
+   bp->grp_info[queue_index].rx_fw_ring_id = ring->fw_ring_id;
+   bnxt_set_db(bp, &rxr->rx_db, ring_type, queue_index);
+   bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
+
+   return 0;
+}
+
+static int bnxt_alloc_rx_agg_ring(struct bnxt *bp, int queue_index)
+{
unsigned int map_idx = queue_index + bp->rx_cp_nr_rings;
+   struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
+   struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
+   struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
+   struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
+   struct bnxt_ring *ring = rxr->ag_ring_struct;
+   uint32_t hw_stats_ctx_id = HWRM_NA_SIGNATURE;
uint8_t ring_type;
int rc = 0;
 
-   bp->grp_info[queue_index].fw_stats_ctx = cpr->hw_stats_ctx_id;
+   ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
+
+   rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type, map_idx,
+ hw_stats_ctx_id, cp_ring->fw_ring_id);
 
-   /* Rx cmpl */
-   ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
-   rc = bnxt_hwrm_ring_alloc(bp, cp_ring,  ring_type, queue_index,
- HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE);
if (rc)
+   return rc;
+
+   rxr->ag_prod = 0;
+   bp->grp_info[queue_index].ag_fw_ring_id = ring->fw_ring_id;
+   bnxt_set_db(bp, &rxr->ag_db, ring_type, map_idx);
+   bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
+
+   return 0;
+}
+
+int bnxt_alloc_hwrm_rx_ring(struct bnxt *bp, int queue_index)
+{
+   struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
+   struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
+   struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
+   struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
+   int rc = 0;
+
+   if (bnxt_alloc_cmpl_ring(bp, queue_index, cpr))
goto err_out;
 
+   bp->grp_info[queue_index].fw_stats_ctx = cpr->hw_stats_ctx_id;
bp->grp_info[queue_index].cp_fw_ring_id = cp_ring->fw_ring_id;
-   bnxt_set_db(bp, &cpr->cp_db, ring_type, queue_index);
-   bnxt_db_cq(cpr);
 
if (!queue_index) {
/*
@@ -330,34 +395,12 @@ int bnxt_alloc_hwrm_rx_ring(struct bnxt *bp, int 
queue_index)
if (rc)
goto err_out;
}
-   /* Rx ring */
-   ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
-   rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type, queue_index,
- cpr->hw_stats_ctx_id, cp_ring->fw_ring_id);
-   if (rc)
-   goto err_out;
-
-   rxr->rx_prod = 0;
-   bp->grp_info[queue_index].rx_fw_ring_id = ring->fw_ring_id;
-   bnxt_set_db(bp, &rxr->rx_db, ring_type, queue_index);
-   bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
-
-   /* Agg ring */
-   ring = rxr->ag_ring_struct;
-   if (!ring)
-   PMD_DRV_LOG(ERR, "Alloc AGG Ring is NULL!\n");
 
-   ring_type = HWRM_RING_ALLOC_INPUT_RING_

[dpdk-dev] [PATCH 10/11] net/bnxt: enable completion coalescing for thor

2019-06-02 Thread Lance Richardson

Enable completion coalescing for Thor-based adapters.

Signed-off-by: Lance Richardson 
Reviewed-by: Ajit Kumar Khaparde 
---
 drivers/net/bnxt/bnxt_hwrm.c | 42 +---
 1 file changed, 39 insertions(+), 3 deletions(-)

diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index 29f270195..f5b7e4593 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -4095,6 +4095,37 @@ static void bnxt_hwrm_set_coal_params(struct bnxt_coal 
*hw_coal,
req->flags = rte_cpu_to_le_16(flags);
 }
 
+static int bnxt_hwrm_set_coal_params_thor(struct bnxt *bp,
+   struct hwrm_ring_cmpl_ring_cfg_aggint_params_input *agg_req)
+{
+   struct hwrm_ring_aggint_qcaps_input req = {0};
+   struct hwrm_ring_aggint_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
+   uint32_t enables;
+   uint16_t flags;
+   int rc;
+
+   HWRM_PREP(req, RING_AGGINT_QCAPS, BNXT_USE_CHIMP_MB);
+   rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);
+   if (rc)
+   goto out;
+
+   agg_req->num_cmpl_dma_aggr = resp->num_cmpl_dma_aggr_max;
+   agg_req->cmpl_aggr_dma_tmr = resp->cmpl_aggr_dma_tmr_min;
+
+   flags = HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_FLAGS_TIMER_RESET |
+   HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_FLAGS_RING_IDLE;
+   agg_req->flags = rte_cpu_to_le_16(flags);
+   enables =
+HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_ENABLES_CMPL_AGGR_DMA_TMR |
+HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS_INPUT_ENABLES_NUM_CMPL_DMA_AGGR;
+   agg_req->enables = rte_cpu_to_le_32(enables);
+
+out:
+   HWRM_CHECK_RESULT();
+   HWRM_UNLOCK();
+   return rc;
+}
+
 int bnxt_hwrm_set_ring_coal(struct bnxt *bp,
struct bnxt_coal *coal, uint16_t ring_id)
 {
@@ -4103,12 +4134,17 @@ int bnxt_hwrm_set_ring_coal(struct bnxt *bp,
bp->hwrm_cmd_resp_addr;
int rc;
 
-   /* Set ring coalesce parameters only for Stratus 100G NIC */
-   if (!bnxt_stratus_device(bp))
+   /* Set ring coalesce parameters only for 100G NICs */
+   if (BNXT_CHIP_THOR(bp)) {
+   if (bnxt_hwrm_set_coal_params_thor(bp, &req))
+   return -1;
+   } else if (bnxt_stratus_device(bp)) {
+   bnxt_hwrm_set_coal_params(coal, &req);
+   } else {
return 0;
+   }
 
HWRM_PREP(req, RING_CMPL_RING_CFG_AGGINT_PARAMS, BNXT_USE_CHIMP_MB);
-   bnxt_hwrm_set_coal_params(coal, &req);
req.ring_id = rte_cpu_to_le_16(ring_id);
rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);
HWRM_CHECK_RESULT();
-- 
2.17.1

[dpdk-dev] [PATCH 11/11] net/bnxt: enable RSS for thor-based adapters

2019-06-02 Thread Lance Richardson

Enable rss support for thor-based adapters.

Signed-off-by: Lance Richardson 
Reviewed-by: Ajit Kumar Khaparde 
---
 drivers/net/bnxt/bnxt_ethdev.c |  69 ++--
 drivers/net/bnxt/bnxt_hwrm.c   | 190 +++--
 drivers/net/bnxt/bnxt_hwrm.h   |   6 +-
 drivers/net/bnxt/bnxt_vnic.c   |  15 ++-
 drivers/net/bnxt/bnxt_vnic.h   |   1 +
 5 files changed, 235 insertions(+), 46 deletions(-)

diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index d26066062..749763c25 100644
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -171,6 +171,24 @@ static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
  * High level utility functions
  */
 
+static uint16_t bnxt_rss_ctxts(const struct bnxt *bp)
+{
+   if (!BNXT_CHIP_THOR(bp))
+   return 1;
+
+   return RTE_ALIGN_MUL_CEIL(bp->rx_nr_rings,
+ BNXT_RSS_ENTRIES_PER_CTX_THOR) /
+   BNXT_RSS_ENTRIES_PER_CTX_THOR;
+}
+
+static uint16_t  bnxt_rss_hash_tbl_size(const struct bnxt *bp)
+{
+   if (!BNXT_CHIP_THOR(bp))
+   return HW_HASH_INDEX_SIZE;
+
+   return bnxt_rss_ctxts(bp) * BNXT_RSS_ENTRIES_PER_CTX_THOR;
+}
+
 static void bnxt_free_mem(struct bnxt *bp)
 {
bnxt_free_filter_mem(bp);
@@ -290,13 +308,21 @@ static int bnxt_init_chip(struct bnxt *bp)
 
/* Alloc RSS context only if RSS mode is enabled */
if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS) {
-   rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
+   int j, nr_ctxs = bnxt_rss_ctxts(bp);
+
+   rc = 0;
+   for (j = 0; j < nr_ctxs; j++) {
+   rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic, j);
+   if (rc)
+   break;
+   }
if (rc) {
PMD_DRV_LOG(ERR,
-   "HWRM vnic %d ctx alloc failure rc: 
%x\n",
-   i, rc);
+ "HWRM vnic %d ctx %d alloc failure rc: %x\n",
+ i, j, rc);
goto err_out;
}
+   vnic->num_lb_ctxts = nr_ctxs;
}
 
/*
@@ -470,7 +496,7 @@ static void bnxt_dev_info_get_op(struct rte_eth_dev 
*eth_dev,
/* For the sake of symmetry, max_rx_queues = max_tx_queues */
dev_info->max_rx_queues = max_rx_rings;
dev_info->max_tx_queues = max_rx_rings;
-   dev_info->reta_size = HW_HASH_INDEX_SIZE;
+   dev_info->reta_size = bnxt_rss_hash_tbl_size(bp);
dev_info->hash_key_size = 40;
max_vnics = bp->max_vnics;
 
@@ -1004,11 +1030,20 @@ static struct bnxt_rx_queue *bnxt_qid_to_rxq(struct 
bnxt *bp, uint16_t qid)
 /* Return rxq corresponding to a given rss table ring/group ID. */
 static uint16_t bnxt_rss_to_qid(struct bnxt *bp, uint16_t fwr)
 {
+   struct bnxt_rx_queue *rxq;
unsigned int i;
 
-   for (i = 0; i < bp->rx_nr_rings; i++) {
-   if (bp->grp_info[i].fw_grp_id == fwr)
-   return i;
+   if (!BNXT_HAS_RING_GRPS(bp)) {
+   for (i = 0; i < bp->rx_nr_rings; i++) {
+   rxq = bp->eth_dev->data->rx_queues[i];
+   if (rxq->rx_ring->rx_ring_struct->fw_ring_id == fwr)
+   return rxq->index;
+   }
+   } else {
+   for (i = 0; i < bp->rx_nr_rings; i++) {
+   if (bp->grp_info[i].fw_grp_id == fwr)
+   return i;
+   }
}
 
return INVALID_HW_RING_ID;
@@ -1021,7 +1056,7 @@ static int bnxt_reta_update_op(struct rte_eth_dev 
*eth_dev,
struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
-   uint16_t tbl_size = HW_HASH_INDEX_SIZE;
+   uint16_t tbl_size = bnxt_rss_hash_tbl_size(bp);
uint16_t idx, sft;
int i;
 
@@ -1053,6 +1088,16 @@ static int bnxt_reta_update_op(struct rte_eth_dev 
*eth_dev,
return -EINVAL;
}
 
+   if (BNXT_CHIP_THOR(bp)) {
+   vnic->rss_table[i * 2] =
+   rxq->rx_ring->rx_ring_struct->fw_ring_id;
+   vnic->rss_table[i * 2 + 1] =
+   rxq->cp_ring->cp_ring_struct->fw_ring_id;
+   } else {
+   vnic->rss_table[i] =
+   vnic->fw_grp_ids[reta_conf[idx].reta[sft]];
+   }
+
vnic->rss_table[i] =
vnic->fw_grp_ids[reta_conf[idx].reta[sft]];
}
@@ -1067,7 +1112,

[dpdk-dev] [PATCH 11/11] net/bnxt: enable RSS for thor-based controllers

2019-06-02 Thread Lance Richardson

Make changes needed to support rss for thor-based controllers.

Signed-off-by: Lance Richardson 
Reviewed-by: Ajit Kumar Khaparde 
---
 drivers/net/bnxt/bnxt_ethdev.c |  69 ++--
 drivers/net/bnxt/bnxt_hwrm.c   | 190 +++--
 drivers/net/bnxt/bnxt_hwrm.h   |   6 +-
 drivers/net/bnxt/bnxt_vnic.c   |  15 ++-
 drivers/net/bnxt/bnxt_vnic.h   |   1 +
 5 files changed, 235 insertions(+), 46 deletions(-)

diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index d26066062..749763c25 100644
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -171,6 +171,24 @@ static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
  * High level utility functions
  */
 
+static uint16_t bnxt_rss_ctxts(const struct bnxt *bp)
+{
+   if (!BNXT_CHIP_THOR(bp))
+   return 1;
+
+   return RTE_ALIGN_MUL_CEIL(bp->rx_nr_rings,
+ BNXT_RSS_ENTRIES_PER_CTX_THOR) /
+   BNXT_RSS_ENTRIES_PER_CTX_THOR;
+}
+
+static uint16_t  bnxt_rss_hash_tbl_size(const struct bnxt *bp)
+{
+   if (!BNXT_CHIP_THOR(bp))
+   return HW_HASH_INDEX_SIZE;
+
+   return bnxt_rss_ctxts(bp) * BNXT_RSS_ENTRIES_PER_CTX_THOR;
+}
+
 static void bnxt_free_mem(struct bnxt *bp)
 {
bnxt_free_filter_mem(bp);
@@ -290,13 +308,21 @@ static int bnxt_init_chip(struct bnxt *bp)
 
/* Alloc RSS context only if RSS mode is enabled */
if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS) {
-   rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
+   int j, nr_ctxs = bnxt_rss_ctxts(bp);
+
+   rc = 0;
+   for (j = 0; j < nr_ctxs; j++) {
+   rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic, j);
+   if (rc)
+   break;
+   }
if (rc) {
PMD_DRV_LOG(ERR,
-   "HWRM vnic %d ctx alloc failure rc: 
%x\n",
-   i, rc);
+ "HWRM vnic %d ctx %d alloc failure rc: %x\n",
+ i, j, rc);
goto err_out;
}
+   vnic->num_lb_ctxts = nr_ctxs;
}
 
/*
@@ -470,7 +496,7 @@ static void bnxt_dev_info_get_op(struct rte_eth_dev 
*eth_dev,
/* For the sake of symmetry, max_rx_queues = max_tx_queues */
dev_info->max_rx_queues = max_rx_rings;
dev_info->max_tx_queues = max_rx_rings;
-   dev_info->reta_size = HW_HASH_INDEX_SIZE;
+   dev_info->reta_size = bnxt_rss_hash_tbl_size(bp);
dev_info->hash_key_size = 40;
max_vnics = bp->max_vnics;
 
@@ -1004,11 +1030,20 @@ static struct bnxt_rx_queue *bnxt_qid_to_rxq(struct 
bnxt *bp, uint16_t qid)
 /* Return rxq corresponding to a given rss table ring/group ID. */
 static uint16_t bnxt_rss_to_qid(struct bnxt *bp, uint16_t fwr)
 {
+   struct bnxt_rx_queue *rxq;
unsigned int i;
 
-   for (i = 0; i < bp->rx_nr_rings; i++) {
-   if (bp->grp_info[i].fw_grp_id == fwr)
-   return i;
+   if (!BNXT_HAS_RING_GRPS(bp)) {
+   for (i = 0; i < bp->rx_nr_rings; i++) {
+   rxq = bp->eth_dev->data->rx_queues[i];
+   if (rxq->rx_ring->rx_ring_struct->fw_ring_id == fwr)
+   return rxq->index;
+   }
+   } else {
+   for (i = 0; i < bp->rx_nr_rings; i++) {
+   if (bp->grp_info[i].fw_grp_id == fwr)
+   return i;
+   }
}
 
return INVALID_HW_RING_ID;
@@ -1021,7 +1056,7 @@ static int bnxt_reta_update_op(struct rte_eth_dev 
*eth_dev,
struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
-   uint16_t tbl_size = HW_HASH_INDEX_SIZE;
+   uint16_t tbl_size = bnxt_rss_hash_tbl_size(bp);
uint16_t idx, sft;
int i;
 
@@ -1053,6 +1088,16 @@ static int bnxt_reta_update_op(struct rte_eth_dev 
*eth_dev,
return -EINVAL;
}
 
+   if (BNXT_CHIP_THOR(bp)) {
+   vnic->rss_table[i * 2] =
+   rxq->rx_ring->rx_ring_struct->fw_ring_id;
+   vnic->rss_table[i * 2 + 1] =
+   rxq->cp_ring->cp_ring_struct->fw_ring_id;
+   } else {
+   vnic->rss_table[i] =
+   vnic->fw_grp_ids[reta_conf[idx].reta[sft]];
+   }
+
vnic->rss_table[i] =
vnic->fw_grp_ids[reta_conf[idx].reta[sft]];

[dpdk-dev] [PATCH v2] eal: remove non-thread panic calls from init sequence

2019-06-02 Thread Arnon Warshavsky

This patch changes some void functions to return a value,
so that the init sequence may tear down orderly
instead of calling panic.
The calls for launching core messaging threads were left in tact
in all 3 eal implementations.
This should be addressed in a different patchset.
There are still cases where the PMDs or message threads
may call panic with no context for the user.
For these I will submit a patch suggesting a callback registration,
allowing the user to register a context to be called
in case of a panic that takes place outside the init sequence.

Signed-off-by: Arnon Warshavsky 
---

-v2 fix freebsd compilation

 lib/librte_eal/freebsd/eal/eal.c | 59 ++
 lib/librte_eal/linux/eal/eal.c   | 89 
 2 files changed, 105 insertions(+), 43 deletions(-)

diff --git a/lib/librte_eal/freebsd/eal/eal.c b/lib/librte_eal/freebsd/eal/eal.c
index c6ac902..d4a5c08 100644
--- a/lib/librte_eal/freebsd/eal/eal.c
+++ b/lib/librte_eal/freebsd/eal/eal.c
@@ -215,7 +215,7 @@ enum rte_iova_mode
  * We also don't lock the whole file, so that in future we can use read-locks
  * on other parts, e.g. memzones, to detect if there are running secondary
  * processes. */
-static void
+static int
 rte_eal_config_create(void)
 {
void *rte_mem_cfg_addr;
@@ -224,60 +224,77 @@ enum rte_iova_mode
const char *pathname = eal_runtime_config_path();
 
if (internal_config.no_shconf)
-   return;
+   return 0;
 
if (mem_cfg_fd < 0){
mem_cfg_fd = open(pathname, O_RDWR | O_CREAT, 0600);
-   if (mem_cfg_fd < 0)
-   rte_panic("Cannot open '%s' for rte_mem_config\n", 
pathname);
+   if (mem_cfg_fd < 0) {
+   RTE_LOG(ERR, EAL, "Cannot open '%s' for 
rte_mem_config\n",
+   pathname);
+   return -1;
+   }
}
 
retval = ftruncate(mem_cfg_fd, sizeof(*rte_config.mem_config));
if (retval < 0){
close(mem_cfg_fd);
-   rte_panic("Cannot resize '%s' for rte_mem_config\n", pathname);
+   RTE_LOG(ERR, EAL, "Cannot resize '%s' for rte_mem_config\n",
+   pathname);
+   return -1;
}
 
retval = fcntl(mem_cfg_fd, F_SETLK, &wr_lock);
if (retval < 0){
close(mem_cfg_fd);
-   rte_exit(EXIT_FAILURE, "Cannot create lock on '%s'. Is another 
primary "
+   RTE_LOG(ERR, EAL, "Cannot create lock on '%s'. Is another 
primary ",
"process running?\n", pathname);
+   return -1;
}
 
rte_mem_cfg_addr = mmap(NULL, sizeof(*rte_config.mem_config),
PROT_READ | PROT_WRITE, MAP_SHARED, mem_cfg_fd, 
0);
 
if (rte_mem_cfg_addr == MAP_FAILED){
-   rte_panic("Cannot mmap memory for rte_config\n");
+   RTE_LOG(ERR, EAL, "Cannot mmap memory for rte_config\n");
+   return -1;
}
memcpy(rte_mem_cfg_addr, &early_mem_config, sizeof(early_mem_config));
rte_config.mem_config = rte_mem_cfg_addr;
+
+   return 0;
 }
 
 /* attach to an existing shared memory config */
-static void
+static int
 rte_eal_config_attach(void)
 {
void *rte_mem_cfg_addr;
const char *pathname = eal_runtime_config_path();
 
if (internal_config.no_shconf)
-   return;
+   return 0;
 
if (mem_cfg_fd < 0){
mem_cfg_fd = open(pathname, O_RDWR);
-   if (mem_cfg_fd < 0)
-   rte_panic("Cannot open '%s' for rte_mem_config\n", 
pathname);
+   if (mem_cfg_fd < 0) {
+   RTE_LOG(ERR, EAL, "Cannot open '%s' for 
rte_mem_config\n",
+   pathname);
+   return -1;
+   }
}
 
rte_mem_cfg_addr = mmap(NULL, sizeof(*rte_config.mem_config),
PROT_READ | PROT_WRITE, MAP_SHARED, mem_cfg_fd, 
0);
close(mem_cfg_fd);
-   if (rte_mem_cfg_addr == MAP_FAILED)
-   rte_panic("Cannot mmap memory for rte_config\n");
+   if (mem_config == MAP_FAILED) {
+   RTE_LOG(ERR, EAL, "Cannot mmap memory for rte_config! error %i 
(%s)\n",
+   errno, strerror(errno));
+   return -1;
+   }
 
rte_config.mem_config = rte_mem_cfg_addr;
+
+   return 0;
 }
 
 /* Detect if we are a primary or a secondary process */
@@ -313,16 +330,26 @@ enum rte_proc_type_t
 
switch (rte_config.process_type){
case RTE_PROC_PRIMARY:
-   rte_eal_config_create();
+   if (rte_eal_config_create() < 0) {
+   RTE_LOG(ERR, EAL, "Failed to create config\n");
+   return -1;
+   }

[dpdk-dev] [PATCH 1/2] net/ipn3ke: add new register address

2019-06-02 Thread Andy Pei

ipn3ke can work on 10G mode and 25G mode.
10G mode and 25G mode has different MAC
register address for statistics.
This patch implemente statistics registers
for 10G mode and 25G mode.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: rosen...@intel.com

Signed-off-by: Andy Pei 
---
 drivers/net/ipn3ke/ipn3ke_ethdev.c |  27 +-
 drivers/net/ipn3ke/ipn3ke_ethdev.h | 572 +
 2 files changed, 354 insertions(+), 245 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c 
b/drivers/net/ipn3ke/ipn3ke_ethdev.c
index 9079b57..73ece8d 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.c
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c
@@ -247,10 +247,20 @@
ipn3ke_xmac_rx_enable(hw, i, 1);
 
/* Clear all TX statistics counters */
-   ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
+   ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
 
/* Clear all RX statistics counters */
-   ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
+   ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
+   }
+   } else if (hw->retimer.mac_type ==
+   IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+   /* Enable inter connect channel */
+   for (i = 0; i < hw->port_num; i++) {
+   /* Clear all TX statistics counters */
+   ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
+
+   /* Clear all RX statistics counters */
+   ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
}
}
 
@@ -294,10 +304,19 @@
ipn3ke_xmac_rx_disable(hw, i, 1);
 
/* Clear all TX statistics counters */
-   ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
+   ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
+
+   /* Clear all RX statistics counters */
+   ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
+   }
+   } else if (hw->retimer.mac_type ==
+   IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+   for (i = 0; i < hw->port_num; i++) {
+   /* Clear all TX statistics counters */
+   ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
 
/* Clear all RX statistics counters */
-   ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
+   ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
}
}
 }
diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.h 
b/drivers/net/ipn3ke/ipn3ke_ethdev.h
index af2da05..0984603 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.h
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.h
@@ -650,239 +650,298 @@ static inline void _ipn3ke_indrct_write(struct 
ipn3ke_hw *hw,
 #define IPN3KE_MAC_RX_FRAME_MAXLENGTH_MASK \
IPN3KE_MASK(0x, IPN3KE_MAC_RX_FRAME_MAXLENGTH_SHIFT)
 
-#define IPN3KE_MAC_TX_STATS_CLR0x0140
-#define IPN3KE_MAC_TX_STATS_CLR_CLEAR_SHIFT0
-#define IPN3KE_MAC_TX_STATS_CLR_CLEAR_MASK \
-   IPN3KE_MASK(0x1, IPN3KE_MAC_TX_STATS_CLR_CLEAR_SHIFT)
-
-#define IPN3KE_MAC_RX_STATS_CLR0x01C0
-#define IPN3KE_MAC_RX_STATS_CLR_CLEAR_SHIFT0
-#define IPN3KE_MAC_RX_STATS_CLR_CLEAR_MASK \
-   IPN3KE_MASK(0x1, IPN3KE_MAC_RX_STATS_CLR_CLEAR_SHIFT)
-
-/*tx_stats_framesOK*/
-#define IPN3KE_MAC_TX_STATS_FRAMESOK_HI  0x0142
-#define IPN3KE_MAC_TX_STATS_FRAMESOK_LOW 0x0143
-
-/*rx_stats_framesOK*/
-#define IPN3KE_MAC_RX_STATS_FRAMESOK_HI  0x01C2
-#define IPN3KE_MAC_RX_STATS_FRAMESOK_LOW 0x01C3
-
-/*tx_stats_framesErr*/
-#define IPN3KE_MAC_TX_STATS_FRAMESERR_HI  0x0144
-#define IPN3KE_MAC_TX_STATS_FRAMESERR_LOW 0x0145
-
-/*rx_stats_framesErr*/
-#define IPN3KE_MAC_RX_STATS_FRAMESERR_HI  0x01C4
-#define IPN3KE_MAC_RX_STATS_FRAMESERR_LOW 0x01C5
-
-/*rx_stats_framesCRCErr*/
-#define IPN3KE_MAC_RX_STATS_FRAMESCRCERR_HI  0x01C6
-#define IPN3KE_MAC_RX_STATS_FRAMESCRCERR_LOW 0x01C7
-
-/*tx_stats_octetsOK 64b*/
-#define IPN3KE_MAC_TX_STATS_OCTETSOK_HI  0x0148
-#define IPN3KE_MAC_TX_STATS_OCTETSOK_LOW 0x0149
-
-/*rx_stats_octetsOK 64b*/
-#define IPN3KE_MAC_RX_STATS_OCTETSOK_HI  0x01C8
-#define IPN3KE_MAC_RX_STATS_OCTETSOK_LOW 0x01C9
-
-/*tx_stats_pauseMACCtrl_Frames*/
-#define IPN3KE_MAC_TX_STATS_PAUSEMACCTRL_FRAMES_HI  0x014A
-#define IPN3KE_MAC_TX_STATS_PAUSEMACCTRL_FRAMES_LOW 0x014B
-
-/*rx_stats_pauseMACCtrl_Frames*/
-#define IPN3KE_MAC_RX_STATS_PAUSEMACCTRL_FRAMES_HI  0x01CA
-#define IPN3KE_MAC_RX_STATS_PAUSEMACCTRL_FRAMES_LOW 0x01CB
-
-/*tx_stats_ifErrors*/
-#define IPN3KE_MAC_TX_STATS_IFERRORS_HI  0x014C
-#define IPN3KE_MAC_TX_STATS_IFERRORS_LOW 0x014D
-
-/*rx_stats_ifErrors*/
-#define IPN3KE_MAC_RX_STATS_IFERRORS_HI  0x01CC
-#define IPN3KE_MAC_RX_STATS_IFERRORS_LOW 0x01CD
-
-/*tx_stats_unicast_FramesOK*/
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESOK_HI  0x014E
-#define IPN3KE_MAC_TX_STATS_UNICAST_FRAMESOK_LOW 0x014F
-
-/*rx_stats_unicast_FramesOK*/
-#define IP

[dpdk-dev] [PATCH 2/2] net/ipn3ke: implementation of statistics

2019-06-02 Thread Andy Pei

This patch implemente statistics read and reset
function for ipn3ke.

Fixes: 70d6b7f550f4 ("net/ipn3ke: add representor")
Cc: rosen...@intel.com

Signed-off-by: Andy Pei 
---
 drivers/net/ipn3ke/ipn3ke_representor.c | 3339 ++-
 1 file changed, 3328 insertions(+), 11 deletions(-)

diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c 
b/drivers/net/ipn3ke/ipn3ke_representor.c
index f4529f6..6454f71 100644
--- a/drivers/net/ipn3ke/ipn3ke_representor.c
+++ b/drivers/net/ipn3ke/ipn3ke_representor.c
@@ -3,6 +3,7 @@
  */
 
 #include 
+#include 
 
 #include 
 #include 
@@ -160,10 +161,17 @@
ipn3ke_xmac_rx_enable(hw, rpst->port_id, 0);
 
/* Clear all TX statistics counters */
-   ipn3ke_xmac_tx_clr_stcs(hw, rpst->port_id, 0);
+   ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 0);
 
/* Clear all RX statistics counters */
-   ipn3ke_xmac_rx_clr_stcs(hw, rpst->port_id, 0);
+   ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 0);
+   } else if (hw->retimer.mac_type ==
+   IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+   /* Clear all TX statistics counters */
+   ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 0);
+
+   /* Clear all RX statistics counters */
+   ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 0);
}
 
ipn3ke_rpst_link_update(dev, 0);
@@ -278,31 +286,3340 @@
 {
 }
 
+/* Statistics collected by each port, VSI, VEB, and S-channel */
+struct ipn3ke_rpst_eth_stats {
+   uint64_t tx_bytes;   /* gotc */
+   uint64_t tx_multicast;   /* mptc */
+   uint64_t tx_broadcast;   /* bptc */
+   uint64_t tx_unicast; /* uptc */
+   uint64_t tx_discards;/* tdpc */
+   uint64_t tx_errors;  /* tepc */
+   uint64_t rx_bytes;   /* gorc */
+   uint64_t rx_multicast;   /* mprc */
+   uint64_t rx_broadcast;   /* bprc */
+   uint64_t rx_unicast; /* uprc */
+   uint64_t rx_discards;/* rdpc */
+   uint64_t rx_unknown_protocol;/* rupp */
+};
+
+/* store statistics names and its offset in stats structure */
+struct ipn3ke_rpst_xstats_name_offset {
+   char name[RTE_ETH_XSTATS_NAME_SIZE];
+   unsigned int offset;
+};
+
+static const struct ipn3ke_rpst_xstats_name_offset
+ipn3ke_rpst_stats_strings[] = {
+   {"tx_multicast_packets",  offsetof(struct ipn3ke_rpst_eth_stats,
+   tx_multicast)},
+   {"tx_broadcast_packets",  offsetof(struct ipn3ke_rpst_eth_stats,
+   tx_broadcast)},
+   {"tx_unicast_packets",offsetof(struct ipn3ke_rpst_eth_stats,
+   tx_unicast)},
+   {"tx_dropped",offsetof(struct ipn3ke_rpst_eth_stats,
+   tx_discards)},
+   {"rx_multicast_packets",  offsetof(struct ipn3ke_rpst_eth_stats,
+   rx_multicast)},
+   {"rx_broadcast_packets",  offsetof(struct ipn3ke_rpst_eth_stats,
+   rx_broadcast)},
+   {"rx_unicast_packets",offsetof(struct ipn3ke_rpst_eth_stats,
+   rx_unicast)},
+   {"rx_dropped",offsetof(struct ipn3ke_rpst_eth_stats,
+   rx_discards)},
+   {"rx_unknown_protocol_packets", offsetof(struct ipn3ke_rpst_eth_stats,
+   rx_unknown_protocol)},
+};
+
+#define IPN3KE_RPST_ETH_XSTATS_CNT (sizeof(ipn3ke_rpst_stats_strings) / \
+   sizeof(ipn3ke_rpst_stats_strings[0]))
+
+#define IPN3KE_RPST_PRIO_XSTATS_CNT8
+
+/* Statistics collected by the MAC */
+struct ipn3ke_rpst_hw_port_stats {
+   /* eth stats collected by the port */
+   struct ipn3ke_rpst_eth_stats eth;
+
+   /* additional port specific stats */
+   uint64_t tx_dropped_link_down;
+   uint64_t crc_errors;
+   uint64_t illegal_bytes;
+   uint64_t error_bytes;
+   uint64_t mac_local_faults;
+   uint64_t mac_remote_faults;
+   uint64_t rx_length_errors;
+   uint64_t link_xon_rx;
+   uint64_t link_xoff_rx;
+   uint64_t priority_xon_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+   uint64_t priority_xoff_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+   uint64_t link_xon_tx;
+   uint64_t link_xoff_tx;
+   uint64_t priority_xon_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+   uint64_t priority_xoff_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
+   uint64_t priority_xon_2_xoff[IPN3KE_RPST_PRIO_XSTATS_CNT];
+   uint64_t rx_size_64;
+   uint64_t rx_si

Re: [dpdk-dev] [PATCH 02/25] bus/fslmc: use new memory locking API

2019-06-02 Thread Shreyansh Jain

> -Original Message-
> From: Anatoly Burakov 
> Sent: Wednesday, May 29, 2019 10:01 PM
> To: dev@dpdk.org
> Cc: Hemant Agrawal ; Shreyansh Jain
> ; step...@networkplumber.org;
> tho...@monjalon.net; david.march...@redhat.com
> Subject: [PATCH 02/25] bus/fslmc: use new memory locking API
> 
> Replace usages of direct access to shared memory config with
> calls to the new API.
> 
> Signed-off-by: Anatoly Burakov 
> ---

>From fslmc perspective, looks fine to me.

Acked-by: Shreyansh Jain

82 matches

Mail list logo