Re: [dpdk-dev] [PATCH v4] app/testpmd: supported offload capabilities query
Hi Qiming,
> -Original Message-
> From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Qiming Yang
> Sent: Friday, December 23, 2016 5:32 PM
> To: dev@dpdk.org
> Cc: Wu, Jingjing ; Yang, Qiming
>
> Subject: [dpdk-dev] [PATCH v4] app/testpmd: supported offload capabilities
> query
>
> Add two new commands "show port cap " and "show port cap all"to
> diaplay what offload capabilities supported in ports. It will not only
> display all
> the capabilities of the port, but also the enabling condition for each
> capability in
> the running time.
>
> Signed-off-by: Qiming Yang
> ---
> v2 changes:
> * fixed the output style as Ferruh's patch show and add some
> description in docs for new functions.
> v3 changes:
> * add new command in cmd_help_long_parsed.
> v4 changes:
> * use 'cap' instead of 'capa'.
> ---
> ---
> app/test-pmd/cmdline.c | 17 ++-
> app/test-pmd/config.c | 172
>
> app/test-pmd/testpmd.h | 1 +
> doc/guides/testpmd_app_ug/testpmd_funcs.rst | 12 +-
> 4 files changed, 192 insertions(+), 10 deletions(-)
>
> diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c index
> 63b55dc..bbfafab 100644
> --- a/app/test-pmd/cmdline.c
> +++ b/app/test-pmd/cmdline.c
> +
> + if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TCP_CKSUM) {
> + printf("TCP checksum: ");
> + if (dev->data->dev_conf.rxmode.hw_ip_checksum)
> + printf("on\n");
> + else
> + printf("off\n");
> + }
> +
> + if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TCP_LRO) {
> + printf("Large receive offload: ");
> + if (dev->data->dev_conf.rxmode.enable_lro)
> + printf("on\n");
> + else
> + printf("off\n");
> + }
> +
> + if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_QINQ_STRIP) {
> + printf("Double VLANs stripped: ");
> + if (dev->data->dev_conf.rxmode.hw_vlan_extend)
> + printf("on\n");
> + else
> + printf("off\n");
> + }
> +
> + if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM)
> + printf("Outer IPv4 checksum: ");
Seems there's no 'on' or 'off' printed here, do I miss anything?
> +
> + if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_VLAN_INSERT) {
> + printf("VLAN insert: ");
> + if (ports[port_id].tx_ol_flags &
> TESTPMD_TX_OFFLOAD_INSERT_VLAN)
> + printf("on\n");
> + else
> + printf("off\n");
> + }
> +
Re: [dpdk-dev] [PATCH v4] app/testpmd: supported offload capabilities query
Hi, Beilei
Nothing is missing. This capability have no switch in DPDK now. So it don't
have 'on' or 'off'.
-Original Message-
From: Xing, Beilei
Sent: Tuesday, December 27, 2016 4:18 PM
To: Yang, Qiming ; dev@dpdk.org
Cc: Wu, Jingjing ; Yang, Qiming
Subject: RE: [dpdk-dev] [PATCH v4] app/testpmd: supported offload capabilities
query
Hi Qiming,
> -Original Message-
> From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Qiming Yang
> Sent: Friday, December 23, 2016 5:32 PM
> To: dev@dpdk.org
> Cc: Wu, Jingjing ; Yang, Qiming
>
> Subject: [dpdk-dev] [PATCH v4] app/testpmd: supported offload
> capabilities query
>
> Add two new commands "show port cap " and "show port cap all"to
> diaplay what offload capabilities supported in ports. It will not only
> display all the capabilities of the port, but also the enabling
> condition for each capability in the running time.
>
> Signed-off-by: Qiming Yang
> ---
> v2 changes:
> * fixed the output style as Ferruh's patch show and add some
> description in docs for new functions.
> v3 changes:
> * add new command in cmd_help_long_parsed.
> v4 changes:
> * use 'cap' instead of 'capa'.
> ---
> ---
> app/test-pmd/cmdline.c | 17 ++-
> app/test-pmd/config.c | 172
>
> app/test-pmd/testpmd.h | 1 +
> doc/guides/testpmd_app_ug/testpmd_funcs.rst | 12 +-
> 4 files changed, 192 insertions(+), 10 deletions(-)
>
> diff --git a/app/test-pmd/cmdline.c b/app/test-pmd/cmdline.c index
> 63b55dc..bbfafab 100644
> --- a/app/test-pmd/cmdline.c
> +++ b/app/test-pmd/cmdline.c
> +
> + if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TCP_CKSUM) {
> + printf("TCP checksum: ");
> + if (dev->data->dev_conf.rxmode.hw_ip_checksum)
> + printf("on\n");
> + else
> + printf("off\n");
> + }
> +
> + if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_TCP_LRO) {
> + printf("Large receive offload: ");
> + if (dev->data->dev_conf.rxmode.enable_lro)
> + printf("on\n");
> + else
> + printf("off\n");
> + }
> +
> + if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_QINQ_STRIP) {
> + printf("Double VLANs stripped: ");
> + if (dev->data->dev_conf.rxmode.hw_vlan_extend)
> + printf("on\n");
> + else
> + printf("off\n");
> + }
> +
> + if (dev_info.rx_offload_capa & DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM)
> + printf("Outer IPv4 checksum: ");
Seems there's no 'on' or 'off' printed here, do I miss anything?
> +
> + if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_VLAN_INSERT) {
> + printf("VLAN insert: ");
> + if (ports[port_id].tx_ol_flags &
> TESTPMD_TX_OFFLOAD_INSERT_VLAN)
> + printf("on\n");
> + else
> + printf("off\n");
> + }
> +
Re: [dpdk-dev] [PATCH v4] app/testpmd: supported offload capabilities query
> -Original Message- > From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Qiming Yang > Sent: Friday, December 23, 2016 5:32 PM > To: dev@dpdk.org > Cc: Wu, Jingjing ; Yang, Qiming > > Subject: [dpdk-dev] [PATCH v4] app/testpmd: supported offload capabilities > query > > Add two new commands "show port cap " and "show port cap all"to > diaplay what offload capabilities supported in ports. It will not only > display all > the capabilities of the port, but also the enabling condition for each > capability in > the running time. > > Signed-off-by: Qiming Yang Acked-by: Beilei Xing
[dpdk-dev] [PATCH v2 01/29] eal: introduce I/O device memory barriers
This commit introduce rte_io_mb(), rte_io_wmb() and rte_io_rmb(), in order to enable memory barriers between I/O device and CPU. Signed-off-by: Jerin Jacob --- lib/librte_eal/common/include/generic/rte_atomic.h | 27 ++ 1 file changed, 27 insertions(+) diff --git a/lib/librte_eal/common/include/generic/rte_atomic.h b/lib/librte_eal/common/include/generic/rte_atomic.h index 43a704e..7b81705 100644 --- a/lib/librte_eal/common/include/generic/rte_atomic.h +++ b/lib/librte_eal/common/include/generic/rte_atomic.h @@ -100,6 +100,33 @@ static inline void rte_smp_wmb(void); */ static inline void rte_smp_rmb(void); +/** + * General memory barrier for I/O device + * + * Guarantees that the LOAD and STORE operations that precede the + * rte_io_mb() call are visible to I/O device or CPU before the + * LOAD and STORE operations that follow it. + */ +static inline void rte_io_mb(void); + +/** + * Write memory barrier for I/O device + * + * Guarantees that the STORE operations that precede the + * rte_io_wmb() call are visible to I/O device before the STORE + * operations that follow it. + */ +static inline void rte_io_wmb(void); + +/** + * Read memory barrier for IO device + * + * Guarantees that the LOAD operations on I/O device that precede the + * rte_io_rmb() call are visible to CPU before the LOAD + * operations that follow it. + */ +static inline void rte_io_rmb(void); + #endif /* __DOXYGEN__ */ /** -- 2.5.5
[dpdk-dev] [PATCH v2 02/29] eal/x86: define I/O device memory barriers for IA
The patch does not provide any functional change for IA.
I/O barriers are mapped to existing smp barriers.
CC: Bruce Richardson
CC: Konstantin Ananyev
Signed-off-by: Jerin Jacob
---
lib/librte_eal/common/include/arch/x86/rte_atomic.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/lib/librte_eal/common/include/arch/x86/rte_atomic.h
b/lib/librte_eal/common/include/arch/x86/rte_atomic.h
index 00b1cdf..4eac666 100644
--- a/lib/librte_eal/common/include/arch/x86/rte_atomic.h
+++ b/lib/librte_eal/common/include/arch/x86/rte_atomic.h
@@ -61,6 +61,12 @@ extern "C" {
#define rte_smp_rmb() rte_compiler_barrier()
+#define rte_io_mb() rte_mb()
+
+#define rte_io_wmb() rte_compiler_barrier()
+
+#define rte_io_rmb() rte_compiler_barrier()
+
/*- 16 bit atomic operations
-*/
#ifndef RTE_FORCE_INTRINSICS
--
2.5.5
[dpdk-dev] [PATCH v2 00/29] introduce I/O device memory read/write operations
v1..v2: 1) Changed rte_[read/write]b/w/l/q_[relaxed] to rte_[read/write]8/16/32/64_[relaxed](Yuanhan) 2) Changed rte_?mb to macros for arm64(Jianbo) 3) rte_wmb() followed by rte_write* changed to rte_wmb() followed by relaxed version(rte_write_relaxed) in _fast_ path to avoid an extra memory barrier for arm64 in fast path(Jianbo) 3) Replaced virtio io_read*/io_write* with rte_read*/rte_write*(Yuanhan) Based on the discussion in the below-mentioned thread, http://dev.dpdk.narkive.com/DpIRqDuy/dpdk-dev-patch-v2-i40e-fix-eth-i40e-dev-init-sequence-on-thunderx This patchset introduces 8-bit, 16-bit, 32bit, 64bit I/O device memory read/write operations along with the relaxed versions. The weakly-ordered machine like ARM needs additional I/O barrier for device memory read/write access over PCI bus. By introducing the EAL abstraction for I/O device memory read/write access, The drivers can access I/O device memory in architecture-agnostic manner. The relaxed version does not have additional I/O memory barrier, useful in accessing the device registers of integrated controllers which implicitly strongly ordered with respect to memory access. This patch-set split into three functional set: patch-set 1-9: Introduce I/O device memory barrier eal abstraction and implement it for all the architectures. patch-set 10-13: Introduce I/O device memory read/write operations Earl abstraction and implement it for all the architectures using previous I/O device memory barrier. patchset 14-28: Replace the raw readl/writel in the drivers with new rte_read[8/16/32/64], rte_write[8/16/32/64] eal abstraction Note: 1) We couldn't test the patch on all the Hardwares due to unavailability. Appreciate the feedback from ARCH and PMD maintainers. 2) patch 13/28 has false positive check patch error with ASM syntax ERROR:BRACKET_SPACE: space prohibited before open square bracket '[' #92: FILE: lib/librte_eal/common/include/arch/arm/rte_io_64.h:54: + : [val] "=r" (val) Jerin Jacob (15): eal: introduce I/O device memory barriers eal/x86: define I/O device memory barriers for IA eal/tile: define I/O device memory barriers for tile eal/ppc64: define I/O device memory barriers for ppc64 eal/arm: separate smp barrier definition for ARMv7 and ARMv8 eal/armv7: define I/O device memory barriers for ARMv7 eal/arm64: fix memory barrier definition for arm64 eal/arm64: define smp barrier definition for arm64 eal/arm64: define I/O device memory barriers for arm64 eal: introduce I/O device memory read/write operations eal: generic implementation for I/O device read/write access eal: let all architectures use generic I/O implementation eal/arm64: override I/O device read/write access for arm64 eal/arm64: change barrier definitions to macros net/thunderx: use eal I/O device memory read/write API Santosh Shukla (14): crypto/qat: use eal I/O device memory read/write API net/bnxt: use eal I/O device memory read/write API net/bnx2x: use eal I/O device memory read/write API net/cxgbe: use eal I/O device memory read/write API net/e1000: use eal I/O device memory read/write API net/ena: use eal I/O device memory read/write API net/enic: use eal I/O device memory read/write API net/fm10k: use eal I/O device memory read/write API net/i40e: use eal I/O device memory read/write API net/ixgbe: use eal I/O device memory read/write API net/nfp: use eal I/O device memory read/write API net/qede: use eal I/O device memory read/write API net/virtio: use eal I/O device memory read/write API net/vmxnet3: use eal I/O device memory read/write API doc/api/doxy-api-index.md | 3 +- .../qat/qat_adf/adf_transport_access_macros.h | 11 +- drivers/net/bnx2x/bnx2x.h | 26 +- drivers/net/bnxt/bnxt_cpr.h| 13 +- drivers/net/bnxt/bnxt_hwrm.c | 7 +- drivers/net/bnxt/bnxt_txr.h| 6 +- drivers/net/cxgbe/base/adapter.h | 34 ++- drivers/net/cxgbe/cxgbe_compat.h | 8 +- drivers/net/cxgbe/sge.c| 10 +- drivers/net/e1000/base/e1000_osdep.h | 18 +- drivers/net/e1000/em_rxtx.c| 2 +- drivers/net/e1000/igb_rxtx.c | 2 +- drivers/net/ena/base/ena_eth_com.h | 2 +- drivers/net/ena/base/ena_plat_dpdk.h | 11 +- drivers/net/enic/enic_compat.h | 27 +- drivers/net/enic/enic_rxtx.c | 9 +- drivers/net/fm10k/base/fm10k_osdep.h | 17 +- drivers/net/i40e/base/i40e_osdep.h | 10 +- drivers/net/i40e/i40e_rxtx.c | 4 +- drivers/net/ixgbe/base/ixgbe_osdep.h | 11 +- drivers/net/ixgbe/ixgbe_rxtx.c | 13 +- drivers/net/nfp/nfp_net_pmd.h | 9 +- drivers/net/qede/bas
[dpdk-dev] [PATCH v2 04/29] eal/ppc64: define I/O device memory barriers for ppc64
The patch does not provide any functional change for ppc_64.
I/O barriers are mapped to existing smp barriers.
CC: Chao Zhu
Signed-off-by: Jerin Jacob
---
lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
index fb4fccb..150810c 100644
--- a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
@@ -87,6 +87,12 @@ extern "C" {
#define rte_smp_rmb() rte_rmb()
+#define rte_io_mb() rte_mb()
+
+#define rte_io_wmb() rte_wmb()
+
+#define rte_io_rmb() rte_rmb()
+
/*- 16 bit atomic operations
-*/
/* To be compatible with Power7, use GCC built-in functions for 16 bit
* operations */
--
2.5.5
[dpdk-dev] [PATCH v2 03/29] eal/tile: define I/O device memory barriers for tile
The patch does not provide any functional change for tile. I/O barriers are mapped to existing smp barriers. CC: Zhigang Lu Signed-off-by: Jerin Jacob --- lib/librte_eal/common/include/arch/tile/rte_atomic.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/lib/librte_eal/common/include/arch/tile/rte_atomic.h b/lib/librte_eal/common/include/arch/tile/rte_atomic.h index 28825ff..1f332ee 100644 --- a/lib/librte_eal/common/include/arch/tile/rte_atomic.h +++ b/lib/librte_eal/common/include/arch/tile/rte_atomic.h @@ -85,6 +85,12 @@ static inline void rte_rmb(void) #define rte_smp_rmb() rte_compiler_barrier() +#define rte_io_mb() rte_mb() + +#define rte_io_wmb() rte_compiler_barrier() + +#define rte_io_rmb() rte_compiler_barrier() + #ifdef __cplusplus } #endif -- 2.5.5
[dpdk-dev] [PATCH v2 05/29] eal/arm: separate smp barrier definition for ARMv7 and ARMv8
Separate the smp barrier definition for arm and arm64 for fine
control on smp barrier definition for each architecture.
Signed-off-by: Jerin Jacob
---
lib/librte_eal/common/include/arch/arm/rte_atomic.h| 6 --
lib/librte_eal/common/include/arch/arm/rte_atomic_32.h | 6 ++
lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 6 ++
3 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic.h
b/lib/librte_eal/common/include/arch/arm/rte_atomic.h
index 454a12b..f3f3b6e 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic.h
@@ -39,10 +39,4 @@
#include
#endif
-#define rte_smp_mb() rte_mb()
-
-#define rte_smp_wmb() rte_wmb()
-
-#define rte_smp_rmb() rte_rmb()
-
#endif /* _RTE_ATOMIC_ARM_H_ */
diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h
b/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h
index 9ae1e78..dd627a0 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h
@@ -67,6 +67,12 @@ extern "C" {
*/
#definerte_rmb() __sync_synchronize()
+#define rte_smp_mb() rte_mb()
+
+#define rte_smp_wmb() rte_wmb()
+
+#define rte_smp_rmb() rte_rmb()
+
#ifdef __cplusplus
}
#endif
diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
index 671caa7..d854aac 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
@@ -81,6 +81,12 @@ static inline void rte_rmb(void)
dmb(ishld);
}
+#define rte_smp_mb() rte_mb()
+
+#define rte_smp_wmb() rte_wmb()
+
+#define rte_smp_rmb() rte_rmb()
+
#ifdef __cplusplus
}
#endif
--
2.5.5
[dpdk-dev] [PATCH v2 07/29] eal/arm64: fix memory barrier definition for arm64
dsb instruction based barrier is used for non smp
version of memory barrier.
Fixes: d708f01b7102 ("eal/arm: add atomic operations for ARMv8")
CC: Jianbo Liu
CC: sta...@dpdk.org
Signed-off-by: Jerin Jacob
---
lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
index d854aac..bc7de64 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
@@ -43,7 +43,8 @@ extern "C" {
#include "generic/rte_atomic.h"
-#define dmb(opt) do { asm volatile("dmb " #opt : : : "memory"); } while (0)
+#define dsb(opt) { asm volatile("dsb " #opt : : : "memory"); }
+#define dmb(opt) { asm volatile("dmb " #opt : : : "memory"); }
/**
* General memory barrier.
@@ -54,7 +55,7 @@ extern "C" {
*/
static inline void rte_mb(void)
{
- dmb(ish);
+ dsb(sy);
}
/**
@@ -66,7 +67,7 @@ static inline void rte_mb(void)
*/
static inline void rte_wmb(void)
{
- dmb(ishst);
+ dsb(st);
}
/**
@@ -78,7 +79,7 @@ static inline void rte_wmb(void)
*/
static inline void rte_rmb(void)
{
- dmb(ishld);
+ dsb(ld);
}
#define rte_smp_mb() rte_mb()
--
2.5.5
[dpdk-dev] [PATCH v2 06/29] eal/armv7: define I/O device memory barriers for ARMv7
The patch does not provide any functional change for ARMv7.
I/O barriers are mapped to existing smp barriers.
CC: Jan Viktorin
CC: Jianbo Liu
Signed-off-by: Jerin Jacob
---
lib/librte_eal/common/include/arch/arm/rte_atomic_32.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h
b/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h
index dd627a0..14c0486 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_32.h
@@ -73,6 +73,12 @@ extern "C" {
#define rte_smp_rmb() rte_rmb()
+#define rte_io_mb() rte_mb()
+
+#define rte_io_wmb() rte_wmb()
+
+#define rte_io_rmb() rte_rmb()
+
#ifdef __cplusplus
}
#endif
--
2.5.5
[dpdk-dev] [PATCH v2 08/29] eal/arm64: define smp barrier definition for arm64
dmb instruction based barrier is used for smp version of memory barrier. Signed-off-by: Jerin Jacob --- lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h index bc7de64..78ebea2 100644 --- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h @@ -82,11 +82,11 @@ static inline void rte_rmb(void) dsb(ld); } -#define rte_smp_mb() rte_mb() +#define rte_smp_mb() dmb(ish) -#define rte_smp_wmb() rte_wmb() +#define rte_smp_wmb() dmb(ishst) -#define rte_smp_rmb() rte_rmb() +#define rte_smp_rmb() dmb(ishld) #ifdef __cplusplus } -- 2.5.5
[dpdk-dev] [PATCH v2 11/29] eal: generic implementation for I/O device read/write access
This patch implements the generic version of rte_read[b/w/l/q]_[relaxed]
and rte_write[b/w/l/q]_[relaxed] using rte_io_wmb() and rte_io_rmb()
Signed-off-by: Jerin Jacob
---
lib/librte_eal/common/include/generic/rte_io.h | 54 ++
1 file changed, 54 insertions(+)
diff --git a/lib/librte_eal/common/include/generic/rte_io.h
b/lib/librte_eal/common/include/generic/rte_io.h
index edfebf8..342bfec 100644
--- a/lib/librte_eal/common/include/generic/rte_io.h
+++ b/lib/librte_eal/common/include/generic/rte_io.h
@@ -34,6 +34,8 @@
#ifndef _RTE_IO_H_
#define _RTE_IO_H_
+#include
+
/**
* @file
* I/O device memory operations
@@ -260,4 +262,56 @@ rte_write64(uint64_t value, volatile void *addr);
#endif /* __DOXYGEN__ */
+#ifndef RTE_OVERRIDE_IO_H
+
+#define rte_read8_relaxed(addr) \
+ ({ uint8_t __v = *(const volatile uint8_t *)addr; __v; })
+
+#define rte_read16_relaxed(addr) \
+ ({ uint16_t __v = *(const volatile uint16_t *)addr; __v; })
+
+#define rte_read32_relaxed(addr) \
+ ({ uint32_t __v = *(const volatile uint32_t *)addr; __v; })
+
+#define rte_read64_relaxed(addr) \
+ ({ uint64_t __v = *(const volatile uint64_t *)addr; __v; })
+
+#define rte_write8_relaxed(value, addr) \
+ ({ *(volatile uint8_t *)addr = value; })
+
+#define rte_write16_relaxed(value, addr) \
+ ({ *(volatile uint16_t *)addr = value; })
+
+#define rte_write32_relaxed(value, addr) \
+ ({ *(volatile uint32_t *)addr = value; })
+
+#define rte_write64_relaxed(value, addr) \
+ ({ *(volatile uint64_t *)addr = value; })
+
+#define rte_read8(addr) \
+ ({ uint8_t __v = *(const volatile uint8_t *)addr; rte_io_rmb(); __v; })
+
+#define rte_read16(addr) \
+ ({uint16_t __v = *(const volatile uint16_t *)addr; rte_io_rmb(); __v; })
+
+#define rte_read32(addr) \
+ ({uint32_t __v = *(const volatile uint32_t *)addr; rte_io_rmb(); __v; })
+
+#define rte_read64(addr) \
+ ({uint64_t __v = *(const volatile uint64_t *)addr; rte_io_rmb(); __v; })
+
+#define rte_write8(value, addr) \
+ ({ rte_io_wmb(); *(volatile uint8_t *)addr = value; })
+
+#define rte_write16(value, addr) \
+ ({ rte_io_wmb(); *(volatile uint16_t *)addr = value; })
+
+#define rte_write32(value, addr) \
+ ({ rte_io_wmb(); *(volatile uint32_t *)addr = value; })
+
+#define rte_write64(value, addr) \
+ ({ rte_io_wmb(); *(volatile uint64_t *)addr = value; })
+
+#endif /* RTE_OVERRIDE_IO_H */
+
#endif /* _RTE_IO_H_ */
--
2.5.5
[dpdk-dev] [PATCH v2 10/29] eal: introduce I/O device memory read/write operations
This commit introduces 8-bit, 16-bit, 32bit, 64bit I/O device memory read/write operations along with the relaxed versions. The weakly-ordered machine like ARM needs additional I/O barrier for device memory read/write access over PCI bus. By introducing the eal abstraction for I/O device memory read/write access, The drivers can access I/O device memory in architecture agnostic manner. The relaxed version does not have additional I/O memory barrier, useful in accessing the device registers of integrated controllers which implicitly strongly ordered with respect to memory access. Signed-off-by: Jerin Jacob --- doc/api/doxy-api-index.md | 3 +- lib/librte_eal/common/Makefile | 3 +- lib/librte_eal/common/include/generic/rte_io.h | 263 + 3 files changed, 267 insertions(+), 2 deletions(-) create mode 100644 lib/librte_eal/common/include/generic/rte_io.h diff --git a/doc/api/doxy-api-index.md b/doc/api/doxy-api-index.md index 99a1b7a..47a3580 100644 --- a/doc/api/doxy-api-index.md +++ b/doc/api/doxy-api-index.md @@ -70,7 +70,8 @@ There are many libraries, so their headers may be grouped by topics: [branch prediction] (@ref rte_branch_prediction.h), [cache prefetch] (@ref rte_prefetch.h), [byte order] (@ref rte_byteorder.h), - [CPU flags] (@ref rte_cpuflags.h) + [CPU flags] (@ref rte_cpuflags.h), + [I/O access] (@ref rte_io.h) - **CPU multicore**: [interrupts] (@ref rte_interrupts.h), diff --git a/lib/librte_eal/common/Makefile b/lib/librte_eal/common/Makefile index a92c984..6498c15 100644 --- a/lib/librte_eal/common/Makefile +++ b/lib/librte_eal/common/Makefile @@ -43,7 +43,8 @@ INC += rte_pci_dev_feature_defs.h rte_pci_dev_features.h INC += rte_malloc.h rte_keepalive.h rte_time.h GENERIC_INC := rte_atomic.h rte_byteorder.h rte_cycles.h rte_prefetch.h -GENERIC_INC += rte_spinlock.h rte_memcpy.h rte_cpuflags.h rte_rwlock.h +GENERIC_INC += rte_spinlock.h rte_memcpy.h rte_cpuflags.h rte_rwlock.h rte_io.h + # defined in mk/arch/$(RTE_ARCH)/rte.vars.mk ARCH_DIR ?= $(RTE_ARCH) ARCH_INC := $(notdir $(wildcard $(RTE_SDK)/lib/librte_eal/common/include/arch/$(ARCH_DIR)/*.h)) diff --git a/lib/librte_eal/common/include/generic/rte_io.h b/lib/librte_eal/common/include/generic/rte_io.h new file mode 100644 index 000..edfebf8 --- /dev/null +++ b/lib/librte_eal/common/include/generic/rte_io.h @@ -0,0 +1,263 @@ +/* + * BSD LICENSE + * + * Copyright(c) 2016 Cavium networks. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Cavium networks nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RTE_IO_H_ +#define _RTE_IO_H_ + +/** + * @file + * I/O device memory operations + * + * This file defines the generic API for I/O device memory read/write operations + */ + +#include +#include +#include + +#ifdef __DOXYGEN__ + +/** + * Read a 8-bit value from I/O device memory address *addr*. + * + * The relaxed version does not have additional I/O memory barrier, useful in + * accessing the device registers of integrated controllers which implicitly + * strongly ordered with respect to memory access. + * + * @param addr + * I/O memory address to read the value from + * @return + * read value + */ +static inline uint8_t +rte_read8_relaxed(const volatile void *addr); + +/** + * Read a 16-bit value from I/O device memory address *addr*. + * + * The relaxed version does not h
[dpdk-dev] [PATCH v2 09/29] eal/arm64: define I/O device memory barriers for arm64
CC: Jianbo Liu Signed-off-by: Jerin Jacob --- lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h index 78ebea2..ef0efc7 100644 --- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h @@ -88,6 +88,12 @@ static inline void rte_rmb(void) #define rte_smp_rmb() dmb(ishld) +#define rte_io_mb() rte_mb() + +#define rte_io_wmb() rte_wmb() + +#define rte_io_rmb() rte_rmb() + #ifdef __cplusplus } #endif -- 2.5.5
[dpdk-dev] [PATCH v2 12/29] eal: let all architectures use generic I/O implementation
Signed-off-by: Jerin Jacob
---
lib/librte_eal/common/include/arch/arm/rte_io.h| 47 ++
lib/librte_eal/common/include/arch/ppc_64/rte_io.h | 47 ++
lib/librte_eal/common/include/arch/tile/rte_io.h | 47 ++
lib/librte_eal/common/include/arch/x86/rte_io.h| 47 ++
4 files changed, 188 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/arm/rte_io.h
create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_io.h
create mode 100644 lib/librte_eal/common/include/arch/tile/rte_io.h
create mode 100644 lib/librte_eal/common/include/arch/x86/rte_io.h
diff --git a/lib/librte_eal/common/include/arch/arm/rte_io.h
b/lib/librte_eal/common/include/arch/arm/rte_io.h
new file mode 100644
index 000..74c1f2c
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/rte_io.h
@@ -0,0 +1,47 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright(c) 2016 Cavium networks. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Cavium networks nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_IO_ARM_H_
+#define _RTE_IO_ARM_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_io.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_IO_ARM_H_ */
diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_io.h
b/lib/librte_eal/common/include/arch/ppc_64/rte_io.h
new file mode 100644
index 000..be192da
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_io.h
@@ -0,0 +1,47 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright(c) 2016 Cavium networks. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Cavium networks nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_IO_PPC_64_H_
+#define _RTE_IO_PPC_64_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "generic/rte_io.h"
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_IO_PPC_64_H_ */
diff --git a/lib/librte_ea
[dpdk-dev] [PATCH v2 13/29] eal/arm64: override I/O device read/write access for arm64
Override the generic I/O device memory read/write access and implement it
using armv8 instructions for arm64.
Signed-off-by: Jerin Jacob
---
lib/librte_eal/common/include/arch/arm/rte_io.h| 4 +
lib/librte_eal/common/include/arch/arm/rte_io_64.h | 159 +
2 files changed, 163 insertions(+)
create mode 100644 lib/librte_eal/common/include/arch/arm/rte_io_64.h
diff --git a/lib/librte_eal/common/include/arch/arm/rte_io.h
b/lib/librte_eal/common/include/arch/arm/rte_io.h
index 74c1f2c..9593b42 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_io.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_io.h
@@ -38,7 +38,11 @@
extern "C" {
#endif
+#ifdef RTE_ARCH_64
+#include "rte_io_64.h"
+#else
#include "generic/rte_io.h"
+#endif
#ifdef __cplusplus
}
diff --git a/lib/librte_eal/common/include/arch/arm/rte_io_64.h
b/lib/librte_eal/common/include/arch/arm/rte_io_64.h
new file mode 100644
index 000..7759595
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/arm/rte_io_64.h
@@ -0,0 +1,159 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright (C) Cavium networks Ltd. 2016.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Cavium networks nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _RTE_IO_ARM64_H_
+#define _RTE_IO_ARM64_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include
+
+#define RTE_OVERRIDE_IO_H
+
+#include "generic/rte_io.h"
+#include "rte_atomic_64.h"
+
+static inline __attribute__((always_inline)) uint8_t
+rte_read8_relaxed(const volatile void *addr)
+{
+ uint8_t val;
+
+ asm volatile(
+ "ldrb %w[val], [%x[addr]]"
+ : [val] "=r" (val)
+ : [addr] "r" (addr));
+ return val;
+}
+
+static inline __attribute__((always_inline)) uint16_t
+rte_read16_relaxed(const volatile void *addr)
+{
+ uint16_t val;
+
+ asm volatile(
+ "ldrh %w[val], [%x[addr]]"
+ : [val] "=r" (val)
+ : [addr] "r" (addr));
+ return val;
+}
+
+static inline __attribute__((always_inline)) uint32_t
+rte_read32_relaxed(const volatile void *addr)
+{
+ uint32_t val;
+
+ asm volatile(
+ "ldr %w[val], [%x[addr]]"
+ : [val] "=r" (val)
+ : [addr] "r" (addr));
+ return val;
+}
+
+static inline __attribute__((always_inline)) uint64_t
+rte_read64_relaxed(const volatile void *addr)
+{
+ uint64_t val;
+
+ asm volatile(
+ "ldr %x[val], [%x[addr]]"
+ : [val] "=r" (val)
+ : [addr] "r" (addr));
+ return val;
+}
+
+static inline __attribute__((always_inline)) void
+rte_write8_relaxed(uint8_t val, volatile void *addr)
+{
+ asm volatile(
+ "strb %w[val], [%x[addr]]"
+ :
+ : [val] "r" (val), [addr] "r" (addr));
+}
+
+static inline __attribute__((always_inline)) void
+rte_write16_relaxed(uint16_t val, volatile void *addr)
+{
+ asm volatile(
+ "strh %w[val], [%x[addr]]"
+ :
+ : [val] "r" (val), [addr] "r" (addr));
+}
+
+static inline __attribute__((always_inline)) void
+rte_write32_relaxed(uint32_t val, volatile void *addr)
+{
+ asm volatile(
+ "str %w[val], [%x[addr]]"
+ :
+ : [val] "r" (val), [addr] "r" (addr));
+}
+
+static inline __attribute__((always_inline)) void
+rte_write64_relaxed(ui
[dpdk-dev] [PATCH v2 15/29] crypto/qat: use eal I/O device memory read/write API
From: Santosh Shukla Replace the raw I/O device memory read/write access with eal abstraction for I/O device memory read/write access to fix portability issues across different architectures. CC: John Griffin CC: Fiona Trahe CC: Deepak Kumar Jain Signed-off-by: Santosh Shukla Signed-off-by: Jerin Jacob --- drivers/crypto/qat/qat_adf/adf_transport_access_macros.h | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h b/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h index 47f1c91..d218f85 100644 --- a/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h +++ b/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h @@ -47,14 +47,15 @@ #ifndef ADF_TRANSPORT_ACCESS_MACROS_H #define ADF_TRANSPORT_ACCESS_MACROS_H +#include + /* CSR write macro */ -#define ADF_CSR_WR(csrAddr, csrOffset, val) \ - (void)((*((volatile uint32_t *)(((uint8_t *)csrAddr) + csrOffset)) \ - = (val))) +#define ADF_CSR_WR(csrAddr, csrOffset, val)\ + rte_write32(val, (((uint8_t *)csrAddr) + csrOffset)) /* CSR read macro */ -#define ADF_CSR_RD(csrAddr, csrOffset) \ - (*((volatile uint32_t *)(((uint8_t *)csrAddr) + csrOffset))) +#define ADF_CSR_RD(csrAddr, csrOffset) \ + rte_read32uint8_t *)csrAddr) + csrOffset)) #define ADF_BANK_INT_SRC_SEL_MASK_0 0x444CUL #define ADF_BANK_INT_SRC_SEL_MASK_X 0xUL -- 2.5.5
[dpdk-dev] [PATCH v2 14/29] eal/arm64: change barrier definitions to macros
Change rte_?wb definitions to macros in order to
keep consistent with other barrier definitions in
the file.
Suggested-by: Jianbo Liu
Signed-off-by: Jerin Jacob
---
.../common/include/arch/arm/rte_atomic_64.h| 36 ++
1 file changed, 3 insertions(+), 33 deletions(-)
diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
index ef0efc7..dc3a0f3 100644
--- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
+++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
@@ -46,41 +46,11 @@ extern "C" {
#define dsb(opt) { asm volatile("dsb " #opt : : : "memory"); }
#define dmb(opt) { asm volatile("dmb " #opt : : : "memory"); }
-/**
- * General memory barrier.
- *
- * Guarantees that the LOAD and STORE operations generated before the
- * barrier occur before the LOAD and STORE operations generated after.
- * This function is architecture dependent.
- */
-static inline void rte_mb(void)
-{
- dsb(sy);
-}
+#define rte_mb() dsb(sy)
-/**
- * Write memory barrier.
- *
- * Guarantees that the STORE operations generated before the barrier
- * occur before the STORE operations generated after.
- * This function is architecture dependent.
- */
-static inline void rte_wmb(void)
-{
- dsb(st);
-}
+#define rte_wmb() dsb(st)
-/**
- * Read memory barrier.
- *
- * Guarantees that the LOAD operations generated before the barrier
- * occur before the LOAD operations generated after.
- * This function is architecture dependent.
- */
-static inline void rte_rmb(void)
-{
- dsb(ld);
-}
+#define rte_rmb() dsb(ld)
#define rte_smp_mb() dmb(ish)
--
2.5.5
[dpdk-dev] [PATCH v2 16/29] net/bnxt: use eal I/O device memory read/write API
From: Santosh Shukla
Replace the raw I/O device memory read/write access with eal abstraction
for I/O device memory read/write access to fix portability issues across
different architectures.
CC: Stephen Hurd
CC: Ajit Khaparde
Signed-off-by: Santosh Shukla
Signed-off-by: Jerin Jacob
---
drivers/net/bnxt/bnxt_cpr.h | 13 -
drivers/net/bnxt/bnxt_hwrm.c | 7 +--
drivers/net/bnxt/bnxt_txr.h | 6 +++---
3 files changed, 16 insertions(+), 10 deletions(-)
diff --git a/drivers/net/bnxt/bnxt_cpr.h b/drivers/net/bnxt/bnxt_cpr.h
index f9f2adb..83e5376 100644
--- a/drivers/net/bnxt/bnxt_cpr.h
+++ b/drivers/net/bnxt/bnxt_cpr.h
@@ -34,6 +34,8 @@
#ifndef _BNXT_CPR_H_
#define _BNXT_CPR_H_
+#include
+
#define CMP_VALID(cmp, raw_cons, ring) \
(!!(((struct cmpl_base *)(cmp))->info3_v & CMPL_BASE_V) == \
!((raw_cons) & ((ring)->ring_size)))
@@ -50,13 +52,14 @@
#define DB_CP_FLAGS(DB_KEY_CP | DB_IDX_VALID | DB_IRQ_DIS)
#define B_CP_DB_REARM(cpr, raw_cons) \
- (*(uint32_t *)((cpr)->cp_doorbell) = (DB_CP_REARM_FLAGS | \
- RING_CMP(cpr->cp_ring_struct, raw_cons)))
+ rte_write32((DB_CP_REARM_FLAGS |\
+ RING_CMP(((cpr)->cp_ring_struct), raw_cons)), \
+ ((cpr)->cp_doorbell))
#define B_CP_DIS_DB(cpr, raw_cons) \
- rte_smp_wmb(); \
- (*(uint32_t *)((cpr)->cp_doorbell) = (DB_CP_FLAGS | \
- RING_CMP(cpr->cp_ring_struct, raw_cons)))
+ rte_write32((DB_CP_FLAGS | \
+ RING_CMP(((cpr)->cp_ring_struct), raw_cons)), \
+ ((cpr)->cp_doorbell))
struct bnxt_ring;
struct bnxt_cp_ring_info {
diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index 07e7124..c182152 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -50,6 +50,8 @@
#include "bnxt_vnic.h"
#include "hsi_struct_def_dpdk.h"
+#include
+
#define HWRM_CMD_TIMEOUT 2000
/*
@@ -72,7 +74,7 @@ static int bnxt_hwrm_send_message_locked(struct bnxt *bp,
void *msg,
/* Write request msg to hwrm channel */
for (i = 0; i < msg_len; i += 4) {
bar = (uint8_t *)bp->bar0 + i;
- *(volatile uint32_t *)bar = *data;
+ rte_write32(*data, bar);
data++;
}
@@ -80,11 +82,12 @@ static int bnxt_hwrm_send_message_locked(struct bnxt *bp,
void *msg,
for (; i < bp->max_req_len; i += 4) {
bar = (uint8_t *)bp->bar0 + i;
*(volatile uint32_t *)bar = 0;
+ rte_write32(0, bar);
}
/* Ring channel doorbell */
bar = (uint8_t *)bp->bar0 + 0x100;
- *(volatile uint32_t *)bar = 1;
+ rte_write32(1, bar);
/* Poll for the valid bit */
for (i = 0; i < HWRM_CMD_TIMEOUT; i++) {
diff --git a/drivers/net/bnxt/bnxt_txr.h b/drivers/net/bnxt/bnxt_txr.h
index 4c16101..5b09711 100644
--- a/drivers/net/bnxt/bnxt_txr.h
+++ b/drivers/net/bnxt/bnxt_txr.h
@@ -34,12 +34,12 @@
#ifndef _BNXT_TXR_H_
#define _BNXT_TXR_H_
+#include
+
#define MAX_TX_RINGS 16
#define BNXT_TX_PUSH_THRESH 92
-#define B_TX_DB(db, prod) \
- rte_smp_wmb(); \
- (*(uint32_t *)db = (DB_KEY_TX | prod))
+#define B_TX_DB(db, prod) rte_write32((DB_KEY_TX | (prod)), db)
struct bnxt_tx_ring_info {
uint16_ttx_prod;
--
2.5.5
[dpdk-dev] [PATCH v2 17/29] net/bnx2x: use eal I/O device memory read/write API
From: Santosh Shukla
Replace the raw I/O device memory read/write access with eal abstraction
for I/O device memory read/write access to fix portability issues across
different architectures.
CC: Harish Patil
CC: Rasesh Mody
Signed-off-by: Santosh Shukla
Signed-off-by: Jerin Jacob
---
drivers/net/bnx2x/bnx2x.h | 26 ++
1 file changed, 10 insertions(+), 16 deletions(-)
diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h
index 5cefea4..59064d8 100644
--- a/drivers/net/bnx2x/bnx2x.h
+++ b/drivers/net/bnx2x/bnx2x.h
@@ -18,6 +18,7 @@
#include
#include
+#include
#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
#ifndef __LITTLE_ENDIAN
@@ -1419,8 +1420,7 @@ bnx2x_reg_write8(struct bnx2x_softc *sc, size_t offset,
uint8_t val)
{
PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%02x",
(unsigned long)offset, val);
- *((volatile uint8_t*)
- ((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
+ rte_write8(val, ((uint8_t *)sc->bar[BAR0].base_addr + offset));
}
static inline void
@@ -1433,8 +1433,8 @@ bnx2x_reg_write16(struct bnx2x_softc *sc, size_t offset,
uint16_t val)
#endif
PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%04x",
(unsigned long)offset, val);
- *((volatile uint16_t*)
- ((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
+ rte_write16(val, ((uint8_t *)sc->bar[BAR0].base_addr + offset));
+
}
static inline void
@@ -1448,8 +1448,7 @@ bnx2x_reg_write32(struct bnx2x_softc *sc, size_t offset,
uint32_t val)
PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x",
(unsigned long)offset, val);
- *((volatile uint32_t*)
- ((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
+ rte_write32(val, ((uint8_t *)sc->bar[BAR0].base_addr + offset));
}
static inline uint8_t
@@ -1457,8 +1456,7 @@ bnx2x_reg_read8(struct bnx2x_softc *sc, size_t offset)
{
uint8_t val;
- val = (uint8_t)(*((volatile uint8_t*)
- ((uintptr_t)sc->bar[BAR0].base_addr + offset)));
+ val = rte_read8((uint8_t *)sc->bar[BAR0].base_addr + offset);
PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%02x",
(unsigned long)offset, val);
@@ -1476,8 +1474,7 @@ bnx2x_reg_read16(struct bnx2x_softc *sc, size_t offset)
(unsigned long)offset);
#endif
- val = (uint16_t)(*((volatile uint16_t*)
- ((uintptr_t)sc->bar[BAR0].base_addr + offset)));
+ val = rte_read16(((uint8_t *)sc->bar[BAR0].base_addr + offset));
PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x",
(unsigned long)offset, val);
@@ -1495,8 +1492,7 @@ bnx2x_reg_read32(struct bnx2x_softc *sc, size_t offset)
(unsigned long)offset);
#endif
- val = (uint32_t)(*((volatile uint32_t*)
- ((uintptr_t)sc->bar[BAR0].base_addr + offset)));
+ val = rte_read32(((uint8_t *)sc->bar[BAR0].base_addr + offset));
PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x",
(unsigned long)offset, val);
@@ -1560,11 +1556,9 @@ bnx2x_reg_read32(struct bnx2x_softc *sc, size_t offset)
#define DPM_TRIGGER_TYPE 0x40
/* Doorbell macro */
-#define BNX2X_DB_WRITE(db_bar, val) \
- *((volatile uint32_t *)(db_bar)) = (val)
+#define BNX2X_DB_WRITE(db_bar, val) rte_write32_relaxed((val), (db_bar))
-#define BNX2X_DB_READ(db_bar) \
- *((volatile uint32_t *)(db_bar))
+#define BNX2X_DB_READ(db_bar) rte_read32_relaxed(db_bar)
#define DOORBELL_ADDR(sc, offset) \
(volatile uint32_t *)(((char *)(sc)->bar[BAR1].base_addr + (offset)))
--
2.5.5
[dpdk-dev] [PATCH v2 18/29] net/cxgbe: use eal I/O device memory read/write API
From: Santosh Shukla
Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.
CC: Rahul Lakkireddy
Signed-off-by: Santosh Shukla
Signed-off-by: Jerin Jacob
---
drivers/net/cxgbe/base/adapter.h | 34 --
drivers/net/cxgbe/cxgbe_compat.h | 8 +++-
drivers/net/cxgbe/sge.c | 10 +-
3 files changed, 40 insertions(+), 12 deletions(-)
diff --git a/drivers/net/cxgbe/base/adapter.h b/drivers/net/cxgbe/base/adapter.h
index 5e3bd50..beb1e3e 100644
--- a/drivers/net/cxgbe/base/adapter.h
+++ b/drivers/net/cxgbe/base/adapter.h
@@ -37,6 +37,7 @@
#define __T4_ADAPTER_H__
#include
+#include
#include "cxgbe_compat.h"
#include "t4_regs_values.h"
@@ -324,7 +325,7 @@ struct adapter {
int use_unpacked_mode; /* unpacked rx mode state */
};
-#define CXGBE_PCI_REG(reg) (*((volatile uint32_t *)(reg)))
+#define CXGBE_PCI_REG(reg) rte_read32(reg)
static inline uint64_t cxgbe_read_addr64(volatile void *addr)
{
@@ -350,16 +351,21 @@ static inline uint32_t cxgbe_read_addr(volatile void
*addr)
#define CXGBE_READ_REG64(adap, reg) \
cxgbe_read_addr64(CXGBE_PCI_REG_ADDR((adap), (reg)))
-#define CXGBE_PCI_REG_WRITE(reg, value) ({ \
- CXGBE_PCI_REG((reg)) = (value); })
+#define CXGBE_PCI_REG_WRITE(reg, value) rte_write32((value), (reg))
+
+#define CXGBE_PCI_REG_WRITE_RELAXED(reg, value) \
+ rte_write32_relaxed((value), (reg))
#define CXGBE_WRITE_REG(adap, reg, value) \
CXGBE_PCI_REG_WRITE(CXGBE_PCI_REG_ADDR((adap), (reg)), (value))
+#define CXGBE_WRITE_REG_RELAXED(adap, reg, value) \
+ CXGBE_PCI_REG_WRITE_RELAXED(CXGBE_PCI_REG_ADDR((adap), (reg)), (value))
+
static inline uint64_t cxgbe_write_addr64(volatile void *addr, uint64_t val)
{
- CXGBE_PCI_REG(addr) = val;
- CXGBE_PCI_REG(((volatile uint8_t *)(addr) + 4)) = (val >> 32);
+ CXGBE_PCI_REG_WRITE(addr, val);
+ CXGBE_PCI_REG_WRITE(((volatile uint8_t *)(addr) + 4), (val >> 32));
return val;
}
@@ -383,7 +389,7 @@ static inline u32 t4_read_reg(struct adapter *adapter, u32
reg_addr)
}
/**
- * t4_write_reg - write a HW register
+ * t4_write_reg - write a HW register with barrier
* @adapter: the adapter
* @reg_addr: the register address
* @val: the value to write
@@ -398,6 +404,22 @@ static inline void t4_write_reg(struct adapter *adapter,
u32 reg_addr, u32 val)
}
/**
+ * t4_write_reg_relaxed - write a HW register with no barrier
+ * @adapter: the adapter
+ * @reg_addr: the register address
+ * @val: the value to write
+ *
+ * Write a 32-bit value into the given HW register.
+ */
+static inline void t4_write_reg_relaxed(struct adapter *adapter, u32 reg_addr,
+ u32 val)
+{
+ CXGBE_DEBUG_REG(adapter, "setting register 0x%x to 0x%x\n", reg_addr,
+ val);
+ CXGBE_WRITE_REG_RELAXED(adapter, reg_addr, val);
+}
+
+/**
* t4_read_reg64 - read a 64-bit HW register
* @adapter: the adapter
* @reg_addr: the register address
diff --git a/drivers/net/cxgbe/cxgbe_compat.h b/drivers/net/cxgbe/cxgbe_compat.h
index e68f8f5..1551cbf 100644
--- a/drivers/net/cxgbe/cxgbe_compat.h
+++ b/drivers/net/cxgbe/cxgbe_compat.h
@@ -45,6 +45,7 @@
#include
#include
#include
+#include
#define dev_printf(level, fmt, args...) \
RTE_LOG(level, PMD, "rte_cxgbe_pmd: " fmt, ## args)
@@ -254,7 +255,7 @@ static inline unsigned long ilog2(unsigned long n)
static inline void writel(unsigned int val, volatile void __iomem *addr)
{
- *(volatile unsigned int *)addr = val;
+ rte_write32(val, addr);
}
static inline void writeq(u64 val, volatile void __iomem *addr)
@@ -263,4 +264,9 @@ static inline void writeq(u64 val, volatile void __iomem
*addr)
writel(val >> 32, (void *)((uintptr_t)addr + 4));
}
+static inline void writel_relaxed(unsigned int val, volatile void __iomem
*addr)
+{
+ rte_write32_relaxed(val, addr);
+}
+
#endif /* _CXGBE_COMPAT_H_ */
diff --git a/drivers/net/cxgbe/sge.c b/drivers/net/cxgbe/sge.c
index 736f08c..fc03a0c 100644
--- a/drivers/net/cxgbe/sge.c
+++ b/drivers/net/cxgbe/sge.c
@@ -338,12 +338,12 @@ static inline void ring_fl_db(struct adapter *adap,
struct sge_fl *q)
* mechanism.
*/
if (unlikely(!q->bar2_addr)) {
- t4_write_reg(adap, MYPF_REG(A_SGE_PF_KDOORBELL),
-val | V_QID(q->cntxt_id));
+ t4_write_reg_relaxed(adap, MYPF_REG(A_SGE_PF_KDOORBELL),
+val | V_QID(q->cntxt_id));
} else {
- writel(val | V_QID(q->bar2_qid),
- (void *)((uintptr_t)q->bar2_addr +
- SGE_UDB_KDOORBELL));
+ writel_relaxed(val | V_QID(q->bar2
[dpdk-dev] [PATCH v2 21/29] net/enic: use eal I/O device memory read/write API
From: Santosh Shukla
Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix portability
issues across different architectures.
CC: John Daley
CC: Nelson Escobar
Signed-off-by: Santosh Shukla
Signed-off-by: Jerin Jacob
---
drivers/net/enic/enic_compat.h | 27 +++
drivers/net/enic/enic_rxtx.c | 9 +
2 files changed, 24 insertions(+), 12 deletions(-)
diff --git a/drivers/net/enic/enic_compat.h b/drivers/net/enic/enic_compat.h
index 5dbd983..fc58bb4 100644
--- a/drivers/net/enic/enic_compat.h
+++ b/drivers/net/enic/enic_compat.h
@@ -41,6 +41,7 @@
#include
#include
#include
+#include
#define ENIC_PAGE_ALIGN 4096UL
#define ENIC_ALIGN ENIC_PAGE_ALIGN
@@ -95,42 +96,52 @@ typedef unsigned long long dma_addr_t;
static inline uint32_t ioread32(volatile void *addr)
{
- return *(volatile uint32_t *)addr;
+ return rte_read32(addr);
}
static inline uint16_t ioread16(volatile void *addr)
{
- return *(volatile uint16_t *)addr;
+ return rte_read16(addr);
}
static inline uint8_t ioread8(volatile void *addr)
{
- return *(volatile uint8_t *)addr;
+ return rte_read8(addr);
}
static inline void iowrite32(uint32_t val, volatile void *addr)
{
- *(volatile uint32_t *)addr = val;
+ rte_write32(val, addr);
+}
+
+static inline void iowrite32_relaxed(uint32_t val, volatile void *addr)
+{
+ rte_write32_relaxed(val, addr);
}
static inline void iowrite16(uint16_t val, volatile void *addr)
{
- *(volatile uint16_t *)addr = val;
+ rte_write16(val, addr);
}
static inline void iowrite8(uint8_t val, volatile void *addr)
{
- *(volatile uint8_t *)addr = val;
+ rte_write8(val, addr);
}
static inline unsigned int readl(volatile void __iomem *addr)
{
- return *(volatile unsigned int *)addr;
+ return rte_read32(addr);
+}
+
+static inline unsigned int readl_relaxed(volatile void __iomem *addr)
+{
+ return rte_read32_relaxed(addr);
}
static inline void writel(unsigned int val, volatile void __iomem *addr)
{
- *(volatile unsigned int *)addr = val;
+ rte_write32(val, addr);
}
#define min_t(type, x, y) ({\
diff --git a/drivers/net/enic/enic_rxtx.c b/drivers/net/enic/enic_rxtx.c
index f762a26..382d1ab 100644
--- a/drivers/net/enic/enic_rxtx.c
+++ b/drivers/net/enic/enic_rxtx.c
@@ -380,10 +380,11 @@ enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
rte_mb();
if (data_rq->in_use)
- iowrite32(data_rq->posted_index,
- &data_rq->ctrl->posted_index);
+ iowrite32_relaxed(data_rq->posted_index,
+ &data_rq->ctrl->posted_index);
rte_compiler_barrier();
- iowrite32(sop_rq->posted_index, &sop_rq->ctrl->posted_index);
+ iowrite32_relaxed(sop_rq->posted_index,
+ &sop_rq->ctrl->posted_index);
}
@@ -550,7 +551,7 @@ uint16_t enic_xmit_pkts(void *tx_queue, struct rte_mbuf
**tx_pkts,
}
post:
rte_wmb();
- iowrite32(head_idx, &wq->ctrl->posted_index);
+ iowrite32_relaxed(head_idx, &wq->ctrl->posted_index);
done:
wq->ring.desc_avail = wq_desc_avail;
wq->head_idx = head_idx;
--
2.5.5
[dpdk-dev] [PATCH v2 19/29] net/e1000: use eal I/O device memory read/write API
From: Santosh Shukla
Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.
CC: Wenzhuo Lu
Signed-off-by: Santosh Shukla
Signed-off-by: Jerin Jacob
---
drivers/net/e1000/base/e1000_osdep.h | 18 ++
drivers/net/e1000/em_rxtx.c | 2 +-
drivers/net/e1000/igb_rxtx.c | 2 +-
3 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/drivers/net/e1000/base/e1000_osdep.h
b/drivers/net/e1000/base/e1000_osdep.h
index 47a1948..b886804 100644
--- a/drivers/net/e1000/base/e1000_osdep.h
+++ b/drivers/net/e1000/base/e1000_osdep.h
@@ -44,6 +44,7 @@
#include
#include
#include
+#include
#include "../e1000_logs.h"
@@ -94,17 +95,18 @@ typedef int bool;
#define E1000_WRITE_FLUSH(a) E1000_READ_REG(a, E1000_STATUS)
-#define E1000_PCI_REG(reg) (*((volatile uint32_t *)(reg)))
+#define E1000_PCI_REG(reg) rte_read32(reg)
-#define E1000_PCI_REG16(reg) (*((volatile uint16_t *)(reg)))
+#define E1000_PCI_REG16(reg) rte_read16(reg)
-#define E1000_PCI_REG_WRITE(reg, value) do { \
- E1000_PCI_REG((reg)) = (rte_cpu_to_le_32(value)); \
-} while (0)
+#define E1000_PCI_REG_WRITE(reg, value)\
+ rte_write32((rte_cpu_to_le_32(value)), reg)
-#define E1000_PCI_REG_WRITE16(reg, value) do { \
- E1000_PCI_REG16((reg)) = (rte_cpu_to_le_16(value)); \
-} while (0)
+#define E1000_PCI_REG_WRITE_RELAXED(reg, value)\
+ rte_write32_relaxed((rte_cpu_to_le_32(value)), reg)
+
+#define E1000_PCI_REG_WRITE16(reg, value) \
+ rte_write16((rte_cpu_to_le_16(value)), reg)
#define E1000_PCI_REG_ADDR(hw, reg) \
((volatile uint32_t *)((char *)(hw)->hw_addr + (reg)))
diff --git a/drivers/net/e1000/em_rxtx.c b/drivers/net/e1000/em_rxtx.c
index 41f51c0..6ec38d4 100644
--- a/drivers/net/e1000/em_rxtx.c
+++ b/drivers/net/e1000/em_rxtx.c
@@ -610,7 +610,7 @@ eth_em_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
PMD_TX_LOG(DEBUG, "port_id=%u queue_id=%u tx_tail=%u nb_tx=%u",
(unsigned) txq->port_id, (unsigned) txq->queue_id,
(unsigned) tx_id, (unsigned) nb_tx);
- E1000_PCI_REG_WRITE(txq->tdt_reg_addr, tx_id);
+ E1000_PCI_REG_WRITE_RELAXED(txq->tdt_reg_addr, tx_id);
txq->tx_tail = tx_id;
return nb_tx;
diff --git a/drivers/net/e1000/igb_rxtx.c b/drivers/net/e1000/igb_rxtx.c
index dbd37ac..61edbfb 100644
--- a/drivers/net/e1000/igb_rxtx.c
+++ b/drivers/net/e1000/igb_rxtx.c
@@ -605,7 +605,7 @@ eth_igb_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/*
* Set the Transmit Descriptor Tail (TDT).
*/
- E1000_PCI_REG_WRITE(txq->tdt_reg_addr, tx_id);
+ E1000_PCI_REG_WRITE_RELAXED(txq->tdt_reg_addr, tx_id);
PMD_TX_LOG(DEBUG, "port_id=%u queue_id=%u tx_tail=%u nb_tx=%u",
(unsigned) txq->port_id, (unsigned) txq->queue_id,
(unsigned) tx_id, (unsigned) nb_tx);
--
2.5.5
[dpdk-dev] [PATCH v2 20/29] net/ena: use eal I/O device memory read/write API
From: Santosh Shukla
Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.
CC: Jan Medala
CC: Jakub Palider
Signed-off-by: Santosh Shukla
Signed-off-by: Jerin Jacob
Acked-by: Jan Medala
---
drivers/net/ena/base/ena_eth_com.h | 2 +-
drivers/net/ena/base/ena_plat_dpdk.h | 11 +--
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ena/base/ena_eth_com.h
b/drivers/net/ena/base/ena_eth_com.h
index 71a880c..ee62685 100644
--- a/drivers/net/ena/base/ena_eth_com.h
+++ b/drivers/net/ena/base/ena_eth_com.h
@@ -118,7 +118,7 @@ static inline int ena_com_write_sq_doorbell(struct
ena_com_io_sq *io_sq)
ena_trc_dbg("write submission queue doorbell for queue: %d tail: %d\n",
io_sq->qid, tail);
- ENA_REG_WRITE32(tail, io_sq->db_addr);
+ ENA_REG_WRITE32_RELAXED(tail, io_sq->db_addr);
return 0;
}
diff --git a/drivers/net/ena/base/ena_plat_dpdk.h
b/drivers/net/ena/base/ena_plat_dpdk.h
index 87c3bf1..09d540a 100644
--- a/drivers/net/ena/base/ena_plat_dpdk.h
+++ b/drivers/net/ena/base/ena_plat_dpdk.h
@@ -48,6 +48,7 @@
#include
#include
#include
+#include
#include
@@ -226,15 +227,21 @@ typedef uint64_t dma_addr_t;
static inline void writel(u32 value, volatile void *addr)
{
- *(volatile u32 *)addr = value;
+ rte_write32(value, addr);
+}
+
+static inline void writel_relaxed(u32 value, volatile void *addr)
+{
+ rte_write32_relaxed(value, addr);
}
static inline u32 readl(const volatile void *addr)
{
- return *(const volatile u32 *)addr;
+ return rte_read32(addr);
}
#define ENA_REG_WRITE32(value, reg) writel((value), (reg))
+#define ENA_REG_WRITE32_RELAXED(value, reg) writel_relaxed((value), (reg))
#define ENA_REG_READ32(reg) readl((reg))
#define ATOMIC32_INC(i32_ptr) rte_atomic32_inc(i32_ptr)
--
2.5.5
[dpdk-dev] [PATCH v2 22/29] net/fm10k: use eal I/O device memory read/write API
From: Santosh Shukla
Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.
CC: Jing Chen
Signed-off-by: Santosh Shukla
Signed-off-by: Jerin Jacob
---
drivers/net/fm10k/base/fm10k_osdep.h | 17 +
1 file changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/net/fm10k/base/fm10k_osdep.h
b/drivers/net/fm10k/base/fm10k_osdep.h
index a21daa2..f07b678 100644
--- a/drivers/net/fm10k/base/fm10k_osdep.h
+++ b/drivers/net/fm10k/base/fm10k_osdep.h
@@ -39,6 +39,8 @@ POSSIBILITY OF SUCH DAMAGE.
#include
#include
#include
+#include
+
#include "../fm10k_logs.h"
/* TODO: this does not look like it should be used... */
@@ -88,17 +90,16 @@ typedef intbool;
#endif
/* offsets are WORD offsets, not BYTE offsets */
-#define FM10K_WRITE_REG(hw, reg, val)\
- volatile uint32_t *)(hw)->hw_addr)[(reg)]) = ((uint32_t)(val)))
-#define FM10K_READ_REG(hw, reg) \
- (((volatile uint32_t *)(hw)->hw_addr)[(reg)])
+#define FM10K_WRITE_REG(hw, reg, val) \
+ rte_write32((val), ((hw)->hw_addr + (reg)))
+
+#define FM10K_READ_REG(hw, reg) rte_read32(((hw)->hw_addr + (reg)))
+
#define FM10K_WRITE_FLUSH(a) FM10K_READ_REG(a, FM10K_CTRL)
-#define FM10K_PCI_REG(reg) (*((volatile uint32_t *)(reg)))
+#define FM10K_PCI_REG(reg) rte_read32(reg)
-#define FM10K_PCI_REG_WRITE(reg, value) do { \
- FM10K_PCI_REG((reg)) = (value); \
-} while (0)
+#define FM10K_PCI_REG_WRITE(reg, value) rte_write32((value), (reg))
/* not implemented */
#define FM10K_READ_PCI_WORD(hw, reg) 0
--
2.5.5
[dpdk-dev] [PATCH v2 23/29] net/i40e: use eal I/O device memory read/write API
From: Santosh Shukla
Replace the raw I/O device memory read/write access with eal abstraction
for I/O device memory read/write access to fix portability issues across
different architectures.
CC: Helin Zhang
CC: Jingjing Wu
Signed-off-by: Santosh Shukla
Signed-off-by: Satha Rao
Signed-off-by: Jerin Jacob
---
drivers/net/i40e/base/i40e_osdep.h | 10 +++---
drivers/net/i40e/i40e_rxtx.c | 4 ++--
2 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/net/i40e/base/i40e_osdep.h
b/drivers/net/i40e/base/i40e_osdep.h
index 38e7ba5..c57ecde 100644
--- a/drivers/net/i40e/base/i40e_osdep.h
+++ b/drivers/net/i40e/base/i40e_osdep.h
@@ -44,6 +44,7 @@
#include
#include
#include
+#include
#include "../i40e_logs.h"
@@ -153,15 +154,18 @@ do {
\
* I40E_PRTQF_FD_MSK
*/
-#define I40E_PCI_REG(reg) (*((volatile uint32_t *)(reg)))
+#define I40E_PCI_REG(reg) rte_read32(reg)
#define I40E_PCI_REG_ADDR(a, reg) \
((volatile uint32_t *)((char *)(a)->hw_addr + (reg)))
static inline uint32_t i40e_read_addr(volatile void *addr)
{
return rte_le_to_cpu_32(I40E_PCI_REG(addr));
}
-#define I40E_PCI_REG_WRITE(reg, value) \
- do { I40E_PCI_REG((reg)) = rte_cpu_to_le_32(value); } while (0)
+
+#define I40E_PCI_REG_WRITE(reg, value) \
+ rte_write32((rte_cpu_to_le_32(value)), reg)
+#define I40E_PCI_REG_WRITE_RELAXED(reg, value) \
+ rte_write32_relaxed((rte_cpu_to_le_32(value)), reg)
#define I40E_WRITE_FLUSH(a) I40E_READ_REG(a, I40E_GLGEN_STAT)
#define I40EVF_WRITE_FLUSH(a) I40E_READ_REG(a, I40E_VFGEN_RSTAT)
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
index 7ae7d9f..5c41a90 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -1228,7 +1228,7 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
uint16_t nb_pkts)
(unsigned) txq->port_id, (unsigned) txq->queue_id,
(unsigned) tx_id, (unsigned) nb_tx);
- I40E_PCI_REG_WRITE(txq->qtx_tail, tx_id);
+ I40E_PCI_REG_WRITE_RELAXED(txq->qtx_tail, tx_id);
txq->tx_tail = tx_id;
return nb_tx;
@@ -1380,7 +1380,7 @@ tx_xmit_pkts(struct i40e_tx_queue *txq,
/* Update the tx tail register */
rte_wmb();
- I40E_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail);
+ I40E_PCI_REG_WRITE_RELAXED(txq->qtx_tail, txq->tx_tail);
return nb_pkts;
}
--
2.5.5
[dpdk-dev] [PATCH v2 24/29] net/ixgbe: use eal I/O device memory read/write API
From: Santosh Shukla
Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.
CC: Helin Zhang
CC: Konstantin Ananyev
Signed-off-by: Santosh Shukla
Signed-off-by: Jerin Jacob
---
drivers/net/ixgbe/base/ixgbe_osdep.h | 11 +++
drivers/net/ixgbe/ixgbe_rxtx.c | 13 +++--
2 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ixgbe/base/ixgbe_osdep.h
b/drivers/net/ixgbe/base/ixgbe_osdep.h
index 77f0af5..9b874b8 100644
--- a/drivers/net/ixgbe/base/ixgbe_osdep.h
+++ b/drivers/net/ixgbe/base/ixgbe_osdep.h
@@ -44,6 +44,7 @@
#include
#include
#include
+#include
#include "../ixgbe_logs.h"
#include "../ixgbe_bypass_defines.h"
@@ -121,16 +122,18 @@ typedef int bool;
#define prefetch(x) rte_prefetch0(x)
-#define IXGBE_PCI_REG(reg) (*((volatile uint32_t *)(reg)))
+#define IXGBE_PCI_REG(reg) rte_read32(reg)
static inline uint32_t ixgbe_read_addr(volatile void* addr)
{
return rte_le_to_cpu_32(IXGBE_PCI_REG(addr));
}
-#define IXGBE_PCI_REG_WRITE(reg, value) do { \
- IXGBE_PCI_REG((reg)) = (rte_cpu_to_le_32(value)); \
-} while(0)
+#define IXGBE_PCI_REG_WRITE(reg, value)\
+ rte_write32((rte_cpu_to_le_32(value)), reg)
+
+#define IXGBE_PCI_REG_WRITE_RELAXED(reg, value)\
+ rte_write32_relaxed((rte_cpu_to_le_32(value)), reg)
#define IXGBE_PCI_REG_ADDR(hw, reg) \
((volatile uint32_t *)((char *)(hw)->hw_addr + (reg)))
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index b2d9f45..81544bb 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -321,7 +321,7 @@ tx_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
/* update tail pointer */
rte_wmb();
- IXGBE_PCI_REG_WRITE(txq->tdt_reg_addr, txq->tx_tail);
+ IXGBE_PCI_REG_WRITE_RELAXED(txq->tdt_reg_addr, txq->tx_tail);
return nb_pkts;
}
@@ -897,7 +897,7 @@ ixgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
PMD_TX_LOG(DEBUG, "port_id=%u queue_id=%u tx_tail=%u nb_tx=%u",
(unsigned) txq->port_id, (unsigned) txq->queue_id,
(unsigned) tx_id, (unsigned) nb_tx);
- IXGBE_PCI_REG_WRITE(txq->tdt_reg_addr, tx_id);
+ IXGBE_PCI_REG_WRITE_RELAXED(txq->tdt_reg_addr, tx_id);
txq->tx_tail = tx_id;
return nb_tx;
@@ -1581,7 +1581,8 @@ rx_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
/* update tail pointer */
rte_wmb();
- IXGBE_PCI_REG_WRITE(rxq->rdt_reg_addr, cur_free_trigger);
+ IXGBE_PCI_REG_WRITE_RELAXED(rxq->rdt_reg_addr,
+ cur_free_trigger);
}
if (rxq->rx_tail >= rxq->nb_rx_desc)
@@ -1985,8 +1986,8 @@ ixgbe_recv_pkts_lro(void *rx_queue, struct rte_mbuf
**rx_pkts, uint16_t nb_pkts,
if (!ixgbe_rx_alloc_bufs(rxq, false)) {
rte_wmb();
- IXGBE_PCI_REG_WRITE(rxq->rdt_reg_addr,
- next_rdt);
+ IXGBE_PCI_REG_WRITE_RELAXED(rxq->rdt_reg_addr,
+ next_rdt);
nb_hold -= rxq->rx_free_thresh;
} else {
PMD_RX_LOG(DEBUG, "RX bulk alloc failed "
@@ -2157,7 +2158,7 @@ ixgbe_recv_pkts_lro(void *rx_queue, struct rte_mbuf
**rx_pkts, uint16_t nb_pkts,
rxq->port_id, rxq->queue_id, rx_id, nb_hold, nb_rx);
rte_wmb();
- IXGBE_PCI_REG_WRITE(rxq->rdt_reg_addr, prev_id);
+ IXGBE_PCI_REG_WRITE_RELAXED(rxq->rdt_reg_addr, prev_id);
nb_hold = 0;
}
--
2.5.5
[dpdk-dev] [PATCH v2 27/29] net/thunderx: use eal I/O device memory read/write API
Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix portability
issues across different architectures.
Signed-off-by: Jerin Jacob
---
drivers/net/thunderx/base/nicvf_plat.h | 36 --
1 file changed, 4 insertions(+), 32 deletions(-)
diff --git a/drivers/net/thunderx/base/nicvf_plat.h
b/drivers/net/thunderx/base/nicvf_plat.h
index 83c1844..3754e1b 100644
--- a/drivers/net/thunderx/base/nicvf_plat.h
+++ b/drivers/net/thunderx/base/nicvf_plat.h
@@ -69,31 +69,15 @@
#include
#define NICVF_MAC_ADDR_SIZE ETHER_ADDR_LEN
+#include
+#define nicvf_addr_write(addr, val) rte_write64_relaxed((val), (void *)(addr))
+#define nicvf_addr_read(addr) rte_read64_relaxed((void *)(addr))
+
/* ARM64 specific functions */
#if defined(RTE_ARCH_ARM64)
#define nicvf_prefetch_store_keep(_ptr) ({\
asm volatile("prfm pstl1keep, %a0\n" : : "p" (_ptr)); })
-static inline void __attribute__((always_inline))
-nicvf_addr_write(uintptr_t addr, uint64_t val)
-{
- asm volatile(
- "str %x[val], [%x[addr]]"
- :
- : [val] "r" (val), [addr] "r" (addr));
-}
-
-static inline uint64_t __attribute__((always_inline))
-nicvf_addr_read(uintptr_t addr)
-{
- uint64_t val;
-
- asm volatile(
- "ldr %x[val], [%x[addr]]"
- : [val] "=r" (val)
- : [addr] "r" (addr));
- return val;
-}
#define NICVF_LOAD_PAIR(reg1, reg2, addr) ({ \
asm volatile( \
@@ -106,18 +90,6 @@ nicvf_addr_read(uintptr_t addr)
#define nicvf_prefetch_store_keep(_ptr) do {} while (0)
-static inline void __attribute__((always_inline))
-nicvf_addr_write(uintptr_t addr, uint64_t val)
-{
- *(volatile uint64_t *)addr = val;
-}
-
-static inline uint64_t __attribute__((always_inline))
-nicvf_addr_read(uintptr_t addr)
-{
- return *(volatile uint64_t *)addr;
-}
-
#define NICVF_LOAD_PAIR(reg1, reg2, addr) \
do { \
reg1 = nicvf_addr_read((uintptr_t)addr);\
--
2.5.5
[dpdk-dev] [PATCH v2 25/29] net/nfp: use eal I/O device memory read/write API
From: Santosh Shukla
Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.
CC: Alejandro Lucero
Signed-off-by: Santosh Shukla
Signed-off-by: Jerin Jacob
---
drivers/net/nfp/nfp_net_pmd.h | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/net/nfp/nfp_net_pmd.h b/drivers/net/nfp/nfp_net_pmd.h
index c180972..f11b32e 100644
--- a/drivers/net/nfp/nfp_net_pmd.h
+++ b/drivers/net/nfp/nfp_net_pmd.h
@@ -121,25 +121,26 @@ struct nfp_net_adapter;
#define NFD_CFG_MINOR_VERSION_of(x) (((x) >> 0) & 0xff)
#include
+#include
static inline uint8_t nn_readb(volatile const void *addr)
{
- return *((volatile const uint8_t *)(addr));
+ return rte_read8(addr);
}
static inline void nn_writeb(uint8_t val, volatile void *addr)
{
- *((volatile uint8_t *)(addr)) = val;
+ rte_write8(val, addr);
}
static inline uint32_t nn_readl(volatile const void *addr)
{
- return *((volatile const uint32_t *)(addr));
+ return rte_read32(addr);
}
static inline void nn_writel(uint32_t val, volatile void *addr)
{
- *((volatile uint32_t *)(addr)) = val;
+ rte_write32(val, addr);
}
static inline uint64_t nn_readq(volatile void *addr)
--
2.5.5
[dpdk-dev] [PATCH v2 26/29] net/qede: use eal I/O device memory read/write API
From: Santosh Shukla
Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.
CC: Harish Patil
CC: Rasesh Mody
Signed-off-by: Santosh Shukla
Signed-off-by: Jerin Jacob
---
drivers/net/qede/base/bcm_osal.h | 20 +++-
drivers/net/qede/base/ecore_int_api.h | 28 +++-
drivers/net/qede/base/ecore_spq.c | 3 ++-
drivers/net/qede/qede_rxtx.c | 2 +-
4 files changed, 37 insertions(+), 16 deletions(-)
diff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h
index 0b446f2..33d43c6 100644
--- a/drivers/net/qede/base/bcm_osal.h
+++ b/drivers/net/qede/base/bcm_osal.h
@@ -18,6 +18,7 @@
#include
#include
#include
+#include
/* Forward declaration */
struct ecore_dev;
@@ -113,18 +114,18 @@ void *osal_dma_alloc_coherent_aligned(struct ecore_dev *,
dma_addr_t *,
/* HW reads/writes */
-#define DIRECT_REG_RD(_dev, _reg_addr) \
- (*((volatile u32 *) (_reg_addr)))
+#define DIRECT_REG_RD(_dev, _reg_addr) rte_read32(_reg_addr)
#define REG_RD(_p_hwfn, _reg_offset) \
DIRECT_REG_RD(_p_hwfn, \
((u8 *)(uintptr_t)(_p_hwfn->regview) + (_reg_offset)))
-#define DIRECT_REG_WR16(_reg_addr, _val) \
- (*((volatile u16 *)(_reg_addr)) = _val)
+#define DIRECT_REG_WR16(_reg_addr, _val) rte_write16((_val), (_reg_addr))
-#define DIRECT_REG_WR(_dev, _reg_addr, _val) \
- (*((volatile u32 *)(_reg_addr)) = _val)
+#define DIRECT_REG_WR(_dev, _reg_addr, _val) rte_write32((_val), (_reg_addr))
+
+#define DIRECT_REG_WR_RELAXED(_dev, _reg_addr, _val) \
+ rte_write32_relaxed((_val), (_reg_addr))
#define REG_WR(_p_hwfn, _reg_offset, _val) \
DIRECT_REG_WR(NULL, \
@@ -134,9 +135,10 @@ void *osal_dma_alloc_coherent_aligned(struct ecore_dev *,
dma_addr_t *,
DIRECT_REG_WR16(((u8 *)(uintptr_t)(_p_hwfn->regview) + \
(_reg_offset)), (u16)_val)
-#define DOORBELL(_p_hwfn, _db_addr, _val) \
- DIRECT_REG_WR(_p_hwfn, \
-((u8 *)(uintptr_t)(_p_hwfn->doorbells) + (_db_addr)), (u32)_val)
+#define DOORBELL(_p_hwfn, _db_addr, _val) \
+ DIRECT_REG_WR_RELAXED((_p_hwfn),\
+ ((u8 *)(uintptr_t)(_p_hwfn->doorbells) + \
+ (_db_addr)), (u32)_val)
/* Mutexes */
diff --git a/drivers/net/qede/base/ecore_int_api.h
b/drivers/net/qede/base/ecore_int_api.h
index fc873e7..a0d6a43 100644
--- a/drivers/net/qede/base/ecore_int_api.h
+++ b/drivers/net/qede/base/ecore_int_api.h
@@ -120,19 +120,37 @@ static OSAL_INLINE void __internal_ram_wr(void *p_hwfn,
}
#ifdef ECORE_CONFIG_DIRECT_HWFN
+static OSAL_INLINE void __internal_ram_wr_relaxed(struct ecore_hwfn *p_hwfn,
+ void OSAL_IOMEM * addr,
+ int size, u32 *data)
+#else
+static OSAL_INLINE void __internal_ram_wr_relaxed(void *p_hwfn,
+ void OSAL_IOMEM * addr,
+ int size, u32 *data)
+#endif
+{
+ unsigned int i;
+
+ for (i = 0; i < size / sizeof(*data); i++)
+ DIRECT_REG_WR_RELAXED(p_hwfn, &((u32 OSAL_IOMEM *)addr)[i],
+ data[i]);
+}
+
+#ifdef ECORE_CONFIG_DIRECT_HWFN
static OSAL_INLINE void internal_ram_wr(struct ecore_hwfn *p_hwfn,
- void OSAL_IOMEM *addr,
- int size, u32 *data)
+ void OSAL_IOMEM * addr,
+ int size, u32 *data)
{
- __internal_ram_wr(p_hwfn, addr, size, data);
+ __internal_ram_wr_relaxed(p_hwfn, addr, size, data);
}
#else
static OSAL_INLINE void internal_ram_wr(void OSAL_IOMEM *addr,
- int size, u32 *data)
+ int size, u32 *data)
{
- __internal_ram_wr(OSAL_NULL, addr, size, data);
+ __internal_ram_wr_relaxed(OSAL_NULL, addr, size, data);
}
#endif
+
#endif
struct ecore_hwfn;
diff --git a/drivers/net/qede/base/ecore_spq.c
b/drivers/net/qede/base/ecore_spq.c
index 0d744dd..6e5ce5d 100644
--- a/drivers/net/qede/base/ecore_spq.c
+++ b/drivers/net/qede/base/ecore_spq.c
@@ -248,7 +248,8 @@ static enum _ecore_status_t ecore_spq_hw_post(struct
ecore_hwfn *p_hwfn,
/* make sure the SPQE is updated before the doorbell */
OSAL_WMB(p_hwfn->p_dev);
- DOORBELL(p_hwfn, DB_ADDR(p_spq->cid, DQ_DEMS_LEGACY), *(u32 *)&db);
+ DOORBELL(p_hwfn, DB_ADDR(p_spq->cid, DQ_DEMS_LEGACY),
+*(u32 *)&db);
/* make sure doorbell is rang */
OSAL_WMB(p_hwfn->p_dev);
diff --git a/drivers/net/qe
[dpdk-dev] [PATCH v2 28/29] net/virtio: use eal I/O device memory read/write API
From: Santosh Shukla
Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.
CC: Huawei Xie
CC: Yuanhan Liu
Signed-off-by: Santosh Shukla
Signed-off-by: Jerin Jacob
Acked-by: Yuanhan Liu
---
drivers/net/virtio/virtio_pci.c | 97 +
1 file changed, 31 insertions(+), 66 deletions(-)
diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c
index 9b47165..7c1cb4c 100644
--- a/drivers/net/virtio/virtio_pci.c
+++ b/drivers/net/virtio/virtio_pci.c
@@ -37,6 +37,8 @@
#include
#endif
+#include
+
#include "virtio_pci.h"
#include "virtio_logs.h"
#include "virtqueue.h"
@@ -316,48 +318,11 @@ static const struct virtio_pci_ops legacy_ops = {
.notify_queue = legacy_notify_queue,
};
-
-static inline uint8_t
-io_read8(uint8_t *addr)
-{
- return *(volatile uint8_t *)addr;
-}
-
-static inline void
-io_write8(uint8_t val, uint8_t *addr)
-{
- *(volatile uint8_t *)addr = val;
-}
-
-static inline uint16_t
-io_read16(uint16_t *addr)
-{
- return *(volatile uint16_t *)addr;
-}
-
-static inline void
-io_write16(uint16_t val, uint16_t *addr)
-{
- *(volatile uint16_t *)addr = val;
-}
-
-static inline uint32_t
-io_read32(uint32_t *addr)
-{
- return *(volatile uint32_t *)addr;
-}
-
-static inline void
-io_write32(uint32_t val, uint32_t *addr)
-{
- *(volatile uint32_t *)addr = val;
-}
-
static inline void
io_write64_twopart(uint64_t val, uint32_t *lo, uint32_t *hi)
{
- io_write32(val & ((1ULL << 32) - 1), lo);
- io_write32(val >> 32,hi);
+ rte_write32(val & ((1ULL << 32) - 1), lo);
+ rte_write32(val >> 32, hi);
}
static void
@@ -369,13 +334,13 @@ modern_read_dev_config(struct virtio_hw *hw, size_t
offset,
uint8_t old_gen, new_gen;
do {
- old_gen = io_read8(&hw->common_cfg->config_generation);
+ old_gen = rte_read8(&hw->common_cfg->config_generation);
p = dst;
for (i = 0; i < length; i++)
- *p++ = io_read8((uint8_t *)hw->dev_cfg + offset + i);
+ *p++ = rte_read8((uint8_t *)hw->dev_cfg + offset + i);
- new_gen = io_read8(&hw->common_cfg->config_generation);
+ new_gen = rte_read8(&hw->common_cfg->config_generation);
} while (old_gen != new_gen);
}
@@ -387,7 +352,7 @@ modern_write_dev_config(struct virtio_hw *hw, size_t offset,
const uint8_t *p = src;
for (i = 0; i < length; i++)
- io_write8(*p++, (uint8_t *)hw->dev_cfg + offset + i);
+ rte_write8((*p++), (((uint8_t *)hw->dev_cfg) + offset + i));
}
static uint64_t
@@ -395,11 +360,11 @@ modern_get_features(struct virtio_hw *hw)
{
uint32_t features_lo, features_hi;
- io_write32(0, &hw->common_cfg->device_feature_select);
- features_lo = io_read32(&hw->common_cfg->device_feature);
+ rte_write32(0, &hw->common_cfg->device_feature_select);
+ features_lo = rte_read32(&hw->common_cfg->device_feature);
- io_write32(1, &hw->common_cfg->device_feature_select);
- features_hi = io_read32(&hw->common_cfg->device_feature);
+ rte_write32(1, &hw->common_cfg->device_feature_select);
+ features_hi = rte_read32(&hw->common_cfg->device_feature);
return ((uint64_t)features_hi << 32) | features_lo;
}
@@ -407,25 +372,25 @@ modern_get_features(struct virtio_hw *hw)
static void
modern_set_features(struct virtio_hw *hw, uint64_t features)
{
- io_write32(0, &hw->common_cfg->guest_feature_select);
- io_write32(features & ((1ULL << 32) - 1),
- &hw->common_cfg->guest_feature);
+ rte_write32(0, &hw->common_cfg->guest_feature_select);
+ rte_write32(features & ((1ULL << 32) - 1),
+ &hw->common_cfg->guest_feature);
- io_write32(1, &hw->common_cfg->guest_feature_select);
- io_write32(features >> 32,
- &hw->common_cfg->guest_feature);
+ rte_write32(1, &hw->common_cfg->guest_feature_select);
+ rte_write32(features >> 32,
+ &hw->common_cfg->guest_feature);
}
static uint8_t
modern_get_status(struct virtio_hw *hw)
{
- return io_read8(&hw->common_cfg->device_status);
+ return rte_read8(&hw->common_cfg->device_status);
}
static void
modern_set_status(struct virtio_hw *hw, uint8_t status)
{
- io_write8(status, &hw->common_cfg->device_status);
+ rte_write8(status, &hw->common_cfg->device_status);
}
static void
@@ -438,21 +403,21 @@ modern_reset(struct virtio_hw *hw)
static uint8_t
modern_get_isr(struct virtio_hw *hw)
{
- return io_read8(hw->isr);
+ return rte_read8(hw->isr);
}
static uint16_t
modern_set_config_irq(struct virtio_hw *hw, uint16_t vec)
{
- io_write16(vec, &
[dpdk-dev] [PATCH v2 29/29] net/vmxnet3: use eal I/O device memory read/write API
From: Santosh Shukla
Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.
CC: Yong Wang
Signed-off-by: Santosh Shukla
Signed-off-by: Jerin Jacob
---
drivers/net/vmxnet3/vmxnet3_ethdev.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/vmxnet3/vmxnet3_ethdev.h
b/drivers/net/vmxnet3/vmxnet3_ethdev.h
index 7d3b11e..85c00e4 100644
--- a/drivers/net/vmxnet3/vmxnet3_ethdev.h
+++ b/drivers/net/vmxnet3/vmxnet3_ethdev.h
@@ -34,6 +34,8 @@
#ifndef _VMXNET3_ETHDEV_H_
#define _VMXNET3_ETHDEV_H_
+#include
+
#define VMXNET3_MAX_MAC_ADDRS 1
/* UPT feature to negotiate */
@@ -120,7 +122,7 @@ struct vmxnet3_hw {
/* Config space read/writes */
-#define VMXNET3_PCI_REG(reg) (*((volatile uint32_t *)(reg)))
+#define VMXNET3_PCI_REG(reg) rte_read32(reg)
static inline uint32_t
vmxnet3_read_addr(volatile void *addr)
@@ -128,9 +130,7 @@ vmxnet3_read_addr(volatile void *addr)
return VMXNET3_PCI_REG(addr);
}
-#define VMXNET3_PCI_REG_WRITE(reg, value) do { \
- VMXNET3_PCI_REG((reg)) = (value); \
-} while(0)
+#define VMXNET3_PCI_REG_WRITE(reg, value) rte_write32((value), (reg))
#define VMXNET3_PCI_BAR0_REG_ADDR(hw, reg) \
((volatile uint32_t *)((char *)(hw)->hw_addr0 + (reg)))
--
2.5.5
[dpdk-dev] [PATCH v2 0/4] eal/common: introduce rte_memset and related test
DPDK code has met performance drop badly in some case when calling glibc function memset. Reference to discussions about memset in http://dpdk.org/ml/archives/dev/2016-October/048628.html It is necessary to introduce more high efficient function to fix it. One important thing about rte_memset is that we can get clear control on what instruction flow is used. This patchset introduces rte_memset to bring more high efficient implementation, and will bring obvious perf improvement, especially for small N bytes in the most application scenarios. Patch 1 implements rte_memset in the file rte_memset.h on IA platform The file supports three types of instruction sets including sse & avx (128bits), avx2(256bits) and avx512(512bits). rte_memset makes use of vectorization and inline function to improve the perf on IA. In addition, cache line and memory alignment are fully taken into consideration. Patch 2 implements functional autotest to validates the function whether to work in a right way. Patch 3 implements performance autotest separately in cache and memory. We can see the perf of rte_memset is obviously better than glibc memset especially for small N bytes. Patch 4 Using rte_memset instead of copy_virtio_net_hdr can bring 3%~4% performance improvements on IA platform from virtio/vhost non-mergeable loopback testing. Changes in V2: Patch 1: Rename rte_memset.h -> rte_memset_64.h and create a file rte_memset.h for each arch. Patch 3: add the perf comparation data between rte_memset and memset on haswell. Patch 4: Modify release_17_02.rst description. Zhiyong Yang (4): eal/common: introduce rte_memset on IA platform app/test: add functional autotest for rte_memset app/test: add performance autotest for rte_memset lib/librte_vhost: improve vhost perf using rte_memset app/test/Makefile | 3 + app/test/test_memset.c | 158 + app/test/test_memset_perf.c| 348 +++ doc/guides/rel_notes/release_17_02.rst | 7 + .../common/include/arch/arm/rte_memset.h | 36 ++ .../common/include/arch/ppc_64/rte_memset.h| 36 ++ .../common/include/arch/tile/rte_memset.h | 36 ++ .../common/include/arch/x86/rte_memset.h | 51 +++ .../common/include/arch/x86/rte_memset_64.h| 378 + lib/librte_eal/common/include/generic/rte_memset.h | 52 +++ lib/librte_vhost/virtio_net.c | 18 +- 11 files changed, 1116 insertions(+), 7 deletions(-) create mode 100644 app/test/test_memset.c create mode 100644 app/test/test_memset_perf.c create mode 100644 lib/librte_eal/common/include/arch/arm/rte_memset.h create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_memset.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_memset.h create mode 100644 lib/librte_eal/common/include/arch/x86/rte_memset.h create mode 100644 lib/librte_eal/common/include/arch/x86/rte_memset_64.h create mode 100644 lib/librte_eal/common/include/generic/rte_memset.h -- 2.7.4
[dpdk-dev] [PATCH v2 3/4] app/test: add performance autotest for rte_memset
The file implements the perf autotest for rte_memset. The perf data
can be gotten compared between rte_memset and memset when you run it.
We can see the perf of rte_memset obviously is better than glibc memset
especially for small N bytes.
The first column shows the N size for memset & rte_memset.
The second column lists a set of numbers for rte_memset Vs memset perf
in cache.
The third column lists a set of numbers for rte_memset Vs memset perf
in memory.
The following data is gotten on haswell.
** rte_memset() - memset perf tests
(C = compile-time constant) **
=== ===
Size memset in cache memset in mem
(bytes)(ticks)(ticks)
--- -- ---
= 32B aligned
1 3 -8 14 - 115
3 4 -8 19 - 125
6 3 -7 19 - 125
8 3 -6 19 - 124
12 3 -6 19 - 124
15 3 -6 19 - 125
16 3 -8 13 - 125
32 3 -7 19 - 133
64 3 -7 28 - 162
65 6 -8 41 - 182
128 6 - 13 54 - 199
192 8 - 13 77 - 273
255 8 - 16 100 - 222
512 17 - 14 187 - 247
768 22 - 20 270 - 362
1024 29 - 28 329 - 377
2048 63 - 57 564 - 601
4096 104 - 102 993 - 1025
8192 200 - 2111831 - 2270
-- -- -- --
C 6 2 -2 19 - 19
C64 2 -6 28 - 33
C 128 3 - 12 54 - 59
C 192 5 - 29 77 - 83
C 256 6 - 35 100 - 105
C 512 12 - 60 188 - 195
C 768 18 - 20 271 - 362
C 1024 24 - 29 329 - 377
Signed-off-by: Zhiyong Yang
---
Change in V2:
Add perf comparation data between rte_memset and memset on haswell.
app/test/Makefile | 1 +
app/test/test_memset_perf.c | 348
2 files changed, 349 insertions(+)
create mode 100644 app/test/test_memset_perf.c
diff --git a/app/test/Makefile b/app/test/Makefile
index 82da3f3..1c3e7f1 100644
--- a/app/test/Makefile
+++ b/app/test/Makefile
@@ -124,6 +124,7 @@ SRCS-y += test_memcpy.c
SRCS-y += test_memcpy_perf.c
SRCS-y += test_memset.c
+SRCS-y += test_memset_perf.c
SRCS-$(CONFIG_RTE_LIBRTE_HASH) += test_hash.c
SRCS-$(CONFIG_RTE_LIBRTE_HASH) += test_thash.c
diff --git a/app/test/test_memset_perf.c b/app/test/test_memset_perf.c
new file mode 100644
index 000..83b15b5
--- /dev/null
+++ b/app/test/test_memset_perf.c
@@ -0,0 +1,348 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "test.h"
+
+/*
+ * Set this to the maximum buffer size you want to test. If it is 0, then the
+ * values in the buf_sizes[] array below will be used.
+ */
+#define TEST_VALUE_RANGE0
+
+/* List of buffer sizes to test */
+#if TEST_VALUE_RANGE == 0
+static size_t buf_sizes[] = {
+ 1, 2, 3, 4, 5, 6, 7, 8, 9, 12, 15, 16, 17, 31, 32, 33, 63, 64, 65,
+ 70, 85, 96, 105, 115, 127, 128, 129, 161, 191, 192, 193, 255, 256,
+ 257, 319
[dpdk-dev] [PATCH v2 2/4] app/test: add functional autotest for rte_memset
The file implements the functional autotest for rte_memset, which
validates the new function rte_memset whether to work in a right
way. The implementation of test_memcpy.c is used as a reference.
Usage:
step 1: run ./x86_64-native-linuxapp-gcc/app/test
step 2: run command memset_autotest at the run time.
Signed-off-by: Zhiyong Yang
---
app/test/Makefile | 2 +
app/test/test_memset.c | 158 +
2 files changed, 160 insertions(+)
create mode 100644 app/test/test_memset.c
diff --git a/app/test/Makefile b/app/test/Makefile
index 5be023a..82da3f3 100644
--- a/app/test/Makefile
+++ b/app/test/Makefile
@@ -123,6 +123,8 @@ SRCS-y += test_logs.c
SRCS-y += test_memcpy.c
SRCS-y += test_memcpy_perf.c
+SRCS-y += test_memset.c
+
SRCS-$(CONFIG_RTE_LIBRTE_HASH) += test_hash.c
SRCS-$(CONFIG_RTE_LIBRTE_HASH) += test_thash.c
SRCS-$(CONFIG_RTE_LIBRTE_HASH) += test_hash_perf.c
diff --git a/app/test/test_memset.c b/app/test/test_memset.c
new file mode 100644
index 000..c9020bf
--- /dev/null
+++ b/app/test/test_memset.c
@@ -0,0 +1,158 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "test.h"
+
+/*
+ * Set this to the maximum buffer size you want to test. If it is 0, then the
+ * values in the buf_sizes[] array below will be used.
+ */
+#define TEST_VALUE_RANGE 0
+#define MAX_INT8 127
+#define MIN_INT8 -128
+/* List of buffer sizes to test */
+#if TEST_VALUE_RANGE == 0
+static size_t buf_sizes[] = {
+ 0, 1, 7, 8, 9, 15, 16, 17, 31, 32, 33, 63, 64, 65, 127, 128, 129,
+ 255, 256, 257, 320, 384, 511, 512, 513, 1023, 1024, 1025, 1518,
+ 1522, 1600, 2048, 3072, 4096, 5120, 6144, 7168, 8192
+};
+/* MUST be as large as largest packet size above */
+#define BUFFER_SIZE 8192
+#else /* TEST_VALUE_RANGE != 0 */
+static size_t buf_sizes[TEST_VALUE_RANGE];
+#define BUFFER_SIZE TEST_VALUE_RANGE
+#endif /* TEST_VALUE_RANGE == 0 */
+
+/* Data is aligned on this many bytes (power of 2) */
+#define ALIGNMENT_UNIT 32
+
+/*
+ * Create two buffers, and initialize the one as the reference buffer with
+ * random values. Another(dest_buff) is assigned by the reference buffer.
+ * Set some memory area of dest_buff by using ch and then compare to see
+ * if the rte_memset is successful. The bytes outside the setted area are
+ * also checked to make sure they are not changed.
+ */
+static int
+test_single_memset(unsigned int off_dst, int ch, size_t size)
+{
+ unsigned int i;
+ uint8_t dest_buff[BUFFER_SIZE + ALIGNMENT_UNIT];
+ uint8_t ref_buff[BUFFER_SIZE + ALIGNMENT_UNIT];
+ void *ret;
+
+ /* Setup buffers */
+ for (i = 0; i < BUFFER_SIZE + ALIGNMENT_UNIT; i++) {
+ ref_buff[i] = (uint8_t) rte_rand();
+ dest_buff[i] = ref_buff[i];
+ }
+ /* Do the rte_memset */
+ ret = rte_memset(dest_buff + off_dst, ch, size);
+ if (ret != (dest_buff + off_dst)) {
+ printf("rte_memset() returned %p, not %p\n",
+ ret, dest_buff + off_dst);
+ }
+ /* Check nothing before offset was affected */
+ for (i = 0; i < off_dst; i++) {
+ if (dest_buff[i] != ref_buff[i]) {
+ print
[dpdk-dev] [PATCH v2 1/4] eal/common: introduce rte_memset on IA platform
Performance drop has been caused in some cases when DPDK code calls glibc function memset. please reference to discussions about memset in http://dpdk.org/ml/archives/dev/2016-October/048628.html It is necessary to introduce more high efficient function to fix it. One important thing about rte_memset is that we can get clear control on what instruction flow is used. This patch supports instruction sets such as sse & avx(128 bits), avx2(256 bits) and avx512(512bits). rte_memset makes full use of vectorization and inline function to improve the perf on IA. In addition, cache line and memory alignment are fully taken into consideration. Signed-off-by: Zhiyong Yang --- Changes in V2: Rename rte_memset.h -> rte_memset_64.h and create a file rte_memset.h for each arch. .../common/include/arch/arm/rte_memset.h | 36 ++ .../common/include/arch/ppc_64/rte_memset.h| 36 ++ .../common/include/arch/tile/rte_memset.h | 36 ++ .../common/include/arch/x86/rte_memset.h | 51 +++ .../common/include/arch/x86/rte_memset_64.h| 378 + lib/librte_eal/common/include/generic/rte_memset.h | 52 +++ 6 files changed, 589 insertions(+) create mode 100644 lib/librte_eal/common/include/arch/arm/rte_memset.h create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_memset.h create mode 100644 lib/librte_eal/common/include/arch/tile/rte_memset.h create mode 100644 lib/librte_eal/common/include/arch/x86/rte_memset.h create mode 100644 lib/librte_eal/common/include/arch/x86/rte_memset_64.h create mode 100644 lib/librte_eal/common/include/generic/rte_memset.h diff --git a/lib/librte_eal/common/include/arch/arm/rte_memset.h b/lib/librte_eal/common/include/arch/arm/rte_memset.h new file mode 100644 index 000..6945f6d --- /dev/null +++ b/lib/librte_eal/common/include/arch/arm/rte_memset.h @@ -0,0 +1,36 @@ +/* + * BSD LICENSE + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of RehiveTech nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RTE_MEMSET_ARM_H_ +#define _RTE_MEMSET_ARM_H_ + +#define rte_memset memset + +#endif /* _RTE_MEMSET_ARM_H_ */ diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_memset.h b/lib/librte_eal/common/include/arch/ppc_64/rte_memset.h new file mode 100644 index 000..0d73f05 --- /dev/null +++ b/lib/librte_eal/common/include/arch/ppc_64/rte_memset.h @@ -0,0 +1,36 @@ +/* + * BSD LICENSE + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of IBM Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER
[dpdk-dev] [PATCH v2 4/4] lib/librte_vhost: improve vhost perf using rte_memset
Using rte_memset instead of copy_virtio_net_hdr can bring 3%~4%
performance improvements on IA platform from virtio/vhost
non-mergeable loopback testing.
Two key points have been considered:
1. One variable initialization could be saved, which involves memory
store.
2. copy_virtio_net_hdr involves both load (from stack, the virtio_hdr
var) and store (to virtio driver memory), while rte_memset just involves
store.
Signed-off-by: Zhiyong Yang
---
Changes in V2:
Modify release_17_02.rst description.
doc/guides/rel_notes/release_17_02.rst | 7 +++
lib/librte_vhost/virtio_net.c | 18 +++---
2 files changed, 18 insertions(+), 7 deletions(-)
diff --git a/doc/guides/rel_notes/release_17_02.rst
b/doc/guides/rel_notes/release_17_02.rst
index 180af82..3d39cde 100644
--- a/doc/guides/rel_notes/release_17_02.rst
+++ b/doc/guides/rel_notes/release_17_02.rst
@@ -52,6 +52,13 @@ New Features
See the :ref:`Generic flow API ` documentation for more
information.
+* **Introduced rte_memset on IA platform.**
+
+ Performance drop had been caused in some cases on Ivybridge when DPDK code
calls
+ glibc function memset. It was necessary to introduce more high efficient
function
+ to replace it. The function rte_memset supported three types of instruction
sets
+ including sse & avx(128 bits), avx2(256 bits) and avx512(512bits) and have
better
+ performance than glibc memset.
Resolved Issues
---
diff --git a/lib/librte_vhost/virtio_net.c b/lib/librte_vhost/virtio_net.c
index 595f67c..392b31b 100644
--- a/lib/librte_vhost/virtio_net.c
+++ b/lib/librte_vhost/virtio_net.c
@@ -37,6 +37,7 @@
#include
#include
+#include
#include
#include
#include
@@ -194,7 +195,7 @@ copy_mbuf_to_desc(struct virtio_net *dev, struct vring_desc
*descs,
uint32_t cpy_len;
struct vring_desc *desc;
uint64_t desc_addr;
- struct virtio_net_hdr_mrg_rxbuf virtio_hdr = {{0, 0, 0, 0, 0, 0}, 0};
+ struct virtio_net_hdr *virtio_hdr;
desc = &descs[desc_idx];
desc_addr = gpa_to_vva(dev, desc->addr);
@@ -208,8 +209,9 @@ copy_mbuf_to_desc(struct virtio_net *dev, struct vring_desc
*descs,
rte_prefetch0((void *)(uintptr_t)desc_addr);
- virtio_enqueue_offload(m, &virtio_hdr.hdr);
- copy_virtio_net_hdr(dev, desc_addr, virtio_hdr);
+ virtio_hdr = (struct virtio_net_hdr *)(uintptr_t)desc_addr;
+ rte_memset(virtio_hdr, 0, sizeof(*virtio_hdr));
+ virtio_enqueue_offload(m, virtio_hdr);
vhost_log_write(dev, desc->addr, dev->vhost_hlen);
PRINT_PACKET(dev, (uintptr_t)desc_addr, dev->vhost_hlen, 0);
@@ -459,7 +461,6 @@ static inline int __attribute__((always_inline))
copy_mbuf_to_desc_mergeable(struct virtio_net *dev, struct rte_mbuf *m,
struct buf_vector *buf_vec, uint16_t num_buffers)
{
- struct virtio_net_hdr_mrg_rxbuf virtio_hdr = {{0, 0, 0, 0, 0, 0}, 0};
uint32_t vec_idx = 0;
uint64_t desc_addr;
uint32_t mbuf_offset, mbuf_avail;
@@ -480,7 +481,6 @@ copy_mbuf_to_desc_mergeable(struct virtio_net *dev, struct
rte_mbuf *m,
hdr_phys_addr = buf_vec[vec_idx].buf_addr;
rte_prefetch0((void *)(uintptr_t)hdr_addr);
- virtio_hdr.num_buffers = num_buffers;
LOG_DEBUG(VHOST_DATA, "(%d) RX: num merge buffers %d\n",
dev->vid, num_buffers);
@@ -512,8 +512,12 @@ copy_mbuf_to_desc_mergeable(struct virtio_net *dev, struct
rte_mbuf *m,
}
if (hdr_addr) {
- virtio_enqueue_offload(hdr_mbuf, &virtio_hdr.hdr);
- copy_virtio_net_hdr(dev, hdr_addr, virtio_hdr);
+ struct virtio_net_hdr_mrg_rxbuf *hdr =
+ (struct virtio_net_hdr_mrg_rxbuf *)(uintptr_t)hdr_addr;
+
+ rte_memset(&(hdr->hdr), 0, sizeof(hdr->hdr));
+ hdr->num_buffers = num_buffers;
+ virtio_enqueue_offload(hdr_mbuf, &(hdr->hdr));
vhost_log_write(dev, hdr_phys_addr, dev->vhost_hlen);
PRINT_PACKET(dev, (uintptr_t)hdr_addr,
dev->vhost_hlen, 0);
--
2.7.4
[dpdk-dev] [PATCH 1/2] net/ixgbe: remove unused global variable
Removed unused "reg_info" global variable from ixgbe driver.
cat build/app/testpmd.map | grep "Allocating common symbols" -A 15
Allocating common symbols
Common symbol sizefile
reg_info0x18build/lib/librte_pmd_ixgbe.a(ixgbe_ethdev.o)
Signed-off-by: Jerin Jacob
---
drivers/net/ixgbe/ixgbe_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ixgbe/ixgbe_regs.h b/drivers/net/ixgbe/ixgbe_regs.h
index 773e169..2aa4820 100644
--- a/drivers/net/ixgbe/ixgbe_regs.h
+++ b/drivers/net/ixgbe/ixgbe_regs.h
@@ -41,7 +41,7 @@ struct reg_info {
uint32_t count;
uint32_t stride;
const char *name;
-} reg_info;
+};
static const struct reg_info ixgbe_regs_general[] = {
{IXGBE_CTRL, 1, 1, "IXGBE_CTRL"},
--
2.5.5
[dpdk-dev] [PATCH 2/2] app/testpmd: remove explicit ixgbe link request
Removed explicit ixgbe driver linkage request from app/testpmd makefile to mk/rte.app.mk to 1)Maintain the correct link ordering(from higher level libraries to lower level libraries) 2)In shared lib configuration, any application can use ixgbe exposed pmd specific APIs not just testpmd. Signed-off-by: Jerin Jacob --- app/test-pmd/Makefile | 2 -- mk/rte.app.mk | 2 +- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/app/test-pmd/Makefile b/app/test-pmd/Makefile index 5988c3e..96e0c67 100644 --- a/app/test-pmd/Makefile +++ b/app/test-pmd/Makefile @@ -59,8 +59,6 @@ SRCS-y += csumonly.c SRCS-y += icmpecho.c SRCS-$(CONFIG_RTE_LIBRTE_IEEE1588) += ieee1588fwd.c -_LDLIBS-$(CONFIG_RTE_LIBRTE_IXGBE_PMD) += -lrte_pmd_ixgbe - CFLAGS_cmdline.o := -D_GNU_SOURCE # this application needs libraries first diff --git a/mk/rte.app.mk b/mk/rte.app.mk index f75f0e2..aee235c 100644 --- a/mk/rte.app.mk +++ b/mk/rte.app.mk @@ -101,6 +101,7 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_CFGFILE)+= -lrte_cfgfile _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_BOND) += -lrte_pmd_bond _LDLIBS-$(CONFIG_RTE_LIBRTE_PMD_XENVIRT)+= -lrte_pmd_xenvirt -lxenstore +_LDLIBS-$(CONFIG_RTE_LIBRTE_IXGBE_PMD) += -lrte_pmd_ixgbe ifeq ($(CONFIG_RTE_BUILD_SHARED_LIB),n) # plugins (link only if static libraries) @@ -114,7 +115,6 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_ENA_PMD)+= -lrte_pmd_ena _LDLIBS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += -lrte_pmd_enic _LDLIBS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += -lrte_pmd_fm10k _LDLIBS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += -lrte_pmd_i40e -_LDLIBS-$(CONFIG_RTE_LIBRTE_IXGBE_PMD) += -lrte_pmd_ixgbe _LDLIBS-$(CONFIG_RTE_LIBRTE_MLX4_PMD) += -lrte_pmd_mlx4 -libverbs _LDLIBS-$(CONFIG_RTE_LIBRTE_MLX5_PMD) += -lrte_pmd_mlx5 -libverbs _LDLIBS-$(CONFIG_RTE_LIBRTE_MPIPE_PMD) += -lrte_pmd_mpipe -lgxio -- 2.5.5
Re: [dpdk-dev] [PATCH] net/mlx5: fix multi segment packet send
Hi Shahaf,
On Mon, Dec 26, 2016 at 05:28:36PM +0200, Shahaf Shuler wrote:
> Dseg pointer is not initialised when the first segment is inlined
> causing a segmentation fault in such situation.
>
> Fixes: 2a66cf378954 ("net/mlx5: support inline send")
>
> CC: sta...@dpdk.org
> Signed-off-by: Shahaf Shuler
Thanks for fixing this bug, a few comments below.
> ---
> drivers/net/mlx5/mlx5_rxtx.c | 6 +-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c
> index 97810e8..d6688c6 100644
> --- a/drivers/net/mlx5/mlx5_rxtx.c
> +++ b/drivers/net/mlx5/mlx5_rxtx.c
> @@ -483,7 +483,7 @@
> assert(addr <= addr_end);
> }
> /*
> - * 2 DWORDs consumed by the WQE header + 1 DSEG +
> + * 2 DWORDs consumed by the WQE header + ETH segment +
>* the size of the inline part of the packet.
>*/
> ds = 2 + MLX5_WQE_DS(pkt_inline_sz - 2);
> @@ -498,6 +498,10 @@
> } else if (!segs_n) {
> goto next_pkt;
> } else {
> + /* dseg will be advance as part of next_seg*/
Nit-picking here, there is a missing space in the above comment.
> + dseg = (volatile rte_v128u32_t *)
rte_v128u32_t does not exist (yet) in the tree, this patch therefore depends
on "eal: define generic vector types" [1]. Such dependencies should be
mentioned as a notes section of a patch (after a three-dash line).
Regarding sta...@dpdk.org, un case the vector types patch is not applied on
the stable branch, you'll also have to provide your own definition.
> + ((uintptr_t)wqe +
> + ((ds - 1) * MLX5_WQE_DWORD_SIZE));
> goto next_seg;
> }
> } else {
> --
> 1.8.3.1
>
Otherwise,
Acked-by: Adrien Mazarguil
[1] http://dpdk.org/ml/archives/dev/2016-November/050261.html
--
Adrien Mazarguil
6WIND
[dpdk-dev] [PATCH v3 0/4] new API 'rte_eth_dev_fw_info_get'
These four patches added a new function ``rte_eth_dev_fwver_get()`` to fetch firmware related information by a given device. Information include major firmware version, minor firmware version, patch number and etrack id. Qiming Yang (4): ethdev: add firmware information get net/e1000: add firmware version get net/ixgbe: add firmware version get net/i40e: add firmware version get doc/guides/nics/features/default.ini | 1 + doc/guides/nics/features/i40e.ini | 1 + doc/guides/nics/features/igb.ini | 1 + doc/guides/nics/features/ixgbe.ini | 1 + doc/guides/rel_notes/release_17_02.rst | 4 drivers/net/e1000/igb_ethdev.c | 43 ++ drivers/net/i40e/i40e_ethdev.c | 15 drivers/net/ixgbe/ixgbe_ethdev.c | 17 ++ lib/librte_ether/rte_ethdev.c | 14 +++ lib/librte_ether/rte_ethdev.h | 23 ++ lib/librte_ether/rte_ether_version.map | 1 + 11 files changed, 121 insertions(+) -- 2.7.4
[dpdk-dev] [PATCH v3 2/4] net/e1000: add firmware version get
This patch adds a new function eth_igb_fw_version_get.
Signed-off-by: Qiming Yang
---
v3 changes:
* use eth_igb_fw_version_get(struct rte_eth_dev *dev, u32 *fw_major,
u32 *fw_minor, u32 *fw_minor, u32 *fw_patch, u32 *etrack_id) instead
of eth_igb_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
int fw_length). Add statusment in /doc/guides/nics/features/igb.ini.
---
---
doc/guides/nics/features/igb.ini | 1 +
drivers/net/e1000/igb_ethdev.c | 43
2 files changed, 44 insertions(+)
diff --git a/doc/guides/nics/features/igb.ini b/doc/guides/nics/features/igb.ini
index 9fafe72..ffd87ba 100644
--- a/doc/guides/nics/features/igb.ini
+++ b/doc/guides/nics/features/igb.ini
@@ -39,6 +39,7 @@ EEPROM dump = Y
Registers dump = Y
BSD nic_uio = Y
Linux UIO= Y
+FW version = Y
Linux VFIO = Y
x86-32 = Y
x86-64 = Y
diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c
index 4a15447..25344b7 100644
--- a/drivers/net/e1000/igb_ethdev.c
+++ b/drivers/net/e1000/igb_ethdev.c
@@ -120,6 +120,8 @@ static int eth_igb_xstats_get_names(struct rte_eth_dev *dev,
unsigned limit);
static void eth_igb_stats_reset(struct rte_eth_dev *dev);
static void eth_igb_xstats_reset(struct rte_eth_dev *dev);
+static void eth_igb_fw_version_get(struct rte_eth_dev *dev, u32 *fw_major,
+ u32 *fw_minor, u32 *fw_patch, u32 *etrack_id);
static void eth_igb_infos_get(struct rte_eth_dev *dev,
struct rte_eth_dev_info *dev_info);
static const uint32_t *eth_igb_supported_ptypes_get(struct rte_eth_dev *dev);
@@ -389,6 +391,7 @@ static const struct eth_dev_ops eth_igb_ops = {
.xstats_get_names = eth_igb_xstats_get_names,
.stats_reset = eth_igb_stats_reset,
.xstats_reset = eth_igb_xstats_reset,
+ .fw_version_get = eth_igb_fw_version_get,
.dev_infos_get= eth_igb_infos_get,
.dev_supported_ptypes_get = eth_igb_supported_ptypes_get,
.mtu_set = eth_igb_mtu_set,
@@ -1981,6 +1984,46 @@ eth_igbvf_stats_reset(struct rte_eth_dev *dev)
}
static void
+eth_igb_fw_version_get(struct rte_eth_dev *dev, u32 *fw_major, u32 *fw_minor,
+ u32 *fw_patch, u32 *etrack_id)
+{
+ struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ struct e1000_fw_version fw;
+
+ e1000_get_fw_version(hw, &fw);
+
+ switch (hw->mac.type) {
+ case e1000_i210:
+ case e1000_i211:
+ if (!(e1000_get_flash_presence_i210(hw))) {
+ *fw_major = fw.invm_major;
+ *fw_minor = fw.invm_minor;
+ break;
+ }
+ /* fall through */
+ default:
+ /* if option rom is valid, display its version too*/
+ if (fw.or_valid) {
+ *fw_major = fw.eep_major;
+ *fw_minor = fw.eep_minor;
+ *etrack_id = fw.etrack_id;
+ *fw_patch = fw.or_patch;
+ /* no option rom */
+ } else {
+ if (fw.etrack_id != 0X) {
+ *fw_major = fw.eep_major;
+ *fw_minor = fw.eep_minor;
+ *etrack_id = fw.etrack_id;
+ } else {
+ *fw_major = fw.eep_major;
+ *fw_minor = fw.eep_minor;
+ }
+ }
+ break;
+ }
+}
+
+static void
eth_igb_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
{
struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
--
2.7.4
[dpdk-dev] [PATCH v3 1/4] ethdev: add firmware information get
This patch adds a new API 'rte_eth_dev_fw_info_get' for fetching
firmware related information by a given device.
Signed-off-by: Qiming Yang
Acked-by: Remy Horton
---
v2 changes:
* modified some comment statements.
v3 changes:
* change API, use rte_eth_dev_fw_info_get(uint8_t port_id,
uint32_t *fw_major, uint32_t *fw_minor, uint32_t *fw_patch,
uint32_t *etrack_id) instead of rte_eth_dev_fwver_get(uint8_t port_id,
char *fw_version, int fw_length).
Add statusment in /doc/guides/nics/features/default.ini and
release_17_02.rst.
---
---
doc/guides/nics/features/default.ini | 1 +
doc/guides/rel_notes/release_17_02.rst | 4
lib/librte_ether/rte_ethdev.c | 14 ++
lib/librte_ether/rte_ethdev.h | 23 +++
lib/librte_ether/rte_ether_version.map | 1 +
5 files changed, 43 insertions(+)
diff --git a/doc/guides/nics/features/default.ini
b/doc/guides/nics/features/default.ini
index f1bf9bf..8237ee4 100644
--- a/doc/guides/nics/features/default.ini
+++ b/doc/guides/nics/features/default.ini
@@ -66,3 +66,4 @@ x86-64 =
Usage doc=
Design doc =
Perf doc =
+FW version =
diff --git a/doc/guides/rel_notes/release_17_02.rst
b/doc/guides/rel_notes/release_17_02.rst
index 180af82..f6dc6c0 100644
--- a/doc/guides/rel_notes/release_17_02.rst
+++ b/doc/guides/rel_notes/release_17_02.rst
@@ -52,6 +52,10 @@ New Features
See the :ref:`Generic flow API ` documentation for more
information.
+* **Added firmware information get API.**
+ Added a new function ``rte_eth_dev_fw_info_get()`` to fetch firmware related
+ information by a given device. Information include major firmware version,
+ minor firmware version, patch number and etrack id.
Resolved Issues
---
diff --git a/lib/librte_ether/rte_ethdev.c b/lib/librte_ether/rte_ethdev.c
index 280f0db..f399f09 100644
--- a/lib/librte_ether/rte_ethdev.c
+++ b/lib/librte_ether/rte_ethdev.c
@@ -1586,6 +1586,20 @@ rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id,
uint16_t rx_queue_id,
}
void
+rte_eth_dev_fw_info_get(uint8_t port_id, uint32_t *fw_major, uint32_t
*fw_minor,
+ uint32_t *fw_patch, uint32_t *etrack_id)
+{
+ struct rte_eth_dev *dev;
+
+ RTE_ETH_VALID_PORTID_OR_RET(port_id);
+ dev = &rte_eth_devices[port_id];
+
+ RTE_FUNC_PTR_OR_RET(*dev->dev_ops->fw_version_get);
+ (*dev->dev_ops->fw_version_get)(dev, fw_major, fw_minor,
+ fw_patch, etrack_id);
+}
+
+void
rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
{
struct rte_eth_dev *dev;
diff --git a/lib/librte_ether/rte_ethdev.h b/lib/librte_ether/rte_ethdev.h
index fb51754..829f652 100644
--- a/lib/librte_ether/rte_ethdev.h
+++ b/lib/librte_ether/rte_ethdev.h
@@ -1150,6 +1150,11 @@ typedef uint32_t (*eth_rx_queue_count_t)(struct
rte_eth_dev *dev,
typedef int (*eth_rx_descriptor_done_t)(void *rxq, uint16_t offset);
/**< @internal Check DD bit of specific RX descriptor */
+typedef void (*eth_fw_version_get_t)(struct rte_eth_dev *dev,
+ uint32_t *fw_major, uint32_t *fw_minor,
+ uint32_t *fw_patch, uint32_t *etrack_id);
+/**< @internal Get firmware information of an Ethernet device. */
+
typedef void (*eth_rxq_info_get_t)(struct rte_eth_dev *dev,
uint16_t rx_queue_id, struct rte_eth_rxq_info *qinfo);
@@ -1457,6 +1462,7 @@ struct eth_dev_ops {
eth_txq_info_get_t txq_info_get; /**< retrieve TX queue
information. */
eth_dev_supported_ptypes_get_t dev_supported_ptypes_get;
/**< Get packet types supported and identified by device. */
+ eth_fw_version_get_t fw_version_get; /**< Get firmware version. */
vlan_filter_set_t vlan_filter_set; /**< Filter VLAN Setup. */
vlan_tpid_set_tvlan_tpid_set; /**< Outer/Inner VLAN TPID
Setup. */
@@ -2395,6 +2401,23 @@ void rte_eth_macaddr_get(uint8_t port_id, struct
ether_addr *mac_addr);
void rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info);
/**
+ * Retrieve the firmware version of a device.
+ *
+ * @param port_id
+ * The port identifier of the device.
+ * @param fw_major
+ * A array pointer to store the major firmware version of a device.
+ * @param fw_minor
+ * A array pointer to store the minor firmware version of a device.
+ * @param fw_patch
+ * A array pointer to store the firmware patch number of a device.
+ * @param etrack_id
+ * A array pointer to store the nvm version of a device.
+ */
+void rte_eth_dev_fw_info_get(uint8_t port_id, uint32_t *fw_major,
+ uint32_t *fw_minor, uint32_t *fw_patch, uint32_t *etrack_id);
+
+/**
* Retrieve the supported packet types of an Ethernet device.
*
* When a packet type is announced as supported, it *must* be recognized by
diff --git a/lib/librte_ether/rte_ether_version.map
b/lib/librte_ether/rte_ether_version.map
index a02
[dpdk-dev] [PATCH v3 3/4] net/ixgbe: add firmware version get
This patch add a new function ixgbe_fw_version_get.
Signed-off-by: Qiming Yang
---
v3 changes:
* use ixgbe_fw_version_get(struct rte_eth_dev *dev,
__rte_unused u32 *fw_major, __rte_unused u32 *fw_minor,
__rte_unused u32 *fw_patch, u32 *etrack_id) instead of
ixgbe_fw_version_get(struct rte_eth_dev *dev, char *fw_version,
int fw_length). Add statusment in /doc/guides/nics/features/ixgbe.ini.
---
---
doc/guides/nics/features/ixgbe.ini | 1 +
drivers/net/ixgbe/ixgbe_ethdev.c | 17 +
2 files changed, 18 insertions(+)
diff --git a/doc/guides/nics/features/ixgbe.ini
b/doc/guides/nics/features/ixgbe.ini
index 4a5667f..e4a0830 100644
--- a/doc/guides/nics/features/ixgbe.ini
+++ b/doc/guides/nics/features/ixgbe.ini
@@ -52,3 +52,4 @@ Linux VFIO = Y
ARMv8= Y
x86-32 = Y
x86-64 = Y
+FW_version = Y
diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c
index ec2edad..e2234c0 100644
--- a/drivers/net/ixgbe/ixgbe_ethdev.c
+++ b/drivers/net/ixgbe/ixgbe_ethdev.c
@@ -193,6 +193,9 @@ static int ixgbe_dev_queue_stats_mapping_set(struct
rte_eth_dev *eth_dev,
uint16_t queue_id,
uint8_t stat_idx,
uint8_t is_rx);
+static void ixgbe_fw_version_get(struct rte_eth_dev *dev,
+ __rte_unused u32 *fw_major, __rte_unused u32 *fw_minor,
+ __rte_unused u32 *fw_patch, u32 *etrack_id);
static void ixgbe_dev_info_get(struct rte_eth_dev *dev,
struct rte_eth_dev_info *dev_info);
static const uint32_t *ixgbe_dev_supported_ptypes_get(struct rte_eth_dev *dev);
@@ -538,6 +541,7 @@ static const struct eth_dev_ops ixgbe_eth_dev_ops = {
.xstats_reset = ixgbe_dev_xstats_reset,
.xstats_get_names = ixgbe_dev_xstats_get_names,
.queue_stats_mapping_set = ixgbe_dev_queue_stats_mapping_set,
+ .fw_version_get = ixgbe_fw_version_get,
.dev_infos_get= ixgbe_dev_info_get,
.dev_supported_ptypes_get = ixgbe_dev_supported_ptypes_get,
.mtu_set = ixgbe_dev_mtu_set,
@@ -3029,6 +3033,19 @@ ixgbevf_dev_stats_reset(struct rte_eth_dev *dev)
}
static void
+ixgbe_fw_version_get(struct rte_eth_dev *dev, __rte_unused u32 *fw_major,
+ __rte_unused u32 *fw_minor, __rte_unused u32 *fw_patch, u32 *etrack_id)
+{
+ struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+ u16 eeprom_verh, eeprom_verl;
+
+ ixgbe_read_eeprom(hw, 0x2e, &eeprom_verh);
+ ixgbe_read_eeprom(hw, 0x2d, &eeprom_verl);
+
+ *etrack_id = (eeprom_verh << 16) | eeprom_verl;
+}
+
+static void
ixgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
{
struct rte_pci_device *pci_dev = IXGBE_DEV_TO_PCI(dev);
--
2.7.4
[dpdk-dev] [PATCH v3 4/4] net/i40e: add firmware version get
This patch add a new function i40e_fw_version_get.
Signed-off-by: Qiming Yang
---
v3 changes:
* use i40e_fw_version_get(struct rte_eth_dev *dev, u32 *fw_major,
u32 *fw_minor, __rte_unused u32 *fw_patch, u32 *etrack_id)
instead of i40e_fw_version_get(struct rte_eth_dev *dev,
char *fw_version, int fw_length). Add statusment in
/doc/guides/nics/features/i40e.ini.
---
---
doc/guides/nics/features/i40e.ini | 1 +
drivers/net/i40e/i40e_ethdev.c| 15 +++
2 files changed, 16 insertions(+)
diff --git a/doc/guides/nics/features/i40e.ini
b/doc/guides/nics/features/i40e.ini
index 0d143bc..6dab9f7 100644
--- a/doc/guides/nics/features/i40e.ini
+++ b/doc/guides/nics/features/i40e.ini
@@ -46,3 +46,4 @@ Linux VFIO = Y
x86-32 = Y
x86-64 = Y
ARMv8= Y
+FW version = Y
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 8f63044..1dbbcc4 100644
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -324,6 +324,8 @@ static int i40e_dev_queue_stats_mapping_set(struct
rte_eth_dev *dev,
uint16_t queue_id,
uint8_t stat_idx,
uint8_t is_rx);
+static void i40e_fw_version_get(struct rte_eth_dev *dev, u32 *fw_major,
+ u32 *fw_minor, __rte_unused u32 *fw_patch, u32 *etrack_id);
static void i40e_dev_info_get(struct rte_eth_dev *dev,
struct rte_eth_dev_info *dev_info);
static int i40e_vlan_filter_set(struct rte_eth_dev *dev,
@@ -503,6 +505,7 @@ static const struct eth_dev_ops i40e_eth_dev_ops = {
.stats_reset = i40e_dev_stats_reset,
.xstats_reset = i40e_dev_stats_reset,
.queue_stats_mapping_set = i40e_dev_queue_stats_mapping_set,
+ .fw_version_get = i40e_fw_version_get,
.dev_infos_get= i40e_dev_info_get,
.dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
.vlan_filter_set = i40e_vlan_filter_set,
@@ -2590,6 +2593,18 @@ i40e_dev_queue_stats_mapping_set(__rte_unused struct
rte_eth_dev *dev,
}
static void
+i40e_fw_version_get(struct rte_eth_dev *dev, u32 *fw_major, u32 *fw_minor,
+ __rte_unused u32 *fw_patch, u32 *etrack_id)
+{
+ struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
+
+ *fw_major = (hw->nvm.version >> 12) & 0xf;
+ *fw_minor = ((hw->nvm.version >> 4) & 0xff) * 10 +
+ (hw->nvm.version & 0xf);
+ *etrack_id = hw->nvm.eetrack;
+}
+
+static void
i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
{
struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
--
2.7.4
Re: [dpdk-dev] [PATCH v2 15/17] net/i40e: add flow flush function
Hi Beilei,
On Tue, Dec 27, 2016 at 02:26:22PM +0800, Beilei Xing wrote:
> This patch adds i40e_flow_flush function to flush all
> filters for users. And flow director flush function
> is involved first.
>
> Signed-off-by: Beilei Xing
> ---
> drivers/net/i40e/i40e_ethdev.h | 3 +++
> drivers/net/i40e/i40e_fdir.c | 8 ++--
> drivers/net/i40e/i40e_flow.c | 46
> ++
> 3 files changed, 51 insertions(+), 6 deletions(-)
[...]
> diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
[...]
> +static int
> +i40e_fdir_filter_flush(struct i40e_pf *pf)
> +{
> + struct rte_eth_dev *dev = pf->adapter->eth_dev;
> + struct i40e_fdir_info *fdir_info = &pf->fdir;
> + struct i40e_fdir_filter *fdir_filter;
> + struct i40e_flow *flow;
> + int ret = 0;
> +
> + ret = i40e_fdir_flush(dev);
> + if (!ret) {
> + /* Delete FDIR filters in FDIR list. */
> + while ((fdir_filter = TAILQ_FIRST(&fdir_info->fdir_list)))
> + i40e_sw_fdir_filter_del(pf, fdir_filter);
> +
> + /* Delete FDIR flows in flow list. */
> + TAILQ_FOREACH(flow, &pf->flow_list, node) {
> + if (flow->filter_type == RTE_ETH_FILTER_FDIR) {
> + TAILQ_REMOVE(&pf->flow_list, flow, node);
> + rte_free(flow);
> + }
> + }
Be careful, I'm not sure calling TAILQ_REMOVE() followed by rte_free()
inside a TAILQ_FOREACH() is safe. BSD has the _SAFE() variant for this
purpose but Linux does not.
> + }
> +
> + return ret;
> +}
--
Adrien Mazarguil
6WIND
Re: [dpdk-dev] [PATCH v2 07/17] net/i40e: add flow validate function
Hi Beilei,
A few comments below.
On Tue, Dec 27, 2016 at 02:26:14PM +0800, Beilei Xing wrote:
> This patch adds i40e_flow_validation function to check if
> a flow is valid according to the flow pattern.
> i40e_parse_ethertype_filter is added first, it also gets
> the ethertype info.
> i40e_flow.c is added to handle all generic filter events.
>
> Signed-off-by: Beilei Xing
> ---
> drivers/net/i40e/Makefile | 1 +
> drivers/net/i40e/i40e_ethdev.c | 5 +
> drivers/net/i40e/i40e_ethdev.h | 20 ++
> drivers/net/i40e/i40e_flow.c | 431
> +
> 4 files changed, 457 insertions(+)
> create mode 100644 drivers/net/i40e/i40e_flow.c
[...]
> diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
> new file mode 100644
> index 000..bf451ef
> --- /dev/null
> +++ b/drivers/net/i40e/i40e_flow.c
[...]
> + if (ethertype_filter->queue >= pf->dev_data->nb_rx_queues) {
> + rte_flow_error_set(error, EINVAL,
> +RTE_FLOW_ERROR_TYPE_ACTION,
> +NULL, "Invalid queue ID for"
> +" ethertype_filter.");
When setting an error type related to an existing object provided by the
application, you should set the related cause pointer to a non-NULL
value. In this particular case, retrieving the action object seems difficult
so it can remain that way, however there are many places in this series
where it can be done.
> + return -EINVAL;
While this is perfectly valid, you could also return -rte_errno to avoid
duplicating EINVAL.
[...]
> + }
> + if (ethertype_filter->ether_type == ETHER_TYPE_IPv4 ||
> + ethertype_filter->ether_type == ETHER_TYPE_IPv6) {
> + rte_flow_error_set(error, ENOTSUP,
> +RTE_FLOW_ERROR_TYPE_ITEM,
> +NULL, "Unsupported ether_type in"
> +" control packet filter.");
> + return -ENOTSUP;
> + }
> + if (ethertype_filter->ether_type == ETHER_TYPE_VLAN)
> + PMD_DRV_LOG(WARNING, "filter vlan ether_type in"
> + " first tag is not supported.");
> +
> + return ret;
> +}
[...]
> +/* Parse attributes */
> +static int
> +i40e_parse_attr(const struct rte_flow_attr *attr,
> + struct rte_flow_error *error)
> +{
> + /* Must be input direction */
> + if (!attr->ingress) {
> + rte_flow_error_set(error, EINVAL,
> +RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
> +NULL, "Only support ingress.");
Regarding my previous comment, &attr could replace NULL here as well as in
subsequent calls to rte_flow_error_set().
> + return -EINVAL;
> + }
> +
> + /* Not supported */
> + if (attr->egress) {
> + rte_flow_error_set(error, EINVAL,
> +RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
> +NULL, "Not support egress.");
> + return -EINVAL;
> + }
> +
> + /* Not supported */
> + if (attr->priority) {
> + rte_flow_error_set(error, EINVAL,
> +RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
> +NULL, "Not support priority.");
> + return -EINVAL;
> + }
> +
> + /* Not supported */
> + if (attr->group) {
> + rte_flow_error_set(error, EINVAL,
> +RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
> +NULL, "Not support group.");
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static int
> +i40e_parse_ethertype_pattern(const struct rte_flow_item *pattern,
> + struct rte_flow_error *error,
> + struct rte_eth_ethertype_filter *filter)
> +{
> + const struct rte_flow_item *item = pattern;
> + const struct rte_flow_item_eth *eth_spec;
> + const struct rte_flow_item_eth *eth_mask;
> + enum rte_flow_item_type item_type;
> +
> + for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
> + item_type = item->type;
> + switch (item_type) {
> + case RTE_FLOW_ITEM_TYPE_ETH:
> + eth_spec = (const struct rte_flow_item_eth *)item->spec;
> + eth_mask = (const struct rte_flow_item_eth *)item->mask;
> + /* Get the MAC info. */
> + if (!eth_spec || !eth_mask) {
> + rte_flow_error_set(error, EINVAL,
> +RTE_FLOW_ERROR_TYPE_ITEM,
> +NULL,
> +"NULL ETH spec/mask");
> + return -EINVAL;
> + }
While optional, I think you should allow eth_spec and eth_mask to b
[dpdk-dev] [PATCH v3] ethtool: dispaly bus info and firmware version
This patch enhances the ethtool example to support to show
bus information and firmware version, in the same way that
the Linux kernel ethtool does.
Signed-off-by: Qiming Yang
---
v3 changes:
* split this patch from the patch set of rte_eth_dev_fw_info_get
use the new version function.
---
---
examples/ethtool/ethtool-app/ethapp.c | 2 ++
examples/ethtool/lib/rte_ethtool.c| 11 +++
2 files changed, 13 insertions(+)
diff --git a/examples/ethtool/ethtool-app/ethapp.c
b/examples/ethtool/ethtool-app/ethapp.c
index 6aeaa06..192d941 100644
--- a/examples/ethtool/ethtool-app/ethapp.c
+++ b/examples/ethtool/ethtool-app/ethapp.c
@@ -185,6 +185,8 @@ pcmd_drvinfo_callback(__rte_unused void *ptr_params,
printf("Port %i driver: %s (ver: %s)\n",
id_port, info.driver, info.version
);
+ printf("bus-info: %s\n", info.bus_info);
+ printf("firmware-version: %s\n", info.fw_version);
}
}
diff --git a/examples/ethtool/lib/rte_ethtool.c
b/examples/ethtool/lib/rte_ethtool.c
index 6f0ce84..f62f1d3 100644
--- a/examples/ethtool/lib/rte_ethtool.c
+++ b/examples/ethtool/lib/rte_ethtool.c
@@ -54,6 +54,11 @@ rte_ethtool_get_drvinfo(uint8_t port_id, struct
ethtool_drvinfo *drvinfo)
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
+ uint32_t fw_major = 0;
+ uint32_t fw_minor = 0;
+ uint32_t etrack = 0;
+
+ rte_eth_dev_fw_info_get(port_id, &fw_major, &fw_minor, NULL, &etrack);
memset(&dev_info, 0, sizeof(dev_info));
rte_eth_dev_info_get(port_id, &dev_info);
@@ -61,6 +66,12 @@ rte_ethtool_get_drvinfo(uint8_t port_id, struct
ethtool_drvinfo *drvinfo)
dev_info.driver_name);
snprintf(drvinfo->version, sizeof(drvinfo->version), "%s",
rte_version());
+ if (strcmp(drvinfo->driver, "net_ixgbe") == 0)
+ snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
+"0x%08x", etrack);
+ else
+ snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
+"%d.%02d 0x%08x", fw_major, fw_minor, etrack);
if (dev_info.pci_dev)
snprintf(drvinfo->bus_info, sizeof(drvinfo->bus_info),
"%04x:%02x:%02x.%x",
--
2.7.4
Re: [dpdk-dev] [PATCH v3 0/6] Add MACsec offload support for ixgbe
Hi Tiwei, On Tue, Dec 27, 2016 at 09:33:31AM +0800, Tiwei Bie wrote: > Hi Adrien, > > On Mon, Dec 26, 2016 at 04:15:37PM +0100, Adrien Mazarguil wrote: > > Hi Tiwei, > > > > On Sun, Dec 25, 2016 at 10:57:54PM +0800, Tiwei Bie wrote: > > > This patch set adds the MACsec offload support for ixgbe. > > > The testpmd is also updated to support MACsec cmds. > > > > I'm not commenting on any specific patch from this series, however I'm > > noticing this new trend of working around ethdev to add PMD-specific APIs. > > I would like to make sure it's not getting out of hand. > > > > To use the "rte_pmd_ixgbe_macsec_*()" API, applications must be linked with > > librte_pmd_ixgbe directly and have the related code under #ifdef > > RTE_LIBRTE_IXGBE_PMD like testpmd. > > > > Here we can see this ixgbe-specific API affects rte_mbuf.h and rte_ethdev.h > > (new PKT_TX_MACSEC, RTE_ETH_EVENT_MACSEC, DEV_RX_OFFLOAD_MACSEC_STRIP and > > DEV_TX_OFFLOAD_MACSEC_INSERT flags). > > > > - Shouldn't these flags have "IXGBE" somewhere in their name and/or be > > defined under #ifdef RTE_LIBRTE_IXGBE_PMD? > > > > I think those flags are very generic, simple and innocent, so we could just > define them in the normal way. And currently it seems that we lack a way to > define the PMD-specific flags for mbuf, ethdev, etc. Yes, this is probably the least intrusive approach. I'm just pointing out that in the meantime, assigned values are not available for other generic uses which is a problem unless there is a plan to make this API available globally. Missing flags and bits could also be defined directly by rte_pmd_ixgbe.h. > > - Why can't the MACsec API be defined globally, for instance won't i40e > > implement it as well someday? > > I think currently we prefer to implement some PMD features based on the > PMD-specific APIs at first to avoid the bloating of the ethdev APIs. And > when it proves to be generic (which means many people really need it and > care about it, and more drivers are really going to implement it), then > we make it as the global ethdev API. Understandable, but then unless the global API remains exactly the same including the "rte_ixgbe_macsec" prefix (which I think won't happen), applications need to be rewritten, it's not convenient, and as a result may prevent adoption due to the following cycle: - Applications wait for the API to evolve before using MACsec. - DPDK waits for applications to use the ixgbe MACsec API to improve it. In the end, flags tied to a single PMD remain allocated in the global namespace while the API is kept in this temporary state forever. I think doing the extra work to make it global from the start is worth the trouble. This step could perhaps be made easier if people agreed that struct eth_dev_ops (and friends) must be opaque to applications. > > - Why bothering with TX/RX offload capabilities if applications know the > > underlying PMD anyway? > > > > Not every NIC supported by IXGBE supports the MACsec offload. So even > if the application knows it's using IXGBE PMD, it still needs to check > whether the MACsec offload capabilities are supported. OK, I assumed they all did. > > Assuming these patches are kept as-is, I suggest we define a reserved space > > documented as such for PMD-specific flags wherever they are used. > > > > It sounds good to me. But it may involve many pieces of the lib, such > as the mbuf ol_flags, ethdev event type, ethdev offload capabilities, > and so on. So maybe it can be done as another work. Right, that was just an idea from the top of my head, we could define reserved values only when they become necessary for a PMD as in this case, e.g. instead of defining PKT_TX_MACSEC, one would define PKT_TX_RESERVED_0 which would be interpreted as MACSEC by ixgbe until this API is exposed globally. Other PMDs could implement other unrelated PMD-specific APIs through RESERVED_0 in the meantime, so we preserve the precious space we have for global APIs (especially inside mbufs). Thoughts? Best regards, -- Adrien Mazarguil 6WIND
[dpdk-dev] DPDK Acceleartion Enhancement - compression
Is this the correct forum to ask question about adding code for DPDK Acceleration Enhancement? Or this is strictly for code review? If so, please direct me to the correct forum. I have already read these 2 documents: - http://dpdk.org/doc/guides/ cryptodevs/qat.html - http://dpdk.org/doc/guides/ sample_app_ug/intel_ quickassist.html I am new to DPDK and would like to do some work but is hitting a road block. I am interested in making DPDK able to to use the Intel QuickAssist Technology for data compression. I think this will help IP payload compression and save bandwidth. Any help to get me going is greatly appreciated. Anthony.
Re: [dpdk-dev] [PATCH v3 0/6] Add MACsec offload support for ixgbe
Hi Adrien, On Tue, Dec 27, 2016 at 03:37:46PM +0100, Adrien Mazarguil wrote: > Hi Tiwei, > > On Tue, Dec 27, 2016 at 09:33:31AM +0800, Tiwei Bie wrote: > > Hi Adrien, > > > > On Mon, Dec 26, 2016 at 04:15:37PM +0100, Adrien Mazarguil wrote: > > > Hi Tiwei, > > > > > > On Sun, Dec 25, 2016 at 10:57:54PM +0800, Tiwei Bie wrote: > > > > This patch set adds the MACsec offload support for ixgbe. > > > > The testpmd is also updated to support MACsec cmds. [...] > > > - Why can't the MACsec API be defined globally, for instance won't i40e > > > implement it as well someday? > > > > I think currently we prefer to implement some PMD features based on the > > PMD-specific APIs at first to avoid the bloating of the ethdev APIs. And > > when it proves to be generic (which means many people really need it and > > care about it, and more drivers are really going to implement it), then > > we make it as the global ethdev API. > > Understandable, but then unless the global API remains exactly the same > including the "rte_ixgbe_macsec" prefix (which I think won't happen), > applications need to be rewritten, it's not convenient, and as a result may > prevent adoption due to the following cycle: > > - Applications wait for the API to evolve before using MACsec. > - DPDK waits for applications to use the ixgbe MACsec API to improve it. > Yeah, I also saw these problems. And I also don't think this is a perfect way. But it seems that many of us prefer this way, so I just choose to accept it. > In the end, flags tied to a single PMD remain allocated in the global > namespace while the API is kept in this temporary state forever. > > I think doing the extra work to make it global from the start is worth the > trouble. This step could perhaps be made easier if people agreed that > struct eth_dev_ops (and friends) must be opaque to applications. > [...] > > > > Assuming these patches are kept as-is, I suggest we define a reserved > > > space > > > documented as such for PMD-specific flags wherever they are used. > > > > > > > It sounds good to me. But it may involve many pieces of the lib, such > > as the mbuf ol_flags, ethdev event type, ethdev offload capabilities, > > and so on. So maybe it can be done as another work. > > Right, that was just an idea from the top of my head, we could define > reserved values only when they become necessary for a PMD as in this case, > e.g. instead of defining PKT_TX_MACSEC, one would define PKT_TX_RESERVED_0 > which would be interpreted as MACSEC by ixgbe until this API is exposed > globally. > > Other PMDs could implement other unrelated PMD-specific APIs through > RESERVED_0 in the meantime, so we preserve the precious space we have > for global APIs (especially inside mbufs). > > Thoughts? > When a certain PMD implemented several different features based on the PMD-specific API, and many of them need to define some flags in mbuf or the like, it still needs to waste many bits (i.e. we'll need to reserve many bits by that time). But any way, I love your idea! It's much better than the current approach! I'll update my patch. Thank you very much! ;-) Best regards, Tiwei Bie
[dpdk-dev] [PATCH v2] crypto/aesni_gcm: migration from MB library to ISA-L
From: Piotr Azarewicz
Current Cryptodev AESNI-GCM PMD is implemented using AESNI-MB
library.This patch reimplement Cryptodev AESni-GCM using ISA-L Crypto
library: https://github.com/01org/isa-l_crypto.
In new version 256-bit key support and AAD variable length is available.
Verified current unit tests and added new unit tests to verify new
functionalities.
v2 changes:
- implement native scatter-gatter support for chained mbufs (only out-of
place and destination mbuf must be contiguous)
- write unit test for session-less mode
- write unit test for out-of place processing
- add support for GMAC authentication algorithm
Signed-off-by: Piotr Azarewicz
---
app/test/test_cryptodev.c| 739 +++---
app/test/test_cryptodev_gcm_test_vectors.h | 487 +-
doc/guides/cryptodevs/aesni_gcm.rst | 23 +-
doc/guides/rel_notes/release_17_02.rst | 13 +
drivers/crypto/aesni_gcm/Makefile|8 +-
drivers/crypto/aesni_gcm/aesni_gcm_ops.h | 95 +--
drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 307 -
drivers/crypto/aesni_gcm/aesni_gcm_pmd_ops.c | 49 +-
drivers/crypto/aesni_gcm/aesni_gcm_pmd_private.h | 15 +-
mk/rte.app.mk|3 +-
10 files changed, 1356 insertions(+), 383 deletions(-)
diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c
index 00dced5..0bea584 100644
--- a/app/test/test_cryptodev.c
+++ b/app/test/test_cryptodev.c
@@ -3931,16 +3931,48 @@ static int test_snow3g_decryption_oop(const struct
snow3g_test_data *tdata)
}
static int
+create_gcm_xforms(struct rte_crypto_op *op,
+ enum rte_crypto_cipher_operation cipher_op,
+ uint8_t *key, const uint8_t key_len,
+ const uint8_t aad_len, const uint8_t auth_len,
+ enum rte_crypto_auth_operation auth_op)
+{
+ TEST_ASSERT_NOT_NULL(rte_crypto_op_sym_xforms_alloc(op, 2),
+ "failed to allocate space for crypto transforms");
+
+ struct rte_crypto_sym_op *sym_op = op->sym;
+
+ /* Setup Cipher Parameters */
+ sym_op->xform->type = RTE_CRYPTO_SYM_XFORM_CIPHER;
+ sym_op->xform->cipher.algo = RTE_CRYPTO_CIPHER_AES_GCM;
+ sym_op->xform->cipher.op = cipher_op;
+ sym_op->xform->cipher.key.data = key;
+ sym_op->xform->cipher.key.length = key_len;
+
+ TEST_HEXDUMP(stdout, "key:", key, key_len);
+
+ /* Setup Authentication Parameters */
+ sym_op->xform->next->type = RTE_CRYPTO_SYM_XFORM_AUTH;
+ sym_op->xform->next->auth.algo = RTE_CRYPTO_AUTH_AES_GCM;
+ sym_op->xform->next->auth.op = auth_op;
+ sym_op->xform->next->auth.digest_length = auth_len;
+ sym_op->xform->next->auth.add_auth_data_length = aad_len;
+ sym_op->xform->next->auth.key.length = 0;
+ sym_op->xform->next->auth.key.data = NULL;
+ sym_op->xform->next->next = NULL;
+
+ return 0;
+}
+
+static int
create_gcm_operation(enum rte_crypto_cipher_operation op,
- const uint8_t *auth_tag, const unsigned auth_tag_len,
- const uint8_t *iv, const unsigned iv_len,
- const uint8_t *aad, const unsigned aad_len,
- const unsigned data_len, unsigned data_pad_len)
+ const struct gcm_test_data *tdata)
{
struct crypto_testsuite_params *ts_params = &testsuite_params;
struct crypto_unittest_params *ut_params = &unittest_params;
- unsigned iv_pad_len = 0, aad_buffer_len;
+ uint8_t *plaintext, *ciphertext;
+ unsigned int iv_pad_len, aad_pad_len, plaintext_pad_len;
/* Generate Crypto op data structure */
ut_params->op = rte_crypto_op_alloc(ts_params->op_mpool,
@@ -3950,63 +3982,118 @@ static int test_snow3g_decryption_oop(const struct
snow3g_test_data *tdata)
struct rte_crypto_sym_op *sym_op = ut_params->op->sym;
- sym_op->auth.digest.data = (uint8_t *)rte_pktmbuf_append(
- ut_params->ibuf, auth_tag_len);
- TEST_ASSERT_NOT_NULL(sym_op->auth.digest.data,
- "no room to append digest");
- sym_op->auth.digest.phys_addr = rte_pktmbuf_mtophys_offset(
- ut_params->ibuf, data_pad_len);
- sym_op->auth.digest.length = auth_tag_len;
-
- if (op == RTE_CRYPTO_CIPHER_OP_DECRYPT) {
- rte_memcpy(sym_op->auth.digest.data, auth_tag, auth_tag_len);
- TEST_HEXDUMP(stdout, "digest:",
- sym_op->auth.digest.data,
- sym_op->auth.digest.length);
- }
+ /* Append aad data */
+ aad_pad_len = RTE_ALIGN_CEIL(tdata->aad.len, 16);
+ sym_op->auth.aad.data = (uint8_t *)rte_pktmbuf_append(ut_params->ibuf,
+ aad_pad_len);
+ TEST_ASSERT_NOT_NULL(sym_op->auth.aad.data,
+ "no room to append aad");
- /* iv */
-
Re: [dpdk-dev] [PATCH v2 01/17] net/i40e: store ethertype filter
> +
> +/* Delete ethertype filter in SW list */ static int
> +i40e_sw_ethertype_filter_del(struct i40e_pf *pf,
> + struct i40e_ethertype_filter *filter) {
> + struct i40e_ethertype_rule *ethertype_rule = &pf->ethertype;
> + int ret = 0;
> +
> + ret = rte_hash_del_key(ethertype_rule->hash_table,
> +&filter->input);
> + if (ret < 0)
> + PMD_DRV_LOG(ERR,
> + "Failed to delete ethertype filter"
> + " to hash table %d!",
> + ret);
> + ethertype_rule->hash_map[ret] = NULL;
> +
> + TAILQ_REMOVE(ðertype_rule->ethertype_list, filter, rules);
> + rte_free(filter);
It's better to free filter out of del function because the filter is also the
input argument.
Or you can define this function to use key as argument but not filter.
> /*
> * Configure ethertype filter, which can director packet by filtering
> * with mac address and ether_type or only ether_type @@ -7964,6 +8099,8
> @@ i40e_ethertype_filter_set(struct i40e_pf *pf,
> bool add)
> {
> struct i40e_hw *hw = I40E_PF_TO_HW(pf);
> + struct i40e_ethertype_rule *ethertype_rule = &pf->ethertype;
> + struct i40e_ethertype_filter *ethertype_filter, *node;
> struct i40e_control_filter_stats stats;
> uint16_t flags = 0;
> int ret;
> @@ -7982,6 +8119,22 @@ i40e_ethertype_filter_set(struct i40e_pf *pf,
> PMD_DRV_LOG(WARNING, "filter vlan ether_type in first tag is"
> " not supported.");
>
> + /* Check if there is the filter in SW list */
> + ethertype_filter = rte_zmalloc("ethertype_filter",
> +sizeof(*ethertype_filter), 0);
> + i40e_ethertype_filter_convert(filter, ethertype_filter);
> + node = i40e_sw_ethertype_filter_lookup(ethertype_rule,
> +ðertype_filter->input);
> + if (add && node) {
> + PMD_DRV_LOG(ERR, "Conflict with existing ethertype rules!");
> + rte_free(ethertype_filter);
> + return -EINVAL;
> + } else if (!add && !node) {
> + PMD_DRV_LOG(ERR, "There's no corresponding ethertype
> filter!");
> + rte_free(ethertype_filter);
> + return -EINVAL;
> + }
How about malloc ethertype_filter after check? Especially, no need to malloc it
when delete a filter.
Thanks
Jingjing
Re: [dpdk-dev] [PATCH v2 04/17] net/i40e: restore ethertype filter
> -Original Message-
> From: Xing, Beilei
> Sent: Tuesday, December 27, 2016 2:26 PM
> To: Wu, Jingjing ; Zhang, Helin
> Cc: dev@dpdk.org
> Subject: [PATCH v2 04/17] net/i40e: restore ethertype filter
>
> Add support of restoring ethertype filter in case filter dropped
> accidentally, as all
> filters need to be added and removed by user obviously for generic filter API.
>
> Signed-off-by: Beilei Xing
> ---
> drivers/net/i40e/i40e_ethdev.c | 39
> +++
> 1 file changed, 39 insertions(+)
>
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index 427ebdc..cd7c309 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -484,6 +484,9 @@ static int i40e_sw_tunnel_filter_insert(struct i40e_pf
> *pf,
> static int i40e_sw_tunnel_filter_del(struct i40e_pf *pf,
>struct i40e_tunnel_filter *tunnel_filter);
>
> +static void i40e_ethertype_filter_restore(struct i40e_pf *pf); static
> +void i40e_filter_restore(struct i40e_pf *pf);
> +
> static const struct rte_pci_id pci_id_i40e_map[] = {
> { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_XL710) },
> { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QEMU) },
> @@ -1964,6 +1967,8 @@ i40e_dev_start(struct rte_eth_dev *dev)
> /* enable uio intr after callback register */
> rte_intr_enable(intr_handle);
>
> + i40e_filter_restore(pf);
> +
> return I40E_SUCCESS;
>
> err_up:
> @@ -10066,3 +10071,37 @@ i40e_dev_mtu_set(struct rte_eth_dev *dev,
> uint16_t mtu)
>
> return ret;
> }
> +
> +/* Restore ethertype filter */
> +static void
> +i40e_ethertype_filter_restore(struct i40e_pf *pf) {
> + struct i40e_hw *hw = I40E_PF_TO_HW(pf);
> + struct i40e_ethertype_filter_list
> + *ethertype_list = &pf->ethertype.ethertype_list;
> + struct i40e_ethertype_filter *f;
> + struct i40e_control_filter_stats stats;
> + uint16_t flags;
> +
> + TAILQ_FOREACH(f, ethertype_list, rules) {
> + flags = 0;
> + if (!(f->flags & RTE_ETHTYPE_FLAGS_MAC))
> + flags |=
> I40E_AQC_ADD_CONTROL_PACKET_FLAGS_IGNORE_MAC;
> + if (f->flags & RTE_ETHTYPE_FLAGS_DROP)
> + flags |=
> I40E_AQC_ADD_CONTROL_PACKET_FLAGS_DROP;
> + flags |= I40E_AQC_ADD_CONTROL_PACKET_FLAGS_TO_QUEUE;
> +
> + memset(&stats, 0, sizeof(stats));
> + i40e_aq_add_rem_control_packet_filter(hw,
> + f->input.mac_addr.addr_bytes,
> + f->input.ether_type,
> + flags, pf->main_vsi->seid,
> + f->queue, 1, &stats, NULL);
> + }
How about to lig the stats to show how many filters are restored?
Thanks
Jingjing
Re: [dpdk-dev] [PATCH v2 07/17] net/i40e: add flow validate function
>
> +union i40e_filter_t {
> + struct rte_eth_ethertype_filter ethertype_filter;
> + struct rte_eth_fdir_filter fdir_filter;
> + struct rte_eth_tunnel_filter_conf tunnel_filter; } cons_filter;
> +
> +typedef int (*parse_filter_t)(struct rte_eth_dev *dev,
> + const struct rte_flow_attr *attr,
> + const struct rte_flow_item pattern[],
> + const struct rte_flow_action actions[],
> + struct rte_flow_error *error,
> + union i40e_filter_t *filter);
You can use void* instead of define union i40e_filter_t.
> +struct i40e_valid_pattern {
> + enum rte_flow_item_type *items;
What the item points to? Add few comments
> +
> + ret = parse_filter(dev, attr, items, actions, error, &cons_filter);
Will you use cons_filter later? If not, it looks like we don't need the
argument at all.
> +
> + rte_free(items);
> +
> + return ret;
> +}
> --
> 2.5.5
Re: [dpdk-dev] [PATCH v2 01/17] net/i40e: store ethertype filter
On Tue, Dec 27, 2016 at 02:26:08PM +0800, Beilei Xing wrote:
> Currently there's no ethertype filter stored in SW.
> This patch stores ethertype filter with cuckoo hash
> in SW, also adds protection if an ethertype filter
> has been added.
>
> Signed-off-by: Beilei Xing
> ---
> drivers/net/i40e/Makefile | 1 +
> drivers/net/i40e/i40e_ethdev.c | 164
> -
> drivers/net/i40e/i40e_ethdev.h | 26 +++
> 3 files changed, 190 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/i40e/Makefile b/drivers/net/i40e/Makefile
> index 66997b6..11175c4 100644
> --- a/drivers/net/i40e/Makefile
> +++ b/drivers/net/i40e/Makefile
> @@ -117,5 +117,6 @@ DEPDIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += lib/librte_eal
> lib/librte_ether
> DEPDIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += lib/librte_mempool lib/librte_mbuf
> DEPDIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += lib/librte_net
> DEPDIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += lib/librte_kvargs
> +DEPDIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += lib/librte_hash
>
> include $(RTE_SDK)/mk/rte.lib.mk
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index f42f4ba..80dd8d7 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
[...]
> @@ -1203,23 +1249,40 @@ eth_i40e_dev_init(struct rte_eth_dev *dev)
> static int
> eth_i40e_dev_uninit(struct rte_eth_dev *dev)
> {
> + struct i40e_pf *pf;
> struct rte_pci_device *pci_dev;
> struct i40e_hw *hw;
> struct i40e_filter_control_settings settings;
> + struct i40e_ethertype_filter *p_ethertype;
> int ret;
> uint8_t aq_fail = 0;
> + struct i40e_ethertype_rule *ethertype_rule;
>
> PMD_INIT_FUNC_TRACE();
>
> if (rte_eal_process_type() != RTE_PROC_PRIMARY)
> return 0;
>
> + pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
> hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
> pci_dev = dev->pci_dev;
> + ethertype_rule = &pf->ethertype;
>
> if (hw->adapter_stopped == 0)
> i40e_dev_close(dev);
>
> + /* Remove all ethertype director rules and hash */
> + if (ethertype_rule->hash_map)
> + rte_free(ethertype_rule->hash_map);
> + if (ethertype_rule->hash_table)
> + rte_hash_free(ethertype_rule->hash_table);
> +
> + while ((p_ethertype = TAILQ_FIRST(ðertype_rule->ethertype_list))) {
There is a redundant pair of parentheses, or you should compare with
NULL.
> + TAILQ_REMOVE(ðertype_rule->ethertype_list,
> + p_ethertype, rules);
> + rte_free(p_ethertype);
> + }
> +
> dev->dev_ops = NULL;
> dev->rx_pkt_burst = NULL;
> dev->tx_pkt_burst = NULL;
> @@ -7954,6 +8017,78 @@ i40e_hash_filter_ctrl(struct rte_eth_dev *dev,
> return ret;
> }
>
> +/* Convert ethertype filter structure */
> +static int
> +i40e_ethertype_filter_convert(const struct rte_eth_ethertype_filter *input,
> + struct i40e_ethertype_filter *filter)
> +{
> + rte_memcpy(&filter->input.mac_addr, &input->mac_addr, ETHER_ADDR_LEN);
> + filter->input.ether_type = input->ether_type;
> + filter->flags = input->flags;
> + filter->queue = input->queue;
> +
> + return 0;
> +}
> +
> +/* Check if there exists the ehtertype filter */
> +static struct i40e_ethertype_filter *
> +i40e_sw_ethertype_filter_lookup(struct i40e_ethertype_rule *ethertype_rule,
> + const struct i40e_ethertype_filter_input *input)
> +{
> + int ret = 0;
> +
The initialization is meaningless, as it will be written by the below
assignment unconditionally.
> + ret = rte_hash_lookup(ethertype_rule->hash_table, (const void *)input);
> + if (ret < 0)
> + return NULL;
> +
> + return ethertype_rule->hash_map[ret];
> +}
> +
> +/* Add ethertype filter in SW list */
> +static int
> +i40e_sw_ethertype_filter_insert(struct i40e_pf *pf,
> + struct i40e_ethertype_filter *filter)
> +{
> + struct i40e_ethertype_rule *ethertype_rule = &pf->ethertype;
> + int ret = 0;
> +
Same here.
> + ret = rte_hash_add_key(ethertype_rule->hash_table,
> +&filter->input);
> + if (ret < 0)
> + PMD_DRV_LOG(ERR,
> + "Failed to insert ethertype filter"
> + " to hash table %d!",
> + ret);
Function should return when ret < 0.
> + ethertype_rule->hash_map[ret] = filter;
> +
> + TAILQ_INSERT_TAIL(ðertype_rule->ethertype_list, filter, rules);
> +
> + return 0;
> +}
> +
> +/* Delete ethertype filter in SW list */
> +static int
> +i40e_sw_ethertype_filter_del(struct i40e_pf *pf,
> + struct i40e_ethertype_filter *filter)
> +{
> + struct i40e_ethertype_rule *ethertype_rule = &pf->ethertype;
> + int ret = 0;
> +
Same here.
> + ret = rte_
Re: [dpdk-dev] [PATCH v2 12/17] net/i40e: destroy ethertype filter
>
> const struct rte_flow_ops i40e_flow_ops = {
> .validate = i40e_flow_validate,
> @@ -1492,11 +1495,16 @@ i40e_flow_destroy(__rte_unused struct
> rte_eth_dev *dev,
> struct rte_flow *flow,
> struct rte_flow_error *error)
> {
> + struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data-
> >dev_private);
> struct i40e_flow *pmd_flow = (struct i40e_flow *)flow;
> enum rte_filter_type filter_type = pmd_flow->filter_type;
> int ret;
>
> switch (filter_type) {
> + case RTE_ETH_FILTER_ETHERTYPE:
> + ret = i40e_dev_destroy_ethertype_filter(pf,
> + (struct i40e_ethertype_filter *)pmd_flow->rule);
> + break;
> default:
> PMD_DRV_LOG(WARNING, "Filter type (%d) not supported",
> filter_type);
> @@ -1504,10 +1512,49 @@ i40e_flow_destroy(__rte_unused struct
> rte_eth_dev *dev,
> break;
> }
>
> - if (ret)
> + if (!ret) {
> + TAILQ_REMOVE(&pf->flow_list, pmd_flow, node);
> + free(pmd_flow);
Should it be freed inside the function? Is the API definition like that?
Re: [dpdk-dev] [PATCH v2 02/17] net/i40e: store tunnel filter
On Tue, Dec 27, 2016 at 02:26:09PM +0800, Beilei Xing wrote:
> Currently there's no tunnel filter stored in SW.
> This patch stores tunnel filter in SW with cuckoo
> hash, also adds protection if a tunnel filter has
> been added.
>
> Signed-off-by: Beilei Xing
> ---
> drivers/net/i40e/i40e_ethdev.c | 167
> -
> drivers/net/i40e/i40e_ethdev.h | 27 +++
> 2 files changed, 191 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index 80dd8d7..c012d5d 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
[...]
> @@ -1267,6 +1314,7 @@ eth_i40e_dev_uninit(struct rte_eth_dev *dev)
> hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
> pci_dev = dev->pci_dev;
> ethertype_rule = &pf->ethertype;
> + tunnel_rule = &pf->tunnel;
>
> if (hw->adapter_stopped == 0)
> i40e_dev_close(dev);
> @@ -1283,6 +1331,17 @@ eth_i40e_dev_uninit(struct rte_eth_dev *dev)
> rte_free(p_ethertype);
> }
>
> + /* Remove all tunnel director rules and hash */
> + if (tunnel_rule->hash_map)
> + rte_free(tunnel_rule->hash_map);
> + if (tunnel_rule->hash_table)
> + rte_hash_free(tunnel_rule->hash_table);
> +
> + while ((p_tunnel = TAILQ_FIRST(&tunnel_rule->tunnel_list))) {
There is a redundant pair of parentheses, or you should compare with
NULL.
> + TAILQ_REMOVE(&tunnel_rule->tunnel_list, p_tunnel, rules);
> + rte_free(p_tunnel);
> + }
> +
> dev->dev_ops = NULL;
> dev->rx_pkt_burst = NULL;
> dev->tx_pkt_burst = NULL;
> @@ -6482,6 +6541,81 @@ i40e_dev_get_filter_type(uint16_t filter_type,
> uint16_t *flag)
> return 0;
> }
>
> +/* Convert tunnel filter structure */
> +static int
> +i40e_tunnel_filter_convert(struct
> i40e_aqc_add_remove_cloud_filters_element_data
> +*cld_filter,
> +struct i40e_tunnel_filter *tunnel_filter)
> +{
> + ether_addr_copy((struct ether_addr *)&cld_filter->outer_mac,
> + (struct ether_addr *)&tunnel_filter->input.outer_mac);
> + ether_addr_copy((struct ether_addr *)&cld_filter->inner_mac,
> + (struct ether_addr *)&tunnel_filter->input.inner_mac);
> + tunnel_filter->input.inner_vlan = cld_filter->inner_vlan;
> + tunnel_filter->input.flags = cld_filter->flags;
> + tunnel_filter->input.tenant_id = cld_filter->tenant_id;
> + tunnel_filter->queue = cld_filter->queue_number;
> +
> + return 0;
> +}
> +
> +/* Check if there exists the tunnel filter */
> +static struct i40e_tunnel_filter *
> +i40e_sw_tunnel_filter_lookup(struct i40e_tunnel_rule *tunnel_rule,
> + const struct i40e_tunnel_filter_input *input)
> +{
> + int ret = 0;
> +
The initialization is meaningless, as it will be written by the below
assignment unconditionally.
> + ret = rte_hash_lookup(tunnel_rule->hash_table, (const void *)input);
> + if (ret < 0)
> + return NULL;
> +
> + return tunnel_rule->hash_map[ret];
> +}
> +
> +/* Add a tunnel filter into the SW list */
> +static int
> +i40e_sw_tunnel_filter_insert(struct i40e_pf *pf,
> + struct i40e_tunnel_filter *tunnel_filter)
> +{
> + struct i40e_tunnel_rule *tunnel_rule = &pf->tunnel;
> + int ret = 0;
> +
Same here.
> + ret = rte_hash_add_key(tunnel_rule->hash_table,
> +&tunnel_filter->input);
> + if (ret < 0)
> + PMD_DRV_LOG(ERR,
> + "Failed to insert tunnel filter to hash table %d!",
> + ret);
Function should return when ret < 0.
> + tunnel_rule->hash_map[ret] = tunnel_filter;
> +
> + TAILQ_INSERT_TAIL(&tunnel_rule->tunnel_list, tunnel_filter, rules);
> +
> + return 0;
> +}
> +
> +/* Delete a tunnel filter from the SW list */
> +static int
> +i40e_sw_tunnel_filter_del(struct i40e_pf *pf,
> + struct i40e_tunnel_filter *tunnel_filter)
> +{
> + struct i40e_tunnel_rule *tunnel_rule = &pf->tunnel;
> + int ret = 0;
> +
Same here.
> + ret = rte_hash_del_key(tunnel_rule->hash_table,
> +&tunnel_filter->input);
> + if (ret < 0)
> + PMD_DRV_LOG(ERR,
> + "Failed to delete tunnel filter to hash table %d!",
> + ret);
Function should return when ret < 0.
> + tunnel_rule->hash_map[ret] = NULL;
> +
> + TAILQ_REMOVE(&tunnel_rule->tunnel_list, tunnel_filter, rules);
> + rte_free(tunnel_filter);
> +
> + return 0;
> +}
> +
> static int
> i40e_dev_tunnel_filter_set(struct i40e_pf *pf,
> struct rte_eth_tunnel_filter_conf *tunnel_filter,
> @@ -6497,6 +6631,8 @@ i40e_dev_tunnel_filter_set(struct i40e_pf *pf,
> struct i40e_vsi *vsi = pf->main_vsi;
>
Re: [dpdk-dev] [PATCH v2 03/17] net/i40e: store flow director filter
On Tue, Dec 27, 2016 at 02:26:10PM +0800, Beilei Xing wrote:
> Currently there's no flow director filter stored in SW. This
> patch stores flow director filters in SW with cuckoo hash,
> also adds protection if a flow director filter has been added.
>
> Signed-off-by: Beilei Xing
> ---
> drivers/net/i40e/i40e_ethdev.c | 48 +
> drivers/net/i40e/i40e_ethdev.h | 12 ++
> drivers/net/i40e/i40e_fdir.c | 98
> ++
> 3 files changed, 158 insertions(+)
>
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index c012d5d..427ebdc 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
[...]
> @@ -1342,6 +1379,17 @@ eth_i40e_dev_uninit(struct rte_eth_dev *dev)
> rte_free(p_tunnel);
> }
>
> + /* Remove all flow director rules and hash */
> + if (fdir_info->hash_map)
> + rte_free(fdir_info->hash_map);
> + if (fdir_info->hash_table)
> + rte_hash_free(fdir_info->hash_table);
> +
> + while ((p_fdir = TAILQ_FIRST(&fdir_info->fdir_list))) {
There is a redundant pair of parentheses, or you should compare with
NULL.
> + TAILQ_REMOVE(&fdir_info->fdir_list, p_fdir, rules);
> + rte_free(p_fdir);
> + }
> +
> dev->dev_ops = NULL;
> dev->rx_pkt_burst = NULL;
> dev->tx_pkt_burst = NULL;
[...]
> diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c
> index 335bf15..faa2495 100644
> --- a/drivers/net/i40e/i40e_fdir.c
> +++ b/drivers/net/i40e/i40e_fdir.c
[...]
> +/* Check if there exists the flow director filter */
> +static struct i40e_fdir_filter *
> +i40e_sw_fdir_filter_lookup(struct i40e_fdir_info *fdir_info,
> + const struct rte_eth_fdir_input *input)
> +{
> + int ret = 0;
> +
The initialization is meaningless, as it will be written by the below
assignment unconditionally.
> + ret = rte_hash_lookup(fdir_info->hash_table, (const void *)input);
> + if (ret < 0)
> + return NULL;
> +
> + return fdir_info->hash_map[ret];
> +}
> +
> +/* Add a flow director filter into the SW list */
> +static int
> +i40e_sw_fdir_filter_insert(struct i40e_pf *pf, struct i40e_fdir_filter
> *filter)
> +{
> + struct i40e_fdir_info *fdir_info = &pf->fdir;
> + int ret = 0;
> +
Same here.
> + ret = rte_hash_add_key(fdir_info->hash_table,
> +&filter->fdir.input);
> + if (ret < 0)
> + PMD_DRV_LOG(ERR,
> + "Failed to insert fdir filter to hash table %d!",
> + ret);
Function should return when ret < 0.
> + fdir_info->hash_map[ret] = filter;
> +
> + TAILQ_INSERT_TAIL(&fdir_info->fdir_list, filter, rules);
> +
> + return 0;
> +}
> +
> +/* Delete a flow director filter from the SW list */
> +static int
> +i40e_sw_fdir_filter_del(struct i40e_pf *pf, struct i40e_fdir_filter *filter)
> +{
> + struct i40e_fdir_info *fdir_info = &pf->fdir;
> + int ret = 0;
> +
Same here.
> + ret = rte_hash_del_key(fdir_info->hash_table,
> +&filter->fdir.input);
> + if (ret < 0)
> + PMD_DRV_LOG(ERR,
> + "Failed to delete fdir filter to hash table %d!",
> + ret);
Function should return when ret < 0.
> + fdir_info->hash_map[ret] = NULL;
> +
> + TAILQ_REMOVE(&fdir_info->fdir_list, filter, rules);
> + rte_free(filter);
> +
> + return 0;
> +}
> +
> /*
> * i40e_add_del_fdir_filter - add or remove a flow director filter.
> * @pf: board private structure
> @@ -1032,6 +1105,8 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev,
> struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
> unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;
> enum i40e_filter_pctype pctype;
> + struct i40e_fdir_info *fdir_info = &pf->fdir;
> + struct i40e_fdir_filter *fdir_filter, *node;
> int ret = 0;
>
> if (dev->data->dev_conf.fdir_conf.mode != RTE_FDIR_MODE_PERFECT) {
> @@ -1054,6 +1129,21 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev,
> return -EINVAL;
> }
>
> + fdir_filter = rte_zmalloc("fdir_filter", sizeof(*fdir_filter), 0);
> + i40e_fdir_filter_convert(filter, fdir_filter);
> + node = i40e_sw_fdir_filter_lookup(fdir_info, &fdir_filter->fdir.input);
> + if (add && node) {
> + PMD_DRV_LOG(ERR,
> + "Conflict with existing flow director rules!");
> + rte_free(fdir_filter);
> + return -EINVAL;
> + } else if (!add && !node) {
When `if (add && node)' is true, function will return. There is no need
to use `else' here.
Best regards,
Tiwei Bie
Re: [dpdk-dev] [PATCH 12/13] i40e: return -errno when intr setup fails
> -Original Message-
> From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Michal Miroslaw
> Sent: Tuesday, December 13, 2016 9:08 AM
> To: dev@dpdk.org
> Subject: [dpdk-dev] [PATCH 12/13] i40e: return -errno when intr setup fails
>
> Signed-off-by: Michał Mirosław
> ---
> drivers/net/i40e/i40e_ethdev.c | 5 +++--
> lib/librte_eal/linuxapp/eal/eal_interrupts.c | 2 +-
> 2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index 67778ba..39fbcfe 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -1692,8 +1692,9 @@ i40e_dev_start(struct rte_eth_dev *dev)
>!RTE_ETH_DEV_SRIOV(dev).active) &&
> dev->data->dev_conf.intr_conf.rxq != 0) {
> intr_vector = dev->data->nb_rx_queues;
> - if (rte_intr_efd_enable(intr_handle, intr_vector))
> - return -1;
> + ret = rte_intr_efd_enable(intr_handle, intr_vector);
> + if (ret)
> + return ret;
> }
>
> if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) { diff
> --git
> a/lib/librte_eal/linuxapp/eal/eal_interrupts.c
> b/lib/librte_eal/linuxapp/eal/eal_interrupts.c
> index 47a3b20..f7a8ce3 100644
> --- a/lib/librte_eal/linuxapp/eal/eal_interrupts.c
> +++ b/lib/librte_eal/linuxapp/eal/eal_interrupts.c
> @@ -1157,7 +1157,7 @@ rte_intr_efd_enable(struct rte_intr_handle
> *intr_handle, uint32_t nb_efd)
> RTE_LOG(ERR, EAL,
> "can't setup eventfd, error %i (%s)\n",
> errno, strerror(errno));
> - return -1;
> + return -errno;
> }
> intr_handle->efds[i] = fd;
> }
> --
Reviewed-by: Jingjing Wu
Re: [dpdk-dev] [PATCH 13/13] i40e: improve message grepability
> -Original Message- > From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Michal Miroslaw > Sent: Tuesday, December 13, 2016 9:08 AM > To: dev@dpdk.org > Subject: [dpdk-dev] [PATCH 13/13] i40e: improve message grepability > > Signed-off-by: Michał Mirosław > --- > drivers/net/i40e/i40e_ethdev.c | 198 > +++-- > 1 file changed, 73 insertions(+), 125 deletions(-) > > diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c > index 39fbcfe..4d73aca 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -763,8 +763,7 @@ i40e_add_tx_flow_control_drop_filter(struct i40e_pf > *pf) > pf->main_vsi_seid, 0, > TRUE, NULL, NULL); > if (ret) > - PMD_INIT_LOG(ERR, "Failed to add filter to drop flow control " > - " frames from VSIs."); > + PMD_INIT_LOG(ERR, "Failed to add filter to drop flow control > frames > +from VSIs."); > } You are right, it makes grep easily. But it will break the coding style "Line length is recommended to be not more than 80 characters, including comments." Any comments from committers? Thanks Jingjing
Re: [dpdk-dev] [PATCH v2 07/17] net/i40e: add flow validate function
On Tue, Dec 27, 2016 at 02:26:14PM +0800, Beilei Xing wrote:
> This patch adds i40e_flow_validation function to check if
> a flow is valid according to the flow pattern.
> i40e_parse_ethertype_filter is added first, it also gets
> the ethertype info.
> i40e_flow.c is added to handle all generic filter events.
>
> Signed-off-by: Beilei Xing
> ---
> drivers/net/i40e/Makefile | 1 +
> drivers/net/i40e/i40e_ethdev.c | 5 +
> drivers/net/i40e/i40e_ethdev.h | 20 ++
> drivers/net/i40e/i40e_flow.c | 431
> +
> 4 files changed, 457 insertions(+)
> create mode 100644 drivers/net/i40e/i40e_flow.c
>
> diff --git a/drivers/net/i40e/Makefile b/drivers/net/i40e/Makefile
> index 11175c4..89bd85a 100644
> --- a/drivers/net/i40e/Makefile
> +++ b/drivers/net/i40e/Makefile
> @@ -105,6 +105,7 @@ endif
> SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_ethdev_vf.c
> SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_pf.c
> SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_fdir.c
> +SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_flow.c
>
> # vector PMD driver needs SSE4.1 support
> ifeq ($(findstring RTE_MACHINE_CPUFLAG_SSE4_1,$(CFLAGS)),)
> diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
> index 7f98b79..80024ed 100644
> --- a/drivers/net/i40e/i40e_ethdev.c
> +++ b/drivers/net/i40e/i40e_ethdev.c
> @@ -8452,6 +8452,11 @@ i40e_dev_filter_ctrl(struct rte_eth_dev *dev,
> case RTE_ETH_FILTER_FDIR:
> ret = i40e_fdir_ctrl_func(dev, filter_op, arg);
> break;
> + case RTE_ETH_FILTER_GENERIC:
> + if (filter_op != RTE_ETH_FILTER_GET)
> + return -EINVAL;
> + *(const void **)arg = &i40e_flow_ops;
> + break;
> default:
> PMD_DRV_LOG(WARNING, "Filter type (%d) not supported",
> filter_type);
> diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
> index 6089895..bbe52f0 100644
> --- a/drivers/net/i40e/i40e_ethdev.h
> +++ b/drivers/net/i40e/i40e_ethdev.h
> @@ -38,6 +38,7 @@
> #include
> #include
> #include
> +#include
>
> #define I40E_VLAN_TAG_SIZE4
>
> @@ -629,6 +630,23 @@ struct i40e_adapter {
> struct rte_timecounter tx_tstamp_tc;
> };
>
> +union i40e_filter_t {
> + struct rte_eth_ethertype_filter ethertype_filter;
> + struct rte_eth_fdir_filter fdir_filter;
> + struct rte_eth_tunnel_filter_conf tunnel_filter;
> +} cons_filter;
> +
Are you sure that you want to define a variable in i40e_ethdev.h?
> +typedef int (*parse_filter_t)(struct rte_eth_dev *dev,
> + const struct rte_flow_attr *attr,
> + const struct rte_flow_item pattern[],
> + const struct rte_flow_action actions[],
> + struct rte_flow_error *error,
> + union i40e_filter_t *filter);
> +struct i40e_valid_pattern {
> + enum rte_flow_item_type *items;
> + parse_filter_t parse_filter;
> +};
> +
> int i40e_dev_switch_queues(struct i40e_pf *pf, bool on);
> int i40e_vsi_release(struct i40e_vsi *vsi);
> struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf,
> @@ -823,4 +841,6 @@ i40e_calc_itr_interval(int16_t interval)
> ((phy_type) & I40E_CAP_PHY_TYPE_25GBASE_SR) || \
> ((phy_type) & I40E_CAP_PHY_TYPE_25GBASE_LR))
>
> +const struct rte_flow_ops i40e_flow_ops;
> +
Same here. Are you sure that you want to define a variable in i40e_ethdev.h?
Maybe you should add the `extern' qualifier.
Best regards,
Tiwei Bie
Re: [dpdk-dev] [PATCH v2 12/17] net/i40e: destroy ethertype filter
On Tue, Dec 27, 2016 at 02:26:19PM +0800, Beilei Xing wrote:
> This patch adds i40e_dev_destroy_ethertype_filter function
> to destroy a ethertype filter for users.
>
> Signed-off-by: Beilei Xing
> ---
> drivers/net/i40e/i40e_ethdev.c | 10 ++---
> drivers/net/i40e/i40e_ethdev.h | 5 +
> drivers/net/i40e/i40e_flow.c | 51
> --
> 3 files changed, 56 insertions(+), 10 deletions(-)
>
[...]
> diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
> index 2a61c4f..732c411 100644
> --- a/drivers/net/i40e/i40e_flow.c
> +++ b/drivers/net/i40e/i40e_flow.c
[...]
> @@ -1492,11 +1495,16 @@ i40e_flow_destroy(__rte_unused struct rte_eth_dev
> *dev,
The `__rte_unused' qualifier should be removed.
> struct rte_flow *flow,
> struct rte_flow_error *error)
> {
> + struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
> struct i40e_flow *pmd_flow = (struct i40e_flow *)flow;
> enum rte_filter_type filter_type = pmd_flow->filter_type;
> int ret;
>
> switch (filter_type) {
> + case RTE_ETH_FILTER_ETHERTYPE:
> + ret = i40e_dev_destroy_ethertype_filter(pf,
> + (struct i40e_ethertype_filter *)pmd_flow->rule);
> + break;
> default:
> PMD_DRV_LOG(WARNING, "Filter type (%d) not supported",
> filter_type);
> @@ -1504,10 +1512,49 @@ i40e_flow_destroy(__rte_unused struct rte_eth_dev
> *dev,
> break;
> }
>
> - if (ret)
> + if (!ret) {
> + TAILQ_REMOVE(&pf->flow_list, pmd_flow, node);
> + free(pmd_flow);
> + } else {
> rte_flow_error_set(error, EINVAL,
> RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
> "Failed to destroy flow.");
> + }
Probably you should introduce the pf related code when introducing
i40e_flow_destroy() in the below patch:
[PATCH v2 11/17] net/i40e: add flow destroy function
> +
> + return ret;
> +}
> +
> +static int
> +i40e_dev_destroy_ethertype_filter(struct i40e_pf *pf,
> + struct i40e_ethertype_filter *filter)
> +{
> + struct i40e_hw *hw = I40E_PF_TO_HW(pf);
> + struct i40e_ethertype_rule *ethertype_rule = &pf->ethertype;
> + struct i40e_ethertype_filter *node;
> + struct i40e_control_filter_stats stats;
> + uint16_t flags = 0;
> + int ret = 0;
> +
> + if (!(filter->flags & RTE_ETHTYPE_FLAGS_MAC))
> + flags |= I40E_AQC_ADD_CONTROL_PACKET_FLAGS_IGNORE_MAC;
> + if (filter->flags & RTE_ETHTYPE_FLAGS_DROP)
> + flags |= I40E_AQC_ADD_CONTROL_PACKET_FLAGS_DROP;
> + flags |= I40E_AQC_ADD_CONTROL_PACKET_FLAGS_TO_QUEUE;
> +
> + memset(&stats, 0, sizeof(stats));
> + ret = i40e_aq_add_rem_control_packet_filter(hw,
> + filter->input.mac_addr.addr_bytes,
> + filter->input.ether_type,
> + flags, pf->main_vsi->seid,
> + filter->queue, 0, &stats, NULL);
> + if (ret < 0)
> + return ret;
> +
> + node = i40e_sw_ethertype_filter_lookup(ethertype_rule, &filter->input);
> + if (node)
> + ret = i40e_sw_ethertype_filter_del(pf, node);
> + else
> + return -EINVAL;
It would be more readable to check whether node equals NULL and return
when it's true, and call i40e_sw_ethertype_filter_del(pf, node) outside
the `if' statement:
node = i40e_sw_ethertype_filter_lookup(ethertype_rule, &filter->input);
if (node == NULL)
return -EINVAL;
ret = i40e_sw_ethertype_filter_del(pf, node);
Best regards,
Tiwei Bie
[dpdk-dev] Packet is not being sent
i, I am wondering what is causing the packet to be dropped. Please help me.
The mempool was created and retrieved via lookup
The port and queues have been verified to be correct.
However, according to stats, no packet is transmitted, although
rte_eth_tx_burst returns 1. I also do not receive anything on the connected
machine.
532 if(mem == NULL)
533 {
534 LOG <<"No mem";
535 }
536 else{
537 LOG << "has mem";
538 }
539
540 rte_mbuf *mbufs = rte_pktmbuf_alloc(mem);
541 if(NULL == mbufs)
542 {
543 LOG << "ALLOCATION failed";
544 }
545 else
546 {
547LOG << "ALLOCATION successful";
548 }
549
550 uint8_t* messageToSend = NULL;
551 LOG << "SENDRAW 2";
552 ether_addr addr;
553 rte_eth_macaddr_get(port, &addr);
554 LOG << "start port 2: " << rte_eth_dev_start(2);
569 ether_addr_copy(&addr, &hdr->s_addr);
570 hdr->ether_type = rte_cpu_to_be_16(0x9998);
571 mbufs->pkt_len = mbufs->data_len = 8;
572
573 messageToSend = (uint8_t*)&hdr[2];
574
575 for(auto i=0u; i < sendmsg.header.msgSize; ++i) {
576 messageToSend[i] = sendmsg.data[i];
577 }
578
579 LOG << "SENDRAW " << sendmsg.header.msgSize;
580 mbufs->pkt_len = sendmsg.header.msgSize;
581 LOG << "SENDRAW 5";
582 LOG << "SENDRAW 6";
583 rte_mbuf *mbufArray[] = {mbufs};
584 rte_pktmbuf_refcnt_update(mbufs, 1);
585 LOG << "SENDRAW 7";
586 //uint16_t nbPk = rte_eth_tx_burst(2, 0, mbufArray, 1);
587 uint32_t sent = 0;
588 struct rte_eth_dev_info dev_info;
589 struct rte_eth_stats stats;
590 LOG << "stats successful? " << rte_eth_stats_get(2, &stats);
591 rte_eth_dev_info_get(2, &dev_info);
592 LOG << "dev info: " << (dev_info.pci_dev->addr.bus);
593 while (1) {
594 sent = rte_eth_tx_burst(2, 0, mbufArray, 1);
595 if (sent > 0) {
596 LOG << "opackets: " << stats.opackets;
597 LOG << "obytes: " << stats.obytes;
598 LOG << "oerrors: " << stats.oerrors;
599 LOG << "packets transmitted " << sent;
600 return;
601 }
602 }
603
604
605 }
[dpdk-dev] Fw: Packet is not being sent
From: April Teodoro
Sent: Wednesday, December 28, 2016 1:36 PM
To: dev@dpdk.org
Subject: Packet is not being sent
i, I am wondering what is causing the packet to be dropped. Please help me.
The mempool was created and retrieved via lookup
The port and queues have been verified to be correct.
However, according to stats, no packet is transmitted, although
rte_eth_tx_burst returns 1. I also do not receive anything on the connected
machine.
532 if(mem == NULL)
533 {
534 LOG <<"No mem";
535 }
536 else{
537 LOG << "has mem";
538 }
539
540 rte_mbuf *mbufs = rte_pktmbuf_alloc(mem);
541 if(NULL == mbufs)
542 {
543 LOG << "ALLOCATION failed";
544 }
545 else
546 {
547LOG << "ALLOCATION successful";
548 }
549
550 uint8_t* messageToSend = NULL;
551 LOG << "SENDRAW 2";
552 ether_addr addr;
553 rte_eth_macaddr_get(port, &addr);
554 LOG << "start port 2: " << rte_eth_dev_start(2);
569 ether_addr_copy(&addr, &hdr->s_addr);
570 hdr->ether_type = rte_cpu_to_be_16(0x9998);
571 mbufs->pkt_len = mbufs->data_len = 8;
572
573 messageToSend = (uint8_t*)&hdr[2];
574
575 for(auto i=0u; i < sendmsg.header.msgSize; ++i) {
576 messageToSend[i] = sendmsg.data[i];
577 }
578
579 LOG << "SENDRAW " << sendmsg.header.msgSize;
580 mbufs->pkt_len = sendmsg.header.msgSize;
581 LOG << "SENDRAW 5";
582 LOG << "SENDRAW 6";
583 rte_mbuf *mbufArray[] = {mbufs};
584 rte_pktmbuf_refcnt_update(mbufs, 1);
585 LOG << "SENDRAW 7";
586 //uint16_t nbPk = rte_eth_tx_burst(2, 0, mbufArray, 1);
587 uint32_t sent = 0;
588 struct rte_eth_dev_info dev_info;
589 struct rte_eth_stats stats;
590 LOG << "stats successful? " << rte_eth_stats_get(2, &stats);
591 rte_eth_dev_info_get(2, &dev_info);
592 LOG << "dev info: " << (dev_info.pci_dev->addr.bus);
593 while (1) {
594 sent = rte_eth_tx_burst(2, 0, mbufArray, 1);
595 if (sent > 0) {
596 LOG << "opackets: " << stats.opackets;
597 LOG << "obytes: " << stats.obytes;
598 LOG << "oerrors: " << stats.oerrors;
599 LOG << "packets transmitted " << sent;
600 return;
601 }
602 }
603
604
605 }
Re: [dpdk-dev] [PATCH v2 15/17] net/i40e: add flow flush function
On Tue, Dec 27, 2016 at 02:26:22PM +0800, Beilei Xing wrote:
> This patch adds i40e_flow_flush function to flush all
> filters for users. And flow director flush function
> is involved first.
>
> Signed-off-by: Beilei Xing
> ---
> drivers/net/i40e/i40e_ethdev.h | 3 +++
> drivers/net/i40e/i40e_fdir.c | 8 ++--
> drivers/net/i40e/i40e_flow.c | 46
> ++
> 3 files changed, 51 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h
> index b8c7d41..0b736d5 100644
> --- a/drivers/net/i40e/i40e_ethdev.h
> +++ b/drivers/net/i40e/i40e_ethdev.h
> @@ -786,6 +786,9 @@ i40e_sw_tunnel_filter_lookup(struct i40e_tunnel_rule
> *tunnel_rule,
>const struct i40e_tunnel_filter_input *input);
> int i40e_sw_tunnel_filter_del(struct i40e_pf *pf,
> struct i40e_tunnel_filter *tunnel_filter);
> +int i40e_sw_fdir_filter_del(struct i40e_pf *pf,
> + struct i40e_fdir_filter *filter);
> +int i40e_fdir_flush(struct rte_eth_dev *dev);
>
Why don't declare them as the global functions at the beginning?
> /* I40E_DEV_PRIVATE_TO */
> #define I40E_DEV_PRIVATE_TO_PF(adapter) \
> diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c
> index 6c1bb18..f10aeee 100644
> --- a/drivers/net/i40e/i40e_fdir.c
> +++ b/drivers/net/i40e/i40e_fdir.c
> @@ -119,8 +119,6 @@ static int i40e_fdir_filter_programming(struct i40e_pf
> *pf,
> enum i40e_filter_pctype pctype,
> const struct rte_eth_fdir_filter *filter,
> bool add);
> -static int i40e_fdir_flush(struct rte_eth_dev *dev);
> -
> static int i40e_fdir_filter_convert(const struct rte_eth_fdir_filter *input,
>struct i40e_fdir_filter *filter);
> static struct i40e_fdir_filter *
> @@ -128,8 +126,6 @@ i40e_sw_fdir_filter_lookup(struct i40e_fdir_info
> *fdir_info,
> const struct rte_eth_fdir_input *input);
> static int i40e_sw_fdir_filter_insert(struct i40e_pf *pf,
> struct i40e_fdir_filter *filter);
> -static int i40e_sw_fdir_filter_del(struct i40e_pf *pf,
> - struct i40e_fdir_filter *filter);
>
> static int
> i40e_fdir_rx_queue_init(struct i40e_rx_queue *rxq)
> @@ -1070,7 +1066,7 @@ i40e_sw_fdir_filter_insert(struct i40e_pf *pf, struct
> i40e_fdir_filter *filter)
> }
>
> /* Delete a flow director filter from the SW list */
> -static int
> +int
> i40e_sw_fdir_filter_del(struct i40e_pf *pf, struct i40e_fdir_filter *filter)
> {
> struct i40e_fdir_info *fdir_info = &pf->fdir;
> @@ -1318,7 +1314,7 @@ i40e_fdir_filter_programming(struct i40e_pf *pf,
> * i40e_fdir_flush - clear all filters of Flow Director table
> * @pf: board private structure
> */
> -static int
> +int
> i40e_fdir_flush(struct rte_eth_dev *dev)
> {
> struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
> diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c
> index 4c7856c..1d9f603 100644
> --- a/drivers/net/i40e/i40e_flow.c
> +++ b/drivers/net/i40e/i40e_flow.c
> @@ -68,6 +68,8 @@ static struct rte_flow *i40e_flow_create(struct rte_eth_dev
> *dev,
>const struct rte_flow_item pattern[],
>const struct rte_flow_action actions[],
>struct rte_flow_error *error);
> +static int i40e_flow_flush(struct rte_eth_dev *dev,
> +struct rte_flow_error *error);
> static int i40e_flow_destroy(struct rte_eth_dev *dev,
>struct rte_flow *flow,
>struct rte_flow_error *error);
> @@ -95,11 +97,13 @@ static int i40e_dev_destroy_ethertype_filter(struct
> i40e_pf *pf,
>struct i40e_ethertype_filter *filter);
> static int i40e_dev_destroy_tunnel_filter(struct i40e_pf *pf,
> struct i40e_tunnel_filter *filter);
> +static int i40e_fdir_filter_flush(struct i40e_pf *pf);
>
> const struct rte_flow_ops i40e_flow_ops = {
> .validate = i40e_flow_validate,
> .create = i40e_flow_create,
> .destroy = i40e_flow_destroy,
> + .flush = i40e_flow_flush,
> };
>
> enum rte_filter_type cons_filter_type = RTE_ETH_FILTER_NONE;
> @@ -1603,3 +1607,45 @@ i40e_dev_destroy_tunnel_filter(struct i40e_pf *pf,
>
> return ret;
> }
> +
> +static int
> +i40e_flow_flush(struct rte_eth_dev *dev, struct rte_flow_error *error)
> +{
> + struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
> + int ret = 0;
> +
Meaningless initialization.
> + ret = i40e_fdir_filter_flush(pf);
> + if (!ret)
> + rte_flow_error_set(error, EINVAL,
> +RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
> +
Re: [dpdk-dev] [PATCH v2 15/17] net/i40e: add flow flush function
> -Original Message-
> From: Bie, Tiwei
> Sent: Wednesday, December 28, 2016 1:36 PM
> To: Xing, Beilei
> Cc: Wu, Jingjing ; Zhang, Helin
> ; dev@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH v2 15/17] net/i40e: add flow flush function
>
> On Tue, Dec 27, 2016 at 02:26:22PM +0800, Beilei Xing wrote:
> > This patch adds i40e_flow_flush function to flush all filters for
> > users. And flow director flush function is involved first.
> >
> > Signed-off-by: Beilei Xing
> > ---
> > drivers/net/i40e/i40e_ethdev.h | 3 +++
> > drivers/net/i40e/i40e_fdir.c | 8 ++--
> > drivers/net/i40e/i40e_flow.c | 46
> ++
> > 3 files changed, 51 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/net/i40e/i40e_ethdev.h
> > b/drivers/net/i40e/i40e_ethdev.h index b8c7d41..0b736d5 100644
> > --- a/drivers/net/i40e/i40e_ethdev.h
> > +++ b/drivers/net/i40e/i40e_ethdev.h
> > @@ -786,6 +786,9 @@ i40e_sw_tunnel_filter_lookup(struct
> i40e_tunnel_rule *tunnel_rule,
> > const struct i40e_tunnel_filter_input *input); int
> > i40e_sw_tunnel_filter_del(struct i40e_pf *pf,
> > struct i40e_tunnel_filter *tunnel_filter);
> > +int i40e_sw_fdir_filter_del(struct i40e_pf *pf,
> > + struct i40e_fdir_filter *filter); int
> i40e_fdir_flush(struct
> > +rte_eth_dev *dev);
> >
>
> Why don't declare them as the global functions at the beginning?
When I implement the store/restore function, I plan this function is only used
in i40e_ethdev.c.
I change them to the global functions since I add i40e_flow.c to rework all
the flow ops.
>
> > /* I40E_DEV_PRIVATE_TO */
> > #define I40E_DEV_PRIVATE_TO_PF(adapter) \ diff --git
> > a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c index
> > 6c1bb18..f10aeee 100644
> > --- a/drivers/net/i40e/i40e_fdir.c
> > +++ b/drivers/net/i40e/i40e_fdir.c
> > @@ -119,8 +119,6 @@ static int i40e_fdir_filter_programming(struct
> i40e_pf *pf,
> > enum i40e_filter_pctype pctype,
> > const struct rte_eth_fdir_filter *filter,
> > bool add);
> > -static int i40e_fdir_flush(struct rte_eth_dev *dev);
> > -
> > static int i40e_fdir_filter_convert(const struct rte_eth_fdir_filter
> > *input,
> > struct i40e_fdir_filter *filter); static struct
> i40e_fdir_filter
> > * @@ -128,8 +126,6 @@ i40e_sw_fdir_filter_lookup(struct i40e_fdir_info
> > *fdir_info,
> > const struct rte_eth_fdir_input *input); static int
> > i40e_sw_fdir_filter_insert(struct i40e_pf *pf,
> >struct i40e_fdir_filter *filter); -static int
> > i40e_sw_fdir_filter_del(struct i40e_pf *pf,
> > - struct i40e_fdir_filter *filter);
> >
> > static int
> > i40e_fdir_rx_queue_init(struct i40e_rx_queue *rxq) @@ -1070,7 +1066,7
> > @@ i40e_sw_fdir_filter_insert(struct i40e_pf *pf, struct
> > i40e_fdir_filter *filter) }
> >
> > /* Delete a flow director filter from the SW list */ -static int
> > +int
> > i40e_sw_fdir_filter_del(struct i40e_pf *pf, struct i40e_fdir_filter
> > *filter) {
> > struct i40e_fdir_info *fdir_info = &pf->fdir; @@ -1318,7 +1314,7 @@
> > i40e_fdir_filter_programming(struct i40e_pf *pf,
> > * i40e_fdir_flush - clear all filters of Flow Director table
> > * @pf: board private structure
> > */
> > -static int
> > +int
> > i40e_fdir_flush(struct rte_eth_dev *dev) {
> > struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data-
> >dev_private);
> > diff --git a/drivers/net/i40e/i40e_flow.c
> > b/drivers/net/i40e/i40e_flow.c index 4c7856c..1d9f603 100644
> > --- a/drivers/net/i40e/i40e_flow.c
> > +++ b/drivers/net/i40e/i40e_flow.c
> > @@ -68,6 +68,8 @@ static struct rte_flow *i40e_flow_create(struct
> rte_eth_dev *dev,
> > const struct rte_flow_item pattern[],
> > const struct rte_flow_action
> actions[],
> > struct rte_flow_error *error);
> > +static int i40e_flow_flush(struct rte_eth_dev *dev,
> > + struct rte_flow_error *error);
> > static int i40e_flow_destroy(struct rte_eth_dev *dev,
> > struct rte_flow *flow,
> > struct rte_flow_error *error); @@ -95,11 +97,13
> @@ static int
> > i40e_dev_destroy_ethertype_filter(struct i40e_pf *pf,
> > struct i40e_ethertype_filter *filter);
> > static
> int
> > i40e_dev_destroy_tunnel_filter(struct i40e_pf *pf,
> > struct i40e_tunnel_filter *filter);
> > +static int i40e_fdir_filter_flush(struct i40e_pf *pf);
> >
> > const struct rte_flow_ops i40e_flow_ops = {
> > .validate = i40e_flow_validate,
> > .create = i40e_flow_create,
> > .destroy = i40e_flow_destroy,
> > + .flush = i40e_flow_flush,
> > };
> >
> > enum rte_filter_type con
Re: [dpdk-dev] [PATCH v2 12/17] net/i40e: destroy ethertype filter
> -Original Message-
> From: Bie, Tiwei
> Sent: Wednesday, December 28, 2016 12:56 PM
> To: Xing, Beilei
> Cc: Wu, Jingjing ; Zhang, Helin
> ; dev@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH v2 12/17] net/i40e: destroy ethertype filter
>
> On Tue, Dec 27, 2016 at 02:26:19PM +0800, Beilei Xing wrote:
> > This patch adds i40e_dev_destroy_ethertype_filter function to destroy
> > a ethertype filter for users.
> >
> > Signed-off-by: Beilei Xing
> > ---
> > drivers/net/i40e/i40e_ethdev.c | 10 ++---
> > drivers/net/i40e/i40e_ethdev.h | 5 +
> > drivers/net/i40e/i40e_flow.c | 51
> --
> > 3 files changed, 56 insertions(+), 10 deletions(-)
> >
> [...]
> > diff --git a/drivers/net/i40e/i40e_flow.c
> > b/drivers/net/i40e/i40e_flow.c index 2a61c4f..732c411 100644
> > --- a/drivers/net/i40e/i40e_flow.c
> > +++ b/drivers/net/i40e/i40e_flow.c
> [...]
> > @@ -1492,11 +1495,16 @@ i40e_flow_destroy(__rte_unused struct
> > rte_eth_dev *dev,
>
> The `__rte_unused' qualifier should be removed.
Yes :)
>
> > struct rte_flow *flow,
> > struct rte_flow_error *error)
> > {
> > + struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data-
> >dev_private);
> > struct i40e_flow *pmd_flow = (struct i40e_flow *)flow;
> > enum rte_filter_type filter_type = pmd_flow->filter_type;
> > int ret;
> >
> > switch (filter_type) {
> > + case RTE_ETH_FILTER_ETHERTYPE:
> > + ret = i40e_dev_destroy_ethertype_filter(pf,
> > + (struct i40e_ethertype_filter *)pmd_flow-
> >rule);
> > + break;
> > default:
> > PMD_DRV_LOG(WARNING, "Filter type (%d) not supported",
> > filter_type);
> > @@ -1504,10 +1512,49 @@ i40e_flow_destroy(__rte_unused struct
> rte_eth_dev *dev,
> > break;
> > }
> >
> > - if (ret)
> > + if (!ret) {
> > + TAILQ_REMOVE(&pf->flow_list, pmd_flow, node);
> > + free(pmd_flow);
> > + } else {
> > rte_flow_error_set(error, EINVAL,
> >RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
> >"Failed to destroy flow.");
> > + }
>
> Probably you should introduce the pf related code when introducing
> i40e_flow_destroy() in the below patch:
>
> [PATCH v2 11/17] net/i40e: add flow destroy function
Good point, thanks.
>
> > +
> > + return ret;
> > +}
> > +
> > +static int
> > +i40e_dev_destroy_ethertype_filter(struct i40e_pf *pf,
> > + struct i40e_ethertype_filter *filter) {
> > + struct i40e_hw *hw = I40E_PF_TO_HW(pf);
> > + struct i40e_ethertype_rule *ethertype_rule = &pf->ethertype;
> > + struct i40e_ethertype_filter *node;
> > + struct i40e_control_filter_stats stats;
> > + uint16_t flags = 0;
> > + int ret = 0;
> > +
> > + if (!(filter->flags & RTE_ETHTYPE_FLAGS_MAC))
> > + flags |=
> I40E_AQC_ADD_CONTROL_PACKET_FLAGS_IGNORE_MAC;
> > + if (filter->flags & RTE_ETHTYPE_FLAGS_DROP)
> > + flags |= I40E_AQC_ADD_CONTROL_PACKET_FLAGS_DROP;
> > + flags |= I40E_AQC_ADD_CONTROL_PACKET_FLAGS_TO_QUEUE;
> > +
> > + memset(&stats, 0, sizeof(stats));
> > + ret = i40e_aq_add_rem_control_packet_filter(hw,
> > + filter->input.mac_addr.addr_bytes,
> > + filter->input.ether_type,
> > + flags, pf->main_vsi->seid,
> > + filter->queue, 0, &stats, NULL);
> > + if (ret < 0)
> > + return ret;
> > +
> > + node = i40e_sw_ethertype_filter_lookup(ethertype_rule, &filter-
> >input);
> > + if (node)
> > + ret = i40e_sw_ethertype_filter_del(pf, node);
> > + else
> > + return -EINVAL;
>
> It would be more readable to check whether node equals NULL and return
> when it's true, and call i40e_sw_ethertype_filter_del(pf, node) outside the
> `if' statement:
>
> node = i40e_sw_ethertype_filter_lookup(ethertype_rule, &filter-
> >input);
> if (node == NULL)
> return -EINVAL;
>
> ret = i40e_sw_ethertype_filter_del(pf, node);
Make sense, got it:)
>
> Best regards,
> Tiwei Bie
Re: [dpdk-dev] [PATCH v2 15/17] net/i40e: add flow flush function
On Wed, Dec 28, 2016 at 02:48:02PM +0800, Xing, Beilei wrote: > > -Original Message- > > From: Bie, Tiwei > > Sent: Wednesday, December 28, 2016 1:36 PM > > To: Xing, Beilei > > Cc: Wu, Jingjing ; Zhang, Helin > > ; dev@dpdk.org > > Subject: Re: [dpdk-dev] [PATCH v2 15/17] net/i40e: add flow flush function > > > > On Tue, Dec 27, 2016 at 02:26:22PM +0800, Beilei Xing wrote: > > > This patch adds i40e_flow_flush function to flush all filters for > > > users. And flow director flush function is involved first. > > > > > > Signed-off-by: Beilei Xing > > > --- > > > drivers/net/i40e/i40e_ethdev.h | 3 +++ > > > drivers/net/i40e/i40e_fdir.c | 8 ++-- > > > drivers/net/i40e/i40e_flow.c | 46 > > ++ > > > 3 files changed, 51 insertions(+), 6 deletions(-) > > > > > > diff --git a/drivers/net/i40e/i40e_ethdev.h > > > b/drivers/net/i40e/i40e_ethdev.h index b8c7d41..0b736d5 100644 > > > --- a/drivers/net/i40e/i40e_ethdev.h > > > +++ b/drivers/net/i40e/i40e_ethdev.h > > > @@ -786,6 +786,9 @@ i40e_sw_tunnel_filter_lookup(struct > > i40e_tunnel_rule *tunnel_rule, > > >const struct i40e_tunnel_filter_input *input); int > > > i40e_sw_tunnel_filter_del(struct i40e_pf *pf, > > > struct i40e_tunnel_filter *tunnel_filter); > > > +int i40e_sw_fdir_filter_del(struct i40e_pf *pf, > > > + struct i40e_fdir_filter *filter); int > > i40e_fdir_flush(struct > > > +rte_eth_dev *dev); > > > > > > > Why don't declare them as the global functions at the beginning? > > When I implement the store/restore function, I plan this function is only > used in i40e_ethdev.c. > I change them to the global functions since I add i40e_flow.c to rework all > the flow ops. > These functions are also introduced in this patch set. There is no particular reason to mark them as static at first and then turn them into the global functions in the later patches. So it would be better to declare them as the global ones when introducing them. Best regards, Tiwei Bie
Re: [dpdk-dev] [PATCH v2 03/17] net/i40e: store flow director filter
> -Original Message-
> From: Bie, Tiwei
> Sent: Wednesday, December 28, 2016 11:39 AM
> To: Xing, Beilei
> Cc: Wu, Jingjing ; Zhang, Helin
> ; dev@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH v2 03/17] net/i40e: store flow director filter
>
> On Tue, Dec 27, 2016 at 02:26:10PM +0800, Beilei Xing wrote:
> > Currently there's no flow director filter stored in SW. This patch
> > stores flow director filters in SW with cuckoo hash, also adds
> > protection if a flow director filter has been added.
> >
> > Signed-off-by: Beilei Xing
> > ---
> > drivers/net/i40e/i40e_ethdev.c | 48 +
> > drivers/net/i40e/i40e_ethdev.h | 12 ++
> > drivers/net/i40e/i40e_fdir.c | 98
> ++
> > 3 files changed, 158 insertions(+)
> >
> > diff --git a/drivers/net/i40e/i40e_ethdev.c
> > b/drivers/net/i40e/i40e_ethdev.c index c012d5d..427ebdc 100644
> > --- a/drivers/net/i40e/i40e_ethdev.c
> > +++ b/drivers/net/i40e/i40e_ethdev.c
> [...]
> > @@ -1342,6 +1379,17 @@ eth_i40e_dev_uninit(struct rte_eth_dev *dev)
> > rte_free(p_tunnel);
> > }
> >
> > + /* Remove all flow director rules and hash */
> > + if (fdir_info->hash_map)
> > + rte_free(fdir_info->hash_map);
> > + if (fdir_info->hash_table)
> > + rte_hash_free(fdir_info->hash_table);
> > +
> > + while ((p_fdir = TAILQ_FIRST(&fdir_info->fdir_list))) {
>
> There is a redundant pair of parentheses, or you should compare with NULL.
I think the another parentheses is used to compare with NULL. In fact there's
similar using in PMD.
>
> > + TAILQ_REMOVE(&fdir_info->fdir_list, p_fdir, rules);
> > + rte_free(p_fdir);
> > + }
> > +
> > dev->dev_ops = NULL;
> > dev->rx_pkt_burst = NULL;
> > dev->tx_pkt_burst = NULL;
> [...]
> > diff --git a/drivers/net/i40e/i40e_fdir.c
> > b/drivers/net/i40e/i40e_fdir.c index 335bf15..faa2495 100644
> > --- a/drivers/net/i40e/i40e_fdir.c
> > +++ b/drivers/net/i40e/i40e_fdir.c
> [...]
> > +/* Check if there exists the flow director filter */ static struct
> > +i40e_fdir_filter * i40e_sw_fdir_filter_lookup(struct i40e_fdir_info
> > +*fdir_info,
> > + const struct rte_eth_fdir_input *input) {
> > + int ret = 0;
> > +
>
> The initialization is meaningless, as it will be written by the below
> assignment unconditionally.
Yes, you're right.
>
> > + ret = rte_hash_lookup(fdir_info->hash_table, (const void *)input);
> > + if (ret < 0)
> > + return NULL;
> > +
> > + return fdir_info->hash_map[ret];
> > +}
> > +
> > +/* Add a flow director filter into the SW list */
> > +static int
> > +i40e_sw_fdir_filter_insert(struct i40e_pf *pf, struct i40e_fdir_filter
> > *filter)
> > +{
> > + struct i40e_fdir_info *fdir_info = &pf->fdir;
> > + int ret = 0;
> > +
>
> Same here.
>
> > + ret = rte_hash_add_key(fdir_info->hash_table,
> > + &filter->fdir.input);
> > + if (ret < 0)
> > + PMD_DRV_LOG(ERR,
> > + "Failed to insert fdir filter to hash table %d!",
> > + ret);
>
> Function should return when ret < 0.
Thanks for catching it.
>
> > + fdir_info->hash_map[ret] = filter;
> > +
> > + TAILQ_INSERT_TAIL(&fdir_info->fdir_list, filter, rules);
> > +
> > + return 0;
> > +}
> > +
> > +/* Delete a flow director filter from the SW list */
> > +static int
> > +i40e_sw_fdir_filter_del(struct i40e_pf *pf, struct i40e_fdir_filter
> > *filter)
> > +{
> > + struct i40e_fdir_info *fdir_info = &pf->fdir;
> > + int ret = 0;
> > +
>
> Same here.
>
> > + ret = rte_hash_del_key(fdir_info->hash_table,
> > + &filter->fdir.input);
> > + if (ret < 0)
> > + PMD_DRV_LOG(ERR,
> > + "Failed to delete fdir filter to hash table %d!",
> > + ret);
>
> Function should return when ret < 0.
>
> > + fdir_info->hash_map[ret] = NULL;
> > +
> > + TAILQ_REMOVE(&fdir_info->fdir_list, filter, rules);
> > + rte_free(filter);
> > +
> > + return 0;
> > +}
> > +
> > /*
> > * i40e_add_del_fdir_filter - add or remove a flow director filter.
> > * @pf: board private structure
> > @@ -1032,6 +1105,8 @@ i40e_add_del_fdir_filter(struct rte_eth_dev *dev,
> > struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data-
> >dev_private);
> > unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt;
> > enum i40e_filter_pctype pctype;
> > + struct i40e_fdir_info *fdir_info = &pf->fdir;
> > + struct i40e_fdir_filter *fdir_filter, *node;
> > int ret = 0;
> >
> > if (dev->data->dev_conf.fdir_conf.mode !=
> RTE_FDIR_MODE_PERFECT) {
> > @@ -1054,6 +1129,21 @@ i40e_add_del_fdir_filter(struct rte_eth_dev
> *dev,
> > return -EINVAL;
> > }
> >
> > + fdir_filter = rte_zmalloc("fdir_filter", sizeof(*fdir_filter), 0);
> > + i40e_fdir_filter_convert(filter, fdir_filter);
> > + node = i40e_sw_fdir_filter_lookup(fdir_info
Re: [dpdk-dev] [PATCH v2 03/17] net/i40e: store flow director filter
On Wed, Dec 28, 2016 at 03:10:39PM +0800, Xing, Beilei wrote:
>
>
> > -Original Message-
> > From: Bie, Tiwei
> > Sent: Wednesday, December 28, 2016 11:39 AM
> > To: Xing, Beilei
> > Cc: Wu, Jingjing ; Zhang, Helin
> > ; dev@dpdk.org
> > Subject: Re: [dpdk-dev] [PATCH v2 03/17] net/i40e: store flow director
> > filter
> >
> > On Tue, Dec 27, 2016 at 02:26:10PM +0800, Beilei Xing wrote:
> > > Currently there's no flow director filter stored in SW. This patch
> > > stores flow director filters in SW with cuckoo hash, also adds
> > > protection if a flow director filter has been added.
> > >
> > > Signed-off-by: Beilei Xing
> > > ---
> > > drivers/net/i40e/i40e_ethdev.c | 48 +
> > > drivers/net/i40e/i40e_ethdev.h | 12 ++
> > > drivers/net/i40e/i40e_fdir.c | 98
> > ++
> > > 3 files changed, 158 insertions(+)
> > >
> > > diff --git a/drivers/net/i40e/i40e_ethdev.c
> > > b/drivers/net/i40e/i40e_ethdev.c index c012d5d..427ebdc 100644
> > > --- a/drivers/net/i40e/i40e_ethdev.c
> > > +++ b/drivers/net/i40e/i40e_ethdev.c
> > [...]
> > > @@ -1342,6 +1379,17 @@ eth_i40e_dev_uninit(struct rte_eth_dev *dev)
> > > rte_free(p_tunnel);
> > > }
> > >
> > > + /* Remove all flow director rules and hash */
> > > + if (fdir_info->hash_map)
> > > + rte_free(fdir_info->hash_map);
> > > + if (fdir_info->hash_table)
> > > + rte_hash_free(fdir_info->hash_table);
> > > +
> > > + while ((p_fdir = TAILQ_FIRST(&fdir_info->fdir_list))) {
> >
> > There is a redundant pair of parentheses, or you should compare with NULL.
>
> I think the another parentheses is used to compare with NULL. In fact there's
> similar using in PMD.
>
The outer parentheses are redundant unless you compare it with NULL explicitly.
Any way, you could just follow the existing coding style.
Best regards,
Tiwei Bie
Re: [dpdk-dev] [PATCH v2 15/17] net/i40e: add flow flush function
> -Original Message- > From: Bie, Tiwei > Sent: Wednesday, December 28, 2016 3:01 PM > To: Xing, Beilei > Cc: Wu, Jingjing ; Zhang, Helin > ; dev@dpdk.org > Subject: Re: [dpdk-dev] [PATCH v2 15/17] net/i40e: add flow flush function > > On Wed, Dec 28, 2016 at 02:48:02PM +0800, Xing, Beilei wrote: > > > -Original Message- > > > From: Bie, Tiwei > > > Sent: Wednesday, December 28, 2016 1:36 PM > > > To: Xing, Beilei > > > Cc: Wu, Jingjing ; Zhang, Helin > > > ; dev@dpdk.org > > > Subject: Re: [dpdk-dev] [PATCH v2 15/17] net/i40e: add flow flush > > > function > > > > > > On Tue, Dec 27, 2016 at 02:26:22PM +0800, Beilei Xing wrote: > > > > This patch adds i40e_flow_flush function to flush all filters for > > > > users. And flow director flush function is involved first. > > > > > > > > Signed-off-by: Beilei Xing > > > > --- > > > > drivers/net/i40e/i40e_ethdev.h | 3 +++ > > > > drivers/net/i40e/i40e_fdir.c | 8 ++-- > > > > drivers/net/i40e/i40e_flow.c | 46 > > > ++ > > > > 3 files changed, 51 insertions(+), 6 deletions(-) > > > > > > > > diff --git a/drivers/net/i40e/i40e_ethdev.h > > > > b/drivers/net/i40e/i40e_ethdev.h index b8c7d41..0b736d5 100644 > > > > --- a/drivers/net/i40e/i40e_ethdev.h > > > > +++ b/drivers/net/i40e/i40e_ethdev.h > > > > @@ -786,6 +786,9 @@ i40e_sw_tunnel_filter_lookup(struct > > > i40e_tunnel_rule *tunnel_rule, > > > > const struct i40e_tunnel_filter_input > > > > *input); int > > > > i40e_sw_tunnel_filter_del(struct i40e_pf *pf, > > > > struct i40e_tunnel_filter *tunnel_filter); > > > > +int i40e_sw_fdir_filter_del(struct i40e_pf *pf, > > > > + struct i40e_fdir_filter *filter); int > > > i40e_fdir_flush(struct > > > > +rte_eth_dev *dev); > > > > > > > > > > Why don't declare them as the global functions at the beginning? > > > > When I implement the store/restore function, I plan this function is only > used in i40e_ethdev.c. > > I change them to the global functions since I add i40e_flow.c to rework all > the flow ops. > > > > These functions are also introduced in this patch set. There is no particular > reason to mark them as static at first and then turn them into the global > functions in the later patches. So it would be better to declare them as the > global ones when introducing them. Yes, make sense. Will update in next version. > > Best regards, > Tiwei Bie
Re: [dpdk-dev] [PATCH v2 12/17] net/i40e: destroy ethertype filter
> -Original Message-
> From: Wu, Jingjing
> Sent: Wednesday, December 28, 2016 11:30 AM
> To: Xing, Beilei ; Zhang, Helin
>
> Cc: dev@dpdk.org
> Subject: RE: [PATCH v2 12/17] net/i40e: destroy ethertype filter
>
> >
> > const struct rte_flow_ops i40e_flow_ops = {
> > .validate = i40e_flow_validate,
> > @@ -1492,11 +1495,16 @@ i40e_flow_destroy(__rte_unused struct
> > rte_eth_dev *dev,
> > struct rte_flow *flow,
> > struct rte_flow_error *error)
> > {
> > + struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data-
> > >dev_private);
> > struct i40e_flow *pmd_flow = (struct i40e_flow *)flow;
> > enum rte_filter_type filter_type = pmd_flow->filter_type;
> > int ret;
> >
> > switch (filter_type) {
> > + case RTE_ETH_FILTER_ETHERTYPE:
> > + ret = i40e_dev_destroy_ethertype_filter(pf,
> > + (struct i40e_ethertype_filter *)pmd_flow-
> >rule);
> > + break;
> > default:
> > PMD_DRV_LOG(WARNING, "Filter type (%d) not supported",
> > filter_type);
> > @@ -1504,10 +1512,49 @@ i40e_flow_destroy(__rte_unused struct
> > rte_eth_dev *dev,
> > break;
> > }
> >
> > - if (ret)
> > + if (!ret) {
> > + TAILQ_REMOVE(&pf->flow_list, pmd_flow, node);
> > + free(pmd_flow);
> Should it be freed inside the function? Is the API definition like that?
Yes, since API or rte won't free the flow allocated by PMD. Please refer to the
attached mail.
Re: [dpdk-dev] [PATCH v2 03/17] net/i40e: store flow director filter
On Wed, Dec 28, 2016 at 03:14:55PM +0800, Tiwei Bie wrote:
> On Wed, Dec 28, 2016 at 03:10:39PM +0800, Xing, Beilei wrote:
> >
> >
> > > -Original Message-
> > > From: Bie, Tiwei
> > > Sent: Wednesday, December 28, 2016 11:39 AM
> > > To: Xing, Beilei
> > > Cc: Wu, Jingjing ; Zhang, Helin
> > > ; dev@dpdk.org
> > > Subject: Re: [dpdk-dev] [PATCH v2 03/17] net/i40e: store flow director
> > > filter
> > >
> > > On Tue, Dec 27, 2016 at 02:26:10PM +0800, Beilei Xing wrote:
> > > > Currently there's no flow director filter stored in SW. This patch
> > > > stores flow director filters in SW with cuckoo hash, also adds
> > > > protection if a flow director filter has been added.
> > > >
> > > > Signed-off-by: Beilei Xing
> > > > ---
> > > > drivers/net/i40e/i40e_ethdev.c | 48 +
> > > > drivers/net/i40e/i40e_ethdev.h | 12 ++
> > > > drivers/net/i40e/i40e_fdir.c | 98
> > > ++
> > > > 3 files changed, 158 insertions(+)
> > > >
> > > > diff --git a/drivers/net/i40e/i40e_ethdev.c
> > > > b/drivers/net/i40e/i40e_ethdev.c index c012d5d..427ebdc 100644
> > > > --- a/drivers/net/i40e/i40e_ethdev.c
> > > > +++ b/drivers/net/i40e/i40e_ethdev.c
> > > [...]
> > > > @@ -1342,6 +1379,17 @@ eth_i40e_dev_uninit(struct rte_eth_dev *dev)
> > > > rte_free(p_tunnel);
> > > > }
> > > >
> > > > + /* Remove all flow director rules and hash */
> > > > + if (fdir_info->hash_map)
> > > > + rte_free(fdir_info->hash_map);
> > > > + if (fdir_info->hash_table)
> > > > + rte_hash_free(fdir_info->hash_table);
> > > > +
> > > > + while ((p_fdir = TAILQ_FIRST(&fdir_info->fdir_list))) {
> > >
> > > There is a redundant pair of parentheses, or you should compare with NULL.
> >
> > I think the another parentheses is used to compare with NULL. In fact
> > there's similar using in PMD.
> >
>
> The outer parentheses are redundant unless you compare it with NULL
> explicitly.
> Any way, you could just follow the existing coding style.
>
Sorry, I was wrong here. I just did a quick check and noticed that DPDK
has enabled the below option:
-Werror=parentheses
The outer parentheses are NOT redundant even if you don't compare it with
NULL explicitly.
Best regards,
Tiwei Bie
Re: [dpdk-dev] [PATCH v2 07/17] net/i40e: add flow validate function
> -Original Message-
> From: Wu, Jingjing
> Sent: Wednesday, December 28, 2016 10:52 AM
> To: Xing, Beilei ; Zhang, Helin
>
> Cc: dev@dpdk.org
> Subject: RE: [PATCH v2 07/17] net/i40e: add flow validate function
>
>
> >
> > +union i40e_filter_t {
> > + struct rte_eth_ethertype_filter ethertype_filter;
> > + struct rte_eth_fdir_filter fdir_filter;
> > + struct rte_eth_tunnel_filter_conf tunnel_filter; } cons_filter;
> > +
> > +typedef int (*parse_filter_t)(struct rte_eth_dev *dev,
> > + const struct rte_flow_attr *attr,
> > + const struct rte_flow_item pattern[],
> > + const struct rte_flow_action actions[],
> > + struct rte_flow_error *error,
> > + union i40e_filter_t *filter);
> You can use void* instead of define union i40e_filter_t.
I tried the void * before, but I should determine the filter type when creating
a flow. If using void*, I can get the filter info but I don't know which filer
type it belongs to.
>
> > +struct i40e_valid_pattern {
> > + enum rte_flow_item_type *items;
> What the item points to? Add few comments
It's the pattern without VOID items. I'll add comments in next version.
> > +
> > + ret = parse_filter(dev, attr, items, actions, error, &cons_filter);
>
> Will you use cons_filter later? If not, it looks like we don't need the
> argument
> at all.
Yes, it's used to create flow. We us parse_filter to get the filter info. When
creating a flow, flow_validate will be involved first to get filter info, then
set filter according to the filter info.
> > +
> > + rte_free(items);
> > +
> > + return ret;
> > +}
> > --
> > 2.5.5
