Re: [PATCH 2/6] pnv/xive: Fix possible undefined shift error in group size calculation

On 3/17/25 06:23, Nicholas Piggin wrote: Coverity discovered a potential shift overflow in group size calculation in the case of a guest error. Add checks and logs to ensure a issues are caught. Make the group and crowd error checking code more similar to one another while here. Resolves: Cover

Re: [PATCH 3/6] ppc/xive2: Fix logical / bitwise comparison typo

On 3/17/25 06:23, Nicholas Piggin wrote: The comparison as written is always false (perhaps confusingly, because the functions/macros are not really booleans but return 0 or the tested bit value). Change to use logical-and. Resolves: Coverity CID 1593721 Cc: Cédric Le Goater Signed-off-by: Nich

Re: Broken NetBSD Orange Pi image URL in QEMU tests

On 15/03/2025 22.01, Niek Linnenbank wrote: Hello Stefan, As of today, it seems the URL is working properly again. I've done a few downloads without any error. What I did notice is that NetBSD provides a 'cdn.netbsd.org cdn.netbsd.org>' also, but I can't see any noticable difference yet. Oh,

Re: [PATCH v3 6/7] memory: Attach MemoryAttributeManager to guest_memfd-backed RAMBlocks

On 3/17/2025 2:18 PM, Tony Lindgren wrote: > Hi, > > On Mon, Mar 10, 2025 at 04:18:34PM +0800, Chenyi Qiang wrote: >> --- a/system/physmem.c >> +++ b/system/physmem.c >> @@ -1885,6 +1886,16 @@ static void ram_block_add(RAMBlock *new_block, Error >> **errp) >> qemu_mutex_unlock_ram

[PATCH 0/4] hw/intc/loongarch_pch: Cleanup with register name

Here is cleanup with register name, the width of some registers are 64 bit. To emulate 32 bit memory access, it is split into two registers with suffix name low and high. Here register name and (register name + 4) is used rather than splitting into two registers. There is no function change in thi

Re: [PATCH v3 6/7] memory: Attach MemoryAttributeManager to guest_memfd-backed RAMBlocks

On Mon, Mar 17, 2025 at 03:32:16PM +0800, Chenyi Qiang wrote: > > > On 3/17/2025 2:18 PM, Tony Lindgren wrote: > > Hi, > > > > On Mon, Mar 10, 2025 at 04:18:34PM +0800, Chenyi Qiang wrote: > >> --- a/system/physmem.c > >> +++ b/system/physmem.c > >> @@ -1885,6 +1886,16 @@ static void ram_block_a

[PATCH 2/4] hw/intc/loongarch_pch: Rename register name

For some registers with width 8 bytes, its name is something like PCH_PIC_INT_ID_LO and PCH_PIC_INT_ID_HI. From hardware manual, register name is PCH_PIC_INT_ID instead. Here name PCH_PIC_INT_ID is used, and PCH_PIC_INT_ID + 4 is used for PCH_PIC_INT_ID_HI. Signed-off-by: Bibo Mao --- hw/intc/lo

[PATCH 1/4] hw/intc/loongarch_pch: Use default path when access some registers

For some registers such as PCH_PIC_AUTO_CTRL0_LO etc which are not emulated, emulation driver does nothing. It is the same with default handling, here remove these registers and use the default path for simplification. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c | 10 -- 1 fi

Re: [PATCH RFC v4 00/11] virtio-net: Offload hashing without eBPF

QE tested this RFC series of patches with virtio-net regression tests, everything works fine. Tested-by: Lei Yang On Thu, Mar 13, 2025 at 2:56 PM Akihiko Odaki wrote: > > I'm proposing to add a feature to offload virtio-net RSS/hash report to > Linux. This series contain patches to utilize the

[PATCH 3/4] hw/intc/loongarch_pch: Rename macro PCH_PIC_xxx_OFFSET with PCH_PIC_xxx

Macro PCH_PIC_HTMSI_VEC_OFFSET and PCH_PIC_ROUTE_ENTRY_OFFSET is renamed as PCH_PIC_HTMSI_VEC and PCH_PIC_ROUTE_ENTRY separately, it is easier to understand. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c| 20 ++-- hw/loongarch/virt.c| 2

[PATCH 4/4] hw/intc/loongarch_pch: Remove some duplicate macro

The meaning of macro definition STATUS_LO_START is simliar with PCH_PIC_INT_STATUS, only that offset is different, the same for macro POL_LO_START. Now remove these duplicated macro definitions. Signed-off-by: Bibo Mao --- hw/intc/loongarch_pch_pic.c| 20 ++-- include

Re: [PATCH v6] hw/misc/vmfwupdate: Introduce hypervisor fw-cfg interface support

On Fri, Mar 14, 2025 at 03:50:19PM +0100, Alexander Graf wrote: > > On 14.03.25 15:08, Gerd Hoffman wrote: > >Hi, > > > > > > Ok, assuming we allow the guest submit a IGVM image (which makes sense > > > > indeed, otherwise we'll probably end up re-inventing IGVM). How will > > > > the kernel

Re: [PATCH v3 4/7] memory-attribute-manager: Introduce MemoryAttributeManager to manage RAMBLock with guest_memfd

On 17.03.25 03:54, Chenyi Qiang wrote: On 3/14/2025 8:11 PM, Gupta, Pankaj wrote: On 3/10/2025 9:18 AM, Chenyi Qiang wrote: As the commit 852f0048f3 ("RAMBlock: make guest_memfd require uncoordinated discard") highlighted, some subsystems like VFIO may disable ram block discard. However, gues

Re: [PATCH 2/2] memory: suppress INVALID_MEM logs caused by debug access

On Mon Mar 17, 2025 at 7:03 PM AEST, Philippe Mathieu-Daudé wrote: > On 14/3/25 08:41, Nicholas Piggin wrote: >> Debugger-driven invalid memory accesses are not guest errors, so should >> not cause these error logs. >> >> Debuggers can access memory wildly, including access to addresses not >> spe

Re: [PATCH 2/6] amd_iommu: Fix Device ID decoding for INVALIDATE_IOTLB_PAGES command

Alejandro, On 3/11/2025 8:54 PM, Alejandro Jimenez wrote: > The DeviceID bits are extracted using an incorrect offset in the call to > amdvi_iotlb_remove_page(). This field is read (correctly) earlier, so use > the value already retrieved for devid. > > Cc: qemu-sta...@nongnu.org > Fixes: d29a09c

[PATCH 17/17] rust/vmstate: Add unit test for vmstate_validate

Add a unit test for vmstate_validate, which corresponds to the C version macro: VMSTATE_VALIDATE. Signed-off-by: Zhao Liu --- rust/qemu-api/tests/vmstate_tests.rs | 91 +++- 1 file changed, 89 insertions(+), 2 deletions(-) diff --git a/rust/qemu-api/tests/vmstate_tests.r

[PATCH 15/17] rust/vmstate: Add unit test for vmstate_{of|struct} macro

Add a unit test to cover some patterns accepted by vmstate_of and vmstate_struct macros, which correspond to the following C version macros: * VMSTATE_BOOL_V * VMSTATE_U64 * VMSTATE_STRUCT_VARRAY_UINT8 * (no C version) MULTIPLY variant of VMSTATE_STRUCT_VARRAY_UINT32 * VMSTATE_ARRAY Signed-o

[PATCH 14/17] rust/vmstate: Add unit test for vmstate_of macro

The vmstate has too many combinations of VMStateFlags and VMStateField. Currently, the best way to test is to ensure that the Rust vmstate definition is consistent with the (possibly corresponding) C version. Add a unit test to cover some patterns accepted by vmstate_of macro, which correspond to

[PATCH 04/17] rust/vmstate: Use ident instead of expr to parse vmsd in vmstate_struct macro

When specify an array field in vmstate_struct macro, there will be an error: > local ambiguity when calling macro `vmstate_struct`: multiple parsing > options: built-in NTs expr ('vmsd') or 1 other option. This is because "expr" can't recognize the "vmsd" field correctly, so that it gets confused

Re: [PATCH 1/2] io/block: Refactoring the bdrv_drained_begin() function and implement a timeout mechanism.

On Mon, Mar 17, 2025 at 08:18:28PM +0800, zoudongjie wrote: > On Thu, 13 Mar, 2025 at 12:09:45 +0800, Stefan Hajnoczi wrote: > > On Sat, Mar 08, 2025 at 06:16:17PM +0800, zoudongjie wrote: > > > @@ -342,16 +350,25 @@ static void coroutine_fn > > > bdrv_co_yield_to_drain(BlockDriverState *bs, > > >

[PATCH 16/17] rust/vmstate: Add unit test for pointer case

Add a unit test to cover some patterns accepted by vmstate_of macro, which correspond to the following C version macros: * VMSTATE_POINTER * VMSTATE_ARRAY_OF_POINTER Note: Currently, vmstate_struct can't handle the pointer to structure case. Leave this case as a FIXME and use vmstate_unused as a

Re: [PATCH for-10.1 1/9] core/cpu.h: gdb_arch_name string should not be freed

Peter Maydell writes: > The documentation for the CPUClass::gdb_arch_name method claims that > the returned string should be freed with g_free(). This is not > correct: in commit a650683871ba728 we changed this method to > instead return a simple constant string, but forgot to update > the docum

Re: [PATCH for-10.1 2/9] gdbstub: Allow gdb_core_xml_file to be set at runtime

Peter Maydell writes: > Currently the CPUClass:gdb_core_xml_file setting is a simple 'const > char *' which the CPU class must set to a fixed string. Allow the > CPU class to instead set a new method gdb_get_core_xml_file() which > returns this string. > > This will allow Arm CPUs to use differe

[PATCH for-10.1 9/9] target/arm: Remove TYPE_AARCH64_CPU

The TYPE_AARCH64_CPU class is an abstract type that is the parent of all the AArch64 CPUs. It now has no special behaviour of its own, so we can eliminate it and make the AArch64 CPUs directly inherit from TYPE_ARM_CPU. Signed-off-by: Peter Maydell --- target/arm/cpu-qom.h | 5 - target/

[PATCH for-10.1 8/9] target/arm/kvm: don't check TYPE_AARCH64_CPU

We want to merge TYPE_AARCH64_CPU with TYPE_ARM_CPU, so enforcing in kvm_arch_init_vcpu() that the CPU class is a subclass of TYPE_AARCH64_CPU will no longer be possible. It's safe to just remove this test, because any purely-AArch32 CPU will fail the "kvm_target isn't set" check, because we no lo

[PATCH for-10.1 0/9] target/arm: Remove TYPE_AARCH64_CPU class

Currently we have a class hierarchy for Arm CPUs where all the 32-bit CPUs (including M-profile) inherit directly from TYPE_ARM_CPU, but the 64-bit CPUs inherit from TYPE_AARCH64_CPU, which is a subclass of TYPE_ARM_CPU. This subclass does essentially two things: * it sets up fields and methods fo

[PATCH for-10.1 5/9] target/arm: Handle AArch64 gdb read/write regs in TYPE_ARM_CPU

Instead of having the TYPE_AARCH64_CPU subclass set CPUClass::gdb_read_register and ::gdb_write_register to different methods from those of the TYPE_ARM_CPU parent class, have the TYPE_ARM_CPU methods handle either AArch32 or AArch64 at runtime. Signed-off-by: Peter Maydell --- target/arm/cpu64.

[PATCH 13/17] rust/vmstate: Support vmstate_validate

In C version, VMSTATE_VALIDATE accepts the function pointer, which is used to check if some conditions of structure could meet, although the C version macro doesn't accept any structure as the opaque type. But it's hard to integrate VMSTATE_VALIDAE into vmstate_struct, a new macro has to be introd

[PATCH 11/17] rust/vmstate: Re-implement VMState trait for timer binding

At present, Rust side has a timer binding "timer::Timer", so the vmstate for timer should base on that binding instead of the raw "binding::QEMUTimer". It's possible to apply impl_vmstate_transparent for cell::Opaque and then impl_vmstate_forward for timer::Timer. But binding::QEMUTimer shouldn't

[PATCH 09/17] rust/vmstate: Fix unnecessary VMState bound of with_varray_flag()

The VMState type bound is not used in with_varray_flag(). And for vmstate_struct, Rust cannot infer the type of `num` from the call_func_with_field(), so this causes the compiling error because it complains "cannot satisfy `_: VMState`" in with_varray_flag(). Note Rust can infer the type in vmsta

[PATCH 1/2] accel/tcg: Remove unnecesary inclusion of memory-internal.h in cputlb.c

At some point cputlb.c stopped depending on the "exec/memory-internal.h" header. Clean that now. Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/cputlb.c | 1 - 1 file changed, 1 deletion(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index fb22048876e..5007bdbcd75 100644 --- a/acc

Re: [PATCH v5 05/17] exec/memory.h: make devend_memop "target defines" agnostic

On 3/17/25 08:48, Philippe Mathieu-Daudé wrote: On 14/3/25 18:31, Pierrick Bouvier wrote: Will allow to make system/memory.c common later. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/exec/memory.h | 16 1 file changed, 4 insertions(+), 12 d

RE: [PATCH 02/39] target/hexagon: Implement {c,}swi helpers

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

Re: [PATCH for-10.1 8/9] target/arm/kvm: don't check TYPE_AARCH64_CPU

On 17/3/25 15:28, Peter Maydell wrote: We want to merge TYPE_AARCH64_CPU with TYPE_ARM_CPU, so enforcing in kvm_arch_init_vcpu() that the CPU class is a subclass of TYPE_AARCH64_CPU will no longer be possible. It's safe to just remove this test, because any purely-AArch32 CPU will fail the "kvm_

Re: [PATCH 0/2] exec: Restrict memory-internal.h to system/

On 17.03.25 17:13, Philippe Mathieu-Daudé wrote: Only file units within the system/ directory need access to "memory-internal.h". Move it to system/ to restrict its scope. Based-on: <20250314173139.2122904-1-pierrick.bouv...@linaro.org> Reviewed-by: David Hildenbrand -- Cheers, David / dhil

Re: [PATCH 0/2] exec: Restrict memory-internal.h to system/

On 3/17/25 09:13, Philippe Mathieu-Daudé wrote: Only file units within the system/ directory need access to "memory-internal.h". Move it to system/ to restrict its scope. Based-on: <20250314173139.2122904-1-pierrick.bouv...@linaro.org> Philippe Mathieu-Daudé (2): accel/tcg: Remove unnecesary

Re: [RFC PATCH v2 03/20] hw/arm/smmuv3-accel: Add initial infrastructure for smmuv3-accel device

On 3/17/25 6:54 PM, Nicolin Chen wrote: > On Wed, Mar 12, 2025 at 04:15:10PM +0100, Eric Auger wrote: >> On 3/11/25 3:10 PM, Shameer Kolothum wrote: >>> Based on SMMUv3 as a parent device, add a user-creatable smmuv3-accel >>> device. In order to support vfio-pci dev assignment with a Guest >>

Re: [RFC PATCH v4 5/5] s390: implementing CHSC SEI for AP config change

On 11/03/2025 16.16, Rorie Reyes wrote: Handle interception of the CHSC SEI instruction for requests indicating the guest's AP configuration has changed. Signed-off-by: Rorie Reyes Reviewed-by: Anthony Krowiak Tested-by: Anthony Krowiak --- target/s390x/ioinst.c | 11 +-- 1 file ch

Re: [PATCH v3 3/4] hw/s390x/ccw: Have CCW machine implement a qmp_dump_skeys() callback

On 10/03/2025 16.14, Philippe Mathieu-Daudé wrote: In preparation to make @dump-skeys command generic, extract s390_qmp_dump_skeys() out of qmp_dump_skeys(). Register it as CCW qmp_dump_skeys() callback. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/s390x/storage-keys.h | 1 + hw/s390

Re: [PATCH v3 4/4] qapi/machine: Make @dump-skeys command generic

On 10/03/2025 16.14, Philippe Mathieu-Daudé wrote: Reduce misc-target.json by one target specific command. Error message is returned for machines not implementing TYPE_DUMP_SKEYS_INTERFACE: $ qemu-system-aarch64 -M virt -S -qmp stdio {"QMP": {"version": {"qemu": {"micro": 50, "major": 9}}

[PULL 2/2] Revert "meson.build: default to -gsplit-dwarf for debug info"

This reverts commit 563b1a35ed1f1151505d4fe5f723827d1b3fd4bc. Split debug info support is broken when cross compiling (https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99973). People that would like to use it can add it via --extra-cflags. Reported-by: Konstantin Kostiuk Reviewed-by: Daniel P. Berr

Re: [PATCH v5 00/17] make system memory API available for common code

Philippe Mathieu-Daudé writes: > Hi, > > On 14/3/25 19:39, Pierrick Bouvier wrote: >> On 3/14/25 11:34, Anthony PERARD wrote: >>> On Fri, Mar 14, 2025 at 10:33:08AM -0700, Pierrick Bouvier wrote: Hi, one patch is missing review: [PATCH v5 12/17] hw/xen: add stubs for various f

Re: [PATCH for-10.0 1/9] core/cpu.h: gdb_arch_name string should not be freed

On 17/3/25 15:28, Peter Maydell wrote: The documentation for the CPUClass::gdb_arch_name method claims that the returned string should be freed with g_free(). This is not correct: in commit a650683871ba728 we changed this method to instead return a simple constant string, but forgot to update th

[PULL 0/2] Fixes for QEMU 10.0 hard freeze

The following changes since commit aa90f1161bb17a4863e16ec2f75104cff0752d4e: Merge tag 'migration-20250314-pull-request' of https://gitlab.com/farosas/qemu into staging (2025-03-16 02:45:22 -0400) are available in the Git repository at: https://gitlab.com/bonzini/qemu.git tags/for-upstream

Re: [PATCH for-10.1 9/9] target/arm: Remove TYPE_AARCH64_CPU

On 17/3/25 15:28, Peter Maydell wrote: The TYPE_AARCH64_CPU class is an abstract type that is the parent of all the AArch64 CPUs. It now has no special behaviour of its own, so we can eliminate it and make the AArch64 CPUs directly inherit from TYPE_ARM_CPU. Signed-off-by: Peter Maydell ---

Re: [PATCH for-10.1 5/9] target/arm: Handle AArch64 gdb read/write regs in TYPE_ARM_CPU

On 17/3/25 15:28, Peter Maydell wrote: Instead of having the TYPE_AARCH64_CPU subclass set CPUClass::gdb_read_register and ::gdb_write_register to different methods from those of the TYPE_ARM_CPU parent class, have the TYPE_ARM_CPU methods handle either AArch32 or AArch64 at runtime. Signed-off-

Re: [PATCH for-10.1 6/9] target/arm: Present AArch64 gdbstub based on ARM_FEATURE_AARCH64

On 17/3/25 15:28, Peter Maydell wrote: Currently we provide an AArch64 gdbstub for CPUs which are TYPE_AARCH64_CPU, and an AArch32 gdbstub for those which are only TYPE_ARM_CPU. This mostly does the right thing, except in the corner case of KVM with -cpu host,aarch64=off. That produces a CPU wh

Re: [RFC PATCH v2 07/20] hw/arm/smmu-common: Introduce callbacks for PCIIOMMUOps

Hi Shameer, On 3/13/25 9:09 AM, Shameerali Kolothum Thodi wrote: > Hi Eric, > >> -Original Message- >> From: Eric Auger >> Sent: Wednesday, March 12, 2025 4:24 PM >> To: Shameerali Kolothum Thodi >> ; qemu-...@nongnu.org; >> qemu-devel@nongnu.org >> Cc: peter.mayd...@linaro.org; j...@nv

Re: [RFC PATCH v2 05/20] hw/arm/smmuv3-accel: Associate a pxb-pcie bus

On 3/13/25 9:22 AM, Shameerali Kolothum Thodi wrote: > Hi Eric, > >> -Original Message- >> From: Eric Auger >> Sent: Wednesday, March 12, 2025 4:42 PM >> To: Shameerali Kolothum Thodi >> ; qemu-...@nongnu.org; >> qemu-devel@nongnu.org >> Cc: peter.mayd...@linaro.org; j...@nvidia.com; n

Re: [PATCH v2 1/2] gdbstub: Improve physical memory access handling

On 3/16/25 22:16, Nicholas Piggin wrote: Bring gdb's physical memory access handling up to speed with the CPU memory access, by setting MemTxAttribute.debug=1, and by checking for memory transaction errors. GDB with PhyMemMode will now report failure for memory access outside valid system memory

Re: [PATCH v2 2/2] memory: suppress INVALID_MEM logs caused by debug access

On 3/16/25 22:16, Nicholas Piggin wrote: Debugger-driven invalid memory accesses are not guest errors, so should not cause these error logs. Debuggers can access memory wildly, including access to addresses not specified by the user (e.g., gdb it might try to walk the stack or load target addres

Re: [PATCH v5 11/17] exec/ram_addr: call xen_hvm_modified_memory only if xen is enabled

On 3/17/25 09:23, Philippe Mathieu-Daudé wrote: On 17/3/25 17:22, Philippe Mathieu-Daudé wrote: On 17/3/25 17:07, Pierrick Bouvier wrote: On 3/17/25 08:50, Philippe Mathieu-Daudé wrote: On 14/3/25 18:31, Pierrick Bouvier wrote: Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier

Re: [PATCH RFC v2] Integration coroutines into fuse export

On Sun, Mar 16, 2025 at 01:30:20AM +0800, saz97 wrote: > Signed-off-by: Changzhi Xie > > This commit refactors the FUSE export to process read and write operations > using coroutines, improving concurrency and avoiding blocking the main loop. > > The main changes include: > 1. Introduce FuseIOR

Re: [PATCH] docs/system: Fix the information on how to run certain functional tests

Hi Thomas, On Mon, Mar 17, 2025 at 7:50 AM Thomas Huth wrote: > Hi! > > On 16/03/2025 21.21, Niek Linnenbank wrote: > > Hi Thomas, > > > > On Tue, Mar 11, 2025 at 5:08 PM Thomas Huth > > wrote: > > > > The tests have been converted to the functional framework, so

Re: [PATCH 0/1 RFC] FUSE Export Coroutine Integration Cover Letter

On Sun, Mar 16, 2025 at 01:30:06AM +0800, saz97 wrote: > Signed-off-by: Changzhi Xie > > FUSE Export Coroutine Integration Cover Letter > > This patch series refactors QEMU's FUSE export module to leverage coroutines > for read/write operations, > addressing concurrency limitations and alignin

[BUG][powerpc] KVM Guest Boot Failure – Hangs at "Booting Linux via __start()”

Bug Description: Encountering a boot failure when launching a KVM guest with qemu-system-ppc64. The guest hangs at boot, and the QEMU monitor crashes. Reproduction Steps: # qemu-system-ppc64 --version QEMU emulator version 9.2.50 (v9.2.0-2799-g0462a32b4f) Copyright (c) 2003-2025 Fabrice Bella

Re: [PATCH v3 0/7] Move memory listener register to vhost_vdpa_init

Hi Jonah I tested this series with the vhost_vdpa device based on mellanox ConnectX-6 DX nic and hit the host kernel crash. This problem can be easier to reproduce under the hotplug/unplug device scenario. For the core dump messages please review the attachment. FW version: # flint -d :0d:00.

Re: [PATCH v3 4/7] memory-attribute-manager: Introduce MemoryAttributeManager to manage RAMBLock with guest_memfd

On 3/18/2025 1:01 AM, Gupta, Pankaj wrote: > On 3/17/2025 11:36 AM, David Hildenbrand wrote: >> On 17.03.25 03:54, Chenyi Qiang wrote: >>> >>> >>> On 3/14/2025 8:11 PM, Gupta, Pankaj wrote: On 3/10/2025 9:18 AM, Chenyi Qiang wrote: > As the commit 852f0048f3 ("RAMBlock: make guest_memfd

Re: [PATCH 12/17] rust/vmstate: Support version field in vmstate macros

On Mon, Mar 17, 2025 at 05:38:10PM +0100, Paolo Bonzini wrote: > Date: Mon, 17 Mar 2025 17:38:10 +0100 > From: Paolo Bonzini > Subject: Re: [PATCH 12/17] rust/vmstate: Support version field in vmstate > macros > > On Mon, Mar 17, 2025 at 3:52 PM Zhao Liu wrote: > > Add "version = *" in vmstate

Re: [PATCH v3 0/7] Move memory listener register to vhost_vdpa_init

On Tue, Mar 18, 2025 at 9:55 AM Lei Yang wrote: > > Hi Jonah > > I tested this series with the vhost_vdpa device based on mellanox > ConnectX-6 DX nic and hit the host kernel crash. This problem can be > easier to reproduce under the hotplug/unplug device scenario. > For the core dump messages ple

[PATCH v2] tests/functional/test_arm_orangepi: rename test class to 'OrangePiMachine'

The test class in this file contains all functional test cases for testing the Orange Pi PC board. It should be given a name matching the Qemu machine it covers. This commit sets the test class name to 'OrangePiMachine'. Fixes: 380f7268b7b ("tests/functional: Convert the OrangePi tests to the fu

RE: [PATCH 16/39] target/hexagon: Implement hex_tlb_lookup_by_asid()

> -Original Message- > From: Brian Cain > Sent: Friday, February 28, 2025 11:28 PM > To: qemu-devel@nongnu.org > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; > quic_mlie...@quicinc.com; ltaylorsi

Re: [PATCH 14/17] rust/vmstate: Add unit test for vmstate_of macro

On Mon, Mar 17, 2025 at 06:11:35PM +0100, Paolo Bonzini wrote: > Date: Mon, 17 Mar 2025 18:11:35 +0100 > From: Paolo Bonzini > Subject: Re: [PATCH 14/17] rust/vmstate: Add unit test for vmstate_of macro > > Thanks very much for the tests! > > On Mon, Mar 17, 2025 at 3:52 PM Zhao Liu wrote: > >

Re: [PATCH 00/17] rust/vmstate: Clean up, fix, enhance & test

On Mon, Mar 17, 2025 at 06:20:15PM +0100, Paolo Bonzini wrote: > Date: Mon, 17 Mar 2025 18:20:15 +0100 > From: Paolo Bonzini > Subject: Re: [PATCH 00/17] rust/vmstate: Clean up, fix, enhance & test > > On Mon, Mar 17, 2025 at 3:52 PM Zhao Liu wrote: > > Hi, > > > > This series is in preparation

Re: Building QEMU as a Shared Library

Hi Alex, You mentioned about a patch series; do you have it handy with you? If so, could you please direct me to the same ? On 14 Mar 2025, at 12:11 AM, Alex Bennée wrote: Saanjh Sengupta mailto:saanjhsengu...@outlook.com>> writes: Hi, What we are trying to achieve is that the QEMU should r

[PATCH] docs/system: Use the meson binary from the pyvenv

From: Thomas Huth To avoid problems with the meson installation from the host system, we should always use the meson from our venv instead. Thus use this in the documentation, too. While we're at it, also mention that it has to be run from the build folder (in the igb.rst file; the other two fil

Re: [PATCH v2] microvm: do not use the lastest cpu version

On Wed, Mar 5, 2025 at 7:56 PM Ani Sinha wrote: > > On Wed, Mar 5, 2025 at 7:12 PM Stefan Hajnoczi wrote: > > > > On Wed, Mar 05, 2025 at 01:24:25PM +0530, Ani Sinha wrote: > > > On Sat, Mar 1, 2025 at 9:04 PM Ani Sinha wrote: > > > > > > > > On Thu, Feb 20, 2025 at 12:36 PM Zhao Liu wrote: > >

[PATCH] docs/system/arm: Use "functional tests" instead of "integration tests"

From: Thomas Huth We don't use the term "integration tests" for these kind of tests anymore, it's "functional tests" nowadays. Suggested-by: Niek Linnenbank Signed-off-by: Thomas Huth --- docs/system/arm/bananapi_m2u.rst | 6 +++--- docs/system/arm/orangepi.rst | 6 +++--- 2 files changed

[BUG][powerpc] KVM Guest Boot Failure and Hang at "Booting Linux via __start()"

Bug Description: Encountering a boot failure when launching a KVM guest with 'qemu-system-ppc64'. The guest hangs at boot, and the QEMU monitor crashes. Reproduction Steps: # qemu-system-ppc64 --version QEMU emulator version 9.2.50 (v9.2.0-2799-g0462a32b4f) Copyright (c) 2003-2025 Fabrice Bel

Re: [BUG][powerpc] KVM Guest Boot Failure – Hangs at "Booting Linux via __start()”

Thanks for the report. Tricky problem. A secondary CPU is hanging before it is started by the primary via rtas call. That secondary keeps calling kvm_cpu_exec(), which keeps exiting out early with EXCP_HLT because kvm_arch_process_async_events() returns true because that cpu has ->halted=1. That

[PATCH v6 03/18] exec/memory_ldst: extract memory_ldst declarations from cpu-all.h

They are now accessible through exec/memory.h instead, and we make sure all variants are available for common or target dependent code. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier --- include/exec/cpu-all.h | 12 include/exec/memory_ldst.h.inc | 4

[PATCH 08/13] target/arm/cpu: flags2 is always uint64_t

Do not rely on target dependent type, but use a fixed type instead. Since the original type is unsigned, it should be safe to extend its size without any side effect. Signed-off-by: Pierrick Bouvier --- target/arm/cpu.h| 2 +- target/arm/tcg/hflags.c | 4 ++-- 2 files changed, 3 insertio

[PATCH 09/13] target/arm/cpu: define ARM_MAX_VQ once for aarch32 and aarch64

This will affect zregs field for aarch32. This field is used for MVE and SVE implementations. MVE implementation is clipping index value to 0 or 1 for zregs[*].d[], so we should not touch the rest of data in this case anyway. Signed-off-by: Pierrick Bouvier --- target/arm/cpu.h | 6 +- 1 fil

[PATCH 07/13] target/arm/cpu: always define kvm related registers

This does not hurt, even if they are not used. Signed-off-by: Pierrick Bouvier --- target/arm/cpu.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 23c2293f7d1..96f7801a239 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -971,7 +971,6 @@ str

[PATCH 00/13] single-binary: start make hw/arm/ common (boot.c)

This series focuses on removing compilation units duplication in hw/arm. We start with this architecture because it should not be too hard to transform it, and should give us some good hints on the difficulties we'll meet later. We first start by making changes in global headers to be able to not

[PATCH 05/13] target/arm/cpu: move KVM_HAVE_MCE_INJECTION to kvm-all.c file directly

This define is used only in accel/kvm/kvm-all.c, so we push directly the definition there. Add more visibility to kvm_arch_on_sigbus_vcpu() to allow removing this define from any header. The only other architecture defining KVM_HAVE_MCE_INJECTION is i386, which we can cleanup later. Signed-off-by

[PATCH 12/13] meson: add common hw files

Those files will be compiled once per base architecture ("arm" in this case), instead of being compiled for every variant/bitness of architecture. We make sure to not include target cpu definitions (exec/cpu-defs.h) by defining header guard directly. This way, a given compilation unit can access a

[PATCH 13/13] hw/arm/boot: make compilation unit hw common

Now we eliminated poisoned identifiers from headers, this file can now be compiled once for all arm targets. Signed-off-by: Pierrick Bouvier --- hw/arm/boot.c | 1 + hw/arm/meson.build | 5 - 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/arm/boot.c b/hw/arm/boot.c ind

[PATCH 02/13] exec/cpu-all: restrict compile time assert to target specific code

TLB_FLAGS defines are based on TARGET_PAGE_BITS_MIN, which is defined for every target. In the next commit, we'll introduce a non-static define for TARGET_PAGE_BITS_MIN in common code, thus, we can't check this at compile time, except in target specific code. Signed-off-by: Pierrick Bouvier ---

[PATCH 10/13] target/arm/cpu: define same set of registers for aarch32 and aarch64

To eliminate TARGET_AARCH64, we need to make various definitions common between 32 and 64 bit Arm targets. Added registers are used only by aarch64 code, and the only impact is on the size of CPUARMState, and added zarray (ARMVectorReg zarray[ARM_MAX_VQ * 16]) member (+64KB) It could be eventually

[PATCH 06/13] exec/poison: KVM_HAVE_MCE_INJECTION can now be poisoned

We prevent common code to use this define by mistake. Signed-off-by: Pierrick Bouvier --- include/exec/poison.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/exec/poison.h b/include/exec/poison.h index 8ed04b31083..816f6f99d16 100644 --- a/include/exec/poison.h +++ b/include/exec

[PATCH 03/13] exec/target_page: runtime defintion for TARGET_PAGE_BITS_MIN

We introduce later a mechanism to skip cpu definitions inclusion, so we can detect it here, and call the correct runtime function instead. Signed-off-by: Pierrick Bouvier --- include/exec/target_page.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/exec/target_page.h b/include/ex

[PATCH 04/13] exec/cpu-all: allow to include specific cpu

Including "cpu.h" from code that is not compiled per target is ambiguous by definition. Thus we introduce a conditional include, to allow every architecture to set this, to point to the correct definition. hw/X or target/X will now include directly "target/X/cpu.h", and "target/X/cpu.h" will defin

Re: [PATCH 04/17] rust/vmstate: Use ident instead of expr to parse vmsd in vmstate_struct macro

On Tue, Mar 18, 2025 at 10:46:10AM +0800, Zhao Liu wrote: > Date: Tue, 18 Mar 2025 10:46:10 +0800 > From: Zhao Liu > Subject: Re: [PATCH 04/17] rust/vmstate: Use ident instead of expr to parse > vmsd in vmstate_struct macro > > On Mon, Mar 17, 2025 at 06:17:07PM +0100, Paolo Bonzini wrote: > > D

Re: [PATCH 13/17] rust/vmstate: Support vmstate_validate

> > +#[doc(alias = "VMSTATE_VALIDATE")] > > +#[macro_export] > > +macro_rules! vmstate_validate { > > +($struct_name:ty, $test_name:expr, $test_fn:expr $(,)?) => { > > +$crate::bindings::VMStateField { > > +name: ::std::ffi::CStr::as_ptr($test_name), > > +// TODO

Re: [PATCH 03/17] rust/vmstate: Add a prefix separator ", " for the array field in vmstate macros

On Mon, Mar 17, 2025 at 05:37:06PM +0100, Paolo Bonzini wrote: > Date: Mon, 17 Mar 2025 17:37:06 +0100 > From: Paolo Bonzini > Subject: Re: [PATCH 03/17] rust/vmstate: Add a prefix separator ", " for > the array field in vmstate macros > > On Mon, Mar 17, 2025 at 3:52 PM Zhao Liu wrote: > > > >

Re: [PATCH 04/17] rust/vmstate: Use ident instead of expr to parse vmsd in vmstate_struct macro

On Mon, Mar 17, 2025 at 06:17:07PM +0100, Paolo Bonzini wrote: > Date: Mon, 17 Mar 2025 18:17:07 +0100 > From: Paolo Bonzini > Subject: Re: [PATCH 04/17] rust/vmstate: Use ident instead of expr to parse > vmsd in vmstate_struct macro > > On Mon, Mar 17, 2025 at 3:52 PM Zhao Liu wrote: > > > > W

Re: [PULL v2 1/6] target/loongarch: Fix vldi inst

Cc: qemu-sta...@nongnu.org Fix : https://gitlab.com/qemu-project/qemu/-/issues/2865 在 2024/12/27 下午2:22, Bibo Mao 写道: From: Guo Hongyu Refer to the link below for a description of the vldi instructions: https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88 Fixed errors in

Re: [PATCH 2/2] memory: suppress INVALID_MEM logs caused by debug access

On 14/3/25 08:41, Nicholas Piggin wrote: Debugger-driven invalid memory accesses are not guest errors, so should not cause these error logs. Debuggers can access memory wildly, including access to addresses not specified by the user (e.g., gdb it might try to walk the stack or load target addres

Re: [PATCH v7 5/5] migration: add MULTIFD_RECV_SYNC migration command

Hi, On Fri, 14 Mar 2025 at 01:40, Peter Xu wrote: >+save_section_header(f, se, QEMU_VM_SECTION_PART); > +ram_save_zero_page(f, se->opaque); >I'll stop requesting a why here... * Earlier in this thread you mentioned 'We need a header'. I took it as a 'RAM page' header, not save_se

Re: [PATCH 3/6] amd_iommu: Update bitmasks representing DTE reserved fields

Hi , On 3/13/2025 7:53 PM, Alejandro Jimenez wrote: > > > On 3/12/25 12:12 AM, Arun Kodilkar, Sairaj wrote: >> Hi Alejandro, >> >> On 3/11/2025 8:54 PM, Alejandro Jimenez wrote: > > [...] > >>> --- a/hw/i386/amd_iommu.h >>> +++ b/hw/i386/amd_iommu.h >>> @@ -25,6 +25,8 @@ >>>   #include "hw/i3

Re: [PATCH 1/6] amd_iommu: Fix Miscellanous Information Register 0 offsets

On 3/11/2025 8:54 PM, Alejandro Jimenez wrote: > The definitions encoding the maximum Virtual, Physical, and Guest Virtual > Address sizes supported by the IOMMU are using incorrect offsets i.e. the > VASize and GVASize offsets are switched. > > Cc: qemu-sta...@nongnu.org > Fixes: d29a09ca6842

Re: [PATCH 3/6] amd_iommu: Update bitmasks representing DTE reserved fields

Hi Alejandro, On 3/11/2025 8:54 PM, Alejandro Jimenez wrote: > The DTE validation method verifies that all bits in reserved DTE fields are > unset. Update them according to the latest definition available in AMD I/O > Virtualization Technology (IOMMU) Specification - Section 2.2.2.1 Device > Tabl

[PATCH v3] tests/functional: remove all class level fields

A number of fields are set at the class level on QemuBaseTest, even though the exact same named field is then set at the object level later in most cases. The 'self.logger' initialization in ACPI bits test needs to be removed since 'self.log' won't exist at that point in the flow. It already initi

Re: [PATCH v3 6/7] memory: Attach MemoryAttributeManager to guest_memfd-backed RAMBlocks

On Mon, Mar 17, 2025 at 06:21:13PM +0800, Chenyi Qiang wrote: > > > On 3/17/2025 5:45 PM, Tony Lindgren wrote: > > On Mon, Mar 17, 2025 at 03:32:16PM +0800, Chenyi Qiang wrote: > >> > >> > >> On 3/17/2025 2:18 PM, Tony Lindgren wrote: > >>> Hi, > >>> > >>> On Mon, Mar 10, 2025 at 04:18:34PM +0800

[PATCH 1/4] target/arm: Explicitly set ARM_CP_NO_GDB

Explicitly set ARM_CP_NO_GDB when ARM_CP_NO_RAW is set. Signed-off-by: Akihiko Odaki --- hw/intc/arm_gicv3_cpuif.c | 100 +- hw/intc/arm_gicv3_kvm.c| 2 +- target/arm/debug_helper.c | 2 +- target/arm/helper.c| 219 +- target/

[PATCH 2/4] target/arm: Do not imply ARM_CP_NO_GDB

Do not imply ARM_CP_NO_GDB when ARM_CP_NO_RAW. A register without raw access support may still expose some state to GDB that is managed by something else. A register may its state with another register but may not be used for either migration or KVM state synchronization. For example, a multiplex

[PATCH 0/4] target/arm: Flag PMCNTENCLR with ARM_CP_NO_RAW

Supersedes: <20250314-clr-v2-1-7c7220c17...@daynix.com> ("[PATCH v2] target/arm: Define raw write for PMU CLR registers") A normal write to PMCNTENCLR clears written bits so it is not appropriate for writing a raw value. This kind of situation is usually handled by setting a raw write function, bu

[PATCH 3/4] target/arm: Expose PMINTENCLR to GDB

PMINTENCLR and PMINTENCLR_EL1 are aliases of PMINTENSET_EL1. Expose them as we do for other alias registers. Signed-off-by: Akihiko Odaki --- target/arm/helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 5ce468ac2693..

[PATCH 4/4] target/arm: Flag PMCNTENCLR with ARM_CP_NO_RAW

A normal write to PMCNTENCLR clears written bits so it is not appropriate for writing a raw value. This kind of situation is usually handled by setting a raw write function, but flag the register with ARM_CP_NO_RAW instead to workaround a problem with KVM. KVM also has the same problem with PMINTE

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