Hi,
this patch series tries to properly implement privilege levels for the TriCore,
as discussed in
https://lore.kernel.org/qemu-devel/20230118090319.32n4uto7ogy3gfr6@schnipp.zuhause/.
While implementing privilege traps for the SV/UM1 only insns, I saw that
the RESTORE insn uses the wrong ICR.IE bit. So I fixed that as well.
Cheers,
Bastian
v1 -> v2:
- Fixed bug where JLI clobbered reg A[11] | PATCH [01/08]
- Moved all calls to tcg_gen_exit_tb() to | PATCH [02/08]
tricore_tr_tb_stop() |
- Enable/disable insns now exit to main-loop | PATCH [03/08]
- Indirect jumps us tcg_gen_lookup_and_goto_ptr() | PATCH [04/08]
- Removed (uint32_t) cast | PATCH [05/08]
- Removed psw_write() calling cpu_loop_exit() | PATCH [07/08]
v2 -> v3:
- DISABLE insns don't end the TB | PATCH [03/08]
- generate_trap() for indirct jump now set | PATCH [04/08]
DISAS_NORETURN |
Bastian Koppelmann (8):
target/tricore: Fix RR_JLI clobbering reg A[11]
target/tricore: Introduce DISAS_TARGET_EXIT
target/tricore: ENABLE/DISABLE exit to main-loop
target/tricore: Indirect jump insns use tcg_gen_lookup_and_goto_ptr()
target/tricore: Introduce priv tb flag
target/tricore: Implement privilege level for all insns
target/tricore: Honour privilege changes on PSW write
target/tricore: Fix ICR.IE offset in RESTORE insn
target/tricore/cpu.h | 17 +++++--
target/tricore/translate.c | 97 ++++++++++++++++++++++++++------------
2 files changed, 78 insertions(+), 36 deletions(-)
--
2.40.1
