> -----Original Message-----
> From: Akihiko Odaki <akihiko.od...@daynix.com>
> Sent: Friday, 14 April 2023 13:37
> Cc: Sriram Yagnaraman <sriram.yagnara...@est.tech>; Jason Wang
> <jasow...@redhat.com>; Dmitry Fleytman <dmitry.fleyt...@gmail.com>;
> Michael S. Tsirkin <m...@redhat.com>; Alex Bennée <alex.ben...@linaro.org>;
> Philippe Mathieu-Daudé <phi...@linaro.org>; Thomas Huth
> <th...@redhat.com>; Wainer dos Santos Moschetta
> <waine...@redhat.com>; Beraldo Leal <bl...@redhat.com>; Cleber Rosa
> <cr...@redhat.com>; Laurent Vivier <lviv...@redhat.com>; Paolo Bonzini
> <pbonz...@redhat.com>; qemu-devel@nongnu.org; Akihiko Odaki
> <akihiko.od...@daynix.com>
> Subject: [PATCH 22/40] igb: Add more definitions for Tx descriptor
>
> Signed-off-by: Akihiko Odaki <akihiko.od...@daynix.com>
> ---
> hw/net/igb_core.c | 2 +-
> hw/net/igb_regs.h | 32 +++++++++++++++++++++++++++-----
> 2 files changed, 28 insertions(+), 6 deletions(-)
>
> diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index
> e5a7021c0e..350462c40c 100644
> --- a/hw/net/igb_core.c
> +++ b/hw/net/igb_core.c
> @@ -418,7 +418,7 @@ igb_setup_tx_offloads(IGBCore *core, struct igb_tx
> *tx) {
> if (tx->first_cmd_type_len & E1000_ADVTXD_DCMD_TSE) {
> uint32_t idx = (tx->first_olinfo_status >> 4) & 1;
> - uint32_t mss = tx->ctx[idx].mss_l4len_idx >> 16;
> + uint32_t mss = tx->ctx[idx].mss_l4len_idx >>
> + E1000_ADVTXD_MSS_SHIFT;
> if (!net_tx_pkt_build_vheader(tx->tx_pkt, true, true, mss)) {
> return false;
> }
> diff --git a/hw/net/igb_regs.h b/hw/net/igb_regs.h index
> c5c5b3c3b8..22ce909173 100644
> --- a/hw/net/igb_regs.h
> +++ b/hw/net/igb_regs.h
> @@ -42,11 +42,6 @@ union e1000_adv_tx_desc {
> } wb;
> };
>
> -#define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context
> Descriptor */ -#define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced
> Data Descriptor */ -#define E1000_ADVTXD_DCMD_DEXT 0x20000000 /*
> Descriptor Extension (1=Adv) */
> -#define E1000_ADVTXD_DCMD_TSE 0x80000000 /* TCP/UDP Segmentation
> Enable */
> -
> #define E1000_ADVTXD_POTS_IXSM 0x00000100 /* Insert TCP/UDP
> Checksum */ #define E1000_ADVTXD_POTS_TXSM 0x00000200 /* Insert
> TCP/UDP Checksum */
>
> @@ -151,6 +146,10 @@ union e1000_adv_rx_desc {
> #define IGB_82576_VF_DEV_ID 0x10CA
> #define IGB_I350_VF_DEV_ID 0x1520
>
> +/* VLAN info */
> +#define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
> +#define IGB_TX_FLAGS_VLAN_SHIFT 16
> +
Doesn't seem to be used anywhere, added by mistake?
> /* from igb/e1000_82575.h */
>
> #define E1000_MRQC_ENABLE_RSS_MQ 0x00000002
> @@ -160,6 +159,29 @@ union e1000_adv_rx_desc {
> #define E1000_MRQC_RSS_FIELD_IPV6_UDP 0x00800000
> #define E1000_MRQC_RSS_FIELD_IPV6_UDP_EX 0x01000000
>
> +/* Adv Transmit Descriptor Config Masks */
> +#define E1000_ADVTXD_MAC_TSTAMP 0x00080000 /* IEEE1588
> Timestamp packet */
> +#define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context
> Descriptor */
> +#define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data
> Descriptor */
> +#define E1000_ADVTXD_DCMD_EOP 0x01000000 /* End of Packet */
> +#define E1000_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet
> CRC) */
> +#define E1000_ADVTXD_DCMD_RS 0x08000000 /* Report Status */
> +#define E1000_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension
> (1=Adv) */
> +#define E1000_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */
nit; You could use the above definition instead of E1000_TXD_CMD_VLE in
igb_tx_insert_vlan()?
> +#define E1000_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */
> +#define E1000_ADVTXD_PAYLEN_SHIFT 14 /* Adv desc PAYLEN shift */
> +
> +#define E1000_ADVTXD_MACLEN_SHIFT 9 /* Adv ctxt desc mac len shift */
> +#define E1000_ADVTXD_TUCMD_L4T_UDP 0x00000000 /* L4 Packet TYPE
> of UDP */
> +#define E1000_ADVTXD_TUCMD_IPV4 0x00000400 /* IP Packet Type:
> 1=IPv4 */
> +#define E1000_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet TYPE of
> TCP
> +*/ #define E1000_ADVTXD_TUCMD_L4T_SCTP 0x00001000 /* L4 packet
> TYPE of
> +SCTP */
> +/* IPSec Encrypt Enable for ESP */
> +#define E1000_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */
> +#define E1000_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */
> +/* Adv ctxt IPSec SA IDX mask */
> +/* Adv ctxt IPSec ESP len mask */
> +
> /* Additional Transmit Descriptor Control definitions */ #define
> E1000_TXDCTL_QUEUE_ENABLE 0x02000000 /* Enable specific Tx Queue */
>
> --
> 2.40.0
