> -----Original Message-----
> From: Akihiko Odaki <akihiko.od...@daynix.com>
> Sent: Friday, 14 April 2023 13:38
> Cc: Sriram Yagnaraman <sriram.yagnara...@est.tech>; Jason Wang
> <jasow...@redhat.com>; Dmitry Fleytman <dmitry.fleyt...@gmail.com>;
> Michael S. Tsirkin <m...@redhat.com>; Alex Bennée <alex.ben...@linaro.org>;
> Philippe Mathieu-Daudé <phi...@linaro.org>; Thomas Huth
> <th...@redhat.com>; Wainer dos Santos Moschetta
> <waine...@redhat.com>; Beraldo Leal <bl...@redhat.com>; Cleber Rosa
> <cr...@redhat.com>; Laurent Vivier <lviv...@redhat.com>; Paolo Bonzini
> <pbonz...@redhat.com>; qemu-devel@nongnu.org; Akihiko Odaki
> <akihiko.od...@daynix.com>
> Subject: [PATCH 37/40] igb: Implement Tx timestamp
>
> Signed-off-by: Akihiko Odaki <akihiko.od...@daynix.com>
> ---
> hw/net/igb_core.c | 7 +++++++
> hw/net/igb_regs.h | 3 +++
> 2 files changed, 10 insertions(+)
>
> diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c index
> c716f400fd..38b53676d4 100644
> --- a/hw/net/igb_core.c
> +++ b/hw/net/igb_core.c
> @@ -614,6 +614,13 @@ igb_process_tx_desc(IGBCore *core,
> tx->first_olinfo_status =
> le32_to_cpu(tx_desc->read.olinfo_status);
> tx->first = false;
> }
> +
> + if ((cmd_type_len & E1000_ADVTXD_MAC_TSTAMP) &&
Should ^ be tx->first_cmd_type_len?
Otherwise, Reviewed-by: Sriram Yagnaraman <sriram.yagnara...@est.tech>
> + (core->mac[TSYNCTXCTL] & E1000_TSYNCTXCTL_ENABLED) &&
> + !(core->mac[TSYNCTXCTL] & E1000_TSYNCTXCTL_VALID)) {
> + core->mac[TSYNCTXCTL] |= E1000_TSYNCTXCTL_VALID;
> + e1000x_timestamp(core->mac, core->timadj, TXSTMPL, TXSTMPH);
> + }
> } else if ((cmd_type_len & E1000_ADVTXD_DTYP_CTXT) ==
> E1000_ADVTXD_DTYP_CTXT) {
> /* advanced transmit context descriptor */ diff --git
> a/hw/net/igb_regs.h b/hw/net/igb_regs.h index b88dc9f1f1..808b587a36
> 100644
> --- a/hw/net/igb_regs.h
> +++ b/hw/net/igb_regs.h
> @@ -322,6 +322,9 @@ union e1000_adv_rx_desc {
> /* E1000_EITR_CNT_IGNR is only for 82576 and newer */
> #define E1000_EITR_CNT_IGNR 0x80000000 /* Don't reset counters on
> write */
>
> +#define E1000_TSYNCTXCTL_VALID 0x00000001 /* tx timestamp valid */
> +#define E1000_TSYNCTXCTL_ENABLED 0x00000010 /* enable tx
> timestampping
> +*/
> +
> /* PCI Express Control */
> #define E1000_GCR_CMPL_TMOUT_MASK 0x0000F000
> #define E1000_GCR_CMPL_TMOUT_10ms 0x00001000
> --
> 2.40.0
