[RFC 38/52] i386: Introduce hybrid_core_type to CPUX86State

[Zhao Liu]

From: Zhao Liu <zhao1....@intel.com>

Currently, x86 only supports two hybrid core types: Intel Core and Intel
Atom [1], so add the core type definations for Intel Core and Intel
Atom, and add hybrid_core_type in CPUX86State.

[1]: SDM, vol.2, ch.3, 3.3 Instructions (A-L), CPUID, CPUID.1AH:EAX[bits
     31-24].

Co-Developed-by: Zhuocheng Ding <zhuocheng.d...@intel.com>
Signed-off-by: Zhuocheng Ding <zhuocheng.d...@intel.com>
Signed-off-by: Zhao Liu <zhao1....@intel.com>
---
 hw/i386/x86.c     | 4 ++++
 target/i386/cpu.c | 1 +
 target/i386/cpu.h | 8 ++++++++
 3 files changed, 13 insertions(+)

diff --git a/hw/i386/x86.c b/hw/i386/x86.c
index a09df6d33fff..f381fdc43180 100644
--- a/hw/i386/x86.c
+++ b/hw/i386/x86.c
@@ -383,6 +383,7 @@ void x86_cpu_pre_plug(HotplugHandler *hotplug_dev,
     CPUArchId *cpu_slot;
     X86CPUTopoIDs topo_ids;
     X86CPU *cpu = X86_CPU(dev);
+    CPUX86State *env = &cpu->env;
     MachineState *ms = MACHINE(hotplug_dev);
     X86MachineState *x86ms = X86_MACHINE(hotplug_dev);
     X86ApicidTopoInfo apicid_topo;
@@ -564,6 +565,9 @@ void x86_cpu_pre_plug(HotplugHandler *hotplug_dev,
         return;
     }
 
+    env->hybrid_core_type =
+        machine_topo_get_hybrid_core_type(ms, cpu->cluster_id, cpu->core_id);
+
     cs = CPU(cpu);
     cs->cpu_index = idx;
 
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 7d6722ab3292..266e981b79e2 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6845,6 +6845,7 @@ static void x86_cpu_initfn(Object *obj)
     X86CPUClass *xcc = X86_CPU_GET_CLASS(obj);
     CPUX86State *env = &cpu->env;
 
+    env->hybrid_core_type = INVALID_HYBRID_TYPE;
     cpu_set_cpustate_pointers(cpu);
 
     object_property_add(obj, "feature-words", "X86CPUFeatureWordInfo",
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 30b2aa6ab10d..bb4e370f9768 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1543,6 +1543,12 @@ typedef struct CPUCaches {
         CPUCacheInfo *l3_cache;
 } CPUCaches;
 
+typedef enum {
+    INVALID_HYBRID_TYPE = 0,
+    INTEL_ATOM_TYPE,
+    INTEL_CORE_TYPE,
+} X86HybridCoreType;
+
 typedef struct HVFX86LazyFlags {
     target_ulong result;
     target_ulong auxbits;
@@ -1825,6 +1831,8 @@ typedef struct CPUArchState {
     uint32_t umwait;
 
     TPRAccess tpr_access_type;
+
+    X86HybridCoreType hybrid_core_type;
 } CPUX86State;
 
 struct kvm_msrs;
-- 
2.34.1