On Fri, 30 Sept 2022 at 23:05, Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> In preparation for TARGET_TB_PCREL, reduce reliance on absolute values.
>
> Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
> ---
> target/arm/translate.c | 29 ++++++++++++++++++-----------
> 1 file changed, 18 insertions(+), 11 deletions(-)
>
> diff --git a/target/arm/translate.c b/target/arm/translate.c
> index fd35db8c8c..050da9e740 100644
> --- a/target/arm/translate.c
> +++ b/target/arm/translate.c
> @@ -276,11 +276,16 @@ static target_long jmp_diff(DisasContext *s,
> target_long diff)
> return diff + (s->thumb ? 4 : 8);
> }
>
> +static void gen_pc_plus_diff(DisasContext *s, TCGv_i32 var, target_long diff)
> +{
> + tcg_gen_movi_i32(var, s->pc_curr + diff);
> +}
> +
> /* Set a variable to the value of a CPU register. */
> void load_reg_var(DisasContext *s, TCGv_i32 var, int reg)
> {
> if (reg == 15) {
> - tcg_gen_movi_i32(var, read_pc(s));
> + gen_pc_plus_diff(s, var, jmp_diff(s, 0));
> } else {
> tcg_gen_mov_i32(var, cpu_R[reg]);
> }
> @@ -296,7 +301,8 @@ TCGv_i32 add_reg_for_lit(DisasContext *s, int reg, int
> ofs)
> TCGv_i32 tmp = tcg_temp_new_i32();
>
> if (reg == 15) {
> - tcg_gen_movi_i32(tmp, (read_pc(s) & ~3) + ofs);
> + /* This difference computes a page offset so ok for TARGET_TB_PCREL.
> */
> + gen_pc_plus_diff(s, tmp, (read_pc(s) & ~3) - s->pc_curr + ofs);
We could rephrase this one also to not do the "pc_curr - pc_curr" thing,
the way we did for BLX in patch 6, right ?
thanks
-- PMM
