On Thu, 17 Mar 2022 at 05:51, Richard Henderson <richard.hender...@linaro.org> wrote: > > This is the cpu side of the operation. Register one irq line, > called EIC. Split out the rather different processing to a > separate function. > > Delay initialization of gpio irqs until realize. We need to > provide a window after init in which the board can set eic_present. > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > ---
> diff --git a/target/nios2/helper.c b/target/nios2/helper.c > index bf40cff779..00f27165d9 100644 > --- a/target/nios2/helper.c > +++ b/target/nios2/helper.c > @@ -57,6 +57,9 @@ static void do_exception(Nios2CPU *cpu, uint32_t > exception_addr, > uint32_t old_status = env->ctrl[CR_STATUS]; > uint32_t new_status = old_status; > > + /* With shadow regs, exceptions are always taken into CRS 0. */ Hmm. Table 3-9 agrees with this, saying that CRS is set to 0 for non-interrupt exceptions, but Table 3-38 disagrees -- it has status.CRS listed as "No change" for non-interrupt exceptions... 3-9 seems to be backed up by other text, so let's go with that. > + new_status &= ~R_CR_STATUS_CRS_MASK; We're missing the "copy status.CRS to status.PRS" part of taking an exception, I think ? thanks -- PMM
