Hi all, This is a port of QEMU TCG to the brand-new CPU architecture LoongArch, introduced by Loongson with their 3A5000 chips. Test suite all passed except one timeout that is test-crypto-tlssession, but this particular case runs well when relatively few targets are enabled, so it may be just a case of low performance (4C4T 2.5GHz). I also boot-tested x86_64 (Debian and Gentoo installation CDs) and aarch64 (Debian netboot installer), and ran riscv64 linux-user emulation with a chroot; everything seems fine so far.
## About the series Only the LP64 ABI is supported, as this is the only one fully implemented and supported by Loongson. 32-bit support is incomplete from outset, and removed from the very latest upstream submissions, so you can't even configure for that. The architecture's documentation is already translated into English; it can be browsed at https://loongson.github.io/LoongArch-Documentation/. In this series I made use of generated instruction encodings and emitters from https://github.com/loongson-community/loongarch-opcodes (a community project started by myself, something I must admit), as the LoongArch encoding is highly irregular even for a fixed 32-bit ISA, and I want to minimize the maintenance burden for future collaboration. This is something not seen in any of the other TCG ports out there, so I'd like to see if this is acceptable practice (and also maybe bikeshed the file name). Also, I'm not quite familiar with the DWARF spec, so maybe the debug frame information is not supplied correctly; beware (though all my tests run fine). This series touches some of the same files as Song Gao's previous submission of LoongArch *target* support, which is a bit unfortunate; one of us will have to rebase after either series gets in. Actual conflict should only happen on build system bits and include/elf.h, though, as we're working on entirely different areas. ## How to build and test this Upstream support for LoongArch is largely WIP for now, which means you must apply a lot of patches if you want to even cross-build for this arch. The main sources I used are as follows: * binutils: https://github.com/xen0n/binutils-gdb/tree/for-gentoo-2.37-v2 based on https://github.com/loongson/binutils-gdb/tree/loongarch/upstream_v6_a1d65b3 * gcc: https://github.com/xen0n/gcc/tree/for-gentoo-gcc-12-v2 based on https://github.com/loongson/gcc/tree/loongarch_upstream * glibc: https://github.com/xen0n/glibc/tree/for-gentoo-glibc-2.34 based on https://github.com/loongson/glibc/tree/loongarch_2_34_for_upstream * Linux: https://github.com/xen0n/linux/tree/loongarch-playground based on https://github.com/loongson/linux/tree/loongarch-next * Gentoo overlay: https://github.com/xen0n/loongson-overlay I have made ready-to-use Gentoo stage3 tarballs, but they're served with CDN off my personal cloud account, and I don't want the link to be exposed so that my bills skyrocket; you can reach me off-list to get the links if you're interested. As for the hardware availability, the boards can already be bought in China on Taobao, and I think some people at Loongson might be able to arrange for testing environments, if testing on real hardware other than mine is required before merging; they have their in-house Debian spin-off from the early days of this architecture. Their kernel is ABI-incompatible with the version being upstreamed and used by me, but QEMU should work there regardless. Lastly, I'm new to QEMU development and this is my first patch series here; apologizes if I get anything wrong, and any help or suggestion is certainly appreciated! WANG Xuerui (30): elf: Add machine type value for LoongArch MAINTAINERS: Add tcg/loongarch entry with myself as maintainer tcg/loongarch: Add the tcg-target.h file tcg/loongarch: Add generated instruction opcodes and encoding helpers tcg/loongarch: Add register names, allocation order and input/output sets tcg/loongarch: Define the operand constraints tcg/loongarch: Implement necessary relocation operations tcg/loongarch: Implement the memory barrier op tcg/loongarch: Implement tcg_out_mov and tcg_out_movi tcg/loongarch: Implement goto_ptr tcg/loongarch: Implement sign-/zero-extension ops tcg/loongarch: Implement not/and/or/xor/nor/andc/orc ops tcg/loongarch: Implement deposit/extract ops tcg/loongarch: Implement bswap32_i32/bswap64_i64 tcg/loongarch: Implement clz/ctz ops tcg/loongarch: Implement shl/shr/sar/rotl/rotr ops tcg/loongarch: Implement neg/add/sub ops tcg/loongarch: Implement mul/mulsh/muluh/div/divu/rem/remu ops tcg/loongarch: Implement br/brcond ops tcg/loongarch: Implement setcond ops tcg/loongarch: Implement tcg_out_call tcg/loongarch: Implement simple load/store ops tcg/loongarch: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops tcg/loongarch: Implement tcg_target_qemu_prologue tcg/loongarch: Implement exit_tb/goto_tb tcg/loongarch: Implement tcg_target_init tcg/loongarch: Register the JIT configure, meson.build: Mark support for 64-bit LoongArch hosts linux-user: Add host dependency for 64-bit LoongArch accel/tcg/user-exec: Implement CPU-specific signal handler for LoongArch hosts MAINTAINERS | 5 + accel/tcg/user-exec.c | 83 ++ configure | 4 +- include/elf.h | 2 + linux-user/host/loongarch64/hostdep.h | 11 + meson.build | 4 +- tcg/loongarch/tcg-insn-defs.c.inc | 1080 +++++++++++++++++ tcg/loongarch/tcg-target-con-set.h | 30 + tcg/loongarch/tcg-target-con-str.h | 26 + tcg/loongarch/tcg-target.c.inc | 1561 +++++++++++++++++++++++++ tcg/loongarch/tcg-target.h | 183 +++ 11 files changed, 2987 insertions(+), 2 deletions(-) create mode 100644 linux-user/host/loongarch64/hostdep.h create mode 100644 tcg/loongarch/tcg-insn-defs.c.inc create mode 100644 tcg/loongarch/tcg-target-con-set.h create mode 100644 tcg/loongarch/tcg-target-con-str.h create mode 100644 tcg/loongarch/tcg-target.c.inc create mode 100644 tcg/loongarch/tcg-target.h -- 2.33.0
