Hi Richard,
On 9/20/21 23:11, Richard Henderson wrote:
On 9/20/21 1:04 AM, WANG Xuerui wrote:
+ case INDEX_op_bswap32_i32:
+ tcg_out_opc_revb_2h(s, a0, a1);
+ tcg_out_opc_rotri_w(s, a0, a0, 16);
+ break;
+ case INDEX_op_bswap64_i64:
+ tcg_out_opc_revb_d(s, a0, a1);
+ break;
You're missing INDEX_op_bswap32_i64, which in addition has a third
argument consisting of TCG_BSWAP_* bits.
I would have expected revb_2w to be the preferred implementation of
bswap32. I would expect something like
case INDEX_op_bswap32_i32:
/* All 32-bit values are computed sign-extended in the
register. */
a2 = TCG_BSWAP_OS;
/* fall through */
case INDEX_op_bswap32_i64:
tcg_out_opc_revb_2w(s, a0, a1);
if (a2 & TCG_BSWAP_OS) {
tcg_out_ext32s(s, a0, a0);
} else if (a2 & TCG_BSWAP_OZ) {
tcg_out_ext32u(s, a0, a0);
}
break;
You're right when we're supporting only 64-bit hosts. While I was
writing that code I hadn't decided whether to remove support for 32-bit
hosts, so I didn't make use of 64-bit instructions for the 32-bit ops.
I'll fix this in v2.
r~
