Re: [PATCH v1 4/5] hw/intc: sifive_plic: Convert the PLIC to use RISC-V CPU GPIO lines

[Richard Henderson]

On 7/8/21 8:31 PM, Alistair Francis wrote:

          switch (mode) {
          case PLICMode_M:
-            riscv_cpu_update_mip(RISCV_CPU(cpu), MIP_MEIP, 
BOOL_TO_MASK(level));
+            if (level) {
+                qemu_irq_raise(plic->m_external_irqs[hartid]);
+            } else {
+                qemu_irq_lower(plic->m_external_irqs[hartid]);
+            }
              break;
          case PLICMode_S:
-            riscv_cpu_update_mip(RISCV_CPU(cpu), MIP_SEIP, 
BOOL_TO_MASK(level));
+            if (level) {
+                qemu_irq_raise(plic->s_external_irqs[hartid]);
+            } else {
+                qemu_irq_lower(plic->s_external_irqs[hartid]);
+            }
              break;

qemu_irq_set.  Otherwise,

Reviewed-by: Richard Henderson <richard.hender...@linaro.org>

r~