this will allow us to restrict more code to TARGET_AARCH64
Signed-off-by: Claudio Fontana <cfont...@suse.de>
---
target/arm/helper-a64.h | 2 ++
target/arm/helper.h | 1 -
target/arm/arch_dump.c | 12 +++++++-----
target/arm/cpu.c | 1 -
target/arm/cpu64.c | 4 ++++
target/arm/tcg/helper.c | 13 +++++++++++--
6 files changed, 24 insertions(+), 9 deletions(-)
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h
index c139fa81f9..342f55d577 100644
--- a/target/arm/helper-a64.h
+++ b/target/arm/helper-a64.h
@@ -119,3 +119,5 @@ DEF_HELPER_FLAGS_2(st2g_stub, TCG_CALL_NO_WG, void, env,
i64)
DEF_HELPER_FLAGS_2(ldgm, TCG_CALL_NO_WG, i64, env, i64)
DEF_HELPER_FLAGS_3(stgm, TCG_CALL_NO_WG, void, env, i64, i64)
DEF_HELPER_FLAGS_3(stzgm_tags, TCG_CALL_NO_WG, void, env, i64, i64)
+
+DEF_HELPER_FLAGS_2(rebuild_hflags_a64, TCG_CALL_NO_RWG, void, env, int)
diff --git a/target/arm/helper.h b/target/arm/helper.h
index ff8148ddc6..37dd9797a1 100644
--- a/target/arm/helper.h
+++ b/target/arm/helper.h
@@ -94,7 +94,6 @@ DEF_HELPER_FLAGS_1(rebuild_hflags_m32_newel, TCG_CALL_NO_RWG,
void, env)
DEF_HELPER_FLAGS_2(rebuild_hflags_m32, TCG_CALL_NO_RWG, void, env, int)
DEF_HELPER_FLAGS_1(rebuild_hflags_a32_newel, TCG_CALL_NO_RWG, void, env)
DEF_HELPER_FLAGS_2(rebuild_hflags_a32, TCG_CALL_NO_RWG, void, env, int)
-DEF_HELPER_FLAGS_2(rebuild_hflags_a64, TCG_CALL_NO_RWG, void, env, int)
DEF_HELPER_FLAGS_5(probe_access, TCG_CALL_NO_WG, void, env, tl, i32, i32, i32)
diff --git a/target/arm/arch_dump.c b/target/arm/arch_dump.c
index 0184845310..9cc75a6fda 100644
--- a/target/arm/arch_dump.c
+++ b/target/arm/arch_dump.c
@@ -23,6 +23,8 @@
#include "elf.h"
#include "sysemu/dump.h"
+#ifdef TARGET_AARCH64
+
/* struct user_pt_regs from arch/arm64/include/uapi/asm/ptrace.h */
struct aarch64_user_regs {
uint64_t regs[31];
@@ -141,7 +143,6 @@ static int
aarch64_write_elf64_prfpreg(WriteCoreDumpFunction f,
return 0;
}
-#ifdef TARGET_AARCH64
static off_t sve_zreg_offset(uint32_t vq, int n)
{
off_t off = sizeof(struct aarch64_user_sve_header);
@@ -229,7 +230,6 @@ static int aarch64_write_elf64_sve(WriteCoreDumpFunction f,
return 0;
}
-#endif
int arm_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
int cpuid, void *opaque)
@@ -272,15 +272,15 @@ int arm_cpu_write_elf64_note(WriteCoreDumpFunction f,
CPUState *cs,
return ret;
}
-#ifdef TARGET_AARCH64
if (cpu_isar_feature(aa64_sve, cpu)) {
ret = aarch64_write_elf64_sve(f, env, cpuid, s);
}
-#endif
return ret;
}
+#endif /* TARGET_AARCH64 */
+
/* struct pt_regs from arch/arm/include/asm/ptrace.h */
struct arm_user_regs {
uint32_t regs[17];
@@ -449,12 +449,14 @@ ssize_t cpu_get_note_size(int class, int machine, int
nr_cpus)
size_t note_size;
if (class == ELFCLASS64) {
+#ifdef TARGET_AARCH64
note_size = AARCH64_PRSTATUS_NOTE_SIZE;
note_size += AARCH64_PRFPREG_NOTE_SIZE;
-#ifdef TARGET_AARCH64
if (cpu_isar_feature(aa64_sve, cpu)) {
note_size += AARCH64_SVE_NOTE_SIZE(&cpu->env);
}
+#else
+ return -1; /* unsupported */
#endif
} else {
note_size = ARM_PRSTATUS_NOTE_SIZE;
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 78ffd72f6a..195fe49fbf 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1391,7 +1391,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void
*data)
cc->asidx_from_attrs = arm_asidx_from_attrs;
cc->vmsd = &vmstate_arm_cpu;
cc->virtio_is_big_endian = arm_cpu_virtio_is_big_endian;
- cc->write_elf64_note = arm_cpu_write_elf64_note;
cc->write_elf32_note = arm_cpu_write_elf32_note;
#endif
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 971a4474b9..b0026e7ae9 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -623,6 +623,10 @@ static void aarch64_cpu_class_init(ObjectClass *oc, void
*data)
cc->gdb_arch_name = aarch64_gdb_arch_name;
cc->dump_state = aarch64_cpu_dump_state;
+#ifndef CONFIG_USER_ONLY
+ cc->write_elf64_note = arm_cpu_write_elf64_note;
+#endif /* !CONFIG_USER_ONLY */
+
object_class_property_add_bool(oc, "aarch64", aarch64_cpu_get_aarch64,
aarch64_cpu_set_aarch64);
object_class_property_set_description(oc, "aarch64",
diff --git a/target/arm/tcg/helper.c b/target/arm/tcg/helper.c
index 548c94e057..05a8563cea 100644
--- a/target/arm/tcg/helper.c
+++ b/target/arm/tcg/helper.c
@@ -18,6 +18,9 @@
#include "cpregs.h"
#include "tcg-cpu.h"
+uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el,
+ ARMMMUIdx mmu_idx);
+
static int vfp_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg)
{
ARMCPU *cpu = env_archcpu(env);
@@ -1152,8 +1155,10 @@ static uint32_t rebuild_hflags_a32(CPUARMState *env, int
fp_el,
return rebuild_hflags_common_32(env, fp_el, mmu_idx, flags);
}
-static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el,
- ARMMMUIdx mmu_idx)
+#ifdef TARGET_AARCH64
+
+uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el,
+ ARMMMUIdx mmu_idx)
{
uint32_t flags = rebuild_hflags_aprofile(env);
ARMMMUIdx stage1 = stage_1_mmu_idx(mmu_idx);
@@ -1272,6 +1277,8 @@ static uint32_t rebuild_hflags_a64(CPUARMState *env, int
el, int fp_el,
return rebuild_hflags_common(env, fp_el, mmu_idx, flags);
}
+#endif /* TARGET_AARCH64 */
+
static uint32_t rebuild_hflags_internal(CPUARMState *env)
{
int el = arm_current_el(env);
@@ -1332,6 +1339,7 @@ void HELPER(rebuild_hflags_a32)(CPUARMState *env, int el)
env->hflags = rebuild_hflags_a32(env, fp_el, mmu_idx);
}
+#ifdef TARGET_AARCH64
void HELPER(rebuild_hflags_a64)(CPUARMState *env, int el)
{
int fp_el = fp_exception_el(env, el);
@@ -1339,6 +1347,7 @@ void HELPER(rebuild_hflags_a64)(CPUARMState *env, int el)
env->hflags = rebuild_hflags_a64(env, el, fp_el, mmu_idx);
}
+#endif /* TARGET_AARCH64 */
static inline void assert_hflags_rebuild_correctly(CPUARMState *env)
{
--
2.26.2
