On 6/25/20 10:00 AM, Lijun Pan wrote:
> vmulld: Vector Multiply Low Doubleword.
>
> Signed-off-by: Lijun Pan <l...@linux.ibm.com>
> ---
> v3: use tcg_gen_gvec_mul()
>
> target/ppc/translate/vmx-impl.inc.c | 1 +
> target/ppc/translate/vmx-ops.inc.c | 4 ++++
This part looks fine.
> tcg/ppc/tcg-target.h | 2 ++
> tcg/ppc/tcg-target.inc.c | 7 +++++--
This part must be a separate patch.
> @@ -3149,6 +3150,7 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
> static const uint32_t
> add_op[4] = { VADDUBM, VADDUHM, VADDUWM, VADDUDM },
> sub_op[4] = { VSUBUBM, VSUBUHM, VSUBUWM, VSUBUDM },
> + mul_op[4] = { 0, 0, VMULUWM, VMULLD },
> neg_op[4] = { 0, 0, VNEGW, VNEGD },
> eq_op[4] = { VCMPEQUB, VCMPEQUH, VCMPEQUW, VCMPEQUD },
> ne_op[4] = { VCMPNEB, VCMPNEH, VCMPNEW, 0 },
> @@ -3199,8 +3201,9 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
> a1 = 0;
> break;
> case INDEX_op_mul_vec:
> - tcg_debug_assert(vece == MO_32 && have_isa_2_07);
> - insn = VMULUWM;
> + tcg_debug_assert((vece == MO_32 && have_isa_2_07) ||
> + (vece == MO_64 && have_isa_3_10));
> + insn = mul_op[vece];
I think it would be ok to just index mul_op here, since the real isa check is
to be done elsewhere.
Missing a change to tcg_can_emit_vec_op to do that isa check, and allow
INDEX_op_mul_vec to be used for MO_64.
Missing a change to tcg_target_init to test for PPC_FEATURE2_ARCH_3_1.
r~
