On Mon, Nov 04, 2019 at 11:50:11PM +0000, Hanson, Seth via wrote: > I'm looking for in-depth documentation pertaining to how an unsupported 16 > bit RISC ISA can be emulated in Qemu. > > I've referenced this: > > https://wiki.qemu.org/Documentation/TCG > > and have been hoping there's additional, related documentation that I've > overlooked.
The general advice I've seen is: 1. Look at existing TCG targets to learn how to implement aspects of your ISA. 2. If you are unfamiliar with emulation, CPU ISA, or just-in-time compiler concepts, try to read up on them and then look back at the QEMU code. Things will be clearer. You're welcome to join #qemu IRC on irc.oftc.net to ask questions. Good luck! Stefan
signature.asc
Description: PGP signature
