Gentlemen,
Thank you for your input. Peter, I completely understand your concern. Rest assured, this project is entirely internal and requires no code contribution, unit testing, etc. from QEMU devs. We simply want to garner as much documentation as possible to ensure optimal conversion/compatibility. My team and I have already completed a majority of our instruction set mapping into TCG. Lately however, we've encountered issues with floating point operations. I noticed in the TCG Readme that floating point operations are no longer officially supported but were previously (per the last paragraph in 4.1). Can you please provide documentation for implementing the latter? Regards, Seth ________________________________________ From: Peter Maydell <peter.mayd...@linaro.org> Sent: Tuesday, November 5, 2019 1:55 PM To: Stefan Hajnoczi Cc: Hanson, Seth; qemu-devel@nongnu.org Subject: [EXTERNAL] Re: Adding New, Unsupported ISA to Qemu On Tue, 5 Nov 2019 at 16:44, Stefan Hajnoczi <stefa...@gmail.com> wrote > The general advice I've seen is: > > 1. Look at existing TCG targets to learn how to implement aspects of > your ISA. ...and *don't* look at older/less maintained targets (including x86), as they have a lot of bad habits you don't want to copy. Using 'decodetree' is probably a good idea. > 2. If you are unfamiliar with emulation, CPU ISA, or just-in-time > compiler concepts, try to read up on them and then look back at the > QEMU code. Things will be clearer. I would also add 3. Don't expect getting this implemented and upstream to be easy. (Apologies if the following sounds pessimistic and off-putting; but I would prefer people to have a clear understanding of what they're getting into and not assume the chances of success are higher than they might actually be.) "New TCG target" is an unlucky combination of: (1) it's quite a lot of work in pure amount-of-code terms (2) because it is a big feature it is not a good choice as a "first contribution to the project", but new targets often are proposed and written by people who don't have any previous history of writing QEMU code (3) we already have targets for the common CPU ISAs, so anything new is likely to be obscure and not have many people who care about it either in our userbase or in our dev community. (riscv is the obvious recent exception here, as it is clearly relevant as a new architecture and has attracted multiple people to work on it and contribute both code and reviews) 1 and 2 mean that code review of a new TCG target is a lot of work, and 3 means it's not clear how much return the project gets for that investment :-( There is not a large community of upstream developers who are interested in maintaining a lot of obscure guest architectures: we essentially rely on the goodwill and not-entirely-work-time of just a few people when it comes to reviewing new TCG targets. That means that patchsets often hang around on list for a long time without getting attention. Our past historical experience has often been that when people contribute TCG targets, we do a lot of work on our end with code review and helping to get the code into upstream QEMU, and then these people more or less disappear, leaving us with the burden of something we have to support and no help doing it. If in general people submitting new TCG targets were all *helping each other*, passing on what they learned to the next person along, contributing code review, updating older code as QEMU APIs improve/churn, etc, then I think I'd feel differently about this. But to be honest mostly I find myself thinking "oh dear, not another one". We already have two new TCG ports with patches on list which are kind of stalled due to not having enough existing upstream QEMU devs who can/will code review them (and another which hasn't had patches posted but might do soon). The odds for your new port having a happier future don't seem too great to me :-( thanks -- PMM
