Peter Maydell <peter.mayd...@linaro.org> writes: > Is there a specification for RISC-V semihosting? This is > likely to be my first question when the support comes > round for review, so you can have it early :-) We'd > prefer to implement specified interfaces, not random > ad-hoc "this seems to be what newlib wants to see, > which is turn got hacked together by copying some other > architecture's code".
There seems to be convergence on a pretty simple interface which uses
ebreak surrounded by a couple of specific no-ops:
slli x0, x0, 0x1f
ebreak
srai x0, x0, 0x7
There are implementations in rust and openocd, and I've got one for
picolibc. The risc-v semihosting code is sitting on a branch in my repo
on github:
https://github.com/keith-packard/qemu/tree/riscv-semihost
> (describing a mechanism to avoid stopping the emulator)
> This feels to me like it's a bit overcomplicated unless it turns out
> we actually require it though.
Would also be nice for multi-core setups. I'd like to start with the
simple plan for now.
> Isn't the answer to this "don't use a command line that tries
> to connect stdio to multiple things" ?
Uh, we do that all the time? The mux device is designed to handle this
so that you can use stdio for both monitor commands and application
I/O. It's very convenient, the only issue is that the last device that
hooks to the mux ends up getting input first (you use ^Ac to rotate
among the selected devices).
--
-keith
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