On Thu, 7 Mar 2019 at 15:27, bzt <bztem...@gmail.com> wrote: > Yes, could be. The QA7 spec is not really detailed, and calling both > timers simply ARM timers can be misleading. But it's not relevant > anyway from the IRQ's point of view. My latest patch checks both bits > to be set to generate the IRQ, so it does not really matter. As I've > said, this patch adds only the periodic IRQ, and not a full timer > emulation. > > Do you want any modifications on the patch? If so, what exactly? Let > me know and I'll update it.
I assume by "latest patch" you mean a planned v3 that you haven't sent yet? I think it's probably best to go with my interpretation of the specs, if you think it makes sense: * running and stopping the timer is controlled by the "timer enable" bit (and doesn't care about the "interrupt enable" bit) * the timer timing out always sets the "interrupt flag" bit * we set the destination core IRQ/FIQ if the "interrupt flag" and "interrupt enable" bits are both set (we don't care about whether the "timer enable" bit is set for this) That should be only very minor changes from what you have now. thanks -- PMM
