Signed-off-by: Philippe Mathieu-Daudé <f4...@amsat.org>
---
target/mips/insns.decode | 8 ++++++++
target/mips/translate.c | 6 ------
target/mips/translate.inc.c | 7 +++++++
3 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/target/mips/insns.decode b/target/mips/insns.decode
index 7fbf21cbb9..8a1a7acf3a 100644
--- a/target/mips/insns.decode
+++ b/target/mips/insns.decode
@@ -1,2 +1,10 @@
# MIPS32/MIPS64 Instruction Set
#
+# From:
+# - MIPS32 Architecture For Programmers Volume II-A (Document Number: MD00086)
+
+####
+# System Instructions
+####
+
+synci 000001 ----- 11111 ---------------- >insn=ISA_MIPS32R2
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 560325c563..760cca8262 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -27948,12 +27948,6 @@ static void decode_opc(CPUMIPSState *env, DisasContext
*ctx)
check_insn(ctx, ISA_MIPS32R6);
generate_exception_end(ctx, EXCP_RI);
break;
- case OPC_SYNCI:
- check_insn(ctx, ISA_MIPS32R2);
- /* Break the TB to be able to sync copied instructions
- immediately */
- ctx->base.is_jmp = DISAS_STOP;
- break;
case OPC_BPOSGE32: /* MIPS DSP branch */
#if defined(TARGET_MIPS64)
case OPC_BPOSGE64:
diff --git a/target/mips/translate.inc.c b/target/mips/translate.inc.c
index 69fe78ac89..f3dcd32f98 100644
--- a/target/mips/translate.inc.c
+++ b/target/mips/translate.inc.c
@@ -11,3 +11,10 @@
/* Include the auto-generated decoder. */
#include "decode.inc.c"
+
+static bool trans_synci(DisasContext *dc, arg_synci *a)
+{
+ /* Break the TB to be able to sync copied instructions immediately */
+ dc->base.is_jmp = DISAS_STOP;
+ return true;
+}
--
2.17.2
